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Merge branch 'upstream-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/linvil...
[linux.git] / drivers / char / mxser.c
CommitLineData
1da177e4
LT		 1/*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
4 * Copyright (C) 1999-2001 Moxa Technologies ([email protected]).
5 *
6 * This code is loosely based on the Linux serial driver, written by
7 * Linus Torvalds, Theodore T'so and others.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
8ea2c2ec 12 * (at your option) any later version.
1da177e4
LT		 13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 *
23 * Original release 10/26/00
24 *
25 * 02/06/01 Support MOXA Industio family boards.
26 * 02/06/01 Support TIOCGICOUNT.
27 * 02/06/01 Fix the problem for connecting to serial mouse.
28 * 02/06/01 Fix the problem for H/W flow control.
29 * 02/06/01 Fix the compling warning when CONFIG_PCI
30 * don't be defined.
31 *
32 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
33 * <[email protected]>. The original 1.8 code is available on www.moxa.com.
34 * - Fixed x86_64 cleanness
35 * - Fixed sleep with spinlock held in mxser_send_break
36 */
37
38
1da177e4 39#include <linux/module.h>
1da177e4
LT		 40#include <linux/autoconf.h>
41#include <linux/errno.h>
42#include <linux/signal.h>
43#include <linux/sched.h>
44#include <linux/timer.h>
45#include <linux/interrupt.h>
46#include <linux/tty.h>
47#include <linux/tty_flip.h>
48#include <linux/serial.h>
49#include <linux/serial_reg.h>
50#include <linux/major.h>
51#include <linux/string.h>
52#include <linux/fcntl.h>
53#include <linux/ptrace.h>
54#include <linux/gfp.h>
55#include <linux/ioport.h>
56#include <linux/mm.h>
1da177e4
LT		 57#include <linux/delay.h>
58#include <linux/pci.h>
59
60#include <asm/system.h>
61#include <asm/io.h>
62#include <asm/irq.h>
1da177e4
LT		 63#include <asm/bitops.h>
64#include <asm/uaccess.h>
65
66#include "mxser.h"
67
68#define MXSER_VERSION "1.8"
69#define MXSERMAJOR 174
70#define MXSERCUMAJOR 175
71
8ea2c2ec
JJ		 72#define MXSER_EVENT_TXLOW 1
73#define MXSER_EVENT_HANGUP 2
1da177e4
LT		 74
75#define MXSER_BOARDS 4 /* Max. boards */
76#define MXSER_PORTS 32 /* Max. ports */
77#define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
78#define MXSER_ISR_PASS_LIMIT 256
79
80#define MXSER_ERR_IOADDR -1
81#define MXSER_ERR_IRQ -2
82#define MXSER_ERR_IRQ_CONFLIT -3
83#define MXSER_ERR_VECTOR -4
84
85#define SERIAL_TYPE_NORMAL 1
86#define SERIAL_TYPE_CALLOUT 2
87
88#define WAKEUP_CHARS 256
89
90#define UART_MCR_AFE 0x20
91#define UART_LSR_SPECIAL 0x1E
92
8ea2c2ec
JJ		 93#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK|\
94 IXON|IXOFF))
1da177e4 95
0f2ed4c6 96#define IRQ_T(info) ((info->flags & ASYNC_SHARE_IRQ) ? IRQF_SHARED : IRQF_DISABLED)
1da177e4
LT		 97
98#define C168_ASIC_ID 1
99#define C104_ASIC_ID 2
100#define C102_ASIC_ID 0xB
101#define CI132_ASIC_ID 4
102#define CI134_ASIC_ID 3
103#define CI104J_ASIC_ID 5
104
105enum {
106 MXSER_BOARD_C168_ISA = 1,
107 MXSER_BOARD_C104_ISA,
108 MXSER_BOARD_CI104J,
109 MXSER_BOARD_C168_PCI,
110 MXSER_BOARD_C104_PCI,
111 MXSER_BOARD_C102_ISA,
112 MXSER_BOARD_CI132,
113 MXSER_BOARD_CI134,
114 MXSER_BOARD_CP132,
115 MXSER_BOARD_CP114,
116 MXSER_BOARD_CT114,
117 MXSER_BOARD_CP102,
118 MXSER_BOARD_CP104U,
119 MXSER_BOARD_CP168U,
120 MXSER_BOARD_CP132U,
121 MXSER_BOARD_CP134U,
122 MXSER_BOARD_CP104JU,
123 MXSER_BOARD_RC7000,
124 MXSER_BOARD_CP118U,
125 MXSER_BOARD_CP102UL,
126 MXSER_BOARD_CP102U,
127};
128
129static char *mxser_brdname[] = {
130 "C168 series",
131 "C104 series",
132 "CI-104J series",
133 "C168H/PCI series",
134 "C104H/PCI series",
135 "C102 series",
136 "CI-132 series",
137 "CI-134 series",
138 "CP-132 series",
139 "CP-114 series",
140 "CT-114 series",
141 "CP-102 series",
142 "CP-104U series",
143 "CP-168U series",
144 "CP-132U series",
145 "CP-134U series",
146 "CP-104JU series",
147 "Moxa UC7000 Serial",
148 "CP-118U series",
149 "CP-102UL series",
150 "CP-102U series",
151};
152
153static int mxser_numports[] = {
8ea2c2ec
JJ		 154 8, /* C168-ISA */
155 4, /* C104-ISA */
156 4, /* CI104J */
157 8, /* C168-PCI */
158 4, /* C104-PCI */
159 2, /* C102-ISA */
160 2, /* CI132 */
161 4, /* CI134 */
162 2, /* CP132 */
163 4, /* CP114 */
164 4, /* CT114 */
165 2, /* CP102 */
166 4, /* CP104U */
167 8, /* CP168U */
168 2, /* CP132U */
169 4, /* CP134U */
170 4, /* CP104JU */
171 8, /* RC7000 */
172 8, /* CP118U */
173 2, /* CP102UL */
174 2, /* CP102U */
1da177e4
LT		 175};
176
177#define UART_TYPE_NUM 2
178
179static const unsigned int Gmoxa_uart_id[UART_TYPE_NUM] = {
180 MOXA_MUST_MU150_HWID,
181 MOXA_MUST_MU860_HWID
182};
183
8ea2c2ec 184/* This is only for PCI */
1da177e4
LT		 185#define UART_INFO_NUM 3
186struct mxpciuart_info {
187 int type;
188 int tx_fifo;
189 int rx_fifo;
190 int xmit_fifo_size;
191 int rx_high_water;
192 int rx_trigger;
193 int rx_low_water;
194 long max_baud;
195};
196
197static const struct mxpciuart_info Gpci_uart_info[UART_INFO_NUM] = {
198 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
199 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
200 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
201};
202
203
204#ifdef CONFIG_PCI
205
206static struct pci_device_id mxser_pcibrds[] = {
207 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C168, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_C168_PCI},
208 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_C104_PCI},
209 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP132},
210 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP114},
211 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CT114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CT114},
212 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102},
213 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP104U},
214 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP168U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP168U},
215 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP132U},
216 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP134U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP134U},
217 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104JU, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP104JU},
218 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_RC7000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_RC7000},
219 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP118U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP118U},
220 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102UL, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102UL},
221 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102U},
222 {0}
223};
224
225MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
226
227
228#endif
229
230typedef struct _moxa_pci_info {
231 unsigned short busNum;
232 unsigned short devNum;
8ea2c2ec 233 struct pci_dev *pdev; /* add by Victor Yu. 06-23-2003 */
1da177e4
LT		 234} moxa_pci_info;
235
236static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 };
237static int ttymajor = MXSERMAJOR;
238static int calloutmajor = MXSERCUMAJOR;
239static int verbose = 0;
240
241/* Variables for insmod */
242
243MODULE_AUTHOR("Casper Yang");
244MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
8d3b33f6
RR		 245module_param_array(ioaddr, int, NULL, 0);
246module_param(ttymajor, int, 0);
247module_param(calloutmajor, int, 0);
248module_param(verbose, bool, 0);
1da177e4
LT		 249MODULE_LICENSE("GPL");
250
251struct mxser_log {
252 int tick;
253 unsigned long rxcnt[MXSER_PORTS];
254 unsigned long txcnt[MXSER_PORTS];
255};
256
257
258struct mxser_mon {
259 unsigned long rxcnt;
260 unsigned long txcnt;
261 unsigned long up_rxcnt;
262 unsigned long up_txcnt;
263 int modem_status;
264 unsigned char hold_reason;
265};
266
267struct mxser_mon_ext {
268 unsigned long rx_cnt[32];
269 unsigned long tx_cnt[32];
270 unsigned long up_rxcnt[32];
271 unsigned long up_txcnt[32];
272 int modem_status[32];
273
274 long baudrate[32];
275 int databits[32];
276 int stopbits[32];
277 int parity[32];
278 int flowctrl[32];
279 int fifo[32];
280 int iftype[32];
281};
8ea2c2ec 282
1da177e4
LT		 283struct mxser_hwconf {
284 int board_type;
285 int ports;
286 int irq;
287 int vector;
288 int vector_mask;
289 int uart_type;
290 int ioaddr[MXSER_PORTS_PER_BOARD];
291 int baud_base[MXSER_PORTS_PER_BOARD];
292 moxa_pci_info pciInfo;
8ea2c2ec
JJ		 293 int IsMoxaMustChipFlag; /* add by Victor Yu. 08-30-2002 */
294 int MaxCanSetBaudRate[MXSER_PORTS_PER_BOARD]; /* add by Victor Yu. 09-04-2002 */
295 int opmode_ioaddr[MXSER_PORTS_PER_BOARD]; /* add by Victor Yu. 01-05-2004 */
1da177e4
LT		 296};
297
298struct mxser_struct {
299 int port;
300 int base; /* port base address */
301 int irq; /* port using irq no. */
302 int vector; /* port irq vector */
303 int vectormask; /* port vector mask */
304 int rx_high_water;
305 int rx_trigger; /* Rx fifo trigger level */
306 int rx_low_water;
307 int baud_base; /* max. speed */
308 int flags; /* defined in tty.h */
309 int type; /* UART type */
310 struct tty_struct *tty;
311 int read_status_mask;
312 int ignore_status_mask;
313 int xmit_fifo_size;
314 int custom_divisor;
315 int x_char; /* xon/xoff character */
316 int close_delay;
317 unsigned short closing_wait;
318 int IER; /* Interrupt Enable Register */
319 int MCR; /* Modem control register */
320 unsigned long event;
321 int count; /* # of fd on device */
322 int blocked_open; /* # of blocked opens */
1da177e4
LT		 323 unsigned char *xmit_buf;
324 int xmit_head;
325 int xmit_tail;
326 int xmit_cnt;
327 struct work_struct tqueue;
606d099c
AC		 328 struct ktermios normal_termios;
329 struct ktermios callout_termios;
1da177e4
LT		 330 wait_queue_head_t open_wait;
331 wait_queue_head_t close_wait;
332 wait_queue_head_t delta_msr_wait;
333 struct async_icount icount; /* kernel counters for the 4 input interrupts */
334 int timeout;
8ea2c2ec
JJ		 335 int IsMoxaMustChipFlag; /* add by Victor Yu. 08-30-2002 */
336 int MaxCanSetBaudRate; /* add by Victor Yu. 09-04-2002 */
337 int opmode_ioaddr; /* add by Victor Yu. 01-05-2004 */
1da177e4
LT		 338 unsigned char stop_rx;
339 unsigned char ldisc_stop_rx;
340 long realbaud;
341 struct mxser_mon mon_data;
342 unsigned char err_shadow;
343 spinlock_t slock;
344};
345
1da177e4
LT		 346struct mxser_mstatus {
347 tcflag_t cflag;
348 int cts;
349 int dsr;
350 int ri;
351 int dcd;
352};
353
354static struct mxser_mstatus GMStatus[MXSER_PORTS];
355
356static int mxserBoardCAP[MXSER_BOARDS] = {
357 0, 0, 0, 0
8ea2c2ec 358 /* 0x180, 0x280, 0x200, 0x320 */
1da177e4
LT		 359};
360
361static struct tty_driver *mxvar_sdriver;
362static struct mxser_struct mxvar_table[MXSER_PORTS];
363static struct tty_struct *mxvar_tty[MXSER_PORTS + 1];
606d099c
AC		 364static struct ktermios *mxvar_termios[MXSER_PORTS + 1];
365static struct ktermios *mxvar_termios_locked[MXSER_PORTS + 1];
1da177e4
LT		 366static struct mxser_log mxvar_log;
367static int mxvar_diagflag;
368static unsigned char mxser_msr[MXSER_PORTS + 1];
369static struct mxser_mon_ext mon_data_ext;
370static int mxser_set_baud_method[MXSER_PORTS + 1];
371static spinlock_t gm_lock;
372
373/*
374 * This is used to figure out the divisor speeds and the timeouts
375 */
376
377static struct mxser_hwconf mxsercfg[MXSER_BOARDS];
378
379/*
380 * static functions:
381 */
382
383static void mxser_getcfg(int board, struct mxser_hwconf *hwconf);
384static int mxser_init(void);
385
8ea2c2ec 386/* static void mxser_poll(unsigned long); */
1da177e4
LT		 387static int mxser_get_ISA_conf(int, struct mxser_hwconf *);
388static int mxser_get_PCI_conf(int, int, int, struct mxser_hwconf *);
c4028958 389static void mxser_do_softint(struct work_struct *);
1da177e4
LT		 390static int mxser_open(struct tty_struct *, struct file *);
391static void mxser_close(struct tty_struct *, struct file *);
392static int mxser_write(struct tty_struct *, const unsigned char *, int);
393static int mxser_write_room(struct tty_struct *);
394static void mxser_flush_buffer(struct tty_struct *);
395static int mxser_chars_in_buffer(struct tty_struct *);
396static void mxser_flush_chars(struct tty_struct *);
397static void mxser_put_char(struct tty_struct *, unsigned char);
398static int mxser_ioctl(struct tty_struct *, struct file *, uint, ulong);
399static int mxser_ioctl_special(unsigned int, void __user *);
400static void mxser_throttle(struct tty_struct *);
401static void mxser_unthrottle(struct tty_struct *);
606d099c 402static void mxser_set_termios(struct tty_struct *, struct ktermios *);
1da177e4
LT		 403static void mxser_stop(struct tty_struct *);
404static void mxser_start(struct tty_struct *);
405static void mxser_hangup(struct tty_struct *);
406static void mxser_rs_break(struct tty_struct *, int);
7d12e780 407static irqreturn_t mxser_interrupt(int, void *);
1da177e4
LT		 408static void mxser_receive_chars(struct mxser_struct *, int *);
409static void mxser_transmit_chars(struct mxser_struct *);
410static void mxser_check_modem_status(struct mxser_struct *, int);
411static int mxser_block_til_ready(struct tty_struct *, struct file *, struct mxser_struct *);
412static int mxser_startup(struct mxser_struct *);
413static void mxser_shutdown(struct mxser_struct *);
606d099c 414static int mxser_change_speed(struct mxser_struct *, struct ktermios *old_termios);
1da177e4
LT		 415static int mxser_get_serial_info(struct mxser_struct *, struct serial_struct __user *);
416static int mxser_set_serial_info(struct mxser_struct *, struct serial_struct __user *);
417static int mxser_get_lsr_info(struct mxser_struct *, unsigned int __user *);
418static void mxser_send_break(struct mxser_struct *, int);
419static int mxser_tiocmget(struct tty_struct *, struct file *);
420static int mxser_tiocmset(struct tty_struct *, struct file *, unsigned int, unsigned int);
421static int mxser_set_baud(struct mxser_struct *info, long newspd);
422static void mxser_wait_until_sent(struct tty_struct *tty, int timeout);
423
424static void mxser_startrx(struct tty_struct *tty);
425static void mxser_stoprx(struct tty_struct *tty);
426
427
428static int CheckIsMoxaMust(int io)
429{
430 u8 oldmcr, hwid;
431 int i;
432
433 outb(0, io + UART_LCR);
434 DISABLE_MOXA_MUST_ENCHANCE_MODE(io);
435 oldmcr = inb(io + UART_MCR);
436 outb(0, io + UART_MCR);
437 SET_MOXA_MUST_XON1_VALUE(io, 0x11);
438 if ((hwid = inb(io + UART_MCR)) != 0) {
439 outb(oldmcr, io + UART_MCR);
8ea2c2ec 440 return MOXA_OTHER_UART;
1da177e4
LT		 441 }
442
443 GET_MOXA_MUST_HARDWARE_ID(io, &hwid);
444 for (i = 0; i < UART_TYPE_NUM; i++) {
445 if (hwid == Gmoxa_uart_id[i])
8ea2c2ec 446 return (int)hwid;
1da177e4
LT		 447 }
448 return MOXA_OTHER_UART;
449}
450
8ea2c2ec 451/* above is modified by Victor Yu. 08-15-2002 */
1da177e4 452
b68e31d0 453static const struct tty_operations mxser_ops = {
1da177e4
LT		 454 .open = mxser_open,
455 .close = mxser_close,
456 .write = mxser_write,
457 .put_char = mxser_put_char,
458 .flush_chars = mxser_flush_chars,
459 .write_room = mxser_write_room,
460 .chars_in_buffer = mxser_chars_in_buffer,
461 .flush_buffer = mxser_flush_buffer,
462 .ioctl = mxser_ioctl,
463 .throttle = mxser_throttle,
464 .unthrottle = mxser_unthrottle,
465 .set_termios = mxser_set_termios,
466 .stop = mxser_stop,
467 .start = mxser_start,
468 .hangup = mxser_hangup,
57432345
KS		 469 .break_ctl = mxser_rs_break,
470 .wait_until_sent = mxser_wait_until_sent,
1da177e4
LT		 471 .tiocmget = mxser_tiocmget,
472 .tiocmset = mxser_tiocmset,
473};
474
475/*
476 * The MOXA Smartio/Industio serial driver boot-time initialization code!
477 */
478
479static int __init mxser_module_init(void)
480{
481 int ret;
482
483 if (verbose)
484 printk(KERN_DEBUG "Loading module mxser ...\n");
485 ret = mxser_init();
486 if (verbose)
487 printk(KERN_DEBUG "Done.\n");
488 return ret;
489}
490
491static void __exit mxser_module_exit(void)
492{
64698b69 493 int i, err;
1da177e4
LT		 494
495 if (verbose)
496 printk(KERN_DEBUG "Unloading module mxser ...\n");
497
64698b69
KS		 498 err = tty_unregister_driver(mxvar_sdriver);
499 if (!err)
500 put_tty_driver(mxvar_sdriver);
501 else
1da177e4
LT		 502 printk(KERN_ERR "Couldn't unregister MOXA Smartio/Industio family serial driver\n");
503
504 for (i = 0; i < MXSER_BOARDS; i++) {
505 struct pci_dev *pdev;
506
507 if (mxsercfg[i].board_type == -1)
508 continue;
509 else {
510 pdev = mxsercfg[i].pciInfo.pdev;
511 free_irq(mxsercfg[i].irq, &mxvar_table[i * MXSER_PORTS_PER_BOARD]);
8ea2c2ec 512 if (pdev != NULL) { /* PCI */
1da177e4
LT		 513 release_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
514 release_region(pci_resource_start(pdev, 3), pci_resource_len(pdev, 3));
1187ece3 515 pci_dev_put(pdev);
1da177e4
LT		 516 } else {
517 release_region(mxsercfg[i].ioaddr[0], 8 * mxsercfg[i].ports);
518 release_region(mxsercfg[i].vector, 1);
519 }
520 }
521 }
522 if (verbose)
523 printk(KERN_DEBUG "Done.\n");
1da177e4
LT		 524}
525
526static void process_txrx_fifo(struct mxser_struct *info)
527{
528 int i;
529
530 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
531 info->rx_trigger = 1;
532 info->rx_high_water = 1;
533 info->rx_low_water = 1;
534 info->xmit_fifo_size = 1;
535 } else {
536 for (i = 0; i < UART_INFO_NUM; i++) {
537 if (info->IsMoxaMustChipFlag == Gpci_uart_info[i].type) {
538 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
539 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
540 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
541 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
542 break;
543 }
544 }
545 }
546}
547
548static int mxser_initbrd(int board, struct mxser_hwconf *hwconf)
549{
550 struct mxser_struct *info;
551 int retval;
552 int i, n;
553
554 n = board * MXSER_PORTS_PER_BOARD;
555 info = &mxvar_table[n];
556 /*if (verbose) */ {
ae25f8ec 557 printk(KERN_DEBUG " ttyMI%d - ttyMI%d ",
8ea2c2ec
JJ		 558 n, n + hwconf->ports - 1);
559 printk(" max. baud rate = %d bps.\n",
560 hwconf->MaxCanSetBaudRate[0]);
1da177e4
LT		 561 }
562
563 for (i = 0; i < hwconf->ports; i++, n++, info++) {
564 info->port = n;
565 info->base = hwconf->ioaddr[i];
566 info->irq = hwconf->irq;
567 info->vector = hwconf->vector;
568 info->vectormask = hwconf->vector_mask;
8ea2c2ec 569 info->opmode_ioaddr = hwconf->opmode_ioaddr[i]; /* add by Victor Yu. 01-05-2004 */
1da177e4
LT		 570 info->stop_rx = 0;
571 info->ldisc_stop_rx = 0;
572
573 info->IsMoxaMustChipFlag = hwconf->IsMoxaMustChipFlag;
8ea2c2ec 574 /* Enhance mode enabled here */
1da177e4
LT		 575 if (info->IsMoxaMustChipFlag != MOXA_OTHER_UART) {
576 ENABLE_MOXA_MUST_ENCHANCE_MODE(info->base);
577 }
578
579 info->flags = ASYNC_SHARE_IRQ;
580 info->type = hwconf->uart_type;
581 info->baud_base = hwconf->baud_base[i];
582
583 info->MaxCanSetBaudRate = hwconf->MaxCanSetBaudRate[i];
584
585 process_txrx_fifo(info);
586
587
588 info->custom_divisor = hwconf->baud_base[i] * 16;
589 info->close_delay = 5 * HZ / 10;
590 info->closing_wait = 30 * HZ;
c4028958 591 INIT_WORK(&info->tqueue, mxser_do_softint);
1da177e4
LT		 592 info->normal_termios = mxvar_sdriver->init_termios;
593 init_waitqueue_head(&info->open_wait);
594 init_waitqueue_head(&info->close_wait);
595 init_waitqueue_head(&info->delta_msr_wait);
596 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
597 info->err_shadow = 0;
598 spin_lock_init(&info->slock);
599 }
600 /*
601 * Allocate the IRQ if necessary
602 */
603
604
605 /* before set INT ISR, disable all int */
606 for (i = 0; i < hwconf->ports; i++) {
8ea2c2ec
JJ		 607 outb(inb(hwconf->ioaddr[i] + UART_IER) & 0xf0,
608 hwconf->ioaddr[i] + UART_IER);
1da177e4
LT		 609 }
610
611 n = board * MXSER_PORTS_PER_BOARD;
612 info = &mxvar_table[n];
613
8ea2c2ec
JJ		 614 retval = request_irq(hwconf->irq, mxser_interrupt, IRQ_T(info),
615 "mxser", info);
1da177e4 616 if (retval) {
8ea2c2ec
JJ		 617 printk(KERN_ERR "Board %d: %s",
618 board, mxser_brdname[hwconf->board_type - 1]);
619 printk(" Request irq failed, IRQ (%d) may conflict with"
620 " another device.\n", info->irq);
1da177e4
LT		 621 return retval;
622 }
623 return 0;
624}
625
1da177e4
LT		 626static void mxser_getcfg(int board, struct mxser_hwconf *hwconf)
627{
628 mxsercfg[board] = *hwconf;
629}
630
631#ifdef CONFIG_PCI
632static int mxser_get_PCI_conf(int busnum, int devnum, int board_type, struct mxser_hwconf *hwconf)
633{
634 int i, j;
8ea2c2ec 635 /* unsigned int val; */
1da177e4
LT		 636 unsigned int ioaddress;
637 struct pci_dev *pdev = hwconf->pciInfo.pdev;
638
8ea2c2ec 639 /* io address */
1da177e4
LT		 640 hwconf->board_type = board_type;
641 hwconf->ports = mxser_numports[board_type - 1];
642 ioaddress = pci_resource_start(pdev, 2);
8ea2c2ec
JJ		 643 request_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2),
644 "mxser(IO)");
1da177e4 645
8ea2c2ec 646 for (i = 0; i < hwconf->ports; i++)
1da177e4 647 hwconf->ioaddr[i] = ioaddress + 8 * i;
1da177e4 648
8ea2c2ec 649 /* vector */
1da177e4 650 ioaddress = pci_resource_start(pdev, 3);
8ea2c2ec
JJ		 651 request_region(pci_resource_start(pdev, 3), pci_resource_len(pdev, 3),
652 "mxser(vector)");
1da177e4
LT		 653 hwconf->vector = ioaddress;
654
8ea2c2ec 655 /* irq */
1da177e4
LT		 656 hwconf->irq = hwconf->pciInfo.pdev->irq;
657
658 hwconf->IsMoxaMustChipFlag = CheckIsMoxaMust(hwconf->ioaddr[0]);
659 hwconf->uart_type = PORT_16550A;
660 hwconf->vector_mask = 0;
661
662
663 for (i = 0; i < hwconf->ports; i++) {
664 for (j = 0; j < UART_INFO_NUM; j++) {
665 if (Gpci_uart_info[j].type == hwconf->IsMoxaMustChipFlag) {
666 hwconf->MaxCanSetBaudRate[i] = Gpci_uart_info[j].max_baud;
667
8ea2c2ec 668 /* exception....CP-102 */
1da177e4
LT		 669 if (board_type == MXSER_BOARD_CP102)
670 hwconf->MaxCanSetBaudRate[i] = 921600;
671 break;
672 }
673 }
674 }
675
676 if (hwconf->IsMoxaMustChipFlag == MOXA_MUST_MU860_HWID) {
677 for (i = 0; i < hwconf->ports; i++) {
678 if (i < 4)
679 hwconf->opmode_ioaddr[i] = ioaddress + 4;
680 else
681 hwconf->opmode_ioaddr[i] = ioaddress + 0x0c;
682 }
8ea2c2ec
JJ		 683 outb(0, ioaddress + 4); /* default set to RS232 mode */
684 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
1da177e4
LT		 685 }
686
687 for (i = 0; i < hwconf->ports; i++) {
688 hwconf->vector_mask |= (1 << i);
689 hwconf->baud_base[i] = 921600;
690 }
8ea2c2ec 691 return 0;
1da177e4
LT		 692}
693#endif
694
695static int mxser_init(void)
696{
697 int i, m, retval, b, n;
1da177e4
LT		 698 struct pci_dev *pdev = NULL;
699 int index;
700 unsigned char busnum, devnum;
701 struct mxser_hwconf hwconf;
702
703 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
704 if (!mxvar_sdriver)
705 return -ENOMEM;
706 spin_lock_init(&gm_lock);
707
708 for (i = 0; i < MXSER_BOARDS; i++) {
709 mxsercfg[i].board_type = -1;
710 }
711
8ea2c2ec
JJ		 712 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
713 MXSER_VERSION);
1da177e4
LT		 714
715 /* Initialize the tty_driver structure */
716 memset(mxvar_sdriver, 0, sizeof(struct tty_driver));
31f87cf4 717 mxvar_sdriver->owner = THIS_MODULE;
1da177e4 718 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
ae25f8ec 719 mxvar_sdriver->name = "ttyMI";
1da177e4
LT		 720 mxvar_sdriver->major = ttymajor;
721 mxvar_sdriver->minor_start = 0;
722 mxvar_sdriver->num = MXSER_PORTS + 1;
723 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
724 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
725 mxvar_sdriver->init_termios = tty_std_termios;
8ea2c2ec 726 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
606d099c
AC		 727 mxvar_sdriver->init_termios.c_ispeed = 9600;
728 mxvar_sdriver->init_termios.c_ospeed = 9600;
1da177e4
LT		 729 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW;
730 tty_set_operations(mxvar_sdriver, &mxser_ops);
731 mxvar_sdriver->ttys = mxvar_tty;
732 mxvar_sdriver->termios = mxvar_termios;
733 mxvar_sdriver->termios_locked = mxvar_termios_locked;
734
1da177e4
LT		 735 mxvar_diagflag = 0;
736 memset(mxvar_table, 0, MXSER_PORTS * sizeof(struct mxser_struct));
737 memset(&mxvar_log, 0, sizeof(struct mxser_log));
738
739 memset(&mxser_msr, 0, sizeof(unsigned char) * (MXSER_PORTS + 1));
740 memset(&mon_data_ext, 0, sizeof(struct mxser_mon_ext));
741 memset(&mxser_set_baud_method, 0, sizeof(int) * (MXSER_PORTS + 1));
742 memset(&hwconf, 0, sizeof(struct mxser_hwconf));
743
744 m = 0;
745 /* Start finding ISA boards here */
746 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
747 int cap;
8ea2c2ec 748
1da177e4
LT		 749 if (!(cap = mxserBoardCAP[b]))
750 continue;
751
752 retval = mxser_get_ISA_conf(cap, &hwconf);
753
754 if (retval != 0)
8ea2c2ec
JJ		 755 printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n",
756 mxser_brdname[hwconf.board_type - 1], ioaddr[b]);
1da177e4
LT		 757
758 if (retval <= 0) {
759 if (retval == MXSER_ERR_IRQ)
8ea2c2ec
JJ		 760 printk(KERN_ERR "Invalid interrupt number, "
761 "board not configured\n");
1da177e4 762 else if (retval == MXSER_ERR_IRQ_CONFLIT)
8ea2c2ec
JJ		 763 printk(KERN_ERR "Invalid interrupt number, "
764 "board not configured\n");
1da177e4 765 else if (retval == MXSER_ERR_VECTOR)
8ea2c2ec
JJ		 766 printk(KERN_ERR "Invalid interrupt vector, "
767 "board not configured\n");
1da177e4 768 else if (retval == MXSER_ERR_IOADDR)
8ea2c2ec
JJ		 769 printk(KERN_ERR "Invalid I/O address, "
770 "board not configured\n");
1da177e4
LT		 771
772 continue;
773 }
774
775 hwconf.pciInfo.busNum = 0;
776 hwconf.pciInfo.devNum = 0;
777 hwconf.pciInfo.pdev = NULL;
778
779 mxser_getcfg(m, &hwconf);
8ea2c2ec
JJ		 780 /*
781 * init mxsercfg first,
782 * or mxsercfg data is not correct on ISR.
783 */
784 /* mxser_initbrd will hook ISR. */
1da177e4
LT		 785 if (mxser_initbrd(m, &hwconf) < 0)
786 continue;
787
1da177e4
LT		 788 m++;
789 }
790
791 /* Start finding ISA boards from module arg */
792 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
793 int cap;
8ea2c2ec 794
1da177e4
LT		 795 if (!(cap = ioaddr[b]))
796 continue;
797
798 retval = mxser_get_ISA_conf(cap, &hwconf);
799
800 if (retval != 0)
8ea2c2ec
JJ		 801 printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n",
802 mxser_brdname[hwconf.board_type - 1], ioaddr[b]);
1da177e4
LT		 803
804 if (retval <= 0) {
805 if (retval == MXSER_ERR_IRQ)
8ea2c2ec
JJ		 806 printk(KERN_ERR "Invalid interrupt number, "
807 "board not configured\n");
1da177e4 808 else if (retval == MXSER_ERR_IRQ_CONFLIT)
8ea2c2ec
JJ		 809 printk(KERN_ERR "Invalid interrupt number, "
810 "board not configured\n");
1da177e4 811 else if (retval == MXSER_ERR_VECTOR)
8ea2c2ec
JJ		 812 printk(KERN_ERR "Invalid interrupt vector, "
813 "board not configured\n");
1da177e4 814 else if (retval == MXSER_ERR_IOADDR)
8ea2c2ec
JJ		 815 printk(KERN_ERR "Invalid I/O address, "
816 "board not configured\n");
1da177e4
LT		 817
818 continue;
819 }
820
821 hwconf.pciInfo.busNum = 0;
822 hwconf.pciInfo.devNum = 0;
823 hwconf.pciInfo.pdev = NULL;
824
825 mxser_getcfg(m, &hwconf);
8ea2c2ec
JJ		 826 /*
827 * init mxsercfg first,
828 * or mxsercfg data is not correct on ISR.
829 */
830 /* mxser_initbrd will hook ISR. */
1da177e4
LT		 831 if (mxser_initbrd(m, &hwconf) < 0)
832 continue;
833
834 m++;
835 }
836
837 /* start finding PCI board here */
838#ifdef CONFIG_PCI
fe971071 839 n = ARRAY_SIZE(mxser_pcibrds) - 1;
1da177e4
LT		 840 index = 0;
841 b = 0;
842 while (b < n) {
1187ece3 843 pdev = pci_get_device(mxser_pcibrds[b].vendor,
8ea2c2ec 844 mxser_pcibrds[b].device, pdev);
1187ece3 845 if (pdev == NULL) {
1da177e4
LT		 846 b++;
847 continue;
848 }
849 hwconf.pciInfo.busNum = busnum = pdev->bus->number;
850 hwconf.pciInfo.devNum = devnum = PCI_SLOT(pdev->devfn) << 3;
851 hwconf.pciInfo.pdev = pdev;
8ea2c2ec
JJ		 852 printk(KERN_INFO "Found MOXA %s board(BusNo=%d,DevNo=%d)\n",
853 mxser_brdname[(int) (mxser_pcibrds[b].driver_data) - 1],
854 busnum, devnum >> 3);
1da177e4 855 index++;
8ea2c2ec
JJ		 856 if (m >= MXSER_BOARDS)
857 printk(KERN_ERR
858 "Too many Smartio/Industio family boards find "
859 "(maximum %d), board not configured\n",
860 MXSER_BOARDS);
861 else {
1da177e4 862 if (pci_enable_device(pdev)) {
8ea2c2ec
JJ		 863 printk(KERN_ERR "Moxa SmartI/O PCI enable "
864 "fail !\n");
1da177e4
LT		 865 continue;
866 }
8ea2c2ec
JJ		 867 retval = mxser_get_PCI_conf(busnum, devnum,
868 (int)mxser_pcibrds[b].driver_data,
869 &hwconf);
1da177e4
LT		 870 if (retval < 0) {
871 if (retval == MXSER_ERR_IRQ)
8ea2c2ec
JJ		 872 printk(KERN_ERR
873 "Invalid interrupt number, "
874 "board not configured\n");
1da177e4 875 else if (retval == MXSER_ERR_IRQ_CONFLIT)
8ea2c2ec
JJ		 876 printk(KERN_ERR
877 "Invalid interrupt number, "
878 "board not configured\n");
1da177e4 879 else if (retval == MXSER_ERR_VECTOR)
8ea2c2ec
JJ		 880 printk(KERN_ERR
881 "Invalid interrupt vector, "
882 "board not configured\n");
1da177e4 883 else if (retval == MXSER_ERR_IOADDR)
8ea2c2ec
JJ		 884 printk(KERN_ERR
885 "Invalid I/O address, "
886 "board not configured\n");
1da177e4
LT		 887 continue;
888 }
889 mxser_getcfg(m, &hwconf);
8ea2c2ec
JJ		 890 /* init mxsercfg first,
891 * or mxsercfg data is not correct on ISR.
892 */
893 /* mxser_initbrd will hook ISR. */
1da177e4
LT		 894 if (mxser_initbrd(m, &hwconf) < 0)
895 continue;
896 m++;
1187ece3
AC		 897 /* Keep an extra reference if we succeeded. It will
898 be returned at unload time */
899 pci_dev_get(pdev);
1da177e4
LT		 900 }
901 }
902#endif
903
64698b69
KS		 904 retval = tty_register_driver(mxvar_sdriver);
905 if (retval) {
8ea2c2ec
JJ		 906 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family"
907 " driver !\n");
64698b69 908 put_tty_driver(mxvar_sdriver);
1da177e4 909
1da177e4
LT		 910 for (i = 0; i < MXSER_BOARDS; i++) {
911 if (mxsercfg[i].board_type == -1)
912 continue;
913 else {
914 free_irq(mxsercfg[i].irq, &mxvar_table[i * MXSER_PORTS_PER_BOARD]);
8ea2c2ec 915 /* todo: release io, vector */
1da177e4
LT		 916 }
917 }
64698b69 918 return retval;
1da177e4
LT		 919 }
920
64698b69 921 return 0;
1da177e4
LT		 922}
923
c4028958 924static void mxser_do_softint(struct work_struct *work)
1da177e4 925{
c4028958
DH		 926 struct mxser_struct *info =
927 container_of(work, struct mxser_struct, tqueue);
1da177e4
LT		 928 struct tty_struct *tty;
929
930 tty = info->tty;
931
932 if (tty) {
933 if (test_and_clear_bit(MXSER_EVENT_TXLOW, &info->event))
934 tty_wakeup(tty);
935 if (test_and_clear_bit(MXSER_EVENT_HANGUP, &info->event))
936 tty_hangup(tty);
937 }
938}
939
940static unsigned char mxser_get_msr(int baseaddr, int mode, int port, struct mxser_struct *info)
941{
942 unsigned char status = 0;
943
944 status = inb(baseaddr + UART_MSR);
945
946 mxser_msr[port] &= 0x0F;
947 mxser_msr[port] |= status;
948 status = mxser_msr[port];
949 if (mode)
950 mxser_msr[port] = 0;
951
952 return status;
953}
954
955/*
956 * This routine is called whenever a serial port is opened. It
957 * enables interrupts for a serial port, linking in its async structure into
958 * the IRQ chain. It also performs the serial-specific
959 * initialization for the tty structure.
960 */
961static int mxser_open(struct tty_struct *tty, struct file *filp)
962{
963 struct mxser_struct *info;
964 int retval, line;
965
6f08b72c
KS		 966 /* initialize driver_data in case something fails */
967 tty->driver_data = NULL;
968
1da177e4
LT		 969 line = tty->index;
970 if (line == MXSER_PORTS)
971 return 0;
972 if (line < 0 || line > MXSER_PORTS)
973 return -ENODEV;
974 info = mxvar_table + line;
975 if (!info->base)
8ea2c2ec 976 return -ENODEV;
1da177e4
LT		 977
978 tty->driver_data = info;
979 info->tty = tty;
980 /*
981 * Start up serial port
982 */
983 retval = mxser_startup(info);
984 if (retval)
8ea2c2ec 985 return retval;
1da177e4
LT		 986
987 retval = mxser_block_til_ready(tty, filp, info);
988 if (retval)
8ea2c2ec 989 return retval;
1da177e4
LT		 990
991 info->count++;
992
993 if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
994 if (tty->driver->subtype == SERIAL_TYPE_NORMAL)
995 *tty->termios = info->normal_termios;
996 else
997 *tty->termios = info->callout_termios;
998 mxser_change_speed(info, NULL);
999 }
1000
8ea2c2ec
JJ		 1001 /*
1002 status = mxser_get_msr(info->base, 0, info->port);
1003 mxser_check_modem_status(info, status);
1004 */
1da177e4 1005
8cddd707 1006 /* unmark here for very high baud rate (ex. 921600 bps) used */
1da177e4
LT		 1007 tty->low_latency = 1;
1008 return 0;
1009}
1010
1011/*
1012 * This routine is called when the serial port gets closed. First, we
1013 * wait for the last remaining data to be sent. Then, we unlink its
1014 * async structure from the interrupt chain if necessary, and we free
1015 * that IRQ if nothing is left in the chain.
1016 */
1017static void mxser_close(struct tty_struct *tty, struct file *filp)
1018{
56e139f6 1019 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1020
1021 unsigned long timeout;
1022 unsigned long flags;
1023 struct tty_ldisc *ld;
1024
1025 if (tty->index == MXSER_PORTS)
1026 return;
1027 if (!info)
6f08b72c 1028 return;
1da177e4
LT		 1029
1030 spin_lock_irqsave(&info->slock, flags);
1031
1032 if (tty_hung_up_p(filp)) {
1033 spin_unlock_irqrestore(&info->slock, flags);
1034 return;
1035 }
1036 if ((tty->count == 1) && (info->count != 1)) {
1037 /*
1038 * Uh, oh. tty->count is 1, which means that the tty
1039 * structure will be freed. Info->count should always
1040 * be one in these conditions. If it's greater than
1041 * one, we've got real problems, since it means the
1042 * serial port won't be shutdown.
1043 */
8ea2c2ec
JJ		 1044 printk(KERN_ERR "mxser_close: bad serial port count; "
1045 "tty->count is 1, info->count is %d\n", info->count);
1da177e4
LT		 1046 info->count = 1;
1047 }
1048 if (--info->count < 0) {
8ea2c2ec
JJ		 1049 printk(KERN_ERR "mxser_close: bad serial port count for "
1050 "ttys%d: %d\n", info->port, info->count);
1da177e4
LT		 1051 info->count = 0;
1052 }
1053 if (info->count) {
1054 spin_unlock_irqrestore(&info->slock, flags);
1055 return;
1056 }
1057 info->flags |= ASYNC_CLOSING;
1058 spin_unlock_irqrestore(&info->slock, flags);
1059 /*
1060 * Save the termios structure, since this port may have
1061 * separate termios for callout and dialin.
1062 */
1063 if (info->flags & ASYNC_NORMAL_ACTIVE)
1064 info->normal_termios = *tty->termios;
1065 /*
1066 * Now we wait for the transmit buffer to clear; and we notify
1067 * the line discipline to only process XON/XOFF characters.
1068 */
1069 tty->closing = 1;
1070 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1071 tty_wait_until_sent(tty, info->closing_wait);
1072 /*
1073 * At this point we stop accepting input. To do this, we
1074 * disable the receive line status interrupts, and tell the
1075 * interrupt driver to stop checking the data ready bit in the
1076 * line status register.
1077 */
1078 info->IER &= ~UART_IER_RLSI;
1079 if (info->IsMoxaMustChipFlag)
1080 info->IER &= ~MOXA_MUST_RECV_ISR;
1081/* by William
1082 info->read_status_mask &= ~UART_LSR_DR;
1083*/
1084 if (info->flags & ASYNC_INITIALIZED) {
1085 outb(info->IER, info->base + UART_IER);
1086 /*
1087 * Before we drop DTR, make sure the UART transmitter
1088 * has completely drained; this is especially
1089 * important if there is a transmit FIFO!
1090 */
1091 timeout = jiffies + HZ;
1092 while (!(inb(info->base + UART_LSR) & UART_LSR_TEMT)) {
da4cd8df 1093 schedule_timeout_interruptible(5);
1da177e4
LT		 1094 if (time_after(jiffies, timeout))
1095 break;
1096 }
1097 }
1098 mxser_shutdown(info);
1099
1100 if (tty->driver->flush_buffer)
1101 tty->driver->flush_buffer(tty);
1102
1103 ld = tty_ldisc_ref(tty);
1104 if (ld) {
8ea2c2ec 1105 if (ld->flush_buffer)
1da177e4
LT		 1106 ld->flush_buffer(tty);
1107 tty_ldisc_deref(ld);
1108 }
1109
1110 tty->closing = 0;
1111 info->event = 0;
1112 info->tty = NULL;
1113 if (info->blocked_open) {
da4cd8df
NA		 1114 if (info->close_delay)
1115 schedule_timeout_interruptible(info->close_delay);
1da177e4
LT		 1116 wake_up_interruptible(&info->open_wait);
1117 }
1118
1119 info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
1120 wake_up_interruptible(&info->close_wait);
1121
1122}
1123
1124static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1125{
1126 int c, total = 0;
56e139f6 1127 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1128 unsigned long flags;
1129
8a7f7c93 1130 if (!info->xmit_buf)
8ea2c2ec 1131 return 0;
1da177e4
LT		 1132
1133 while (1) {
8ea2c2ec
JJ		 1134 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1135 SERIAL_XMIT_SIZE - info->xmit_head));
1da177e4
LT		 1136 if (c <= 0)
1137 break;
1138
1139 memcpy(info->xmit_buf + info->xmit_head, buf, c);
1140 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 1141 info->xmit_head = (info->xmit_head + c) &
1142 (SERIAL_XMIT_SIZE - 1);
1da177e4
LT		 1143 info->xmit_cnt += c;
1144 spin_unlock_irqrestore(&info->slock, flags);
1145
1146 buf += c;
1147 count -= c;
1148 total += c;
1da177e4
LT		 1149 }
1150
1151 if (info->xmit_cnt && !tty->stopped && !(info->IER & UART_IER_THRI)) {
8ea2c2ec
JJ		 1152 if (!tty->hw_stopped ||
1153 (info->type == PORT_16550A) ||
1154 (info->IsMoxaMustChipFlag)) {
1da177e4
LT		 1155 spin_lock_irqsave(&info->slock, flags);
1156 info->IER |= UART_IER_THRI;
1157 outb(info->IER, info->base + UART_IER);
1158 spin_unlock_irqrestore(&info->slock, flags);
1159 }
1160 }
1161 return total;
1162}
1163
1164static void mxser_put_char(struct tty_struct *tty, unsigned char ch)
1165{
56e139f6 1166 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1167 unsigned long flags;
1168
8a7f7c93 1169 if (!info->xmit_buf)
1da177e4
LT		 1170 return;
1171
1172 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1173 return;
1174
1175 spin_lock_irqsave(&info->slock, flags);
1176 info->xmit_buf[info->xmit_head++] = ch;
1177 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1178 info->xmit_cnt++;
1179 spin_unlock_irqrestore(&info->slock, flags);
1180 if (!tty->stopped && !(info->IER & UART_IER_THRI)) {
8ea2c2ec
JJ		 1181 if (!tty->hw_stopped ||
1182 (info->type == PORT_16550A) ||
1183 info->IsMoxaMustChipFlag) {
1da177e4
LT		 1184 spin_lock_irqsave(&info->slock, flags);
1185 info->IER |= UART_IER_THRI;
1186 outb(info->IER, info->base + UART_IER);
1187 spin_unlock_irqrestore(&info->slock, flags);
1188 }
1189 }
1190}
1191
1192
1193static void mxser_flush_chars(struct tty_struct *tty)
1194{
56e139f6 1195 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1196 unsigned long flags;
1197
8ea2c2ec
JJ		 1198 if (info->xmit_cnt <= 0 ||
1199 tty->stopped ||
1200 !info->xmit_buf ||
1201 (tty->hw_stopped &&
1202 (info->type != PORT_16550A) &&
1203 (!info->IsMoxaMustChipFlag)
1204 ))
1da177e4
LT		 1205 return;
1206
1207 spin_lock_irqsave(&info->slock, flags);
1208
1209 info->IER |= UART_IER_THRI;
1210 outb(info->IER, info->base + UART_IER);
1211
1212 spin_unlock_irqrestore(&info->slock, flags);
1213}
1214
1215static int mxser_write_room(struct tty_struct *tty)
1216{
56e139f6 1217 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1218 int ret;
1219
1220 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1221 if (ret < 0)
1222 ret = 0;
8ea2c2ec 1223 return ret;
1da177e4
LT		 1224}
1225
1226static int mxser_chars_in_buffer(struct tty_struct *tty)
1227{
56e139f6 1228 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1229 return info->xmit_cnt;
1230}
1231
1232static void mxser_flush_buffer(struct tty_struct *tty)
1233{
56e139f6 1234 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1235 char fcr;
1236 unsigned long flags;
1237
1238
1239 spin_lock_irqsave(&info->slock, flags);
1240 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1241
1242 /* below added by shinhay */
1243 fcr = inb(info->base + UART_FCR);
8ea2c2ec
JJ		 1244 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1245 info->base + UART_FCR);
1da177e4
LT		 1246 outb(fcr, info->base + UART_FCR);
1247
1248 spin_unlock_irqrestore(&info->slock, flags);
1249 /* above added by shinhay */
1250
b963a844 1251 tty_wakeup(tty);
1da177e4
LT		 1252}
1253
1254static int mxser_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg)
1255{
56e139f6 1256 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1257 int retval;
1258 struct async_icount cprev, cnow; /* kernel counter temps */
1259 struct serial_icounter_struct __user *p_cuser;
1260 unsigned long templ;
1261 unsigned long flags;
1262 void __user *argp = (void __user *)arg;
1263
1264 if (tty->index == MXSER_PORTS)
8ea2c2ec 1265 return mxser_ioctl_special(cmd, argp);
1da177e4 1266
8ea2c2ec 1267 /* following add by Victor Yu. 01-05-2004 */
1da177e4
LT		 1268 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1269 int opmode, p;
1270 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1271 int shiftbit;
1272 unsigned char val, mask;
1273
1274 p = info->port % 4;
1275 if (cmd == MOXA_SET_OP_MODE) {
1276 if (get_user(opmode, (int __user *) argp))
1277 return -EFAULT;
8ea2c2ec
JJ		 1278 if (opmode != RS232_MODE &&
1279 opmode != RS485_2WIRE_MODE &&
1280 opmode != RS422_MODE &&
1281 opmode != RS485_4WIRE_MODE)
1da177e4
LT		 1282 return -EFAULT;
1283 mask = ModeMask[p];
1284 shiftbit = p * 2;
1285 val = inb(info->opmode_ioaddr);
1286 val &= mask;
1287 val |= (opmode << shiftbit);
1288 outb(val, info->opmode_ioaddr);
1289 } else {
1290 shiftbit = p * 2;
1291 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1292 opmode &= OP_MODE_MASK;
1293 if (copy_to_user(argp, &opmode, sizeof(int)))
1294 return -EFAULT;
1295 }
1296 return 0;
1297 }
8ea2c2ec 1298 /* above add by Victor Yu. 01-05-2004 */
1da177e4
LT		 1299
1300 if ((cmd != TIOCGSERIAL) && (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
1301 if (tty->flags & (1 << TTY_IO_ERROR))
8ea2c2ec 1302 return -EIO;
1da177e4
LT		 1303 }
1304 switch (cmd) {
1305 case TCSBRK: /* SVID version: non-zero arg --> no break */
1306 retval = tty_check_change(tty);
1307 if (retval)
8ea2c2ec 1308 return retval;
1da177e4
LT		 1309 tty_wait_until_sent(tty, 0);
1310 if (!arg)
1311 mxser_send_break(info, HZ / 4); /* 1/4 second */
8ea2c2ec 1312 return 0;
1da177e4
LT		 1313 case TCSBRKP: /* support for POSIX tcsendbreak() */
1314 retval = tty_check_change(tty);
1315 if (retval)
8ea2c2ec 1316 return retval;
1da177e4
LT		 1317 tty_wait_until_sent(tty, 0);
1318 mxser_send_break(info, arg ? arg * (HZ / 10) : HZ / 4);
8ea2c2ec 1319 return 0;
1da177e4 1320 case TIOCGSOFTCAR:
8ea2c2ec 1321 return put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long __user *)argp);
1da177e4
LT		 1322 case TIOCSSOFTCAR:
1323 if (get_user(templ, (unsigned long __user *) argp))
1324 return -EFAULT;
1325 arg = templ;
1326 tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) | (arg ? CLOCAL : 0));
8ea2c2ec 1327 return 0;
1da177e4
LT		 1328 case TIOCGSERIAL:
1329 return mxser_get_serial_info(info, argp);
1330 case TIOCSSERIAL:
1331 return mxser_set_serial_info(info, argp);
1332 case TIOCSERGETLSR: /* Get line status register */
1333 return mxser_get_lsr_info(info, argp);
1334 /*
1335 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1336 * - mask passed in arg for lines of interest
1337 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1338 * Caller should use TIOCGICOUNT to see which one it was
1339 */
fc83815c
JS		 1340 case TIOCMIWAIT:
1341 spin_lock_irqsave(&info->slock, flags);
1342 cnow = info->icount; /* note the counters on entry */
1343 spin_unlock_irqrestore(&info->slock, flags);
1344
1345 wait_event_interruptible(info->delta_msr_wait, ({
1346 cprev = cnow;
1da177e4 1347 spin_lock_irqsave(&info->slock, flags);
fc83815c 1348 cnow = info->icount; /* atomic copy */
1da177e4
LT		 1349 spin_unlock_irqrestore(&info->slock, flags);
1350
fc83815c
JS		 1351 ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
1352 ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
1353 ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) ||
1354 ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts));
1355 }));
1356 break;
1da177e4
LT		 1357 /*
1358 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1359 * Return: write counters to the user passed counter struct
1360 * NB: both 1->0 and 0->1 transitions are counted except for
1361 * RI where only 0->1 is counted.
1362 */
1363 case TIOCGICOUNT:
1364 spin_lock_irqsave(&info->slock, flags);
1365 cnow = info->icount;
1366 spin_unlock_irqrestore(&info->slock, flags);
1367 p_cuser = argp;
1368 /* modified by casper 1/11/2000 */
1369 if (put_user(cnow.frame, &p_cuser->frame))
1370 return -EFAULT;
1371 if (put_user(cnow.brk, &p_cuser->brk))
1372 return -EFAULT;
1373 if (put_user(cnow.overrun, &p_cuser->overrun))
1374 return -EFAULT;
1375 if (put_user(cnow.buf_overrun, &p_cuser->buf_overrun))
1376 return -EFAULT;
1377 if (put_user(cnow.parity, &p_cuser->parity))
1378 return -EFAULT;
1379 if (put_user(cnow.rx, &p_cuser->rx))
1380 return -EFAULT;
1381 if (put_user(cnow.tx, &p_cuser->tx))
1382 return -EFAULT;
1383 put_user(cnow.cts, &p_cuser->cts);
1384 put_user(cnow.dsr, &p_cuser->dsr);
1385 put_user(cnow.rng, &p_cuser->rng);
1386 put_user(cnow.dcd, &p_cuser->dcd);
1da177e4
LT		 1387 return 0;
1388 case MOXA_HighSpeedOn:
8ea2c2ec
JJ		 1389 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1390 case MOXA_SDS_RSTICOUNTER: {
1da177e4
LT		 1391 info->mon_data.rxcnt = 0;
1392 info->mon_data.txcnt = 0;
1393 return 0;
1394 }
8ea2c2ec 1395/* (above) added by James. */
1da177e4
LT		 1396 case MOXA_ASPP_SETBAUD:{
1397 long baud;
8ea2c2ec 1398 if (get_user(baud, (long __user *)argp))
1da177e4
LT		 1399 return -EFAULT;
1400 mxser_set_baud(info, baud);
1401 return 0;
1402 }
1403 case MOXA_ASPP_GETBAUD:
1404 if (copy_to_user(argp, &info->realbaud, sizeof(long)))
1405 return -EFAULT;
1406
1407 return 0;
1408
1409 case MOXA_ASPP_OQUEUE:{
1410 int len, lsr;
1411
1412 len = mxser_chars_in_buffer(tty);
1413
1414 lsr = inb(info->base + UART_LSR) & UART_LSR_TEMT;
1415
1416 len += (lsr ? 0 : 1);
1417
1418 if (copy_to_user(argp, &len, sizeof(int)))
1419 return -EFAULT;
1420
1421 return 0;
1422 }
8ea2c2ec 1423 case MOXA_ASPP_MON: {
1da177e4 1424 int mcr, status;
8ea2c2ec
JJ		 1425
1426 /* info->mon_data.ser_param = tty->termios->c_cflag; */
1da177e4
LT		 1427
1428 status = mxser_get_msr(info->base, 1, info->port, info);
1429 mxser_check_modem_status(info, status);
1430
1431 mcr = inb(info->base + UART_MCR);
1432 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1433 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1434 else
1435 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1436
1437 if (mcr & MOXA_MUST_MCR_TX_XON)
1438 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1439 else
1440 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1441
1442 if (info->tty->hw_stopped)
1443 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1444 else
1445 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
1446
8ea2c2ec
JJ		 1447 if (copy_to_user(argp, &info->mon_data,
1448 sizeof(struct mxser_mon)))
1da177e4
LT		 1449 return -EFAULT;
1450
1451 return 0;
1da177e4
LT		 1452 }
1453
8ea2c2ec
JJ		 1454 case MOXA_ASPP_LSTATUS: {
1455 if (copy_to_user(argp, &info->err_shadow,
1456 sizeof(unsigned char)))
1da177e4
LT		 1457 return -EFAULT;
1458
1459 info->err_shadow = 0;
1460 return 0;
1da177e4 1461 }
8ea2c2ec 1462 case MOXA_SET_BAUD_METHOD: {
1da177e4 1463 int method;
8ea2c2ec
JJ		 1464
1465 if (get_user(method, (int __user *)argp))
1da177e4
LT		 1466 return -EFAULT;
1467 mxser_set_baud_method[info->port] = method;
1468 if (copy_to_user(argp, &method, sizeof(int)))
1469 return -EFAULT;
1470
1471 return 0;
1472 }
1473 default:
1474 return -ENOIOCTLCMD;
1475 }
1476 return 0;
1477}
1478
1479#ifndef CMSPAR
1480#define CMSPAR 010000000000
1481#endif
1482
1483static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1484{
1485 int i, result, status;
1486
1487 switch (cmd) {
1488 case MOXA_GET_CONF:
8ea2c2ec
JJ		 1489 if (copy_to_user(argp, mxsercfg,
1490 sizeof(struct mxser_hwconf) * 4))
1da177e4
LT		 1491 return -EFAULT;
1492 return 0;
1493 case MOXA_GET_MAJOR:
1494 if (copy_to_user(argp, &ttymajor, sizeof(int)))
1495 return -EFAULT;
1496 return 0;
1497
1498 case MOXA_GET_CUMAJOR:
1499 if (copy_to_user(argp, &calloutmajor, sizeof(int)))
1500 return -EFAULT;
1501 return 0;
1502
1503 case MOXA_CHKPORTENABLE:
1504 result = 0;
1505 for (i = 0; i < MXSER_PORTS; i++) {
1506 if (mxvar_table[i].base)
1507 result |= (1 << i);
1508 }
8ea2c2ec 1509 return put_user(result, (unsigned long __user *)argp);
1da177e4
LT		 1510 case MOXA_GETDATACOUNT:
1511 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
1512 return -EFAULT;
8ea2c2ec 1513 return 0;
1da177e4
LT		 1514 case MOXA_GETMSTATUS:
1515 for (i = 0; i < MXSER_PORTS; i++) {
1516 GMStatus[i].ri = 0;
1517 if (!mxvar_table[i].base) {
1518 GMStatus[i].dcd = 0;
1519 GMStatus[i].dsr = 0;
1520 GMStatus[i].cts = 0;
1521 continue;
1522 }
1523
1524 if (!mxvar_table[i].tty || !mxvar_table[i].tty->termios)
1525 GMStatus[i].cflag = mxvar_table[i].normal_termios.c_cflag;
1526 else
1527 GMStatus[i].cflag = mxvar_table[i].tty->termios->c_cflag;
1528
1529 status = inb(mxvar_table[i].base + UART_MSR);
1530 if (status & 0x80 /*UART_MSR_DCD */ )
1531 GMStatus[i].dcd = 1;
1532 else
1533 GMStatus[i].dcd = 0;
1534
1535 if (status & 0x20 /*UART_MSR_DSR */ )
1536 GMStatus[i].dsr = 1;
1537 else
1538 GMStatus[i].dsr = 0;
1539
1540
1541 if (status & 0x10 /*UART_MSR_CTS */ )
1542 GMStatus[i].cts = 1;
1543 else
1544 GMStatus[i].cts = 0;
1545 }
8ea2c2ec
JJ		 1546 if (copy_to_user(argp, GMStatus,
1547 sizeof(struct mxser_mstatus) * MXSER_PORTS))
1da177e4
LT		 1548 return -EFAULT;
1549 return 0;
8ea2c2ec 1550 case MOXA_ASPP_MON_EXT: {
1da177e4
LT		 1551 int status;
1552 int opmode, p;
1553 int shiftbit;
1554 unsigned cflag, iflag;
1555
1556 for (i = 0; i < MXSER_PORTS; i++) {
1da177e4
LT		 1557 if (!mxvar_table[i].base)
1558 continue;
1559
8ea2c2ec
JJ		 1560 status = mxser_get_msr(mxvar_table[i].base, 0,
1561 i, &(mxvar_table[i]));
1562 /*
1563 mxser_check_modem_status(&mxvar_table[i],
1564 status);
1565 */
1da177e4
LT		 1566 if (status & UART_MSR_TERI)
1567 mxvar_table[i].icount.rng++;
1568 if (status & UART_MSR_DDSR)
1569 mxvar_table[i].icount.dsr++;
1570 if (status & UART_MSR_DDCD)
1571 mxvar_table[i].icount.dcd++;
1572 if (status & UART_MSR_DCTS)
1573 mxvar_table[i].icount.cts++;
1574
1575 mxvar_table[i].mon_data.modem_status = status;
1576 mon_data_ext.rx_cnt[i] = mxvar_table[i].mon_data.rxcnt;
1577 mon_data_ext.tx_cnt[i] = mxvar_table[i].mon_data.txcnt;
1578 mon_data_ext.up_rxcnt[i] = mxvar_table[i].mon_data.up_rxcnt;
1579 mon_data_ext.up_txcnt[i] = mxvar_table[i].mon_data.up_txcnt;
1580 mon_data_ext.modem_status[i] = mxvar_table[i].mon_data.modem_status;
1581 mon_data_ext.baudrate[i] = mxvar_table[i].realbaud;
1582
1583 if (!mxvar_table[i].tty || !mxvar_table[i].tty->termios) {
1584 cflag = mxvar_table[i].normal_termios.c_cflag;
1585 iflag = mxvar_table[i].normal_termios.c_iflag;
1586 } else {
1587 cflag = mxvar_table[i].tty->termios->c_cflag;
1588 iflag = mxvar_table[i].tty->termios->c_iflag;
1589 }
1590
1591 mon_data_ext.databits[i] = cflag & CSIZE;
1592
1593 mon_data_ext.stopbits[i] = cflag & CSTOPB;
1594
1595 mon_data_ext.parity[i] = cflag & (PARENB | PARODD | CMSPAR);
1596
1597 mon_data_ext.flowctrl[i] = 0x00;
1598
1599 if (cflag & CRTSCTS)
1600 mon_data_ext.flowctrl[i] |= 0x03;
1601
1602 if (iflag & (IXON | IXOFF))
1603 mon_data_ext.flowctrl[i] |= 0x0C;
1604
1605 if (mxvar_table[i].type == PORT_16550A)
1606 mon_data_ext.fifo[i] = 1;
1607 else
1608 mon_data_ext.fifo[i] = 0;
1609
1610 p = i % 4;
1611 shiftbit = p * 2;
1612 opmode = inb(mxvar_table[i].opmode_ioaddr) >> shiftbit;
1613 opmode &= OP_MODE_MASK;
1614
1615 mon_data_ext.iftype[i] = opmode;
1616
1617 }
1618 if (copy_to_user(argp, &mon_data_ext, sizeof(struct mxser_mon_ext)))
1619 return -EFAULT;
1620
1621 return 0;
1622
1623 }
1624 default:
1625 return -ENOIOCTLCMD;
1626 }
1627 return 0;
1628}
1629
1da177e4
LT		 1630static void mxser_stoprx(struct tty_struct *tty)
1631{
56e139f6 1632 struct mxser_struct *info = tty->driver_data;
8ea2c2ec 1633 /* unsigned long flags; */
1da177e4
LT		 1634
1635 info->ldisc_stop_rx = 1;
1636 if (I_IXOFF(tty)) {
8ea2c2ec
JJ		 1637 /* MX_LOCK(&info->slock); */
1638 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1639 if (info->IsMoxaMustChipFlag) {
1640 info->IER &= ~MOXA_MUST_RECV_ISR;
1641 outb(info->IER, info->base + UART_IER);
1642 } else {
8ea2c2ec 1643 /* above add by Victor Yu. 09-02-2002 */
1da177e4 1644 info->x_char = STOP_CHAR(tty);
8ea2c2ec
JJ		 1645 /* mask by Victor Yu. 09-02-2002 */
1646 /* outb(info->IER, 0); */
1da177e4
LT		 1647 outb(0, info->base + UART_IER);
1648 info->IER |= UART_IER_THRI;
8ea2c2ec
JJ		 1649 /* force Tx interrupt */
1650 outb(info->IER, info->base + UART_IER);
1651 } /* add by Victor Yu. 09-02-2002 */
1652 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1653 }
1654
1655 if (info->tty->termios->c_cflag & CRTSCTS) {
8ea2c2ec 1656 /* MX_LOCK(&info->slock); */
1da177e4
LT		 1657 info->MCR &= ~UART_MCR_RTS;
1658 outb(info->MCR, info->base + UART_MCR);
8ea2c2ec 1659 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1660 }
1661}
1662
1663static void mxser_startrx(struct tty_struct *tty)
1664{
56e139f6 1665 struct mxser_struct *info = tty->driver_data;
8ea2c2ec 1666 /* unsigned long flags; */
1da177e4
LT		 1667
1668 info->ldisc_stop_rx = 0;
1669 if (I_IXOFF(tty)) {
1670 if (info->x_char)
1671 info->x_char = 0;
1672 else {
8ea2c2ec 1673 /* MX_LOCK(&info->slock); */
1da177e4 1674
8ea2c2ec 1675 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1676 if (info->IsMoxaMustChipFlag) {
1677 info->IER |= MOXA_MUST_RECV_ISR;
1678 outb(info->IER, info->base + UART_IER);
1679 } else {
8ea2c2ec 1680 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1681
1682 info->x_char = START_CHAR(tty);
8ea2c2ec
JJ		 1683 /* mask by Victor Yu. 09-02-2002 */
1684 /* outb(info->IER, 0); */
1685 /* add by Victor Yu. 09-02-2002 */
1686 outb(0, info->base + UART_IER);
1687 /* force Tx interrupt */
1688 info->IER |= UART_IER_THRI;
1da177e4 1689 outb(info->IER, info->base + UART_IER);
8ea2c2ec
JJ		 1690 } /* add by Victor Yu. 09-02-2002 */
1691 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1692 }
1693 }
1694
1695 if (info->tty->termios->c_cflag & CRTSCTS) {
8ea2c2ec 1696 /* MX_LOCK(&info->slock); */
1da177e4
LT		 1697 info->MCR |= UART_MCR_RTS;
1698 outb(info->MCR, info->base + UART_MCR);
8ea2c2ec 1699 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1700 }
1701}
1702
1703/*
1704 * This routine is called by the upper-layer tty layer to signal that
1705 * incoming characters should be throttled.
1706 */
1707static void mxser_throttle(struct tty_struct *tty)
1708{
8ea2c2ec
JJ		 1709 /* struct mxser_struct *info = tty->driver_data; */
1710 /* unsigned long flags; */
1711
1712 /* MX_LOCK(&info->slock); */
1da177e4 1713 mxser_stoprx(tty);
8ea2c2ec 1714 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1715}
1716
1717static void mxser_unthrottle(struct tty_struct *tty)
1718{
8ea2c2ec
JJ		 1719 /* struct mxser_struct *info = tty->driver_data; */
1720 /* unsigned long flags; */
1721
1722 /* MX_LOCK(&info->slock); */
1da177e4 1723 mxser_startrx(tty);
8ea2c2ec 1724 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1725}
1726
606d099c 1727static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1da177e4 1728{
56e139f6 1729 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1730 unsigned long flags;
1731
8ea2c2ec
JJ		 1732 if ((tty->termios->c_cflag != old_termios->c_cflag) ||
1733 (RELEVANT_IFLAG(tty->termios->c_iflag) != RELEVANT_IFLAG(old_termios->c_iflag))) {
1da177e4
LT		 1734
1735 mxser_change_speed(info, old_termios);
1736
8ea2c2ec
JJ		 1737 if ((old_termios->c_cflag & CRTSCTS) &&
1738 !(tty->termios->c_cflag & CRTSCTS)) {
1da177e4
LT		 1739 tty->hw_stopped = 0;
1740 mxser_start(tty);
1741 }
1742 }
1743
1744/* Handle sw stopped */
8ea2c2ec
JJ		 1745 if ((old_termios->c_iflag & IXON) &&
1746 !(tty->termios->c_iflag & IXON)) {
1da177e4
LT		 1747 tty->stopped = 0;
1748
8ea2c2ec 1749 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1750 if (info->IsMoxaMustChipFlag) {
1751 spin_lock_irqsave(&info->slock, flags);
1752 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
1753 spin_unlock_irqrestore(&info->slock, flags);
1754 }
8ea2c2ec 1755 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1756
1757 mxser_start(tty);
1758 }
1759}
1760
1761/*
1762 * mxser_stop() and mxser_start()
1763 *
1764 * This routines are called before setting or resetting tty->stopped.
1765 * They enable or disable transmitter interrupts, as necessary.
1766 */
1767static void mxser_stop(struct tty_struct *tty)
1768{
56e139f6 1769 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1770 unsigned long flags;
1771
1772 spin_lock_irqsave(&info->slock, flags);
1773 if (info->IER & UART_IER_THRI) {
1774 info->IER &= ~UART_IER_THRI;
1775 outb(info->IER, info->base + UART_IER);
1776 }
1777 spin_unlock_irqrestore(&info->slock, flags);
1778}
1779
1780static void mxser_start(struct tty_struct *tty)
1781{
56e139f6 1782 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1783 unsigned long flags;
1784
1785 spin_lock_irqsave(&info->slock, flags);
1786 if (info->xmit_cnt && info->xmit_buf && !(info->IER & UART_IER_THRI)) {
1787 info->IER |= UART_IER_THRI;
1788 outb(info->IER, info->base + UART_IER);
1789 }
1790 spin_unlock_irqrestore(&info->slock, flags);
1791}
1792
1793/*
1794 * mxser_wait_until_sent() --- wait until the transmitter is empty
1795 */
1796static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
1797{
56e139f6 1798 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1799 unsigned long orig_jiffies, char_time;
1800 int lsr;
1801
1802 if (info->type == PORT_UNKNOWN)
1803 return;
1804
1805 if (info->xmit_fifo_size == 0)
1806 return; /* Just in case.... */
1807
1808 orig_jiffies = jiffies;
1809 /*
1810 * Set the check interval to be 1/5 of the estimated time to
1811 * send a single character, and make it at least 1. The check
1812 * interval should also be less than the timeout.
1813 *
1814 * Note: we have to use pretty tight timings here to satisfy
1815 * the NIST-PCTS.
1816 */
1817 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
1818 char_time = char_time / 5;
1819 if (char_time == 0)
1820 char_time = 1;
1821 if (timeout && timeout < char_time)
1822 char_time = timeout;
1823 /*
1824 * If the transmitter hasn't cleared in twice the approximate
1825 * amount of time to send the entire FIFO, it probably won't
1826 * ever clear. This assumes the UART isn't doing flow
1827 * control, which is currently the case. Hence, if it ever
1828 * takes longer than info->timeout, this is probably due to a
1829 * UART bug of some kind. So, we clamp the timeout parameter at
1830 * 2*info->timeout.
1831 */
1832 if (!timeout || timeout > 2 * info->timeout)
1833 timeout = 2 * info->timeout;
1834#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
8ea2c2ec
JJ		 1835 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
1836 timeout, char_time);
1da177e4
LT		 1837 printk("jiff=%lu...", jiffies);
1838#endif
1839 while (!((lsr = inb(info->base + UART_LSR)) & UART_LSR_TEMT)) {
1840#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1841 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
1842#endif
da4cd8df 1843 schedule_timeout_interruptible(char_time);
1da177e4
LT		 1844 if (signal_pending(current))
1845 break;
1846 if (timeout && time_after(jiffies, orig_jiffies + timeout))
1847 break;
1848 }
1849 set_current_state(TASK_RUNNING);
1850
1851#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1852 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
1853#endif
1854}
1855
1856
1857/*
1858 * This routine is called by tty_hangup() when a hangup is signaled.
1859 */
1860void mxser_hangup(struct tty_struct *tty)
1861{
56e139f6 1862 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1863
1864 mxser_flush_buffer(tty);
1865 mxser_shutdown(info);
1866 info->event = 0;
1867 info->count = 0;
1868 info->flags &= ~ASYNC_NORMAL_ACTIVE;
1869 info->tty = NULL;
1870 wake_up_interruptible(&info->open_wait);
1871}
1872
1873
8ea2c2ec 1874/* added by James 03-12-2004. */
1da177e4
LT		 1875/*
1876 * mxser_rs_break() --- routine which turns the break handling on or off
1877 */
1878static void mxser_rs_break(struct tty_struct *tty, int break_state)
1879{
56e139f6 1880 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1881 unsigned long flags;
1882
1883 spin_lock_irqsave(&info->slock, flags);
1884 if (break_state == -1)
8ea2c2ec
JJ		 1885 outb(inb(info->base + UART_LCR) | UART_LCR_SBC,
1886 info->base + UART_LCR);
1da177e4 1887 else
8ea2c2ec
JJ		 1888 outb(inb(info->base + UART_LCR) & ~UART_LCR_SBC,
1889 info->base + UART_LCR);
1da177e4
LT		 1890 spin_unlock_irqrestore(&info->slock, flags);
1891}
1892
8ea2c2ec 1893/* (above) added by James. */
1da177e4
LT		 1894
1895
1896/*
1897 * This is the serial driver's generic interrupt routine
1898 */
7d12e780 1899static irqreturn_t mxser_interrupt(int irq, void *dev_id)
1da177e4
LT		 1900{
1901 int status, iir, i;
1902 struct mxser_struct *info;
1903 struct mxser_struct *port;
1904 int max, irqbits, bits, msr;
1905 int pass_counter = 0;
1906 int handled = IRQ_NONE;
1907
1908 port = NULL;
8ea2c2ec 1909 /* spin_lock(&gm_lock); */
1da177e4
LT		 1910
1911 for (i = 0; i < MXSER_BOARDS; i++) {
1912 if (dev_id == &(mxvar_table[i * MXSER_PORTS_PER_BOARD])) {
1913 port = dev_id;
1914 break;
1915 }
1916 }
1917
8ea2c2ec 1918 if (i == MXSER_BOARDS)
1da177e4 1919 goto irq_stop;
8ea2c2ec 1920 if (port == 0)
1da177e4 1921 goto irq_stop;
1da177e4
LT		 1922 max = mxser_numports[mxsercfg[i].board_type - 1];
1923 while (1) {
1924 irqbits = inb(port->vector) & port->vectormask;
8ea2c2ec 1925 if (irqbits == port->vectormask)
1da177e4 1926 break;
1da177e4
LT		 1927
1928 handled = IRQ_HANDLED;
1929 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
8ea2c2ec 1930 if (irqbits == port->vectormask)
1da177e4 1931 break;
1da177e4
LT		 1932 if (bits & irqbits)
1933 continue;
1934 info = port + i;
1935
8ea2c2ec 1936 /* following add by Victor Yu. 09-13-2002 */
1da177e4
LT		 1937 iir = inb(info->base + UART_IIR);
1938 if (iir & UART_IIR_NO_INT)
1939 continue;
1940 iir &= MOXA_MUST_IIR_MASK;
1941 if (!info->tty) {
1942 status = inb(info->base + UART_LSR);
1943 outb(0x27, info->base + UART_FCR);
1944 inb(info->base + UART_MSR);
1945 continue;
1946 }
8ea2c2ec 1947 /* above add by Victor Yu. 09-13-2002 */
1da177e4 1948 /*
8ea2c2ec 1949 if (info->tty->flip.count < TTY_FLIPBUF_SIZE / 4) {
1da177e4
LT		 1950 info->IER |= MOXA_MUST_RECV_ISR;
1951 outb(info->IER, info->base + UART_IER);
1952 }
1953 */
1954
1955
1956 /* mask by Victor Yu. 09-13-2002
1957 if ( !info->tty ||
1958 (inb(info->base + UART_IIR) & UART_IIR_NO_INT) )
1959 continue;
1960 */
1961 /* mask by Victor Yu. 09-02-2002
1962 status = inb(info->base + UART_LSR) & info->read_status_mask;
1963 */
1964
8ea2c2ec 1965 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1966 status = inb(info->base + UART_LSR);
1967
8ea2c2ec 1968 if (status & UART_LSR_PE)
1da177e4 1969 info->err_shadow |= NPPI_NOTIFY_PARITY;
8ea2c2ec 1970 if (status & UART_LSR_FE)
1da177e4 1971 info->err_shadow |= NPPI_NOTIFY_FRAMING;
8ea2c2ec 1972 if (status & UART_LSR_OE)
1da177e4 1973 info->err_shadow |= NPPI_NOTIFY_HW_OVERRUN;
1da177e4
LT		 1974 if (status & UART_LSR_BI)
1975 info->err_shadow |= NPPI_NOTIFY_BREAK;
1976
1977 if (info->IsMoxaMustChipFlag) {
1978 /*
1979 if ( (status & 0x02) && !(status & 0x01) ) {
1980 outb(info->base+UART_FCR, 0x23);
1981 continue;
1982 }
1983 */
8ea2c2ec
JJ		 1984 if (iir == MOXA_MUST_IIR_GDA ||
1985 iir == MOXA_MUST_IIR_RDA ||
1986 iir == MOXA_MUST_IIR_RTO ||
1987 iir == MOXA_MUST_IIR_LSR)
1da177e4
LT		 1988 mxser_receive_chars(info, &status);
1989
1990 } else {
8ea2c2ec 1991 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1992
1993 status &= info->read_status_mask;
1994 if (status & UART_LSR_DR)
1995 mxser_receive_chars(info, &status);
1996 }
1997 msr = inb(info->base + UART_MSR);
1998 if (msr & UART_MSR_ANY_DELTA) {
1999 mxser_check_modem_status(info, msr);
2000 }
8ea2c2ec 2001 /* following add by Victor Yu. 09-13-2002 */
1da177e4
LT		 2002 if (info->IsMoxaMustChipFlag) {
2003 if ((iir == 0x02) && (status & UART_LSR_THRE)) {
2004 mxser_transmit_chars(info);
2005 }
2006 } else {
8ea2c2ec 2007 /* above add by Victor Yu. 09-13-2002 */
1da177e4
LT		 2008
2009 if (status & UART_LSR_THRE) {
2010/* 8-2-99 by William
2011 if ( info->x_char || (info->xmit_cnt > 0) )
2012*/
2013 mxser_transmit_chars(info);
2014 }
2015 }
2016 }
2017 if (pass_counter++ > MXSER_ISR_PASS_LIMIT) {
2018 break; /* Prevent infinite loops */
2019 }
2020 }
2021
2022 irq_stop:
8ea2c2ec 2023 /* spin_unlock(&gm_lock); */
1da177e4
LT		 2024 return handled;
2025}
2026
2027static void mxser_receive_chars(struct mxser_struct *info, int *status)
2028{
2029 struct tty_struct *tty = info->tty;
2030 unsigned char ch, gdl;
2031 int ignored = 0;
2032 int cnt = 0;
1da177e4
LT		 2033 int recv_room;
2034 int max = 256;
2035 unsigned long flags;
2036
2037 spin_lock_irqsave(&info->slock, flags);
2038
33f0f88f 2039 recv_room = tty->receive_room;
1da177e4 2040 if ((recv_room == 0) && (!info->ldisc_stop_rx)) {
8ea2c2ec 2041 /* mxser_throttle(tty); */
1da177e4 2042 mxser_stoprx(tty);
8ea2c2ec 2043 /* return; */
1da177e4
LT		 2044 }
2045
8ea2c2ec 2046 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2047 if (info->IsMoxaMustChipFlag != MOXA_OTHER_UART) {
2048
2049 if (*status & UART_LSR_SPECIAL) {
2050 goto intr_old;
2051 }
8ea2c2ec
JJ		 2052 /* following add by Victor Yu. 02-11-2004 */
2053 if (info->IsMoxaMustChipFlag == MOXA_MUST_MU860_HWID &&
2054 (*status & MOXA_MUST_LSR_RERR))
1da177e4 2055 goto intr_old;
8ea2c2ec 2056 /* above add by Victor Yu. 02-14-2004 */
1da177e4
LT		 2057 if (*status & MOXA_MUST_LSR_RERR)
2058 goto intr_old;
2059
2060 gdl = inb(info->base + MOXA_MUST_GDL_REGISTER);
2061
8ea2c2ec
JJ		 2062 /* add by Victor Yu. 02-11-2004 */
2063 if (info->IsMoxaMustChipFlag == MOXA_MUST_MU150_HWID)
1da177e4
LT		 2064 gdl &= MOXA_MUST_GDL_MASK;
2065 if (gdl >= recv_room) {
2066 if (!info->ldisc_stop_rx) {
8ea2c2ec 2067 /* mxser_throttle(tty); */
1da177e4
LT		 2068 mxser_stoprx(tty);
2069 }
8ea2c2ec 2070 /* return; */
1da177e4
LT		 2071 }
2072 while (gdl--) {
2073 ch = inb(info->base + UART_RX);
3399ba5b 2074 tty_insert_flip_char(tty, ch, 0);
1da177e4
LT		 2075 cnt++;
2076 /*
8ea2c2ec 2077 if ((cnt >= HI_WATER) && (info->stop_rx == 0)) {
1da177e4 2078 mxser_stoprx(tty);
8ea2c2ec 2079 info->stop_rx = 1;
1da177e4
LT		 2080 break;
2081 } */
2082 }
2083 goto end_intr;
2084 }
8ea2c2ec
JJ		 2085 intr_old:
2086 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2087
2088 do {
2089 if (max-- < 0)
2090 break;
2091 /*
8ea2c2ec 2092 if ((cnt >= HI_WATER) && (info->stop_rx == 0)) {
1da177e4
LT		 2093 mxser_stoprx(tty);
2094 info->stop_rx=1;
2095 break;
2096 }
2097 */
2098
2099 ch = inb(info->base + UART_RX);
8ea2c2ec 2100 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2101 if (info->IsMoxaMustChipFlag && (*status & UART_LSR_OE) /*&& !(*status&UART_LSR_DR) */ )
2102 outb(0x23, info->base + UART_FCR);
2103 *status &= info->read_status_mask;
8ea2c2ec 2104 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2105 if (*status & info->ignore_status_mask) {
2106 if (++ignored > 100)
2107 break;
2108 } else {
3399ba5b 2109 char flag = 0;
1da177e4
LT		 2110 if (*status & UART_LSR_SPECIAL) {
2111 if (*status & UART_LSR_BI) {
3399ba5b 2112 flag = TTY_BREAK;
1da177e4
LT		 2113/* added by casper 1/11/2000 */
2114 info->icount.brk++;
1da177e4
LT		 2115/* */
2116 if (info->flags & ASYNC_SAK)
2117 do_SAK(tty);
2118 } else if (*status & UART_LSR_PE) {
3399ba5b 2119 flag = TTY_PARITY;
1da177e4
LT		 2120/* added by casper 1/11/2000 */
2121 info->icount.parity++;
2122/* */
2123 } else if (*status & UART_LSR_FE) {
3399ba5b 2124 flag = TTY_FRAME;
1da177e4
LT		 2125/* added by casper 1/11/2000 */
2126 info->icount.frame++;
2127/* */
2128 } else if (*status & UART_LSR_OE) {
3399ba5b 2129 flag = TTY_OVERRUN;
1da177e4
LT		 2130/* added by casper 1/11/2000 */
2131 info->icount.overrun++;
2132/* */
3399ba5b
DV		 2133 }
2134 }
2135 tty_insert_flip_char(tty, ch, flag);
1da177e4
LT		 2136 cnt++;
2137 if (cnt >= recv_room) {
2138 if (!info->ldisc_stop_rx) {
8ea2c2ec 2139 /* mxser_throttle(tty); */
1da177e4
LT		 2140 mxser_stoprx(tty);
2141 }
2142 break;
2143 }
2144
2145 }
2146
8ea2c2ec 2147 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2148 if (info->IsMoxaMustChipFlag)
2149 break;
8ea2c2ec 2150 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2151
2152 /* mask by Victor Yu. 09-02-2002
2153 *status = inb(info->base + UART_LSR) & info->read_status_mask;
2154 */
8ea2c2ec 2155 /* following add by Victor Yu. 09-02-2002 */
1da177e4 2156 *status = inb(info->base + UART_LSR);
8ea2c2ec 2157 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2158 } while (*status & UART_LSR_DR);
2159
8ea2c2ec 2160end_intr: /* add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2161 mxvar_log.rxcnt[info->port] += cnt;
2162 info->mon_data.rxcnt += cnt;
2163 info->mon_data.up_rxcnt += cnt;
2164 spin_unlock_irqrestore(&info->slock, flags);
3399ba5b 2165
1da177e4
LT		 2166 tty_flip_buffer_push(tty);
2167}
2168
2169static void mxser_transmit_chars(struct mxser_struct *info)
2170{
2171 int count, cnt;
2172 unsigned long flags;
2173
2174 spin_lock_irqsave(&info->slock, flags);
2175
2176 if (info->x_char) {
2177 outb(info->x_char, info->base + UART_TX);
2178 info->x_char = 0;
2179 mxvar_log.txcnt[info->port]++;
2180 info->mon_data.txcnt++;
2181 info->mon_data.up_txcnt++;
2182
2183/* added by casper 1/11/2000 */
2184 info->icount.tx++;
2185/* */
2186 spin_unlock_irqrestore(&info->slock, flags);
2187 return;
2188 }
2189
2190 if (info->xmit_buf == 0) {
2191 spin_unlock_irqrestore(&info->slock, flags);
2192 return;
2193 }
2194
8ea2c2ec
JJ		 2195 if ((info->xmit_cnt <= 0) || info->tty->stopped ||
2196 (info->tty->hw_stopped &&
2197 (info->type != PORT_16550A) &&
2198 (!info->IsMoxaMustChipFlag))) {
1da177e4
LT		 2199 info->IER &= ~UART_IER_THRI;
2200 outb(info->IER, info->base + UART_IER);
2201 spin_unlock_irqrestore(&info->slock, flags);
2202 return;
2203 }
2204
2205 cnt = info->xmit_cnt;
2206 count = info->xmit_fifo_size;
2207 do {
8ea2c2ec
JJ		 2208 outb(info->xmit_buf[info->xmit_tail++],
2209 info->base + UART_TX);
1da177e4
LT		 2210 info->xmit_tail = info->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2211 if (--info->xmit_cnt <= 0)
2212 break;
2213 } while (--count > 0);
2214 mxvar_log.txcnt[info->port] += (cnt - info->xmit_cnt);
2215
8ea2c2ec 2216/* added by James 03-12-2004. */
1da177e4
LT		 2217 info->mon_data.txcnt += (cnt - info->xmit_cnt);
2218 info->mon_data.up_txcnt += (cnt - info->xmit_cnt);
8ea2c2ec 2219/* (above) added by James. */
1da177e4
LT		 2220
2221/* added by casper 1/11/2000 */
2222 info->icount.tx += (cnt - info->xmit_cnt);
2223/* */
2224
2225 if (info->xmit_cnt < WAKEUP_CHARS) {
2226 set_bit(MXSER_EVENT_TXLOW, &info->event);
2227 schedule_work(&info->tqueue);
2228 }
2229 if (info->xmit_cnt <= 0) {
2230 info->IER &= ~UART_IER_THRI;
2231 outb(info->IER, info->base + UART_IER);
2232 }
2233 spin_unlock_irqrestore(&info->slock, flags);
2234}
2235
2236static void mxser_check_modem_status(struct mxser_struct *info, int status)
2237{
2238 /* update input line counters */
2239 if (status & UART_MSR_TERI)
2240 info->icount.rng++;
2241 if (status & UART_MSR_DDSR)
2242 info->icount.dsr++;
2243 if (status & UART_MSR_DDCD)
2244 info->icount.dcd++;
2245 if (status & UART_MSR_DCTS)
2246 info->icount.cts++;
2247 info->mon_data.modem_status = status;
2248 wake_up_interruptible(&info->delta_msr_wait);
2249
1da177e4
LT		 2250 if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
2251 if (status & UART_MSR_DCD)
2252 wake_up_interruptible(&info->open_wait);
2253 schedule_work(&info->tqueue);
2254 }
2255
2256 if (info->flags & ASYNC_CTS_FLOW) {
2257 if (info->tty->hw_stopped) {
2258 if (status & UART_MSR_CTS) {
2259 info->tty->hw_stopped = 0;
2260
8ea2c2ec
JJ		 2261 if ((info->type != PORT_16550A) &&
2262 (!info->IsMoxaMustChipFlag)) {
1da177e4
LT		 2263 info->IER |= UART_IER_THRI;
2264 outb(info->IER, info->base + UART_IER);
2265 }
2266 set_bit(MXSER_EVENT_TXLOW, &info->event);
2267 schedule_work(&info->tqueue); }
2268 } else {
2269 if (!(status & UART_MSR_CTS)) {
2270 info->tty->hw_stopped = 1;
8ea2c2ec
JJ		 2271 if ((info->type != PORT_16550A) &&
2272 (!info->IsMoxaMustChipFlag)) {
1da177e4
LT		 2273 info->IER &= ~UART_IER_THRI;
2274 outb(info->IER, info->base + UART_IER);
2275 }
2276 }
2277 }
2278 }
2279}
2280
2281static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp, struct mxser_struct *info)
2282{
2283 DECLARE_WAITQUEUE(wait, current);
2284 int retval;
2285 int do_clocal = 0;
2286 unsigned long flags;
2287
2288 /*
2289 * If non-blocking mode is set, or the port is not enabled,
2290 * then make the check up front and then exit.
2291 */
2292 if ((filp->f_flags & O_NONBLOCK) || (tty->flags & (1 << TTY_IO_ERROR))) {
2293 info->flags |= ASYNC_NORMAL_ACTIVE;
8ea2c2ec 2294 return 0;
1da177e4
LT		 2295 }
2296
2297 if (tty->termios->c_cflag & CLOCAL)
2298 do_clocal = 1;
2299
2300 /*
2301 * Block waiting for the carrier detect and the line to become
2302 * free (i.e., not in use by the callout). While we are in
2303 * this loop, info->count is dropped by one, so that
2304 * mxser_close() knows when to free things. We restore it upon
2305 * exit, either normal or abnormal.
2306 */
2307 retval = 0;
2308 add_wait_queue(&info->open_wait, &wait);
2309
2310 spin_lock_irqsave(&info->slock, flags);
2311 if (!tty_hung_up_p(filp))
2312 info->count--;
2313 spin_unlock_irqrestore(&info->slock, flags);
2314 info->blocked_open++;
2315 while (1) {
2316 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 2317 outb(inb(info->base + UART_MCR) |
2318 UART_MCR_DTR | UART_MCR_RTS, info->base + UART_MCR);
1da177e4
LT		 2319 spin_unlock_irqrestore(&info->slock, flags);
2320 set_current_state(TASK_INTERRUPTIBLE);
2321 if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)) {
2322 if (info->flags & ASYNC_HUP_NOTIFY)
2323 retval = -EAGAIN;
2324 else
2325 retval = -ERESTARTSYS;
2326 break;
2327 }
8ea2c2ec
JJ		 2328 if (!(info->flags & ASYNC_CLOSING) &&
2329 (do_clocal ||
2330 (inb(info->base + UART_MSR) & UART_MSR_DCD)))
1da177e4
LT		 2331 break;
2332 if (signal_pending(current)) {
2333 retval = -ERESTARTSYS;
2334 break;
2335 }
2336 schedule();
2337 }
2338 set_current_state(TASK_RUNNING);
2339 remove_wait_queue(&info->open_wait, &wait);
2340 if (!tty_hung_up_p(filp))
2341 info->count++;
2342 info->blocked_open--;
2343 if (retval)
8ea2c2ec 2344 return retval;
1da177e4 2345 info->flags |= ASYNC_NORMAL_ACTIVE;
8ea2c2ec 2346 return 0;
1da177e4
LT		 2347}
2348
2349static int mxser_startup(struct mxser_struct *info)
2350{
1da177e4
LT		 2351 unsigned long page;
2352 unsigned long flags;
2353
2354 page = __get_free_page(GFP_KERNEL);
2355 if (!page)
8ea2c2ec 2356 return -ENOMEM;
1da177e4
LT		 2357
2358 spin_lock_irqsave(&info->slock, flags);
2359
2360 if (info->flags & ASYNC_INITIALIZED) {
2361 free_page(page);
2362 spin_unlock_irqrestore(&info->slock, flags);
8ea2c2ec 2363 return 0;
1da177e4
LT		 2364 }
2365
2366 if (!info->base || !info->type) {
2367 if (info->tty)
2368 set_bit(TTY_IO_ERROR, &info->tty->flags);
2369 free_page(page);
2370 spin_unlock_irqrestore(&info->slock, flags);
8ea2c2ec 2371 return 0;
1da177e4
LT		 2372 }
2373 if (info->xmit_buf)
2374 free_page(page);
2375 else
2376 info->xmit_buf = (unsigned char *) page;
2377
2378 /*
2379 * Clear the FIFO buffers and disable them
2380 * (they will be reenabled in mxser_change_speed())
2381 */
2382 if (info->IsMoxaMustChipFlag)
8ea2c2ec
JJ		 2383 outb((UART_FCR_CLEAR_RCVR |
2384 UART_FCR_CLEAR_XMIT |
2385 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->base + UART_FCR);
1da177e4 2386 else
8ea2c2ec
JJ		 2387 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
2388 info->base + UART_FCR);
1da177e4
LT		 2389
2390 /*
2391 * At this point there's no way the LSR could still be 0xFF;
2392 * if it is, then bail out, because there's likely no UART
2393 * here.
2394 */
2395 if (inb(info->base + UART_LSR) == 0xff) {
2396 spin_unlock_irqrestore(&info->slock, flags);
2397 if (capable(CAP_SYS_ADMIN)) {
2398 if (info->tty)
2399 set_bit(TTY_IO_ERROR, &info->tty->flags);
8ea2c2ec 2400 return 0;
1da177e4 2401 } else
8ea2c2ec 2402 return -ENODEV;
1da177e4
LT		 2403 }
2404
2405 /*
2406 * Clear the interrupt registers.
2407 */
2408 (void) inb(info->base + UART_LSR);
2409 (void) inb(info->base + UART_RX);
2410 (void) inb(info->base + UART_IIR);
2411 (void) inb(info->base + UART_MSR);
2412
2413 /*
2414 * Now, initialize the UART
2415 */
2416 outb(UART_LCR_WLEN8, info->base + UART_LCR); /* reset DLAB */
2417 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
2418 outb(info->MCR, info->base + UART_MCR);
2419
2420 /*
2421 * Finally, enable interrupts
2422 */
2423 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
8ea2c2ec 2424 /* info->IER = UART_IER_RLSI | UART_IER_RDI; */
1da177e4 2425
8ea2c2ec 2426 /* following add by Victor Yu. 08-30-2002 */
1da177e4
LT		 2427 if (info->IsMoxaMustChipFlag)
2428 info->IER |= MOXA_MUST_IER_EGDAI;
8ea2c2ec 2429 /* above add by Victor Yu. 08-30-2002 */
1da177e4
LT		 2430 outb(info->IER, info->base + UART_IER); /* enable interrupts */
2431
2432 /*
2433 * And clear the interrupt registers again for luck.
2434 */
2435 (void) inb(info->base + UART_LSR);
2436 (void) inb(info->base + UART_RX);
2437 (void) inb(info->base + UART_IIR);
2438 (void) inb(info->base + UART_MSR);
2439
2440 if (info->tty)
2441 clear_bit(TTY_IO_ERROR, &info->tty->flags);
2442 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
2443
2444 /*
2445 * and set the speed of the serial port
2446 */
2447 spin_unlock_irqrestore(&info->slock, flags);
2448 mxser_change_speed(info, NULL);
2449
2450 info->flags |= ASYNC_INITIALIZED;
8ea2c2ec 2451 return 0;
1da177e4
LT		 2452}
2453
2454/*
2455 * This routine will shutdown a serial port; interrupts maybe disabled, and
2456 * DTR is dropped if the hangup on close termio flag is on.
2457 */
2458static void mxser_shutdown(struct mxser_struct *info)
2459{
2460 unsigned long flags;
2461
2462 if (!(info->flags & ASYNC_INITIALIZED))
2463 return;
2464
2465 spin_lock_irqsave(&info->slock, flags);
2466
2467 /*
2468 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
2469 * here so the queue might never be waken up
2470 */
2471 wake_up_interruptible(&info->delta_msr_wait);
2472
2473 /*
2474 * Free the IRQ, if necessary
2475 */
2476 if (info->xmit_buf) {
2477 free_page((unsigned long) info->xmit_buf);
2478 info->xmit_buf = NULL;
2479 }
2480
2481 info->IER = 0;
2482 outb(0x00, info->base + UART_IER);
2483
2484 if (!info->tty || (info->tty->termios->c_cflag & HUPCL))
2485 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
2486 outb(info->MCR, info->base + UART_MCR);
2487
2488 /* clear Rx/Tx FIFO's */
8ea2c2ec 2489 /* following add by Victor Yu. 08-30-2002 */
1da177e4 2490 if (info->IsMoxaMustChipFlag)
8ea2c2ec
JJ		 2491 outb((UART_FCR_CLEAR_RCVR |
2492 UART_FCR_CLEAR_XMIT |
2493 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->base + UART_FCR);
1da177e4 2494 else
8ea2c2ec
JJ		 2495 /* above add by Victor Yu. 08-30-2002 */
2496 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
2497 info->base + UART_FCR);
1da177e4
LT		 2498
2499 /* read data port to reset things */
2500 (void) inb(info->base + UART_RX);
2501
2502 if (info->tty)
2503 set_bit(TTY_IO_ERROR, &info->tty->flags);
2504
2505 info->flags &= ~ASYNC_INITIALIZED;
2506
8ea2c2ec
JJ		 2507 /* following add by Victor Yu. 09-23-2002 */
2508 if (info->IsMoxaMustChipFlag)
1da177e4 2509 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->base);
8ea2c2ec 2510 /* above add by Victor Yu. 09-23-2002 */
1da177e4
LT		 2511
2512 spin_unlock_irqrestore(&info->slock, flags);
2513}
2514
2515/*
2516 * This routine is called to set the UART divisor registers to match
2517 * the specified baud rate for a serial port.
2518 */
606d099c 2519static int mxser_change_speed(struct mxser_struct *info, struct ktermios *old_termios)
1da177e4
LT		 2520{
2521 unsigned cflag, cval, fcr;
2522 int ret = 0;
2523 unsigned char status;
2524 long baud;
2525 unsigned long flags;
2526
1da177e4
LT		 2527 if (!info->tty || !info->tty->termios)
2528 return ret;
2529 cflag = info->tty->termios->c_cflag;
2530 if (!(info->base))
2531 return ret;
2532
1da177e4
LT		 2533#ifndef B921600
2534#define B921600 (B460800 +1)
2535#endif
2536 if (mxser_set_baud_method[info->port] == 0) {
c7bce309 2537 baud = tty_get_baud_rate(info->tty);
1da177e4
LT		 2538 mxser_set_baud(info, baud);
2539 }
2540
2541 /* byte size and parity */
2542 switch (cflag & CSIZE) {
2543 case CS5:
2544 cval = 0x00;
2545 break;
2546 case CS6:
2547 cval = 0x01;
2548 break;
2549 case CS7:
2550 cval = 0x02;
2551 break;
2552 case CS8:
2553 cval = 0x03;
2554 break;
2555 default:
2556 cval = 0x00;
2557 break; /* too keep GCC shut... */
2558 }
2559 if (cflag & CSTOPB)
2560 cval |= 0x04;
2561 if (cflag & PARENB)
2562 cval |= UART_LCR_PARITY;
8ea2c2ec 2563 if (!(cflag & PARODD))
1da177e4 2564 cval |= UART_LCR_EPAR;
1da177e4
LT		 2565 if (cflag & CMSPAR)
2566 cval |= UART_LCR_SPAR;
2567
2568 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
2569 if (info->IsMoxaMustChipFlag) {
2570 fcr = UART_FCR_ENABLE_FIFO;
2571 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
2572 SET_MOXA_MUST_FIFO_VALUE(info);
2573 } else
2574 fcr = 0;
2575 } else {
2576 fcr = UART_FCR_ENABLE_FIFO;
8ea2c2ec 2577 /* following add by Victor Yu. 08-30-2002 */
1da177e4
LT		 2578 if (info->IsMoxaMustChipFlag) {
2579 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
2580 SET_MOXA_MUST_FIFO_VALUE(info);
2581 } else {
8ea2c2ec 2582 /* above add by Victor Yu. 08-30-2002 */
1da177e4
LT		 2583 switch (info->rx_trigger) {
2584 case 1:
2585 fcr |= UART_FCR_TRIGGER_1;
2586 break;
2587 case 4:
2588 fcr |= UART_FCR_TRIGGER_4;
2589 break;
2590 case 8:
2591 fcr |= UART_FCR_TRIGGER_8;
2592 break;
2593 default:
2594 fcr |= UART_FCR_TRIGGER_14;
2595 break;
2596 }
2597 }
2598 }
2599
2600 /* CTS flow control flag and modem status interrupts */
2601 info->IER &= ~UART_IER_MSI;
2602 info->MCR &= ~UART_MCR_AFE;
2603 if (cflag & CRTSCTS) {
2604 info->flags |= ASYNC_CTS_FLOW;
2605 info->IER |= UART_IER_MSI;
2606 if ((info->type == PORT_16550A) || (info->IsMoxaMustChipFlag)) {
2607 info->MCR |= UART_MCR_AFE;
8ea2c2ec
JJ		 2608 /* status = mxser_get_msr(info->base, 0, info->port); */
2609/*
2610 save_flags(flags);
1da177e4
LT		 2611 cli();
2612 status = inb(baseaddr + UART_MSR);
8ea2c2ec
JJ		 2613 restore_flags(flags);
2614*/
2615 /* mxser_check_modem_status(info, status); */
1da177e4 2616 } else {
8ea2c2ec
JJ		 2617 /* status = mxser_get_msr(info->base, 0, info->port); */
2618 /* MX_LOCK(&info->slock); */
1da177e4 2619 status = inb(info->base + UART_MSR);
8ea2c2ec 2620 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 2621 if (info->tty->hw_stopped) {
2622 if (status & UART_MSR_CTS) {
2623 info->tty->hw_stopped = 0;
8ea2c2ec
JJ		 2624 if ((info->type != PORT_16550A) &&
2625 (!info->IsMoxaMustChipFlag)) {
1da177e4
LT		 2626 info->IER |= UART_IER_THRI;
2627 outb(info->IER, info->base + UART_IER);
2628 }
2629 set_bit(MXSER_EVENT_TXLOW, &info->event);
2630 schedule_work(&info->tqueue); }
2631 } else {
2632 if (!(status & UART_MSR_CTS)) {
2633 info->tty->hw_stopped = 1;
8ea2c2ec
JJ		 2634 if ((info->type != PORT_16550A) &&
2635 (!info->IsMoxaMustChipFlag)) {
1da177e4
LT		 2636 info->IER &= ~UART_IER_THRI;
2637 outb(info->IER, info->base + UART_IER);
2638 }
2639 }
2640 }
2641 }
2642 } else {
2643 info->flags &= ~ASYNC_CTS_FLOW;
2644 }
2645 outb(info->MCR, info->base + UART_MCR);
2646 if (cflag & CLOCAL) {
2647 info->flags &= ~ASYNC_CHECK_CD;
2648 } else {
2649 info->flags |= ASYNC_CHECK_CD;
2650 info->IER |= UART_IER_MSI;
2651 }
2652 outb(info->IER, info->base + UART_IER);
2653
2654 /*
2655 * Set up parity check flag
2656 */
2657 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
2658 if (I_INPCK(info->tty))
2659 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
2660 if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
2661 info->read_status_mask |= UART_LSR_BI;
2662
2663 info->ignore_status_mask = 0;
2664
2665 if (I_IGNBRK(info->tty)) {
2666 info->ignore_status_mask |= UART_LSR_BI;
2667 info->read_status_mask |= UART_LSR_BI;
2668 /*
2669 * If we're ignore parity and break indicators, ignore
2670 * overruns too. (For real raw support).
2671 */
2672 if (I_IGNPAR(info->tty)) {
8ea2c2ec
JJ		 2673 info->ignore_status_mask |=
2674 UART_LSR_OE |
2675 UART_LSR_PE |
2676 UART_LSR_FE;
2677 info->read_status_mask |=
2678 UART_LSR_OE |
2679 UART_LSR_PE |
2680 UART_LSR_FE;
1da177e4
LT		 2681 }
2682 }
8ea2c2ec 2683 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2684 if (info->IsMoxaMustChipFlag) {
2685 spin_lock_irqsave(&info->slock, flags);
2686 SET_MOXA_MUST_XON1_VALUE(info->base, START_CHAR(info->tty));
2687 SET_MOXA_MUST_XOFF1_VALUE(info->base, STOP_CHAR(info->tty));
2688 if (I_IXON(info->tty)) {
2689 ENABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
2690 } else {
2691 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
2692 }
2693 if (I_IXOFF(info->tty)) {
2694 ENABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->base);
2695 } else {
2696 DISABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->base);
2697 }
2698 /*
2699 if ( I_IXANY(info->tty) ) {
2700 info->MCR |= MOXA_MUST_MCR_XON_ANY;
2701 ENABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->base);
2702 } else {
2703 info->MCR &= ~MOXA_MUST_MCR_XON_ANY;
2704 DISABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->base);
2705 }
2706 */
2707 spin_unlock_irqrestore(&info->slock, flags);
2708 }
8ea2c2ec 2709 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2710
2711
2712 outb(fcr, info->base + UART_FCR); /* set fcr */
2713 outb(cval, info->base + UART_LCR);
2714
2715 return ret;
2716}
2717
2718
2719static int mxser_set_baud(struct mxser_struct *info, long newspd)
2720{
2721 int quot = 0;
2722 unsigned char cval;
2723 int ret = 0;
2724 unsigned long flags;
2725
2726 if (!info->tty || !info->tty->termios)
2727 return ret;
2728
2729 if (!(info->base))
2730 return ret;
2731
2732 if (newspd > info->MaxCanSetBaudRate)
2733 return 0;
2734
2735 info->realbaud = newspd;
2736 if (newspd == 134) {
2737 quot = (2 * info->baud_base / 269);
2738 } else if (newspd) {
2739 quot = info->baud_base / newspd;
1da177e4
LT		 2740 if (quot == 0)
2741 quot = 1;
1da177e4
LT		 2742 } else {
2743 quot = 0;
2744 }
2745
2746 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
2747 info->timeout += HZ / 50; /* Add .02 seconds of slop */
2748
2749 if (quot) {
2750 spin_lock_irqsave(&info->slock, flags);
2751 info->MCR |= UART_MCR_DTR;
2752 outb(info->MCR, info->base + UART_MCR);
2753 spin_unlock_irqrestore(&info->slock, flags);
2754 } else {
2755 spin_lock_irqsave(&info->slock, flags);
2756 info->MCR &= ~UART_MCR_DTR;
2757 outb(info->MCR, info->base + UART_MCR);
2758 spin_unlock_irqrestore(&info->slock, flags);
2759 return ret;
2760 }
2761
2762 cval = inb(info->base + UART_LCR);
2763
2764 outb(cval | UART_LCR_DLAB, info->base + UART_LCR); /* set DLAB */
2765
2766 outb(quot & 0xff, info->base + UART_DLL); /* LS of divisor */
2767 outb(quot >> 8, info->base + UART_DLM); /* MS of divisor */
2768 outb(cval, info->base + UART_LCR); /* reset DLAB */
2769
2770
2771 return ret;
2772}
2773
1da177e4
LT		 2774/*
2775 * ------------------------------------------------------------
2776 * friends of mxser_ioctl()
2777 * ------------------------------------------------------------
2778 */
2779static int mxser_get_serial_info(struct mxser_struct *info, struct serial_struct __user *retinfo)
2780{
2781 struct serial_struct tmp;
2782
2783 if (!retinfo)
8ea2c2ec 2784 return -EFAULT;
1da177e4
LT		 2785 memset(&tmp, 0, sizeof(tmp));
2786 tmp.type = info->type;
2787 tmp.line = info->port;
2788 tmp.port = info->base;
2789 tmp.irq = info->irq;
2790 tmp.flags = info->flags;
2791 tmp.baud_base = info->baud_base;
2792 tmp.close_delay = info->close_delay;
2793 tmp.closing_wait = info->closing_wait;
2794 tmp.custom_divisor = info->custom_divisor;
2795 tmp.hub6 = 0;
2796 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
2797 return -EFAULT;
8ea2c2ec 2798 return 0;
1da177e4
LT		 2799}
2800
2801static int mxser_set_serial_info(struct mxser_struct *info, struct serial_struct __user *new_info)
2802{
2803 struct serial_struct new_serial;
2804 unsigned int flags;
2805 int retval = 0;
2806
2807 if (!new_info || !info->base)
8ea2c2ec 2808 return -EFAULT;
1da177e4
LT		 2809 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
2810 return -EFAULT;
2811
8ea2c2ec
JJ		 2812 if ((new_serial.irq != info->irq) ||
2813 (new_serial.port != info->base) ||
2814 (new_serial.custom_divisor != info->custom_divisor) ||
2815 (new_serial.baud_base != info->baud_base))
2816 return -EPERM;
1da177e4
LT		 2817
2818 flags = info->flags & ASYNC_SPD_MASK;
2819
2820 if (!capable(CAP_SYS_ADMIN)) {
8ea2c2ec
JJ		 2821 if ((new_serial.baud_base != info->baud_base) ||
2822 (new_serial.close_delay != info->close_delay) ||
2823 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->flags & ~ASYNC_USR_MASK)))
2824 return -EPERM;
2825 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
2826 (new_serial.flags & ASYNC_USR_MASK));
1da177e4
LT		 2827 } else {
2828 /*
2829 * OK, past this point, all the error checking has been done.
2830 * At this point, we start making changes.....
2831 */
8ea2c2ec
JJ		 2832 info->flags = ((info->flags & ~ASYNC_FLAGS) |
2833 (new_serial.flags & ASYNC_FLAGS));
1da177e4
LT		 2834 info->close_delay = new_serial.close_delay * HZ / 100;
2835 info->closing_wait = new_serial.closing_wait * HZ / 100;
8ea2c2ec
JJ		 2836 info->tty->low_latency =
2837 (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2838 info->tty->low_latency = 0; /* (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0; */
1da177e4
LT		 2839 }
2840
2841 /* added by casper, 3/17/2000, for mouse */
2842 info->type = new_serial.type;
2843
2844 process_txrx_fifo(info);
2845
1da177e4
LT		 2846 if (info->flags & ASYNC_INITIALIZED) {
2847 if (flags != (info->flags & ASYNC_SPD_MASK)) {
2848 mxser_change_speed(info, NULL);
2849 }
2850 } else {
2851 retval = mxser_startup(info);
2852 }
8ea2c2ec 2853 return retval;
1da177e4
LT		 2854}
2855
2856/*
2857 * mxser_get_lsr_info - get line status register info
2858 *
2859 * Purpose: Let user call ioctl() to get info when the UART physically
2860 * is emptied. On bus types like RS485, the transmitter must
2861 * release the bus after transmitting. This must be done when
2862 * the transmit shift register is empty, not be done when the
2863 * transmit holding register is empty. This functionality
2864 * allows an RS485 driver to be written in user space.
2865 */
2866static int mxser_get_lsr_info(struct mxser_struct *info, unsigned int __user *value)
2867{
2868 unsigned char status;
2869 unsigned int result;
2870 unsigned long flags;
2871
2872 spin_lock_irqsave(&info->slock, flags);
2873 status = inb(info->base + UART_LSR);
2874 spin_unlock_irqrestore(&info->slock, flags);
2875 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
2876 return put_user(result, value);
2877}
2878
2879/*
2880 * This routine sends a break character out the serial port.
2881 */
2882static void mxser_send_break(struct mxser_struct *info, int duration)
2883{
2884 unsigned long flags;
2885
2886 if (!info->base)
2887 return;
2888 set_current_state(TASK_INTERRUPTIBLE);
2889 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 2890 outb(inb(info->base + UART_LCR) | UART_LCR_SBC,
2891 info->base + UART_LCR);
1da177e4
LT		 2892 spin_unlock_irqrestore(&info->slock, flags);
2893 schedule_timeout(duration);
2894 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 2895 outb(inb(info->base + UART_LCR) & ~UART_LCR_SBC,
2896 info->base + UART_LCR);
1da177e4
LT		 2897 spin_unlock_irqrestore(&info->slock, flags);
2898}
2899
2900static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
2901{
56e139f6 2902 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 2903 unsigned char control, status;
2904 unsigned long flags;
2905
2906
2907 if (tty->index == MXSER_PORTS)
8ea2c2ec 2908 return -ENOIOCTLCMD;
1da177e4 2909 if (tty->flags & (1 << TTY_IO_ERROR))
8ea2c2ec 2910 return -EIO;
1da177e4
LT		 2911
2912 control = info->MCR;
2913
2914 spin_lock_irqsave(&info->slock, flags);
2915 status = inb(info->base + UART_MSR);
2916 if (status & UART_MSR_ANY_DELTA)
2917 mxser_check_modem_status(info, status);
2918 spin_unlock_irqrestore(&info->slock, flags);
2919 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
8ea2c2ec
JJ		 2920 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
2921 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
2922 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
2923 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
2924 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1da177e4
LT		 2925}
2926
2927static int mxser_tiocmset(struct tty_struct *tty, struct file *file, unsigned int set, unsigned int clear)
2928{
56e139f6 2929 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 2930 unsigned long flags;
2931
2932
2933 if (tty->index == MXSER_PORTS)
2934 return -ENOIOCTLCMD;
2935 if (tty->flags & (1 << TTY_IO_ERROR))
2936 return -EIO;
2937
2938 spin_lock_irqsave(&info->slock, flags);
2939
2940 if (set & TIOCM_RTS)
2941 info->MCR |= UART_MCR_RTS;
2942 if (set & TIOCM_DTR)
2943 info->MCR |= UART_MCR_DTR;
2944
2945 if (clear & TIOCM_RTS)
2946 info->MCR &= ~UART_MCR_RTS;
2947 if (clear & TIOCM_DTR)
2948 info->MCR &= ~UART_MCR_DTR;
2949
2950 outb(info->MCR, info->base + UART_MCR);
2951 spin_unlock_irqrestore(&info->slock, flags);
2952 return 0;
2953}
2954
2955
2956static int mxser_read_register(int, unsigned short *);
2957static int mxser_program_mode(int);
2958static void mxser_normal_mode(int);
2959
2960static int mxser_get_ISA_conf(int cap, struct mxser_hwconf *hwconf)
2961{
2962 int id, i, bits;
2963 unsigned short regs[16], irq;
2964 unsigned char scratch, scratch2;
2965
2966 hwconf->IsMoxaMustChipFlag = MOXA_OTHER_UART;
2967
2968 id = mxser_read_register(cap, regs);
2969 if (id == C168_ASIC_ID) {
2970 hwconf->board_type = MXSER_BOARD_C168_ISA;
2971 hwconf->ports = 8;
2972 } else if (id == C104_ASIC_ID) {
2973 hwconf->board_type = MXSER_BOARD_C104_ISA;
2974 hwconf->ports = 4;
2975 } else if (id == C102_ASIC_ID) {
2976 hwconf->board_type = MXSER_BOARD_C102_ISA;
2977 hwconf->ports = 2;
2978 } else if (id == CI132_ASIC_ID) {
2979 hwconf->board_type = MXSER_BOARD_CI132;
2980 hwconf->ports = 2;
2981 } else if (id == CI134_ASIC_ID) {
2982 hwconf->board_type = MXSER_BOARD_CI134;
2983 hwconf->ports = 4;
2984 } else if (id == CI104J_ASIC_ID) {
2985 hwconf->board_type = MXSER_BOARD_CI104J;
2986 hwconf->ports = 4;
2987 } else
8ea2c2ec 2988 return 0;
1da177e4
LT		 2989
2990 irq = 0;
2991 if (hwconf->ports == 2) {
2992 irq = regs[9] & 0xF000;
2993 irq = irq | (irq >> 4);
2994 if (irq != (regs[9] & 0xFF00))
8ea2c2ec 2995 return MXSER_ERR_IRQ_CONFLIT;
1da177e4
LT		 2996 } else if (hwconf->ports == 4) {
2997 irq = regs[9] & 0xF000;
2998 irq = irq | (irq >> 4);
2999 irq = irq | (irq >> 8);
3000 if (irq != regs[9])
8ea2c2ec 3001 return MXSER_ERR_IRQ_CONFLIT;
1da177e4
LT		 3002 } else if (hwconf->ports == 8) {
3003 irq = regs[9] & 0xF000;
3004 irq = irq | (irq >> 4);
3005 irq = irq | (irq >> 8);
3006 if ((irq != regs[9]) || (irq != regs[10]))
8ea2c2ec 3007 return MXSER_ERR_IRQ_CONFLIT;
1da177e4
LT		 3008 }
3009
8ea2c2ec
JJ		 3010 if (!irq)
3011 return MXSER_ERR_IRQ;
3012 hwconf->irq = ((int)(irq & 0xF000) >> 12);
1da177e4
LT		 3013 for (i = 0; i < 8; i++)
3014 hwconf->ioaddr[i] = (int) regs[i + 1] & 0xFFF8;
8ea2c2ec
JJ		 3015 if ((regs[12] & 0x80) == 0)
3016 return MXSER_ERR_VECTOR;
3017 hwconf->vector = (int)regs[11]; /* interrupt vector */
1da177e4
LT		 3018 if (id == 1)
3019 hwconf->vector_mask = 0x00FF;
3020 else
3021 hwconf->vector_mask = 0x000F;
3022 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
3023 if (regs[12] & bits) {
3024 hwconf->baud_base[i] = 921600;
8ea2c2ec 3025 hwconf->MaxCanSetBaudRate[i] = 921600; /* add by Victor Yu. 09-04-2002 */
1da177e4
LT		 3026 } else {
3027 hwconf->baud_base[i] = 115200;
8ea2c2ec 3028 hwconf->MaxCanSetBaudRate[i] = 115200; /* add by Victor Yu. 09-04-2002 */
1da177e4
LT		 3029 }
3030 }
3031 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
3032 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
3033 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
3034 outb(scratch2, cap + UART_LCR);
3035 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
3036 scratch = inb(cap + UART_IIR);
3037
3038 if (scratch & 0xC0)
3039 hwconf->uart_type = PORT_16550A;
3040 else
3041 hwconf->uart_type = PORT_16450;
3042 if (id == 1)
3043 hwconf->ports = 8;
3044 else
3045 hwconf->ports = 4;
3046 request_region(hwconf->ioaddr[0], 8 * hwconf->ports, "mxser(IO)");
3047 request_region(hwconf->vector, 1, "mxser(vector)");
8ea2c2ec 3048 return hwconf->ports;
1da177e4
LT		 3049}
3050
3051#define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
3052#define CHIP_DO 0x02 /* Serial Data Output in Eprom */
3053#define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
3054#define CHIP_DI 0x08 /* Serial Data Input in Eprom */
3055#define EN_CCMD 0x000 /* Chip's command register */
3056#define EN0_RSARLO 0x008 /* Remote start address reg 0 */
3057#define EN0_RSARHI 0x009 /* Remote start address reg 1 */
3058#define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
3059#define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
3060#define EN0_DCFG 0x00E /* Data configuration reg WR */
3061#define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
3062#define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
3063#define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
3064static int mxser_read_register(int port, unsigned short *regs)
3065{
3066 int i, k, value, id;
3067 unsigned int j;
3068
3069 id = mxser_program_mode(port);
3070 if (id < 0)
8ea2c2ec 3071 return id;
1da177e4
LT		 3072 for (i = 0; i < 14; i++) {
3073 k = (i & 0x3F) | 0x180;
3074 for (j = 0x100; j > 0; j >>= 1) {
3075 outb(CHIP_CS, port);
3076 if (k & j) {
3077 outb(CHIP_CS | CHIP_DO, port);
3078 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
3079 } else {
3080 outb(CHIP_CS, port);
3081 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
3082 }
3083 }
8ea2c2ec 3084 (void)inb(port);
1da177e4
LT		 3085 value = 0;
3086 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
3087 outb(CHIP_CS, port);
3088 outb(CHIP_CS | CHIP_SK, port);
3089 if (inb(port) & CHIP_DI)
3090 value |= j;
3091 }
3092 regs[i] = value;
3093 outb(0, port);
3094 }
3095 mxser_normal_mode(port);
8ea2c2ec 3096 return id;
1da177e4
LT		 3097}
3098
3099static int mxser_program_mode(int port)
3100{
3101 int id, i, j, n;
8ea2c2ec 3102 /* unsigned long flags; */
1da177e4
LT		 3103
3104 spin_lock(&gm_lock);
3105 outb(0, port);
3106 outb(0, port);
3107 outb(0, port);
8ea2c2ec
JJ		 3108 (void)inb(port);
3109 (void)inb(port);
1da177e4 3110 outb(0, port);
8ea2c2ec
JJ		 3111 (void)inb(port);
3112 /* restore_flags(flags); */
1da177e4
LT		 3113 spin_unlock(&gm_lock);
3114
3115 id = inb(port + 1) & 0x1F;
8ea2c2ec
JJ		 3116 if ((id != C168_ASIC_ID) &&
3117 (id != C104_ASIC_ID) &&
3118 (id != C102_ASIC_ID) &&
3119 (id != CI132_ASIC_ID) &&
3120 (id != CI134_ASIC_ID) &&
3121 (id != CI104J_ASIC_ID))
3122 return -1;
1da177e4
LT		 3123 for (i = 0, j = 0; i < 4; i++) {
3124 n = inb(port + 2);
3125 if (n == 'M') {
3126 j = 1;
3127 } else if ((j == 1) && (n == 1)) {
3128 j = 2;
3129 break;
3130 } else
3131 j = 0;
3132 }
3133 if (j != 2)
3134 id = -2;
8ea2c2ec 3135 return id;
1da177e4
LT		 3136}
3137
3138static void mxser_normal_mode(int port)
3139{
3140 int i, n;
3141
3142 outb(0xA5, port + 1);
3143 outb(0x80, port + 3);
3144 outb(12, port + 0); /* 9600 bps */
3145 outb(0, port + 1);
3146 outb(0x03, port + 3); /* 8 data bits */
3147 outb(0x13, port + 4); /* loop back mode */
3148 for (i = 0; i < 16; i++) {
3149 n = inb(port + 5);
3150 if ((n & 0x61) == 0x60)
3151 break;
3152 if ((n & 1) == 1)
8ea2c2ec 3153 (void)inb(port);
1da177e4
LT		 3154 }
3155 outb(0x00, port + 4);
3156}
3157
3158module_init(mxser_module_init);
3159module_exit(mxser_module_exit);
Empty description
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