]> Git Repo - linux.git/blame - drivers/char/mxser.c
projects / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
[PATCH] drivers/block/DAC960: convert 'boolean' to 'bool'
[linux.git] / drivers / char / mxser.c
CommitLineData
1da177e4
LT		 1/*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
4 * Copyright (C) 1999-2001 Moxa Technologies ([email protected]).
5 *
6 * This code is loosely based on the Linux serial driver, written by
7 * Linus Torvalds, Theodore T'so and others.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
8ea2c2ec 12 * (at your option) any later version.
1da177e4
LT		 13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 *
23 * Original release 10/26/00
24 *
25 * 02/06/01 Support MOXA Industio family boards.
26 * 02/06/01 Support TIOCGICOUNT.
27 * 02/06/01 Fix the problem for connecting to serial mouse.
28 * 02/06/01 Fix the problem for H/W flow control.
29 * 02/06/01 Fix the compling warning when CONFIG_PCI
30 * don't be defined.
31 *
32 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
33 * <[email protected]>. The original 1.8 code is available on www.moxa.com.
34 * - Fixed x86_64 cleanness
35 * - Fixed sleep with spinlock held in mxser_send_break
36 */
37
38
1da177e4 39#include <linux/module.h>
1da177e4
LT		 40#include <linux/autoconf.h>
41#include <linux/errno.h>
42#include <linux/signal.h>
43#include <linux/sched.h>
44#include <linux/timer.h>
45#include <linux/interrupt.h>
46#include <linux/tty.h>
47#include <linux/tty_flip.h>
48#include <linux/serial.h>
49#include <linux/serial_reg.h>
50#include <linux/major.h>
51#include <linux/string.h>
52#include <linux/fcntl.h>
53#include <linux/ptrace.h>
54#include <linux/gfp.h>
55#include <linux/ioport.h>
56#include <linux/mm.h>
57#include <linux/smp_lock.h>
58#include <linux/delay.h>
59#include <linux/pci.h>
60
61#include <asm/system.h>
62#include <asm/io.h>
63#include <asm/irq.h>
1da177e4
LT		 64#include <asm/bitops.h>
65#include <asm/uaccess.h>
66
67#include "mxser.h"
68
69#define MXSER_VERSION "1.8"
70#define MXSERMAJOR 174
71#define MXSERCUMAJOR 175
72
8ea2c2ec
JJ		 73#define MXSER_EVENT_TXLOW 1
74#define MXSER_EVENT_HANGUP 2
1da177e4
LT		 75
76#define MXSER_BOARDS 4 /* Max. boards */
77#define MXSER_PORTS 32 /* Max. ports */
78#define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
79#define MXSER_ISR_PASS_LIMIT 256
80
81#define MXSER_ERR_IOADDR -1
82#define MXSER_ERR_IRQ -2
83#define MXSER_ERR_IRQ_CONFLIT -3
84#define MXSER_ERR_VECTOR -4
85
86#define SERIAL_TYPE_NORMAL 1
87#define SERIAL_TYPE_CALLOUT 2
88
89#define WAKEUP_CHARS 256
90
91#define UART_MCR_AFE 0x20
92#define UART_LSR_SPECIAL 0x1E
93
8ea2c2ec
JJ		 94#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK|\
95 IXON|IXOFF))
1da177e4 96
0f2ed4c6 97#define IRQ_T(info) ((info->flags & ASYNC_SHARE_IRQ) ? IRQF_SHARED : IRQF_DISABLED)
1da177e4
LT		 98
99#define C168_ASIC_ID 1
100#define C104_ASIC_ID 2
101#define C102_ASIC_ID 0xB
102#define CI132_ASIC_ID 4
103#define CI134_ASIC_ID 3
104#define CI104J_ASIC_ID 5
105
106enum {
107 MXSER_BOARD_C168_ISA = 1,
108 MXSER_BOARD_C104_ISA,
109 MXSER_BOARD_CI104J,
110 MXSER_BOARD_C168_PCI,
111 MXSER_BOARD_C104_PCI,
112 MXSER_BOARD_C102_ISA,
113 MXSER_BOARD_CI132,
114 MXSER_BOARD_CI134,
115 MXSER_BOARD_CP132,
116 MXSER_BOARD_CP114,
117 MXSER_BOARD_CT114,
118 MXSER_BOARD_CP102,
119 MXSER_BOARD_CP104U,
120 MXSER_BOARD_CP168U,
121 MXSER_BOARD_CP132U,
122 MXSER_BOARD_CP134U,
123 MXSER_BOARD_CP104JU,
124 MXSER_BOARD_RC7000,
125 MXSER_BOARD_CP118U,
126 MXSER_BOARD_CP102UL,
127 MXSER_BOARD_CP102U,
128};
129
130static char *mxser_brdname[] = {
131 "C168 series",
132 "C104 series",
133 "CI-104J series",
134 "C168H/PCI series",
135 "C104H/PCI series",
136 "C102 series",
137 "CI-132 series",
138 "CI-134 series",
139 "CP-132 series",
140 "CP-114 series",
141 "CT-114 series",
142 "CP-102 series",
143 "CP-104U series",
144 "CP-168U series",
145 "CP-132U series",
146 "CP-134U series",
147 "CP-104JU series",
148 "Moxa UC7000 Serial",
149 "CP-118U series",
150 "CP-102UL series",
151 "CP-102U series",
152};
153
154static int mxser_numports[] = {
8ea2c2ec
JJ		 155 8, /* C168-ISA */
156 4, /* C104-ISA */
157 4, /* CI104J */
158 8, /* C168-PCI */
159 4, /* C104-PCI */
160 2, /* C102-ISA */
161 2, /* CI132 */
162 4, /* CI134 */
163 2, /* CP132 */
164 4, /* CP114 */
165 4, /* CT114 */
166 2, /* CP102 */
167 4, /* CP104U */
168 8, /* CP168U */
169 2, /* CP132U */
170 4, /* CP134U */
171 4, /* CP104JU */
172 8, /* RC7000 */
173 8, /* CP118U */
174 2, /* CP102UL */
175 2, /* CP102U */
1da177e4
LT		 176};
177
178#define UART_TYPE_NUM 2
179
180static const unsigned int Gmoxa_uart_id[UART_TYPE_NUM] = {
181 MOXA_MUST_MU150_HWID,
182 MOXA_MUST_MU860_HWID
183};
184
8ea2c2ec 185/* This is only for PCI */
1da177e4
LT		 186#define UART_INFO_NUM 3
187struct mxpciuart_info {
188 int type;
189 int tx_fifo;
190 int rx_fifo;
191 int xmit_fifo_size;
192 int rx_high_water;
193 int rx_trigger;
194 int rx_low_water;
195 long max_baud;
196};
197
198static const struct mxpciuart_info Gpci_uart_info[UART_INFO_NUM] = {
199 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
200 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
201 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
202};
203
204
205#ifdef CONFIG_PCI
206
207static struct pci_device_id mxser_pcibrds[] = {
208 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C168, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_C168_PCI},
209 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_C104_PCI},
210 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP132},
211 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP114},
212 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CT114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CT114},
213 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102},
214 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP104U},
215 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP168U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP168U},
216 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP132U},
217 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP134U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP134U},
218 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104JU, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP104JU},
219 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_RC7000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_RC7000},
220 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP118U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP118U},
221 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102UL, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102UL},
222 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102U},
223 {0}
224};
225
226MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
227
228
229#endif
230
231typedef struct _moxa_pci_info {
232 unsigned short busNum;
233 unsigned short devNum;
8ea2c2ec 234 struct pci_dev *pdev; /* add by Victor Yu. 06-23-2003 */
1da177e4
LT		 235} moxa_pci_info;
236
237static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 };
238static int ttymajor = MXSERMAJOR;
239static int calloutmajor = MXSERCUMAJOR;
240static int verbose = 0;
241
242/* Variables for insmod */
243
244MODULE_AUTHOR("Casper Yang");
245MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
8d3b33f6
RR		 246module_param_array(ioaddr, int, NULL, 0);
247module_param(ttymajor, int, 0);
248module_param(calloutmajor, int, 0);
249module_param(verbose, bool, 0);
1da177e4
LT		 250MODULE_LICENSE("GPL");
251
252struct mxser_log {
253 int tick;
254 unsigned long rxcnt[MXSER_PORTS];
255 unsigned long txcnt[MXSER_PORTS];
256};
257
258
259struct mxser_mon {
260 unsigned long rxcnt;
261 unsigned long txcnt;
262 unsigned long up_rxcnt;
263 unsigned long up_txcnt;
264 int modem_status;
265 unsigned char hold_reason;
266};
267
268struct mxser_mon_ext {
269 unsigned long rx_cnt[32];
270 unsigned long tx_cnt[32];
271 unsigned long up_rxcnt[32];
272 unsigned long up_txcnt[32];
273 int modem_status[32];
274
275 long baudrate[32];
276 int databits[32];
277 int stopbits[32];
278 int parity[32];
279 int flowctrl[32];
280 int fifo[32];
281 int iftype[32];
282};
8ea2c2ec 283
1da177e4
LT		 284struct mxser_hwconf {
285 int board_type;
286 int ports;
287 int irq;
288 int vector;
289 int vector_mask;
290 int uart_type;
291 int ioaddr[MXSER_PORTS_PER_BOARD];
292 int baud_base[MXSER_PORTS_PER_BOARD];
293 moxa_pci_info pciInfo;
8ea2c2ec
JJ		 294 int IsMoxaMustChipFlag; /* add by Victor Yu. 08-30-2002 */
295 int MaxCanSetBaudRate[MXSER_PORTS_PER_BOARD]; /* add by Victor Yu. 09-04-2002 */
296 int opmode_ioaddr[MXSER_PORTS_PER_BOARD]; /* add by Victor Yu. 01-05-2004 */
1da177e4
LT		 297};
298
299struct mxser_struct {
300 int port;
301 int base; /* port base address */
302 int irq; /* port using irq no. */
303 int vector; /* port irq vector */
304 int vectormask; /* port vector mask */
305 int rx_high_water;
306 int rx_trigger; /* Rx fifo trigger level */
307 int rx_low_water;
308 int baud_base; /* max. speed */
309 int flags; /* defined in tty.h */
310 int type; /* UART type */
311 struct tty_struct *tty;
312 int read_status_mask;
313 int ignore_status_mask;
314 int xmit_fifo_size;
315 int custom_divisor;
316 int x_char; /* xon/xoff character */
317 int close_delay;
318 unsigned short closing_wait;
319 int IER; /* Interrupt Enable Register */
320 int MCR; /* Modem control register */
321 unsigned long event;
322 int count; /* # of fd on device */
323 int blocked_open; /* # of blocked opens */
324 long session; /* Session of opening process */
325 long pgrp; /* pgrp of opening process */
326 unsigned char *xmit_buf;
327 int xmit_head;
328 int xmit_tail;
329 int xmit_cnt;
330 struct work_struct tqueue;
606d099c
AC		 331 struct ktermios normal_termios;
332 struct ktermios callout_termios;
1da177e4
LT		 333 wait_queue_head_t open_wait;
334 wait_queue_head_t close_wait;
335 wait_queue_head_t delta_msr_wait;
336 struct async_icount icount; /* kernel counters for the 4 input interrupts */
337 int timeout;
8ea2c2ec
JJ		 338 int IsMoxaMustChipFlag; /* add by Victor Yu. 08-30-2002 */
339 int MaxCanSetBaudRate; /* add by Victor Yu. 09-04-2002 */
340 int opmode_ioaddr; /* add by Victor Yu. 01-05-2004 */
1da177e4
LT		 341 unsigned char stop_rx;
342 unsigned char ldisc_stop_rx;
343 long realbaud;
344 struct mxser_mon mon_data;
345 unsigned char err_shadow;
346 spinlock_t slock;
347};
348
1da177e4
LT		 349struct mxser_mstatus {
350 tcflag_t cflag;
351 int cts;
352 int dsr;
353 int ri;
354 int dcd;
355};
356
357static struct mxser_mstatus GMStatus[MXSER_PORTS];
358
359static int mxserBoardCAP[MXSER_BOARDS] = {
360 0, 0, 0, 0
8ea2c2ec 361 /* 0x180, 0x280, 0x200, 0x320 */
1da177e4
LT		 362};
363
364static struct tty_driver *mxvar_sdriver;
365static struct mxser_struct mxvar_table[MXSER_PORTS];
366static struct tty_struct *mxvar_tty[MXSER_PORTS + 1];
606d099c
AC		 367static struct ktermios *mxvar_termios[MXSER_PORTS + 1];
368static struct ktermios *mxvar_termios_locked[MXSER_PORTS + 1];
1da177e4
LT		 369static struct mxser_log mxvar_log;
370static int mxvar_diagflag;
371static unsigned char mxser_msr[MXSER_PORTS + 1];
372static struct mxser_mon_ext mon_data_ext;
373static int mxser_set_baud_method[MXSER_PORTS + 1];
374static spinlock_t gm_lock;
375
376/*
377 * This is used to figure out the divisor speeds and the timeouts
378 */
379
380static struct mxser_hwconf mxsercfg[MXSER_BOARDS];
381
382/*
383 * static functions:
384 */
385
386static void mxser_getcfg(int board, struct mxser_hwconf *hwconf);
387static int mxser_init(void);
388
8ea2c2ec 389/* static void mxser_poll(unsigned long); */
1da177e4
LT		 390static int mxser_get_ISA_conf(int, struct mxser_hwconf *);
391static int mxser_get_PCI_conf(int, int, int, struct mxser_hwconf *);
c4028958 392static void mxser_do_softint(struct work_struct *);
1da177e4
LT		 393static int mxser_open(struct tty_struct *, struct file *);
394static void mxser_close(struct tty_struct *, struct file *);
395static int mxser_write(struct tty_struct *, const unsigned char *, int);
396static int mxser_write_room(struct tty_struct *);
397static void mxser_flush_buffer(struct tty_struct *);
398static int mxser_chars_in_buffer(struct tty_struct *);
399static void mxser_flush_chars(struct tty_struct *);
400static void mxser_put_char(struct tty_struct *, unsigned char);
401static int mxser_ioctl(struct tty_struct *, struct file *, uint, ulong);
402static int mxser_ioctl_special(unsigned int, void __user *);
403static void mxser_throttle(struct tty_struct *);
404static void mxser_unthrottle(struct tty_struct *);
606d099c 405static void mxser_set_termios(struct tty_struct *, struct ktermios *);
1da177e4
LT		 406static void mxser_stop(struct tty_struct *);
407static void mxser_start(struct tty_struct *);
408static void mxser_hangup(struct tty_struct *);
409static void mxser_rs_break(struct tty_struct *, int);
7d12e780 410static irqreturn_t mxser_interrupt(int, void *);
1da177e4
LT		 411static void mxser_receive_chars(struct mxser_struct *, int *);
412static void mxser_transmit_chars(struct mxser_struct *);
413static void mxser_check_modem_status(struct mxser_struct *, int);
414static int mxser_block_til_ready(struct tty_struct *, struct file *, struct mxser_struct *);
415static int mxser_startup(struct mxser_struct *);
416static void mxser_shutdown(struct mxser_struct *);
606d099c 417static int mxser_change_speed(struct mxser_struct *, struct ktermios *old_termios);
1da177e4
LT		 418static int mxser_get_serial_info(struct mxser_struct *, struct serial_struct __user *);
419static int mxser_set_serial_info(struct mxser_struct *, struct serial_struct __user *);
420static int mxser_get_lsr_info(struct mxser_struct *, unsigned int __user *);
421static void mxser_send_break(struct mxser_struct *, int);
422static int mxser_tiocmget(struct tty_struct *, struct file *);
423static int mxser_tiocmset(struct tty_struct *, struct file *, unsigned int, unsigned int);
424static int mxser_set_baud(struct mxser_struct *info, long newspd);
425static void mxser_wait_until_sent(struct tty_struct *tty, int timeout);
426
427static void mxser_startrx(struct tty_struct *tty);
428static void mxser_stoprx(struct tty_struct *tty);
429
430
431static int CheckIsMoxaMust(int io)
432{
433 u8 oldmcr, hwid;
434 int i;
435
436 outb(0, io + UART_LCR);
437 DISABLE_MOXA_MUST_ENCHANCE_MODE(io);
438 oldmcr = inb(io + UART_MCR);
439 outb(0, io + UART_MCR);
440 SET_MOXA_MUST_XON1_VALUE(io, 0x11);
441 if ((hwid = inb(io + UART_MCR)) != 0) {
442 outb(oldmcr, io + UART_MCR);
8ea2c2ec 443 return MOXA_OTHER_UART;
1da177e4
LT		 444 }
445
446 GET_MOXA_MUST_HARDWARE_ID(io, &hwid);
447 for (i = 0; i < UART_TYPE_NUM; i++) {
448 if (hwid == Gmoxa_uart_id[i])
8ea2c2ec 449 return (int)hwid;
1da177e4
LT		 450 }
451 return MOXA_OTHER_UART;
452}
453
8ea2c2ec 454/* above is modified by Victor Yu. 08-15-2002 */
1da177e4 455
b68e31d0 456static const struct tty_operations mxser_ops = {
1da177e4
LT		 457 .open = mxser_open,
458 .close = mxser_close,
459 .write = mxser_write,
460 .put_char = mxser_put_char,
461 .flush_chars = mxser_flush_chars,
462 .write_room = mxser_write_room,
463 .chars_in_buffer = mxser_chars_in_buffer,
464 .flush_buffer = mxser_flush_buffer,
465 .ioctl = mxser_ioctl,
466 .throttle = mxser_throttle,
467 .unthrottle = mxser_unthrottle,
468 .set_termios = mxser_set_termios,
469 .stop = mxser_stop,
470 .start = mxser_start,
471 .hangup = mxser_hangup,
57432345
KS		 472 .break_ctl = mxser_rs_break,
473 .wait_until_sent = mxser_wait_until_sent,
1da177e4
LT		 474 .tiocmget = mxser_tiocmget,
475 .tiocmset = mxser_tiocmset,
476};
477
478/*
479 * The MOXA Smartio/Industio serial driver boot-time initialization code!
480 */
481
482static int __init mxser_module_init(void)
483{
484 int ret;
485
486 if (verbose)
487 printk(KERN_DEBUG "Loading module mxser ...\n");
488 ret = mxser_init();
489 if (verbose)
490 printk(KERN_DEBUG "Done.\n");
491 return ret;
492}
493
494static void __exit mxser_module_exit(void)
495{
64698b69 496 int i, err;
1da177e4
LT		 497
498 if (verbose)
499 printk(KERN_DEBUG "Unloading module mxser ...\n");
500
64698b69
KS		 501 err = tty_unregister_driver(mxvar_sdriver);
502 if (!err)
503 put_tty_driver(mxvar_sdriver);
504 else
1da177e4
LT		 505 printk(KERN_ERR "Couldn't unregister MOXA Smartio/Industio family serial driver\n");
506
507 for (i = 0; i < MXSER_BOARDS; i++) {
508 struct pci_dev *pdev;
509
510 if (mxsercfg[i].board_type == -1)
511 continue;
512 else {
513 pdev = mxsercfg[i].pciInfo.pdev;
514 free_irq(mxsercfg[i].irq, &mxvar_table[i * MXSER_PORTS_PER_BOARD]);
8ea2c2ec 515 if (pdev != NULL) { /* PCI */
1da177e4
LT		 516 release_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
517 release_region(pci_resource_start(pdev, 3), pci_resource_len(pdev, 3));
1187ece3 518 pci_dev_put(pdev);
1da177e4
LT		 519 } else {
520 release_region(mxsercfg[i].ioaddr[0], 8 * mxsercfg[i].ports);
521 release_region(mxsercfg[i].vector, 1);
522 }
523 }
524 }
525 if (verbose)
526 printk(KERN_DEBUG "Done.\n");
1da177e4
LT		 527}
528
529static void process_txrx_fifo(struct mxser_struct *info)
530{
531 int i;
532
533 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
534 info->rx_trigger = 1;
535 info->rx_high_water = 1;
536 info->rx_low_water = 1;
537 info->xmit_fifo_size = 1;
538 } else {
539 for (i = 0; i < UART_INFO_NUM; i++) {
540 if (info->IsMoxaMustChipFlag == Gpci_uart_info[i].type) {
541 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
542 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
543 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
544 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
545 break;
546 }
547 }
548 }
549}
550
551static int mxser_initbrd(int board, struct mxser_hwconf *hwconf)
552{
553 struct mxser_struct *info;
554 int retval;
555 int i, n;
556
557 n = board * MXSER_PORTS_PER_BOARD;
558 info = &mxvar_table[n];
559 /*if (verbose) */ {
ae25f8ec 560 printk(KERN_DEBUG " ttyMI%d - ttyMI%d ",
8ea2c2ec
JJ		 561 n, n + hwconf->ports - 1);
562 printk(" max. baud rate = %d bps.\n",
563 hwconf->MaxCanSetBaudRate[0]);
1da177e4
LT		 564 }
565
566 for (i = 0; i < hwconf->ports; i++, n++, info++) {
567 info->port = n;
568 info->base = hwconf->ioaddr[i];
569 info->irq = hwconf->irq;
570 info->vector = hwconf->vector;
571 info->vectormask = hwconf->vector_mask;
8ea2c2ec 572 info->opmode_ioaddr = hwconf->opmode_ioaddr[i]; /* add by Victor Yu. 01-05-2004 */
1da177e4
LT		 573 info->stop_rx = 0;
574 info->ldisc_stop_rx = 0;
575
576 info->IsMoxaMustChipFlag = hwconf->IsMoxaMustChipFlag;
8ea2c2ec 577 /* Enhance mode enabled here */
1da177e4
LT		 578 if (info->IsMoxaMustChipFlag != MOXA_OTHER_UART) {
579 ENABLE_MOXA_MUST_ENCHANCE_MODE(info->base);
580 }
581
582 info->flags = ASYNC_SHARE_IRQ;
583 info->type = hwconf->uart_type;
584 info->baud_base = hwconf->baud_base[i];
585
586 info->MaxCanSetBaudRate = hwconf->MaxCanSetBaudRate[i];
587
588 process_txrx_fifo(info);
589
590
591 info->custom_divisor = hwconf->baud_base[i] * 16;
592 info->close_delay = 5 * HZ / 10;
593 info->closing_wait = 30 * HZ;
c4028958 594 INIT_WORK(&info->tqueue, mxser_do_softint);
1da177e4
LT		 595 info->normal_termios = mxvar_sdriver->init_termios;
596 init_waitqueue_head(&info->open_wait);
597 init_waitqueue_head(&info->close_wait);
598 init_waitqueue_head(&info->delta_msr_wait);
599 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
600 info->err_shadow = 0;
601 spin_lock_init(&info->slock);
602 }
603 /*
604 * Allocate the IRQ if necessary
605 */
606
607
608 /* before set INT ISR, disable all int */
609 for (i = 0; i < hwconf->ports; i++) {
8ea2c2ec
JJ		 610 outb(inb(hwconf->ioaddr[i] + UART_IER) & 0xf0,
611 hwconf->ioaddr[i] + UART_IER);
1da177e4
LT		 612 }
613
614 n = board * MXSER_PORTS_PER_BOARD;
615 info = &mxvar_table[n];
616
8ea2c2ec
JJ		 617 retval = request_irq(hwconf->irq, mxser_interrupt, IRQ_T(info),
618 "mxser", info);
1da177e4 619 if (retval) {
8ea2c2ec
JJ		 620 printk(KERN_ERR "Board %d: %s",
621 board, mxser_brdname[hwconf->board_type - 1]);
622 printk(" Request irq failed, IRQ (%d) may conflict with"
623 " another device.\n", info->irq);
1da177e4
LT		 624 return retval;
625 }
626 return 0;
627}
628
1da177e4
LT		 629static void mxser_getcfg(int board, struct mxser_hwconf *hwconf)
630{
631 mxsercfg[board] = *hwconf;
632}
633
634#ifdef CONFIG_PCI
635static int mxser_get_PCI_conf(int busnum, int devnum, int board_type, struct mxser_hwconf *hwconf)
636{
637 int i, j;
8ea2c2ec 638 /* unsigned int val; */
1da177e4
LT		 639 unsigned int ioaddress;
640 struct pci_dev *pdev = hwconf->pciInfo.pdev;
641
8ea2c2ec 642 /* io address */
1da177e4
LT		 643 hwconf->board_type = board_type;
644 hwconf->ports = mxser_numports[board_type - 1];
645 ioaddress = pci_resource_start(pdev, 2);
8ea2c2ec
JJ		 646 request_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2),
647 "mxser(IO)");
1da177e4 648
8ea2c2ec 649 for (i = 0; i < hwconf->ports; i++)
1da177e4 650 hwconf->ioaddr[i] = ioaddress + 8 * i;
1da177e4 651
8ea2c2ec 652 /* vector */
1da177e4 653 ioaddress = pci_resource_start(pdev, 3);
8ea2c2ec
JJ		 654 request_region(pci_resource_start(pdev, 3), pci_resource_len(pdev, 3),
655 "mxser(vector)");
1da177e4
LT		 656 hwconf->vector = ioaddress;
657
8ea2c2ec 658 /* irq */
1da177e4
LT		 659 hwconf->irq = hwconf->pciInfo.pdev->irq;
660
661 hwconf->IsMoxaMustChipFlag = CheckIsMoxaMust(hwconf->ioaddr[0]);
662 hwconf->uart_type = PORT_16550A;
663 hwconf->vector_mask = 0;
664
665
666 for (i = 0; i < hwconf->ports; i++) {
667 for (j = 0; j < UART_INFO_NUM; j++) {
668 if (Gpci_uart_info[j].type == hwconf->IsMoxaMustChipFlag) {
669 hwconf->MaxCanSetBaudRate[i] = Gpci_uart_info[j].max_baud;
670
8ea2c2ec 671 /* exception....CP-102 */
1da177e4
LT		 672 if (board_type == MXSER_BOARD_CP102)
673 hwconf->MaxCanSetBaudRate[i] = 921600;
674 break;
675 }
676 }
677 }
678
679 if (hwconf->IsMoxaMustChipFlag == MOXA_MUST_MU860_HWID) {
680 for (i = 0; i < hwconf->ports; i++) {
681 if (i < 4)
682 hwconf->opmode_ioaddr[i] = ioaddress + 4;
683 else
684 hwconf->opmode_ioaddr[i] = ioaddress + 0x0c;
685 }
8ea2c2ec
JJ		 686 outb(0, ioaddress + 4); /* default set to RS232 mode */
687 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
1da177e4
LT		 688 }
689
690 for (i = 0; i < hwconf->ports; i++) {
691 hwconf->vector_mask |= (1 << i);
692 hwconf->baud_base[i] = 921600;
693 }
8ea2c2ec 694 return 0;
1da177e4
LT		 695}
696#endif
697
698static int mxser_init(void)
699{
700 int i, m, retval, b, n;
1da177e4
LT		 701 struct pci_dev *pdev = NULL;
702 int index;
703 unsigned char busnum, devnum;
704 struct mxser_hwconf hwconf;
705
706 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
707 if (!mxvar_sdriver)
708 return -ENOMEM;
709 spin_lock_init(&gm_lock);
710
711 for (i = 0; i < MXSER_BOARDS; i++) {
712 mxsercfg[i].board_type = -1;
713 }
714
8ea2c2ec
JJ		 715 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
716 MXSER_VERSION);
1da177e4
LT		 717
718 /* Initialize the tty_driver structure */
719 memset(mxvar_sdriver, 0, sizeof(struct tty_driver));
31f87cf4 720 mxvar_sdriver->owner = THIS_MODULE;
1da177e4 721 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
ae25f8ec 722 mxvar_sdriver->name = "ttyMI";
1da177e4
LT		 723 mxvar_sdriver->major = ttymajor;
724 mxvar_sdriver->minor_start = 0;
725 mxvar_sdriver->num = MXSER_PORTS + 1;
726 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
727 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
728 mxvar_sdriver->init_termios = tty_std_termios;
8ea2c2ec 729 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
606d099c
AC		 730 mxvar_sdriver->init_termios.c_ispeed = 9600;
731 mxvar_sdriver->init_termios.c_ospeed = 9600;
1da177e4
LT		 732 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW;
733 tty_set_operations(mxvar_sdriver, &mxser_ops);
734 mxvar_sdriver->ttys = mxvar_tty;
735 mxvar_sdriver->termios = mxvar_termios;
736 mxvar_sdriver->termios_locked = mxvar_termios_locked;
737
1da177e4
LT		 738 mxvar_diagflag = 0;
739 memset(mxvar_table, 0, MXSER_PORTS * sizeof(struct mxser_struct));
740 memset(&mxvar_log, 0, sizeof(struct mxser_log));
741
742 memset(&mxser_msr, 0, sizeof(unsigned char) * (MXSER_PORTS + 1));
743 memset(&mon_data_ext, 0, sizeof(struct mxser_mon_ext));
744 memset(&mxser_set_baud_method, 0, sizeof(int) * (MXSER_PORTS + 1));
745 memset(&hwconf, 0, sizeof(struct mxser_hwconf));
746
747 m = 0;
748 /* Start finding ISA boards here */
749 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
750 int cap;
8ea2c2ec 751
1da177e4
LT		 752 if (!(cap = mxserBoardCAP[b]))
753 continue;
754
755 retval = mxser_get_ISA_conf(cap, &hwconf);
756
757 if (retval != 0)
8ea2c2ec
JJ		 758 printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n",
759 mxser_brdname[hwconf.board_type - 1], ioaddr[b]);
1da177e4
LT		 760
761 if (retval <= 0) {
762 if (retval == MXSER_ERR_IRQ)
8ea2c2ec
JJ		 763 printk(KERN_ERR "Invalid interrupt number, "
764 "board not configured\n");
1da177e4 765 else if (retval == MXSER_ERR_IRQ_CONFLIT)
8ea2c2ec
JJ		 766 printk(KERN_ERR "Invalid interrupt number, "
767 "board not configured\n");
1da177e4 768 else if (retval == MXSER_ERR_VECTOR)
8ea2c2ec
JJ		 769 printk(KERN_ERR "Invalid interrupt vector, "
770 "board not configured\n");
1da177e4 771 else if (retval == MXSER_ERR_IOADDR)
8ea2c2ec
JJ		 772 printk(KERN_ERR "Invalid I/O address, "
773 "board not configured\n");
1da177e4
LT		 774
775 continue;
776 }
777
778 hwconf.pciInfo.busNum = 0;
779 hwconf.pciInfo.devNum = 0;
780 hwconf.pciInfo.pdev = NULL;
781
782 mxser_getcfg(m, &hwconf);
8ea2c2ec
JJ		 783 /*
784 * init mxsercfg first,
785 * or mxsercfg data is not correct on ISR.
786 */
787 /* mxser_initbrd will hook ISR. */
1da177e4
LT		 788 if (mxser_initbrd(m, &hwconf) < 0)
789 continue;
790
1da177e4
LT		 791 m++;
792 }
793
794 /* Start finding ISA boards from module arg */
795 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
796 int cap;
8ea2c2ec 797
1da177e4
LT		 798 if (!(cap = ioaddr[b]))
799 continue;
800
801 retval = mxser_get_ISA_conf(cap, &hwconf);
802
803 if (retval != 0)
8ea2c2ec
JJ		 804 printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n",
805 mxser_brdname[hwconf.board_type - 1], ioaddr[b]);
1da177e4
LT		 806
807 if (retval <= 0) {
808 if (retval == MXSER_ERR_IRQ)
8ea2c2ec
JJ		 809 printk(KERN_ERR "Invalid interrupt number, "
810 "board not configured\n");
1da177e4 811 else if (retval == MXSER_ERR_IRQ_CONFLIT)
8ea2c2ec
JJ		 812 printk(KERN_ERR "Invalid interrupt number, "
813 "board not configured\n");
1da177e4 814 else if (retval == MXSER_ERR_VECTOR)
8ea2c2ec
JJ		 815 printk(KERN_ERR "Invalid interrupt vector, "
816 "board not configured\n");
1da177e4 817 else if (retval == MXSER_ERR_IOADDR)
8ea2c2ec
JJ		 818 printk(KERN_ERR "Invalid I/O address, "
819 "board not configured\n");
1da177e4
LT		 820
821 continue;
822 }
823
824 hwconf.pciInfo.busNum = 0;
825 hwconf.pciInfo.devNum = 0;
826 hwconf.pciInfo.pdev = NULL;
827
828 mxser_getcfg(m, &hwconf);
8ea2c2ec
JJ		 829 /*
830 * init mxsercfg first,
831 * or mxsercfg data is not correct on ISR.
832 */
833 /* mxser_initbrd will hook ISR. */
1da177e4
LT		 834 if (mxser_initbrd(m, &hwconf) < 0)
835 continue;
836
837 m++;
838 }
839
840 /* start finding PCI board here */
841#ifdef CONFIG_PCI
fe971071 842 n = ARRAY_SIZE(mxser_pcibrds) - 1;
1da177e4
LT		 843 index = 0;
844 b = 0;
845 while (b < n) {
1187ece3 846 pdev = pci_get_device(mxser_pcibrds[b].vendor,
8ea2c2ec 847 mxser_pcibrds[b].device, pdev);
1187ece3 848 if (pdev == NULL) {
1da177e4
LT		 849 b++;
850 continue;
851 }
852 hwconf.pciInfo.busNum = busnum = pdev->bus->number;
853 hwconf.pciInfo.devNum = devnum = PCI_SLOT(pdev->devfn) << 3;
854 hwconf.pciInfo.pdev = pdev;
8ea2c2ec
JJ		 855 printk(KERN_INFO "Found MOXA %s board(BusNo=%d,DevNo=%d)\n",
856 mxser_brdname[(int) (mxser_pcibrds[b].driver_data) - 1],
857 busnum, devnum >> 3);
1da177e4 858 index++;
8ea2c2ec
JJ		 859 if (m >= MXSER_BOARDS)
860 printk(KERN_ERR
861 "Too many Smartio/Industio family boards find "
862 "(maximum %d), board not configured\n",
863 MXSER_BOARDS);
864 else {
1da177e4 865 if (pci_enable_device(pdev)) {
8ea2c2ec
JJ		 866 printk(KERN_ERR "Moxa SmartI/O PCI enable "
867 "fail !\n");
1da177e4
LT		 868 continue;
869 }
8ea2c2ec
JJ		 870 retval = mxser_get_PCI_conf(busnum, devnum,
871 (int)mxser_pcibrds[b].driver_data,
872 &hwconf);
1da177e4
LT		 873 if (retval < 0) {
874 if (retval == MXSER_ERR_IRQ)
8ea2c2ec
JJ		 875 printk(KERN_ERR
876 "Invalid interrupt number, "
877 "board not configured\n");
1da177e4 878 else if (retval == MXSER_ERR_IRQ_CONFLIT)
8ea2c2ec
JJ		 879 printk(KERN_ERR
880 "Invalid interrupt number, "
881 "board not configured\n");
1da177e4 882 else if (retval == MXSER_ERR_VECTOR)
8ea2c2ec
JJ		 883 printk(KERN_ERR
884 "Invalid interrupt vector, "
885 "board not configured\n");
1da177e4 886 else if (retval == MXSER_ERR_IOADDR)
8ea2c2ec
JJ		 887 printk(KERN_ERR
888 "Invalid I/O address, "
889 "board not configured\n");
1da177e4
LT		 890 continue;
891 }
892 mxser_getcfg(m, &hwconf);
8ea2c2ec
JJ		 893 /* init mxsercfg first,
894 * or mxsercfg data is not correct on ISR.
895 */
896 /* mxser_initbrd will hook ISR. */
1da177e4
LT		 897 if (mxser_initbrd(m, &hwconf) < 0)
898 continue;
899 m++;
1187ece3
AC		 900 /* Keep an extra reference if we succeeded. It will
901 be returned at unload time */
902 pci_dev_get(pdev);
1da177e4
LT		 903 }
904 }
905#endif
906
64698b69
KS		 907 retval = tty_register_driver(mxvar_sdriver);
908 if (retval) {
8ea2c2ec
JJ		 909 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family"
910 " driver !\n");
64698b69 911 put_tty_driver(mxvar_sdriver);
1da177e4 912
1da177e4
LT		 913 for (i = 0; i < MXSER_BOARDS; i++) {
914 if (mxsercfg[i].board_type == -1)
915 continue;
916 else {
917 free_irq(mxsercfg[i].irq, &mxvar_table[i * MXSER_PORTS_PER_BOARD]);
8ea2c2ec 918 /* todo: release io, vector */
1da177e4
LT		 919 }
920 }
64698b69 921 return retval;
1da177e4
LT		 922 }
923
64698b69 924 return 0;
1da177e4
LT		 925}
926
c4028958 927static void mxser_do_softint(struct work_struct *work)
1da177e4 928{
c4028958
DH		 929 struct mxser_struct *info =
930 container_of(work, struct mxser_struct, tqueue);
1da177e4
LT		 931 struct tty_struct *tty;
932
933 tty = info->tty;
934
935 if (tty) {
936 if (test_and_clear_bit(MXSER_EVENT_TXLOW, &info->event))
937 tty_wakeup(tty);
938 if (test_and_clear_bit(MXSER_EVENT_HANGUP, &info->event))
939 tty_hangup(tty);
940 }
941}
942
943static unsigned char mxser_get_msr(int baseaddr, int mode, int port, struct mxser_struct *info)
944{
945 unsigned char status = 0;
946
947 status = inb(baseaddr + UART_MSR);
948
949 mxser_msr[port] &= 0x0F;
950 mxser_msr[port] |= status;
951 status = mxser_msr[port];
952 if (mode)
953 mxser_msr[port] = 0;
954
955 return status;
956}
957
958/*
959 * This routine is called whenever a serial port is opened. It
960 * enables interrupts for a serial port, linking in its async structure into
961 * the IRQ chain. It also performs the serial-specific
962 * initialization for the tty structure.
963 */
964static int mxser_open(struct tty_struct *tty, struct file *filp)
965{
966 struct mxser_struct *info;
967 int retval, line;
968
6f08b72c
KS		 969 /* initialize driver_data in case something fails */
970 tty->driver_data = NULL;
971
1da177e4
LT		 972 line = tty->index;
973 if (line == MXSER_PORTS)
974 return 0;
975 if (line < 0 || line > MXSER_PORTS)
976 return -ENODEV;
977 info = mxvar_table + line;
978 if (!info->base)
8ea2c2ec 979 return -ENODEV;
1da177e4
LT		 980
981 tty->driver_data = info;
982 info->tty = tty;
983 /*
984 * Start up serial port
985 */
986 retval = mxser_startup(info);
987 if (retval)
8ea2c2ec 988 return retval;
1da177e4
LT		 989
990 retval = mxser_block_til_ready(tty, filp, info);
991 if (retval)
8ea2c2ec 992 return retval;
1da177e4
LT		 993
994 info->count++;
995
996 if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
997 if (tty->driver->subtype == SERIAL_TYPE_NORMAL)
998 *tty->termios = info->normal_termios;
999 else
1000 *tty->termios = info->callout_termios;
1001 mxser_change_speed(info, NULL);
1002 }
1003
937949d9 1004 info->session = process_session(current);
1da177e4 1005 info->pgrp = process_group(current);
1da177e4 1006
8ea2c2ec
JJ		 1007 /*
1008 status = mxser_get_msr(info->base, 0, info->port);
1009 mxser_check_modem_status(info, status);
1010 */
1da177e4 1011
8ea2c2ec 1012/* unmark here for very high baud rate (ex. 921600 bps) used */
1da177e4
LT		 1013 tty->low_latency = 1;
1014 return 0;
1015}
1016
1017/*
1018 * This routine is called when the serial port gets closed. First, we
1019 * wait for the last remaining data to be sent. Then, we unlink its
1020 * async structure from the interrupt chain if necessary, and we free
1021 * that IRQ if nothing is left in the chain.
1022 */
1023static void mxser_close(struct tty_struct *tty, struct file *filp)
1024{
56e139f6 1025 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1026
1027 unsigned long timeout;
1028 unsigned long flags;
1029 struct tty_ldisc *ld;
1030
1031 if (tty->index == MXSER_PORTS)
1032 return;
1033 if (!info)
6f08b72c 1034 return;
1da177e4
LT		 1035
1036 spin_lock_irqsave(&info->slock, flags);
1037
1038 if (tty_hung_up_p(filp)) {
1039 spin_unlock_irqrestore(&info->slock, flags);
1040 return;
1041 }
1042 if ((tty->count == 1) && (info->count != 1)) {
1043 /*
1044 * Uh, oh. tty->count is 1, which means that the tty
1045 * structure will be freed. Info->count should always
1046 * be one in these conditions. If it's greater than
1047 * one, we've got real problems, since it means the
1048 * serial port won't be shutdown.
1049 */
8ea2c2ec
JJ		 1050 printk(KERN_ERR "mxser_close: bad serial port count; "
1051 "tty->count is 1, info->count is %d\n", info->count);
1da177e4
LT		 1052 info->count = 1;
1053 }
1054 if (--info->count < 0) {
8ea2c2ec
JJ		 1055 printk(KERN_ERR "mxser_close: bad serial port count for "
1056 "ttys%d: %d\n", info->port, info->count);
1da177e4
LT		 1057 info->count = 0;
1058 }
1059 if (info->count) {
1060 spin_unlock_irqrestore(&info->slock, flags);
1061 return;
1062 }
1063 info->flags |= ASYNC_CLOSING;
1064 spin_unlock_irqrestore(&info->slock, flags);
1065 /*
1066 * Save the termios structure, since this port may have
1067 * separate termios for callout and dialin.
1068 */
1069 if (info->flags & ASYNC_NORMAL_ACTIVE)
1070 info->normal_termios = *tty->termios;
1071 /*
1072 * Now we wait for the transmit buffer to clear; and we notify
1073 * the line discipline to only process XON/XOFF characters.
1074 */
1075 tty->closing = 1;
1076 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1077 tty_wait_until_sent(tty, info->closing_wait);
1078 /*
1079 * At this point we stop accepting input. To do this, we
1080 * disable the receive line status interrupts, and tell the
1081 * interrupt driver to stop checking the data ready bit in the
1082 * line status register.
1083 */
1084 info->IER &= ~UART_IER_RLSI;
1085 if (info->IsMoxaMustChipFlag)
1086 info->IER &= ~MOXA_MUST_RECV_ISR;
1087/* by William
1088 info->read_status_mask &= ~UART_LSR_DR;
1089*/
1090 if (info->flags & ASYNC_INITIALIZED) {
1091 outb(info->IER, info->base + UART_IER);
1092 /*
1093 * Before we drop DTR, make sure the UART transmitter
1094 * has completely drained; this is especially
1095 * important if there is a transmit FIFO!
1096 */
1097 timeout = jiffies + HZ;
1098 while (!(inb(info->base + UART_LSR) & UART_LSR_TEMT)) {
da4cd8df 1099 schedule_timeout_interruptible(5);
1da177e4
LT		 1100 if (time_after(jiffies, timeout))
1101 break;
1102 }
1103 }
1104 mxser_shutdown(info);
1105
1106 if (tty->driver->flush_buffer)
1107 tty->driver->flush_buffer(tty);
1108
1109 ld = tty_ldisc_ref(tty);
1110 if (ld) {
8ea2c2ec 1111 if (ld->flush_buffer)
1da177e4
LT		 1112 ld->flush_buffer(tty);
1113 tty_ldisc_deref(ld);
1114 }
1115
1116 tty->closing = 0;
1117 info->event = 0;
1118 info->tty = NULL;
1119 if (info->blocked_open) {
da4cd8df
NA		 1120 if (info->close_delay)
1121 schedule_timeout_interruptible(info->close_delay);
1da177e4
LT		 1122 wake_up_interruptible(&info->open_wait);
1123 }
1124
1125 info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
1126 wake_up_interruptible(&info->close_wait);
1127
1128}
1129
1130static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1131{
1132 int c, total = 0;
56e139f6 1133 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1134 unsigned long flags;
1135
8a7f7c93 1136 if (!info->xmit_buf)
8ea2c2ec 1137 return 0;
1da177e4
LT		 1138
1139 while (1) {
8ea2c2ec
JJ		 1140 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1141 SERIAL_XMIT_SIZE - info->xmit_head));
1da177e4
LT		 1142 if (c <= 0)
1143 break;
1144
1145 memcpy(info->xmit_buf + info->xmit_head, buf, c);
1146 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 1147 info->xmit_head = (info->xmit_head + c) &
1148 (SERIAL_XMIT_SIZE - 1);
1da177e4
LT		 1149 info->xmit_cnt += c;
1150 spin_unlock_irqrestore(&info->slock, flags);
1151
1152 buf += c;
1153 count -= c;
1154 total += c;
1da177e4
LT		 1155 }
1156
1157 if (info->xmit_cnt && !tty->stopped && !(info->IER & UART_IER_THRI)) {
8ea2c2ec
JJ		 1158 if (!tty->hw_stopped ||
1159 (info->type == PORT_16550A) ||
1160 (info->IsMoxaMustChipFlag)) {
1da177e4
LT		 1161 spin_lock_irqsave(&info->slock, flags);
1162 info->IER |= UART_IER_THRI;
1163 outb(info->IER, info->base + UART_IER);
1164 spin_unlock_irqrestore(&info->slock, flags);
1165 }
1166 }
1167 return total;
1168}
1169
1170static void mxser_put_char(struct tty_struct *tty, unsigned char ch)
1171{
56e139f6 1172 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1173 unsigned long flags;
1174
8a7f7c93 1175 if (!info->xmit_buf)
1da177e4
LT		 1176 return;
1177
1178 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1179 return;
1180
1181 spin_lock_irqsave(&info->slock, flags);
1182 info->xmit_buf[info->xmit_head++] = ch;
1183 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1184 info->xmit_cnt++;
1185 spin_unlock_irqrestore(&info->slock, flags);
1186 if (!tty->stopped && !(info->IER & UART_IER_THRI)) {
8ea2c2ec
JJ		 1187 if (!tty->hw_stopped ||
1188 (info->type == PORT_16550A) ||
1189 info->IsMoxaMustChipFlag) {
1da177e4
LT		 1190 spin_lock_irqsave(&info->slock, flags);
1191 info->IER |= UART_IER_THRI;
1192 outb(info->IER, info->base + UART_IER);
1193 spin_unlock_irqrestore(&info->slock, flags);
1194 }
1195 }
1196}
1197
1198
1199static void mxser_flush_chars(struct tty_struct *tty)
1200{
56e139f6 1201 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1202 unsigned long flags;
1203
8ea2c2ec
JJ		 1204 if (info->xmit_cnt <= 0 ||
1205 tty->stopped ||
1206 !info->xmit_buf ||
1207 (tty->hw_stopped &&
1208 (info->type != PORT_16550A) &&
1209 (!info->IsMoxaMustChipFlag)
1210 ))
1da177e4
LT		 1211 return;
1212
1213 spin_lock_irqsave(&info->slock, flags);
1214
1215 info->IER |= UART_IER_THRI;
1216 outb(info->IER, info->base + UART_IER);
1217
1218 spin_unlock_irqrestore(&info->slock, flags);
1219}
1220
1221static int mxser_write_room(struct tty_struct *tty)
1222{
56e139f6 1223 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1224 int ret;
1225
1226 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1227 if (ret < 0)
1228 ret = 0;
8ea2c2ec 1229 return ret;
1da177e4
LT		 1230}
1231
1232static int mxser_chars_in_buffer(struct tty_struct *tty)
1233{
56e139f6 1234 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1235 return info->xmit_cnt;
1236}
1237
1238static void mxser_flush_buffer(struct tty_struct *tty)
1239{
56e139f6 1240 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1241 char fcr;
1242 unsigned long flags;
1243
1244
1245 spin_lock_irqsave(&info->slock, flags);
1246 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1247
1248 /* below added by shinhay */
1249 fcr = inb(info->base + UART_FCR);
8ea2c2ec
JJ		 1250 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1251 info->base + UART_FCR);
1da177e4
LT		 1252 outb(fcr, info->base + UART_FCR);
1253
1254 spin_unlock_irqrestore(&info->slock, flags);
1255 /* above added by shinhay */
1256
b963a844 1257 tty_wakeup(tty);
1da177e4
LT		 1258}
1259
1260static int mxser_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg)
1261{
56e139f6 1262 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1263 int retval;
1264 struct async_icount cprev, cnow; /* kernel counter temps */
1265 struct serial_icounter_struct __user *p_cuser;
1266 unsigned long templ;
1267 unsigned long flags;
1268 void __user *argp = (void __user *)arg;
1269
1270 if (tty->index == MXSER_PORTS)
8ea2c2ec 1271 return mxser_ioctl_special(cmd, argp);
1da177e4 1272
8ea2c2ec 1273 /* following add by Victor Yu. 01-05-2004 */
1da177e4
LT		 1274 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1275 int opmode, p;
1276 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1277 int shiftbit;
1278 unsigned char val, mask;
1279
1280 p = info->port % 4;
1281 if (cmd == MOXA_SET_OP_MODE) {
1282 if (get_user(opmode, (int __user *) argp))
1283 return -EFAULT;
8ea2c2ec
JJ		 1284 if (opmode != RS232_MODE &&
1285 opmode != RS485_2WIRE_MODE &&
1286 opmode != RS422_MODE &&
1287 opmode != RS485_4WIRE_MODE)
1da177e4
LT		 1288 return -EFAULT;
1289 mask = ModeMask[p];
1290 shiftbit = p * 2;
1291 val = inb(info->opmode_ioaddr);
1292 val &= mask;
1293 val |= (opmode << shiftbit);
1294 outb(val, info->opmode_ioaddr);
1295 } else {
1296 shiftbit = p * 2;
1297 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1298 opmode &= OP_MODE_MASK;
1299 if (copy_to_user(argp, &opmode, sizeof(int)))
1300 return -EFAULT;
1301 }
1302 return 0;
1303 }
8ea2c2ec 1304 /* above add by Victor Yu. 01-05-2004 */
1da177e4
LT		 1305
1306 if ((cmd != TIOCGSERIAL) && (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
1307 if (tty->flags & (1 << TTY_IO_ERROR))
8ea2c2ec 1308 return -EIO;
1da177e4
LT		 1309 }
1310 switch (cmd) {
1311 case TCSBRK: /* SVID version: non-zero arg --> no break */
1312 retval = tty_check_change(tty);
1313 if (retval)
8ea2c2ec 1314 return retval;
1da177e4
LT		 1315 tty_wait_until_sent(tty, 0);
1316 if (!arg)
1317 mxser_send_break(info, HZ / 4); /* 1/4 second */
8ea2c2ec 1318 return 0;
1da177e4
LT		 1319 case TCSBRKP: /* support for POSIX tcsendbreak() */
1320 retval = tty_check_change(tty);
1321 if (retval)
8ea2c2ec 1322 return retval;
1da177e4
LT		 1323 tty_wait_until_sent(tty, 0);
1324 mxser_send_break(info, arg ? arg * (HZ / 10) : HZ / 4);
8ea2c2ec 1325 return 0;
1da177e4 1326 case TIOCGSOFTCAR:
8ea2c2ec 1327 return put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long __user *)argp);
1da177e4
LT		 1328 case TIOCSSOFTCAR:
1329 if (get_user(templ, (unsigned long __user *) argp))
1330 return -EFAULT;
1331 arg = templ;
1332 tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) | (arg ? CLOCAL : 0));
8ea2c2ec 1333 return 0;
1da177e4
LT		 1334 case TIOCGSERIAL:
1335 return mxser_get_serial_info(info, argp);
1336 case TIOCSSERIAL:
1337 return mxser_set_serial_info(info, argp);
1338 case TIOCSERGETLSR: /* Get line status register */
1339 return mxser_get_lsr_info(info, argp);
1340 /*
1341 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1342 * - mask passed in arg for lines of interest
1343 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1344 * Caller should use TIOCGICOUNT to see which one it was
1345 */
8ea2c2ec 1346 case TIOCMIWAIT: {
1da177e4
LT		 1347 DECLARE_WAITQUEUE(wait, current);
1348 int ret;
1349 spin_lock_irqsave(&info->slock, flags);
1350 cprev = info->icount; /* note the counters on entry */
1351 spin_unlock_irqrestore(&info->slock, flags);
1352
1353 add_wait_queue(&info->delta_msr_wait, &wait);
1354 while (1) {
1355 spin_lock_irqsave(&info->slock, flags);
1356 cnow = info->icount; /* atomic copy */
1357 spin_unlock_irqrestore(&info->slock, flags);
1358
1359 set_current_state(TASK_INTERRUPTIBLE);
8ea2c2ec
JJ		 1360 if (((arg & TIOCM_RNG) &&
1361 (cnow.rng != cprev.rng)) ||
1362 ((arg & TIOCM_DSR) &&
1363 (cnow.dsr != cprev.dsr)) ||
1364 ((arg & TIOCM_CD) &&
1365 (cnow.dcd != cprev.dcd)) ||
1366 ((arg & TIOCM_CTS) &&
1367 (cnow.cts != cprev.cts))) {
1da177e4
LT		 1368 ret = 0;
1369 break;
1370 }
1371 /* see if a signal did it */
1372 if (signal_pending(current)) {
1373 ret = -ERESTARTSYS;
1374 break;
1375 }
1376 cprev = cnow;
1377 }
1378 current->state = TASK_RUNNING;
1379 remove_wait_queue(&info->delta_msr_wait, &wait);
1380 break;
1381 }
1382 /* NOTREACHED */
1383 /*
1384 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1385 * Return: write counters to the user passed counter struct
1386 * NB: both 1->0 and 0->1 transitions are counted except for
1387 * RI where only 0->1 is counted.
1388 */
1389 case TIOCGICOUNT:
1390 spin_lock_irqsave(&info->slock, flags);
1391 cnow = info->icount;
1392 spin_unlock_irqrestore(&info->slock, flags);
1393 p_cuser = argp;
1394 /* modified by casper 1/11/2000 */
1395 if (put_user(cnow.frame, &p_cuser->frame))
1396 return -EFAULT;
1397 if (put_user(cnow.brk, &p_cuser->brk))
1398 return -EFAULT;
1399 if (put_user(cnow.overrun, &p_cuser->overrun))
1400 return -EFAULT;
1401 if (put_user(cnow.buf_overrun, &p_cuser->buf_overrun))
1402 return -EFAULT;
1403 if (put_user(cnow.parity, &p_cuser->parity))
1404 return -EFAULT;
1405 if (put_user(cnow.rx, &p_cuser->rx))
1406 return -EFAULT;
1407 if (put_user(cnow.tx, &p_cuser->tx))
1408 return -EFAULT;
1409 put_user(cnow.cts, &p_cuser->cts);
1410 put_user(cnow.dsr, &p_cuser->dsr);
1411 put_user(cnow.rng, &p_cuser->rng);
1412 put_user(cnow.dcd, &p_cuser->dcd);
1da177e4
LT		 1413 return 0;
1414 case MOXA_HighSpeedOn:
8ea2c2ec
JJ		 1415 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1416 case MOXA_SDS_RSTICOUNTER: {
1da177e4
LT		 1417 info->mon_data.rxcnt = 0;
1418 info->mon_data.txcnt = 0;
1419 return 0;
1420 }
8ea2c2ec 1421/* (above) added by James. */
1da177e4
LT		 1422 case MOXA_ASPP_SETBAUD:{
1423 long baud;
8ea2c2ec 1424 if (get_user(baud, (long __user *)argp))
1da177e4
LT		 1425 return -EFAULT;
1426 mxser_set_baud(info, baud);
1427 return 0;
1428 }
1429 case MOXA_ASPP_GETBAUD:
1430 if (copy_to_user(argp, &info->realbaud, sizeof(long)))
1431 return -EFAULT;
1432
1433 return 0;
1434
1435 case MOXA_ASPP_OQUEUE:{
1436 int len, lsr;
1437
1438 len = mxser_chars_in_buffer(tty);
1439
1440 lsr = inb(info->base + UART_LSR) & UART_LSR_TEMT;
1441
1442 len += (lsr ? 0 : 1);
1443
1444 if (copy_to_user(argp, &len, sizeof(int)))
1445 return -EFAULT;
1446
1447 return 0;
1448 }
8ea2c2ec 1449 case MOXA_ASPP_MON: {
1da177e4 1450 int mcr, status;
8ea2c2ec
JJ		 1451
1452 /* info->mon_data.ser_param = tty->termios->c_cflag; */
1da177e4
LT		 1453
1454 status = mxser_get_msr(info->base, 1, info->port, info);
1455 mxser_check_modem_status(info, status);
1456
1457 mcr = inb(info->base + UART_MCR);
1458 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1459 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1460 else
1461 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1462
1463 if (mcr & MOXA_MUST_MCR_TX_XON)
1464 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1465 else
1466 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1467
1468 if (info->tty->hw_stopped)
1469 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1470 else
1471 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
1472
8ea2c2ec
JJ		 1473 if (copy_to_user(argp, &info->mon_data,
1474 sizeof(struct mxser_mon)))
1da177e4
LT		 1475 return -EFAULT;
1476
1477 return 0;
1da177e4
LT		 1478 }
1479
8ea2c2ec
JJ		 1480 case MOXA_ASPP_LSTATUS: {
1481 if (copy_to_user(argp, &info->err_shadow,
1482 sizeof(unsigned char)))
1da177e4
LT		 1483 return -EFAULT;
1484
1485 info->err_shadow = 0;
1486 return 0;
1da177e4 1487 }
8ea2c2ec 1488 case MOXA_SET_BAUD_METHOD: {
1da177e4 1489 int method;
8ea2c2ec
JJ		 1490
1491 if (get_user(method, (int __user *)argp))
1da177e4
LT		 1492 return -EFAULT;
1493 mxser_set_baud_method[info->port] = method;
1494 if (copy_to_user(argp, &method, sizeof(int)))
1495 return -EFAULT;
1496
1497 return 0;
1498 }
1499 default:
1500 return -ENOIOCTLCMD;
1501 }
1502 return 0;
1503}
1504
1505#ifndef CMSPAR
1506#define CMSPAR 010000000000
1507#endif
1508
1509static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1510{
1511 int i, result, status;
1512
1513 switch (cmd) {
1514 case MOXA_GET_CONF:
8ea2c2ec
JJ		 1515 if (copy_to_user(argp, mxsercfg,
1516 sizeof(struct mxser_hwconf) * 4))
1da177e4
LT		 1517 return -EFAULT;
1518 return 0;
1519 case MOXA_GET_MAJOR:
1520 if (copy_to_user(argp, &ttymajor, sizeof(int)))
1521 return -EFAULT;
1522 return 0;
1523
1524 case MOXA_GET_CUMAJOR:
1525 if (copy_to_user(argp, &calloutmajor, sizeof(int)))
1526 return -EFAULT;
1527 return 0;
1528
1529 case MOXA_CHKPORTENABLE:
1530 result = 0;
1531 for (i = 0; i < MXSER_PORTS; i++) {
1532 if (mxvar_table[i].base)
1533 result |= (1 << i);
1534 }
8ea2c2ec 1535 return put_user(result, (unsigned long __user *)argp);
1da177e4
LT		 1536 case MOXA_GETDATACOUNT:
1537 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
1538 return -EFAULT;
8ea2c2ec 1539 return 0;
1da177e4
LT		 1540 case MOXA_GETMSTATUS:
1541 for (i = 0; i < MXSER_PORTS; i++) {
1542 GMStatus[i].ri = 0;
1543 if (!mxvar_table[i].base) {
1544 GMStatus[i].dcd = 0;
1545 GMStatus[i].dsr = 0;
1546 GMStatus[i].cts = 0;
1547 continue;
1548 }
1549
1550 if (!mxvar_table[i].tty || !mxvar_table[i].tty->termios)
1551 GMStatus[i].cflag = mxvar_table[i].normal_termios.c_cflag;
1552 else
1553 GMStatus[i].cflag = mxvar_table[i].tty->termios->c_cflag;
1554
1555 status = inb(mxvar_table[i].base + UART_MSR);
1556 if (status & 0x80 /*UART_MSR_DCD */ )
1557 GMStatus[i].dcd = 1;
1558 else
1559 GMStatus[i].dcd = 0;
1560
1561 if (status & 0x20 /*UART_MSR_DSR */ )
1562 GMStatus[i].dsr = 1;
1563 else
1564 GMStatus[i].dsr = 0;
1565
1566
1567 if (status & 0x10 /*UART_MSR_CTS */ )
1568 GMStatus[i].cts = 1;
1569 else
1570 GMStatus[i].cts = 0;
1571 }
8ea2c2ec
JJ		 1572 if (copy_to_user(argp, GMStatus,
1573 sizeof(struct mxser_mstatus) * MXSER_PORTS))
1da177e4
LT		 1574 return -EFAULT;
1575 return 0;
8ea2c2ec 1576 case MOXA_ASPP_MON_EXT: {
1da177e4
LT		 1577 int status;
1578 int opmode, p;
1579 int shiftbit;
1580 unsigned cflag, iflag;
1581
1582 for (i = 0; i < MXSER_PORTS; i++) {
1da177e4
LT		 1583 if (!mxvar_table[i].base)
1584 continue;
1585
8ea2c2ec
JJ		 1586 status = mxser_get_msr(mxvar_table[i].base, 0,
1587 i, &(mxvar_table[i]));
1588 /*
1589 mxser_check_modem_status(&mxvar_table[i],
1590 status);
1591 */
1da177e4
LT		 1592 if (status & UART_MSR_TERI)
1593 mxvar_table[i].icount.rng++;
1594 if (status & UART_MSR_DDSR)
1595 mxvar_table[i].icount.dsr++;
1596 if (status & UART_MSR_DDCD)
1597 mxvar_table[i].icount.dcd++;
1598 if (status & UART_MSR_DCTS)
1599 mxvar_table[i].icount.cts++;
1600
1601 mxvar_table[i].mon_data.modem_status = status;
1602 mon_data_ext.rx_cnt[i] = mxvar_table[i].mon_data.rxcnt;
1603 mon_data_ext.tx_cnt[i] = mxvar_table[i].mon_data.txcnt;
1604 mon_data_ext.up_rxcnt[i] = mxvar_table[i].mon_data.up_rxcnt;
1605 mon_data_ext.up_txcnt[i] = mxvar_table[i].mon_data.up_txcnt;
1606 mon_data_ext.modem_status[i] = mxvar_table[i].mon_data.modem_status;
1607 mon_data_ext.baudrate[i] = mxvar_table[i].realbaud;
1608
1609 if (!mxvar_table[i].tty || !mxvar_table[i].tty->termios) {
1610 cflag = mxvar_table[i].normal_termios.c_cflag;
1611 iflag = mxvar_table[i].normal_termios.c_iflag;
1612 } else {
1613 cflag = mxvar_table[i].tty->termios->c_cflag;
1614 iflag = mxvar_table[i].tty->termios->c_iflag;
1615 }
1616
1617 mon_data_ext.databits[i] = cflag & CSIZE;
1618
1619 mon_data_ext.stopbits[i] = cflag & CSTOPB;
1620
1621 mon_data_ext.parity[i] = cflag & (PARENB | PARODD | CMSPAR);
1622
1623 mon_data_ext.flowctrl[i] = 0x00;
1624
1625 if (cflag & CRTSCTS)
1626 mon_data_ext.flowctrl[i] |= 0x03;
1627
1628 if (iflag & (IXON | IXOFF))
1629 mon_data_ext.flowctrl[i] |= 0x0C;
1630
1631 if (mxvar_table[i].type == PORT_16550A)
1632 mon_data_ext.fifo[i] = 1;
1633 else
1634 mon_data_ext.fifo[i] = 0;
1635
1636 p = i % 4;
1637 shiftbit = p * 2;
1638 opmode = inb(mxvar_table[i].opmode_ioaddr) >> shiftbit;
1639 opmode &= OP_MODE_MASK;
1640
1641 mon_data_ext.iftype[i] = opmode;
1642
1643 }
1644 if (copy_to_user(argp, &mon_data_ext, sizeof(struct mxser_mon_ext)))
1645 return -EFAULT;
1646
1647 return 0;
1648
1649 }
1650 default:
1651 return -ENOIOCTLCMD;
1652 }
1653 return 0;
1654}
1655
1da177e4
LT		 1656static void mxser_stoprx(struct tty_struct *tty)
1657{
56e139f6 1658 struct mxser_struct *info = tty->driver_data;
8ea2c2ec 1659 /* unsigned long flags; */
1da177e4
LT		 1660
1661 info->ldisc_stop_rx = 1;
1662 if (I_IXOFF(tty)) {
8ea2c2ec
JJ		 1663 /* MX_LOCK(&info->slock); */
1664 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1665 if (info->IsMoxaMustChipFlag) {
1666 info->IER &= ~MOXA_MUST_RECV_ISR;
1667 outb(info->IER, info->base + UART_IER);
1668 } else {
8ea2c2ec 1669 /* above add by Victor Yu. 09-02-2002 */
1da177e4 1670 info->x_char = STOP_CHAR(tty);
8ea2c2ec
JJ		 1671 /* mask by Victor Yu. 09-02-2002 */
1672 /* outb(info->IER, 0); */
1da177e4
LT		 1673 outb(0, info->base + UART_IER);
1674 info->IER |= UART_IER_THRI;
8ea2c2ec
JJ		 1675 /* force Tx interrupt */
1676 outb(info->IER, info->base + UART_IER);
1677 } /* add by Victor Yu. 09-02-2002 */
1678 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1679 }
1680
1681 if (info->tty->termios->c_cflag & CRTSCTS) {
8ea2c2ec 1682 /* MX_LOCK(&info->slock); */
1da177e4
LT		 1683 info->MCR &= ~UART_MCR_RTS;
1684 outb(info->MCR, info->base + UART_MCR);
8ea2c2ec 1685 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1686 }
1687}
1688
1689static void mxser_startrx(struct tty_struct *tty)
1690{
56e139f6 1691 struct mxser_struct *info = tty->driver_data;
8ea2c2ec 1692 /* unsigned long flags; */
1da177e4
LT		 1693
1694 info->ldisc_stop_rx = 0;
1695 if (I_IXOFF(tty)) {
1696 if (info->x_char)
1697 info->x_char = 0;
1698 else {
8ea2c2ec 1699 /* MX_LOCK(&info->slock); */
1da177e4 1700
8ea2c2ec 1701 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1702 if (info->IsMoxaMustChipFlag) {
1703 info->IER |= MOXA_MUST_RECV_ISR;
1704 outb(info->IER, info->base + UART_IER);
1705 } else {
8ea2c2ec 1706 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1707
1708 info->x_char = START_CHAR(tty);
8ea2c2ec
JJ		 1709 /* mask by Victor Yu. 09-02-2002 */
1710 /* outb(info->IER, 0); */
1711 /* add by Victor Yu. 09-02-2002 */
1712 outb(0, info->base + UART_IER);
1713 /* force Tx interrupt */
1714 info->IER |= UART_IER_THRI;
1da177e4 1715 outb(info->IER, info->base + UART_IER);
8ea2c2ec
JJ		 1716 } /* add by Victor Yu. 09-02-2002 */
1717 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1718 }
1719 }
1720
1721 if (info->tty->termios->c_cflag & CRTSCTS) {
8ea2c2ec 1722 /* MX_LOCK(&info->slock); */
1da177e4
LT		 1723 info->MCR |= UART_MCR_RTS;
1724 outb(info->MCR, info->base + UART_MCR);
8ea2c2ec 1725 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1726 }
1727}
1728
1729/*
1730 * This routine is called by the upper-layer tty layer to signal that
1731 * incoming characters should be throttled.
1732 */
1733static void mxser_throttle(struct tty_struct *tty)
1734{
8ea2c2ec
JJ		 1735 /* struct mxser_struct *info = tty->driver_data; */
1736 /* unsigned long flags; */
1737
1738 /* MX_LOCK(&info->slock); */
1da177e4 1739 mxser_stoprx(tty);
8ea2c2ec 1740 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1741}
1742
1743static void mxser_unthrottle(struct tty_struct *tty)
1744{
8ea2c2ec
JJ		 1745 /* struct mxser_struct *info = tty->driver_data; */
1746 /* unsigned long flags; */
1747
1748 /* MX_LOCK(&info->slock); */
1da177e4 1749 mxser_startrx(tty);
8ea2c2ec 1750 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1751}
1752
606d099c 1753static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1da177e4 1754{
56e139f6 1755 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1756 unsigned long flags;
1757
8ea2c2ec
JJ		 1758 if ((tty->termios->c_cflag != old_termios->c_cflag) ||
1759 (RELEVANT_IFLAG(tty->termios->c_iflag) != RELEVANT_IFLAG(old_termios->c_iflag))) {
1da177e4
LT		 1760
1761 mxser_change_speed(info, old_termios);
1762
8ea2c2ec
JJ		 1763 if ((old_termios->c_cflag & CRTSCTS) &&
1764 !(tty->termios->c_cflag & CRTSCTS)) {
1da177e4
LT		 1765 tty->hw_stopped = 0;
1766 mxser_start(tty);
1767 }
1768 }
1769
1770/* Handle sw stopped */
8ea2c2ec
JJ		 1771 if ((old_termios->c_iflag & IXON) &&
1772 !(tty->termios->c_iflag & IXON)) {
1da177e4
LT		 1773 tty->stopped = 0;
1774
8ea2c2ec 1775 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1776 if (info->IsMoxaMustChipFlag) {
1777 spin_lock_irqsave(&info->slock, flags);
1778 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
1779 spin_unlock_irqrestore(&info->slock, flags);
1780 }
8ea2c2ec 1781 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1782
1783 mxser_start(tty);
1784 }
1785}
1786
1787/*
1788 * mxser_stop() and mxser_start()
1789 *
1790 * This routines are called before setting or resetting tty->stopped.
1791 * They enable or disable transmitter interrupts, as necessary.
1792 */
1793static void mxser_stop(struct tty_struct *tty)
1794{
56e139f6 1795 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1796 unsigned long flags;
1797
1798 spin_lock_irqsave(&info->slock, flags);
1799 if (info->IER & UART_IER_THRI) {
1800 info->IER &= ~UART_IER_THRI;
1801 outb(info->IER, info->base + UART_IER);
1802 }
1803 spin_unlock_irqrestore(&info->slock, flags);
1804}
1805
1806static void mxser_start(struct tty_struct *tty)
1807{
56e139f6 1808 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1809 unsigned long flags;
1810
1811 spin_lock_irqsave(&info->slock, flags);
1812 if (info->xmit_cnt && info->xmit_buf && !(info->IER & UART_IER_THRI)) {
1813 info->IER |= UART_IER_THRI;
1814 outb(info->IER, info->base + UART_IER);
1815 }
1816 spin_unlock_irqrestore(&info->slock, flags);
1817}
1818
1819/*
1820 * mxser_wait_until_sent() --- wait until the transmitter is empty
1821 */
1822static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
1823{
56e139f6 1824 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1825 unsigned long orig_jiffies, char_time;
1826 int lsr;
1827
1828 if (info->type == PORT_UNKNOWN)
1829 return;
1830
1831 if (info->xmit_fifo_size == 0)
1832 return; /* Just in case.... */
1833
1834 orig_jiffies = jiffies;
1835 /*
1836 * Set the check interval to be 1/5 of the estimated time to
1837 * send a single character, and make it at least 1. The check
1838 * interval should also be less than the timeout.
1839 *
1840 * Note: we have to use pretty tight timings here to satisfy
1841 * the NIST-PCTS.
1842 */
1843 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
1844 char_time = char_time / 5;
1845 if (char_time == 0)
1846 char_time = 1;
1847 if (timeout && timeout < char_time)
1848 char_time = timeout;
1849 /*
1850 * If the transmitter hasn't cleared in twice the approximate
1851 * amount of time to send the entire FIFO, it probably won't
1852 * ever clear. This assumes the UART isn't doing flow
1853 * control, which is currently the case. Hence, if it ever
1854 * takes longer than info->timeout, this is probably due to a
1855 * UART bug of some kind. So, we clamp the timeout parameter at
1856 * 2*info->timeout.
1857 */
1858 if (!timeout || timeout > 2 * info->timeout)
1859 timeout = 2 * info->timeout;
1860#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
8ea2c2ec
JJ		 1861 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
1862 timeout, char_time);
1da177e4
LT		 1863 printk("jiff=%lu...", jiffies);
1864#endif
1865 while (!((lsr = inb(info->base + UART_LSR)) & UART_LSR_TEMT)) {
1866#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1867 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
1868#endif
da4cd8df 1869 schedule_timeout_interruptible(char_time);
1da177e4
LT		 1870 if (signal_pending(current))
1871 break;
1872 if (timeout && time_after(jiffies, orig_jiffies + timeout))
1873 break;
1874 }
1875 set_current_state(TASK_RUNNING);
1876
1877#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1878 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
1879#endif
1880}
1881
1882
1883/*
1884 * This routine is called by tty_hangup() when a hangup is signaled.
1885 */
1886void mxser_hangup(struct tty_struct *tty)
1887{
56e139f6 1888 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1889
1890 mxser_flush_buffer(tty);
1891 mxser_shutdown(info);
1892 info->event = 0;
1893 info->count = 0;
1894 info->flags &= ~ASYNC_NORMAL_ACTIVE;
1895 info->tty = NULL;
1896 wake_up_interruptible(&info->open_wait);
1897}
1898
1899
8ea2c2ec 1900/* added by James 03-12-2004. */
1da177e4
LT		 1901/*
1902 * mxser_rs_break() --- routine which turns the break handling on or off
1903 */
1904static void mxser_rs_break(struct tty_struct *tty, int break_state)
1905{
56e139f6 1906 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1907 unsigned long flags;
1908
1909 spin_lock_irqsave(&info->slock, flags);
1910 if (break_state == -1)
8ea2c2ec
JJ		 1911 outb(inb(info->base + UART_LCR) | UART_LCR_SBC,
1912 info->base + UART_LCR);
1da177e4 1913 else
8ea2c2ec
JJ		 1914 outb(inb(info->base + UART_LCR) & ~UART_LCR_SBC,
1915 info->base + UART_LCR);
1da177e4
LT		 1916 spin_unlock_irqrestore(&info->slock, flags);
1917}
1918
8ea2c2ec 1919/* (above) added by James. */
1da177e4
LT		 1920
1921
1922/*
1923 * This is the serial driver's generic interrupt routine
1924 */
7d12e780 1925static irqreturn_t mxser_interrupt(int irq, void *dev_id)
1da177e4
LT		 1926{
1927 int status, iir, i;
1928 struct mxser_struct *info;
1929 struct mxser_struct *port;
1930 int max, irqbits, bits, msr;
1931 int pass_counter = 0;
1932 int handled = IRQ_NONE;
1933
1934 port = NULL;
8ea2c2ec 1935 /* spin_lock(&gm_lock); */
1da177e4
LT		 1936
1937 for (i = 0; i < MXSER_BOARDS; i++) {
1938 if (dev_id == &(mxvar_table[i * MXSER_PORTS_PER_BOARD])) {
1939 port = dev_id;
1940 break;
1941 }
1942 }
1943
8ea2c2ec 1944 if (i == MXSER_BOARDS)
1da177e4 1945 goto irq_stop;
8ea2c2ec 1946 if (port == 0)
1da177e4 1947 goto irq_stop;
1da177e4
LT		 1948 max = mxser_numports[mxsercfg[i].board_type - 1];
1949 while (1) {
1950 irqbits = inb(port->vector) & port->vectormask;
8ea2c2ec 1951 if (irqbits == port->vectormask)
1da177e4 1952 break;
1da177e4
LT		 1953
1954 handled = IRQ_HANDLED;
1955 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
8ea2c2ec 1956 if (irqbits == port->vectormask)
1da177e4 1957 break;
1da177e4
LT		 1958 if (bits & irqbits)
1959 continue;
1960 info = port + i;
1961
8ea2c2ec 1962 /* following add by Victor Yu. 09-13-2002 */
1da177e4
LT		 1963 iir = inb(info->base + UART_IIR);
1964 if (iir & UART_IIR_NO_INT)
1965 continue;
1966 iir &= MOXA_MUST_IIR_MASK;
1967 if (!info->tty) {
1968 status = inb(info->base + UART_LSR);
1969 outb(0x27, info->base + UART_FCR);
1970 inb(info->base + UART_MSR);
1971 continue;
1972 }
8ea2c2ec 1973 /* above add by Victor Yu. 09-13-2002 */
1da177e4 1974 /*
8ea2c2ec 1975 if (info->tty->flip.count < TTY_FLIPBUF_SIZE / 4) {
1da177e4
LT		 1976 info->IER |= MOXA_MUST_RECV_ISR;
1977 outb(info->IER, info->base + UART_IER);
1978 }
1979 */
1980
1981
1982 /* mask by Victor Yu. 09-13-2002
1983 if ( !info->tty ||
1984 (inb(info->base + UART_IIR) & UART_IIR_NO_INT) )
1985 continue;
1986 */
1987 /* mask by Victor Yu. 09-02-2002
1988 status = inb(info->base + UART_LSR) & info->read_status_mask;
1989 */
1990
8ea2c2ec 1991 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1992 status = inb(info->base + UART_LSR);
1993
8ea2c2ec 1994 if (status & UART_LSR_PE)
1da177e4 1995 info->err_shadow |= NPPI_NOTIFY_PARITY;
8ea2c2ec 1996 if (status & UART_LSR_FE)
1da177e4 1997 info->err_shadow |= NPPI_NOTIFY_FRAMING;
8ea2c2ec 1998 if (status & UART_LSR_OE)
1da177e4 1999 info->err_shadow |= NPPI_NOTIFY_HW_OVERRUN;
1da177e4
LT		 2000 if (status & UART_LSR_BI)
2001 info->err_shadow |= NPPI_NOTIFY_BREAK;
2002
2003 if (info->IsMoxaMustChipFlag) {
2004 /*
2005 if ( (status & 0x02) && !(status & 0x01) ) {
2006 outb(info->base+UART_FCR, 0x23);
2007 continue;
2008 }
2009 */
8ea2c2ec
JJ		 2010 if (iir == MOXA_MUST_IIR_GDA ||
2011 iir == MOXA_MUST_IIR_RDA ||
2012 iir == MOXA_MUST_IIR_RTO ||
2013 iir == MOXA_MUST_IIR_LSR)
1da177e4
LT		 2014 mxser_receive_chars(info, &status);
2015
2016 } else {
8ea2c2ec 2017 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2018
2019 status &= info->read_status_mask;
2020 if (status & UART_LSR_DR)
2021 mxser_receive_chars(info, &status);
2022 }
2023 msr = inb(info->base + UART_MSR);
2024 if (msr & UART_MSR_ANY_DELTA) {
2025 mxser_check_modem_status(info, msr);
2026 }
8ea2c2ec 2027 /* following add by Victor Yu. 09-13-2002 */
1da177e4
LT		 2028 if (info->IsMoxaMustChipFlag) {
2029 if ((iir == 0x02) && (status & UART_LSR_THRE)) {
2030 mxser_transmit_chars(info);
2031 }
2032 } else {
8ea2c2ec 2033 /* above add by Victor Yu. 09-13-2002 */
1da177e4
LT		 2034
2035 if (status & UART_LSR_THRE) {
2036/* 8-2-99 by William
2037 if ( info->x_char || (info->xmit_cnt > 0) )
2038*/
2039 mxser_transmit_chars(info);
2040 }
2041 }
2042 }
2043 if (pass_counter++ > MXSER_ISR_PASS_LIMIT) {
2044 break; /* Prevent infinite loops */
2045 }
2046 }
2047
2048 irq_stop:
8ea2c2ec 2049 /* spin_unlock(&gm_lock); */
1da177e4
LT		 2050 return handled;
2051}
2052
2053static void mxser_receive_chars(struct mxser_struct *info, int *status)
2054{
2055 struct tty_struct *tty = info->tty;
2056 unsigned char ch, gdl;
2057 int ignored = 0;
2058 int cnt = 0;
1da177e4
LT		 2059 int recv_room;
2060 int max = 256;
2061 unsigned long flags;
2062
2063 spin_lock_irqsave(&info->slock, flags);
2064
33f0f88f 2065 recv_room = tty->receive_room;
1da177e4 2066 if ((recv_room == 0) && (!info->ldisc_stop_rx)) {
8ea2c2ec 2067 /* mxser_throttle(tty); */
1da177e4 2068 mxser_stoprx(tty);
8ea2c2ec 2069 /* return; */
1da177e4
LT		 2070 }
2071
8ea2c2ec 2072 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2073 if (info->IsMoxaMustChipFlag != MOXA_OTHER_UART) {
2074
2075 if (*status & UART_LSR_SPECIAL) {
2076 goto intr_old;
2077 }
8ea2c2ec
JJ		 2078 /* following add by Victor Yu. 02-11-2004 */
2079 if (info->IsMoxaMustChipFlag == MOXA_MUST_MU860_HWID &&
2080 (*status & MOXA_MUST_LSR_RERR))
1da177e4 2081 goto intr_old;
8ea2c2ec 2082 /* above add by Victor Yu. 02-14-2004 */
1da177e4
LT		 2083 if (*status & MOXA_MUST_LSR_RERR)
2084 goto intr_old;
2085
2086 gdl = inb(info->base + MOXA_MUST_GDL_REGISTER);
2087
8ea2c2ec
JJ		 2088 /* add by Victor Yu. 02-11-2004 */
2089 if (info->IsMoxaMustChipFlag == MOXA_MUST_MU150_HWID)
1da177e4
LT		 2090 gdl &= MOXA_MUST_GDL_MASK;
2091 if (gdl >= recv_room) {
2092 if (!info->ldisc_stop_rx) {
8ea2c2ec 2093 /* mxser_throttle(tty); */
1da177e4
LT		 2094 mxser_stoprx(tty);
2095 }
8ea2c2ec 2096 /* return; */
1da177e4
LT		 2097 }
2098 while (gdl--) {
2099 ch = inb(info->base + UART_RX);
3399ba5b 2100 tty_insert_flip_char(tty, ch, 0);
1da177e4
LT		 2101 cnt++;
2102 /*
8ea2c2ec 2103 if ((cnt >= HI_WATER) && (info->stop_rx == 0)) {
1da177e4 2104 mxser_stoprx(tty);
8ea2c2ec 2105 info->stop_rx = 1;
1da177e4
LT		 2106 break;
2107 } */
2108 }
2109 goto end_intr;
2110 }
8ea2c2ec
JJ		 2111 intr_old:
2112 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2113
2114 do {
2115 if (max-- < 0)
2116 break;
2117 /*
8ea2c2ec 2118 if ((cnt >= HI_WATER) && (info->stop_rx == 0)) {
1da177e4
LT		 2119 mxser_stoprx(tty);
2120 info->stop_rx=1;
2121 break;
2122 }
2123 */
2124
2125 ch = inb(info->base + UART_RX);
8ea2c2ec 2126 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2127 if (info->IsMoxaMustChipFlag && (*status & UART_LSR_OE) /*&& !(*status&UART_LSR_DR) */ )
2128 outb(0x23, info->base + UART_FCR);
2129 *status &= info->read_status_mask;
8ea2c2ec 2130 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2131 if (*status & info->ignore_status_mask) {
2132 if (++ignored > 100)
2133 break;
2134 } else {
3399ba5b 2135 char flag = 0;
1da177e4
LT		 2136 if (*status & UART_LSR_SPECIAL) {
2137 if (*status & UART_LSR_BI) {
3399ba5b 2138 flag = TTY_BREAK;
1da177e4
LT		 2139/* added by casper 1/11/2000 */
2140 info->icount.brk++;
1da177e4
LT		 2141/* */
2142 if (info->flags & ASYNC_SAK)
2143 do_SAK(tty);
2144 } else if (*status & UART_LSR_PE) {
3399ba5b 2145 flag = TTY_PARITY;
1da177e4
LT		 2146/* added by casper 1/11/2000 */
2147 info->icount.parity++;
2148/* */
2149 } else if (*status & UART_LSR_FE) {
3399ba5b 2150 flag = TTY_FRAME;
1da177e4
LT		 2151/* added by casper 1/11/2000 */
2152 info->icount.frame++;
2153/* */
2154 } else if (*status & UART_LSR_OE) {
3399ba5b 2155 flag = TTY_OVERRUN;
1da177e4
LT		 2156/* added by casper 1/11/2000 */
2157 info->icount.overrun++;
2158/* */
3399ba5b
DV		 2159 }
2160 }
2161 tty_insert_flip_char(tty, ch, flag);
1da177e4
LT		 2162 cnt++;
2163 if (cnt >= recv_room) {
2164 if (!info->ldisc_stop_rx) {
8ea2c2ec 2165 /* mxser_throttle(tty); */
1da177e4
LT		 2166 mxser_stoprx(tty);
2167 }
2168 break;
2169 }
2170
2171 }
2172
8ea2c2ec 2173 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2174 if (info->IsMoxaMustChipFlag)
2175 break;
8ea2c2ec 2176 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2177
2178 /* mask by Victor Yu. 09-02-2002
2179 *status = inb(info->base + UART_LSR) & info->read_status_mask;
2180 */
8ea2c2ec 2181 /* following add by Victor Yu. 09-02-2002 */
1da177e4 2182 *status = inb(info->base + UART_LSR);
8ea2c2ec 2183 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2184 } while (*status & UART_LSR_DR);
2185
8ea2c2ec 2186end_intr: /* add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2187 mxvar_log.rxcnt[info->port] += cnt;
2188 info->mon_data.rxcnt += cnt;
2189 info->mon_data.up_rxcnt += cnt;
2190 spin_unlock_irqrestore(&info->slock, flags);
3399ba5b 2191
1da177e4
LT		 2192 tty_flip_buffer_push(tty);
2193}
2194
2195static void mxser_transmit_chars(struct mxser_struct *info)
2196{
2197 int count, cnt;
2198 unsigned long flags;
2199
2200 spin_lock_irqsave(&info->slock, flags);
2201
2202 if (info->x_char) {
2203 outb(info->x_char, info->base + UART_TX);
2204 info->x_char = 0;
2205 mxvar_log.txcnt[info->port]++;
2206 info->mon_data.txcnt++;
2207 info->mon_data.up_txcnt++;
2208
2209/* added by casper 1/11/2000 */
2210 info->icount.tx++;
2211/* */
2212 spin_unlock_irqrestore(&info->slock, flags);
2213 return;
2214 }
2215
2216 if (info->xmit_buf == 0) {
2217 spin_unlock_irqrestore(&info->slock, flags);
2218 return;
2219 }
2220
8ea2c2ec
JJ		 2221 if ((info->xmit_cnt <= 0) || info->tty->stopped ||
2222 (info->tty->hw_stopped &&
2223 (info->type != PORT_16550A) &&
2224 (!info->IsMoxaMustChipFlag))) {
1da177e4
LT		 2225 info->IER &= ~UART_IER_THRI;
2226 outb(info->IER, info->base + UART_IER);
2227 spin_unlock_irqrestore(&info->slock, flags);
2228 return;
2229 }
2230
2231 cnt = info->xmit_cnt;
2232 count = info->xmit_fifo_size;
2233 do {
8ea2c2ec
JJ		 2234 outb(info->xmit_buf[info->xmit_tail++],
2235 info->base + UART_TX);
1da177e4
LT		 2236 info->xmit_tail = info->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2237 if (--info->xmit_cnt <= 0)
2238 break;
2239 } while (--count > 0);
2240 mxvar_log.txcnt[info->port] += (cnt - info->xmit_cnt);
2241
8ea2c2ec 2242/* added by James 03-12-2004. */
1da177e4
LT		 2243 info->mon_data.txcnt += (cnt - info->xmit_cnt);
2244 info->mon_data.up_txcnt += (cnt - info->xmit_cnt);
8ea2c2ec 2245/* (above) added by James. */
1da177e4
LT		 2246
2247/* added by casper 1/11/2000 */
2248 info->icount.tx += (cnt - info->xmit_cnt);
2249/* */
2250
2251 if (info->xmit_cnt < WAKEUP_CHARS) {
2252 set_bit(MXSER_EVENT_TXLOW, &info->event);
2253 schedule_work(&info->tqueue);
2254 }
2255 if (info->xmit_cnt <= 0) {
2256 info->IER &= ~UART_IER_THRI;
2257 outb(info->IER, info->base + UART_IER);
2258 }
2259 spin_unlock_irqrestore(&info->slock, flags);
2260}
2261
2262static void mxser_check_modem_status(struct mxser_struct *info, int status)
2263{
2264 /* update input line counters */
2265 if (status & UART_MSR_TERI)
2266 info->icount.rng++;
2267 if (status & UART_MSR_DDSR)
2268 info->icount.dsr++;
2269 if (status & UART_MSR_DDCD)
2270 info->icount.dcd++;
2271 if (status & UART_MSR_DCTS)
2272 info->icount.cts++;
2273 info->mon_data.modem_status = status;
2274 wake_up_interruptible(&info->delta_msr_wait);
2275
1da177e4
LT		 2276 if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
2277 if (status & UART_MSR_DCD)
2278 wake_up_interruptible(&info->open_wait);
2279 schedule_work(&info->tqueue);
2280 }
2281
2282 if (info->flags & ASYNC_CTS_FLOW) {
2283 if (info->tty->hw_stopped) {
2284 if (status & UART_MSR_CTS) {
2285 info->tty->hw_stopped = 0;
2286
8ea2c2ec
JJ		 2287 if ((info->type != PORT_16550A) &&
2288 (!info->IsMoxaMustChipFlag)) {
1da177e4
LT		 2289 info->IER |= UART_IER_THRI;
2290 outb(info->IER, info->base + UART_IER);
2291 }
2292 set_bit(MXSER_EVENT_TXLOW, &info->event);
2293 schedule_work(&info->tqueue); }
2294 } else {
2295 if (!(status & UART_MSR_CTS)) {
2296 info->tty->hw_stopped = 1;
8ea2c2ec
JJ		 2297 if ((info->type != PORT_16550A) &&
2298 (!info->IsMoxaMustChipFlag)) {
1da177e4
LT		 2299 info->IER &= ~UART_IER_THRI;
2300 outb(info->IER, info->base + UART_IER);
2301 }
2302 }
2303 }
2304 }
2305}
2306
2307static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp, struct mxser_struct *info)
2308{
2309 DECLARE_WAITQUEUE(wait, current);
2310 int retval;
2311 int do_clocal = 0;
2312 unsigned long flags;
2313
2314 /*
2315 * If non-blocking mode is set, or the port is not enabled,
2316 * then make the check up front and then exit.
2317 */
2318 if ((filp->f_flags & O_NONBLOCK) || (tty->flags & (1 << TTY_IO_ERROR))) {
2319 info->flags |= ASYNC_NORMAL_ACTIVE;
8ea2c2ec 2320 return 0;
1da177e4
LT		 2321 }
2322
2323 if (tty->termios->c_cflag & CLOCAL)
2324 do_clocal = 1;
2325
2326 /*
2327 * Block waiting for the carrier detect and the line to become
2328 * free (i.e., not in use by the callout). While we are in
2329 * this loop, info->count is dropped by one, so that
2330 * mxser_close() knows when to free things. We restore it upon
2331 * exit, either normal or abnormal.
2332 */
2333 retval = 0;
2334 add_wait_queue(&info->open_wait, &wait);
2335
2336 spin_lock_irqsave(&info->slock, flags);
2337 if (!tty_hung_up_p(filp))
2338 info->count--;
2339 spin_unlock_irqrestore(&info->slock, flags);
2340 info->blocked_open++;
2341 while (1) {
2342 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 2343 outb(inb(info->base + UART_MCR) |
2344 UART_MCR_DTR | UART_MCR_RTS, info->base + UART_MCR);
1da177e4
LT		 2345 spin_unlock_irqrestore(&info->slock, flags);
2346 set_current_state(TASK_INTERRUPTIBLE);
2347 if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)) {
2348 if (info->flags & ASYNC_HUP_NOTIFY)
2349 retval = -EAGAIN;
2350 else
2351 retval = -ERESTARTSYS;
2352 break;
2353 }
8ea2c2ec
JJ		 2354 if (!(info->flags & ASYNC_CLOSING) &&
2355 (do_clocal ||
2356 (inb(info->base + UART_MSR) & UART_MSR_DCD)))
1da177e4
LT		 2357 break;
2358 if (signal_pending(current)) {
2359 retval = -ERESTARTSYS;
2360 break;
2361 }
2362 schedule();
2363 }
2364 set_current_state(TASK_RUNNING);
2365 remove_wait_queue(&info->open_wait, &wait);
2366 if (!tty_hung_up_p(filp))
2367 info->count++;
2368 info->blocked_open--;
2369 if (retval)
8ea2c2ec 2370 return retval;
1da177e4 2371 info->flags |= ASYNC_NORMAL_ACTIVE;
8ea2c2ec 2372 return 0;
1da177e4
LT		 2373}
2374
2375static int mxser_startup(struct mxser_struct *info)
2376{
1da177e4
LT		 2377 unsigned long page;
2378 unsigned long flags;
2379
2380 page = __get_free_page(GFP_KERNEL);
2381 if (!page)
8ea2c2ec 2382 return -ENOMEM;
1da177e4
LT		 2383
2384 spin_lock_irqsave(&info->slock, flags);
2385
2386 if (info->flags & ASYNC_INITIALIZED) {
2387 free_page(page);
2388 spin_unlock_irqrestore(&info->slock, flags);
8ea2c2ec 2389 return 0;
1da177e4
LT		 2390 }
2391
2392 if (!info->base || !info->type) {
2393 if (info->tty)
2394 set_bit(TTY_IO_ERROR, &info->tty->flags);
2395 free_page(page);
2396 spin_unlock_irqrestore(&info->slock, flags);
8ea2c2ec 2397 return 0;
1da177e4
LT		 2398 }
2399 if (info->xmit_buf)
2400 free_page(page);
2401 else
2402 info->xmit_buf = (unsigned char *) page;
2403
2404 /*
2405 * Clear the FIFO buffers and disable them
2406 * (they will be reenabled in mxser_change_speed())
2407 */
2408 if (info->IsMoxaMustChipFlag)
8ea2c2ec
JJ		 2409 outb((UART_FCR_CLEAR_RCVR |
2410 UART_FCR_CLEAR_XMIT |
2411 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->base + UART_FCR);
1da177e4 2412 else
8ea2c2ec
JJ		 2413 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
2414 info->base + UART_FCR);
1da177e4
LT		 2415
2416 /*
2417 * At this point there's no way the LSR could still be 0xFF;
2418 * if it is, then bail out, because there's likely no UART
2419 * here.
2420 */
2421 if (inb(info->base + UART_LSR) == 0xff) {
2422 spin_unlock_irqrestore(&info->slock, flags);
2423 if (capable(CAP_SYS_ADMIN)) {
2424 if (info->tty)
2425 set_bit(TTY_IO_ERROR, &info->tty->flags);
8ea2c2ec 2426 return 0;
1da177e4 2427 } else
8ea2c2ec 2428 return -ENODEV;
1da177e4
LT		 2429 }
2430
2431 /*
2432 * Clear the interrupt registers.
2433 */
2434 (void) inb(info->base + UART_LSR);
2435 (void) inb(info->base + UART_RX);
2436 (void) inb(info->base + UART_IIR);
2437 (void) inb(info->base + UART_MSR);
2438
2439 /*
2440 * Now, initialize the UART
2441 */
2442 outb(UART_LCR_WLEN8, info->base + UART_LCR); /* reset DLAB */
2443 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
2444 outb(info->MCR, info->base + UART_MCR);
2445
2446 /*
2447 * Finally, enable interrupts
2448 */
2449 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
8ea2c2ec 2450 /* info->IER = UART_IER_RLSI | UART_IER_RDI; */
1da177e4 2451
8ea2c2ec 2452 /* following add by Victor Yu. 08-30-2002 */
1da177e4
LT		 2453 if (info->IsMoxaMustChipFlag)
2454 info->IER |= MOXA_MUST_IER_EGDAI;
8ea2c2ec 2455 /* above add by Victor Yu. 08-30-2002 */
1da177e4
LT		 2456 outb(info->IER, info->base + UART_IER); /* enable interrupts */
2457
2458 /*
2459 * And clear the interrupt registers again for luck.
2460 */
2461 (void) inb(info->base + UART_LSR);
2462 (void) inb(info->base + UART_RX);
2463 (void) inb(info->base + UART_IIR);
2464 (void) inb(info->base + UART_MSR);
2465
2466 if (info->tty)
2467 clear_bit(TTY_IO_ERROR, &info->tty->flags);
2468 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
2469
2470 /*
2471 * and set the speed of the serial port
2472 */
2473 spin_unlock_irqrestore(&info->slock, flags);
2474 mxser_change_speed(info, NULL);
2475
2476 info->flags |= ASYNC_INITIALIZED;
8ea2c2ec 2477 return 0;
1da177e4
LT		 2478}
2479
2480/*
2481 * This routine will shutdown a serial port; interrupts maybe disabled, and
2482 * DTR is dropped if the hangup on close termio flag is on.
2483 */
2484static void mxser_shutdown(struct mxser_struct *info)
2485{
2486 unsigned long flags;
2487
2488 if (!(info->flags & ASYNC_INITIALIZED))
2489 return;
2490
2491 spin_lock_irqsave(&info->slock, flags);
2492
2493 /*
2494 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
2495 * here so the queue might never be waken up
2496 */
2497 wake_up_interruptible(&info->delta_msr_wait);
2498
2499 /*
2500 * Free the IRQ, if necessary
2501 */
2502 if (info->xmit_buf) {
2503 free_page((unsigned long) info->xmit_buf);
2504 info->xmit_buf = NULL;
2505 }
2506
2507 info->IER = 0;
2508 outb(0x00, info->base + UART_IER);
2509
2510 if (!info->tty || (info->tty->termios->c_cflag & HUPCL))
2511 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
2512 outb(info->MCR, info->base + UART_MCR);
2513
2514 /* clear Rx/Tx FIFO's */
8ea2c2ec 2515 /* following add by Victor Yu. 08-30-2002 */
1da177e4 2516 if (info->IsMoxaMustChipFlag)
8ea2c2ec
JJ		 2517 outb((UART_FCR_CLEAR_RCVR |
2518 UART_FCR_CLEAR_XMIT |
2519 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->base + UART_FCR);
1da177e4 2520 else
8ea2c2ec
JJ		 2521 /* above add by Victor Yu. 08-30-2002 */
2522 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
2523 info->base + UART_FCR);
1da177e4
LT		 2524
2525 /* read data port to reset things */
2526 (void) inb(info->base + UART_RX);
2527
2528 if (info->tty)
2529 set_bit(TTY_IO_ERROR, &info->tty->flags);
2530
2531 info->flags &= ~ASYNC_INITIALIZED;
2532
8ea2c2ec
JJ		 2533 /* following add by Victor Yu. 09-23-2002 */
2534 if (info->IsMoxaMustChipFlag)
1da177e4 2535 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->base);
8ea2c2ec 2536 /* above add by Victor Yu. 09-23-2002 */
1da177e4
LT		 2537
2538 spin_unlock_irqrestore(&info->slock, flags);
2539}
2540
2541/*
2542 * This routine is called to set the UART divisor registers to match
2543 * the specified baud rate for a serial port.
2544 */
606d099c 2545static int mxser_change_speed(struct mxser_struct *info, struct ktermios *old_termios)
1da177e4
LT		 2546{
2547 unsigned cflag, cval, fcr;
2548 int ret = 0;
2549 unsigned char status;
2550 long baud;
2551 unsigned long flags;
2552
1da177e4
LT		 2553 if (!info->tty || !info->tty->termios)
2554 return ret;
2555 cflag = info->tty->termios->c_cflag;
2556 if (!(info->base))
2557 return ret;
2558
1da177e4
LT		 2559#ifndef B921600
2560#define B921600 (B460800 +1)
2561#endif
2562 if (mxser_set_baud_method[info->port] == 0) {
c7bce309 2563 baud = tty_get_baud_rate(info->tty);
1da177e4
LT		 2564 mxser_set_baud(info, baud);
2565 }
2566
2567 /* byte size and parity */
2568 switch (cflag & CSIZE) {
2569 case CS5:
2570 cval = 0x00;
2571 break;
2572 case CS6:
2573 cval = 0x01;
2574 break;
2575 case CS7:
2576 cval = 0x02;
2577 break;
2578 case CS8:
2579 cval = 0x03;
2580 break;
2581 default:
2582 cval = 0x00;
2583 break; /* too keep GCC shut... */
2584 }
2585 if (cflag & CSTOPB)
2586 cval |= 0x04;
2587 if (cflag & PARENB)
2588 cval |= UART_LCR_PARITY;
8ea2c2ec 2589 if (!(cflag & PARODD))
1da177e4 2590 cval |= UART_LCR_EPAR;
1da177e4
LT		 2591 if (cflag & CMSPAR)
2592 cval |= UART_LCR_SPAR;
2593
2594 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
2595 if (info->IsMoxaMustChipFlag) {
2596 fcr = UART_FCR_ENABLE_FIFO;
2597 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
2598 SET_MOXA_MUST_FIFO_VALUE(info);
2599 } else
2600 fcr = 0;
2601 } else {
2602 fcr = UART_FCR_ENABLE_FIFO;
8ea2c2ec 2603 /* following add by Victor Yu. 08-30-2002 */
1da177e4
LT		 2604 if (info->IsMoxaMustChipFlag) {
2605 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
2606 SET_MOXA_MUST_FIFO_VALUE(info);
2607 } else {
8ea2c2ec 2608 /* above add by Victor Yu. 08-30-2002 */
1da177e4
LT		 2609 switch (info->rx_trigger) {
2610 case 1:
2611 fcr |= UART_FCR_TRIGGER_1;
2612 break;
2613 case 4:
2614 fcr |= UART_FCR_TRIGGER_4;
2615 break;
2616 case 8:
2617 fcr |= UART_FCR_TRIGGER_8;
2618 break;
2619 default:
2620 fcr |= UART_FCR_TRIGGER_14;
2621 break;
2622 }
2623 }
2624 }
2625
2626 /* CTS flow control flag and modem status interrupts */
2627 info->IER &= ~UART_IER_MSI;
2628 info->MCR &= ~UART_MCR_AFE;
2629 if (cflag & CRTSCTS) {
2630 info->flags |= ASYNC_CTS_FLOW;
2631 info->IER |= UART_IER_MSI;
2632 if ((info->type == PORT_16550A) || (info->IsMoxaMustChipFlag)) {
2633 info->MCR |= UART_MCR_AFE;
8ea2c2ec
JJ		 2634 /* status = mxser_get_msr(info->base, 0, info->port); */
2635/*
2636 save_flags(flags);
1da177e4
LT		 2637 cli();
2638 status = inb(baseaddr + UART_MSR);
8ea2c2ec
JJ		 2639 restore_flags(flags);
2640*/
2641 /* mxser_check_modem_status(info, status); */
1da177e4 2642 } else {
8ea2c2ec
JJ		 2643 /* status = mxser_get_msr(info->base, 0, info->port); */
2644 /* MX_LOCK(&info->slock); */
1da177e4 2645 status = inb(info->base + UART_MSR);
8ea2c2ec 2646 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 2647 if (info->tty->hw_stopped) {
2648 if (status & UART_MSR_CTS) {
2649 info->tty->hw_stopped = 0;
8ea2c2ec
JJ		 2650 if ((info->type != PORT_16550A) &&
2651 (!info->IsMoxaMustChipFlag)) {
1da177e4
LT		 2652 info->IER |= UART_IER_THRI;
2653 outb(info->IER, info->base + UART_IER);
2654 }
2655 set_bit(MXSER_EVENT_TXLOW, &info->event);
2656 schedule_work(&info->tqueue); }
2657 } else {
2658 if (!(status & UART_MSR_CTS)) {
2659 info->tty->hw_stopped = 1;
8ea2c2ec
JJ		 2660 if ((info->type != PORT_16550A) &&
2661 (!info->IsMoxaMustChipFlag)) {
1da177e4
LT		 2662 info->IER &= ~UART_IER_THRI;
2663 outb(info->IER, info->base + UART_IER);
2664 }
2665 }
2666 }
2667 }
2668 } else {
2669 info->flags &= ~ASYNC_CTS_FLOW;
2670 }
2671 outb(info->MCR, info->base + UART_MCR);
2672 if (cflag & CLOCAL) {
2673 info->flags &= ~ASYNC_CHECK_CD;
2674 } else {
2675 info->flags |= ASYNC_CHECK_CD;
2676 info->IER |= UART_IER_MSI;
2677 }
2678 outb(info->IER, info->base + UART_IER);
2679
2680 /*
2681 * Set up parity check flag
2682 */
2683 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
2684 if (I_INPCK(info->tty))
2685 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
2686 if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
2687 info->read_status_mask |= UART_LSR_BI;
2688
2689 info->ignore_status_mask = 0;
2690
2691 if (I_IGNBRK(info->tty)) {
2692 info->ignore_status_mask |= UART_LSR_BI;
2693 info->read_status_mask |= UART_LSR_BI;
2694 /*
2695 * If we're ignore parity and break indicators, ignore
2696 * overruns too. (For real raw support).
2697 */
2698 if (I_IGNPAR(info->tty)) {
8ea2c2ec
JJ		 2699 info->ignore_status_mask |=
2700 UART_LSR_OE |
2701 UART_LSR_PE |
2702 UART_LSR_FE;
2703 info->read_status_mask |=
2704 UART_LSR_OE |
2705 UART_LSR_PE |
2706 UART_LSR_FE;
1da177e4
LT		 2707 }
2708 }
8ea2c2ec 2709 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2710 if (info->IsMoxaMustChipFlag) {
2711 spin_lock_irqsave(&info->slock, flags);
2712 SET_MOXA_MUST_XON1_VALUE(info->base, START_CHAR(info->tty));
2713 SET_MOXA_MUST_XOFF1_VALUE(info->base, STOP_CHAR(info->tty));
2714 if (I_IXON(info->tty)) {
2715 ENABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
2716 } else {
2717 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
2718 }
2719 if (I_IXOFF(info->tty)) {
2720 ENABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->base);
2721 } else {
2722 DISABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->base);
2723 }
2724 /*
2725 if ( I_IXANY(info->tty) ) {
2726 info->MCR |= MOXA_MUST_MCR_XON_ANY;
2727 ENABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->base);
2728 } else {
2729 info->MCR &= ~MOXA_MUST_MCR_XON_ANY;
2730 DISABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->base);
2731 }
2732 */
2733 spin_unlock_irqrestore(&info->slock, flags);
2734 }
8ea2c2ec 2735 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2736
2737
2738 outb(fcr, info->base + UART_FCR); /* set fcr */
2739 outb(cval, info->base + UART_LCR);
2740
2741 return ret;
2742}
2743
2744
2745static int mxser_set_baud(struct mxser_struct *info, long newspd)
2746{
2747 int quot = 0;
2748 unsigned char cval;
2749 int ret = 0;
2750 unsigned long flags;
2751
2752 if (!info->tty || !info->tty->termios)
2753 return ret;
2754
2755 if (!(info->base))
2756 return ret;
2757
2758 if (newspd > info->MaxCanSetBaudRate)
2759 return 0;
2760
2761 info->realbaud = newspd;
2762 if (newspd == 134) {
2763 quot = (2 * info->baud_base / 269);
2764 } else if (newspd) {
2765 quot = info->baud_base / newspd;
1da177e4
LT		 2766 if (quot == 0)
2767 quot = 1;
1da177e4
LT		 2768 } else {
2769 quot = 0;
2770 }
2771
2772 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
2773 info->timeout += HZ / 50; /* Add .02 seconds of slop */
2774
2775 if (quot) {
2776 spin_lock_irqsave(&info->slock, flags);
2777 info->MCR |= UART_MCR_DTR;
2778 outb(info->MCR, info->base + UART_MCR);
2779 spin_unlock_irqrestore(&info->slock, flags);
2780 } else {
2781 spin_lock_irqsave(&info->slock, flags);
2782 info->MCR &= ~UART_MCR_DTR;
2783 outb(info->MCR, info->base + UART_MCR);
2784 spin_unlock_irqrestore(&info->slock, flags);
2785 return ret;
2786 }
2787
2788 cval = inb(info->base + UART_LCR);
2789
2790 outb(cval | UART_LCR_DLAB, info->base + UART_LCR); /* set DLAB */
2791
2792 outb(quot & 0xff, info->base + UART_DLL); /* LS of divisor */
2793 outb(quot >> 8, info->base + UART_DLM); /* MS of divisor */
2794 outb(cval, info->base + UART_LCR); /* reset DLAB */
2795
2796
2797 return ret;
2798}
2799
1da177e4
LT		 2800/*
2801 * ------------------------------------------------------------
2802 * friends of mxser_ioctl()
2803 * ------------------------------------------------------------
2804 */
2805static int mxser_get_serial_info(struct mxser_struct *info, struct serial_struct __user *retinfo)
2806{
2807 struct serial_struct tmp;
2808
2809 if (!retinfo)
8ea2c2ec 2810 return -EFAULT;
1da177e4
LT		 2811 memset(&tmp, 0, sizeof(tmp));
2812 tmp.type = info->type;
2813 tmp.line = info->port;
2814 tmp.port = info->base;
2815 tmp.irq = info->irq;
2816 tmp.flags = info->flags;
2817 tmp.baud_base = info->baud_base;
2818 tmp.close_delay = info->close_delay;
2819 tmp.closing_wait = info->closing_wait;
2820 tmp.custom_divisor = info->custom_divisor;
2821 tmp.hub6 = 0;
2822 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
2823 return -EFAULT;
8ea2c2ec 2824 return 0;
1da177e4
LT		 2825}
2826
2827static int mxser_set_serial_info(struct mxser_struct *info, struct serial_struct __user *new_info)
2828{
2829 struct serial_struct new_serial;
2830 unsigned int flags;
2831 int retval = 0;
2832
2833 if (!new_info || !info->base)
8ea2c2ec 2834 return -EFAULT;
1da177e4
LT		 2835 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
2836 return -EFAULT;
2837
8ea2c2ec
JJ		 2838 if ((new_serial.irq != info->irq) ||
2839 (new_serial.port != info->base) ||
2840 (new_serial.custom_divisor != info->custom_divisor) ||
2841 (new_serial.baud_base != info->baud_base))
2842 return -EPERM;
1da177e4
LT		 2843
2844 flags = info->flags & ASYNC_SPD_MASK;
2845
2846 if (!capable(CAP_SYS_ADMIN)) {
8ea2c2ec
JJ		 2847 if ((new_serial.baud_base != info->baud_base) ||
2848 (new_serial.close_delay != info->close_delay) ||
2849 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->flags & ~ASYNC_USR_MASK)))
2850 return -EPERM;
2851 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
2852 (new_serial.flags & ASYNC_USR_MASK));
1da177e4
LT		 2853 } else {
2854 /*
2855 * OK, past this point, all the error checking has been done.
2856 * At this point, we start making changes.....
2857 */
8ea2c2ec
JJ		 2858 info->flags = ((info->flags & ~ASYNC_FLAGS) |
2859 (new_serial.flags & ASYNC_FLAGS));
1da177e4
LT		 2860 info->close_delay = new_serial.close_delay * HZ / 100;
2861 info->closing_wait = new_serial.closing_wait * HZ / 100;
8ea2c2ec
JJ		 2862 info->tty->low_latency =
2863 (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2864 info->tty->low_latency = 0; /* (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0; */
1da177e4
LT		 2865 }
2866
2867 /* added by casper, 3/17/2000, for mouse */
2868 info->type = new_serial.type;
2869
2870 process_txrx_fifo(info);
2871
1da177e4
LT		 2872 if (info->flags & ASYNC_INITIALIZED) {
2873 if (flags != (info->flags & ASYNC_SPD_MASK)) {
2874 mxser_change_speed(info, NULL);
2875 }
2876 } else {
2877 retval = mxser_startup(info);
2878 }
8ea2c2ec 2879 return retval;
1da177e4
LT		 2880}
2881
2882/*
2883 * mxser_get_lsr_info - get line status register info
2884 *
2885 * Purpose: Let user call ioctl() to get info when the UART physically
2886 * is emptied. On bus types like RS485, the transmitter must
2887 * release the bus after transmitting. This must be done when
2888 * the transmit shift register is empty, not be done when the
2889 * transmit holding register is empty. This functionality
2890 * allows an RS485 driver to be written in user space.
2891 */
2892static int mxser_get_lsr_info(struct mxser_struct *info, unsigned int __user *value)
2893{
2894 unsigned char status;
2895 unsigned int result;
2896 unsigned long flags;
2897
2898 spin_lock_irqsave(&info->slock, flags);
2899 status = inb(info->base + UART_LSR);
2900 spin_unlock_irqrestore(&info->slock, flags);
2901 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
2902 return put_user(result, value);
2903}
2904
2905/*
2906 * This routine sends a break character out the serial port.
2907 */
2908static void mxser_send_break(struct mxser_struct *info, int duration)
2909{
2910 unsigned long flags;
2911
2912 if (!info->base)
2913 return;
2914 set_current_state(TASK_INTERRUPTIBLE);
2915 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 2916 outb(inb(info->base + UART_LCR) | UART_LCR_SBC,
2917 info->base + UART_LCR);
1da177e4
LT		 2918 spin_unlock_irqrestore(&info->slock, flags);
2919 schedule_timeout(duration);
2920 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 2921 outb(inb(info->base + UART_LCR) & ~UART_LCR_SBC,
2922 info->base + UART_LCR);
1da177e4
LT		 2923 spin_unlock_irqrestore(&info->slock, flags);
2924}
2925
2926static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
2927{
56e139f6 2928 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 2929 unsigned char control, status;
2930 unsigned long flags;
2931
2932
2933 if (tty->index == MXSER_PORTS)
8ea2c2ec 2934 return -ENOIOCTLCMD;
1da177e4 2935 if (tty->flags & (1 << TTY_IO_ERROR))
8ea2c2ec 2936 return -EIO;
1da177e4
LT		 2937
2938 control = info->MCR;
2939
2940 spin_lock_irqsave(&info->slock, flags);
2941 status = inb(info->base + UART_MSR);
2942 if (status & UART_MSR_ANY_DELTA)
2943 mxser_check_modem_status(info, status);
2944 spin_unlock_irqrestore(&info->slock, flags);
2945 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
8ea2c2ec
JJ		 2946 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
2947 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
2948 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
2949 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
2950 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1da177e4
LT		 2951}
2952
2953static int mxser_tiocmset(struct tty_struct *tty, struct file *file, unsigned int set, unsigned int clear)
2954{
56e139f6 2955 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 2956 unsigned long flags;
2957
2958
2959 if (tty->index == MXSER_PORTS)
2960 return -ENOIOCTLCMD;
2961 if (tty->flags & (1 << TTY_IO_ERROR))
2962 return -EIO;
2963
2964 spin_lock_irqsave(&info->slock, flags);
2965
2966 if (set & TIOCM_RTS)
2967 info->MCR |= UART_MCR_RTS;
2968 if (set & TIOCM_DTR)
2969 info->MCR |= UART_MCR_DTR;
2970
2971 if (clear & TIOCM_RTS)
2972 info->MCR &= ~UART_MCR_RTS;
2973 if (clear & TIOCM_DTR)
2974 info->MCR &= ~UART_MCR_DTR;
2975
2976 outb(info->MCR, info->base + UART_MCR);
2977 spin_unlock_irqrestore(&info->slock, flags);
2978 return 0;
2979}
2980
2981
2982static int mxser_read_register(int, unsigned short *);
2983static int mxser_program_mode(int);
2984static void mxser_normal_mode(int);
2985
2986static int mxser_get_ISA_conf(int cap, struct mxser_hwconf *hwconf)
2987{
2988 int id, i, bits;
2989 unsigned short regs[16], irq;
2990 unsigned char scratch, scratch2;
2991
2992 hwconf->IsMoxaMustChipFlag = MOXA_OTHER_UART;
2993
2994 id = mxser_read_register(cap, regs);
2995 if (id == C168_ASIC_ID) {
2996 hwconf->board_type = MXSER_BOARD_C168_ISA;
2997 hwconf->ports = 8;
2998 } else if (id == C104_ASIC_ID) {
2999 hwconf->board_type = MXSER_BOARD_C104_ISA;
3000 hwconf->ports = 4;
3001 } else if (id == C102_ASIC_ID) {
3002 hwconf->board_type = MXSER_BOARD_C102_ISA;
3003 hwconf->ports = 2;
3004 } else if (id == CI132_ASIC_ID) {
3005 hwconf->board_type = MXSER_BOARD_CI132;
3006 hwconf->ports = 2;
3007 } else if (id == CI134_ASIC_ID) {
3008 hwconf->board_type = MXSER_BOARD_CI134;
3009 hwconf->ports = 4;
3010 } else if (id == CI104J_ASIC_ID) {
3011 hwconf->board_type = MXSER_BOARD_CI104J;
3012 hwconf->ports = 4;
3013 } else
8ea2c2ec 3014 return 0;
1da177e4
LT		 3015
3016 irq = 0;
3017 if (hwconf->ports == 2) {
3018 irq = regs[9] & 0xF000;
3019 irq = irq | (irq >> 4);
3020 if (irq != (regs[9] & 0xFF00))
8ea2c2ec 3021 return MXSER_ERR_IRQ_CONFLIT;
1da177e4
LT		 3022 } else if (hwconf->ports == 4) {
3023 irq = regs[9] & 0xF000;
3024 irq = irq | (irq >> 4);
3025 irq = irq | (irq >> 8);
3026 if (irq != regs[9])
8ea2c2ec 3027 return MXSER_ERR_IRQ_CONFLIT;
1da177e4
LT		 3028 } else if (hwconf->ports == 8) {
3029 irq = regs[9] & 0xF000;
3030 irq = irq | (irq >> 4);
3031 irq = irq | (irq >> 8);
3032 if ((irq != regs[9]) || (irq != regs[10]))
8ea2c2ec 3033 return MXSER_ERR_IRQ_CONFLIT;
1da177e4
LT		 3034 }
3035
8ea2c2ec
JJ		 3036 if (!irq)
3037 return MXSER_ERR_IRQ;
3038 hwconf->irq = ((int)(irq & 0xF000) >> 12);
1da177e4
LT		 3039 for (i = 0; i < 8; i++)
3040 hwconf->ioaddr[i] = (int) regs[i + 1] & 0xFFF8;
8ea2c2ec
JJ		 3041 if ((regs[12] & 0x80) == 0)
3042 return MXSER_ERR_VECTOR;
3043 hwconf->vector = (int)regs[11]; /* interrupt vector */
1da177e4
LT		 3044 if (id == 1)
3045 hwconf->vector_mask = 0x00FF;
3046 else
3047 hwconf->vector_mask = 0x000F;
3048 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
3049 if (regs[12] & bits) {
3050 hwconf->baud_base[i] = 921600;
8ea2c2ec 3051 hwconf->MaxCanSetBaudRate[i] = 921600; /* add by Victor Yu. 09-04-2002 */
1da177e4
LT		 3052 } else {
3053 hwconf->baud_base[i] = 115200;
8ea2c2ec 3054 hwconf->MaxCanSetBaudRate[i] = 115200; /* add by Victor Yu. 09-04-2002 */
1da177e4
LT		 3055 }
3056 }
3057 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
3058 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
3059 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
3060 outb(scratch2, cap + UART_LCR);
3061 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
3062 scratch = inb(cap + UART_IIR);
3063
3064 if (scratch & 0xC0)
3065 hwconf->uart_type = PORT_16550A;
3066 else
3067 hwconf->uart_type = PORT_16450;
3068 if (id == 1)
3069 hwconf->ports = 8;
3070 else
3071 hwconf->ports = 4;
3072 request_region(hwconf->ioaddr[0], 8 * hwconf->ports, "mxser(IO)");
3073 request_region(hwconf->vector, 1, "mxser(vector)");
8ea2c2ec 3074 return hwconf->ports;
1da177e4
LT		 3075}
3076
3077#define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
3078#define CHIP_DO 0x02 /* Serial Data Output in Eprom */
3079#define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
3080#define CHIP_DI 0x08 /* Serial Data Input in Eprom */
3081#define EN_CCMD 0x000 /* Chip's command register */
3082#define EN0_RSARLO 0x008 /* Remote start address reg 0 */
3083#define EN0_RSARHI 0x009 /* Remote start address reg 1 */
3084#define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
3085#define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
3086#define EN0_DCFG 0x00E /* Data configuration reg WR */
3087#define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
3088#define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
3089#define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
3090static int mxser_read_register(int port, unsigned short *regs)
3091{
3092 int i, k, value, id;
3093 unsigned int j;
3094
3095 id = mxser_program_mode(port);
3096 if (id < 0)
8ea2c2ec 3097 return id;
1da177e4
LT		 3098 for (i = 0; i < 14; i++) {
3099 k = (i & 0x3F) | 0x180;
3100 for (j = 0x100; j > 0; j >>= 1) {
3101 outb(CHIP_CS, port);
3102 if (k & j) {
3103 outb(CHIP_CS | CHIP_DO, port);
3104 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
3105 } else {
3106 outb(CHIP_CS, port);
3107 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
3108 }
3109 }
8ea2c2ec 3110 (void)inb(port);
1da177e4
LT		 3111 value = 0;
3112 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
3113 outb(CHIP_CS, port);
3114 outb(CHIP_CS | CHIP_SK, port);
3115 if (inb(port) & CHIP_DI)
3116 value |= j;
3117 }
3118 regs[i] = value;
3119 outb(0, port);
3120 }
3121 mxser_normal_mode(port);
8ea2c2ec 3122 return id;
1da177e4
LT		 3123}
3124
3125static int mxser_program_mode(int port)
3126{
3127 int id, i, j, n;
8ea2c2ec 3128 /* unsigned long flags; */
1da177e4
LT		 3129
3130 spin_lock(&gm_lock);
3131 outb(0, port);
3132 outb(0, port);
3133 outb(0, port);
8ea2c2ec
JJ		 3134 (void)inb(port);
3135 (void)inb(port);
1da177e4 3136 outb(0, port);
8ea2c2ec
JJ		 3137 (void)inb(port);
3138 /* restore_flags(flags); */
1da177e4
LT		 3139 spin_unlock(&gm_lock);
3140
3141 id = inb(port + 1) & 0x1F;
8ea2c2ec
JJ		 3142 if ((id != C168_ASIC_ID) &&
3143 (id != C104_ASIC_ID) &&
3144 (id != C102_ASIC_ID) &&
3145 (id != CI132_ASIC_ID) &&
3146 (id != CI134_ASIC_ID) &&
3147 (id != CI104J_ASIC_ID))
3148 return -1;
1da177e4
LT		 3149 for (i = 0, j = 0; i < 4; i++) {
3150 n = inb(port + 2);
3151 if (n == 'M') {
3152 j = 1;
3153 } else if ((j == 1) && (n == 1)) {
3154 j = 2;
3155 break;
3156 } else
3157 j = 0;
3158 }
3159 if (j != 2)
3160 id = -2;
8ea2c2ec 3161 return id;
1da177e4
LT		 3162}
3163
3164static void mxser_normal_mode(int port)
3165{
3166 int i, n;
3167
3168 outb(0xA5, port + 1);
3169 outb(0x80, port + 3);
3170 outb(12, port + 0); /* 9600 bps */
3171 outb(0, port + 1);
3172 outb(0x03, port + 3); /* 8 data bits */
3173 outb(0x13, port + 4); /* loop back mode */
3174 for (i = 0; i < 16; i++) {
3175 n = inb(port + 5);
3176 if ((n & 0x61) == 0x60)
3177 break;
3178 if ((n & 1) == 1)
8ea2c2ec 3179 (void)inb(port);
1da177e4
LT		 3180 }
3181 outb(0x00, port + 4);
3182}
3183
3184module_init(mxser_module_init);
3185module_exit(mxser_module_exit);
Empty description
This page took 0.702361 seconds and 4 git commands to generate.