]>
Commit | Line | Data |
---|---|---|
ec8f24b7 | 1 | # SPDX-License-Identifier: GPL-2.0-only |
c13c8260 CL |
2 | # |
3 | # DMA engine configuration | |
4 | # | |
5 | ||
2ed6dc34 | 6 | menuconfig DMADEVICES |
6d4f5879 | 7 | bool "DMA Engine support" |
04ce9ab3 | 8 | depends on HAS_DMA |
2ed6dc34 | 9 | help |
6d4f5879 HS |
10 | DMA engines can do asynchronous data transfers without |
11 | involving the host CPU. Currently, this framework can be | |
12 | used to offload memory copies in the network stack and | |
9c402f4e DW |
13 | RAID operations in the MD driver. This menu only presents |
14 | DMA Device drivers supported by the configured arch, it may | |
15 | be empty in some cases. | |
2ed6dc34 | 16 | |
6c664a89 | 17 | config DMADEVICES_DEBUG |
67805a4b KK |
18 | bool "DMA Engine debugging" |
19 | depends on DMADEVICES != n | |
20 | help | |
21 | This is an option for use by developers; most people should | |
22 | say N here. This enables DMA engine core and driver debugging. | |
6c664a89 LW |
23 | |
24 | config DMADEVICES_VDEBUG | |
67805a4b KK |
25 | bool "DMA Engine verbose debugging" |
26 | depends on DMADEVICES_DEBUG != n | |
27 | help | |
28 | This is an option for use by developers; most people should | |
29 | say N here. This enables deeper (more verbose) debugging of | |
30 | the DMA engine core and drivers. | |
6c664a89 LW |
31 | |
32 | ||
2ed6dc34 SN |
33 | if DMADEVICES |
34 | ||
35 | comment "DMA Devices" | |
36 | ||
3c216190 VK |
37 | #core |
38 | config ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
39 | bool | |
95b4ecbf | 40 | |
3c216190 VK |
41 | config ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
42 | bool | |
95b4ecbf | 43 | |
3c216190 | 44 | config DMA_ENGINE |
138f4c35 DW |
45 | bool |
46 | ||
3c216190 VK |
47 | config DMA_VIRTUAL_CHANNELS |
48 | tristate | |
49 | ||
50 | config DMA_ACPI | |
51 | def_bool y | |
52 | depends on ACPI | |
53 | ||
54 | config DMA_OF | |
55 | def_bool y | |
56 | depends on OF | |
57 | select DMA_ENGINE | |
58 | ||
59 | #devices | |
a85c6f1b SR |
60 | config ALTERA_MSGDMA |
61 | tristate "Altera / Intel mSGDMA Engine" | |
62 | select DMA_ENGINE | |
63 | help | |
64 | Enable support for Altera / Intel mSGDMA controller. | |
65 | ||
e8689e63 LW |
66 | config AMBA_PL08X |
67 | bool "ARM PrimeCell PL080 or PL081 support" | |
c6a0aec9 | 68 | depends on ARM_AMBA |
e8689e63 | 69 | select DMA_ENGINE |
083be28a | 70 | select DMA_VIRTUAL_CHANNELS |
e8689e63 | 71 | help |
1e1cfc72 LW |
72 | Say yes if your platform has a PL08x DMAC device which can |
73 | provide DMA engine support. This includes the original ARM | |
74 | PL080 and PL081, Samsungs PL080 derivative and Faraday | |
75 | Technology's FTDMAC020 PL080 derivative. | |
e8689e63 | 76 | |
3c216190 VK |
77 | config AMCC_PPC440SPE_ADMA |
78 | tristate "AMCC PPC440SPe ADMA support" | |
79 | depends on 440SPe || 440SP | |
2ed6dc34 | 80 | select DMA_ENGINE |
3cc377b9 | 81 | select DMA_ENGINE_RAID |
3c216190 | 82 | select ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
5fc6d897 | 83 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
2ed6dc34 | 84 | help |
3c216190 | 85 | Enable support for the AMCC PPC440SPe RAID engines. |
2ed6dc34 | 86 | |
dc78baa2 NF |
87 | config AT_HDMAC |
88 | tristate "Atmel AHB DMA support" | |
f898fed0 | 89 | depends on ARCH_AT91 |
dc78baa2 NF |
90 | select DMA_ENGINE |
91 | help | |
f898fed0 | 92 | Support the Atmel AHB DMA controller. |
2ed6dc34 | 93 | |
e1f7c9ee LD |
94 | config AT_XDMAC |
95 | tristate "Atmel XDMA support" | |
6e5ae29b | 96 | depends on ARCH_AT91 |
e1f7c9ee LD |
97 | select DMA_ENGINE |
98 | help | |
99 | Support the Atmel XDMA controller. | |
2ed6dc34 | 100 | |
3c216190 VK |
101 | config AXI_DMAC |
102 | tristate "Analog Devices AXI-DMAC DMA support" | |
23b84639 | 103 | depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_SOCFPGA || COMPILE_TEST |
2ed6dc34 | 104 | select DMA_ENGINE |
3c216190 | 105 | select DMA_VIRTUAL_CHANNELS |
fc15be39 | 106 | select REGMAP_MMIO |
2ed6dc34 | 107 | help |
3c216190 | 108 | Enable support for the Analog Devices AXI-DMAC peripheral. This DMA |
2fea2906 | 109 | controller is often used in Analog Devices' reference designs for FPGA |
3c216190 | 110 | platforms. |
c13c8260 | 111 | |
743e1c8f AP |
112 | config BCM_SBA_RAID |
113 | tristate "Broadcom SBA RAID engine support" | |
58d96125 AB |
114 | depends on ARM64 || COMPILE_TEST |
115 | depends on MAILBOX && RAID6_PQ | |
743e1c8f AP |
116 | select DMA_ENGINE |
117 | select DMA_ENGINE_RAID | |
118 | select ASYNC_TX_DISABLE_XOR_VAL_DMA | |
119 | select ASYNC_TX_DISABLE_PQ_VAL_DMA | |
7076a1e4 | 120 | default m if ARCH_BCM_IPROC |
743e1c8f AP |
121 | help |
122 | Enable support for Broadcom SBA RAID Engine. The SBA RAID | |
123 | engine is available on most of the Broadcom iProc SoCs. It | |
124 | has the capability to offload memcpy, xor and pq computation | |
125 | for raid5/6. | |
126 | ||
3c216190 VK |
127 | config COH901318 |
128 | bool "ST-Ericsson COH901318 DMA support" | |
129 | select DMA_ENGINE | |
6e450376 | 130 | depends on ARCH_U300 || COMPILE_TEST |
3c216190 VK |
131 | help |
132 | Enable support for ST-Ericsson COH 901 318 DMA. | |
133 | ||
134 | config DMA_BCM2835 | |
135 | tristate "BCM2835 DMA engine support" | |
136 | depends on ARCH_BCM2835 | |
137 | select DMA_ENGINE | |
138 | select DMA_VIRTUAL_CHANNELS | |
139 | ||
3c216190 VK |
140 | config DMA_JZ4780 |
141 | tristate "JZ4780 DMA support" | |
c558ecd2 | 142 | depends on MIPS || COMPILE_TEST |
667dfed9 AS |
143 | select DMA_ENGINE |
144 | select DMA_VIRTUAL_CHANNELS | |
145 | help | |
3c216190 VK |
146 | This selects support for the DMA controller in Ingenic JZ4780 SoCs. |
147 | If you have a board based on such a SoC and wish to use DMA for | |
148 | devices which can use the DMA controller, say Y or M here. | |
667dfed9 | 149 | |
3c216190 VK |
150 | config DMA_SA11X0 |
151 | tristate "SA-11x0 DMA support" | |
6947c3f2 | 152 | depends on ARCH_SA1100 || COMPILE_TEST |
dc78baa2 | 153 | select DMA_ENGINE |
3c216190 | 154 | select DMA_VIRTUAL_CHANNELS |
dc78baa2 | 155 | help |
3c216190 VK |
156 | Support the DMA engine found on Intel StrongARM SA-1100 and |
157 | SA-1110 SoCs. This DMA engine can only be used with on-chip | |
158 | devices. | |
dc78baa2 | 159 | |
3c216190 VK |
160 | config DMA_SUN4I |
161 | tristate "Allwinner A10 DMA SoCs support" | |
35271227 | 162 | depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I |
3c216190 | 163 | default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I) |
e1f7c9ee | 164 | select DMA_ENGINE |
3c216190 | 165 | select DMA_VIRTUAL_CHANNELS |
e1f7c9ee | 166 | help |
3c216190 VK |
167 | Enable support for the DMA controller present in the sun4i, |
168 | sun5i and sun7i Allwinner ARM SoCs. | |
169 | ||
170 | config DMA_SUN6I | |
171 | tristate "Allwinner A31 SoCs DMA support" | |
c429ceb1 | 172 | depends on MACH_SUN6I || MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST |
3c216190 VK |
173 | depends on RESET_CONTROLLER |
174 | select DMA_ENGINE | |
175 | select DMA_VIRTUAL_CHANNELS | |
176 | help | |
177 | Support for the DMA engine first found in Allwinner A31 SoCs. | |
178 | ||
1fe20f1b EP |
179 | config DW_AXI_DMAC |
180 | tristate "Synopsys DesignWare AXI DMA support" | |
181 | depends on OF || COMPILE_TEST | |
182 | select DMA_ENGINE | |
183 | select DMA_VIRTUAL_CHANNELS | |
184 | help | |
185 | Enable support for Synopsys DesignWare AXI DMA controller. | |
186 | NOTE: This driver wasn't tested on 64 bit platform because | |
187 | of lack 64 bit platform with Synopsys DW AXI DMAC. | |
188 | ||
3c216190 VK |
189 | config EP93XX_DMA |
190 | bool "Cirrus Logic EP93xx DMA support" | |
49ad6d7d | 191 | depends on ARCH_EP93XX || COMPILE_TEST |
3c216190 VK |
192 | select DMA_ENGINE |
193 | help | |
194 | Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. | |
e1f7c9ee | 195 | |
173acc7c | 196 | config FSL_DMA |
8de7a7d9 | 197 | tristate "Freescale Elo series DMA support" |
77cd62e8 | 198 | depends on FSL_SOC |
173acc7c | 199 | select DMA_ENGINE |
5fc6d897 | 200 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
a7f7f624 | 201 | help |
8de7a7d9 HZ |
202 | Enable support for the Freescale Elo series DMA controllers. |
203 | The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the | |
204 | EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on | |
205 | some Txxx and Bxxx parts. | |
173acc7c | 206 | |
3c216190 VK |
207 | config FSL_EDMA |
208 | tristate "Freescale eDMA engine support" | |
209 | depends on OF | |
210 | select DMA_ENGINE | |
211 | select DMA_VIRTUAL_CHANNELS | |
212 | help | |
213 | Support the Freescale eDMA engine with programmable channel | |
214 | multiplexing capability for DMA request sources(slot). | |
215 | This module can be found on Freescale Vybrid and LS-1 SoCs. | |
216 | ||
b092529e | 217 | config FSL_QDMA |
67805a4b KK |
218 | tristate "NXP Layerscape qDMA engine support" |
219 | depends on ARM || ARM64 | |
220 | select DMA_ENGINE | |
221 | select DMA_VIRTUAL_CHANNELS | |
222 | select DMA_ENGINE_RAID | |
223 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
224 | help | |
225 | Support the NXP Layerscape qDMA engine with command queue and legacy mode. | |
226 | Channel virtualization is supported through enqueuing of DMA jobs to, | |
227 | or dequeuing DMA jobs from, different work queues. | |
228 | This module can be found on NXP Layerscape SoCs. | |
b092529e PM |
229 | The qdma driver only work on SoCs with a DPAA hardware block. |
230 | ||
ad80da65 | 231 | config FSL_RAID |
67805a4b KK |
232 | tristate "Freescale RAID engine Support" |
233 | depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
234 | select DMA_ENGINE | |
235 | select DMA_ENGINE_RAID | |
a7f7f624 | 236 | help |
67805a4b KK |
237 | Enable support for Freescale RAID Engine. RAID Engine is |
238 | available on some QorIQ SoCs (like P5020/P5040). It has | |
239 | the capability to offload memcpy, xor and pq computation | |
ad80da65 XS |
240 | for raid5/6. |
241 | ||
e9f08b65 ZW |
242 | config HISI_DMA |
243 | tristate "HiSilicon DMA Engine support" | |
ae148b43 Y |
244 | depends on ARM64 || COMPILE_TEST |
245 | depends on PCI_MSI | |
e9f08b65 ZW |
246 | select DMA_ENGINE |
247 | select DMA_VIRTUAL_CHANNELS | |
248 | help | |
249 | Support HiSilicon Kunpeng DMA engine. | |
250 | ||
3c216190 VK |
251 | config IMG_MDC_DMA |
252 | tristate "IMG MDC support" | |
253 | depends on MIPS || COMPILE_TEST | |
254 | depends on MFD_SYSCON | |
0fb6f739 | 255 | select DMA_ENGINE |
3c216190 VK |
256 | select DMA_VIRTUAL_CHANNELS |
257 | help | |
258 | Enable support for the IMG multi-threaded DMA controller (MDC). | |
9a322993 | 259 | |
3c216190 VK |
260 | config IMX_DMA |
261 | tristate "i.MX DMA support" | |
8e2d41f8 | 262 | depends on ARCH_MXC |
ff7b0479 | 263 | select DMA_ENGINE |
5296b56d | 264 | help |
3c216190 VK |
265 | Support the i.MX DMA engine. This engine is integrated into |
266 | Freescale i.MX1/21/27 chips. | |
ff7b0479 | 267 | |
3c216190 VK |
268 | config IMX_SDMA |
269 | tristate "i.MX SDMA support" | |
8e2d41f8 | 270 | depends on ARCH_MXC |
5296b56d | 271 | select DMA_ENGINE |
57b772b8 | 272 | select DMA_VIRTUAL_CHANNELS |
5296b56d | 273 | help |
3c216190 VK |
274 | Support the i.MX SDMA engine. This engine is integrated into |
275 | Freescale i.MX25/31/35/51/53/6 chips. | |
5296b56d | 276 | |
9ab8b4e7 | 277 | config INTEL_IDMA64 |
35271227 LT |
278 | tristate "Intel integrated DMA 64-bit support" |
279 | select DMA_ENGINE | |
280 | select DMA_VIRTUAL_CHANNELS | |
5296b56d | 281 | help |
35271227 LT |
282 | Enable DMA support for Intel Low Power Subsystem such as found on |
283 | Intel Skylake PCH. | |
5296b56d | 284 | |
bfe1d560 DJ |
285 | config INTEL_IDXD |
286 | tristate "Intel Data Accelerators support" | |
287 | depends on PCI && X86_64 | |
d6a7bb86 | 288 | depends on PCI_MSI |
0705107f | 289 | depends on SBITMAP |
bfe1d560 | 290 | select DMA_ENGINE |
bfe1d560 DJ |
291 | help |
292 | Enable support for the Intel(R) data accelerators present | |
293 | in Intel Xeon CPU. | |
294 | ||
295 | Say Y if you have such a platform. | |
296 | ||
297 | If unsure, say N. | |
298 | ||
8e50d392 DJ |
299 | # Config symbol that collects all the dependencies that's necessary to |
300 | # support shared virtual memory for the devices supported by idxd. | |
301 | config INTEL_IDXD_SVM | |
302 | bool "Accelerator Shared Virtual Memory Support" | |
303 | depends on INTEL_IDXD | |
304 | depends on INTEL_IOMMU_SVM | |
305 | depends on PCI_PRI | |
306 | depends on PCI_PASID | |
307 | depends on PCI_IOV | |
308 | ||
3c216190 VK |
309 | config INTEL_IOATDMA |
310 | tristate "Intel I/OAT DMA support" | |
311 | depends on PCI && X86_64 | |
a57e16cf | 312 | select DMA_ENGINE |
3c216190 VK |
313 | select DMA_ENGINE_RAID |
314 | select DCA | |
a57e16cf | 315 | help |
3c216190 VK |
316 | Enable support for the Intel(R) I/OAT DMA engine present |
317 | in recent Intel Xeon chipsets. | |
a57e16cf | 318 | |
3c216190 VK |
319 | Say Y here if you have such a chipset. |
320 | ||
321 | If unsure, say N. | |
322 | ||
323 | config INTEL_IOP_ADMA | |
aad7ad2a | 324 | tristate "Intel IOP32x ADMA support" |
04cbfba6 | 325 | depends on ARCH_IOP32X || COMPILE_TEST |
ea76f0b3 | 326 | select DMA_ENGINE |
3c216190 | 327 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
ea76f0b3 | 328 | help |
3c216190 | 329 | Enable support for the Intel(R) IOP Series RAID engines. |
ea76f0b3 | 330 | |
3c216190 VK |
331 | config K3_DMA |
332 | tristate "Hisilicon K3 DMA support" | |
e39a2329 | 333 | depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST |
ddeccb8d HS |
334 | select DMA_ENGINE |
335 | select DMA_VIRTUAL_CHANNELS | |
336 | help | |
3c216190 VK |
337 | Support the DMA engine for Hisilicon K3 platform |
338 | devices. | |
ddeccb8d | 339 | |
3c216190 VK |
340 | config LPC18XX_DMAMUX |
341 | bool "NXP LPC18xx/43xx DMA MUX for PL080" | |
342 | depends on ARCH_LPC18XX || COMPILE_TEST | |
343 | depends on OF && AMBA_PL08X | |
344 | select MFD_SYSCON | |
345 | help | |
346 | Enable support for DMA on NXP LPC18xx/43xx platforms | |
347 | with PL080 and multiplexed DMA request lines. | |
d8902adc | 348 | |
e7a3ff92 AD |
349 | config MCF_EDMA |
350 | tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs" | |
351 | depends on M5441x || COMPILE_TEST | |
352 | select DMA_ENGINE | |
353 | select DMA_VIRTUAL_CHANNELS | |
354 | help | |
355 | Support the Freescale ColdFire eDMA engine, 64-channel | |
356 | implementation that performs complex data transfers with | |
357 | minimal intervention from a host processor. | |
358 | This module can be found on Freescale ColdFire mcf5441x SoCs. | |
359 | ||
6c3214e6 JB |
360 | config MILBEAUT_HDMAC |
361 | tristate "Milbeaut AHB DMA support" | |
362 | depends on ARCH_MILBEAUT || COMPILE_TEST | |
363 | depends on OF | |
364 | select DMA_ENGINE | |
365 | select DMA_VIRTUAL_CHANNELS | |
366 | help | |
367 | Say yes here to support the Socionext Milbeaut | |
368 | HDMAC device. | |
369 | ||
a6e9be05 JB |
370 | config MILBEAUT_XDMAC |
371 | tristate "Milbeaut AXI DMA support" | |
372 | depends on ARCH_MILBEAUT || COMPILE_TEST | |
373 | depends on OF | |
374 | select DMA_ENGINE | |
375 | select DMA_VIRTUAL_CHANNELS | |
376 | help | |
377 | Say yes here to support the Socionext Milbeaut | |
378 | XDMAC device. | |
379 | ||
3c216190 VK |
380 | config MMP_PDMA |
381 | bool "MMP PDMA support" | |
cd3a792a | 382 | depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST |
61f135b9 | 383 | select DMA_ENGINE |
61f135b9 | 384 | help |
3c216190 | 385 | Support the MMP PDMA engine for PXA and MMP platform. |
61f135b9 | 386 | |
3c216190 VK |
387 | config MMP_TDMA |
388 | bool "MMP Two-Channel DMA support" | |
93d05f1e | 389 | depends on ARCH_MMP || COMPILE_TEST |
8d318a50 | 390 | select DMA_ENGINE |
d6619761 | 391 | select GENERIC_ALLOCATOR |
8d318a50 | 392 | help |
3c216190 VK |
393 | Support the MMP Two-Channel DMA engine. |
394 | This engine used for MMP Audio DMA and pxa910 SQU. | |
8d318a50 | 395 | |
3c216190 VK |
396 | config MOXART_DMA |
397 | tristate "MOXART DMA support" | |
398 | depends on ARCH_MOXART | |
12458ea0 | 399 | select DMA_ENGINE |
3c216190 | 400 | select DMA_VIRTUAL_CHANNELS |
12458ea0 | 401 | help |
3c216190 VK |
402 | Enable support for the MOXA ART SoC DMA controller. |
403 | ||
404 | Say Y here if you enabled MMP ADMA, otherwise say N. | |
12458ea0 | 405 | |
3c216190 VK |
406 | config MPC512X_DMA |
407 | tristate "Freescale MPC512x built-in DMA engine support" | |
408 | depends on PPC_MPC512x || PPC_MPC831x | |
de5d4453 | 409 | select DMA_ENGINE |
a7f7f624 | 410 | help |
3c216190 | 411 | Enable support for the Freescale MPC512x built-in DMA engine. |
de5d4453 | 412 | |
3c216190 VK |
413 | config MV_XOR |
414 | bool "Marvell XOR engine support" | |
c39290a1 | 415 | depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST |
ca21a146 | 416 | select DMA_ENGINE |
3c216190 VK |
417 | select DMA_ENGINE_RAID |
418 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
a7f7f624 | 419 | help |
3c216190 | 420 | Enable support for the Marvell XOR engine. |
ca21a146 | 421 | |
19a340b1 TP |
422 | config MV_XOR_V2 |
423 | bool "Marvell XOR engine version 2 support " | |
424 | depends on ARM64 | |
425 | select DMA_ENGINE | |
426 | select DMA_ENGINE_RAID | |
427 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
428 | select GENERIC_MSI_IRQ_DOMAIN | |
a7f7f624 | 429 | help |
19a340b1 TP |
430 | Enable support for the Marvell version 2 XOR engine. |
431 | ||
432 | This engine provides acceleration for copy, XOR and RAID6 | |
433 | operations, and is available on Marvell Armada 7K and 8K | |
434 | platforms. | |
435 | ||
3c216190 VK |
436 | config MXS_DMA |
437 | bool "MXS DMA support" | |
d762e4f3 | 438 | depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST |
3c216190 | 439 | select STMP_DEVICE |
ca21a146 RY |
440 | select DMA_ENGINE |
441 | help | |
3c216190 | 442 | Support the MXS DMA engine. This engine including APBH-DMA |
2446563c | 443 | and APBX-DMA is integrated into some Freescale chips. |
ca21a146 | 444 | |
3c216190 VK |
445 | config MX3_IPU |
446 | bool "MX3x Image Processing Unit support" | |
447 | depends on ARCH_MXC | |
c2dde5f8 | 448 | select DMA_ENGINE |
3c216190 | 449 | default y |
c2dde5f8 | 450 | help |
3c216190 VK |
451 | If you plan to use the Image Processing unit in the i.MX3x, say |
452 | Y here. If unsure, select Y. | |
a074ae38 | 453 | |
3c216190 VK |
454 | config MX3_IPU_IRQS |
455 | int "Number of dynamically mapped interrupts for IPU" | |
456 | depends on MX3_IPU | |
457 | range 2 137 | |
458 | default 4 | |
459 | help | |
460 | Out of 137 interrupt sources on i.MX31 IPU only very few are used. | |
461 | To avoid bloating the irq_desc[] array we allocate a sufficient | |
462 | number of IRQ slots and map them dynamically to specific sources. | |
12458ea0 | 463 | |
3c216190 VK |
464 | config NBPFAXI_DMA |
465 | tristate "Renesas Type-AXI NBPF DMA support" | |
b3040e40 | 466 | select DMA_ENGINE |
3c216190 | 467 | depends on ARM || COMPILE_TEST |
b3040e40 | 468 | help |
3c216190 | 469 | Support for "Type-AXI" NBPF DMA IPs from Renesas |
b3040e40 | 470 | |
47e20577 MS |
471 | config OWL_DMA |
472 | tristate "Actions Semi Owl SoCs DMA support" | |
473 | depends on ARCH_ACTIONS | |
474 | select DMA_ENGINE | |
475 | select DMA_VIRTUAL_CHANNELS | |
476 | help | |
477 | Enable support for the Actions Semi Owl SoCs DMA controller. | |
478 | ||
0c42bd0e | 479 | config PCH_DMA |
ca7fe2db | 480 | tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA" |
4828b493 | 481 | depends on PCI && (X86_32 || COMPILE_TEST) |
0c42bd0e YW |
482 | select DMA_ENGINE |
483 | help | |
2cdf2455 TM |
484 | Enable support for Intel EG20T PCH DMA engine. |
485 | ||
e79e72be | 486 | This driver also can be used for LAPIS Semiconductor IOH(Input/ |
ca7fe2db TM |
487 | Output Hub), ML7213, ML7223 and ML7831. |
488 | ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is | |
489 | for MP(Media Phone) use and ML7831 IOH is for general purpose use. | |
490 | ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series. | |
491 | ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH. | |
0c42bd0e | 492 | |
3c216190 VK |
493 | config PL330_DMA |
494 | tristate "DMA API Driver for PL330" | |
1ec1e82f | 495 | select DMA_ENGINE |
3c216190 | 496 | depends on ARM_AMBA |
1ec1e82f | 497 | help |
3c216190 VK |
498 | Select if your platform has one or more PL330 DMACs. |
499 | You need to provide platform specific settings via | |
500 | platform_data for a dma-pl330 device. | |
1ec1e82f | 501 | |
3c216190 VK |
502 | config PXA_DMA |
503 | bool "PXA DMA support" | |
504 | depends on (ARCH_MMP || ARCH_PXA) | |
1f1846c6 | 505 | select DMA_ENGINE |
3c216190 | 506 | select DMA_VIRTUAL_CHANNELS |
1f1846c6 | 507 | help |
3c216190 VK |
508 | Support the DMA engine for PXA. It is also compatible with MMP PDMA |
509 | platform. The internal DMA IP of all PXA variants is supported, with | |
510 | 16 to 32 channels for peripheral to memory or memory to memory | |
511 | transfers. | |
1f1846c6 | 512 | |
905ca51e LG |
513 | config PLX_DMA |
514 | tristate "PLX ExpressLane PEX Switch DMA Engine Support" | |
515 | depends on PCI | |
516 | select DMA_ENGINE | |
517 | help | |
518 | Some PLX ExpressLane PCI Switches support additional DMA engines. | |
519 | These are exposed via extra functions on the switch's | |
520 | upstream port. Each function exposes one DMA channel. | |
521 | ||
3c216190 VK |
522 | config SIRF_DMA |
523 | tristate "CSR SiRFprimaII/SiRFmarco DMA support" | |
524 | depends on ARCH_SIRF | |
a580b8c5 SG |
525 | select DMA_ENGINE |
526 | help | |
3c216190 | 527 | Enable support for the CSR SiRFprimaII DMA engine. |
a580b8c5 | 528 | |
3c216190 VK |
529 | config STE_DMA40 |
530 | bool "ST-Ericsson DMA40 support" | |
531 | depends on ARCH_U8500 | |
760ee1c4 MW |
532 | select DMA_ENGINE |
533 | help | |
3c216190 | 534 | Support for ST-Ericsson DMA40 controller |
760ee1c4 | 535 | |
6b4cd727 PG |
536 | config ST_FDMA |
537 | tristate "ST FDMA dmaengine support" | |
538 | depends on ARCH_STI | |
3d6b3715 | 539 | depends on REMOTEPROC |
6b4cd727 PG |
540 | select ST_SLIM_REMOTEPROC |
541 | select DMA_ENGINE | |
542 | select DMA_VIRTUAL_CHANNELS | |
543 | help | |
544 | Enable support for ST FDMA controller. | |
545 | It supports 16 independent DMA channels, accepts up to 32 DMA requests | |
546 | ||
547 | Say Y here if you have such a chipset. | |
548 | If unsure, say N. | |
549 | ||
d8b46839 CM |
550 | config STM32_DMA |
551 | bool "STMicroelectronics STM32 DMA support" | |
4fbf3717 | 552 | depends on ARCH_STM32 || COMPILE_TEST |
d8b46839 | 553 | select DMA_ENGINE |
d8b46839 CM |
554 | select DMA_VIRTUAL_CHANNELS |
555 | help | |
556 | Enable support for the on-chip DMA controller on STMicroelectronics | |
557 | STM32 MCUs. | |
ddf9bd40 | 558 | If you have a board based on such a MCU and wish to use DMA say Y |
d8b46839 CM |
559 | here. |
560 | ||
df7e762d PYM |
561 | config STM32_DMAMUX |
562 | bool "STMicroelectronics STM32 dma multiplexer support" | |
563 | depends on STM32_DMA || COMPILE_TEST | |
564 | help | |
565 | Enable support for the on-chip DMA multiplexer on STMicroelectronics | |
566 | STM32 MCUs. | |
567 | If you have a board based on such a MCU and wish to use DMAMUX say Y | |
568 | here. | |
569 | ||
a4ffb13c PYM |
570 | config STM32_MDMA |
571 | bool "STMicroelectronics STM32 master dma support" | |
572 | depends on ARCH_STM32 || COMPILE_TEST | |
ea62e2cc | 573 | depends on OF |
a4ffb13c | 574 | select DMA_ENGINE |
a4ffb13c PYM |
575 | select DMA_VIRTUAL_CHANNELS |
576 | help | |
577 | Enable support for the on-chip MDMA controller on STMicroelectronics | |
578 | STM32 platforms. | |
579 | If you have a board based on STM32 SoC and wish to use the master DMA | |
580 | say Y here. | |
581 | ||
9b3b8171 BW |
582 | config SPRD_DMA |
583 | tristate "Spreadtrum DMA support" | |
584 | depends on ARCH_SPRD || COMPILE_TEST | |
585 | select DMA_ENGINE | |
586 | select DMA_VIRTUAL_CHANNELS | |
587 | help | |
588 | Enable support for the on-chip DMA controller on Spreadtrum platform. | |
589 | ||
3c216190 | 590 | config S3C24XX_DMAC |
9bdca822 | 591 | bool "Samsung S3C24XX DMA support" |
1609db6f | 592 | depends on ARCH_S3C24XX || COMPILE_TEST |
6365bead | 593 | select DMA_ENGINE |
50437bff | 594 | select DMA_VIRTUAL_CHANNELS |
6365bead | 595 | help |
3c216190 VK |
596 | Support for the Samsung S3C24XX DMA controller driver. The |
597 | DMA controller is having multiple DMA channels which can be | |
598 | configured for different peripherals like audio, UART, SPI. | |
599 | The DMA controller can transfer data from memory to peripheral, | |
600 | periphal to memory, periphal to periphal and memory to memory. | |
6365bead | 601 | |
3c216190 VK |
602 | config TXX9_DMAC |
603 | tristate "Toshiba TXx9 SoC DMA support" | |
604 | depends on MACH_TX49XX || MACH_TX39XX | |
c6da0ba8 ZG |
605 | select DMA_ENGINE |
606 | help | |
3c216190 VK |
607 | Support the TXx9 SoC internal DMA controller. This can be |
608 | integrated in chips such as the Toshiba TX4927/38/39. | |
c6da0ba8 | 609 | |
3c216190 | 610 | config TEGRA20_APB_DMA |
703b70f4 | 611 | tristate "NVIDIA Tegra20 APB DMA support" |
6c41ac96 | 612 | depends on ARCH_TEGRA || COMPILE_TEST |
7bedaa55 | 613 | select DMA_ENGINE |
3c216190 VK |
614 | help |
615 | Support for the NVIDIA Tegra20 APB DMA controller driver. The | |
616 | DMA controller is having multiple DMA channel which can be | |
617 | configured for different peripherals like audio, UART, SPI, | |
618 | I2C etc which is in APB bus. | |
619 | This DMA controller transfers data from memory to peripheral fifo | |
620 | or vice versa. It does not support memory to memory data transfer. | |
7bedaa55 | 621 | |
f46b1957 | 622 | config TEGRA210_ADMA |
3ed16793 | 623 | tristate "NVIDIA Tegra210 ADMA support" |
3145d73e | 624 | depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST) |
f46b1957 JH |
625 | select DMA_ENGINE |
626 | select DMA_VIRTUAL_CHANNELS | |
f46b1957 JH |
627 | help |
628 | Support for the NVIDIA Tegra210 ADMA controller driver. The | |
629 | DMA controller has multiple DMA channels and is used to service | |
630 | various audio clients in the Tegra210 audio processing engine | |
631 | (APE). This DMA controller transfers data from memory to | |
632 | peripheral and vice versa. It does not support memory to | |
633 | memory data transfer. | |
634 | ||
3c216190 VK |
635 | config TIMB_DMA |
636 | tristate "Timberdale FPGA DMA support" | |
4aa258af | 637 | depends on MFD_TIMBERDALE || COMPILE_TEST |
96286b57 | 638 | select DMA_ENGINE |
3c216190 VK |
639 | help |
640 | Enable support for the Timberdale FPGA DMA engine. | |
96286b57 | 641 | |
32e74aab MY |
642 | config UNIPHIER_MDMAC |
643 | tristate "UniPhier MIO DMAC" | |
644 | depends on ARCH_UNIPHIER || COMPILE_TEST | |
645 | depends on OF | |
646 | select DMA_ENGINE | |
647 | select DMA_VIRTUAL_CHANNELS | |
648 | help | |
649 | Enable support for the MIO DMAC (Media I/O DMA controller) on the | |
650 | UniPhier platform. This DMA controller is used as the external | |
651 | DMA engine of the SD/eMMC controllers of the LD4, Pro4, sLD8 SoCs. | |
652 | ||
667b9251 KH |
653 | config UNIPHIER_XDMAC |
654 | tristate "UniPhier XDMAC support" | |
655 | depends on ARCH_UNIPHIER || COMPILE_TEST | |
656 | depends on OF | |
657 | select DMA_ENGINE | |
658 | select DMA_VIRTUAL_CHANNELS | |
659 | help | |
660 | Enable support for the XDMAC (external DMA controller) on the | |
661 | UniPhier platform. This DMA controller can transfer data from | |
662 | memory to memory, memory to peripheral and peripheral to memory. | |
663 | ||
3c216190 VK |
664 | config XGENE_DMA |
665 | tristate "APM X-Gene DMA support" | |
666 | depends on ARCH_XGENE || COMPILE_TEST | |
d6be34fb | 667 | select DMA_ENGINE |
3c216190 VK |
668 | select DMA_ENGINE_RAID |
669 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
d6be34fb | 670 | help |
3c216190 | 671 | Enable support for the APM X-Gene SoC DMA engine. |
5f9e685a | 672 | |
fde57a7c KA |
673 | config XILINX_DMA |
674 | tristate "Xilinx AXI DMAS Engine" | |
b72db400 | 675 | depends on (ARCH_ZYNQ || MICROBLAZE || ARM64) |
9cd4360d ST |
676 | select DMA_ENGINE |
677 | help | |
678 | Enable support for Xilinx AXI VDMA Soft IP. | |
679 | ||
fde57a7c | 680 | AXI VDMA engine provides high-bandwidth direct memory access |
9cd4360d ST |
681 | between memory and AXI4-Stream video type target |
682 | peripherals including peripherals which support AXI4- | |
683 | Stream Video Protocol. It has two stream interfaces/ | |
684 | channels, Memory Mapped to Stream (MM2S) and Stream to | |
685 | Memory Mapped (S2MM) for the data transfers. | |
fde57a7c KA |
686 | AXI CDMA engine provides high-bandwidth direct memory access |
687 | between a memory-mapped source address and a memory-mapped | |
688 | destination address. | |
689 | AXI DMA engine provides high-bandwidth one dimensional direct | |
690 | memory access between memory and AXI4-Stream target peripherals. | |
6ccd692b RSP |
691 | AXI MCDMA engine provides high-bandwidth direct memory access |
692 | between memory and AXI4-Stream target peripherals. It provides | |
693 | the scatter gather interface with multiple channels independent | |
694 | configuration support. | |
9cd4360d | 695 | |
b0cc417c KA |
696 | config XILINX_ZYNQMP_DMA |
697 | tristate "Xilinx ZynqMP DMA Engine" | |
698 | depends on (ARCH_ZYNQ || MICROBLAZE || ARM64) | |
699 | select DMA_ENGINE | |
700 | help | |
701 | Enable support for Xilinx ZynqMP DMA controller. | |
9cd4360d | 702 | |
7cbb0c63 HK |
703 | config XILINX_ZYNQMP_DPDMA |
704 | tristate "Xilinx DPDMA Engine" | |
705 | select DMA_ENGINE | |
706 | select DMA_VIRTUAL_CHANNELS | |
707 | help | |
708 | Enable support for Xilinx ZynqMP DisplayPort DMA. Choose this option | |
709 | if you have a Xilinx ZynqMP SoC with a DisplayPort subsystem. The | |
710 | driver provides the dmaengine required by the DisplayPort subsystem | |
711 | display driver. | |
712 | ||
e3fa9841 | 713 | config ZX_DMA |
253f9f44 | 714 | tristate "ZTE ZX DMA support" |
854d4bd2 | 715 | depends on ARCH_ZX || COMPILE_TEST |
5689ba7f AB |
716 | select DMA_ENGINE |
717 | select DMA_VIRTUAL_CHANNELS | |
718 | help | |
253f9f44 | 719 | Support the DMA engine for ZTE ZX family platform devices. |
5689ba7f | 720 | |
9f2fd0df | 721 | |
3c216190 VK |
722 | # driver files |
723 | source "drivers/dma/bestcomm/Kconfig" | |
c13c8260 | 724 | |
548c4597 SW |
725 | source "drivers/dma/mediatek/Kconfig" |
726 | ||
d9b31efc SK |
727 | source "drivers/dma/qcom/Kconfig" |
728 | ||
3c216190 | 729 | source "drivers/dma/dw/Kconfig" |
50437bff | 730 | |
e63d79d1 GP |
731 | source "drivers/dma/dw-edma/Kconfig" |
732 | ||
3c216190 | 733 | source "drivers/dma/hsu/Kconfig" |
1b2e98bc | 734 | |
6973886a GW |
735 | source "drivers/dma/sf-pdma/Kconfig" |
736 | ||
3c216190 | 737 | source "drivers/dma/sh/Kconfig" |
5fa422c9 | 738 | |
d88b1397 PU |
739 | source "drivers/dma/ti/Kconfig" |
740 | ||
7fdf9b05 PM |
741 | source "drivers/dma/fsl-dpaa2-qdma/Kconfig" |
742 | ||
3c216190 | 743 | # clients |
db217334 | 744 | comment "DMA Clients" |
2ed6dc34 | 745 | depends on DMA_ENGINE |
db217334 | 746 | |
729b5d1b DW |
747 | config ASYNC_TX_DMA |
748 | bool "Async_tx: Offload support for the async_tx api" | |
9a8de639 | 749 | depends on DMA_ENGINE |
729b5d1b DW |
750 | help |
751 | This allows the async_tx api to take advantage of offload engines for | |
752 | memcpy, memset, xor, and raid6 p+q operations. If your platform has | |
753 | a dma engine that can perform raid operations and you have enabled | |
754 | MD_RAID456 say Y. | |
755 | ||
756 | If unsure, say N. | |
757 | ||
4a776f0a HS |
758 | config DMATEST |
759 | tristate "DMA Test client" | |
760 | depends on DMA_ENGINE | |
58532e66 | 761 | select DMA_ENGINE_RAID |
4a776f0a HS |
762 | help |
763 | Simple DMA test client. Say N unless you're debugging a | |
764 | DMA Device driver. | |
765 | ||
3cc377b9 DW |
766 | config DMA_ENGINE_RAID |
767 | bool | |
768 | ||
2ed6dc34 | 769 | endif |