]>
Commit | Line | Data |
---|---|---|
ec8f24b7 | 1 | # SPDX-License-Identifier: GPL-2.0-only |
c13c8260 CL |
2 | # |
3 | # DMA engine configuration | |
4 | # | |
5 | ||
2ed6dc34 | 6 | menuconfig DMADEVICES |
6d4f5879 | 7 | bool "DMA Engine support" |
04ce9ab3 | 8 | depends on HAS_DMA |
2ed6dc34 | 9 | help |
6d4f5879 HS |
10 | DMA engines can do asynchronous data transfers without |
11 | involving the host CPU. Currently, this framework can be | |
12 | used to offload memory copies in the network stack and | |
9c402f4e DW |
13 | RAID operations in the MD driver. This menu only presents |
14 | DMA Device drivers supported by the configured arch, it may | |
15 | be empty in some cases. | |
2ed6dc34 | 16 | |
6c664a89 LW |
17 | config DMADEVICES_DEBUG |
18 | bool "DMA Engine debugging" | |
19 | depends on DMADEVICES != n | |
20 | help | |
21 | This is an option for use by developers; most people should | |
22 | say N here. This enables DMA engine core and driver debugging. | |
23 | ||
24 | config DMADEVICES_VDEBUG | |
25 | bool "DMA Engine verbose debugging" | |
26 | depends on DMADEVICES_DEBUG != n | |
27 | help | |
28 | This is an option for use by developers; most people should | |
29 | say N here. This enables deeper (more verbose) debugging of | |
30 | the DMA engine core and drivers. | |
31 | ||
32 | ||
2ed6dc34 SN |
33 | if DMADEVICES |
34 | ||
35 | comment "DMA Devices" | |
36 | ||
3c216190 VK |
37 | #core |
38 | config ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
39 | bool | |
95b4ecbf | 40 | |
3c216190 VK |
41 | config ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
42 | bool | |
95b4ecbf | 43 | |
3c216190 | 44 | config DMA_ENGINE |
138f4c35 DW |
45 | bool |
46 | ||
3c216190 VK |
47 | config DMA_VIRTUAL_CHANNELS |
48 | tristate | |
49 | ||
50 | config DMA_ACPI | |
51 | def_bool y | |
52 | depends on ACPI | |
53 | ||
54 | config DMA_OF | |
55 | def_bool y | |
56 | depends on OF | |
57 | select DMA_ENGINE | |
58 | ||
59 | #devices | |
a85c6f1b SR |
60 | config ALTERA_MSGDMA |
61 | tristate "Altera / Intel mSGDMA Engine" | |
62 | select DMA_ENGINE | |
63 | help | |
64 | Enable support for Altera / Intel mSGDMA controller. | |
65 | ||
e8689e63 LW |
66 | config AMBA_PL08X |
67 | bool "ARM PrimeCell PL080 or PL081 support" | |
c6a0aec9 | 68 | depends on ARM_AMBA |
e8689e63 | 69 | select DMA_ENGINE |
083be28a | 70 | select DMA_VIRTUAL_CHANNELS |
e8689e63 | 71 | help |
1e1cfc72 LW |
72 | Say yes if your platform has a PL08x DMAC device which can |
73 | provide DMA engine support. This includes the original ARM | |
74 | PL080 and PL081, Samsungs PL080 derivative and Faraday | |
75 | Technology's FTDMAC020 PL080 derivative. | |
e8689e63 | 76 | |
3c216190 VK |
77 | config AMCC_PPC440SPE_ADMA |
78 | tristate "AMCC PPC440SPe ADMA support" | |
79 | depends on 440SPe || 440SP | |
2ed6dc34 | 80 | select DMA_ENGINE |
3cc377b9 | 81 | select DMA_ENGINE_RAID |
3c216190 | 82 | select ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
5fc6d897 | 83 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
2ed6dc34 | 84 | help |
3c216190 | 85 | Enable support for the AMCC PPC440SPe RAID engines. |
2ed6dc34 | 86 | |
dc78baa2 NF |
87 | config AT_HDMAC |
88 | tristate "Atmel AHB DMA support" | |
f898fed0 | 89 | depends on ARCH_AT91 |
dc78baa2 NF |
90 | select DMA_ENGINE |
91 | help | |
f898fed0 | 92 | Support the Atmel AHB DMA controller. |
2ed6dc34 | 93 | |
e1f7c9ee LD |
94 | config AT_XDMAC |
95 | tristate "Atmel XDMA support" | |
6e5ae29b | 96 | depends on ARCH_AT91 |
e1f7c9ee LD |
97 | select DMA_ENGINE |
98 | help | |
99 | Support the Atmel XDMA controller. | |
2ed6dc34 | 100 | |
3c216190 VK |
101 | config AXI_DMAC |
102 | tristate "Analog Devices AXI-DMAC DMA support" | |
23b84639 | 103 | depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_SOCFPGA || COMPILE_TEST |
2ed6dc34 | 104 | select DMA_ENGINE |
3c216190 | 105 | select DMA_VIRTUAL_CHANNELS |
fc15be39 | 106 | select REGMAP_MMIO |
2ed6dc34 | 107 | help |
3c216190 VK |
108 | Enable support for the Analog Devices AXI-DMAC peripheral. This DMA |
109 | controller is often used in Analog Device's reference designs for FPGA | |
110 | platforms. | |
c13c8260 | 111 | |
743e1c8f AP |
112 | config BCM_SBA_RAID |
113 | tristate "Broadcom SBA RAID engine support" | |
58d96125 AB |
114 | depends on ARM64 || COMPILE_TEST |
115 | depends on MAILBOX && RAID6_PQ | |
743e1c8f AP |
116 | select DMA_ENGINE |
117 | select DMA_ENGINE_RAID | |
118 | select ASYNC_TX_DISABLE_XOR_VAL_DMA | |
119 | select ASYNC_TX_DISABLE_PQ_VAL_DMA | |
7076a1e4 | 120 | default m if ARCH_BCM_IPROC |
743e1c8f AP |
121 | help |
122 | Enable support for Broadcom SBA RAID Engine. The SBA RAID | |
123 | engine is available on most of the Broadcom iProc SoCs. It | |
124 | has the capability to offload memcpy, xor and pq computation | |
125 | for raid5/6. | |
126 | ||
3c216190 VK |
127 | config COH901318 |
128 | bool "ST-Ericsson COH901318 DMA support" | |
129 | select DMA_ENGINE | |
6e450376 | 130 | depends on ARCH_U300 || COMPILE_TEST |
3c216190 VK |
131 | help |
132 | Enable support for ST-Ericsson COH 901 318 DMA. | |
133 | ||
134 | config DMA_BCM2835 | |
135 | tristate "BCM2835 DMA engine support" | |
136 | depends on ARCH_BCM2835 | |
137 | select DMA_ENGINE | |
138 | select DMA_VIRTUAL_CHANNELS | |
139 | ||
140 | config DMA_JZ4740 | |
141 | tristate "JZ4740 DMA support" | |
d78d6c07 | 142 | depends on MACH_JZ4740 || COMPILE_TEST |
3c216190 VK |
143 | select DMA_ENGINE |
144 | select DMA_VIRTUAL_CHANNELS | |
145 | ||
146 | config DMA_JZ4780 | |
147 | tristate "JZ4780 DMA support" | |
c558ecd2 | 148 | depends on MIPS || COMPILE_TEST |
667dfed9 AS |
149 | select DMA_ENGINE |
150 | select DMA_VIRTUAL_CHANNELS | |
151 | help | |
3c216190 VK |
152 | This selects support for the DMA controller in Ingenic JZ4780 SoCs. |
153 | If you have a board based on such a SoC and wish to use DMA for | |
154 | devices which can use the DMA controller, say Y or M here. | |
667dfed9 | 155 | |
3c216190 VK |
156 | config DMA_SA11X0 |
157 | tristate "SA-11x0 DMA support" | |
6947c3f2 | 158 | depends on ARCH_SA1100 || COMPILE_TEST |
dc78baa2 | 159 | select DMA_ENGINE |
3c216190 | 160 | select DMA_VIRTUAL_CHANNELS |
dc78baa2 | 161 | help |
3c216190 VK |
162 | Support the DMA engine found on Intel StrongARM SA-1100 and |
163 | SA-1110 SoCs. This DMA engine can only be used with on-chip | |
164 | devices. | |
dc78baa2 | 165 | |
3c216190 VK |
166 | config DMA_SUN4I |
167 | tristate "Allwinner A10 DMA SoCs support" | |
35271227 | 168 | depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I |
3c216190 | 169 | default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I) |
e1f7c9ee | 170 | select DMA_ENGINE |
3c216190 | 171 | select DMA_VIRTUAL_CHANNELS |
e1f7c9ee | 172 | help |
3c216190 VK |
173 | Enable support for the DMA controller present in the sun4i, |
174 | sun5i and sun7i Allwinner ARM SoCs. | |
175 | ||
176 | config DMA_SUN6I | |
177 | tristate "Allwinner A31 SoCs DMA support" | |
c429ceb1 | 178 | depends on MACH_SUN6I || MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST |
3c216190 VK |
179 | depends on RESET_CONTROLLER |
180 | select DMA_ENGINE | |
181 | select DMA_VIRTUAL_CHANNELS | |
182 | help | |
183 | Support for the DMA engine first found in Allwinner A31 SoCs. | |
184 | ||
1fe20f1b EP |
185 | config DW_AXI_DMAC |
186 | tristate "Synopsys DesignWare AXI DMA support" | |
187 | depends on OF || COMPILE_TEST | |
188 | select DMA_ENGINE | |
189 | select DMA_VIRTUAL_CHANNELS | |
190 | help | |
191 | Enable support for Synopsys DesignWare AXI DMA controller. | |
192 | NOTE: This driver wasn't tested on 64 bit platform because | |
193 | of lack 64 bit platform with Synopsys DW AXI DMAC. | |
194 | ||
3c216190 VK |
195 | config EP93XX_DMA |
196 | bool "Cirrus Logic EP93xx DMA support" | |
49ad6d7d | 197 | depends on ARCH_EP93XX || COMPILE_TEST |
3c216190 VK |
198 | select DMA_ENGINE |
199 | help | |
200 | Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. | |
e1f7c9ee | 201 | |
173acc7c | 202 | config FSL_DMA |
8de7a7d9 | 203 | tristate "Freescale Elo series DMA support" |
77cd62e8 | 204 | depends on FSL_SOC |
173acc7c | 205 | select DMA_ENGINE |
5fc6d897 | 206 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
173acc7c | 207 | ---help--- |
8de7a7d9 HZ |
208 | Enable support for the Freescale Elo series DMA controllers. |
209 | The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the | |
210 | EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on | |
211 | some Txxx and Bxxx parts. | |
173acc7c | 212 | |
3c216190 VK |
213 | config FSL_EDMA |
214 | tristate "Freescale eDMA engine support" | |
215 | depends on OF | |
216 | select DMA_ENGINE | |
217 | select DMA_VIRTUAL_CHANNELS | |
218 | help | |
219 | Support the Freescale eDMA engine with programmable channel | |
220 | multiplexing capability for DMA request sources(slot). | |
221 | This module can be found on Freescale Vybrid and LS-1 SoCs. | |
222 | ||
b092529e PM |
223 | config FSL_QDMA |
224 | tristate "NXP Layerscape qDMA engine support" | |
225 | depends on ARM || ARM64 | |
226 | select DMA_ENGINE | |
227 | select DMA_VIRTUAL_CHANNELS | |
228 | select DMA_ENGINE_RAID | |
229 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
230 | help | |
231 | Support the NXP Layerscape qDMA engine with command queue and legacy mode. | |
232 | Channel virtualization is supported through enqueuing of DMA jobs to, | |
233 | or dequeuing DMA jobs from, different work queues. | |
234 | This module can be found on NXP Layerscape SoCs. | |
235 | The qdma driver only work on SoCs with a DPAA hardware block. | |
236 | ||
ad80da65 XS |
237 | config FSL_RAID |
238 | tristate "Freescale RAID engine Support" | |
239 | depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
240 | select DMA_ENGINE | |
241 | select DMA_ENGINE_RAID | |
242 | ---help--- | |
243 | Enable support for Freescale RAID Engine. RAID Engine is | |
244 | available on some QorIQ SoCs (like P5020/P5040). It has | |
245 | the capability to offload memcpy, xor and pq computation | |
246 | for raid5/6. | |
247 | ||
3c216190 VK |
248 | config IMG_MDC_DMA |
249 | tristate "IMG MDC support" | |
250 | depends on MIPS || COMPILE_TEST | |
251 | depends on MFD_SYSCON | |
0fb6f739 | 252 | select DMA_ENGINE |
3c216190 VK |
253 | select DMA_VIRTUAL_CHANNELS |
254 | help | |
255 | Enable support for the IMG multi-threaded DMA controller (MDC). | |
9a322993 | 256 | |
3c216190 VK |
257 | config IMX_DMA |
258 | tristate "i.MX DMA support" | |
8e2d41f8 | 259 | depends on ARCH_MXC |
ff7b0479 | 260 | select DMA_ENGINE |
5296b56d | 261 | help |
3c216190 VK |
262 | Support the i.MX DMA engine. This engine is integrated into |
263 | Freescale i.MX1/21/27 chips. | |
ff7b0479 | 264 | |
3c216190 VK |
265 | config IMX_SDMA |
266 | tristate "i.MX SDMA support" | |
8e2d41f8 | 267 | depends on ARCH_MXC |
5296b56d | 268 | select DMA_ENGINE |
57b772b8 | 269 | select DMA_VIRTUAL_CHANNELS |
5296b56d | 270 | help |
3c216190 VK |
271 | Support the i.MX SDMA engine. This engine is integrated into |
272 | Freescale i.MX25/31/35/51/53/6 chips. | |
5296b56d | 273 | |
9ab8b4e7 | 274 | config INTEL_IDMA64 |
35271227 LT |
275 | tristate "Intel integrated DMA 64-bit support" |
276 | select DMA_ENGINE | |
277 | select DMA_VIRTUAL_CHANNELS | |
5296b56d | 278 | help |
35271227 LT |
279 | Enable DMA support for Intel Low Power Subsystem such as found on |
280 | Intel Skylake PCH. | |
5296b56d | 281 | |
3c216190 VK |
282 | config INTEL_IOATDMA |
283 | tristate "Intel I/OAT DMA support" | |
284 | depends on PCI && X86_64 | |
a57e16cf | 285 | select DMA_ENGINE |
3c216190 VK |
286 | select DMA_ENGINE_RAID |
287 | select DCA | |
a57e16cf | 288 | help |
3c216190 VK |
289 | Enable support for the Intel(R) I/OAT DMA engine present |
290 | in recent Intel Xeon chipsets. | |
a57e16cf | 291 | |
3c216190 VK |
292 | Say Y here if you have such a chipset. |
293 | ||
294 | If unsure, say N. | |
295 | ||
296 | config INTEL_IOP_ADMA | |
aad7ad2a | 297 | tristate "Intel IOP32x ADMA support" |
2b97c395 | 298 | depends on ARCH_IOP32X |
ea76f0b3 | 299 | select DMA_ENGINE |
3c216190 | 300 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
ea76f0b3 | 301 | help |
3c216190 | 302 | Enable support for the Intel(R) IOP Series RAID engines. |
ea76f0b3 | 303 | |
3c216190 VK |
304 | config INTEL_MIC_X100_DMA |
305 | tristate "Intel MIC X100 DMA Driver" | |
306 | depends on 64BIT && X86 && INTEL_MIC_BUS | |
ec8a1586 LD |
307 | select DMA_ENGINE |
308 | help | |
3c216190 VK |
309 | This enables DMA support for the Intel Many Integrated Core |
310 | (MIC) family of PCIe form factor coprocessor X100 devices that | |
311 | run a 64 bit Linux OS. This driver will be used by both MIC | |
312 | host and card drivers. | |
ec8a1586 | 313 | |
3c216190 VK |
314 | If you are building host kernel with a MIC device or a card |
315 | kernel for a MIC device, then say M (recommended) or Y, else | |
316 | say N. If unsure say N. | |
317 | ||
318 | More information about the Intel MIC family as well as the Linux | |
319 | OS and tools for MIC to use with this driver are available from | |
320 | <http://software.intel.com/en-us/mic-developer>. | |
321 | ||
322 | config K3_DMA | |
323 | tristate "Hisilicon K3 DMA support" | |
e39a2329 | 324 | depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST |
ddeccb8d HS |
325 | select DMA_ENGINE |
326 | select DMA_VIRTUAL_CHANNELS | |
327 | help | |
3c216190 VK |
328 | Support the DMA engine for Hisilicon K3 platform |
329 | devices. | |
ddeccb8d | 330 | |
3c216190 VK |
331 | config LPC18XX_DMAMUX |
332 | bool "NXP LPC18xx/43xx DMA MUX for PL080" | |
333 | depends on ARCH_LPC18XX || COMPILE_TEST | |
334 | depends on OF && AMBA_PL08X | |
335 | select MFD_SYSCON | |
336 | help | |
337 | Enable support for DMA on NXP LPC18xx/43xx platforms | |
338 | with PL080 and multiplexed DMA request lines. | |
d8902adc | 339 | |
e7a3ff92 AD |
340 | config MCF_EDMA |
341 | tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs" | |
342 | depends on M5441x || COMPILE_TEST | |
343 | select DMA_ENGINE | |
344 | select DMA_VIRTUAL_CHANNELS | |
345 | help | |
346 | Support the Freescale ColdFire eDMA engine, 64-channel | |
347 | implementation that performs complex data transfers with | |
348 | minimal intervention from a host processor. | |
349 | This module can be found on Freescale ColdFire mcf5441x SoCs. | |
350 | ||
3c216190 VK |
351 | config MMP_PDMA |
352 | bool "MMP PDMA support" | |
cd3a792a | 353 | depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST |
61f135b9 | 354 | select DMA_ENGINE |
61f135b9 | 355 | help |
3c216190 | 356 | Support the MMP PDMA engine for PXA and MMP platform. |
61f135b9 | 357 | |
3c216190 VK |
358 | config MMP_TDMA |
359 | bool "MMP Two-Channel DMA support" | |
93d05f1e | 360 | depends on ARCH_MMP || COMPILE_TEST |
8d318a50 | 361 | select DMA_ENGINE |
93d05f1e | 362 | select MMP_SRAM if ARCH_MMP |
d6619761 | 363 | select GENERIC_ALLOCATOR |
8d318a50 | 364 | help |
3c216190 VK |
365 | Support the MMP Two-Channel DMA engine. |
366 | This engine used for MMP Audio DMA and pxa910 SQU. | |
367 | It needs sram driver under mach-mmp. | |
8d318a50 | 368 | |
3c216190 VK |
369 | config MOXART_DMA |
370 | tristate "MOXART DMA support" | |
371 | depends on ARCH_MOXART | |
12458ea0 | 372 | select DMA_ENGINE |
3c216190 | 373 | select DMA_VIRTUAL_CHANNELS |
12458ea0 | 374 | help |
3c216190 VK |
375 | Enable support for the MOXA ART SoC DMA controller. |
376 | ||
377 | Say Y here if you enabled MMP ADMA, otherwise say N. | |
12458ea0 | 378 | |
3c216190 VK |
379 | config MPC512X_DMA |
380 | tristate "Freescale MPC512x built-in DMA engine support" | |
381 | depends on PPC_MPC512x || PPC_MPC831x | |
de5d4453 | 382 | select DMA_ENGINE |
3c216190 VK |
383 | ---help--- |
384 | Enable support for the Freescale MPC512x built-in DMA engine. | |
de5d4453 | 385 | |
3c216190 VK |
386 | config MV_XOR |
387 | bool "Marvell XOR engine support" | |
c39290a1 | 388 | depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST |
ca21a146 | 389 | select DMA_ENGINE |
3c216190 VK |
390 | select DMA_ENGINE_RAID |
391 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
392 | ---help--- | |
393 | Enable support for the Marvell XOR engine. | |
ca21a146 | 394 | |
19a340b1 TP |
395 | config MV_XOR_V2 |
396 | bool "Marvell XOR engine version 2 support " | |
397 | depends on ARM64 | |
398 | select DMA_ENGINE | |
399 | select DMA_ENGINE_RAID | |
400 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
401 | select GENERIC_MSI_IRQ_DOMAIN | |
402 | ---help--- | |
403 | Enable support for the Marvell version 2 XOR engine. | |
404 | ||
405 | This engine provides acceleration for copy, XOR and RAID6 | |
406 | operations, and is available on Marvell Armada 7K and 8K | |
407 | platforms. | |
408 | ||
3c216190 VK |
409 | config MXS_DMA |
410 | bool "MXS DMA support" | |
d762e4f3 | 411 | depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST |
3c216190 | 412 | select STMP_DEVICE |
ca21a146 RY |
413 | select DMA_ENGINE |
414 | help | |
3c216190 | 415 | Support the MXS DMA engine. This engine including APBH-DMA |
2446563c | 416 | and APBX-DMA is integrated into some Freescale chips. |
ca21a146 | 417 | |
3c216190 VK |
418 | config MX3_IPU |
419 | bool "MX3x Image Processing Unit support" | |
420 | depends on ARCH_MXC | |
c2dde5f8 | 421 | select DMA_ENGINE |
3c216190 | 422 | default y |
c2dde5f8 | 423 | help |
3c216190 VK |
424 | If you plan to use the Image Processing unit in the i.MX3x, say |
425 | Y here. If unsure, select Y. | |
a074ae38 | 426 | |
3c216190 VK |
427 | config MX3_IPU_IRQS |
428 | int "Number of dynamically mapped interrupts for IPU" | |
429 | depends on MX3_IPU | |
430 | range 2 137 | |
431 | default 4 | |
432 | help | |
433 | Out of 137 interrupt sources on i.MX31 IPU only very few are used. | |
434 | To avoid bloating the irq_desc[] array we allocate a sufficient | |
435 | number of IRQ slots and map them dynamically to specific sources. | |
12458ea0 | 436 | |
3c216190 VK |
437 | config NBPFAXI_DMA |
438 | tristate "Renesas Type-AXI NBPF DMA support" | |
b3040e40 | 439 | select DMA_ENGINE |
3c216190 | 440 | depends on ARM || COMPILE_TEST |
b3040e40 | 441 | help |
3c216190 | 442 | Support for "Type-AXI" NBPF DMA IPs from Renesas |
b3040e40 | 443 | |
47e20577 MS |
444 | config OWL_DMA |
445 | tristate "Actions Semi Owl SoCs DMA support" | |
446 | depends on ARCH_ACTIONS | |
447 | select DMA_ENGINE | |
448 | select DMA_VIRTUAL_CHANNELS | |
449 | help | |
450 | Enable support for the Actions Semi Owl SoCs DMA controller. | |
451 | ||
0c42bd0e | 452 | config PCH_DMA |
ca7fe2db | 453 | tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA" |
4828b493 | 454 | depends on PCI && (X86_32 || COMPILE_TEST) |
0c42bd0e YW |
455 | select DMA_ENGINE |
456 | help | |
2cdf2455 TM |
457 | Enable support for Intel EG20T PCH DMA engine. |
458 | ||
e79e72be | 459 | This driver also can be used for LAPIS Semiconductor IOH(Input/ |
ca7fe2db TM |
460 | Output Hub), ML7213, ML7223 and ML7831. |
461 | ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is | |
462 | for MP(Media Phone) use and ML7831 IOH is for general purpose use. | |
463 | ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series. | |
464 | ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH. | |
0c42bd0e | 465 | |
3c216190 VK |
466 | config PL330_DMA |
467 | tristate "DMA API Driver for PL330" | |
1ec1e82f | 468 | select DMA_ENGINE |
3c216190 | 469 | depends on ARM_AMBA |
1ec1e82f | 470 | help |
3c216190 VK |
471 | Select if your platform has one or more PL330 DMACs. |
472 | You need to provide platform specific settings via | |
473 | platform_data for a dma-pl330 device. | |
1ec1e82f | 474 | |
3c216190 VK |
475 | config PXA_DMA |
476 | bool "PXA DMA support" | |
477 | depends on (ARCH_MMP || ARCH_PXA) | |
1f1846c6 | 478 | select DMA_ENGINE |
3c216190 | 479 | select DMA_VIRTUAL_CHANNELS |
1f1846c6 | 480 | help |
3c216190 VK |
481 | Support the DMA engine for PXA. It is also compatible with MMP PDMA |
482 | platform. The internal DMA IP of all PXA variants is supported, with | |
483 | 16 to 32 channels for peripheral to memory or memory to memory | |
484 | transfers. | |
1f1846c6 | 485 | |
3c216190 VK |
486 | config SIRF_DMA |
487 | tristate "CSR SiRFprimaII/SiRFmarco DMA support" | |
488 | depends on ARCH_SIRF | |
a580b8c5 SG |
489 | select DMA_ENGINE |
490 | help | |
3c216190 | 491 | Enable support for the CSR SiRFprimaII DMA engine. |
a580b8c5 | 492 | |
3c216190 VK |
493 | config STE_DMA40 |
494 | bool "ST-Ericsson DMA40 support" | |
495 | depends on ARCH_U8500 | |
760ee1c4 MW |
496 | select DMA_ENGINE |
497 | help | |
3c216190 | 498 | Support for ST-Ericsson DMA40 controller |
760ee1c4 | 499 | |
6b4cd727 PG |
500 | config ST_FDMA |
501 | tristate "ST FDMA dmaengine support" | |
502 | depends on ARCH_STI | |
3d6b3715 | 503 | depends on REMOTEPROC |
6b4cd727 PG |
504 | select ST_SLIM_REMOTEPROC |
505 | select DMA_ENGINE | |
506 | select DMA_VIRTUAL_CHANNELS | |
507 | help | |
508 | Enable support for ST FDMA controller. | |
509 | It supports 16 independent DMA channels, accepts up to 32 DMA requests | |
510 | ||
511 | Say Y here if you have such a chipset. | |
512 | If unsure, say N. | |
513 | ||
d8b46839 CM |
514 | config STM32_DMA |
515 | bool "STMicroelectronics STM32 DMA support" | |
4fbf3717 | 516 | depends on ARCH_STM32 || COMPILE_TEST |
d8b46839 | 517 | select DMA_ENGINE |
d8b46839 CM |
518 | select DMA_VIRTUAL_CHANNELS |
519 | help | |
520 | Enable support for the on-chip DMA controller on STMicroelectronics | |
521 | STM32 MCUs. | |
ddf9bd40 | 522 | If you have a board based on such a MCU and wish to use DMA say Y |
d8b46839 CM |
523 | here. |
524 | ||
df7e762d PYM |
525 | config STM32_DMAMUX |
526 | bool "STMicroelectronics STM32 dma multiplexer support" | |
527 | depends on STM32_DMA || COMPILE_TEST | |
528 | help | |
529 | Enable support for the on-chip DMA multiplexer on STMicroelectronics | |
530 | STM32 MCUs. | |
531 | If you have a board based on such a MCU and wish to use DMAMUX say Y | |
532 | here. | |
533 | ||
a4ffb13c PYM |
534 | config STM32_MDMA |
535 | bool "STMicroelectronics STM32 master dma support" | |
536 | depends on ARCH_STM32 || COMPILE_TEST | |
ea62e2cc | 537 | depends on OF |
a4ffb13c | 538 | select DMA_ENGINE |
a4ffb13c PYM |
539 | select DMA_VIRTUAL_CHANNELS |
540 | help | |
541 | Enable support for the on-chip MDMA controller on STMicroelectronics | |
542 | STM32 platforms. | |
543 | If you have a board based on STM32 SoC and wish to use the master DMA | |
544 | say Y here. | |
545 | ||
9b3b8171 BW |
546 | config SPRD_DMA |
547 | tristate "Spreadtrum DMA support" | |
548 | depends on ARCH_SPRD || COMPILE_TEST | |
549 | select DMA_ENGINE | |
550 | select DMA_VIRTUAL_CHANNELS | |
551 | help | |
552 | Enable support for the on-chip DMA controller on Spreadtrum platform. | |
553 | ||
3c216190 | 554 | config S3C24XX_DMAC |
9bdca822 | 555 | bool "Samsung S3C24XX DMA support" |
1609db6f | 556 | depends on ARCH_S3C24XX || COMPILE_TEST |
6365bead | 557 | select DMA_ENGINE |
50437bff | 558 | select DMA_VIRTUAL_CHANNELS |
6365bead | 559 | help |
3c216190 VK |
560 | Support for the Samsung S3C24XX DMA controller driver. The |
561 | DMA controller is having multiple DMA channels which can be | |
562 | configured for different peripherals like audio, UART, SPI. | |
563 | The DMA controller can transfer data from memory to peripheral, | |
564 | periphal to memory, periphal to periphal and memory to memory. | |
6365bead | 565 | |
3c216190 VK |
566 | config TXX9_DMAC |
567 | tristate "Toshiba TXx9 SoC DMA support" | |
568 | depends on MACH_TX49XX || MACH_TX39XX | |
c6da0ba8 ZG |
569 | select DMA_ENGINE |
570 | help | |
3c216190 VK |
571 | Support the TXx9 SoC internal DMA controller. This can be |
572 | integrated in chips such as the Toshiba TX4927/38/39. | |
c6da0ba8 | 573 | |
3c216190 VK |
574 | config TEGRA20_APB_DMA |
575 | bool "NVIDIA Tegra20 APB DMA support" | |
576 | depends on ARCH_TEGRA | |
7bedaa55 | 577 | select DMA_ENGINE |
3c216190 VK |
578 | help |
579 | Support for the NVIDIA Tegra20 APB DMA controller driver. The | |
580 | DMA controller is having multiple DMA channel which can be | |
581 | configured for different peripherals like audio, UART, SPI, | |
582 | I2C etc which is in APB bus. | |
583 | This DMA controller transfers data from memory to peripheral fifo | |
584 | or vice versa. It does not support memory to memory data transfer. | |
7bedaa55 | 585 | |
f46b1957 | 586 | config TEGRA210_ADMA |
3ed16793 | 587 | tristate "NVIDIA Tegra210 ADMA support" |
3145d73e | 588 | depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST) |
f46b1957 JH |
589 | select DMA_ENGINE |
590 | select DMA_VIRTUAL_CHANNELS | |
f46b1957 JH |
591 | help |
592 | Support for the NVIDIA Tegra210 ADMA controller driver. The | |
593 | DMA controller has multiple DMA channels and is used to service | |
594 | various audio clients in the Tegra210 audio processing engine | |
595 | (APE). This DMA controller transfers data from memory to | |
596 | peripheral and vice versa. It does not support memory to | |
597 | memory data transfer. | |
598 | ||
3c216190 VK |
599 | config TIMB_DMA |
600 | tristate "Timberdale FPGA DMA support" | |
4aa258af | 601 | depends on MFD_TIMBERDALE || COMPILE_TEST |
96286b57 | 602 | select DMA_ENGINE |
3c216190 VK |
603 | help |
604 | Enable support for the Timberdale FPGA DMA engine. | |
96286b57 | 605 | |
32e74aab MY |
606 | config UNIPHIER_MDMAC |
607 | tristate "UniPhier MIO DMAC" | |
608 | depends on ARCH_UNIPHIER || COMPILE_TEST | |
609 | depends on OF | |
610 | select DMA_ENGINE | |
611 | select DMA_VIRTUAL_CHANNELS | |
612 | help | |
613 | Enable support for the MIO DMAC (Media I/O DMA controller) on the | |
614 | UniPhier platform. This DMA controller is used as the external | |
615 | DMA engine of the SD/eMMC controllers of the LD4, Pro4, sLD8 SoCs. | |
616 | ||
3c216190 VK |
617 | config XGENE_DMA |
618 | tristate "APM X-Gene DMA support" | |
619 | depends on ARCH_XGENE || COMPILE_TEST | |
d6be34fb | 620 | select DMA_ENGINE |
3c216190 VK |
621 | select DMA_ENGINE_RAID |
622 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
d6be34fb | 623 | help |
3c216190 | 624 | Enable support for the APM X-Gene SoC DMA engine. |
5f9e685a | 625 | |
fde57a7c KA |
626 | config XILINX_DMA |
627 | tristate "Xilinx AXI DMAS Engine" | |
b72db400 | 628 | depends on (ARCH_ZYNQ || MICROBLAZE || ARM64) |
9cd4360d ST |
629 | select DMA_ENGINE |
630 | help | |
631 | Enable support for Xilinx AXI VDMA Soft IP. | |
632 | ||
fde57a7c | 633 | AXI VDMA engine provides high-bandwidth direct memory access |
9cd4360d ST |
634 | between memory and AXI4-Stream video type target |
635 | peripherals including peripherals which support AXI4- | |
636 | Stream Video Protocol. It has two stream interfaces/ | |
637 | channels, Memory Mapped to Stream (MM2S) and Stream to | |
638 | Memory Mapped (S2MM) for the data transfers. | |
fde57a7c KA |
639 | AXI CDMA engine provides high-bandwidth direct memory access |
640 | between a memory-mapped source address and a memory-mapped | |
641 | destination address. | |
642 | AXI DMA engine provides high-bandwidth one dimensional direct | |
643 | memory access between memory and AXI4-Stream target peripherals. | |
9cd4360d | 644 | |
b0cc417c KA |
645 | config XILINX_ZYNQMP_DMA |
646 | tristate "Xilinx ZynqMP DMA Engine" | |
647 | depends on (ARCH_ZYNQ || MICROBLAZE || ARM64) | |
648 | select DMA_ENGINE | |
649 | help | |
650 | Enable support for Xilinx ZynqMP DMA controller. | |
9cd4360d | 651 | |
e3fa9841 | 652 | config ZX_DMA |
253f9f44 | 653 | tristate "ZTE ZX DMA support" |
854d4bd2 | 654 | depends on ARCH_ZX || COMPILE_TEST |
5689ba7f AB |
655 | select DMA_ENGINE |
656 | select DMA_VIRTUAL_CHANNELS | |
657 | help | |
253f9f44 | 658 | Support the DMA engine for ZTE ZX family platform devices. |
5689ba7f | 659 | |
9f2fd0df | 660 | |
3c216190 VK |
661 | # driver files |
662 | source "drivers/dma/bestcomm/Kconfig" | |
c13c8260 | 663 | |
548c4597 SW |
664 | source "drivers/dma/mediatek/Kconfig" |
665 | ||
d9b31efc SK |
666 | source "drivers/dma/qcom/Kconfig" |
667 | ||
3c216190 | 668 | source "drivers/dma/dw/Kconfig" |
50437bff | 669 | |
e63d79d1 GP |
670 | source "drivers/dma/dw-edma/Kconfig" |
671 | ||
3c216190 | 672 | source "drivers/dma/hsu/Kconfig" |
1b2e98bc | 673 | |
3c216190 | 674 | source "drivers/dma/sh/Kconfig" |
5fa422c9 | 675 | |
d88b1397 PU |
676 | source "drivers/dma/ti/Kconfig" |
677 | ||
3c216190 | 678 | # clients |
db217334 | 679 | comment "DMA Clients" |
2ed6dc34 | 680 | depends on DMA_ENGINE |
db217334 | 681 | |
729b5d1b DW |
682 | config ASYNC_TX_DMA |
683 | bool "Async_tx: Offload support for the async_tx api" | |
9a8de639 | 684 | depends on DMA_ENGINE |
729b5d1b DW |
685 | help |
686 | This allows the async_tx api to take advantage of offload engines for | |
687 | memcpy, memset, xor, and raid6 p+q operations. If your platform has | |
688 | a dma engine that can perform raid operations and you have enabled | |
689 | MD_RAID456 say Y. | |
690 | ||
691 | If unsure, say N. | |
692 | ||
4a776f0a HS |
693 | config DMATEST |
694 | tristate "DMA Test client" | |
695 | depends on DMA_ENGINE | |
58532e66 | 696 | select DMA_ENGINE_RAID |
4a776f0a HS |
697 | help |
698 | Simple DMA test client. Say N unless you're debugging a | |
699 | DMA Device driver. | |
700 | ||
3cc377b9 DW |
701 | config DMA_ENGINE_RAID |
702 | bool | |
703 | ||
2ed6dc34 | 704 | endif |