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KVM: MMU: out of sync shadow core
[linux.git] / include / asm-x86 / kvm_host.h
CommitLineData
a656c8ef 1/*
043405e1
CO		 2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This header defines architecture specific interfaces, x86 version
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2. See
7 * the COPYING file in the top-level directory.
8 *
9 */
10
77ef50a5
VN		 11#ifndef ASM_X86__KVM_HOST_H
12#define ASM_X86__KVM_HOST_H
043405e1 13
34c16eec
ZX		 14#include <linux/types.h>
15#include <linux/mm.h>
e930bffe 16#include <linux/mmu_notifier.h>
34c16eec
ZX		 17
18#include <linux/kvm.h>
19#include <linux/kvm_para.h>
edf88417 20#include <linux/kvm_types.h>
34c16eec 21
50d0a0f9 22#include <asm/pvclock-abi.h>
e01a1b57
HB		 23#include <asm/desc.h>
24
69a9f69b
AK		 25#define KVM_MAX_VCPUS 16
26#define KVM_MEMORY_SLOTS 32
27/* memory slots that does not exposed to userspace */
28#define KVM_PRIVATE_MEM_SLOTS 4
29
30#define KVM_PIO_PAGE_OFFSET 1
542472b5 31#define KVM_COALESCED_MMIO_PAGE_OFFSET 2
69a9f69b 32
cd6e8f87
ZX		 33#define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
34#define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
7d76b4d3
JP		 35#define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \
36 0xFFFFFF0000000000ULL)
cd6e8f87 37
7d76b4d3 38#define KVM_GUEST_CR0_MASK \
cd6e8f87
ZX		 39 (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE \
40 | X86_CR0_NW | X86_CR0_CD)
7d76b4d3 41#define KVM_VM_CR0_ALWAYS_ON \
cd6e8f87
ZX		 42 (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE | X86_CR0_TS \
43 | X86_CR0_MP)
7d76b4d3 44#define KVM_GUEST_CR4_MASK \
cd6e8f87
ZX		 45 (X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE)
46#define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE)
47#define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE)
48
49#define INVALID_PAGE (~(hpa_t)0)
50#define UNMAPPED_GVA (~(gpa_t)0)
51
05da4558
MT		 52/* shadow tables are PAE even on non-PAE hosts */
53#define KVM_HPAGE_SHIFT 21
54#define KVM_HPAGE_SIZE (1UL << KVM_HPAGE_SHIFT)
55#define KVM_HPAGE_MASK (~(KVM_HPAGE_SIZE - 1))
56
57#define KVM_PAGES_PER_HPAGE (KVM_HPAGE_SIZE / PAGE_SIZE)
58
cd6e8f87 59#define DE_VECTOR 0
19bd8afd 60#define DB_VECTOR 1
77ab6db0
JK		 61#define BP_VECTOR 3
62#define OF_VECTOR 4
63#define BR_VECTOR 5
cd6e8f87
ZX		 64#define UD_VECTOR 6
65#define NM_VECTOR 7
66#define DF_VECTOR 8
67#define TS_VECTOR 10
68#define NP_VECTOR 11
69#define SS_VECTOR 12
70#define GP_VECTOR 13
71#define PF_VECTOR 14
77ab6db0 72#define MF_VECTOR 16
53371b50 73#define MC_VECTOR 18
cd6e8f87
ZX		 74
75#define SELECTOR_TI_MASK (1 << 2)
76#define SELECTOR_RPL_MASK 0x03
77
78#define IOPL_SHIFT 12
79
d69fb81f
ZX		 80#define KVM_ALIAS_SLOTS 4
81
d657a98e
ZX		 82#define KVM_PERMILLE_MMU_PAGES 20
83#define KVM_MIN_ALLOC_MMU_PAGES 64
1ae0a13d
DE		 84#define KVM_MMU_HASH_SHIFT 10
85#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
d657a98e
ZX		 86#define KVM_MIN_FREE_MMU_PAGES 5
87#define KVM_REFILL_PAGES 25
88#define KVM_MAX_CPUID_ENTRIES 40
9ba075a6 89#define KVM_NR_VAR_MTRR 8
d657a98e 90
e9b11c17
ZX		 91extern spinlock_t kvm_lock;
92extern struct list_head vm_list;
93
d657a98e
ZX		 94struct kvm_vcpu;
95struct kvm;
96
5fdbf976 97enum kvm_reg {
2b3ccfa0
ZX		 98 VCPU_REGS_RAX = 0,
99 VCPU_REGS_RCX = 1,
100 VCPU_REGS_RDX = 2,
101 VCPU_REGS_RBX = 3,
102 VCPU_REGS_RSP = 4,
103 VCPU_REGS_RBP = 5,
104 VCPU_REGS_RSI = 6,
105 VCPU_REGS_RDI = 7,
106#ifdef CONFIG_X86_64
107 VCPU_REGS_R8 = 8,
108 VCPU_REGS_R9 = 9,
109 VCPU_REGS_R10 = 10,
110 VCPU_REGS_R11 = 11,
111 VCPU_REGS_R12 = 12,
112 VCPU_REGS_R13 = 13,
113 VCPU_REGS_R14 = 14,
114 VCPU_REGS_R15 = 15,
115#endif
5fdbf976 116 VCPU_REGS_RIP,
2b3ccfa0
ZX		 117 NR_VCPU_REGS
118};
119
120enum {
81609e3e 121 VCPU_SREG_ES,
2b3ccfa0 122 VCPU_SREG_CS,
81609e3e 123 VCPU_SREG_SS,
2b3ccfa0 124 VCPU_SREG_DS,
2b3ccfa0
ZX		 125 VCPU_SREG_FS,
126 VCPU_SREG_GS,
2b3ccfa0
ZX		 127 VCPU_SREG_TR,
128 VCPU_SREG_LDTR,
129};
130
edf88417 131#include <asm/kvm_x86_emulate.h>
2b3ccfa0 132
d657a98e
ZX		 133#define KVM_NR_MEM_OBJS 40
134
69a9f69b
AK		 135struct kvm_guest_debug {
136 int enabled;
137 unsigned long bp[4];
138 int singlestep;
139};
140
d657a98e
ZX		 141/*
142 * We don't want allocation failures within the mmu code, so we preallocate
143 * enough memory for a single page fault in a cache.
144 */
145struct kvm_mmu_memory_cache {
146 int nobjs;
147 void *objects[KVM_NR_MEM_OBJS];
148};
149
150#define NR_PTE_CHAIN_ENTRIES 5
151
152struct kvm_pte_chain {
153 u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
154 struct hlist_node link;
155};
156
157/*
158 * kvm_mmu_page_role, below, is defined as:
159 *
160 * bits 0:3 - total guest paging levels (2-4, or zero for real mode)
161 * bits 4:7 - page table level for this shadow (1-4)
162 * bits 8:9 - page table quadrant for 2-level guests
163 * bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode)
164 * bits 17:19 - common access permissions for all ptes in this shadow page
165 */
166union kvm_mmu_page_role {
167 unsigned word;
168 struct {
7d76b4d3
JP		 169 unsigned glevels:4;
170 unsigned level:4;
171 unsigned quadrant:2;
172 unsigned pad_for_nice_hex_output:6;
173 unsigned metaphysical:1;
174 unsigned access:3;
2e53d63a 175 unsigned invalid:1;
d657a98e
ZX		 176 };
177};
178
179struct kvm_mmu_page {
180 struct list_head link;
181 struct hlist_node hash_link;
182
183 /*
184 * The following two entries are used to key the shadow page in the
185 * hash table.
186 */
187 gfn_t gfn;
188 union kvm_mmu_page_role role;
189
190 u64 *spt;
191 /* hold the gfn of each spte inside spt */
192 gfn_t *gfns;
193 unsigned long slot_bitmap; /* One bit set per slot which has memory
194 * in this shadow page.
195 */
196 int multimapped; /* More than one parent_pte? */
197 int root_count; /* Currently serving as active root */
4731d4c7
MT		 198 bool unsync;
199 bool unsync_children;
d657a98e
ZX		 200 union {
201 u64 *parent_pte; /* !multimapped */
202 struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
203 };
204};
205
6ad18fba
DH		 206struct kvm_pv_mmu_op_buffer {
207 void *ptr;
208 unsigned len;
209 unsigned processed;
210 char buf[512] __aligned(sizeof(long));
211};
212
d657a98e
ZX		 213/*
214 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
215 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
216 * mode.
217 */
218struct kvm_mmu {
219 void (*new_cr3)(struct kvm_vcpu *vcpu);
220 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
221 void (*free)(struct kvm_vcpu *vcpu);
222 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
223 void (*prefetch_page)(struct kvm_vcpu *vcpu,
224 struct kvm_mmu_page *page);
e8bc217a
MT		 225 int (*sync_page)(struct kvm_vcpu *vcpu,
226 struct kvm_mmu_page *sp);
a7052897 227 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
d657a98e
ZX		 228 hpa_t root_hpa;
229 int root_level;
230 int shadow_root_level;
231
232 u64 *pae_root;
233};
234
ad312c7c 235struct kvm_vcpu_arch {
34c16eec
ZX		 236 u64 host_tsc;
237 int interrupt_window_open;
238 unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
239 DECLARE_BITMAP(irq_pending, KVM_NR_INTERRUPTS);
5fdbf976
MT		 240 /*
241 * rip and regs accesses must go through
242 * kvm_{register,rip}_{read,write} functions.
243 */
244 unsigned long regs[NR_VCPU_REGS];
245 u32 regs_avail;
246 u32 regs_dirty;
34c16eec
ZX		 247
248 unsigned long cr0;
249 unsigned long cr2;
250 unsigned long cr3;
251 unsigned long cr4;
252 unsigned long cr8;
253 u64 pdptrs[4]; /* pae */
254 u64 shadow_efer;
255 u64 apic_base;
256 struct kvm_lapic *apic; /* kernel irqchip context */
34c16eec
ZX		 257 int mp_state;
258 int sipi_vector;
259 u64 ia32_misc_enable_msr;
b209749f 260 bool tpr_access_reporting;
34c16eec
ZX		 261
262 struct kvm_mmu mmu;
6ad18fba
DH		 263 /* only needed in kvm_pv_mmu_op() path, but it's hot so
264 * put it here to avoid allocation */
265 struct kvm_pv_mmu_op_buffer mmu_op_buffer;
34c16eec
ZX		 266
267 struct kvm_mmu_memory_cache mmu_pte_chain_cache;
268 struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
269 struct kvm_mmu_memory_cache mmu_page_cache;
270 struct kvm_mmu_memory_cache mmu_page_header_cache;
271
272 gfn_t last_pt_write_gfn;
273 int last_pt_write_count;
274 u64 *last_pte_updated;
1b7fcd32 275 gfn_t last_pte_gfn;
34c16eec 276
d7824fff 277 struct {
35149e21
AL		 278 gfn_t gfn; /* presumed gfn during guest pte update */
279 pfn_t pfn; /* pfn corresponding to that gfn */
05da4558 280 int largepage;
e930bffe 281 unsigned long mmu_seq;
d7824fff
AK		 282 } update_pte;
283
34c16eec
ZX		 284 struct i387_fxsave_struct host_fx_image;
285 struct i387_fxsave_struct guest_fx_image;
286
287 gva_t mmio_fault_cr2;
288 struct kvm_pio_request pio;
289 void *pio_data;
290
298101da
AK		 291 struct kvm_queued_exception {
292 bool pending;
293 bool has_error_code;
294 u8 nr;
295 u32 error_code;
296 } exception;
297
937a7eae
AK		 298 struct kvm_queued_interrupt {
299 bool pending;
300 u8 nr;
301 } interrupt;
302
34c16eec
ZX		 303 struct {
304 int active;
305 u8 save_iopl;
306 struct kvm_save_segment {
307 u16 selector;
308 unsigned long base;
309 u32 limit;
310 u32 ar;
311 } tr, es, ds, fs, gs;
312 } rmode;
313 int halt_request; /* real mode on Intel only */
314
315 int cpuid_nent;
07716717 316 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
34c16eec
ZX		 317 /* emulate context */
318
319 struct x86_emulate_ctxt emulate_ctxt;
18068523
GOC		 320
321 gpa_t time;
50d0a0f9
GH		 322 struct pvclock_vcpu_time_info hv_clock;
323 unsigned int hv_clock_tsc_khz;
18068523
GOC		 324 unsigned int time_offset;
325 struct page *time_page;
3419ffc8
SY		 326
327 bool nmi_pending;
668f612f 328 bool nmi_injected;
9ba075a6
AK		 329
330 u64 mtrr[0x100];
34c16eec
ZX		 331};
332
d69fb81f
ZX		 333struct kvm_mem_alias {
334 gfn_t base_gfn;
335 unsigned long npages;
336 gfn_t target_gfn;
337};
338
339struct kvm_arch{
340 int naliases;
341 struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS];
f05e70ac
ZX		 342
343 unsigned int n_free_mmu_pages;
344 unsigned int n_requested_mmu_pages;
345 unsigned int n_alloc_mmu_pages;
346 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
347 /*
348 * Hash table of struct kvm_mmu_page.
349 */
350 struct list_head active_mmu_pages;
4d5c5d0f 351 struct list_head assigned_dev_head;
62c476c7 352 struct dmar_domain *intel_iommu_domain;
d7deeeb0
ZX		 353 struct kvm_pic *vpic;
354 struct kvm_ioapic *vioapic;
7837699f 355 struct kvm_pit *vpit;
564f1537 356 struct hlist_head irq_ack_notifier_list;
bfc6d222
ZX		 357
358 int round_robin_prev_vcpu;
359 unsigned int tss_addr;
360 struct page *apic_access_page;
18068523
GOC		 361
362 gpa_t wall_clock;
b7ebfb05
SY		 363
364 struct page *ept_identity_pagetable;
365 bool ept_identity_pagetable_done;
d69fb81f
ZX		 366};
367
0711456c
ZX		 368struct kvm_vm_stat {
369 u32 mmu_shadow_zapped;
370 u32 mmu_pte_write;
371 u32 mmu_pte_updated;
372 u32 mmu_pde_zapped;
373 u32 mmu_flooded;
374 u32 mmu_recycled;
dfc5aa00 375 u32 mmu_cache_miss;
4731d4c7 376 u32 mmu_unsync;
0711456c 377 u32 remote_tlb_flush;
05da4558 378 u32 lpages;
0711456c
ZX		 379};
380
77b4c255
ZX		 381struct kvm_vcpu_stat {
382 u32 pf_fixed;
383 u32 pf_guest;
384 u32 tlb_flush;
385 u32 invlpg;
386
387 u32 exits;
388 u32 io_exits;
389 u32 mmio_exits;
390 u32 signal_exits;
391 u32 irq_window_exits;
f08864b4 392 u32 nmi_window_exits;
77b4c255
ZX		 393 u32 halt_exits;
394 u32 halt_wakeup;
395 u32 request_irq_exits;
396 u32 irq_exits;
397 u32 host_state_reload;
398 u32 efer_reload;
399 u32 fpu_reload;
400 u32 insn_emulation;
401 u32 insn_emulation_fail;
f11c3a8d 402 u32 hypercalls;
fa89a817 403 u32 irq_injections;
77b4c255 404};
ad312c7c 405
e01a1b57
HB		 406struct descriptor_table {
407 u16 limit;
408 unsigned long base;
409} __attribute__((packed));
410
ea4a5ff8
ZX		 411struct kvm_x86_ops {
412 int (*cpu_has_kvm_support)(void); /* __init */
413 int (*disabled_by_bios)(void); /* __init */
414 void (*hardware_enable)(void *dummy); /* __init */
415 void (*hardware_disable)(void *dummy);
416 void (*check_processor_compatibility)(void *rtn);
417 int (*hardware_setup)(void); /* __init */
418 void (*hardware_unsetup)(void); /* __exit */
774ead3a 419 bool (*cpu_has_accelerated_tpr)(void);
ea4a5ff8
ZX		 420
421 /* Create, but do not attach this VCPU */
422 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
423 void (*vcpu_free)(struct kvm_vcpu *vcpu);
424 int (*vcpu_reset)(struct kvm_vcpu *vcpu);
425
426 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
427 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
428 void (*vcpu_put)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX		 429
430 int (*set_guest_debug)(struct kvm_vcpu *vcpu,
431 struct kvm_debug_guest *dbg);
432 void (*guest_debug_pre)(struct kvm_vcpu *vcpu);
433 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
434 int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
435 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
436 void (*get_segment)(struct kvm_vcpu *vcpu,
437 struct kvm_segment *var, int seg);
2e4d2653 438 int (*get_cpl)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX		 439 void (*set_segment)(struct kvm_vcpu *vcpu,
440 struct kvm_segment *var, int seg);
441 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
442 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
443 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
444 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
445 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
446 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
447 void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
448 void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
449 void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
450 void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
451 unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
452 void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
453 int *exception);
5fdbf976 454 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
ea4a5ff8
ZX		 455 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
456 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
457
458 void (*tlb_flush)(struct kvm_vcpu *vcpu);
ea4a5ff8 459
ea4a5ff8
ZX		 460 void (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run);
461 int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu);
462 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
463 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
464 unsigned char *hypercall_addr);
465 int (*get_irq)(struct kvm_vcpu *vcpu);
466 void (*set_irq)(struct kvm_vcpu *vcpu, int vec);
298101da
AK		 467 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
468 bool has_error_code, u32 error_code);
469 bool (*exception_injected)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX		 470 void (*inject_pending_irq)(struct kvm_vcpu *vcpu);
471 void (*inject_pending_vectors)(struct kvm_vcpu *vcpu,
472 struct kvm_run *run);
473
474 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
67253af5 475 int (*get_tdp_level)(void);
ea4a5ff8
ZX		 476};
477
97896d04
ZX		 478extern struct kvm_x86_ops *kvm_x86_ops;
479
54f1585a
ZX		 480int kvm_mmu_module_init(void);
481void kvm_mmu_module_exit(void);
482
483void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
484int kvm_mmu_create(struct kvm_vcpu *vcpu);
485int kvm_mmu_setup(struct kvm_vcpu *vcpu);
486void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte);
7b52345e
SY		 487void kvm_mmu_set_base_ptes(u64 base_pte);
488void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
489 u64 dirty_mask, u64 nx_mask, u64 x_mask);
54f1585a
ZX		 490
491int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
492void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
493void kvm_mmu_zap_all(struct kvm *kvm);
3ad82a7e 494unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
54f1585a
ZX		 495void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
496
cc4b6871
JR		 497int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
498
3200f405 499int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
9f811285 500 const void *val, int bytes);
2f333bcb
MT		 501int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
502 gpa_t addr, unsigned long *ret);
503
62c476c7
BAY		 504int is_mmio_pfn(pfn_t pfn);
505
2f333bcb 506extern bool tdp_enabled;
9f811285 507
54f1585a
ZX		 508enum emulation_result {
509 EMULATE_DONE, /* no further processing */
510 EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
511 EMULATE_FAIL, /* can't emulate this instruction */
512};
513
571008da
SY		 514#define EMULTYPE_NO_DECODE (1 << 0)
515#define EMULTYPE_TRAP_UD (1 << 1)
54f1585a 516int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run,
571008da 517 unsigned long cr2, u16 error_code, int emulation_type);
54f1585a
ZX		 518void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context);
519void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
520void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
521void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
522 unsigned long *rflags);
523
524unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
525void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
526 unsigned long *rflags);
f2b4b7dd 527void kvm_enable_efer_bits(u64);
54f1585a
ZX		 528int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
529int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
530
531struct x86_emulate_ctxt;
532
533int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
534 int size, unsigned port);
535int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
536 int size, unsigned long count, int down,
537 gva_t address, int rep, unsigned port);
538void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
539int kvm_emulate_halt(struct kvm_vcpu *vcpu);
540int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
541int emulate_clts(struct kvm_vcpu *vcpu);
542int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
543 unsigned long *dest);
544int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
545 unsigned long value);
546
3e6e0aab
GT		 547void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
548int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
549 int type_bits, int seg);
550
37817f29
IE		 551int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason);
552
2d3ad1f4 553void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
9c20456a
JR		 554void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
555void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
556void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
2d3ad1f4
AK		 557unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
558void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
54f1585a
ZX		 559void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
560
561int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
562int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
563
298101da
AK		 564void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
565void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
c3c91fee
AK		 566void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2,
567 u32 error_code);
298101da 568
3419ffc8
SY		 569void kvm_inject_nmi(struct kvm_vcpu *vcpu);
570
54f1585a
ZX		 571void fx_init(struct kvm_vcpu *vcpu);
572
573int emulator_read_std(unsigned long addr,
574 void *val,
575 unsigned int bytes,
576 struct kvm_vcpu *vcpu);
577int emulator_write_emulated(unsigned long addr,
578 const void *val,
579 unsigned int bytes,
580 struct kvm_vcpu *vcpu);
581
582unsigned long segment_base(u16 selector);
583
d835dfec 584void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
54f1585a
ZX		 585void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
586 const u8 *new, int bytes);
587int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
588void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
589int kvm_mmu_load(struct kvm_vcpu *vcpu);
590void kvm_mmu_unload(struct kvm_vcpu *vcpu);
0ba73cda 591void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
54f1585a
ZX		 592
593int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
594
595int kvm_fix_hypercall(struct kvm_vcpu *vcpu);
596
3067714c 597int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code);
a7052897 598void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
34c16eec 599
18552672 600void kvm_enable_tdp(void);
5f4cb662 601void kvm_disable_tdp(void);
18552672 602
a03490ed 603int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
de7d789a 604int complete_pio(struct kvm_vcpu *vcpu);
ec6d273d
ZX		 605
606static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
607{
608 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
609
610 return (struct kvm_mmu_page *)page_private(page);
611}
612
d6e88aec 613static inline u16 kvm_read_fs(void)
ec6d273d
ZX		 614{
615 u16 seg;
616 asm("mov %%fs, %0" : "=g"(seg));
617 return seg;
618}
619
d6e88aec 620static inline u16 kvm_read_gs(void)
ec6d273d
ZX		 621{
622 u16 seg;
623 asm("mov %%gs, %0" : "=g"(seg));
624 return seg;
625}
626
d6e88aec 627static inline u16 kvm_read_ldt(void)
ec6d273d
ZX		 628{
629 u16 ldt;
630 asm("sldt %0" : "=g"(ldt));
631 return ldt;
632}
633
d6e88aec 634static inline void kvm_load_fs(u16 sel)
ec6d273d
ZX		 635{
636 asm("mov %0, %%fs" : : "rm"(sel));
637}
638
d6e88aec 639static inline void kvm_load_gs(u16 sel)
ec6d273d
ZX		 640{
641 asm("mov %0, %%gs" : : "rm"(sel));
642}
643
d6e88aec 644static inline void kvm_load_ldt(u16 sel)
ec6d273d
ZX		 645{
646 asm("lldt %0" : : "rm"(sel));
647}
ec6d273d 648
d6e88aec 649static inline void kvm_get_idt(struct descriptor_table *table)
ec6d273d
ZX		 650{
651 asm("sidt %0" : "=m"(*table));
652}
653
d6e88aec 654static inline void kvm_get_gdt(struct descriptor_table *table)
ec6d273d
ZX		 655{
656 asm("sgdt %0" : "=m"(*table));
657}
658
d6e88aec 659static inline unsigned long kvm_read_tr_base(void)
ec6d273d
ZX		 660{
661 u16 tr;
662 asm("str %0" : "=g"(tr));
663 return segment_base(tr);
664}
665
666#ifdef CONFIG_X86_64
667static inline unsigned long read_msr(unsigned long msr)
668{
669 u64 value;
670
671 rdmsrl(msr, value);
672 return value;
673}
674#endif
675
d6e88aec 676static inline void kvm_fx_save(struct i387_fxsave_struct *image)
ec6d273d
ZX		 677{
678 asm("fxsave (%0)":: "r" (image));
679}
680
d6e88aec 681static inline void kvm_fx_restore(struct i387_fxsave_struct *image)
ec6d273d
ZX		 682{
683 asm("fxrstor (%0)":: "r" (image));
684}
685
d6e88aec 686static inline void kvm_fx_finit(void)
ec6d273d
ZX		 687{
688 asm("finit");
689}
690
691static inline u32 get_rdx_init_val(void)
692{
693 return 0x600; /* P6 family */
694}
695
c1a5d4f9
AK		 696static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
697{
698 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
699}
700
ec6d273d
ZX		 701#define ASM_VMX_VMCLEAR_RAX ".byte 0x66, 0x0f, 0xc7, 0x30"
702#define ASM_VMX_VMLAUNCH ".byte 0x0f, 0x01, 0xc2"
703#define ASM_VMX_VMRESUME ".byte 0x0f, 0x01, 0xc3"
704#define ASM_VMX_VMPTRLD_RAX ".byte 0x0f, 0xc7, 0x30"
705#define ASM_VMX_VMREAD_RDX_RAX ".byte 0x0f, 0x78, 0xd0"
706#define ASM_VMX_VMWRITE_RAX_RDX ".byte 0x0f, 0x79, 0xd0"
707#define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4"
708#define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4"
709#define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30"
1439442c 710#define ASM_VMX_INVEPT ".byte 0x66, 0x0f, 0x38, 0x80, 0x08"
2384d2b3 711#define ASM_VMX_INVVPID ".byte 0x66, 0x0f, 0x38, 0x81, 0x08"
ec6d273d
ZX		 712
713#define MSR_IA32_TIME_STAMP_COUNTER 0x010
714
715#define TSS_IOPB_BASE_OFFSET 0x66
716#define TSS_BASE_SIZE 0x68
717#define TSS_IOPB_SIZE (65536 / 8)
718#define TSS_REDIRECTION_SIZE (256 / 8)
7d76b4d3
JP		 719#define RMODE_TSS_SIZE \
720 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
53e0aa7b 721
37817f29
IE		 722enum {
723 TASK_SWITCH_CALL = 0,
724 TASK_SWITCH_IRET = 1,
725 TASK_SWITCH_JMP = 2,
726 TASK_SWITCH_GATE = 3,
727};
728
4ecac3fd
AK		 729/*
730 * Hardware virtualization extension instructions may fault if a
731 * reboot turns off virtualization while processes are running.
732 * Trap the fault and ignore the instruction if that happens.
733 */
734asmlinkage void kvm_handle_fault_on_reboot(void);
735
736#define __kvm_handle_fault_on_reboot(insn) \
737 "666: " insn "\n\t" \
18b13e54 738 ".pushsection .fixup, \"ax\" \n" \
4ecac3fd 739 "667: \n\t" \
8ceed347 740 __ASM_SIZE(push) " $666b \n\t" \
4ecac3fd
AK		 741 "jmp kvm_handle_fault_on_reboot \n\t" \
742 ".popsection \n\t" \
743 ".pushsection __ex_table, \"a\" \n\t" \
8ceed347 744 _ASM_PTR " 666b, 667b \n\t" \
4ecac3fd
AK		 745 ".popsection"
746
e930bffe
AA		 747#define KVM_ARCH_WANT_MMU_NOTIFIER
748int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
749int kvm_age_hva(struct kvm *kvm, unsigned long hva);
750
77ef50a5 751#endif /* ASM_X86__KVM_HOST_H */
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