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Commit | Line | Data |
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043405e1 CO |
1 | #/* |
2 | * Kernel-based Virtual Machine driver for Linux | |
3 | * | |
4 | * This header defines architecture specific interfaces, x86 version | |
5 | * | |
6 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
7 | * the COPYING file in the top-level directory. | |
8 | * | |
9 | */ | |
10 | ||
edf88417 AK |
11 | #ifndef ASM_KVM_HOST_H |
12 | #define ASM_KVM_HOST_H | |
043405e1 | 13 | |
34c16eec ZX |
14 | #include <linux/types.h> |
15 | #include <linux/mm.h> | |
16 | ||
17 | #include <linux/kvm.h> | |
18 | #include <linux/kvm_para.h> | |
edf88417 | 19 | #include <linux/kvm_types.h> |
34c16eec | 20 | |
50d0a0f9 | 21 | #include <asm/pvclock-abi.h> |
e01a1b57 HB |
22 | #include <asm/desc.h> |
23 | ||
69a9f69b AK |
24 | #define KVM_MAX_VCPUS 16 |
25 | #define KVM_MEMORY_SLOTS 32 | |
26 | /* memory slots that does not exposed to userspace */ | |
27 | #define KVM_PRIVATE_MEM_SLOTS 4 | |
28 | ||
29 | #define KVM_PIO_PAGE_OFFSET 1 | |
30 | ||
cd6e8f87 ZX |
31 | #define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1) |
32 | #define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD)) | |
7d76b4d3 JP |
33 | #define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \ |
34 | 0xFFFFFF0000000000ULL) | |
cd6e8f87 | 35 | |
7d76b4d3 | 36 | #define KVM_GUEST_CR0_MASK \ |
cd6e8f87 ZX |
37 | (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE \ |
38 | | X86_CR0_NW | X86_CR0_CD) | |
7d76b4d3 | 39 | #define KVM_VM_CR0_ALWAYS_ON \ |
cd6e8f87 ZX |
40 | (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE | X86_CR0_TS \ |
41 | | X86_CR0_MP) | |
7d76b4d3 | 42 | #define KVM_GUEST_CR4_MASK \ |
cd6e8f87 ZX |
43 | (X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE) |
44 | #define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE) | |
45 | #define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE) | |
46 | ||
47 | #define INVALID_PAGE (~(hpa_t)0) | |
48 | #define UNMAPPED_GVA (~(gpa_t)0) | |
49 | ||
05da4558 MT |
50 | /* shadow tables are PAE even on non-PAE hosts */ |
51 | #define KVM_HPAGE_SHIFT 21 | |
52 | #define KVM_HPAGE_SIZE (1UL << KVM_HPAGE_SHIFT) | |
53 | #define KVM_HPAGE_MASK (~(KVM_HPAGE_SIZE - 1)) | |
54 | ||
55 | #define KVM_PAGES_PER_HPAGE (KVM_HPAGE_SIZE / PAGE_SIZE) | |
56 | ||
cd6e8f87 ZX |
57 | #define DE_VECTOR 0 |
58 | #define UD_VECTOR 6 | |
59 | #define NM_VECTOR 7 | |
60 | #define DF_VECTOR 8 | |
61 | #define TS_VECTOR 10 | |
62 | #define NP_VECTOR 11 | |
63 | #define SS_VECTOR 12 | |
64 | #define GP_VECTOR 13 | |
65 | #define PF_VECTOR 14 | |
53371b50 | 66 | #define MC_VECTOR 18 |
cd6e8f87 ZX |
67 | |
68 | #define SELECTOR_TI_MASK (1 << 2) | |
69 | #define SELECTOR_RPL_MASK 0x03 | |
70 | ||
71 | #define IOPL_SHIFT 12 | |
72 | ||
d69fb81f ZX |
73 | #define KVM_ALIAS_SLOTS 4 |
74 | ||
d657a98e ZX |
75 | #define KVM_PERMILLE_MMU_PAGES 20 |
76 | #define KVM_MIN_ALLOC_MMU_PAGES 64 | |
1ae0a13d DE |
77 | #define KVM_MMU_HASH_SHIFT 10 |
78 | #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) | |
d657a98e ZX |
79 | #define KVM_MIN_FREE_MMU_PAGES 5 |
80 | #define KVM_REFILL_PAGES 25 | |
81 | #define KVM_MAX_CPUID_ENTRIES 40 | |
9ba075a6 | 82 | #define KVM_NR_VAR_MTRR 8 |
d657a98e | 83 | |
e9b11c17 ZX |
84 | extern spinlock_t kvm_lock; |
85 | extern struct list_head vm_list; | |
86 | ||
d657a98e ZX |
87 | struct kvm_vcpu; |
88 | struct kvm; | |
89 | ||
2b3ccfa0 ZX |
90 | enum { |
91 | VCPU_REGS_RAX = 0, | |
92 | VCPU_REGS_RCX = 1, | |
93 | VCPU_REGS_RDX = 2, | |
94 | VCPU_REGS_RBX = 3, | |
95 | VCPU_REGS_RSP = 4, | |
96 | VCPU_REGS_RBP = 5, | |
97 | VCPU_REGS_RSI = 6, | |
98 | VCPU_REGS_RDI = 7, | |
99 | #ifdef CONFIG_X86_64 | |
100 | VCPU_REGS_R8 = 8, | |
101 | VCPU_REGS_R9 = 9, | |
102 | VCPU_REGS_R10 = 10, | |
103 | VCPU_REGS_R11 = 11, | |
104 | VCPU_REGS_R12 = 12, | |
105 | VCPU_REGS_R13 = 13, | |
106 | VCPU_REGS_R14 = 14, | |
107 | VCPU_REGS_R15 = 15, | |
108 | #endif | |
109 | NR_VCPU_REGS | |
110 | }; | |
111 | ||
112 | enum { | |
81609e3e | 113 | VCPU_SREG_ES, |
2b3ccfa0 | 114 | VCPU_SREG_CS, |
81609e3e | 115 | VCPU_SREG_SS, |
2b3ccfa0 | 116 | VCPU_SREG_DS, |
2b3ccfa0 ZX |
117 | VCPU_SREG_FS, |
118 | VCPU_SREG_GS, | |
2b3ccfa0 ZX |
119 | VCPU_SREG_TR, |
120 | VCPU_SREG_LDTR, | |
121 | }; | |
122 | ||
edf88417 | 123 | #include <asm/kvm_x86_emulate.h> |
2b3ccfa0 | 124 | |
d657a98e ZX |
125 | #define KVM_NR_MEM_OBJS 40 |
126 | ||
69a9f69b AK |
127 | struct kvm_guest_debug { |
128 | int enabled; | |
129 | unsigned long bp[4]; | |
130 | int singlestep; | |
131 | }; | |
132 | ||
d657a98e ZX |
133 | /* |
134 | * We don't want allocation failures within the mmu code, so we preallocate | |
135 | * enough memory for a single page fault in a cache. | |
136 | */ | |
137 | struct kvm_mmu_memory_cache { | |
138 | int nobjs; | |
139 | void *objects[KVM_NR_MEM_OBJS]; | |
140 | }; | |
141 | ||
142 | #define NR_PTE_CHAIN_ENTRIES 5 | |
143 | ||
144 | struct kvm_pte_chain { | |
145 | u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES]; | |
146 | struct hlist_node link; | |
147 | }; | |
148 | ||
149 | /* | |
150 | * kvm_mmu_page_role, below, is defined as: | |
151 | * | |
152 | * bits 0:3 - total guest paging levels (2-4, or zero for real mode) | |
153 | * bits 4:7 - page table level for this shadow (1-4) | |
154 | * bits 8:9 - page table quadrant for 2-level guests | |
155 | * bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode) | |
156 | * bits 17:19 - common access permissions for all ptes in this shadow page | |
157 | */ | |
158 | union kvm_mmu_page_role { | |
159 | unsigned word; | |
160 | struct { | |
7d76b4d3 JP |
161 | unsigned glevels:4; |
162 | unsigned level:4; | |
163 | unsigned quadrant:2; | |
164 | unsigned pad_for_nice_hex_output:6; | |
165 | unsigned metaphysical:1; | |
166 | unsigned access:3; | |
2e53d63a | 167 | unsigned invalid:1; |
d657a98e ZX |
168 | }; |
169 | }; | |
170 | ||
171 | struct kvm_mmu_page { | |
172 | struct list_head link; | |
173 | struct hlist_node hash_link; | |
174 | ||
175 | /* | |
176 | * The following two entries are used to key the shadow page in the | |
177 | * hash table. | |
178 | */ | |
179 | gfn_t gfn; | |
180 | union kvm_mmu_page_role role; | |
181 | ||
182 | u64 *spt; | |
183 | /* hold the gfn of each spte inside spt */ | |
184 | gfn_t *gfns; | |
185 | unsigned long slot_bitmap; /* One bit set per slot which has memory | |
186 | * in this shadow page. | |
187 | */ | |
188 | int multimapped; /* More than one parent_pte? */ | |
189 | int root_count; /* Currently serving as active root */ | |
190 | union { | |
191 | u64 *parent_pte; /* !multimapped */ | |
192 | struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */ | |
193 | }; | |
194 | }; | |
195 | ||
196 | /* | |
197 | * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level | |
198 | * 32-bit). The kvm_mmu structure abstracts the details of the current mmu | |
199 | * mode. | |
200 | */ | |
201 | struct kvm_mmu { | |
202 | void (*new_cr3)(struct kvm_vcpu *vcpu); | |
203 | int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err); | |
204 | void (*free)(struct kvm_vcpu *vcpu); | |
205 | gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva); | |
206 | void (*prefetch_page)(struct kvm_vcpu *vcpu, | |
207 | struct kvm_mmu_page *page); | |
208 | hpa_t root_hpa; | |
209 | int root_level; | |
210 | int shadow_root_level; | |
211 | ||
212 | u64 *pae_root; | |
213 | }; | |
214 | ||
ad312c7c | 215 | struct kvm_vcpu_arch { |
34c16eec ZX |
216 | u64 host_tsc; |
217 | int interrupt_window_open; | |
218 | unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */ | |
219 | DECLARE_BITMAP(irq_pending, KVM_NR_INTERRUPTS); | |
220 | unsigned long regs[NR_VCPU_REGS]; /* for rsp: vcpu_load_rsp_rip() */ | |
221 | unsigned long rip; /* needs vcpu_load_rsp_rip() */ | |
222 | ||
223 | unsigned long cr0; | |
224 | unsigned long cr2; | |
225 | unsigned long cr3; | |
226 | unsigned long cr4; | |
227 | unsigned long cr8; | |
228 | u64 pdptrs[4]; /* pae */ | |
229 | u64 shadow_efer; | |
230 | u64 apic_base; | |
231 | struct kvm_lapic *apic; /* kernel irqchip context */ | |
34c16eec ZX |
232 | int mp_state; |
233 | int sipi_vector; | |
234 | u64 ia32_misc_enable_msr; | |
b209749f | 235 | bool tpr_access_reporting; |
34c16eec ZX |
236 | |
237 | struct kvm_mmu mmu; | |
238 | ||
239 | struct kvm_mmu_memory_cache mmu_pte_chain_cache; | |
240 | struct kvm_mmu_memory_cache mmu_rmap_desc_cache; | |
241 | struct kvm_mmu_memory_cache mmu_page_cache; | |
242 | struct kvm_mmu_memory_cache mmu_page_header_cache; | |
243 | ||
244 | gfn_t last_pt_write_gfn; | |
245 | int last_pt_write_count; | |
246 | u64 *last_pte_updated; | |
1b7fcd32 | 247 | gfn_t last_pte_gfn; |
34c16eec | 248 | |
d7824fff | 249 | struct { |
35149e21 AL |
250 | gfn_t gfn; /* presumed gfn during guest pte update */ |
251 | pfn_t pfn; /* pfn corresponding to that gfn */ | |
05da4558 | 252 | int largepage; |
d7824fff AK |
253 | } update_pte; |
254 | ||
34c16eec ZX |
255 | struct i387_fxsave_struct host_fx_image; |
256 | struct i387_fxsave_struct guest_fx_image; | |
257 | ||
258 | gva_t mmio_fault_cr2; | |
259 | struct kvm_pio_request pio; | |
260 | void *pio_data; | |
261 | ||
298101da AK |
262 | struct kvm_queued_exception { |
263 | bool pending; | |
264 | bool has_error_code; | |
265 | u8 nr; | |
266 | u32 error_code; | |
267 | } exception; | |
268 | ||
34c16eec ZX |
269 | struct { |
270 | int active; | |
271 | u8 save_iopl; | |
272 | struct kvm_save_segment { | |
273 | u16 selector; | |
274 | unsigned long base; | |
275 | u32 limit; | |
276 | u32 ar; | |
277 | } tr, es, ds, fs, gs; | |
278 | } rmode; | |
279 | int halt_request; /* real mode on Intel only */ | |
280 | ||
281 | int cpuid_nent; | |
07716717 | 282 | struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; |
34c16eec ZX |
283 | /* emulate context */ |
284 | ||
285 | struct x86_emulate_ctxt emulate_ctxt; | |
18068523 GOC |
286 | |
287 | gpa_t time; | |
50d0a0f9 GH |
288 | struct pvclock_vcpu_time_info hv_clock; |
289 | unsigned int hv_clock_tsc_khz; | |
18068523 GOC |
290 | unsigned int time_offset; |
291 | struct page *time_page; | |
3419ffc8 SY |
292 | |
293 | bool nmi_pending; | |
9ba075a6 AK |
294 | |
295 | u64 mtrr[0x100]; | |
34c16eec ZX |
296 | }; |
297 | ||
d69fb81f ZX |
298 | struct kvm_mem_alias { |
299 | gfn_t base_gfn; | |
300 | unsigned long npages; | |
301 | gfn_t target_gfn; | |
302 | }; | |
303 | ||
304 | struct kvm_arch{ | |
305 | int naliases; | |
306 | struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS]; | |
f05e70ac ZX |
307 | |
308 | unsigned int n_free_mmu_pages; | |
309 | unsigned int n_requested_mmu_pages; | |
310 | unsigned int n_alloc_mmu_pages; | |
311 | struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; | |
312 | /* | |
313 | * Hash table of struct kvm_mmu_page. | |
314 | */ | |
315 | struct list_head active_mmu_pages; | |
d7deeeb0 ZX |
316 | struct kvm_pic *vpic; |
317 | struct kvm_ioapic *vioapic; | |
7837699f | 318 | struct kvm_pit *vpit; |
bfc6d222 ZX |
319 | |
320 | int round_robin_prev_vcpu; | |
321 | unsigned int tss_addr; | |
322 | struct page *apic_access_page; | |
18068523 GOC |
323 | |
324 | gpa_t wall_clock; | |
b7ebfb05 SY |
325 | |
326 | struct page *ept_identity_pagetable; | |
327 | bool ept_identity_pagetable_done; | |
d69fb81f ZX |
328 | }; |
329 | ||
0711456c ZX |
330 | struct kvm_vm_stat { |
331 | u32 mmu_shadow_zapped; | |
332 | u32 mmu_pte_write; | |
333 | u32 mmu_pte_updated; | |
334 | u32 mmu_pde_zapped; | |
335 | u32 mmu_flooded; | |
336 | u32 mmu_recycled; | |
dfc5aa00 | 337 | u32 mmu_cache_miss; |
0711456c | 338 | u32 remote_tlb_flush; |
05da4558 | 339 | u32 lpages; |
0711456c ZX |
340 | }; |
341 | ||
77b4c255 ZX |
342 | struct kvm_vcpu_stat { |
343 | u32 pf_fixed; | |
344 | u32 pf_guest; | |
345 | u32 tlb_flush; | |
346 | u32 invlpg; | |
347 | ||
348 | u32 exits; | |
349 | u32 io_exits; | |
350 | u32 mmio_exits; | |
351 | u32 signal_exits; | |
352 | u32 irq_window_exits; | |
f08864b4 | 353 | u32 nmi_window_exits; |
77b4c255 ZX |
354 | u32 halt_exits; |
355 | u32 halt_wakeup; | |
356 | u32 request_irq_exits; | |
357 | u32 irq_exits; | |
358 | u32 host_state_reload; | |
359 | u32 efer_reload; | |
360 | u32 fpu_reload; | |
361 | u32 insn_emulation; | |
362 | u32 insn_emulation_fail; | |
f11c3a8d | 363 | u32 hypercalls; |
77b4c255 | 364 | }; |
ad312c7c | 365 | |
e01a1b57 HB |
366 | struct descriptor_table { |
367 | u16 limit; | |
368 | unsigned long base; | |
369 | } __attribute__((packed)); | |
370 | ||
ea4a5ff8 ZX |
371 | struct kvm_x86_ops { |
372 | int (*cpu_has_kvm_support)(void); /* __init */ | |
373 | int (*disabled_by_bios)(void); /* __init */ | |
374 | void (*hardware_enable)(void *dummy); /* __init */ | |
375 | void (*hardware_disable)(void *dummy); | |
376 | void (*check_processor_compatibility)(void *rtn); | |
377 | int (*hardware_setup)(void); /* __init */ | |
378 | void (*hardware_unsetup)(void); /* __exit */ | |
774ead3a | 379 | bool (*cpu_has_accelerated_tpr)(void); |
ea4a5ff8 ZX |
380 | |
381 | /* Create, but do not attach this VCPU */ | |
382 | struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id); | |
383 | void (*vcpu_free)(struct kvm_vcpu *vcpu); | |
384 | int (*vcpu_reset)(struct kvm_vcpu *vcpu); | |
385 | ||
386 | void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); | |
387 | void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); | |
388 | void (*vcpu_put)(struct kvm_vcpu *vcpu); | |
ea4a5ff8 ZX |
389 | |
390 | int (*set_guest_debug)(struct kvm_vcpu *vcpu, | |
391 | struct kvm_debug_guest *dbg); | |
392 | void (*guest_debug_pre)(struct kvm_vcpu *vcpu); | |
393 | int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata); | |
394 | int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); | |
395 | u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); | |
396 | void (*get_segment)(struct kvm_vcpu *vcpu, | |
397 | struct kvm_segment *var, int seg); | |
2e4d2653 | 398 | int (*get_cpl)(struct kvm_vcpu *vcpu); |
ea4a5ff8 ZX |
399 | void (*set_segment)(struct kvm_vcpu *vcpu, |
400 | struct kvm_segment *var, int seg); | |
401 | void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); | |
402 | void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); | |
403 | void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); | |
404 | void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); | |
405 | void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); | |
406 | void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); | |
407 | void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
408 | void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
409 | void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
410 | void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
411 | unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr); | |
412 | void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value, | |
413 | int *exception); | |
414 | void (*cache_regs)(struct kvm_vcpu *vcpu); | |
415 | void (*decache_regs)(struct kvm_vcpu *vcpu); | |
416 | unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); | |
417 | void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); | |
418 | ||
419 | void (*tlb_flush)(struct kvm_vcpu *vcpu); | |
ea4a5ff8 | 420 | |
ea4a5ff8 ZX |
421 | void (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run); |
422 | int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu); | |
423 | void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); | |
424 | void (*patch_hypercall)(struct kvm_vcpu *vcpu, | |
425 | unsigned char *hypercall_addr); | |
426 | int (*get_irq)(struct kvm_vcpu *vcpu); | |
427 | void (*set_irq)(struct kvm_vcpu *vcpu, int vec); | |
298101da AK |
428 | void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr, |
429 | bool has_error_code, u32 error_code); | |
430 | bool (*exception_injected)(struct kvm_vcpu *vcpu); | |
ea4a5ff8 ZX |
431 | void (*inject_pending_irq)(struct kvm_vcpu *vcpu); |
432 | void (*inject_pending_vectors)(struct kvm_vcpu *vcpu, | |
433 | struct kvm_run *run); | |
434 | ||
435 | int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); | |
67253af5 | 436 | int (*get_tdp_level)(void); |
ea4a5ff8 ZX |
437 | }; |
438 | ||
97896d04 ZX |
439 | extern struct kvm_x86_ops *kvm_x86_ops; |
440 | ||
54f1585a ZX |
441 | int kvm_mmu_module_init(void); |
442 | void kvm_mmu_module_exit(void); | |
443 | ||
444 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu); | |
445 | int kvm_mmu_create(struct kvm_vcpu *vcpu); | |
446 | int kvm_mmu_setup(struct kvm_vcpu *vcpu); | |
447 | void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte); | |
7b52345e SY |
448 | void kvm_mmu_set_base_ptes(u64 base_pte); |
449 | void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, | |
450 | u64 dirty_mask, u64 nx_mask, u64 x_mask); | |
54f1585a ZX |
451 | |
452 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu); | |
453 | void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot); | |
454 | void kvm_mmu_zap_all(struct kvm *kvm); | |
3ad82a7e | 455 | unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm); |
54f1585a ZX |
456 | void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages); |
457 | ||
cc4b6871 JR |
458 | int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3); |
459 | ||
3200f405 | 460 | int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, |
9f811285 | 461 | const void *val, int bytes); |
2f333bcb MT |
462 | int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes, |
463 | gpa_t addr, unsigned long *ret); | |
464 | ||
465 | extern bool tdp_enabled; | |
9f811285 | 466 | |
54f1585a ZX |
467 | enum emulation_result { |
468 | EMULATE_DONE, /* no further processing */ | |
469 | EMULATE_DO_MMIO, /* kvm_run filled with mmio request */ | |
470 | EMULATE_FAIL, /* can't emulate this instruction */ | |
471 | }; | |
472 | ||
571008da SY |
473 | #define EMULTYPE_NO_DECODE (1 << 0) |
474 | #define EMULTYPE_TRAP_UD (1 << 1) | |
54f1585a | 475 | int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run, |
571008da | 476 | unsigned long cr2, u16 error_code, int emulation_type); |
54f1585a ZX |
477 | void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context); |
478 | void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); | |
479 | void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); | |
480 | void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw, | |
481 | unsigned long *rflags); | |
482 | ||
483 | unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr); | |
484 | void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value, | |
485 | unsigned long *rflags); | |
f2b4b7dd | 486 | void kvm_enable_efer_bits(u64); |
54f1585a ZX |
487 | int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data); |
488 | int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); | |
489 | ||
490 | struct x86_emulate_ctxt; | |
491 | ||
492 | int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in, | |
493 | int size, unsigned port); | |
494 | int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in, | |
495 | int size, unsigned long count, int down, | |
496 | gva_t address, int rep, unsigned port); | |
497 | void kvm_emulate_cpuid(struct kvm_vcpu *vcpu); | |
498 | int kvm_emulate_halt(struct kvm_vcpu *vcpu); | |
499 | int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address); | |
500 | int emulate_clts(struct kvm_vcpu *vcpu); | |
501 | int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, | |
502 | unsigned long *dest); | |
503 | int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, | |
504 | unsigned long value); | |
505 | ||
37817f29 IE |
506 | int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason); |
507 | ||
2d3ad1f4 | 508 | void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); |
9c20456a JR |
509 | void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); |
510 | void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); | |
511 | void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); | |
2d3ad1f4 AK |
512 | unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); |
513 | void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); | |
54f1585a ZX |
514 | void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); |
515 | ||
516 | int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata); | |
517 | int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data); | |
518 | ||
298101da AK |
519 | void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); |
520 | void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); | |
c3c91fee AK |
521 | void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2, |
522 | u32 error_code); | |
298101da | 523 | |
3419ffc8 SY |
524 | void kvm_inject_nmi(struct kvm_vcpu *vcpu); |
525 | ||
54f1585a ZX |
526 | void fx_init(struct kvm_vcpu *vcpu); |
527 | ||
528 | int emulator_read_std(unsigned long addr, | |
529 | void *val, | |
530 | unsigned int bytes, | |
531 | struct kvm_vcpu *vcpu); | |
532 | int emulator_write_emulated(unsigned long addr, | |
533 | const void *val, | |
534 | unsigned int bytes, | |
535 | struct kvm_vcpu *vcpu); | |
536 | ||
537 | unsigned long segment_base(u16 selector); | |
538 | ||
d835dfec | 539 | void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu); |
54f1585a ZX |
540 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
541 | const u8 *new, int bytes); | |
542 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); | |
543 | void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); | |
544 | int kvm_mmu_load(struct kvm_vcpu *vcpu); | |
545 | void kvm_mmu_unload(struct kvm_vcpu *vcpu); | |
546 | ||
547 | int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); | |
548 | ||
549 | int kvm_fix_hypercall(struct kvm_vcpu *vcpu); | |
550 | ||
3067714c | 551 | int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code); |
34c16eec | 552 | |
18552672 JR |
553 | void kvm_enable_tdp(void); |
554 | ||
a03490ed | 555 | int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3); |
de7d789a | 556 | int complete_pio(struct kvm_vcpu *vcpu); |
ec6d273d ZX |
557 | |
558 | static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) | |
559 | { | |
560 | struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); | |
561 | ||
562 | return (struct kvm_mmu_page *)page_private(page); | |
563 | } | |
564 | ||
565 | static inline u16 read_fs(void) | |
566 | { | |
567 | u16 seg; | |
568 | asm("mov %%fs, %0" : "=g"(seg)); | |
569 | return seg; | |
570 | } | |
571 | ||
572 | static inline u16 read_gs(void) | |
573 | { | |
574 | u16 seg; | |
575 | asm("mov %%gs, %0" : "=g"(seg)); | |
576 | return seg; | |
577 | } | |
578 | ||
579 | static inline u16 read_ldt(void) | |
580 | { | |
581 | u16 ldt; | |
582 | asm("sldt %0" : "=g"(ldt)); | |
583 | return ldt; | |
584 | } | |
585 | ||
586 | static inline void load_fs(u16 sel) | |
587 | { | |
588 | asm("mov %0, %%fs" : : "rm"(sel)); | |
589 | } | |
590 | ||
591 | static inline void load_gs(u16 sel) | |
592 | { | |
593 | asm("mov %0, %%gs" : : "rm"(sel)); | |
594 | } | |
595 | ||
596 | #ifndef load_ldt | |
597 | static inline void load_ldt(u16 sel) | |
598 | { | |
599 | asm("lldt %0" : : "rm"(sel)); | |
600 | } | |
601 | #endif | |
602 | ||
603 | static inline void get_idt(struct descriptor_table *table) | |
604 | { | |
605 | asm("sidt %0" : "=m"(*table)); | |
606 | } | |
607 | ||
608 | static inline void get_gdt(struct descriptor_table *table) | |
609 | { | |
610 | asm("sgdt %0" : "=m"(*table)); | |
611 | } | |
612 | ||
613 | static inline unsigned long read_tr_base(void) | |
614 | { | |
615 | u16 tr; | |
616 | asm("str %0" : "=g"(tr)); | |
617 | return segment_base(tr); | |
618 | } | |
619 | ||
620 | #ifdef CONFIG_X86_64 | |
621 | static inline unsigned long read_msr(unsigned long msr) | |
622 | { | |
623 | u64 value; | |
624 | ||
625 | rdmsrl(msr, value); | |
626 | return value; | |
627 | } | |
628 | #endif | |
629 | ||
630 | static inline void fx_save(struct i387_fxsave_struct *image) | |
631 | { | |
632 | asm("fxsave (%0)":: "r" (image)); | |
633 | } | |
634 | ||
635 | static inline void fx_restore(struct i387_fxsave_struct *image) | |
636 | { | |
637 | asm("fxrstor (%0)":: "r" (image)); | |
638 | } | |
639 | ||
bc1a34f1 | 640 | static inline void fx_finit(void) |
ec6d273d ZX |
641 | { |
642 | asm("finit"); | |
643 | } | |
644 | ||
645 | static inline u32 get_rdx_init_val(void) | |
646 | { | |
647 | return 0x600; /* P6 family */ | |
648 | } | |
649 | ||
c1a5d4f9 AK |
650 | static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) |
651 | { | |
652 | kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); | |
653 | } | |
654 | ||
ec6d273d ZX |
655 | #define ASM_VMX_VMCLEAR_RAX ".byte 0x66, 0x0f, 0xc7, 0x30" |
656 | #define ASM_VMX_VMLAUNCH ".byte 0x0f, 0x01, 0xc2" | |
657 | #define ASM_VMX_VMRESUME ".byte 0x0f, 0x01, 0xc3" | |
658 | #define ASM_VMX_VMPTRLD_RAX ".byte 0x0f, 0xc7, 0x30" | |
659 | #define ASM_VMX_VMREAD_RDX_RAX ".byte 0x0f, 0x78, 0xd0" | |
660 | #define ASM_VMX_VMWRITE_RAX_RDX ".byte 0x0f, 0x79, 0xd0" | |
661 | #define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4" | |
662 | #define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4" | |
663 | #define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30" | |
1439442c | 664 | #define ASM_VMX_INVEPT ".byte 0x66, 0x0f, 0x38, 0x80, 0x08" |
2384d2b3 | 665 | #define ASM_VMX_INVVPID ".byte 0x66, 0x0f, 0x38, 0x81, 0x08" |
ec6d273d ZX |
666 | |
667 | #define MSR_IA32_TIME_STAMP_COUNTER 0x010 | |
668 | ||
669 | #define TSS_IOPB_BASE_OFFSET 0x66 | |
670 | #define TSS_BASE_SIZE 0x68 | |
671 | #define TSS_IOPB_SIZE (65536 / 8) | |
672 | #define TSS_REDIRECTION_SIZE (256 / 8) | |
7d76b4d3 JP |
673 | #define RMODE_TSS_SIZE \ |
674 | (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) | |
53e0aa7b | 675 | |
37817f29 IE |
676 | enum { |
677 | TASK_SWITCH_CALL = 0, | |
678 | TASK_SWITCH_IRET = 1, | |
679 | TASK_SWITCH_JMP = 2, | |
680 | TASK_SWITCH_GATE = 3, | |
681 | }; | |
682 | ||
2714d1d3 FEL |
683 | #define KVMTRACE_5D(evt, vcpu, d1, d2, d3, d4, d5, name) \ |
684 | trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \ | |
685 | vcpu, 5, d1, d2, d3, d4, d5) | |
686 | #define KVMTRACE_4D(evt, vcpu, d1, d2, d3, d4, name) \ | |
687 | trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \ | |
688 | vcpu, 4, d1, d2, d3, d4, 0) | |
689 | #define KVMTRACE_3D(evt, vcpu, d1, d2, d3, name) \ | |
690 | trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \ | |
691 | vcpu, 3, d1, d2, d3, 0, 0) | |
692 | #define KVMTRACE_2D(evt, vcpu, d1, d2, name) \ | |
693 | trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \ | |
694 | vcpu, 2, d1, d2, 0, 0, 0) | |
695 | #define KVMTRACE_1D(evt, vcpu, d1, name) \ | |
696 | trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \ | |
697 | vcpu, 1, d1, 0, 0, 0, 0) | |
698 | #define KVMTRACE_0D(evt, vcpu, name) \ | |
699 | trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \ | |
700 | vcpu, 0, 0, 0, 0, 0, 0) | |
701 | ||
4ecac3fd AK |
702 | #ifdef CONFIG_64BIT |
703 | #define KVM_EX_ENTRY ".quad" | |
704 | #else | |
705 | #define KVM_EX_ENTRY ".long" | |
706 | #endif | |
707 | ||
708 | /* | |
709 | * Hardware virtualization extension instructions may fault if a | |
710 | * reboot turns off virtualization while processes are running. | |
711 | * Trap the fault and ignore the instruction if that happens. | |
712 | */ | |
713 | asmlinkage void kvm_handle_fault_on_reboot(void); | |
714 | ||
715 | #define __kvm_handle_fault_on_reboot(insn) \ | |
716 | "666: " insn "\n\t" \ | |
717 | ".pushsection .text.fixup, \"ax\" \n" \ | |
718 | "667: \n\t" \ | |
719 | "push $666b \n\t" \ | |
720 | "jmp kvm_handle_fault_on_reboot \n\t" \ | |
721 | ".popsection \n\t" \ | |
722 | ".pushsection __ex_table, \"a\" \n\t" \ | |
723 | KVM_EX_ENTRY " 666b, 667b \n\t" \ | |
724 | ".popsection" | |
725 | ||
043405e1 | 726 | #endif |