[linux.git] / drivers / reset / Kconfig

# SPDX-License-Identifier: GPL-2.0-only
config ARCH_HAS_RESET_CONTROLLER
	bool

menuconfig RESET_CONTROLLER
	bool "Reset Controller Support"
	default y if ARCH_HAS_RESET_CONTROLLER
	help
	  Generic Reset Controller support.

	  This framework is designed to abstract reset handling of devices
	  via GPIOs or SoC-internal reset controller modules.

	  If unsure, say no.

if RESET_CONTROLLER

config RESET_A10SR
	tristate "Altera Arria10 System Resource Reset"
	depends on MFD_ALTERA_A10SR
	help
	  This option enables support for the external reset functions for
	  peripheral PHYs on the Altera Arria10 System Resource Chip.

config RESET_ATH79
	bool "AR71xx Reset Driver" if COMPILE_TEST
	default ATH79
	help
	  This enables the ATH79 reset controller driver that supports the
	  AR71xx SoC reset controller.

config RESET_AXS10X
	bool "AXS10x Reset Driver" if COMPILE_TEST
	default ARC_PLAT_AXS10X
	help
	  This enables the reset controller driver for AXS10x.

config RESET_BCM6345
	bool "BCM6345 Reset Controller"
	depends on BMIPS_GENERIC || COMPILE_TEST
	default BMIPS_GENERIC
	help
	  This enables the reset controller driver for BCM6345 SoCs.

config RESET_BERLIN
	bool "Berlin Reset Driver" if COMPILE_TEST
	default ARCH_BERLIN
	help
	  This enables the reset controller driver for Marvell Berlin SoCs.

config RESET_BRCMSTB
	tristate "Broadcom STB reset controller"
	depends on ARCH_BRCMSTB || COMPILE_TEST
	default ARCH_BRCMSTB
	help
	  This enables the reset controller driver for Broadcom STB SoCs using
	  a SUN_TOP_CTRL_SW_INIT style controller.

config RESET_BRCMSTB_RESCAL
	bool "Broadcom STB RESCAL reset controller"
	depends on HAS_IOMEM
	depends on ARCH_BRCMSTB || COMPILE_TEST
	default ARCH_BRCMSTB
	help
	  This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on
	  BCM7216.

config RESET_HSDK
	bool "Synopsys HSDK Reset Driver"
	depends on HAS_IOMEM
	depends on ARC_SOC_HSDK || COMPILE_TEST
	help
	  This enables the reset controller driver for HSDK board.

config RESET_IMX7
	tristate "i.MX7/8 Reset Driver"
	depends on HAS_IOMEM
	depends on SOC_IMX7D || (ARM64 && ARCH_MXC) || COMPILE_TEST
	default y if SOC_IMX7D
	select MFD_SYSCON
	help
	  This enables the reset controller driver for i.MX7 SoCs.

config RESET_INTEL_GW
	bool "Intel Reset Controller Driver"
	depends on OF && HAS_IOMEM
	select REGMAP_MMIO
	help
	  This enables the reset controller driver for Intel Gateway SoCs.
	  Say Y to control the reset signals provided by reset controller.
	  Otherwise, say N.

config RESET_K210
	bool "Reset controller driver for Canaan Kendryte K210 SoC"
	depends on (SOC_CANAAN || COMPILE_TEST) && OF
	select MFD_SYSCON
	default SOC_CANAAN
	help
	  Support for the Canaan Kendryte K210 RISC-V SoC reset controller.
	  Say Y if you want to control reset signals provided by this
	  controller.

config RESET_LANTIQ
	bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
	default SOC_TYPE_XWAY
	help
	  This enables the reset controller driver for Lantiq / Intel XWAY SoCs.

config RESET_LPC18XX
	bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST
	default ARCH_LPC18XX
	help
	  This enables the reset controller driver for NXP LPC18xx/43xx SoCs.

config RESET_MCHP_SPARX5
	bool "Microchip Sparx5 reset driver"
	depends on HAS_IOMEM || COMPILE_TEST
	default y if SPARX5_SWITCH
	select MFD_SYSCON
	help
	  This driver supports switch core reset for the Microchip Sparx5 SoC.

config RESET_MESON
	tristate "Meson Reset Driver"
	depends on ARCH_MESON || COMPILE_TEST
	default ARCH_MESON
	help
	  This enables the reset driver for Amlogic Meson SoCs.

config RESET_MESON_AUDIO_ARB
	tristate "Meson Audio Memory Arbiter Reset Driver"
	depends on ARCH_MESON || COMPILE_TEST
	help
	  This enables the reset driver for Audio Memory Arbiter of
	  Amlogic's A113 based SoCs

config RESET_NPCM
	bool "NPCM BMC Reset Driver" if COMPILE_TEST
	default ARCH_NPCM
	help
	  This enables the reset controller driver for Nuvoton NPCM
	  BMC SoCs.

config RESET_OXNAS
	bool

config RESET_PISTACHIO
	bool "Pistachio Reset Driver" if COMPILE_TEST
	default MACH_PISTACHIO
	help
	  This enables the reset driver for ImgTec Pistachio SoCs.

config RESET_QCOM_AOSS
	tristate "Qcom AOSS Reset Driver"
	depends on ARCH_QCOM || COMPILE_TEST
	help
	  This enables the AOSS (always on subsystem) reset driver
	  for Qualcomm SDM845 SoCs. Say Y if you want to control
	  reset signals provided by AOSS for Modem, Venus, ADSP,
	  GPU, Camera, Wireless, Display subsystem. Otherwise, say N.

config RESET_QCOM_PDC
	tristate "Qualcomm PDC Reset Driver"
	depends on ARCH_QCOM || COMPILE_TEST
	help
	  This enables the PDC (Power Domain Controller) reset driver
	  for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want
	  to control reset signals provided by PDC for Modem, Compute,
	  Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS.

config RESET_RASPBERRYPI
	tristate "Raspberry Pi 4 Firmware Reset Driver"
	depends on RASPBERRYPI_FIRMWARE || (RASPBERRYPI_FIRMWARE=n && COMPILE_TEST)
	default USB_XHCI_PCI
	help
	  Raspberry Pi 4's co-processor controls some of the board's HW
	  initialization process, but it's up to Linux to trigger it when
	  relevant. This driver provides a reset controller capable of
	  interfacing with RPi4's co-processor and model these firmware
	  initialization routines as reset lines.

config RESET_SCMI
	tristate "Reset driver controlled via ARM SCMI interface"
	depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
	default ARM_SCMI_PROTOCOL
	help
	  This driver provides support for reset signal/domains that are
	  controlled by firmware that implements the SCMI interface.

	  This driver uses SCMI Message Protocol to interact with the
	  firmware controlling all the reset signals.

config RESET_SIMPLE
	bool "Simple Reset Controller Driver" if COMPILE_TEST
	default ARCH_ASPEED || ARCH_BCM4908 || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || (ARCH_INTEL_SOCFPGA && ARM64) || ARCH_SUNXI || ARC
	help
	  This enables a simple reset controller driver for reset lines that
	  that can be asserted and deasserted by toggling bits in a contiguous,
	  exclusive register space.

	  Currently this driver supports:
	   - Altera SoCFPGAs
	   - ASPEED BMC SoCs
	   - Bitmain BM1880 SoC
	   - Realtek SoCs
	   - RCC reset controller in STM32 MCUs
	   - Allwinner SoCs
	   - ZTE's zx2967 family
	   - SiFive FU740 SoCs

config RESET_STM32MP157
	bool "STM32MP157 Reset Driver" if COMPILE_TEST
	default MACH_STM32MP157
	help
	  This enables the RCC reset controller driver for STM32 MPUs.

config RESET_SOCFPGA
	bool "SoCFPGA Reset Driver" if COMPILE_TEST && (!ARM || !ARCH_INTEL_SOCFPGA)
	default ARM && ARCH_INTEL_SOCFPGA
	select RESET_SIMPLE
	help
	  This enables the reset driver for the SoCFPGA ARMv7 platforms. This
	  driver gets initialized early during platform init calls.

config RESET_SUNXI
	bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
	default ARCH_SUNXI
	select RESET_SIMPLE
	help
	  This enables the reset driver for Allwinner SoCs.

config RESET_TI_SCI
	tristate "TI System Control Interface (TI-SCI) reset driver"
	depends on TI_SCI_PROTOCOL
	help
	  This enables the reset driver support over TI System Control Interface
	  available on some new TI's SoCs. If you wish to use reset resources
	  managed by the TI System Controller, say Y here. Otherwise, say N.

config RESET_TI_SYSCON
	tristate "TI SYSCON Reset Driver"
	depends on HAS_IOMEM
	select MFD_SYSCON
	help
	  This enables the reset driver support for TI devices with
	  memory-mapped reset registers as part of a syscon device node. If
	  you wish to use the reset framework for such memory-mapped devices,
	  say Y here. Otherwise, say N.

config RESET_UNIPHIER
	tristate "Reset controller driver for UniPhier SoCs"
	depends on ARCH_UNIPHIER || COMPILE_TEST
	depends on OF && MFD_SYSCON
	default ARCH_UNIPHIER
	help
	  Support for reset controllers on UniPhier SoCs.
	  Say Y if you want to control reset signals provided by System Control
	  block, Media I/O block, Peripheral Block.

config RESET_UNIPHIER_GLUE
	tristate "Reset driver in glue layer for UniPhier SoCs"
	depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF
	default ARCH_UNIPHIER
	select RESET_SIMPLE
	help
	  Support for peripheral core reset included in its own glue layer
	  on UniPhier SoCs. Say Y if you want to control reset signals
	  provided by the glue layer.

config RESET_ZYNQ
	bool "ZYNQ Reset Driver" if COMPILE_TEST
	default ARCH_ZYNQ
	help
	  This enables the reset controller driver for Xilinx Zynq SoCs.

source "drivers/reset/sti/Kconfig"
source "drivers/reset/hisilicon/Kconfig"
source "drivers/reset/tegra/Kconfig"

endif
Commit	Line	Data
ec8f24b7	1	# SPDX-License-Identifier: GPL-2.0-only
61fc4131 PZ	2	config ARCH_HAS_RESET_CONTROLLER
	3	bool
	4
	5	menuconfig RESET_CONTROLLER
	6	bool "Reset Controller Support"
	7	default y if ARCH_HAS_RESET_CONTROLLER
	8	help
	9	Generic Reset Controller support.
	10
	11	This framework is designed to abstract reset handling of devices
	12	via GPIOs or SoC-internal reset controller modules.
	13
	14	If unsure, say no.
e5d76075	15
998cd463 MY	16	if RESET_CONTROLLER
998cd463 MY	17
62700682 TT	18	config RESET_A10SR
	19	tristate "Altera Arria10 System Resource Reset"
	20	depends on MFD_ALTERA_A10SR
	21	help
	22	This option enables support for the external reset functions for
	23	peripheral PHYs on the Altera Arria10 System Resource Chip.
	24
e27b4a6e PZ	25	config RESET_ATH79
	26	bool "AR71xx Reset Driver" if COMPILE_TEST
	27	default ATH79
	28	help
	29	This enables the ATH79 reset controller driver that supports the
	30	AR71xx SoC reset controller.
	31
37634923 EP	32	config RESET_AXS10X
	33	bool "AXS10x Reset Driver" if COMPILE_TEST
	34	default ARC_PLAT_AXS10X
	35	help
	36	This enables the reset controller driver for AXS10x.
	37
aac02543 ÁFR	38	config RESET_BCM6345
	39	bool "BCM6345 Reset Controller"
	40	depends on BMIPS_GENERIC \|\| COMPILE_TEST
	41	default BMIPS_GENERIC
	42	help
	43	This enables the reset controller driver for BCM6345 SoCs.
	44
70d467ea PZ	45	config RESET_BERLIN
	46	bool "Berlin Reset Driver" if COMPILE_TEST
	47	default ARCH_BERLIN
	48	help
	49	This enables the reset controller driver for Marvell Berlin SoCs.
	50
77750bc0 FF	51	config RESET_BRCMSTB
	52	tristate "Broadcom STB reset controller"
	53	depends on ARCH_BRCMSTB \|\| COMPILE_TEST
	54	default ARCH_BRCMSTB
	55	help
	56	This enables the reset controller driver for Broadcom STB SoCs using
	57	a SUN_TOP_CTRL_SW_INIT style controller.
	58
4cf176e5 JQ	59	config RESET_BRCMSTB_RESCAL
4cf176e5 JQ	60	bool "Broadcom STB RESCAL reset controller"
7fbcc535	61	depends on HAS_IOMEM
42f6a76f GU	62	depends on ARCH_BRCMSTB \|\| COMPILE_TEST
42f6a76f GU	63	default ARCH_BRCMSTB
4cf176e5 JQ	64	help
	65	This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on
	66	BCM7216.
	67
13541226 VG	68	config RESET_HSDK
13541226 VG	69	bool "Synopsys HSDK Reset Driver"
2d48a237	70	depends on HAS_IOMEM
544e3bf4	71	depends on ARC_SOC_HSDK \|\| COMPILE_TEST
e0be864f	72	help
13541226	73	This enables the reset controller driver for HSDK board.
e0be864f	74
abf97755	75	config RESET_IMX7
a442abbb	76	tristate "i.MX7/8 Reset Driver"
8fa56620	77	depends on HAS_IOMEM
a442abbb AH	78	depends on SOC_IMX7D \|\| (ARM64 && ARCH_MXC) \|\| COMPILE_TEST
a442abbb AH	79	default y if SOC_IMX7D
abf97755 AS	80	select MFD_SYSCON
	81	help
	82	This enables the reset controller driver for i.MX7 SoCs.
	83
c9aef213 DK	84	config RESET_INTEL_GW
c9aef213 DK	85	bool "Intel Reset Controller Driver"
b460e0a9	86	depends on OF && HAS_IOMEM
c9aef213 DK	87	select REGMAP_MMIO
	88	help
	89	This enables the reset controller driver for Intel Gateway SoCs.
	90	Say Y to control the reset signals provided by reset controller.
	91	Otherwise, say N.
	92
5a2308da DLM	93	config RESET_K210
	94	bool "Reset controller driver for Canaan Kendryte K210 SoC"
	95	depends on (SOC_CANAAN \|\| COMPILE_TEST) && OF
	96	select MFD_SYSCON
	97	default SOC_CANAAN
	98	help
	99	Support for the Canaan Kendryte K210 RISC-V SoC reset controller.
	100	Say Y if you want to control reset signals provided by this
	101	controller.
	102
79797b6f MB	103	config RESET_LANTIQ
	104	bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
	105	default SOC_TYPE_XWAY
	106	help
	107	This enables the reset controller driver for Lantiq / Intel XWAY SoCs.
	108
cd7f4b81 PZ	109	config RESET_LPC18XX
	110	bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST
	111	default ARCH_LPC18XX
	112	help
	113	This enables the reset controller driver for NXP LPC18xx/43xx SoCs.
	114
453ed428 SH	115	config RESET_MCHP_SPARX5
	116	bool "Microchip Sparx5 reset driver"
	117	depends on HAS_IOMEM \|\| COMPILE_TEST
	118	default y if SPARX5_SWITCH
	119	select MFD_SYSCON
	120	help
	121	This driver supports switch core reset for the Microchip Sparx5 SoC.
	122
44336c24	123	config RESET_MESON
3bfe8933 NA	124	tristate "Meson Reset Driver"
3bfe8933 NA	125	depends on ARCH_MESON \|\| COMPILE_TEST
44336c24 PZ	126	default ARCH_MESON
	127	help
	128	This enables the reset driver for Amlogic Meson SoCs.
	129
d903779b JB	130	config RESET_MESON_AUDIO_ARB
	131	tristate "Meson Audio Memory Arbiter Reset Driver"
	132	depends on ARCH_MESON \|\| COMPILE_TEST
	133	help
	134	This enables the reset driver for Audio Memory Arbiter of
	135	Amlogic's A113 based SoCs
	136
9c81b2cc TM	137	config RESET_NPCM
	138	bool "NPCM BMC Reset Driver" if COMPILE_TEST
	139	default ARCH_NPCM
	140	help
	141	This enables the reset controller driver for Nuvoton NPCM
	142	BMC SoCs.
	143
6e667fac NA	144	config RESET_OXNAS
	145	bool
	146
fab3f730 PZ	147	config RESET_PISTACHIO
	148	bool "Pistachio Reset Driver" if COMPILE_TEST
	149	default MACH_PISTACHIO
	150	help
	151	This enables the reset driver for ImgTec Pistachio SoCs.
	152
5ecb0651	153	config RESET_QCOM_AOSS
e2d5e833	154	tristate "Qcom AOSS Reset Driver"
5ecb0651 SS	155	depends on ARCH_QCOM \|\| COMPILE_TEST
	156	help
	157	This enables the AOSS (always on subsystem) reset driver
	158	for Qualcomm SDM845 SoCs. Say Y if you want to control
	159	reset signals provided by AOSS for Modem, Venus, ADSP,
	160	GPU, Camera, Wireless, Display subsystem. Otherwise, say N.
	161
eea2926b SS	162	config RESET_QCOM_PDC
	163	tristate "Qualcomm PDC Reset Driver"
	164	depends on ARCH_QCOM \|\| COMPILE_TEST
	165	help
	166	This enables the PDC (Power Domain Controller) reset driver
	167	for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want
	168	to control reset signals provided by PDC for Modem, Compute,
	169	Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS.
	170
abffc82a NSJ	171	config RESET_RASPBERRYPI
	172	tristate "Raspberry Pi 4 Firmware Reset Driver"
	173	depends on RASPBERRYPI_FIRMWARE \|\| (RASPBERRYPI_FIRMWARE=n && COMPILE_TEST)
	174	default USB_XHCI_PCI
	175	help
	176	Raspberry Pi 4's co-processor controls some of the board's HW
	177	initialization process, but it's up to Linux to trigger it when
	178	relevant. This driver provides a reset controller capable of
	179	interfacing with RPi4's co-processor and model these firmware
	180	initialization routines as reset lines.
	181
c8ae9c2d SH	182	config RESET_SCMI
	183	tristate "Reset driver controlled via ARM SCMI interface"
	184	depends on ARM_SCMI_PROTOCOL \|\| COMPILE_TEST
	185	default ARM_SCMI_PROTOCOL
	186	help
	187	This driver provides support for reset signal/domains that are
	188	controlled by firmware that implements the SCMI interface.
	189
	190	This driver uses SCMI Message Protocol to interact with the
	191	firmware controlling all the reset signals.
	192
81c22ad0 PZ	193	config RESET_SIMPLE
81c22ad0 PZ	194	bool "Simple Reset Controller Driver" if COMPILE_TEST
4a9a1a56	195	default ARCH_ASPEED \|\| ARCH_BCM4908 \|\| ARCH_BITMAIN \|\| ARCH_REALTEK \|\| ARCH_STM32 \|\| (ARCH_INTEL_SOCFPGA && ARM64) \|\| ARCH_SUNXI \|\| ARC
81c22ad0 PZ	196	help
	197	This enables a simple reset controller driver for reset lines that
	198	that can be asserted and deasserted by toggling bits in a contiguous,
	199	exclusive register space.
	200
1d7592f8 JS	201	Currently this driver supports:
	202	- Altera SoCFPGAs
	203	- ASPEED BMC SoCs
5ac33eeb	204	- Bitmain BM1880 SoC
3ab831e5	205	- Realtek SoCs
1d7592f8 JS	206	- RCC reset controller in STM32 MCUs
	207	- Allwinner SoCs
	208	- ZTE's zx2967 family
e4d368e0	209	- SiFive FU740 SoCs
7e0e901d	210
197858b6 GF	211	config RESET_STM32MP157
	212	bool "STM32MP157 Reset Driver" if COMPILE_TEST
	213	default MACH_STM32MP157
	214	help
	215	This enables the RCC reset controller driver for STM32 MPUs.
	216
b3ca9888	217	config RESET_SOCFPGA
225c13f0 KK	218	bool "SoCFPGA Reset Driver" if COMPILE_TEST && (!ARM \|\| !ARCH_INTEL_SOCFPGA)
225c13f0 KK	219	default ARM && ARCH_INTEL_SOCFPGA
b3ca9888 DN	220	select RESET_SIMPLE
	221	help
	222	This enables the reset driver for the SoCFPGA ARMv7 platforms. This
	223	driver gets initialized early during platform init calls.
	224
0ae08419 PZ	225	config RESET_SUNXI
	226	bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
	227	default ARCH_SUNXI
e13c205a	228	select RESET_SIMPLE
0ae08419 PZ	229	help
	230	This enables the reset driver for Allwinner SoCs.
	231
28df169b AD	232	config RESET_TI_SCI
	233	tristate "TI System Control Interface (TI-SCI) reset driver"
	234	depends on TI_SCI_PROTOCOL
	235	help
	236	This enables the reset driver support over TI System Control Interface
	237	available on some new TI's SoCs. If you wish to use reset resources
	238	managed by the TI System Controller, say Y here. Otherwise, say N.
	239
dd9bf863	240	config RESET_TI_SYSCON
cc7c2bb1 AD	241	tristate "TI SYSCON Reset Driver"
	242	depends on HAS_IOMEM
	243	select MFD_SYSCON
	244	help
	245	This enables the reset driver support for TI devices with
	246	memory-mapped reset registers as part of a syscon device node. If
	247	you wish to use the reset framework for such memory-mapped devices,
	248	say Y here. Otherwise, say N.
	249
54e991b5 MY	250	config RESET_UNIPHIER
	251	tristate "Reset controller driver for UniPhier SoCs"
	252	depends on ARCH_UNIPHIER \|\| COMPILE_TEST
	253	depends on OF && MFD_SYSCON
	254	default ARCH_UNIPHIER
	255	help
	256	Support for reset controllers on UniPhier SoCs.
	257	Say Y if you want to control reset signals provided by System Control
	258	block, Media I/O block, Peripheral Block.
	259
3eb8f765 KH	260	config RESET_UNIPHIER_GLUE
3eb8f765 KH	261	tristate "Reset driver in glue layer for UniPhier SoCs"
499fef09 KH	262	depends on (ARCH_UNIPHIER \|\| COMPILE_TEST) && OF
	263	default ARCH_UNIPHIER
	264	select RESET_SIMPLE
	265	help
3eb8f765 KH	266	Support for peripheral core reset included in its own glue layer
	267	on UniPhier SoCs. Say Y if you want to control reset signals
	268	provided by the glue layer.
499fef09	269
6f51b860 PZ	270	config RESET_ZYNQ
	271	bool "ZYNQ Reset Driver" if COMPILE_TEST
	272	default ARCH_ZYNQ
	273	help
	274	This enables the reset controller driver for Xilinx Zynq SoCs.
	275
e5d76075	276	source "drivers/reset/sti/Kconfig"
f59d23c2	277	source "drivers/reset/hisilicon/Kconfig"
dc606c52	278	source "drivers/reset/tegra/Kconfig"
998cd463 MY	279
998cd463 MY	280	endif