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reset: simple: Enable for ASPEED systems
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1config ARCH_HAS_RESET_CONTROLLER
2 bool
3
4menuconfig RESET_CONTROLLER
5 bool "Reset Controller Support"
6 default y if ARCH_HAS_RESET_CONTROLLER
7 help
8 Generic Reset Controller support.
9
10 This framework is designed to abstract reset handling of devices
11 via GPIOs or SoC-internal reset controller modules.
12
13 If unsure, say no.
e5d76075 14
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15if RESET_CONTROLLER
16
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17config RESET_A10SR
18 tristate "Altera Arria10 System Resource Reset"
19 depends on MFD_ALTERA_A10SR
20 help
21 This option enables support for the external reset functions for
22 peripheral PHYs on the Altera Arria10 System Resource Chip.
23
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24config RESET_ATH79
25 bool "AR71xx Reset Driver" if COMPILE_TEST
26 default ATH79
27 help
28 This enables the ATH79 reset controller driver that supports the
29 AR71xx SoC reset controller.
30
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31config RESET_AXS10X
32 bool "AXS10x Reset Driver" if COMPILE_TEST
33 default ARC_PLAT_AXS10X
34 help
35 This enables the reset controller driver for AXS10x.
36
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37config RESET_BERLIN
38 bool "Berlin Reset Driver" if COMPILE_TEST
39 default ARCH_BERLIN
40 help
41 This enables the reset controller driver for Marvell Berlin SoCs.
42
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43config RESET_HSDK
44 bool "Synopsys HSDK Reset Driver"
2d48a237 45 depends on HAS_IOMEM
544e3bf4 46 depends on ARC_SOC_HSDK || COMPILE_TEST
e0be864f 47 help
13541226 48 This enables the reset controller driver for HSDK board.
e0be864f 49
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50config RESET_IMX7
51 bool "i.MX7 Reset Driver" if COMPILE_TEST
52 default SOC_IMX7D
53 select MFD_SYSCON
54 help
55 This enables the reset controller driver for i.MX7 SoCs.
56
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57config RESET_LANTIQ
58 bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
59 default SOC_TYPE_XWAY
60 help
61 This enables the reset controller driver for Lantiq / Intel XWAY SoCs.
62
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63config RESET_LPC18XX
64 bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST
65 default ARCH_LPC18XX
66 help
67 This enables the reset controller driver for NXP LPC18xx/43xx SoCs.
68
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69config RESET_MESON
70 bool "Meson Reset Driver" if COMPILE_TEST
71 default ARCH_MESON
72 help
73 This enables the reset driver for Amlogic Meson SoCs.
74
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75config RESET_OXNAS
76 bool
77
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78config RESET_PISTACHIO
79 bool "Pistachio Reset Driver" if COMPILE_TEST
80 default MACH_PISTACHIO
81 help
82 This enables the reset driver for ImgTec Pistachio SoCs.
83
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84config RESET_SIMPLE
85 bool "Simple Reset Controller Driver" if COMPILE_TEST
1d7592f8 86 default ARCH_SOCFPGA || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED
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87 help
88 This enables a simple reset controller driver for reset lines that
89 that can be asserted and deasserted by toggling bits in a contiguous,
90 exclusive register space.
91
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92 Currently this driver supports:
93 - Altera SoCFPGAs
94 - ASPEED BMC SoCs
95 - RCC reset controller in STM32 MCUs
96 - Allwinner SoCs
97 - ZTE's zx2967 family
7e0e901d 98
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99config RESET_SUNXI
100 bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
101 default ARCH_SUNXI
e13c205a 102 select RESET_SIMPLE
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103 help
104 This enables the reset driver for Allwinner SoCs.
105
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106config RESET_TI_SCI
107 tristate "TI System Control Interface (TI-SCI) reset driver"
108 depends on TI_SCI_PROTOCOL
109 help
110 This enables the reset driver support over TI System Control Interface
111 available on some new TI's SoCs. If you wish to use reset resources
112 managed by the TI System Controller, say Y here. Otherwise, say N.
113
dd9bf863 114config RESET_TI_SYSCON
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115 tristate "TI SYSCON Reset Driver"
116 depends on HAS_IOMEM
117 select MFD_SYSCON
118 help
119 This enables the reset driver support for TI devices with
120 memory-mapped reset registers as part of a syscon device node. If
121 you wish to use the reset framework for such memory-mapped devices,
122 say Y here. Otherwise, say N.
123
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124config RESET_UNIPHIER
125 tristate "Reset controller driver for UniPhier SoCs"
126 depends on ARCH_UNIPHIER || COMPILE_TEST
127 depends on OF && MFD_SYSCON
128 default ARCH_UNIPHIER
129 help
130 Support for reset controllers on UniPhier SoCs.
131 Say Y if you want to control reset signals provided by System Control
132 block, Media I/O block, Peripheral Block.
133
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134config RESET_ZYNQ
135 bool "ZYNQ Reset Driver" if COMPILE_TEST
136 default ARCH_ZYNQ
137 help
138 This enables the reset controller driver for Xilinx Zynq SoCs.
139
e5d76075 140source "drivers/reset/sti/Kconfig"
f59d23c2 141source "drivers/reset/hisilicon/Kconfig"
dc606c52 142source "drivers/reset/tegra/Kconfig"
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143
144endif
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