]> Git Repo - linux.git/blame - drivers/block/cciss.c
projects / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
drivers/block/paride/pg.c: underflow bug in pg_write()
[linux.git] / drivers / block / cciss.c
CommitLineData
1da177e4 1/*
bd4f36d6
MM		 2 * Disk Array driver for HP Smart Array controllers.
3 * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
1da177e4
LT		 4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
bd4f36d6 7 * the Free Software Foundation; version 2 of the License.
1da177e4
LT		 8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
bd4f36d6
MM		 11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
1da177e4
LT		 13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
bd4f36d6
MM		 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
17 * 02111-1307, USA.
1da177e4
LT		 18 *
19 * Questions/Comments/Bugfixes to [email protected]
20 *
21 */
22
1da177e4
LT		 23#include <linux/module.h>
24#include <linux/interrupt.h>
25#include <linux/types.h>
26#include <linux/pci.h>
19373358 27#include <linux/pci-aspm.h>
1da177e4
LT		 28#include <linux/kernel.h>
29#include <linux/slab.h>
30#include <linux/delay.h>
31#include <linux/major.h>
32#include <linux/fs.h>
33#include <linux/bio.h>
34#include <linux/blkpg.h>
35#include <linux/timer.h>
36#include <linux/proc_fs.h>
89b6e743 37#include <linux/seq_file.h>
7c832835 38#include <linux/init.h>
4d761609 39#include <linux/jiffies.h>
1da177e4
LT		 40#include <linux/hdreg.h>
41#include <linux/spinlock.h>
42#include <linux/compat.h>
b368c9dd 43#include <linux/mutex.h>
1f118bc4 44#include <linux/bitmap.h>
d48c152a 45#include <linux/io.h>
1da177e4 46#include <asm/uaccess.h>
1da177e4 47
eb0df996 48#include <linux/dma-mapping.h>
1da177e4
LT		 49#include <linux/blkdev.h>
50#include <linux/genhd.h>
51#include <linux/completion.h>
d5d3b736 52#include <scsi/scsi.h>
03bbfee5
MMOD		 53#include <scsi/sg.h>
54#include <scsi/scsi_ioctl.h>
55#include <linux/cdrom.h>
231bc2a2 56#include <linux/scatterlist.h>
0a9279cc 57#include <linux/kthread.h>
1da177e4
LT		 58
59#define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
841fdffd
MM		 60#define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
61#define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
1da177e4
LT		 62
63/* Embedded module documentation macros - see modules.h */
64MODULE_AUTHOR("Hewlett-Packard Company");
24aac480 65MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
841fdffd
MM		 66MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
67MODULE_VERSION("3.6.26");
1da177e4 68MODULE_LICENSE("GPL");
8a4ec67b
SC		 69static int cciss_tape_cmds = 6;
70module_param(cciss_tape_cmds, int, 0644);
71MODULE_PARM_DESC(cciss_tape_cmds,
72 "number of commands to allocate for tape devices (default: 6)");
13049537
JH		 73static int cciss_simple_mode;
74module_param(cciss_simple_mode, int, S_IRUGO|S_IWUSR);
75MODULE_PARM_DESC(cciss_simple_mode,
76 "Use 'simple mode' rather than 'performant mode'");
1da177e4 77
e4292e05
MM		 78static int cciss_allow_hpsa;
79module_param(cciss_allow_hpsa, int, S_IRUGO|S_IWUSR);
80MODULE_PARM_DESC(cciss_allow_hpsa,
81 "Prevent cciss driver from accessing hardware known to be "
82 " supported by the hpsa driver");
83
2a48fc0a 84static DEFINE_MUTEX(cciss_mutex);
bbe425cd 85static struct proc_dir_entry *proc_cciss;
2ec24ff1 86
1da177e4
LT		 87#include "cciss_cmd.h"
88#include "cciss.h"
89#include <linux/cciss_ioctl.h>
90
91/* define the PCI info for the cards we can control */
92static const struct pci_device_id cciss_pci_device_id[] = {
f82ccdb9
BH		 93 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
94 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
95 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
96 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
97 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
98 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
99 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
100 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
101 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
de923916 111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
9cff3b38 112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
1da177e4
LT		 113 {0,}
114};
7c832835 115
1da177e4
LT		 116MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
117
1da177e4
LT		 118/* board_id = Subsystem Device ID & Vendor ID
119 * product = Marketing Name for the board
7c832835 120 * access = Address of the struct of function pointers
1da177e4
LT		 121 */
122static struct board_type products[] = {
49153998
MM		 123 {0x40700E11, "Smart Array 5300", &SA5_access},
124 {0x40800E11, "Smart Array 5i", &SA5B_access},
125 {0x40820E11, "Smart Array 532", &SA5B_access},
126 {0x40830E11, "Smart Array 5312", &SA5B_access},
127 {0x409A0E11, "Smart Array 641", &SA5_access},
128 {0x409B0E11, "Smart Array 642", &SA5_access},
129 {0x409C0E11, "Smart Array 6400", &SA5_access},
130 {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
131 {0x40910E11, "Smart Array 6i", &SA5_access},
132 {0x3225103C, "Smart Array P600", &SA5_access},
4205df34
SC		 133 {0x3223103C, "Smart Array P800", &SA5_access},
134 {0x3234103C, "Smart Array P400", &SA5_access},
49153998
MM		 135 {0x3235103C, "Smart Array P400i", &SA5_access},
136 {0x3211103C, "Smart Array E200i", &SA5_access},
137 {0x3212103C, "Smart Array E200", &SA5_access},
138 {0x3213103C, "Smart Array E200i", &SA5_access},
139 {0x3214103C, "Smart Array E200i", &SA5_access},
140 {0x3215103C, "Smart Array E200i", &SA5_access},
141 {0x3237103C, "Smart Array E500", &SA5_access},
2ec24ff1
SC		 142 {0x3223103C, "Smart Array P800", &SA5_access},
143 {0x3234103C, "Smart Array P400", &SA5_access},
49153998 144 {0x323D103C, "Smart Array P700m", &SA5_access},
1da177e4
LT		 145};
146
d14c4ab5 147/* How long to wait (in milliseconds) for board to go into simple mode */
7c832835 148#define MAX_CONFIG_WAIT 30000
1da177e4
LT		 149#define MAX_IOCTL_CONFIG_WAIT 1000
150
151/*define how many times we will try a command because of bus resets */
152#define MAX_CMD_RETRIES 3
153
1da177e4
LT		 154#define MAX_CTLR 32
155
156/* Originally cciss driver only supports 8 major numbers */
157#define MAX_CTLR_ORIG 8
158
1da177e4
LT		 159static ctlr_info_t *hba[MAX_CTLR];
160
b368c9dd
AP		 161static struct task_struct *cciss_scan_thread;
162static DEFINE_MUTEX(scan_mutex);
163static LIST_HEAD(scan_q);
164
165125e1 165static void do_cciss_request(struct request_queue *q);
0c2b3908
MM		 166static irqreturn_t do_cciss_intx(int irq, void *dev_id);
167static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
ef7822c2 168static int cciss_open(struct block_device *bdev, fmode_t mode);
6e9624b8 169static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
db2a144b 170static void cciss_release(struct gendisk *disk, fmode_t mode);
ef7822c2 171static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
7c832835 172 unsigned int cmd, unsigned long arg);
a885c8c4 173static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
1da177e4 174
1da177e4 175static int cciss_revalidate(struct gendisk *disk);
2d11d993 176static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
a0ea8622 177static int deregister_disk(ctlr_info_t *h, int drv_index,
2d11d993 178 int clear_all, int via_ioctl);
1da177e4 179
f70dba83 180static void cciss_read_capacity(ctlr_info_t *h, int logvol,
00988a35 181 sector_t *total_size, unsigned int *block_size);
f70dba83 182static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
00988a35 183 sector_t *total_size, unsigned int *block_size);
f70dba83 184static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
7b838bde 185 sector_t total_size,
00988a35 186 unsigned int block_size, InquiryData_struct *inq_buff,
7c832835 187 drive_info_struct *drv);
8d85fce7
GKH		 188static void cciss_interrupt_mode(ctlr_info_t *);
189static int cciss_enter_simple_mode(struct ctlr_info *h);
7c832835 190static void start_io(ctlr_info_t *h);
f70dba83 191static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
b57695fe 192 __u8 page_code, unsigned char scsi3addr[],
193 int cmd_type);
85cc61ae 194static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
195 int attempt_retry);
196static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
1da177e4 197
d6f4965d 198static int add_to_scan_list(struct ctlr_info *h);
0a9279cc
MM		 199static int scan_thread(void *data);
200static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
617e1344
SC		 201static void cciss_hba_release(struct device *dev);
202static void cciss_device_release(struct device *dev);
361e9b07 203static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
9cef0d2f 204static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
29979a71 205static inline u32 next_command(ctlr_info_t *h);
8d85fce7
GKH		 206static int cciss_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
207 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
208 u64 *cfg_offset);
209static int cciss_pci_find_memory_BAR(struct pci_dev *pdev,
210 unsigned long *memory_bar);
16011131 211static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag);
8d85fce7 212static int write_driver_ver_to_cfgtable(CfgTable_struct __iomem *cfgtable);
33079b21 213
5e216153
MM		 214/* performant mode helper functions */
215static void calc_bucket_map(int *bucket, int num_buckets, int nsgs,
216 int *bucket_map);
217static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
33079b21 218
1da177e4 219#ifdef CONFIG_PROC_FS
f70dba83 220static void cciss_procinit(ctlr_info_t *h);
1da177e4 221#else
f70dba83 222static void cciss_procinit(ctlr_info_t *h)
7c832835
BH		 223{
224}
225#endif /* CONFIG_PROC_FS */
1da177e4
LT		 226
227#ifdef CONFIG_COMPAT
ef7822c2
AV		 228static int cciss_compat_ioctl(struct block_device *, fmode_t,
229 unsigned, unsigned long);
1da177e4
LT		 230#endif
231
83d5cde4 232static const struct block_device_operations cciss_fops = {
7c832835 233 .owner = THIS_MODULE,
6e9624b8 234 .open = cciss_unlocked_open,
ef7822c2 235 .release = cciss_release,
03f47e88 236 .ioctl = cciss_ioctl,
7c832835 237 .getgeo = cciss_getgeo,
1da177e4 238#ifdef CONFIG_COMPAT
ef7822c2 239 .compat_ioctl = cciss_compat_ioctl,
1da177e4 240#endif
7c832835 241 .revalidate_disk = cciss_revalidate,
1da177e4
LT		 242};
243
5e216153
MM		 244/* set_performant_mode: Modify the tag for cciss performant
245 * set bit 0 for pull model, bits 3-1 for block fetch
246 * register number
247 */
248static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
249{
0498cc2a 250 if (likely(h->transMethod & CFGTBL_Trans_Performant))
5e216153
MM		 251 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
252}
253
1da177e4
LT		 254/*
255 * Enqueuing and dequeuing functions for cmdlists.
256 */
e6e1ee93 257static inline void addQ(struct list_head *list, CommandList_struct *c)
1da177e4 258{
e6e1ee93 259 list_add_tail(&c->list, list);
1da177e4
LT		 260}
261
8a3173de 262static inline void removeQ(CommandList_struct *c)
1da177e4 263{
b59e64d0
HR		 264 /*
265 * After kexec/dump some commands might still
266 * be in flight, which the firmware will try
267 * to complete. Resetting the firmware doesn't work
268 * with old fw revisions, so we have to mark
269 * them off as 'stale' to prevent the driver from
270 * falling over.
271 */
e6e1ee93 272 if (WARN_ON(list_empty(&c->list))) {
b59e64d0 273 c->cmd_type = CMD_MSG_STALE;
8a3173de 274 return;
b59e64d0 275 }
8a3173de 276
e6e1ee93 277 list_del_init(&c->list);
1da177e4
LT		 278}
279
664a717d
MM		 280static void enqueue_cmd_and_start_io(ctlr_info_t *h,
281 CommandList_struct *c)
282{
283 unsigned long flags;
5e216153 284 set_performant_mode(h, c);
664a717d
MM		 285 spin_lock_irqsave(&h->lock, flags);
286 addQ(&h->reqQ, c);
287 h->Qdepth++;
2a643ec6
SC		 288 if (h->Qdepth > h->maxQsinceinit)
289 h->maxQsinceinit = h->Qdepth;
664a717d
MM		 290 start_io(h);
291 spin_unlock_irqrestore(&h->lock, flags);
292}
293
dccc9b56 294static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
49fc5601
SC		 295 int nr_cmds)
296{
297 int i;
298
299 if (!cmd_sg_list)
300 return;
301 for (i = 0; i < nr_cmds; i++) {
dccc9b56
SC		 302 kfree(cmd_sg_list[i]);
303 cmd_sg_list[i] = NULL;
49fc5601
SC		 304 }
305 kfree(cmd_sg_list);
306}
307
dccc9b56
SC		 308static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
309 ctlr_info_t *h, int chainsize, int nr_cmds)
49fc5601
SC		 310{
311 int j;
dccc9b56 312 SGDescriptor_struct **cmd_sg_list;
49fc5601
SC		 313
314 if (chainsize <= 0)
315 return NULL;
316
317 cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
318 if (!cmd_sg_list)
319 return NULL;
320
321 /* Build up chain blocks for each command */
322 for (j = 0; j < nr_cmds; j++) {
49fc5601 323 /* Need a block of chainsized s/g elements. */
dccc9b56
SC		 324 cmd_sg_list[j] = kmalloc((chainsize *
325 sizeof(*cmd_sg_list[j])), GFP_KERNEL);
326 if (!cmd_sg_list[j]) {
49fc5601
SC		 327 dev_err(&h->pdev->dev, "Cannot get memory "
328 "for s/g chains.\n");
329 goto clean;
330 }
331 }
332 return cmd_sg_list;
333clean:
334 cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
335 return NULL;
336}
337
d45033ef
SC		 338static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
339{
340 SGDescriptor_struct *chain_sg;
341 u64bit temp64;
342
343 if (c->Header.SGTotal <= h->max_cmd_sgentries)
344 return;
345
346 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
347 temp64.val32.lower = chain_sg->Addr.lower;
348 temp64.val32.upper = chain_sg->Addr.upper;
349 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
350}
351
352static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
353 SGDescriptor_struct *chain_block, int len)
354{
355 SGDescriptor_struct *chain_sg;
356 u64bit temp64;
357
358 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
359 chain_sg->Ext = CCISS_SG_CHAIN;
360 chain_sg->Len = len;
361 temp64.val = pci_map_single(h->pdev, chain_block, len,
362 PCI_DMA_TODEVICE);
363 chain_sg->Addr.lower = temp64.val32.lower;
364 chain_sg->Addr.upper = temp64.val32.upper;
365}
366
1da177e4
LT		 367#include "cciss_scsi.c" /* For SCSI tape support */
368
1e6f2dc1
AB		 369static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
370 "UNKNOWN"
371};
0e4a9d03 372#define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
0f5486ec 373
1da177e4
LT		 374#ifdef CONFIG_PROC_FS
375
376/*
377 * Report information about this controller.
378 */
379#define ENG_GIG 1000000000
380#define ENG_GIG_FACTOR (ENG_GIG/512)
89b6e743 381#define ENGAGE_SCSI "engage scsi"
1da177e4 382
89b6e743 383static void cciss_seq_show_header(struct seq_file *seq)
1da177e4 384{
89b6e743
MM		 385 ctlr_info_t *h = seq->private;
386
387 seq_printf(seq, "%s: HP %s Controller\n"
388 "Board ID: 0x%08lx\n"
389 "Firmware Version: %c%c%c%c\n"
390 "IRQ: %d\n"
391 "Logical drives: %d\n"
392 "Current Q depth: %d\n"
393 "Current # commands on controller: %d\n"
394 "Max Q depth since init: %d\n"
395 "Max # commands on controller since init: %d\n"
396 "Max SG entries since init: %d\n",
397 h->devname,
398 h->product_name,
399 (unsigned long)h->board_id,
400 h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
13049537 401 h->firm_ver[3], (unsigned int)h->intr[h->intr_mode],
89b6e743
MM		 402 h->num_luns,
403 h->Qdepth, h->commands_outstanding,
404 h->maxQsinceinit, h->max_outstanding, h->maxSG);
405
406#ifdef CONFIG_CISS_SCSI_TAPE
f70dba83 407 cciss_seq_tape_report(seq, h);
89b6e743
MM		 408#endif /* CONFIG_CISS_SCSI_TAPE */
409}
1da177e4 410
89b6e743
MM		 411static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
412{
413 ctlr_info_t *h = seq->private;
89b6e743 414 unsigned long flags;
1da177e4
LT		 415
416 /* prevent displaying bogus info during configuration
417 * or deconfiguration of a logical volume
418 */
f70dba83 419 spin_lock_irqsave(&h->lock, flags);
1da177e4 420 if (h->busy_configuring) {
f70dba83 421 spin_unlock_irqrestore(&h->lock, flags);
89b6e743 422 return ERR_PTR(-EBUSY);
1da177e4
LT		 423 }
424 h->busy_configuring = 1;
f70dba83 425 spin_unlock_irqrestore(&h->lock, flags);
1da177e4 426
89b6e743
MM		 427 if (*pos == 0)
428 cciss_seq_show_header(seq);
429
430 return pos;
431}
432
433static int cciss_seq_show(struct seq_file *seq, void *v)
434{
435 sector_t vol_sz, vol_sz_frac;
436 ctlr_info_t *h = seq->private;
437 unsigned ctlr = h->ctlr;
438 loff_t *pos = v;
9cef0d2f 439 drive_info_struct *drv = h->drv[*pos];
89b6e743
MM		 440
441 if (*pos > h->highest_lun)
442 return 0;
443
531c2dc7
SC		 444 if (drv == NULL) /* it's possible for h->drv[] to have holes. */
445 return 0;
446
89b6e743
MM		 447 if (drv->heads == 0)
448 return 0;
449
450 vol_sz = drv->nr_blocks;
451 vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
452 vol_sz_frac *= 100;
453 sector_div(vol_sz_frac, ENG_GIG_FACTOR);
454
fa52bec9 455 if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
89b6e743
MM		 456 drv->raid_level = RAID_UNKNOWN;
457 seq_printf(seq, "cciss/c%dd%d:"
458 "\t%4u.%02uGB\tRAID %s\n",
459 ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
460 raid_label[drv->raid_level]);
461 return 0;
462}
463
464static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
465{
466 ctlr_info_t *h = seq->private;
467
468 if (*pos > h->highest_lun)
469 return NULL;
470 *pos += 1;
471
472 return pos;
473}
474
475static void cciss_seq_stop(struct seq_file *seq, void *v)
476{
477 ctlr_info_t *h = seq->private;
478
479 /* Only reset h->busy_configuring if we succeeded in setting
480 * it during cciss_seq_start. */
481 if (v == ERR_PTR(-EBUSY))
482 return;
7c832835 483
1da177e4 484 h->busy_configuring = 0;
1da177e4
LT		 485}
486
88e9d34c 487static const struct seq_operations cciss_seq_ops = {
89b6e743
MM		 488 .start = cciss_seq_start,
489 .show = cciss_seq_show,
490 .next = cciss_seq_next,
491 .stop = cciss_seq_stop,
492};
493
494static int cciss_seq_open(struct inode *inode, struct file *file)
495{
496 int ret = seq_open(file, &cciss_seq_ops);
497 struct seq_file *seq = file->private_data;
498
499 if (!ret)
d9dda78b 500 seq->private = PDE_DATA(inode);
89b6e743
MM		 501
502 return ret;
503}
504
505static ssize_t
506cciss_proc_write(struct file *file, const char __user *buf,
507 size_t length, loff_t *ppos)
1da177e4 508{
89b6e743
MM		 509 int err;
510 char *buffer;
511
512#ifndef CONFIG_CISS_SCSI_TAPE
513 return -EINVAL;
1da177e4
LT		 514#endif
515
89b6e743 516 if (!buf || length > PAGE_SIZE - 1)
7c832835 517 return -EINVAL;
89b6e743
MM		 518
519 buffer = (char *)__get_free_page(GFP_KERNEL);
520 if (!buffer)
521 return -ENOMEM;
522
523 err = -EFAULT;
524 if (copy_from_user(buffer, buf, length))
525 goto out;
526 buffer[length] = '\0';
527
528#ifdef CONFIG_CISS_SCSI_TAPE
529 if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
530 struct seq_file *seq = file->private_data;
531 ctlr_info_t *h = seq->private;
89b6e743 532
f70dba83 533 err = cciss_engage_scsi(h);
8721c81f 534 if (err == 0)
89b6e743
MM		 535 err = length;
536 } else
537#endif /* CONFIG_CISS_SCSI_TAPE */
538 err = -EINVAL;
7c832835
BH		 539 /* might be nice to have "disengage" too, but it's not
540 safely possible. (only 1 module use count, lock issues.) */
89b6e743
MM		 541
542out:
543 free_page((unsigned long)buffer);
544 return err;
1da177e4
LT		 545}
546
828c0950 547static const struct file_operations cciss_proc_fops = {
89b6e743
MM		 548 .owner = THIS_MODULE,
549 .open = cciss_seq_open,
550 .read = seq_read,
551 .llseek = seq_lseek,
552 .release = seq_release,
553 .write = cciss_proc_write,
554};
555
8d85fce7 556static void cciss_procinit(ctlr_info_t *h)
1da177e4
LT		 557{
558 struct proc_dir_entry *pde;
559
89b6e743 560 if (proc_cciss == NULL)
928b4d8c 561 proc_cciss = proc_mkdir("driver/cciss", NULL);
89b6e743
MM		 562 if (!proc_cciss)
563 return;
f70dba83 564 pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
89b6e743 565 S_IROTH, proc_cciss,
f70dba83 566 &cciss_proc_fops, h);
1da177e4 567}
7c832835 568#endif /* CONFIG_PROC_FS */
1da177e4 569
7fe06326
AP		 570#define MAX_PRODUCT_NAME_LEN 19
571
572#define to_hba(n) container_of(n, struct ctlr_info, dev)
573#define to_drv(n) container_of(n, drive_info_struct, dev)
574
ec52d5f1 575/* List of controllers which cannot be hard reset on kexec with reset_devices */
957c2ec5
SC		 576static u32 unresettable_controller[] = {
577 0x324a103C, /* Smart Array P712m */
578 0x324b103C, /* SmartArray P711m */
579 0x3223103C, /* Smart Array P800 */
580 0x3234103C, /* Smart Array P400 */
581 0x3235103C, /* Smart Array P400i */
582 0x3211103C, /* Smart Array E200i */
583 0x3212103C, /* Smart Array E200 */
584 0x3213103C, /* Smart Array E200i */
585 0x3214103C, /* Smart Array E200i */
586 0x3215103C, /* Smart Array E200i */
587 0x3237103C, /* Smart Array E500 */
588 0x323D103C, /* Smart Array P700m */
589 0x409C0E11, /* Smart Array 6400 */
590 0x409D0E11, /* Smart Array 6400 EM */
591};
592
ec52d5f1
SC		 593/* List of controllers which cannot even be soft reset */
594static u32 soft_unresettable_controller[] = {
595 0x409C0E11, /* Smart Array 6400 */
596 0x409D0E11, /* Smart Array 6400 EM */
597};
598
599static int ctlr_is_hard_resettable(u32 board_id)
957c2ec5
SC		 600{
601 int i;
602
603 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
ec52d5f1 604 if (unresettable_controller[i] == board_id)
957c2ec5
SC		 605 return 0;
606 return 1;
607}
608
ec52d5f1
SC		 609static int ctlr_is_soft_resettable(u32 board_id)
610{
611 int i;
612
613 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
614 if (soft_unresettable_controller[i] == board_id)
615 return 0;
616 return 1;
617}
618
619static int ctlr_is_resettable(u32 board_id)
620{
621 return ctlr_is_hard_resettable(board_id) ||
622 ctlr_is_soft_resettable(board_id);
623}
624
957c2ec5
SC		 625static ssize_t host_show_resettable(struct device *dev,
626 struct device_attribute *attr,
627 char *buf)
628{
629 struct ctlr_info *h = to_hba(dev);
630
ec52d5f1 631 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
957c2ec5
SC		 632}
633static DEVICE_ATTR(resettable, S_IRUGO, host_show_resettable, NULL);
634
d6f4965d
AP		 635static ssize_t host_store_rescan(struct device *dev,
636 struct device_attribute *attr,
637 const char *buf, size_t count)
638{
639 struct ctlr_info *h = to_hba(dev);
640
641 add_to_scan_list(h);
642 wake_up_process(cciss_scan_thread);
643 wait_for_completion_interruptible(&h->scan_wait);
644
645 return count;
646}
8ba95c69 647static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
7fe06326 648
f963d270
JH		 649static ssize_t host_show_transport_mode(struct device *dev,
650 struct device_attribute *attr,
651 char *buf)
652{
653 struct ctlr_info *h = to_hba(dev);
654
655 return snprintf(buf, 20, "%s\n",
656 h->transMethod & CFGTBL_Trans_Performant ?
657 "performant" : "simple");
658}
659static DEVICE_ATTR(transport_mode, S_IRUGO, host_show_transport_mode, NULL);
660
7fe06326
AP		 661static ssize_t dev_show_unique_id(struct device *dev,
662 struct device_attribute *attr,
663 char *buf)
664{
665 drive_info_struct *drv = to_drv(dev);
666 struct ctlr_info *h = to_hba(drv->dev.parent);
667 __u8 sn[16];
668 unsigned long flags;
669 int ret = 0;
670
f70dba83 671 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 672 if (h->busy_configuring)
673 ret = -EBUSY;
674 else
675 memcpy(sn, drv->serial_no, sizeof(sn));
f70dba83 676 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 677
678 if (ret)
679 return ret;
680 else
681 return snprintf(buf, 16 * 2 + 2,
682 "%02X%02X%02X%02X%02X%02X%02X%02X"
683 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
684 sn[0], sn[1], sn[2], sn[3],
685 sn[4], sn[5], sn[6], sn[7],
686 sn[8], sn[9], sn[10], sn[11],
687 sn[12], sn[13], sn[14], sn[15]);
688}
8ba95c69 689static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
7fe06326
AP		 690
691static ssize_t dev_show_vendor(struct device *dev,
692 struct device_attribute *attr,
693 char *buf)
694{
695 drive_info_struct *drv = to_drv(dev);
696 struct ctlr_info *h = to_hba(drv->dev.parent);
697 char vendor[VENDOR_LEN + 1];
698 unsigned long flags;
699 int ret = 0;
700
f70dba83 701 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 702 if (h->busy_configuring)
703 ret = -EBUSY;
704 else
705 memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
f70dba83 706 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 707
708 if (ret)
709 return ret;
710 else
711 return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
712}
8ba95c69 713static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
7fe06326
AP		 714
715static ssize_t dev_show_model(struct device *dev,
716 struct device_attribute *attr,
717 char *buf)
718{
719 drive_info_struct *drv = to_drv(dev);
720 struct ctlr_info *h = to_hba(drv->dev.parent);
721 char model[MODEL_LEN + 1];
722 unsigned long flags;
723 int ret = 0;
724
f70dba83 725 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 726 if (h->busy_configuring)
727 ret = -EBUSY;
728 else
729 memcpy(model, drv->model, MODEL_LEN + 1);
f70dba83 730 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 731
732 if (ret)
733 return ret;
734 else
735 return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
736}
8ba95c69 737static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
7fe06326
AP		 738
739static ssize_t dev_show_rev(struct device *dev,
740 struct device_attribute *attr,
741 char *buf)
742{
743 drive_info_struct *drv = to_drv(dev);
744 struct ctlr_info *h = to_hba(drv->dev.parent);
745 char rev[REV_LEN + 1];
746 unsigned long flags;
747 int ret = 0;
748
f70dba83 749 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 750 if (h->busy_configuring)
751 ret = -EBUSY;
752 else
753 memcpy(rev, drv->rev, REV_LEN + 1);
f70dba83 754 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 755
756 if (ret)
757 return ret;
758 else
759 return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
760}
8ba95c69 761static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
7fe06326 762
ce84a8ae
SC		 763static ssize_t cciss_show_lunid(struct device *dev,
764 struct device_attribute *attr, char *buf)
765{
9cef0d2f
SC		 766 drive_info_struct *drv = to_drv(dev);
767 struct ctlr_info *h = to_hba(drv->dev.parent);
ce84a8ae
SC		 768 unsigned long flags;
769 unsigned char lunid[8];
770
f70dba83 771 spin_lock_irqsave(&h->lock, flags);
ce84a8ae 772 if (h->busy_configuring) {
f70dba83 773 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 774 return -EBUSY;
775 }
776 if (!drv->heads) {
f70dba83 777 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 778 return -ENOTTY;
779 }
780 memcpy(lunid, drv->LunID, sizeof(lunid));
f70dba83 781 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 782 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
783 lunid[0], lunid[1], lunid[2], lunid[3],
784 lunid[4], lunid[5], lunid[6], lunid[7]);
785}
8ba95c69 786static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
ce84a8ae 787
3ff1111d
SC		 788static ssize_t cciss_show_raid_level(struct device *dev,
789 struct device_attribute *attr, char *buf)
790{
9cef0d2f
SC		 791 drive_info_struct *drv = to_drv(dev);
792 struct ctlr_info *h = to_hba(drv->dev.parent);
3ff1111d
SC		 793 int raid;
794 unsigned long flags;
795
f70dba83 796 spin_lock_irqsave(&h->lock, flags);
3ff1111d 797 if (h->busy_configuring) {
f70dba83 798 spin_unlock_irqrestore(&h->lock, flags);
3ff1111d
SC		 799 return -EBUSY;
800 }
801 raid = drv->raid_level;
f70dba83 802 spin_unlock_irqrestore(&h->lock, flags);
3ff1111d
SC		 803 if (raid < 0 || raid > RAID_UNKNOWN)
804 raid = RAID_UNKNOWN;
805
806 return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
807 raid_label[raid]);
808}
8ba95c69 809static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
3ff1111d 810
e272afec
SC		 811static ssize_t cciss_show_usage_count(struct device *dev,
812 struct device_attribute *attr, char *buf)
813{
9cef0d2f
SC		 814 drive_info_struct *drv = to_drv(dev);
815 struct ctlr_info *h = to_hba(drv->dev.parent);
e272afec
SC		 816 unsigned long flags;
817 int count;
818
f70dba83 819 spin_lock_irqsave(&h->lock, flags);
e272afec 820 if (h->busy_configuring) {
f70dba83 821 spin_unlock_irqrestore(&h->lock, flags);
e272afec
SC		 822 return -EBUSY;
823 }
824 count = drv->usage_count;
f70dba83 825 spin_unlock_irqrestore(&h->lock, flags);
e272afec
SC		 826 return snprintf(buf, 20, "%d\n", count);
827}
8ba95c69 828static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
e272afec 829
d6f4965d
AP		 830static struct attribute *cciss_host_attrs[] = {
831 &dev_attr_rescan.attr,
957c2ec5 832 &dev_attr_resettable.attr,
f963d270 833 &dev_attr_transport_mode.attr,
d6f4965d
AP		 834 NULL
835};
836
837static struct attribute_group cciss_host_attr_group = {
838 .attrs = cciss_host_attrs,
839};
840
9f792d9f 841static const struct attribute_group *cciss_host_attr_groups[] = {
d6f4965d
AP		 842 &cciss_host_attr_group,
843 NULL
844};
845
846static struct device_type cciss_host_type = {
847 .name = "cciss_host",
848 .groups = cciss_host_attr_groups,
617e1344 849 .release = cciss_hba_release,
d6f4965d
AP		 850};
851
7fe06326
AP		 852static struct attribute *cciss_dev_attrs[] = {
853 &dev_attr_unique_id.attr,
854 &dev_attr_model.attr,
855 &dev_attr_vendor.attr,
856 &dev_attr_rev.attr,
ce84a8ae 857 &dev_attr_lunid.attr,
3ff1111d 858 &dev_attr_raid_level.attr,
e272afec 859 &dev_attr_usage_count.attr,
7fe06326
AP		 860 NULL
861};
862
863static struct attribute_group cciss_dev_attr_group = {
864 .attrs = cciss_dev_attrs,
865};
866
a4dbd674 867static const struct attribute_group *cciss_dev_attr_groups[] = {
7fe06326
AP		 868 &cciss_dev_attr_group,
869 NULL
870};
871
872static struct device_type cciss_dev_type = {
873 .name = "cciss_device",
874 .groups = cciss_dev_attr_groups,
617e1344 875 .release = cciss_device_release,
7fe06326
AP		 876};
877
878static struct bus_type cciss_bus_type = {
879 .name = "cciss",
880};
881
617e1344
SC		 882/*
883 * cciss_hba_release is called when the reference count
884 * of h->dev goes to zero.
885 */
886static void cciss_hba_release(struct device *dev)
887{
888 /*
889 * nothing to do, but need this to avoid a warning
890 * about not having a release handler from lib/kref.c.
891 */
892}
7fe06326
AP		 893
894/*
895 * Initialize sysfs entry for each controller. This sets up and registers
896 * the 'cciss#' directory for each individual controller under
897 * /sys/bus/pci/devices/<dev>/.
898 */
899static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
900{
901 device_initialize(&h->dev);
902 h->dev.type = &cciss_host_type;
903 h->dev.bus = &cciss_bus_type;
904 dev_set_name(&h->dev, "%s", h->devname);
905 h->dev.parent = &h->pdev->dev;
906
907 return device_add(&h->dev);
908}
909
910/*
911 * Remove sysfs entries for an hba.
912 */
913static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
914{
915 device_del(&h->dev);
617e1344
SC		 916 put_device(&h->dev); /* final put. */
917}
918
919/* cciss_device_release is called when the reference count
9cef0d2f 920 * of h->drv[x]dev goes to zero.
617e1344
SC		 921 */
922static void cciss_device_release(struct device *dev)
923{
9cef0d2f
SC		 924 drive_info_struct *drv = to_drv(dev);
925 kfree(drv);
7fe06326
AP		 926}
927
928/*
929 * Initialize sysfs for each logical drive. This sets up and registers
930 * the 'c#d#' directory for each individual logical drive under
931 * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
932 * /sys/block/cciss!c#d# to this entry.
933 */
617e1344 934static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
7fe06326
AP		 935 int drv_index)
936{
617e1344
SC		 937 struct device *dev;
938
9cef0d2f 939 if (h->drv[drv_index]->device_initialized)
8ce51966
SC		 940 return 0;
941
9cef0d2f 942 dev = &h->drv[drv_index]->dev;
617e1344
SC		 943 device_initialize(dev);
944 dev->type = &cciss_dev_type;
945 dev->bus = &cciss_bus_type;
946 dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
947 dev->parent = &h->dev;
9cef0d2f 948 h->drv[drv_index]->device_initialized = 1;
617e1344 949 return device_add(dev);
7fe06326
AP		 950}
951
952/*
953 * Remove sysfs entries for a logical drive.
954 */
8ce51966
SC		 955static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
956 int ctlr_exiting)
7fe06326 957{
9cef0d2f 958 struct device *dev = &h->drv[drv_index]->dev;
8ce51966
SC		 959
960 /* special case for c*d0, we only destroy it on controller exit */
961 if (drv_index == 0 && !ctlr_exiting)
962 return;
963
617e1344
SC		 964 device_del(dev);
965 put_device(dev); /* the "final" put. */
9cef0d2f 966 h->drv[drv_index] = NULL;
7fe06326
AP		 967}
968
7c832835
BH		 969/*
970 * For operations that cannot sleep, a command block is allocated at init,
1da177e4 971 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6b4d96b8 972 * which ones are free or in use.
7c832835 973 */
6b4d96b8 974static CommandList_struct *cmd_alloc(ctlr_info_t *h)
1da177e4
LT		 975{
976 CommandList_struct *c;
7c832835 977 int i;
1da177e4
LT		 978 u64bit temp64;
979 dma_addr_t cmd_dma_handle, err_dma_handle;
980
6b4d96b8
SC		 981 do {
982 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
983 if (i == h->nr_cmds)
7c832835 984 return NULL;
1f118bc4 985 } while (test_and_set_bit(i, h->cmd_pool_bits) != 0);
6b4d96b8
SC		 986 c = h->cmd_pool + i;
987 memset(c, 0, sizeof(CommandList_struct));
988 cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
989 c->err_info = h->errinfo_pool + i;
990 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
991 err_dma_handle = h->errinfo_pool_dhandle
992 + i * sizeof(ErrorInfo_struct);
993 h->nr_allocs++;
1da177e4 994
6b4d96b8 995 c->cmdindex = i;
33079b21 996
e6e1ee93 997 INIT_LIST_HEAD(&c->list);
6b4d96b8
SC		 998 c->busaddr = (__u32) cmd_dma_handle;
999 temp64.val = (__u64) err_dma_handle;
1000 c->ErrDesc.Addr.lower = temp64.val32.lower;
1001 c->ErrDesc.Addr.upper = temp64.val32.upper;
1002 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
7c832835 1003
6b4d96b8
SC		 1004 c->ctlr = h->ctlr;
1005 return c;
1006}
33079b21 1007
6b4d96b8
SC		 1008/* allocate a command using pci_alloc_consistent, used for ioctls,
1009 * etc., not for the main i/o path.
1010 */
1011static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
1012{
1013 CommandList_struct *c;
1014 u64bit temp64;
1015 dma_addr_t cmd_dma_handle, err_dma_handle;
1016
1017 c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
1018 sizeof(CommandList_struct), &cmd_dma_handle);
1019 if (c == NULL)
1020 return NULL;
1021 memset(c, 0, sizeof(CommandList_struct));
1022
1023 c->cmdindex = -1;
1024
1025 c->err_info = (ErrorInfo_struct *)
1026 pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
1027 &err_dma_handle);
1028
1029 if (c->err_info == NULL) {
1030 pci_free_consistent(h->pdev,
1031 sizeof(CommandList_struct), c, cmd_dma_handle);
1032 return NULL;
7c832835 1033 }
6b4d96b8 1034 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
1da177e4 1035
e6e1ee93 1036 INIT_LIST_HEAD(&c->list);
1da177e4 1037 c->busaddr = (__u32) cmd_dma_handle;
7c832835 1038 temp64.val = (__u64) err_dma_handle;
1da177e4
LT		 1039 c->ErrDesc.Addr.lower = temp64.val32.lower;
1040 c->ErrDesc.Addr.upper = temp64.val32.upper;
1041 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
1da177e4 1042
7c832835
BH		 1043 c->ctlr = h->ctlr;
1044 return c;
1da177e4
LT		 1045}
1046
6b4d96b8 1047static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
1da177e4
LT		 1048{
1049 int i;
6b4d96b8
SC		 1050
1051 i = c - h->cmd_pool;
1f118bc4 1052 clear_bit(i, h->cmd_pool_bits);
6b4d96b8
SC		 1053 h->nr_frees++;
1054}
1055
1056static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
1057{
1da177e4
LT		 1058 u64bit temp64;
1059
6b4d96b8
SC		 1060 temp64.val32.lower = c->ErrDesc.Addr.lower;
1061 temp64.val32.upper = c->ErrDesc.Addr.upper;
1062 pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
1063 c->err_info, (dma_addr_t) temp64.val);
16011131
SC		 1064 pci_free_consistent(h->pdev, sizeof(CommandList_struct), c,
1065 (dma_addr_t) cciss_tag_discard_error_bits(h, (u32) c->busaddr));
1da177e4
LT		 1066}
1067
1068static inline ctlr_info_t *get_host(struct gendisk *disk)
1069{
7c832835 1070 return disk->queue->queuedata;
1da177e4
LT		 1071}
1072
1073static inline drive_info_struct *get_drv(struct gendisk *disk)
1074{
1075 return disk->private_data;
1076}
1077
1078/*
1079 * Open. Make sure the device is really there.
1080 */
ef7822c2 1081static int cciss_open(struct block_device *bdev, fmode_t mode)
1da177e4 1082{
f70dba83 1083 ctlr_info_t *h = get_host(bdev->bd_disk);
ef7822c2 1084 drive_info_struct *drv = get_drv(bdev->bd_disk);
1da177e4 1085
b2a4a43d 1086 dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
2e043986 1087 if (drv->busy_configuring)
ddd47442 1088 return -EBUSY;
1da177e4
LT		 1089 /*
1090 * Root is allowed to open raw volume zero even if it's not configured
1091 * so array config can still work. Root is also allowed to open any
1092 * volume that has a LUN ID, so it can issue IOCTL to reread the
1093 * disk information. I don't think I really like this
1094 * but I'm already using way to many device nodes to claim another one
1095 * for "raw controller".
1096 */
7a06f789 1097 if (drv->heads == 0) {
ef7822c2 1098 if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
1da177e4 1099 /* if not node 0 make sure it is a partition = 0 */
ef7822c2 1100 if (MINOR(bdev->bd_dev) & 0x0f) {
7c832835 1101 return -ENXIO;
1da177e4 1102 /* if it is, make sure we have a LUN ID */
39ccf9a6
SC		 1103 } else if (memcmp(drv->LunID, CTLR_LUNID,
1104 sizeof(drv->LunID))) {
1da177e4
LT		 1105 return -ENXIO;
1106 }
1107 }
1108 if (!capable(CAP_SYS_ADMIN))
1109 return -EPERM;
1110 }
1111 drv->usage_count++;
f70dba83 1112 h->usage_count++;
1da177e4
LT		 1113 return 0;
1114}
7c832835 1115
6e9624b8
AB		 1116static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
1117{
1118 int ret;
1119
2a48fc0a 1120 mutex_lock(&cciss_mutex);
6e9624b8 1121 ret = cciss_open(bdev, mode);
2a48fc0a 1122 mutex_unlock(&cciss_mutex);
6e9624b8
AB		 1123
1124 return ret;
1125}
1126
1da177e4
LT		 1127/*
1128 * Close. Sync first.
1129 */
db2a144b 1130static void cciss_release(struct gendisk *disk, fmode_t mode)
1da177e4 1131{
f70dba83 1132 ctlr_info_t *h;
6e9624b8 1133 drive_info_struct *drv;
1da177e4 1134
2a48fc0a 1135 mutex_lock(&cciss_mutex);
f70dba83 1136 h = get_host(disk);
6e9624b8 1137 drv = get_drv(disk);
b2a4a43d 1138 dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
1da177e4 1139 drv->usage_count--;
f70dba83 1140 h->usage_count--;
2a48fc0a 1141 mutex_unlock(&cciss_mutex);
1da177e4
LT		 1142}
1143
8a6cfeb6
AB		 1144#ifdef CONFIG_COMPAT
1145
ef7822c2
AV		 1146static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1147 unsigned cmd, unsigned long arg);
1148static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1149 unsigned cmd, unsigned long arg);
1da177e4 1150
ef7822c2
AV		 1151static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
1152 unsigned cmd, unsigned long arg)
1da177e4
LT		 1153{
1154 switch (cmd) {
1155 case CCISS_GETPCIINFO:
1156 case CCISS_GETINTINFO:
1157 case CCISS_SETINTINFO:
1158 case CCISS_GETNODENAME:
1159 case CCISS_SETNODENAME:
1160 case CCISS_GETHEARTBEAT:
1161 case CCISS_GETBUSTYPES:
1162 case CCISS_GETFIRMVER:
1163 case CCISS_GETDRIVVER:
1164 case CCISS_REVALIDVOLS:
1165 case CCISS_DEREGDISK:
1166 case CCISS_REGNEWDISK:
1167 case CCISS_REGNEWD:
1168 case CCISS_RESCANDISK:
1169 case CCISS_GETLUNINFO:
03f47e88 1170 return cciss_ioctl(bdev, mode, cmd, arg);
1da177e4
LT		 1171
1172 case CCISS_PASSTHRU32:
ef7822c2 1173 return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
1da177e4 1174 case CCISS_BIG_PASSTHRU32:
ef7822c2 1175 return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
1da177e4
LT		 1176
1177 default:
1178 return -ENOIOCTLCMD;
1179 }
1180}
1181
ef7822c2
AV		 1182static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1183 unsigned cmd, unsigned long arg)
1da177e4
LT		 1184{
1185 IOCTL32_Command_struct __user *arg32 =
7c832835 1186 (IOCTL32_Command_struct __user *) arg;
1da177e4
LT		 1187 IOCTL_Command_struct arg64;
1188 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
1189 int err;
1190 u32 cp;
1191
58f09e00 1192 memset(&arg64, 0, sizeof(arg64));
1da177e4 1193 err = 0;
7c832835
BH		 1194 err |=
1195 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1196 sizeof(arg64.LUN_info));
1197 err |=
1198 copy_from_user(&arg64.Request, &arg32->Request,
1199 sizeof(arg64.Request));
1200 err |=
1201 copy_from_user(&arg64.error_info, &arg32->error_info,
1202 sizeof(arg64.error_info));
1da177e4
LT		 1203 err |= get_user(arg64.buf_size, &arg32->buf_size);
1204 err |= get_user(cp, &arg32->buf);
1205 arg64.buf = compat_ptr(cp);
1206 err |= copy_to_user(p, &arg64, sizeof(arg64));
1207
1208 if (err)
1209 return -EFAULT;
1210
03f47e88 1211 err = cciss_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
1da177e4
LT		 1212 if (err)
1213 return err;
7c832835
BH		 1214 err |=
1215 copy_in_user(&arg32->error_info, &p->error_info,
1216 sizeof(arg32->error_info));
1da177e4
LT		 1217 if (err)
1218 return -EFAULT;
1219 return err;
1220}
1221
ef7822c2
AV		 1222static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1223 unsigned cmd, unsigned long arg)
1da177e4
LT		 1224{
1225 BIG_IOCTL32_Command_struct __user *arg32 =
7c832835 1226 (BIG_IOCTL32_Command_struct __user *) arg;
1da177e4 1227 BIG_IOCTL_Command_struct arg64;
7c832835
BH		 1228 BIG_IOCTL_Command_struct __user *p =
1229 compat_alloc_user_space(sizeof(arg64));
1da177e4
LT		 1230 int err;
1231 u32 cp;
1232
7ab5118d 1233 memset(&arg64, 0, sizeof(arg64));
1da177e4 1234 err = 0;
7c832835
BH		 1235 err |=
1236 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1237 sizeof(arg64.LUN_info));
1238 err |=
1239 copy_from_user(&arg64.Request, &arg32->Request,
1240 sizeof(arg64.Request));
1241 err |=
1242 copy_from_user(&arg64.error_info, &arg32->error_info,
1243 sizeof(arg64.error_info));
1da177e4
LT		 1244 err |= get_user(arg64.buf_size, &arg32->buf_size);
1245 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
1246 err |= get_user(cp, &arg32->buf);
1247 arg64.buf = compat_ptr(cp);
1248 err |= copy_to_user(p, &arg64, sizeof(arg64));
1249
1250 if (err)
7c832835 1251 return -EFAULT;
1da177e4 1252
03f47e88 1253 err = cciss_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
1da177e4
LT		 1254 if (err)
1255 return err;
7c832835
BH		 1256 err |=
1257 copy_in_user(&arg32->error_info, &p->error_info,
1258 sizeof(arg32->error_info));
1da177e4
LT		 1259 if (err)
1260 return -EFAULT;
1261 return err;
1262}
1263#endif
a885c8c4
CH		 1264
1265static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1266{
1267 drive_info_struct *drv = get_drv(bdev->bd_disk);
1268
1269 if (!drv->cylinders)
1270 return -ENXIO;
1271
1272 geo->heads = drv->heads;
1273 geo->sectors = drv->sectors;
1274 geo->cylinders = drv->cylinders;
1275 return 0;
1276}
1277
f70dba83 1278static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
0a9279cc
MM		 1279{
1280 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
1281 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
f70dba83 1282 (void)check_for_unit_attention(h, c);
0a9279cc 1283}
0a25a5ae
SC		 1284
1285static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp)
1da177e4 1286{
0a25a5ae 1287 cciss_pci_info_struct pciinfo;
1da177e4 1288
0a25a5ae
SC		 1289 if (!argp)
1290 return -EINVAL;
1291 pciinfo.domain = pci_domain_nr(h->pdev->bus);
1292 pciinfo.bus = h->pdev->bus->number;
1293 pciinfo.dev_fn = h->pdev->devfn;
1294 pciinfo.board_id = h->board_id;
1295 if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct)))
1296 return -EFAULT;
1297 return 0;
1298}
1da177e4 1299
576e661c
SC		 1300static int cciss_getintinfo(ctlr_info_t *h, void __user *argp)
1301{
1302 cciss_coalint_struct intinfo;
03f47e88 1303 unsigned long flags;
1da177e4 1304
576e661c
SC		 1305 if (!argp)
1306 return -EINVAL;
03f47e88 1307 spin_lock_irqsave(&h->lock, flags);
576e661c
SC		 1308 intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay);
1309 intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount);
03f47e88 1310 spin_unlock_irqrestore(&h->lock, flags);
576e661c
SC		 1311 if (copy_to_user
1312 (argp, &intinfo, sizeof(cciss_coalint_struct)))
1313 return -EFAULT;
1314 return 0;
1315}
1da177e4 1316
4c800eed
SC		 1317static int cciss_setintinfo(ctlr_info_t *h, void __user *argp)
1318{
1319 cciss_coalint_struct intinfo;
1320 unsigned long flags;
1321 int i;
1da177e4 1322
4c800eed
SC		 1323 if (!argp)
1324 return -EINVAL;
1325 if (!capable(CAP_SYS_ADMIN))
1326 return -EPERM;
1327 if (copy_from_user(&intinfo, argp, sizeof(intinfo)))
1328 return -EFAULT;
1329 if ((intinfo.delay == 0) && (intinfo.count == 0))
1330 return -EINVAL;
1331 spin_lock_irqsave(&h->lock, flags);
1332 /* Update the field, and then ring the doorbell */
1333 writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay));
1334 writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount));
1335 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1336
1337 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1338 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1339 break;
1340 udelay(1000); /* delay and try again */
1341 }
1342 spin_unlock_irqrestore(&h->lock, flags);
1343 if (i >= MAX_IOCTL_CONFIG_WAIT)
1344 return -EAGAIN;
1345 return 0;
1346}
1da177e4 1347
25216109
SC		 1348static int cciss_getnodename(ctlr_info_t *h, void __user *argp)
1349{
1350 NodeName_type NodeName;
03f47e88 1351 unsigned long flags;
25216109 1352 int i;
1da177e4 1353
25216109
SC		 1354 if (!argp)
1355 return -EINVAL;
03f47e88 1356 spin_lock_irqsave(&h->lock, flags);
25216109
SC		 1357 for (i = 0; i < 16; i++)
1358 NodeName[i] = readb(&h->cfgtable->ServerName[i]);
03f47e88 1359 spin_unlock_irqrestore(&h->lock, flags);
25216109
SC		 1360 if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
1361 return -EFAULT;
1362 return 0;
1363}
7c832835 1364
4f43f32c
SC		 1365static int cciss_setnodename(ctlr_info_t *h, void __user *argp)
1366{
1367 NodeName_type NodeName;
1368 unsigned long flags;
1369 int i;
7c832835 1370
4f43f32c
SC		 1371 if (!argp)
1372 return -EINVAL;
1373 if (!capable(CAP_SYS_ADMIN))
1374 return -EPERM;
1375 if (copy_from_user(NodeName, argp, sizeof(NodeName_type)))
1376 return -EFAULT;
1377 spin_lock_irqsave(&h->lock, flags);
1378 /* Update the field, and then ring the doorbell */
1379 for (i = 0; i < 16; i++)
1380 writeb(NodeName[i], &h->cfgtable->ServerName[i]);
1381 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1382 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1383 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1384 break;
1385 udelay(1000); /* delay and try again */
1386 }
1387 spin_unlock_irqrestore(&h->lock, flags);
1388 if (i >= MAX_IOCTL_CONFIG_WAIT)
1389 return -EAGAIN;
1390 return 0;
1391}
7c832835 1392
93c74931
SC		 1393static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp)
1394{
1395 Heartbeat_type heartbeat;
03f47e88 1396 unsigned long flags;
7c832835 1397
93c74931
SC		 1398 if (!argp)
1399 return -EINVAL;
03f47e88 1400 spin_lock_irqsave(&h->lock, flags);
93c74931 1401 heartbeat = readl(&h->cfgtable->HeartBeat);
03f47e88 1402 spin_unlock_irqrestore(&h->lock, flags);
93c74931
SC		 1403 if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type)))
1404 return -EFAULT;
1405 return 0;
1406}
0a9279cc 1407
d18dfad4
SC		 1408static int cciss_getbustypes(ctlr_info_t *h, void __user *argp)
1409{
1410 BusTypes_type BusTypes;
03f47e88 1411 unsigned long flags;
7c832835 1412
d18dfad4
SC		 1413 if (!argp)
1414 return -EINVAL;
03f47e88 1415 spin_lock_irqsave(&h->lock, flags);
d18dfad4 1416 BusTypes = readl(&h->cfgtable->BusTypes);
03f47e88 1417 spin_unlock_irqrestore(&h->lock, flags);
d18dfad4
SC		 1418 if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type)))
1419 return -EFAULT;
1420 return 0;
1421}
1422
8a4f7fbf
SC		 1423static int cciss_getfirmver(ctlr_info_t *h, void __user *argp)
1424{
1425 FirmwareVer_type firmware;
1426
1427 if (!argp)
1428 return -EINVAL;
1429 memcpy(firmware, h->firm_ver, 4);
1430
1431 if (copy_to_user
1432 (argp, firmware, sizeof(FirmwareVer_type)))
1433 return -EFAULT;
1434 return 0;
1435}
1436
c525919d
SC		 1437static int cciss_getdrivver(ctlr_info_t *h, void __user *argp)
1438{
1439 DriverVer_type DriverVer = DRIVER_VERSION;
1440
1441 if (!argp)
1442 return -EINVAL;
1443 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
1444 return -EFAULT;
1445 return 0;
1446}
1447
0894b32c
SC		 1448static int cciss_getluninfo(ctlr_info_t *h,
1449 struct gendisk *disk, void __user *argp)
1450{
1451 LogvolInfo_struct luninfo;
1452 drive_info_struct *drv = get_drv(disk);
1453
1454 if (!argp)
1455 return -EINVAL;
1456 memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID));
1457 luninfo.num_opens = drv->usage_count;
1458 luninfo.num_parts = 0;
1459 if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct)))
1460 return -EFAULT;
1461 return 0;
1462}
1463
f32f125b
SC		 1464static int cciss_passthru(ctlr_info_t *h, void __user *argp)
1465{
1466 IOCTL_Command_struct iocommand;
1467 CommandList_struct *c;
1468 char *buff = NULL;
1469 u64bit temp64;
1470 DECLARE_COMPLETION_ONSTACK(wait);
1471
1472 if (!argp)
1473 return -EINVAL;
1474
1475 if (!capable(CAP_SYS_RAWIO))
1476 return -EPERM;
1477
1478 if (copy_from_user
1479 (&iocommand, argp, sizeof(IOCTL_Command_struct)))
1480 return -EFAULT;
1481 if ((iocommand.buf_size < 1) &&
1482 (iocommand.Request.Type.Direction != XFER_NONE)) {
1483 return -EINVAL;
1484 }
1485 if (iocommand.buf_size > 0) {
1486 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
1487 if (buff == NULL)
1488 return -EFAULT;
1489 }
1490 if (iocommand.Request.Type.Direction == XFER_WRITE) {
1491 /* Copy the data into the buffer we created */
1492 if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
1493 kfree(buff);
1494 return -EFAULT;
1495 }
1496 } else {
1497 memset(buff, 0, iocommand.buf_size);
1498 }
1499 c = cmd_special_alloc(h);
1500 if (!c) {
1501 kfree(buff);
1502 return -ENOMEM;
1503 }
1504 /* Fill in the command type */
1505 c->cmd_type = CMD_IOCTL_PEND;
1506 /* Fill in Command Header */
1507 c->Header.ReplyQueue = 0; /* unused in simple mode */
1508 if (iocommand.buf_size > 0) { /* buffer to fill */
1509 c->Header.SGList = 1;
1510 c->Header.SGTotal = 1;
1511 } else { /* no buffers to fill */
1512 c->Header.SGList = 0;
1513 c->Header.SGTotal = 0;
1514 }
1515 c->Header.LUN = iocommand.LUN_info;
1516 /* use the kernel address the cmd block for tag */
1517 c->Header.Tag.lower = c->busaddr;
1518
1519 /* Fill in Request block */
1520 c->Request = iocommand.Request;
1521
1522 /* Fill in the scatter gather information */
1523 if (iocommand.buf_size > 0) {
1524 temp64.val = pci_map_single(h->pdev, buff,
1525 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
1526 c->SG[0].Addr.lower = temp64.val32.lower;
1527 c->SG[0].Addr.upper = temp64.val32.upper;
1528 c->SG[0].Len = iocommand.buf_size;
1529 c->SG[0].Ext = 0; /* we are not chaining */
1530 }
1531 c->waiting = &wait;
1532
1533 enqueue_cmd_and_start_io(h, c);
1534 wait_for_completion(&wait);
1535
1536 /* unlock the buffers from DMA */
1537 temp64.val32.lower = c->SG[0].Addr.lower;
1538 temp64.val32.upper = c->SG[0].Addr.upper;
1539 pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size,
1540 PCI_DMA_BIDIRECTIONAL);
1541 check_ioctl_unit_attention(h, c);
1542
1543 /* Copy the error information out */
1544 iocommand.error_info = *(c->err_info);
1545 if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) {
1546 kfree(buff);
1547 cmd_special_free(h, c);
1548 return -EFAULT;
1549 }
1550
1551 if (iocommand.Request.Type.Direction == XFER_READ) {
1552 /* Copy the data out of the buffer we created */
1553 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
7c832835 1554 kfree(buff);
6b4d96b8 1555 cmd_special_free(h, c);
f32f125b 1556 return -EFAULT;
1da177e4 1557 }
f32f125b
SC		 1558 }
1559 kfree(buff);
1560 cmd_special_free(h, c);
1561 return 0;
1562}
1563
0c9f5ba7
SC		 1564static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp)
1565{
1566 BIG_IOCTL_Command_struct *ioc;
1567 CommandList_struct *c;
1568 unsigned char **buff = NULL;
1569 int *buff_size = NULL;
1570 u64bit temp64;
1571 BYTE sg_used = 0;
1572 int status = 0;
1573 int i;
1574 DECLARE_COMPLETION_ONSTACK(wait);
1575 __u32 left;
1576 __u32 sz;
1577 BYTE __user *data_ptr;
1578
1579 if (!argp)
1580 return -EINVAL;
1581 if (!capable(CAP_SYS_RAWIO))
1582 return -EPERM;
fcab1c11 1583 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
0c9f5ba7
SC		 1584 if (!ioc) {
1585 status = -ENOMEM;
1586 goto cleanup1;
1587 }
1588 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
1589 status = -EFAULT;
1590 goto cleanup1;
1591 }
1592 if ((ioc->buf_size < 1) &&
1593 (ioc->Request.Type.Direction != XFER_NONE)) {
1594 status = -EINVAL;
1595 goto cleanup1;
1596 }
1597 /* Check kmalloc limits using all SGs */
1598 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
1599 status = -EINVAL;
1600 goto cleanup1;
1601 }
1602 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
1603 status = -EINVAL;
1604 goto cleanup1;
1605 }
1606 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
1607 if (!buff) {
1608 status = -ENOMEM;
1609 goto cleanup1;
1610 }
1611 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
1612 if (!buff_size) {
1613 status = -ENOMEM;
1614 goto cleanup1;
1615 }
1616 left = ioc->buf_size;
1617 data_ptr = ioc->buf;
1618 while (left) {
1619 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
1620 buff_size[sg_used] = sz;
1621 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
1622 if (buff[sg_used] == NULL) {
1623 status = -ENOMEM;
1624 goto cleanup1;
1625 }
1626 if (ioc->Request.Type.Direction == XFER_WRITE) {
1627 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
7c832835
BH		 1628 status = -EFAULT;
1629 goto cleanup1;
1630 }
0c9f5ba7
SC		 1631 } else {
1632 memset(buff[sg_used], 0, sz);
1633 }
1634 left -= sz;
1635 data_ptr += sz;
1636 sg_used++;
1637 }
1638 c = cmd_special_alloc(h);
1639 if (!c) {
1640 status = -ENOMEM;
1641 goto cleanup1;
1642 }
1643 c->cmd_type = CMD_IOCTL_PEND;
1644 c->Header.ReplyQueue = 0;
fcfb5c0c
SC		 1645 c->Header.SGList = sg_used;
1646 c->Header.SGTotal = sg_used;
0c9f5ba7
SC		 1647 c->Header.LUN = ioc->LUN_info;
1648 c->Header.Tag.lower = c->busaddr;
1649
1650 c->Request = ioc->Request;
fcfb5c0c
SC		 1651 for (i = 0; i < sg_used; i++) {
1652 temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i],
0c9f5ba7 1653 PCI_DMA_BIDIRECTIONAL);
fcfb5c0c
SC		 1654 c->SG[i].Addr.lower = temp64.val32.lower;
1655 c->SG[i].Addr.upper = temp64.val32.upper;
1656 c->SG[i].Len = buff_size[i];
1657 c->SG[i].Ext = 0; /* we are not chaining */
0c9f5ba7
SC		 1658 }
1659 c->waiting = &wait;
1660 enqueue_cmd_and_start_io(h, c);
1661 wait_for_completion(&wait);
1662 /* unlock the buffers from DMA */
1663 for (i = 0; i < sg_used; i++) {
1664 temp64.val32.lower = c->SG[i].Addr.lower;
1665 temp64.val32.upper = c->SG[i].Addr.upper;
1666 pci_unmap_single(h->pdev,
1667 (dma_addr_t) temp64.val, buff_size[i],
1668 PCI_DMA_BIDIRECTIONAL);
1669 }
1670 check_ioctl_unit_attention(h, c);
1671 /* Copy the error information out */
1672 ioc->error_info = *(c->err_info);
1673 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
1674 cmd_special_free(h, c);
1675 status = -EFAULT;
1676 goto cleanup1;
1677 }
1678 if (ioc->Request.Type.Direction == XFER_READ) {
1679 /* Copy the data out of the buffer we created */
1680 BYTE __user *ptr = ioc->buf;
1681 for (i = 0; i < sg_used; i++) {
1682 if (copy_to_user(ptr, buff[i], buff_size[i])) {
6b4d96b8 1683 cmd_special_free(h, c);
7c832835
BH		 1684 status = -EFAULT;
1685 goto cleanup1;
1686 }
0c9f5ba7 1687 ptr += buff_size[i];
1da177e4 1688 }
0c9f5ba7
SC		 1689 }
1690 cmd_special_free(h, c);
1691 status = 0;
1692cleanup1:
1693 if (buff) {
1694 for (i = 0; i < sg_used; i++)
1695 kfree(buff[i]);
1696 kfree(buff);
1697 }
1698 kfree(buff_size);
1699 kfree(ioc);
1700 return status;
1701}
1702
ef7822c2 1703static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
c525919d 1704 unsigned int cmd, unsigned long arg)
1da177e4 1705{
1da177e4 1706 struct gendisk *disk = bdev->bd_disk;
f70dba83 1707 ctlr_info_t *h = get_host(disk);
1da177e4
LT		 1708 void __user *argp = (void __user *)arg;
1709
b2a4a43d
SC		 1710 dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
1711 cmd, arg);
7c832835 1712 switch (cmd) {
1da177e4 1713 case CCISS_GETPCIINFO:
0a25a5ae 1714 return cciss_getpciinfo(h, argp);
1da177e4 1715 case CCISS_GETINTINFO:
576e661c 1716 return cciss_getintinfo(h, argp);
1da177e4 1717 case CCISS_SETINTINFO:
4c800eed 1718 return cciss_setintinfo(h, argp);
1da177e4 1719 case CCISS_GETNODENAME:
25216109 1720 return cciss_getnodename(h, argp);
1da177e4 1721 case CCISS_SETNODENAME:
4f43f32c 1722 return cciss_setnodename(h, argp);
1da177e4 1723 case CCISS_GETHEARTBEAT:
93c74931 1724 return cciss_getheartbeat(h, argp);
1da177e4 1725 case CCISS_GETBUSTYPES:
d18dfad4 1726 return cciss_getbustypes(h, argp);
1da177e4 1727 case CCISS_GETFIRMVER:
8a4f7fbf 1728 return cciss_getfirmver(h, argp);
7c832835 1729 case CCISS_GETDRIVVER:
c525919d 1730 return cciss_getdrivver(h, argp);
6ae5ce8e
MM		 1731 case CCISS_DEREGDISK:
1732 case CCISS_REGNEWD:
1da177e4 1733 case CCISS_REVALIDVOLS:
f70dba83 1734 return rebuild_lun_table(h, 0, 1);
0894b32c
SC		 1735 case CCISS_GETLUNINFO:
1736 return cciss_getluninfo(h, disk, argp);
1da177e4 1737 case CCISS_PASSTHRU:
f32f125b 1738 return cciss_passthru(h, argp);
0c9f5ba7
SC		 1739 case CCISS_BIG_PASSTHRU:
1740 return cciss_bigpassthru(h, argp);
03bbfee5 1741
577ebb37 1742 /* scsi_cmd_blk_ioctl handles these, below, though some are not */
03bbfee5
MMOD		 1743 /* very meaningful for cciss. SG_IO is the main one people want. */
1744
1745 case SG_GET_VERSION_NUM:
1746 case SG_SET_TIMEOUT:
1747 case SG_GET_TIMEOUT:
1748 case SG_GET_RESERVED_SIZE:
1749 case SG_SET_RESERVED_SIZE:
1750 case SG_EMULATED_HOST:
1751 case SG_IO:
1752 case SCSI_IOCTL_SEND_COMMAND:
577ebb37 1753 return scsi_cmd_blk_ioctl(bdev, mode, cmd, argp);
03bbfee5 1754
577ebb37 1755 /* scsi_cmd_blk_ioctl would normally handle these, below, but */
03bbfee5
MMOD		 1756 /* they aren't a good fit for cciss, as CD-ROMs are */
1757 /* not supported, and we don't have any bus/target/lun */
1758 /* which we present to the kernel. */
1759
1760 case CDROM_SEND_PACKET:
1761 case CDROMCLOSETRAY:
1762 case CDROMEJECT:
1763 case SCSI_IOCTL_GET_IDLUN:
1764 case SCSI_IOCTL_GET_BUS_NUMBER:
1da177e4
LT		 1765 default:
1766 return -ENOTTY;
1767 }
1da177e4
LT		 1768}
1769
7b30f092
JA		 1770static void cciss_check_queues(ctlr_info_t *h)
1771{
1772 int start_queue = h->next_to_run;
1773 int i;
1774
1775 /* check to see if we have maxed out the number of commands that can
1776 * be placed on the queue. If so then exit. We do this check here
1777 * in case the interrupt we serviced was from an ioctl and did not
1778 * free any new commands.
1779 */
f880632f 1780 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
7b30f092
JA		 1781 return;
1782
1783 /* We have room on the queue for more commands. Now we need to queue
1784 * them up. We will also keep track of the next queue to run so
1785 * that every queue gets a chance to be started first.
1786 */
1787 for (i = 0; i < h->highest_lun + 1; i++) {
1788 int curr_queue = (start_queue + i) % (h->highest_lun + 1);
1789 /* make sure the disk has been added and the drive is real
1790 * because this can be called from the middle of init_one.
1791 */
9cef0d2f
SC		 1792 if (!h->drv[curr_queue])
1793 continue;
1794 if (!(h->drv[curr_queue]->queue) ||
1795 !(h->drv[curr_queue]->heads))
7b30f092
JA		 1796 continue;
1797 blk_start_queue(h->gendisk[curr_queue]->queue);
1798
1799 /* check to see if we have maxed out the number of commands
1800 * that can be placed on the queue.
1801 */
f880632f 1802 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
7b30f092
JA		 1803 if (curr_queue == start_queue) {
1804 h->next_to_run =
1805 (start_queue + 1) % (h->highest_lun + 1);
1806 break;
1807 } else {
1808 h->next_to_run = curr_queue;
1809 break;
1810 }
7b30f092
JA		 1811 }
1812 }
1813}
1814
ca1e0484
MM		 1815static void cciss_softirq_done(struct request *rq)
1816{
f70dba83
SC		 1817 CommandList_struct *c = rq->completion_data;
1818 ctlr_info_t *h = hba[c->ctlr];
1819 SGDescriptor_struct *curr_sg = c->SG;
ca1e0484 1820 u64bit temp64;
664a717d 1821 unsigned long flags;
ca1e0484 1822 int i, ddir;
5c07a311 1823 int sg_index = 0;
ca1e0484 1824
f70dba83 1825 if (c->Request.Type.Direction == XFER_READ)
ca1e0484
MM		 1826 ddir = PCI_DMA_FROMDEVICE;
1827 else
1828 ddir = PCI_DMA_TODEVICE;
1829
1830 /* command did not need to be retried */
1831 /* unmap the DMA mapping for all the scatter gather elements */
f70dba83 1832 for (i = 0; i < c->Header.SGList; i++) {
5c07a311 1833 if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
f70dba83 1834 cciss_unmap_sg_chain_block(h, c);
5c07a311 1835 /* Point to the next block */
f70dba83 1836 curr_sg = h->cmd_sg_list[c->cmdindex];
5c07a311
DB		 1837 sg_index = 0;
1838 }
1839 temp64.val32.lower = curr_sg[sg_index].Addr.lower;
1840 temp64.val32.upper = curr_sg[sg_index].Addr.upper;
1841 pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
1842 ddir);
1843 ++sg_index;
ca1e0484
MM		 1844 }
1845
b2a4a43d 1846 dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
ca1e0484 1847
c3a4d78c 1848 /* set the residual count for pc requests */
33659ebb 1849 if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
f70dba83 1850 rq->resid_len = c->err_info->ResidualCnt;
ac44e5b2 1851
c3a4d78c 1852 blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
3daeea29 1853
ca1e0484 1854 spin_lock_irqsave(&h->lock, flags);
6b4d96b8 1855 cmd_free(h, c);
7b30f092 1856 cciss_check_queues(h);
ca1e0484
MM		 1857 spin_unlock_irqrestore(&h->lock, flags);
1858}
1859
39ccf9a6
SC		 1860static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
1861 unsigned char scsi3addr[], uint32_t log_unit)
b57695fe 1862{
9cef0d2f
SC		 1863 memcpy(scsi3addr, h->drv[log_unit]->LunID,
1864 sizeof(h->drv[log_unit]->LunID));
b57695fe 1865}
1866
7fe06326
AP		 1867/* This function gets the SCSI vendor, model, and revision of a logical drive
1868 * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
1869 * they cannot be read.
1870 */
f70dba83 1871static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
7fe06326
AP		 1872 char *vendor, char *model, char *rev)
1873{
1874 int rc;
1875 InquiryData_struct *inq_buf;
b57695fe 1876 unsigned char scsi3addr[8];
7fe06326
AP		 1877
1878 *vendor = '\0';
1879 *model = '\0';
1880 *rev = '\0';
1881
1882 inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1883 if (!inq_buf)
1884 return;
1885
f70dba83
SC		 1886 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1887 rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
7b838bde 1888 scsi3addr, TYPE_CMD);
7fe06326
AP		 1889 if (rc == IO_OK) {
1890 memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
1891 vendor[VENDOR_LEN] = '\0';
1892 memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
1893 model[MODEL_LEN] = '\0';
1894 memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
1895 rev[REV_LEN] = '\0';
1896 }
1897
1898 kfree(inq_buf);
1899 return;
1900}
1901
a72da29b
MM		 1902/* This function gets the serial number of a logical drive via
1903 * inquiry page 0x83. Serial no. is 16 bytes. If the serial
1904 * number cannot be had, for whatever reason, 16 bytes of 0xff
1905 * are returned instead.
1906 */
f70dba83 1907static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
a72da29b
MM		 1908 unsigned char *serial_no, int buflen)
1909{
1910#define PAGE_83_INQ_BYTES 64
1911 int rc;
1912 unsigned char *buf;
b57695fe 1913 unsigned char scsi3addr[8];
a72da29b
MM		 1914
1915 if (buflen > 16)
1916 buflen = 16;
1917 memset(serial_no, 0xff, buflen);
1918 buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
1919 if (!buf)
1920 return;
1921 memset(serial_no, 0, buflen);
f70dba83
SC		 1922 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1923 rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
7b838bde 1924 PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
a72da29b
MM		 1925 if (rc == IO_OK)
1926 memcpy(serial_no, &buf[8], buflen);
1927 kfree(buf);
1928 return;
1929}
1930
617e1344
SC		 1931/*
1932 * cciss_add_disk sets up the block device queue for a logical drive
1933 */
1934static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
6ae5ce8e
MM		 1935 int drv_index)
1936{
1937 disk->queue = blk_init_queue(do_cciss_request, &h->lock);
e8074f79
SC		 1938 if (!disk->queue)
1939 goto init_queue_failure;
6ae5ce8e
MM		 1940 sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
1941 disk->major = h->major;
1942 disk->first_minor = drv_index << NWD_SHIFT;
1943 disk->fops = &cciss_fops;
9cef0d2f
SC		 1944 if (cciss_create_ld_sysfs_entry(h, drv_index))
1945 goto cleanup_queue;
1946 disk->private_data = h->drv[drv_index];
1947 disk->driverfs_dev = &h->drv[drv_index]->dev;
6ae5ce8e
MM		 1948
1949 /* Set up queue information */
1950 blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
1951
1952 /* This is a hardware imposed limit. */
8a78362c 1953 blk_queue_max_segments(disk->queue, h->maxsgentries);
6ae5ce8e 1954
086fa5ff 1955 blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
6ae5ce8e
MM		 1956
1957 blk_queue_softirq_done(disk->queue, cciss_softirq_done);
1958
1959 disk->queue->queuedata = h;
1960
e1defc4f 1961 blk_queue_logical_block_size(disk->queue,
9cef0d2f 1962 h->drv[drv_index]->block_size);
6ae5ce8e
MM		 1963
1964 /* Make sure all queue data is written out before */
9cef0d2f 1965 /* setting h->drv[drv_index]->queue, as setting this */
6ae5ce8e
MM		 1966 /* allows the interrupt handler to start the queue */
1967 wmb();
9cef0d2f 1968 h->drv[drv_index]->queue = disk->queue;
6ae5ce8e 1969 add_disk(disk);
617e1344
SC		 1970 return 0;
1971
1972cleanup_queue:
1973 blk_cleanup_queue(disk->queue);
1974 disk->queue = NULL;
e8074f79 1975init_queue_failure:
617e1344 1976 return -1;
6ae5ce8e
MM		 1977}
1978
ddd47442 1979/* This function will check the usage_count of the drive to be updated/added.
a72da29b
MM		 1980 * If the usage_count is zero and it is a heretofore unknown drive, or,
1981 * the drive's capacity, geometry, or serial number has changed,
1982 * then the drive information will be updated and the disk will be
1983 * re-registered with the kernel. If these conditions don't hold,
1984 * then it will be left alone for the next reboot. The exception to this
1985 * is disk 0 which will always be left registered with the kernel since it
1986 * is also the controller node. Any changes to disk 0 will show up on
1987 * the next reboot.
7c832835 1988 */
f70dba83
SC		 1989static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
1990 int first_time, int via_ioctl)
7c832835 1991{
ddd47442 1992 struct gendisk *disk;
ddd47442
MM		 1993 InquiryData_struct *inq_buff = NULL;
1994 unsigned int block_size;
00988a35 1995 sector_t total_size;
ddd47442
MM		 1996 unsigned long flags = 0;
1997 int ret = 0;
a72da29b
MM		 1998 drive_info_struct *drvinfo;
1999
2000 /* Get information about the disk and modify the driver structure */
2001 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
9cef0d2f 2002 drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
a72da29b
MM		 2003 if (inq_buff == NULL || drvinfo == NULL)
2004 goto mem_msg;
2005
2006 /* testing to see if 16-byte CDBs are already being used */
2007 if (h->cciss_read == CCISS_READ_16) {
f70dba83 2008 cciss_read_capacity_16(h, drv_index,
a72da29b
MM		 2009 &total_size, &block_size);
2010
2011 } else {
f70dba83 2012 cciss_read_capacity(h, drv_index, &total_size, &block_size);
a72da29b
MM		 2013 /* if read_capacity returns all F's this volume is >2TB */
2014 /* in size so we switch to 16-byte CDB's for all */
2015 /* read/write ops */
2016 if (total_size == 0xFFFFFFFFULL) {
f70dba83 2017 cciss_read_capacity_16(h, drv_index,
a72da29b
MM		 2018 &total_size, &block_size);
2019 h->cciss_read = CCISS_READ_16;
2020 h->cciss_write = CCISS_WRITE_16;
2021 } else {
2022 h->cciss_read = CCISS_READ_10;
2023 h->cciss_write = CCISS_WRITE_10;
2024 }
2025 }
2026
f70dba83 2027 cciss_geometry_inquiry(h, drv_index, total_size, block_size,
a72da29b
MM		 2028 inq_buff, drvinfo);
2029 drvinfo->block_size = block_size;
2030 drvinfo->nr_blocks = total_size + 1;
2031
f70dba83 2032 cciss_get_device_descr(h, drv_index, drvinfo->vendor,
7fe06326 2033 drvinfo->model, drvinfo->rev);
f70dba83 2034 cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
a72da29b 2035 sizeof(drvinfo->serial_no));
9cef0d2f
SC		 2036 /* Save the lunid in case we deregister the disk, below. */
2037 memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
2038 sizeof(drvinfo->LunID));
a72da29b
MM		 2039
2040 /* Is it the same disk we already know, and nothing's changed? */
9cef0d2f 2041 if (h->drv[drv_index]->raid_level != -1 &&
a72da29b 2042 ((memcmp(drvinfo->serial_no,
9cef0d2f
SC		 2043 h->drv[drv_index]->serial_no, 16) == 0) &&
2044 drvinfo->block_size == h->drv[drv_index]->block_size &&
2045 drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
2046 drvinfo->heads == h->drv[drv_index]->heads &&
2047 drvinfo->sectors == h->drv[drv_index]->sectors &&
2048 drvinfo->cylinders == h->drv[drv_index]->cylinders))
a72da29b
MM		 2049 /* The disk is unchanged, nothing to update */
2050 goto freeret;
a72da29b 2051
6ae5ce8e
MM		 2052 /* If we get here it's not the same disk, or something's changed,
2053 * so we need to * deregister it, and re-register it, if it's not
2054 * in use.
2055 * If the disk already exists then deregister it before proceeding
2056 * (unless it's the first disk (for the controller node).
2057 */
9cef0d2f 2058 if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
b2a4a43d 2059 dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
f70dba83 2060 spin_lock_irqsave(&h->lock, flags);
9cef0d2f 2061 h->drv[drv_index]->busy_configuring = 1;
f70dba83 2062 spin_unlock_irqrestore(&h->lock, flags);
e14ac670 2063
9cef0d2f 2064 /* deregister_disk sets h->drv[drv_index]->queue = NULL
6ae5ce8e
MM		 2065 * which keeps the interrupt handler from starting
2066 * the queue.
2067 */
2d11d993 2068 ret = deregister_disk(h, drv_index, 0, via_ioctl);
ddd47442
MM		 2069 }
2070
2071 /* If the disk is in use return */
2072 if (ret)
a72da29b
MM		 2073 goto freeret;
2074
6ae5ce8e 2075 /* Save the new information from cciss_geometry_inquiry
9cef0d2f
SC		 2076 * and serial number inquiry. If the disk was deregistered
2077 * above, then h->drv[drv_index] will be NULL.
6ae5ce8e 2078 */
9cef0d2f
SC		 2079 if (h->drv[drv_index] == NULL) {
2080 drvinfo->device_initialized = 0;
2081 h->drv[drv_index] = drvinfo;
2082 drvinfo = NULL; /* so it won't be freed below. */
2083 } else {
2084 /* special case for cxd0 */
2085 h->drv[drv_index]->block_size = drvinfo->block_size;
2086 h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
2087 h->drv[drv_index]->heads = drvinfo->heads;
2088 h->drv[drv_index]->sectors = drvinfo->sectors;
2089 h->drv[drv_index]->cylinders = drvinfo->cylinders;
2090 h->drv[drv_index]->raid_level = drvinfo->raid_level;
2091 memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
2092 memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
2093 VENDOR_LEN + 1);
2094 memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
2095 memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
2096 }
ddd47442
MM		 2097
2098 ++h->num_luns;
2099 disk = h->gendisk[drv_index];
9cef0d2f 2100 set_capacity(disk, h->drv[drv_index]->nr_blocks);
ddd47442 2101
6ae5ce8e
MM		 2102 /* If it's not disk 0 (drv_index != 0)
2103 * or if it was disk 0, but there was previously
2104 * no actual corresponding configured logical drive
2105 * (raid_leve == -1) then we want to update the
2106 * logical drive's information.
2107 */
361e9b07
SC		 2108 if (drv_index || first_time) {
2109 if (cciss_add_disk(h, disk, drv_index) != 0) {
2110 cciss_free_gendisk(h, drv_index);
9cef0d2f 2111 cciss_free_drive_info(h, drv_index);
b2a4a43d
SC		 2112 dev_warn(&h->pdev->dev, "could not update disk %d\n",
2113 drv_index);
361e9b07
SC		 2114 --h->num_luns;
2115 }
2116 }
ddd47442 2117
6ae5ce8e 2118freeret:
ddd47442 2119 kfree(inq_buff);
a72da29b 2120 kfree(drvinfo);
ddd47442 2121 return;
6ae5ce8e 2122mem_msg:
b2a4a43d 2123 dev_err(&h->pdev->dev, "out of memory\n");
ddd47442
MM		 2124 goto freeret;
2125}
2126
2127/* This function will find the first index of the controllers drive array
9cef0d2f
SC		 2128 * that has a null drv pointer and allocate the drive info struct and
2129 * will return that index This is where new drives will be added.
2130 * If the index to be returned is greater than the highest_lun index for
2131 * the controller then highest_lun is set * to this new index.
2132 * If there are no available indexes or if tha allocation fails, then -1
2133 * is returned. * "controller_node" is used to know if this is a real
2134 * logical drive, or just the controller node, which determines if this
2135 * counts towards highest_lun.
7c832835 2136 */
9cef0d2f 2137static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
ddd47442
MM		 2138{
2139 int i;
9cef0d2f 2140 drive_info_struct *drv;
ddd47442 2141
9cef0d2f 2142 /* Search for an empty slot for our drive info */
7c832835 2143 for (i = 0; i < CISS_MAX_LUN; i++) {
9cef0d2f
SC		 2144
2145 /* if not cxd0 case, and it's occupied, skip it. */
2146 if (h->drv[i] && i != 0)
2147 continue;
2148 /*
2149 * If it's cxd0 case, and drv is alloc'ed already, and a
2150 * disk is configured there, skip it.
2151 */
2152 if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
2153 continue;
2154
2155 /*
2156 * We've found an empty slot. Update highest_lun
2157 * provided this isn't just the fake cxd0 controller node.
2158 */
2159 if (i > h->highest_lun && !controller_node)
2160 h->highest_lun = i;
2161
2162 /* If adding a real disk at cxd0, and it's already alloc'ed */
2163 if (i == 0 && h->drv[i] != NULL)
ddd47442 2164 return i;
9cef0d2f
SC		 2165
2166 /*
2167 * Found an empty slot, not already alloc'ed. Allocate it.
2168 * Mark it with raid_level == -1, so we know it's new later on.
2169 */
2170 drv = kzalloc(sizeof(*drv), GFP_KERNEL);
2171 if (!drv)
2172 return -1;
2173 drv->raid_level = -1; /* so we know it's new */
2174 h->drv[i] = drv;
2175 return i;
ddd47442
MM		 2176 }
2177 return -1;
2178}
2179
9cef0d2f
SC		 2180static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
2181{
2182 kfree(h->drv[drv_index]);
2183 h->drv[drv_index] = NULL;
2184}
2185
361e9b07
SC		 2186static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
2187{
2188 put_disk(h->gendisk[drv_index]);
2189 h->gendisk[drv_index] = NULL;
2190}
2191
6ae5ce8e
MM		 2192/* cciss_add_gendisk finds a free hba[]->drv structure
2193 * and allocates a gendisk if needed, and sets the lunid
2194 * in the drvinfo structure. It returns the index into
2195 * the ->drv[] array, or -1 if none are free.
2196 * is_controller_node indicates whether highest_lun should
2197 * count this disk, or if it's only being added to provide
2198 * a means to talk to the controller in case no logical
2199 * drives have yet been configured.
2200 */
39ccf9a6
SC		 2201static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
2202 int controller_node)
6ae5ce8e
MM		 2203{
2204 int drv_index;
2205
9cef0d2f 2206 drv_index = cciss_alloc_drive_info(h, controller_node);
6ae5ce8e
MM		 2207 if (drv_index == -1)
2208 return -1;
8ce51966 2209
6ae5ce8e
MM		 2210 /*Check if the gendisk needs to be allocated */
2211 if (!h->gendisk[drv_index]) {
2212 h->gendisk[drv_index] =
2213 alloc_disk(1 << NWD_SHIFT);
2214 if (!h->gendisk[drv_index]) {
b2a4a43d
SC		 2215 dev_err(&h->pdev->dev,
2216 "could not allocate a new disk %d\n",
2217 drv_index);
9cef0d2f 2218 goto err_free_drive_info;
6ae5ce8e
MM		 2219 }
2220 }
9cef0d2f
SC		 2221 memcpy(h->drv[drv_index]->LunID, lunid,
2222 sizeof(h->drv[drv_index]->LunID));
2223 if (cciss_create_ld_sysfs_entry(h, drv_index))
7fe06326 2224 goto err_free_disk;
6ae5ce8e
MM		 2225 /* Don't need to mark this busy because nobody */
2226 /* else knows about this disk yet to contend */
2227 /* for access to it. */
9cef0d2f 2228 h->drv[drv_index]->busy_configuring = 0;
6ae5ce8e
MM		 2229 wmb();
2230 return drv_index;
7fe06326
AP		 2231
2232err_free_disk:
361e9b07 2233 cciss_free_gendisk(h, drv_index);
9cef0d2f
SC		 2234err_free_drive_info:
2235 cciss_free_drive_info(h, drv_index);
7fe06326 2236 return -1;
6ae5ce8e
MM		 2237}
2238
2239/* This is for the special case of a controller which
2240 * has no logical drives. In this case, we still need
2241 * to register a disk so the controller can be accessed
2242 * by the Array Config Utility.
2243 */
2244static void cciss_add_controller_node(ctlr_info_t *h)
2245{
2246 struct gendisk *disk;
2247 int drv_index;
2248
2249 if (h->gendisk[0] != NULL) /* already did this? Then bail. */
2250 return;
2251
39ccf9a6 2252 drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
361e9b07
SC		 2253 if (drv_index == -1)
2254 goto error;
9cef0d2f
SC		 2255 h->drv[drv_index]->block_size = 512;
2256 h->drv[drv_index]->nr_blocks = 0;
2257 h->drv[drv_index]->heads = 0;
2258 h->drv[drv_index]->sectors = 0;
2259 h->drv[drv_index]->cylinders = 0;
2260 h->drv[drv_index]->raid_level = -1;
2261 memset(h->drv[drv_index]->serial_no, 0, 16);
6ae5ce8e 2262 disk = h->gendisk[drv_index];
361e9b07
SC		 2263 if (cciss_add_disk(h, disk, drv_index) == 0)
2264 return;
2265 cciss_free_gendisk(h, drv_index);
9cef0d2f 2266 cciss_free_drive_info(h, drv_index);
361e9b07 2267error:
b2a4a43d 2268 dev_warn(&h->pdev->dev, "could not add disk 0.\n");
361e9b07 2269 return;
6ae5ce8e
MM		 2270}
2271
ddd47442 2272/* This function will add and remove logical drives from the Logical
d14c4ab5 2273 * drive array of the controller and maintain persistency of ordering
ddd47442
MM		 2274 * so that mount points are preserved until the next reboot. This allows
2275 * for the removal of logical drives in the middle of the drive array
2276 * without a re-ordering of those drives.
2277 * INPUT
2278 * h = The controller to perform the operations on
7c832835 2279 */
2d11d993
SC		 2280static int rebuild_lun_table(ctlr_info_t *h, int first_time,
2281 int via_ioctl)
1da177e4 2282{
ddd47442
MM		 2283 int num_luns;
2284 ReportLunData_struct *ld_buff = NULL;
ddd47442
MM		 2285 int return_code;
2286 int listlength = 0;
2287 int i;
2288 int drv_found;
2289 int drv_index = 0;
39ccf9a6 2290 unsigned char lunid[8] = CTLR_LUNID;
1da177e4 2291 unsigned long flags;
ddd47442 2292
6ae5ce8e
MM		 2293 if (!capable(CAP_SYS_RAWIO))
2294 return -EPERM;
2295
ddd47442 2296 /* Set busy_configuring flag for this operation */
f70dba83 2297 spin_lock_irqsave(&h->lock, flags);
7c832835 2298 if (h->busy_configuring) {
f70dba83 2299 spin_unlock_irqrestore(&h->lock, flags);
ddd47442
MM		 2300 return -EBUSY;
2301 }
2302 h->busy_configuring = 1;
f70dba83 2303 spin_unlock_irqrestore(&h->lock, flags);
ddd47442 2304
a72da29b
MM		 2305 ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
2306 if (ld_buff == NULL)
2307 goto mem_msg;
2308
f70dba83 2309 return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
b57695fe 2310 sizeof(ReportLunData_struct),
2311 0, CTLR_LUNID, TYPE_CMD);
ddd47442 2312
a72da29b
MM		 2313 if (return_code == IO_OK)
2314 listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
2315 else { /* reading number of logical volumes failed */
b2a4a43d
SC		 2316 dev_warn(&h->pdev->dev,
2317 "report logical volume command failed\n");
a72da29b
MM		 2318 listlength = 0;
2319 goto freeret;
2320 }
2321
2322 num_luns = listlength / 8; /* 8 bytes per entry */
2323 if (num_luns > CISS_MAX_LUN) {
2324 num_luns = CISS_MAX_LUN;
b2a4a43d 2325 dev_warn(&h->pdev->dev, "more luns configured"
a72da29b
MM		 2326 " on controller than can be handled by"
2327 " this driver.\n");
2328 }
2329
6ae5ce8e
MM		 2330 if (num_luns == 0)
2331 cciss_add_controller_node(h);
2332
2333 /* Compare controller drive array to driver's drive array
2334 * to see if any drives are missing on the controller due
2335 * to action of Array Config Utility (user deletes drive)
2336 * and deregister logical drives which have disappeared.
2337 */
a72da29b
MM		 2338 for (i = 0; i <= h->highest_lun; i++) {
2339 int j;
2340 drv_found = 0;
d8a0be6a
SC		 2341
2342 /* skip holes in the array from already deleted drives */
9cef0d2f 2343 if (h->drv[i] == NULL)
d8a0be6a
SC		 2344 continue;
2345
a72da29b 2346 for (j = 0; j < num_luns; j++) {
39ccf9a6 2347 memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
9cef0d2f 2348 if (memcmp(h->drv[i]->LunID, lunid,
39ccf9a6 2349 sizeof(lunid)) == 0) {
a72da29b
MM		 2350 drv_found = 1;
2351 break;
2352 }
2353 }
2354 if (!drv_found) {
2355 /* Deregister it from the OS, it's gone. */
f70dba83 2356 spin_lock_irqsave(&h->lock, flags);
9cef0d2f 2357 h->drv[i]->busy_configuring = 1;
f70dba83 2358 spin_unlock_irqrestore(&h->lock, flags);
2d11d993 2359 return_code = deregister_disk(h, i, 1, via_ioctl);
9cef0d2f
SC		 2360 if (h->drv[i] != NULL)
2361 h->drv[i]->busy_configuring = 0;
ddd47442 2362 }
a72da29b 2363 }
ddd47442 2364
a72da29b
MM		 2365 /* Compare controller drive array to driver's drive array.
2366 * Check for updates in the drive information and any new drives
2367 * on the controller due to ACU adding logical drives, or changing
2368 * a logical drive's size, etc. Reregister any new/changed drives
2369 */
2370 for (i = 0; i < num_luns; i++) {
2371 int j;
ddd47442 2372
a72da29b 2373 drv_found = 0;
ddd47442 2374
39ccf9a6 2375 memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
a72da29b
MM		 2376 /* Find if the LUN is already in the drive array
2377 * of the driver. If so then update its info
2378 * if not in use. If it does not exist then find
2379 * the first free index and add it.
2380 */
2381 for (j = 0; j <= h->highest_lun; j++) {
9cef0d2f
SC		 2382 if (h->drv[j] != NULL &&
2383 memcmp(h->drv[j]->LunID, lunid,
2384 sizeof(h->drv[j]->LunID)) == 0) {
a72da29b
MM		 2385 drv_index = j;
2386 drv_found = 1;
2387 break;
ddd47442 2388 }
a72da29b 2389 }
ddd47442 2390
a72da29b
MM		 2391 /* check if the drive was found already in the array */
2392 if (!drv_found) {
eece695f 2393 drv_index = cciss_add_gendisk(h, lunid, 0);
a72da29b
MM		 2394 if (drv_index == -1)
2395 goto freeret;
a72da29b 2396 }
f70dba83 2397 cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
a72da29b 2398 } /* end for */
ddd47442 2399
6ae5ce8e 2400freeret:
ddd47442
MM		 2401 kfree(ld_buff);
2402 h->busy_configuring = 0;
2403 /* We return -1 here to tell the ACU that we have registered/updated
2404 * all of the drives that we can and to keep it from calling us
2405 * additional times.
7c832835 2406 */
ddd47442 2407 return -1;
6ae5ce8e 2408mem_msg:
b2a4a43d 2409 dev_err(&h->pdev->dev, "out of memory\n");
a72da29b 2410 h->busy_configuring = 0;
ddd47442
MM		 2411 goto freeret;
2412}
2413
9ddb27b4
SC		 2414static void cciss_clear_drive_info(drive_info_struct *drive_info)
2415{
2416 /* zero out the disk size info */
2417 drive_info->nr_blocks = 0;
2418 drive_info->block_size = 0;
2419 drive_info->heads = 0;
2420 drive_info->sectors = 0;
2421 drive_info->cylinders = 0;
2422 drive_info->raid_level = -1;
2423 memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
2424 memset(drive_info->model, 0, sizeof(drive_info->model));
2425 memset(drive_info->rev, 0, sizeof(drive_info->rev));
2426 memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
2427 /*
2428 * don't clear the LUNID though, we need to remember which
2429 * one this one is.
2430 */
2431}
2432
ddd47442
MM		 2433/* This function will deregister the disk and it's queue from the
2434 * kernel. It must be called with the controller lock held and the
2435 * drv structures busy_configuring flag set. It's parameters are:
2436 *
2437 * disk = This is the disk to be deregistered
2438 * drv = This is the drive_info_struct associated with the disk to be
2439 * deregistered. It contains information about the disk used
2440 * by the driver.
2441 * clear_all = This flag determines whether or not the disk information
2442 * is going to be completely cleared out and the highest_lun
2443 * reset. Sometimes we want to clear out information about
d14c4ab5 2444 * the disk in preparation for re-adding it. In this case
ddd47442
MM		 2445 * the highest_lun should be left unchanged and the LunID
2446 * should not be cleared.
2d11d993
SC		 2447 * via_ioctl
2448 * This indicates whether we've reached this path via ioctl.
2449 * This affects the maximum usage count allowed for c0d0 to be messed with.
2450 * If this path is reached via ioctl(), then the max_usage_count will
2451 * be 1, as the process calling ioctl() has got to have the device open.
2452 * If we get here via sysfs, then the max usage count will be zero.
ddd47442 2453*/
a0ea8622 2454static int deregister_disk(ctlr_info_t *h, int drv_index,
2d11d993 2455 int clear_all, int via_ioctl)
ddd47442 2456{
799202cb 2457 int i;
a0ea8622
SC		 2458 struct gendisk *disk;
2459 drive_info_struct *drv;
9cef0d2f 2460 int recalculate_highest_lun;
1da177e4
LT		 2461
2462 if (!capable(CAP_SYS_RAWIO))
2463 return -EPERM;
2464
9cef0d2f 2465 drv = h->drv[drv_index];
a0ea8622
SC		 2466 disk = h->gendisk[drv_index];
2467
1da177e4 2468 /* make sure logical volume is NOT is use */
7c832835 2469 if (clear_all || (h->gendisk[0] == disk)) {
2d11d993 2470 if (drv->usage_count > via_ioctl)
7c832835
BH		 2471 return -EBUSY;
2472 } else if (drv->usage_count > 0)
2473 return -EBUSY;
1da177e4 2474
9cef0d2f
SC		 2475 recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
2476
ddd47442
MM		 2477 /* invalidate the devices and deregister the disk. If it is disk
2478 * zero do not deregister it but just zero out it's values. This
2479 * allows us to delete disk zero but keep the controller registered.
7c832835
BH		 2480 */
2481 if (h->gendisk[0] != disk) {
5a9df732 2482 struct request_queue *q = disk->queue;
097d0264 2483 if (disk->flags & GENHD_FL_UP) {
8ce51966 2484 cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
5a9df732 2485 del_gendisk(disk);
5a9df732 2486 }
9cef0d2f 2487 if (q)
5a9df732 2488 blk_cleanup_queue(q);
5a9df732
AB		 2489 /* If clear_all is set then we are deleting the logical
2490 * drive, not just refreshing its info. For drives
2491 * other than disk 0 we will call put_disk. We do not
2492 * do this for disk 0 as we need it to be able to
2493 * configure the controller.
a72da29b 2494 */
5a9df732
AB		 2495 if (clear_all){
2496 /* This isn't pretty, but we need to find the
2497 * disk in our array and NULL our the pointer.
2498 * This is so that we will call alloc_disk if
2499 * this index is used again later.
a72da29b 2500 */
5a9df732 2501 for (i=0; i < CISS_MAX_LUN; i++){
a72da29b 2502 if (h->gendisk[i] == disk) {
5a9df732
AB		 2503 h->gendisk[i] = NULL;
2504 break;
799202cb 2505 }
799202cb 2506 }
5a9df732 2507 put_disk(disk);
ddd47442 2508 }
799202cb
MM		 2509 } else {
2510 set_capacity(disk, 0);
9cef0d2f 2511 cciss_clear_drive_info(drv);
ddd47442
MM		 2512 }
2513
2514 --h->num_luns;
ddd47442 2515
9cef0d2f
SC		 2516 /* if it was the last disk, find the new hightest lun */
2517 if (clear_all && recalculate_highest_lun) {
c2d45b4d 2518 int newhighest = -1;
9cef0d2f
SC		 2519 for (i = 0; i <= h->highest_lun; i++) {
2520 /* if the disk has size > 0, it is available */
2521 if (h->drv[i] && h->drv[i]->heads)
2522 newhighest = i;
1da177e4 2523 }
9cef0d2f 2524 h->highest_lun = newhighest;
ddd47442 2525 }
e2019b58 2526 return 0;
1da177e4 2527}
ddd47442 2528
f70dba83 2529static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
b57695fe 2530 size_t size, __u8 page_code, unsigned char *scsi3addr,
2531 int cmd_type)
1da177e4 2532{
1da177e4
LT		 2533 u64bit buff_dma_handle;
2534 int status = IO_OK;
2535
2536 c->cmd_type = CMD_IOCTL_PEND;
2537 c->Header.ReplyQueue = 0;
7c832835 2538 if (buff != NULL) {
1da177e4 2539 c->Header.SGList = 1;
7c832835 2540 c->Header.SGTotal = 1;
1da177e4
LT		 2541 } else {
2542 c->Header.SGList = 0;
7c832835 2543 c->Header.SGTotal = 0;
1da177e4
LT		 2544 }
2545 c->Header.Tag.lower = c->busaddr;
b57695fe 2546 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
1da177e4
LT		 2547
2548 c->Request.Type.Type = cmd_type;
2549 if (cmd_type == TYPE_CMD) {
7c832835
BH		 2550 switch (cmd) {
2551 case CISS_INQUIRY:
1da177e4 2552 /* are we trying to read a vital product page */
7c832835 2553 if (page_code != 0) {
1da177e4
LT		 2554 c->Request.CDB[1] = 0x01;
2555 c->Request.CDB[2] = page_code;
2556 }
2557 c->Request.CDBLen = 6;
7c832835 2558 c->Request.Type.Attribute = ATTR_SIMPLE;
1da177e4
LT		 2559 c->Request.Type.Direction = XFER_READ;
2560 c->Request.Timeout = 0;
7c832835
BH		 2561 c->Request.CDB[0] = CISS_INQUIRY;
2562 c->Request.CDB[4] = size & 0xFF;
2563 break;
1da177e4
LT		 2564 case CISS_REPORT_LOG:
2565 case CISS_REPORT_PHYS:
7c832835 2566 /* Talking to controller so It's a physical command
1da177e4 2567 mode = 00 target = 0. Nothing to write.
7c832835 2568 */
1da177e4
LT		 2569 c->Request.CDBLen = 12;
2570 c->Request.Type.Attribute = ATTR_SIMPLE;
2571 c->Request.Type.Direction = XFER_READ;
2572 c->Request.Timeout = 0;
2573 c->Request.CDB[0] = cmd;
b028461d 2574 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
1da177e4
LT		 2575 c->Request.CDB[7] = (size >> 16) & 0xFF;
2576 c->Request.CDB[8] = (size >> 8) & 0xFF;
2577 c->Request.CDB[9] = size & 0xFF;
2578 break;
2579
2580 case CCISS_READ_CAPACITY:
1da177e4
LT		 2581 c->Request.CDBLen = 10;
2582 c->Request.Type.Attribute = ATTR_SIMPLE;
2583 c->Request.Type.Direction = XFER_READ;
2584 c->Request.Timeout = 0;
2585 c->Request.CDB[0] = cmd;
7c832835 2586 break;
00988a35 2587 case CCISS_READ_CAPACITY_16:
00988a35
MMOD		 2588 c->Request.CDBLen = 16;
2589 c->Request.Type.Attribute = ATTR_SIMPLE;
2590 c->Request.Type.Direction = XFER_READ;
2591 c->Request.Timeout = 0;
2592 c->Request.CDB[0] = cmd;
2593 c->Request.CDB[1] = 0x10;
2594 c->Request.CDB[10] = (size >> 24) & 0xFF;
2595 c->Request.CDB[11] = (size >> 16) & 0xFF;
2596 c->Request.CDB[12] = (size >> 8) & 0xFF;
2597 c->Request.CDB[13] = size & 0xFF;
2598 c->Request.Timeout = 0;
2599 c->Request.CDB[0] = cmd;
2600 break;
1da177e4
LT		 2601 case CCISS_CACHE_FLUSH:
2602 c->Request.CDBLen = 12;
2603 c->Request.Type.Attribute = ATTR_SIMPLE;
2604 c->Request.Type.Direction = XFER_WRITE;
2605 c->Request.Timeout = 0;
2606 c->Request.CDB[0] = BMIC_WRITE;
2607 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
59bd71a8
SC		 2608 c->Request.CDB[7] = (size >> 8) & 0xFF;
2609 c->Request.CDB[8] = size & 0xFF;
7c832835 2610 break;
88f627ae 2611 case TEST_UNIT_READY:
88f627ae
SC		 2612 c->Request.CDBLen = 6;
2613 c->Request.Type.Attribute = ATTR_SIMPLE;
2614 c->Request.Type.Direction = XFER_NONE;
2615 c->Request.Timeout = 0;
2616 break;
1da177e4 2617 default:
b2a4a43d 2618 dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
e2019b58 2619 return IO_ERROR;
1da177e4
LT		 2620 }
2621 } else if (cmd_type == TYPE_MSG) {
2622 switch (cmd) {
8f71bb82 2623 case CCISS_ABORT_MSG:
3da8b713 2624 c->Request.CDBLen = 12;
2625 c->Request.Type.Attribute = ATTR_SIMPLE;
2626 c->Request.Type.Direction = XFER_WRITE;
2627 c->Request.Timeout = 0;
7c832835
BH		 2628 c->Request.CDB[0] = cmd; /* abort */
2629 c->Request.CDB[1] = 0; /* abort a command */
3da8b713 2630 /* buff contains the tag of the command to abort */
2631 memcpy(&c->Request.CDB[4], buff, 8);
2632 break;
8f71bb82 2633 case CCISS_RESET_MSG:
88f627ae 2634 c->Request.CDBLen = 16;
3da8b713 2635 c->Request.Type.Attribute = ATTR_SIMPLE;
88f627ae 2636 c->Request.Type.Direction = XFER_NONE;
3da8b713 2637 c->Request.Timeout = 0;
2638 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
7c832835 2639 c->Request.CDB[0] = cmd; /* reset */
8f71bb82 2640 c->Request.CDB[1] = CCISS_RESET_TYPE_TARGET;
00988a35 2641 break;
8f71bb82 2642 case CCISS_NOOP_MSG:
1da177e4
LT		 2643 c->Request.CDBLen = 1;
2644 c->Request.Type.Attribute = ATTR_SIMPLE;
2645 c->Request.Type.Direction = XFER_WRITE;
2646 c->Request.Timeout = 0;
2647 c->Request.CDB[0] = cmd;
2648 break;
2649 default:
b2a4a43d
SC		 2650 dev_warn(&h->pdev->dev,
2651 "unknown message type %d\n", cmd);
1da177e4
LT		 2652 return IO_ERROR;
2653 }
2654 } else {
b2a4a43d 2655 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
1da177e4
LT		 2656 return IO_ERROR;
2657 }
2658 /* Fill in the scatter gather information */
2659 if (size > 0) {
2660 buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
7c832835
BH		 2661 buff, size,
2662 PCI_DMA_BIDIRECTIONAL);
1da177e4
LT		 2663 c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
2664 c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
2665 c->SG[0].Len = size;
7c832835 2666 c->SG[0].Ext = 0; /* we are not chaining */
1da177e4
LT		 2667 }
2668 return status;
2669}
7c832835 2670
8d85fce7
GKH		 2671static int cciss_send_reset(ctlr_info_t *h, unsigned char *scsi3addr,
2672 u8 reset_type)
edc83d47
JA		 2673{
2674 CommandList_struct *c;
2675 int return_status;
2676
2677 c = cmd_alloc(h);
2678 if (!c)
2679 return -ENOMEM;
2680 return_status = fill_cmd(h, c, CCISS_RESET_MSG, NULL, 0, 0,
2681 CTLR_LUNID, TYPE_MSG);
2682 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
2683 if (return_status != IO_OK) {
2684 cmd_special_free(h, c);
2685 return return_status;
2686 }
2687 c->waiting = NULL;
2688 enqueue_cmd_and_start_io(h, c);
2689 /* Don't wait for completion, the reset won't complete. Don't free
2690 * the command either. This is the last command we will send before
2691 * re-initializing everything, so it doesn't matter and won't leak.
2692 */
2693 return 0;
2694}
2695
3c2ab402 2696static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
2697{
2698 switch (c->err_info->ScsiStatus) {
2699 case SAM_STAT_GOOD:
2700 return IO_OK;
2701 case SAM_STAT_CHECK_CONDITION:
2702 switch (0xf & c->err_info->SenseInfo[2]) {
2703 case 0: return IO_OK; /* no sense */
2704 case 1: return IO_OK; /* recovered error */
2705 default:
c08fac65
SC		 2706 if (check_for_unit_attention(h, c))
2707 return IO_NEEDS_RETRY;
b2a4a43d 2708 dev_warn(&h->pdev->dev, "cmd 0x%02x "
3c2ab402 2709 "check condition, sense key = 0x%02x\n",
b2a4a43d 2710 c->Request.CDB[0], c->err_info->SenseInfo[2]);
3c2ab402 2711 }
2712 break;
2713 default:
b2a4a43d
SC		 2714 dev_warn(&h->pdev->dev, "cmd 0x%02x"
2715 "scsi status = 0x%02x\n",
3c2ab402 2716 c->Request.CDB[0], c->err_info->ScsiStatus);
2717 break;
2718 }
2719 return IO_ERROR;
2720}
2721
789a424a 2722static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
1da177e4 2723{
5390cfc3 2724 int return_status = IO_OK;
7c832835 2725
789a424a 2726 if (c->err_info->CommandStatus == CMD_SUCCESS)
2727 return IO_OK;
5390cfc3 2728
2729 switch (c->err_info->CommandStatus) {
2730 case CMD_TARGET_STATUS:
3c2ab402 2731 return_status = check_target_status(h, c);
5390cfc3 2732 break;
2733 case CMD_DATA_UNDERRUN:
2734 case CMD_DATA_OVERRUN:
2735 /* expected for inquiry and report lun commands */
2736 break;
2737 case CMD_INVALID:
b2a4a43d 2738 dev_warn(&h->pdev->dev, "cmd 0x%02x is "
5390cfc3 2739 "reported invalid\n", c->Request.CDB[0]);
2740 return_status = IO_ERROR;
2741 break;
2742 case CMD_PROTOCOL_ERR:
b2a4a43d
SC		 2743 dev_warn(&h->pdev->dev, "cmd 0x%02x has "
2744 "protocol error\n", c->Request.CDB[0]);
5390cfc3 2745 return_status = IO_ERROR;
2746 break;
2747 case CMD_HARDWARE_ERR:
b2a4a43d 2748 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
5390cfc3 2749 " hardware error\n", c->Request.CDB[0]);
2750 return_status = IO_ERROR;
2751 break;
2752 case CMD_CONNECTION_LOST:
b2a4a43d 2753 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
5390cfc3 2754 "connection lost\n", c->Request.CDB[0]);
2755 return_status = IO_ERROR;
2756 break;
2757 case CMD_ABORTED:
b2a4a43d 2758 dev_warn(&h->pdev->dev, "cmd 0x%02x was "
5390cfc3 2759 "aborted\n", c->Request.CDB[0]);
2760 return_status = IO_ERROR;
2761 break;
2762 case CMD_ABORT_FAILED:
b2a4a43d 2763 dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
5390cfc3 2764 "abort failed\n", c->Request.CDB[0]);
2765 return_status = IO_ERROR;
2766 break;
2767 case CMD_UNSOLICITED_ABORT:
b2a4a43d 2768 dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
5390cfc3 2769 c->Request.CDB[0]);
789a424a 2770 return_status = IO_NEEDS_RETRY;
5390cfc3 2771 break;
6d9a4f9e
SC		 2772 case CMD_UNABORTABLE:
2773 dev_warn(&h->pdev->dev, "cmd unabortable\n");
2774 return_status = IO_ERROR;
2775 break;
5390cfc3 2776 default:
b2a4a43d 2777 dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
5390cfc3 2778 "unknown status %x\n", c->Request.CDB[0],
2779 c->err_info->CommandStatus);
2780 return_status = IO_ERROR;
7c832835 2781 }
789a424a 2782 return return_status;
2783}
2784
2785static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
2786 int attempt_retry)
2787{
2788 DECLARE_COMPLETION_ONSTACK(wait);
2789 u64bit buff_dma_handle;
789a424a 2790 int return_status = IO_OK;
2791
2792resend_cmd2:
2793 c->waiting = &wait;
664a717d 2794 enqueue_cmd_and_start_io(h, c);
789a424a 2795
2796 wait_for_completion(&wait);
2797
2798 if (c->err_info->CommandStatus == 0 || !attempt_retry)
2799 goto command_done;
2800
2801 return_status = process_sendcmd_error(h, c);
2802
2803 if (return_status == IO_NEEDS_RETRY &&
2804 c->retry_count < MAX_CMD_RETRIES) {
b2a4a43d 2805 dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
789a424a 2806 c->Request.CDB[0]);
2807 c->retry_count++;
2808 /* erase the old error information */
2809 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2810 return_status = IO_OK;
16735d02 2811 reinit_completion(&wait);
789a424a 2812 goto resend_cmd2;
2813 }
5390cfc3 2814
2815command_done:
1da177e4 2816 /* unlock the buffers from DMA */
bb2a37bf
MM		 2817 buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
2818 buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
7c832835
BH		 2819 pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
2820 c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
5390cfc3 2821 return return_status;
2822}
2823
f70dba83 2824static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
b57695fe 2825 __u8 page_code, unsigned char scsi3addr[],
2826 int cmd_type)
5390cfc3 2827{
5390cfc3 2828 CommandList_struct *c;
2829 int return_status;
2830
6b4d96b8 2831 c = cmd_special_alloc(h);
5390cfc3 2832 if (!c)
2833 return -ENOMEM;
f70dba83 2834 return_status = fill_cmd(h, c, cmd, buff, size, page_code,
b57695fe 2835 scsi3addr, cmd_type);
5390cfc3 2836 if (return_status == IO_OK)
789a424a 2837 return_status = sendcmd_withirq_core(h, c, 1);
2838
6b4d96b8 2839 cmd_special_free(h, c);
7c832835 2840 return return_status;
1da177e4 2841}
7c832835 2842
f70dba83 2843static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
7b838bde 2844 sector_t total_size,
7c832835
BH		 2845 unsigned int block_size,
2846 InquiryData_struct *inq_buff,
2847 drive_info_struct *drv)
1da177e4
LT		 2848{
2849 int return_code;
00988a35 2850 unsigned long t;
b57695fe 2851 unsigned char scsi3addr[8];
00988a35 2852
1da177e4 2853 memset(inq_buff, 0, sizeof(InquiryData_struct));
f70dba83
SC		 2854 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2855 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
7b838bde 2856 sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
1da177e4 2857 if (return_code == IO_OK) {
7c832835 2858 if (inq_buff->data_byte[8] == 0xFF) {
b2a4a43d
SC		 2859 dev_warn(&h->pdev->dev,
2860 "reading geometry failed, volume "
7c832835 2861 "does not support reading geometry\n");
1da177e4 2862 drv->heads = 255;
b028461d 2863 drv->sectors = 32; /* Sectors per track */
7f42d3b8 2864 drv->cylinders = total_size + 1;
89f97ad1 2865 drv->raid_level = RAID_UNKNOWN;
1da177e4 2866 } else {
1da177e4
LT		 2867 drv->heads = inq_buff->data_byte[6];
2868 drv->sectors = inq_buff->data_byte[7];
2869 drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
2870 drv->cylinders += inq_buff->data_byte[5];
2871 drv->raid_level = inq_buff->data_byte[8];
3f7705ea
MW		 2872 }
2873 drv->block_size = block_size;
97c06978 2874 drv->nr_blocks = total_size + 1;
3f7705ea
MW		 2875 t = drv->heads * drv->sectors;
2876 if (t > 1) {
97c06978
MMOD		 2877 sector_t real_size = total_size + 1;
2878 unsigned long rem = sector_div(real_size, t);
3f7705ea 2879 if (rem)
97c06978
MMOD		 2880 real_size++;
2881 drv->cylinders = real_size;
1da177e4 2882 }
7c832835 2883 } else { /* Get geometry failed */
b2a4a43d 2884 dev_warn(&h->pdev->dev, "reading geometry failed\n");
1da177e4 2885 }
1da177e4 2886}
7c832835 2887
1da177e4 2888static void
f70dba83 2889cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
7c832835 2890 unsigned int *block_size)
1da177e4 2891{
00988a35 2892 ReadCapdata_struct *buf;
1da177e4 2893 int return_code;
b57695fe 2894 unsigned char scsi3addr[8];
1aebe187
MK		 2895
2896 buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
2897 if (!buf) {
b2a4a43d 2898 dev_warn(&h->pdev->dev, "out of memory\n");
00988a35
MMOD		 2899 return;
2900 }
1aebe187 2901
f70dba83
SC		 2902 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2903 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
7b838bde 2904 sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
1da177e4 2905 if (return_code == IO_OK) {
4c1f2b31
AV		 2906 *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
2907 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
7c832835 2908 } else { /* read capacity command failed */
b2a4a43d 2909 dev_warn(&h->pdev->dev, "read capacity failed\n");
1da177e4
LT		 2910 *total_size = 0;
2911 *block_size = BLOCK_SIZE;
2912 }
00988a35 2913 kfree(buf);
00988a35
MMOD		 2914}
2915
f70dba83 2916static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
7b838bde 2917 sector_t *total_size, unsigned int *block_size)
00988a35
MMOD		 2918{
2919 ReadCapdata_struct_16 *buf;
2920 int return_code;
b57695fe 2921 unsigned char scsi3addr[8];
1aebe187
MK		 2922
2923 buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
2924 if (!buf) {
b2a4a43d 2925 dev_warn(&h->pdev->dev, "out of memory\n");
00988a35
MMOD		 2926 return;
2927 }
1aebe187 2928
f70dba83
SC		 2929 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2930 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
2931 buf, sizeof(ReadCapdata_struct_16),
7b838bde 2932 0, scsi3addr, TYPE_CMD);
00988a35 2933 if (return_code == IO_OK) {
4c1f2b31
AV		 2934 *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
2935 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
00988a35 2936 } else { /* read capacity command failed */
b2a4a43d 2937 dev_warn(&h->pdev->dev, "read capacity failed\n");
00988a35
MMOD		 2938 *total_size = 0;
2939 *block_size = BLOCK_SIZE;
2940 }
b2a4a43d 2941 dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n",
97c06978 2942 (unsigned long long)*total_size+1, *block_size);
00988a35 2943 kfree(buf);
1da177e4
LT		 2944}
2945
1da177e4
LT		 2946static int cciss_revalidate(struct gendisk *disk)
2947{
2948 ctlr_info_t *h = get_host(disk);
2949 drive_info_struct *drv = get_drv(disk);
2950 int logvol;
7c832835 2951 int FOUND = 0;
1da177e4 2952 unsigned int block_size;
00988a35 2953 sector_t total_size;
1da177e4
LT		 2954 InquiryData_struct *inq_buff = NULL;
2955
68264e9d 2956 for (logvol = 0; logvol <= h->highest_lun; logvol++) {
0fc13c89 2957 if (!h->drv[logvol])
453434cf 2958 continue;
9cef0d2f 2959 if (memcmp(h->drv[logvol]->LunID, drv->LunID,
39ccf9a6 2960 sizeof(drv->LunID)) == 0) {
7c832835 2961 FOUND = 1;
1da177e4
LT		 2962 break;
2963 }
2964 }
2965
7c832835
BH		 2966 if (!FOUND)
2967 return 1;
1da177e4 2968
7c832835
BH		 2969 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2970 if (inq_buff == NULL) {
b2a4a43d 2971 dev_warn(&h->pdev->dev, "out of memory\n");
7c832835
BH		 2972 return 1;
2973 }
00988a35 2974 if (h->cciss_read == CCISS_READ_10) {
f70dba83 2975 cciss_read_capacity(h, logvol,
00988a35
MMOD		 2976 &total_size, &block_size);
2977 } else {
f70dba83 2978 cciss_read_capacity_16(h, logvol,
00988a35
MMOD		 2979 &total_size, &block_size);
2980 }
f70dba83 2981 cciss_geometry_inquiry(h, logvol, total_size, block_size,
7c832835 2982 inq_buff, drv);
1da177e4 2983
e1defc4f 2984 blk_queue_logical_block_size(drv->queue, drv->block_size);
1da177e4
LT		 2985 set_capacity(disk, drv->nr_blocks);
2986
1da177e4
LT		 2987 kfree(inq_buff);
2988 return 0;
2989}
2990
1da177e4
LT		 2991/*
2992 * Map (physical) PCI mem into (virtual) kernel space
2993 */
2994static void __iomem *remap_pci_mem(ulong base, ulong size)
2995{
7c832835
BH		 2996 ulong page_base = ((ulong) base) & PAGE_MASK;
2997 ulong page_offs = ((ulong) base) - page_base;
2998 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
1da177e4 2999
7c832835 3000 return page_remapped ? (page_remapped + page_offs) : NULL;
1da177e4
LT		 3001}
3002
7c832835
BH		 3003/*
3004 * Takes jobs of the Q and sends them to the hardware, then puts it on
3005 * the Q to wait for completion.
3006 */
3007static void start_io(ctlr_info_t *h)
1da177e4
LT		 3008{
3009 CommandList_struct *c;
7c832835 3010
e6e1ee93
JA		 3011 while (!list_empty(&h->reqQ)) {
3012 c = list_entry(h->reqQ.next, CommandList_struct, list);
1da177e4
LT		 3013 /* can't do anything if fifo is full */
3014 if ((h->access.fifo_full(h))) {
b2a4a43d 3015 dev_warn(&h->pdev->dev, "fifo full\n");
1da177e4
LT		 3016 break;
3017 }
3018
7c832835 3019 /* Get the first entry from the Request Q */
8a3173de 3020 removeQ(c);
1da177e4 3021 h->Qdepth--;
7c832835
BH		 3022
3023 /* Tell the controller execute command */
1da177e4 3024 h->access.submit_command(h, c);
7c832835
BH		 3025
3026 /* Put job onto the completed Q */
8a3173de 3027 addQ(&h->cmpQ, c);
1da177e4
LT		 3028 }
3029}
7c832835 3030
f70dba83 3031/* Assumes that h->lock is held. */
1da177e4
LT		 3032/* Zeros out the error record and then resends the command back */
3033/* to the controller */
7c832835 3034static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
1da177e4
LT		 3035{
3036 /* erase the old error information */
3037 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
3038
3039 /* add it to software queue and then send it to the controller */
8a3173de 3040 addQ(&h->reqQ, c);
1da177e4 3041 h->Qdepth++;
7c832835 3042 if (h->Qdepth > h->maxQsinceinit)
1da177e4
LT		 3043 h->maxQsinceinit = h->Qdepth;
3044
3045 start_io(h);
3046}
a9925a06 3047
1a614f50
SC		 3048static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
3049 unsigned int msg_byte, unsigned int host_byte,
3050 unsigned int driver_byte)
3051{
3052 /* inverse of macros in scsi.h */
3053 return (scsi_status_byte & 0xff) |
3054 ((msg_byte & 0xff) << 8) |
3055 ((host_byte & 0xff) << 16) |
3056 ((driver_byte & 0xff) << 24);
3057}
3058
0a9279cc
MM		 3059static inline int evaluate_target_status(ctlr_info_t *h,
3060 CommandList_struct *cmd, int *retry_cmd)
03bbfee5
MMOD		 3061{
3062 unsigned char sense_key;
1a614f50
SC		 3063 unsigned char status_byte, msg_byte, host_byte, driver_byte;
3064 int error_value;
3065
0a9279cc 3066 *retry_cmd = 0;
1a614f50
SC		 3067 /* If we get in here, it means we got "target status", that is, scsi status */
3068 status_byte = cmd->err_info->ScsiStatus;
3069 driver_byte = DRIVER_OK;
3070 msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
3071
33659ebb 3072 if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
1a614f50
SC		 3073 host_byte = DID_PASSTHROUGH;
3074 else
3075 host_byte = DID_OK;
3076
3077 error_value = make_status_bytes(status_byte, msg_byte,
3078 host_byte, driver_byte);
03bbfee5 3079
1a614f50 3080 if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
33659ebb 3081 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
b2a4a43d 3082 dev_warn(&h->pdev->dev, "cmd %p "
03bbfee5
MMOD		 3083 "has SCSI Status 0x%x\n",
3084 cmd, cmd->err_info->ScsiStatus);
1a614f50 3085 return error_value;
03bbfee5
MMOD		 3086 }
3087
3088 /* check the sense key */
3089 sense_key = 0xf & cmd->err_info->SenseInfo[2];
3090 /* no status or recovered error */
33659ebb
CH		 3091 if (((sense_key == 0x0) || (sense_key == 0x1)) &&
3092 (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
1a614f50 3093 error_value = 0;
03bbfee5 3094
0a9279cc 3095 if (check_for_unit_attention(h, cmd)) {
33659ebb 3096 *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
0a9279cc
MM		 3097 return 0;
3098 }
3099
33659ebb
CH		 3100 /* Not SG_IO or similar? */
3101 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
1a614f50 3102 if (error_value != 0)
b2a4a43d 3103 dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
03bbfee5 3104 " sense key = 0x%x\n", cmd, sense_key);
1a614f50 3105 return error_value;
03bbfee5
MMOD		 3106 }
3107
3108 /* SG_IO or similar, copy sense data back */
3109 if (cmd->rq->sense) {
3110 if (cmd->rq->sense_len > cmd->err_info->SenseLen)
3111 cmd->rq->sense_len = cmd->err_info->SenseLen;
3112 memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
3113 cmd->rq->sense_len);
3114 } else
3115 cmd->rq->sense_len = 0;
3116
1a614f50 3117 return error_value;
03bbfee5
MMOD		 3118}
3119
7c832835 3120/* checks the status of the job and calls complete buffers to mark all
a9925a06
JA		 3121 * buffers for the completed job. Note that this function does not need
3122 * to hold the hba/queue lock.
7c832835
BH		 3123 */
3124static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
3125 int timeout)
1da177e4 3126{
1da177e4 3127 int retry_cmd = 0;
198b7660
MMOD		 3128 struct request *rq = cmd->rq;
3129
3130 rq->errors = 0;
7c832835 3131
1da177e4 3132 if (timeout)
1a614f50 3133 rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
1da177e4 3134
d38ae168
MMOD		 3135 if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
3136 goto after_error_processing;
7c832835 3137
d38ae168 3138 switch (cmd->err_info->CommandStatus) {
d38ae168 3139 case CMD_TARGET_STATUS:
0a9279cc 3140 rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
d38ae168
MMOD		 3141 break;
3142 case CMD_DATA_UNDERRUN:
33659ebb 3143 if (cmd->rq->cmd_type == REQ_TYPE_FS) {
b2a4a43d 3144 dev_warn(&h->pdev->dev, "cmd %p has"
03bbfee5
MMOD		 3145 " completed with data underrun "
3146 "reported\n", cmd);
c3a4d78c 3147 cmd->rq->resid_len = cmd->err_info->ResidualCnt;
03bbfee5 3148 }
d38ae168
MMOD		 3149 break;
3150 case CMD_DATA_OVERRUN:
33659ebb 3151 if (cmd->rq->cmd_type == REQ_TYPE_FS)
b2a4a43d 3152 dev_warn(&h->pdev->dev, "cciss: cmd %p has"
03bbfee5
MMOD		 3153 " completed with data overrun "
3154 "reported\n", cmd);
d38ae168
MMOD		 3155 break;
3156 case CMD_INVALID:
b2a4a43d 3157 dev_warn(&h->pdev->dev, "cciss: cmd %p is "
d38ae168 3158 "reported invalid\n", cmd);
1a614f50
SC		 3159 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3160 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3161 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3162 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3163 break;
3164 case CMD_PROTOCOL_ERR:
b2a4a43d
SC		 3165 dev_warn(&h->pdev->dev, "cciss: cmd %p has "
3166 "protocol error\n", cmd);
1a614f50
SC		 3167 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3168 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3169 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3170 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3171 break;
3172 case CMD_HARDWARE_ERR:
b2a4a43d 3173 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
d38ae168 3174 " hardware error\n", cmd);
1a614f50
SC		 3175 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3176 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3177 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3178 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3179 break;
3180 case CMD_CONNECTION_LOST:
b2a4a43d 3181 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
d38ae168 3182 "connection lost\n", cmd);
1a614f50
SC		 3183 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3184 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3185 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3186 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3187 break;
3188 case CMD_ABORTED:
b2a4a43d 3189 dev_warn(&h->pdev->dev, "cciss: cmd %p was "
d38ae168 3190 "aborted\n", cmd);
1a614f50
SC		 3191 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3192 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3193 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3194 DID_PASSTHROUGH : DID_ABORT);
d38ae168
MMOD		 3195 break;
3196 case CMD_ABORT_FAILED:
b2a4a43d 3197 dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
d38ae168 3198 "abort failed\n", cmd);
1a614f50
SC		 3199 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3200 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3201 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3202 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3203 break;
3204 case CMD_UNSOLICITED_ABORT:
b2a4a43d 3205 dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
d38ae168
MMOD		 3206 "abort %p\n", h->ctlr, cmd);
3207 if (cmd->retry_count < MAX_CMD_RETRIES) {
3208 retry_cmd = 1;
b2a4a43d 3209 dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
d38ae168
MMOD		 3210 cmd->retry_count++;
3211 } else
b2a4a43d
SC		 3212 dev_warn(&h->pdev->dev,
3213 "%p retried too many times\n", cmd);
1a614f50
SC		 3214 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3215 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3216 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3217 DID_PASSTHROUGH : DID_ABORT);
d38ae168
MMOD		 3218 break;
3219 case CMD_TIMEOUT:
b2a4a43d 3220 dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
1a614f50
SC		 3221 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3222 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3223 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3224 DID_PASSTHROUGH : DID_ERROR);
d38ae168 3225 break;
6d9a4f9e
SC		 3226 case CMD_UNABORTABLE:
3227 dev_warn(&h->pdev->dev, "cmd %p unabortable\n", cmd);
3228 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3229 cmd->err_info->CommandStatus, DRIVER_OK,
3230 cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC ?
3231 DID_PASSTHROUGH : DID_ERROR);
3232 break;
d38ae168 3233 default:
b2a4a43d 3234 dev_warn(&h->pdev->dev, "cmd %p returned "
d38ae168
MMOD		 3235 "unknown status %x\n", cmd,
3236 cmd->err_info->CommandStatus);
1a614f50
SC		 3237 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3238 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3239 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3240 DID_PASSTHROUGH : DID_ERROR);
1da177e4 3241 }
d38ae168
MMOD		 3242
3243after_error_processing:
3244
1da177e4 3245 /* We need to return this command */
7c832835
BH		 3246 if (retry_cmd) {
3247 resend_cciss_cmd(h, cmd);
1da177e4 3248 return;
7c832835 3249 }
03bbfee5 3250 cmd->rq->completion_data = cmd;
a9925a06 3251 blk_complete_request(cmd->rq);
1da177e4
LT		 3252}
3253
0c2b3908
MM		 3254static inline u32 cciss_tag_contains_index(u32 tag)
3255{
5e216153 3256#define DIRECT_LOOKUP_BIT 0x10
0c2b3908
MM		 3257 return tag & DIRECT_LOOKUP_BIT;
3258}
3259
3260static inline u32 cciss_tag_to_index(u32 tag)
3261{
5e216153 3262#define DIRECT_LOOKUP_SHIFT 5
0c2b3908
MM		 3263 return tag >> DIRECT_LOOKUP_SHIFT;
3264}
3265
0498cc2a 3266static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag)
0c2b3908 3267{
0498cc2a
SC		 3268#define CCISS_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3269#define CCISS_SIMPLE_ERROR_BITS 0x03
3270 if (likely(h->transMethod & CFGTBL_Trans_Performant))
3271 return tag & ~CCISS_PERF_ERROR_BITS;
3272 return tag & ~CCISS_SIMPLE_ERROR_BITS;
0c2b3908
MM		 3273}
3274
3275static inline void cciss_mark_tag_indexed(u32 *tag)
3276{
3277 *tag |= DIRECT_LOOKUP_BIT;
3278}
3279
3280static inline void cciss_set_tag_index(u32 *tag, u32 index)
3281{
3282 *tag |= (index << DIRECT_LOOKUP_SHIFT);
3283}
3284
7c832835
BH		 3285/*
3286 * Get a request and submit it to the controller.
1da177e4 3287 */
165125e1 3288static void do_cciss_request(struct request_queue *q)
1da177e4 3289{
7c832835 3290 ctlr_info_t *h = q->queuedata;
1da177e4 3291 CommandList_struct *c;
00988a35
MMOD		 3292 sector_t start_blk;
3293 int seg;
1da177e4
LT		 3294 struct request *creq;
3295 u64bit temp64;
5c07a311
DB		 3296 struct scatterlist *tmp_sg;
3297 SGDescriptor_struct *curr_sg;
1da177e4
LT		 3298 drive_info_struct *drv;
3299 int i, dir;
5c07a311
DB		 3300 int sg_index = 0;
3301 int chained = 0;
1da177e4 3302
7c832835 3303 queue:
9934c8c0 3304 creq = blk_peek_request(q);
1da177e4
LT		 3305 if (!creq)
3306 goto startio;
3307
5c07a311 3308 BUG_ON(creq->nr_phys_segments > h->maxsgentries);
1da177e4 3309
6b4d96b8
SC		 3310 c = cmd_alloc(h);
3311 if (!c)
1da177e4
LT		 3312 goto full;
3313
9934c8c0 3314 blk_start_request(creq);
1da177e4 3315
5c07a311 3316 tmp_sg = h->scatter_list[c->cmdindex];
1da177e4
LT		 3317 spin_unlock_irq(q->queue_lock);
3318
3319 c->cmd_type = CMD_RWREQ;
3320 c->rq = creq;
7c832835
BH		 3321
3322 /* fill in the request */
1da177e4 3323 drv = creq->rq_disk->private_data;
b028461d 3324 c->Header.ReplyQueue = 0; /* unused in simple mode */
33079b21
MM		 3325 /* got command from pool, so use the command block index instead */
3326 /* for direct lookups. */
3327 /* The first 2 bits are reserved for controller error reporting. */
0c2b3908
MM		 3328 cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
3329 cciss_mark_tag_indexed(&c->Header.Tag.lower);
39ccf9a6 3330 memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
b028461d 3331 c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
3332 c->Request.Type.Type = TYPE_CMD; /* It is a command. */
7c832835
BH		 3333 c->Request.Type.Attribute = ATTR_SIMPLE;
3334 c->Request.Type.Direction =
a52de245 3335 (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
b028461d 3336 c->Request.Timeout = 0; /* Don't time out */
7c832835 3337 c->Request.CDB[0] =
00988a35 3338 (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
83096ebf 3339 start_blk = blk_rq_pos(creq);
b2a4a43d 3340 dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
83096ebf 3341 (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
5c07a311 3342 sg_init_table(tmp_sg, h->maxsgentries);
1da177e4
LT		 3343 seg = blk_rq_map_sg(q, creq, tmp_sg);
3344
7c832835 3345 /* get the DMA records for the setup */
1da177e4
LT		 3346 if (c->Request.Type.Direction == XFER_READ)
3347 dir = PCI_DMA_FROMDEVICE;
3348 else
3349 dir = PCI_DMA_TODEVICE;
3350
5c07a311
DB		 3351 curr_sg = c->SG;
3352 sg_index = 0;
3353 chained = 0;
3354
7c832835 3355 for (i = 0; i < seg; i++) {
5c07a311
DB		 3356 if (((sg_index+1) == (h->max_cmd_sgentries)) &&
3357 !chained && ((seg - i) > 1)) {
5c07a311 3358 /* Point to next chain block. */
dccc9b56 3359 curr_sg = h->cmd_sg_list[c->cmdindex];
5c07a311
DB		 3360 sg_index = 0;
3361 chained = 1;
3362 }
3363 curr_sg[sg_index].Len = tmp_sg[i].length;
45711f1a 3364 temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
5c07a311
DB		 3365 tmp_sg[i].offset,
3366 tmp_sg[i].length, dir);
3367 curr_sg[sg_index].Addr.lower = temp64.val32.lower;
3368 curr_sg[sg_index].Addr.upper = temp64.val32.upper;
3369 curr_sg[sg_index].Ext = 0; /* we are not chaining */
5c07a311 3370 ++sg_index;
1da177e4 3371 }
d45033ef
SC		 3372 if (chained)
3373 cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
3374 (seg - (h->max_cmd_sgentries - 1)) *
3375 sizeof(SGDescriptor_struct));
5c07a311 3376
7c832835
BH		 3377 /* track how many SG entries we are using */
3378 if (seg > h->maxSG)
3379 h->maxSG = seg;
1da177e4 3380
b2a4a43d 3381 dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
5c07a311
DB		 3382 "chained[%d]\n",
3383 blk_rq_sectors(creq), seg, chained);
1da177e4 3384
5e216153
MM		 3385 c->Header.SGTotal = seg + chained;
3386 if (seg <= h->max_cmd_sgentries)
3387 c->Header.SGList = c->Header.SGTotal;
3388 else
5c07a311 3389 c->Header.SGList = h->max_cmd_sgentries;
5e216153 3390 set_performant_mode(h, c);
5c07a311 3391
33659ebb 3392 if (likely(creq->cmd_type == REQ_TYPE_FS)) {
03bbfee5
MMOD		 3393 if(h->cciss_read == CCISS_READ_10) {
3394 c->Request.CDB[1] = 0;
b028461d 3395 c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
03bbfee5
MMOD		 3396 c->Request.CDB[3] = (start_blk >> 16) & 0xff;
3397 c->Request.CDB[4] = (start_blk >> 8) & 0xff;
3398 c->Request.CDB[5] = start_blk & 0xff;
b028461d 3399 c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
83096ebf
TH		 3400 c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
3401 c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
03bbfee5
MMOD		 3402 c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
3403 } else {
582539e5
RD		 3404 u32 upper32 = upper_32_bits(start_blk);
3405
03bbfee5
MMOD		 3406 c->Request.CDBLen = 16;
3407 c->Request.CDB[1]= 0;
b028461d 3408 c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
582539e5
RD		 3409 c->Request.CDB[3]= (upper32 >> 16) & 0xff;
3410 c->Request.CDB[4]= (upper32 >> 8) & 0xff;
3411 c->Request.CDB[5]= upper32 & 0xff;
03bbfee5
MMOD		 3412 c->Request.CDB[6]= (start_blk >> 24) & 0xff;
3413 c->Request.CDB[7]= (start_blk >> 16) & 0xff;
3414 c->Request.CDB[8]= (start_blk >> 8) & 0xff;
3415 c->Request.CDB[9]= start_blk & 0xff;
83096ebf
TH		 3416 c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
3417 c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
3418 c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
3419 c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
03bbfee5
MMOD		 3420 c->Request.CDB[14] = c->Request.CDB[15] = 0;
3421 }
33659ebb 3422 } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
03bbfee5
MMOD		 3423 c->Request.CDBLen = creq->cmd_len;
3424 memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
00988a35 3425 } else {
b2a4a43d
SC		 3426 dev_warn(&h->pdev->dev, "bad request type %d\n",
3427 creq->cmd_type);
03bbfee5 3428 BUG();
00988a35 3429 }
1da177e4
LT		 3430
3431 spin_lock_irq(q->queue_lock);
3432
8a3173de 3433 addQ(&h->reqQ, c);
1da177e4 3434 h->Qdepth++;
7c832835
BH		 3435 if (h->Qdepth > h->maxQsinceinit)
3436 h->maxQsinceinit = h->Qdepth;
1da177e4
LT		 3437
3438 goto queue;
00988a35 3439full:
1da177e4 3440 blk_stop_queue(q);
00988a35 3441startio:
1da177e4
LT		 3442 /* We will already have the driver lock here so not need
3443 * to lock it.
7c832835 3444 */
1da177e4
LT		 3445 start_io(h);
3446}
3447
3da8b713 3448static inline unsigned long get_next_completion(ctlr_info_t *h)
3449{
3da8b713 3450 return h->access.command_completed(h);
3da8b713 3451}
3452
3453static inline int interrupt_pending(ctlr_info_t *h)
3454{
3da8b713 3455 return h->access.intr_pending(h);
3da8b713 3456}
3457
3458static inline long interrupt_not_for_us(ctlr_info_t *h)
3459{
81125860 3460 return ((h->access.intr_pending(h) == 0) ||
2cf3af1c 3461 (h->interrupts_enabled == 0));
3da8b713 3462}
3463
0c2b3908
MM		 3464static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
3465 u32 raw_tag)
1da177e4 3466{
0c2b3908
MM		 3467 if (unlikely(tag_index >= h->nr_cmds)) {
3468 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3469 return 1;
3470 }
3471 return 0;
3472}
3473
3474static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
3475 u32 raw_tag)
3476{
3477 removeQ(c);
3478 if (likely(c->cmd_type == CMD_RWREQ))
3479 complete_command(h, c, 0);
3480 else if (c->cmd_type == CMD_IOCTL_PEND)
3481 complete(c->waiting);
3482#ifdef CONFIG_CISS_SCSI_TAPE
3483 else if (c->cmd_type == CMD_SCSI)
3484 complete_scsi_command(c, 0, raw_tag);
3485#endif
3486}
3487
29979a71
MM		 3488static inline u32 next_command(ctlr_info_t *h)
3489{
3490 u32 a;
3491
0498cc2a 3492 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
29979a71
MM		 3493 return h->access.command_completed(h);
3494
3495 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
3496 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
3497 (h->reply_pool_head)++;
3498 h->commands_outstanding--;
3499 } else {
3500 a = FIFO_EMPTY;
3501 }
3502 /* Check for wraparound */
3503 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
3504 h->reply_pool_head = h->reply_pool;
3505 h->reply_pool_wraparound ^= 1;
3506 }
3507 return a;
3508}
3509
0c2b3908
MM		 3510/* process completion of an indexed ("direct lookup") command */
3511static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
3512{
3513 u32 tag_index;
1da177e4 3514 CommandList_struct *c;
0c2b3908
MM		 3515
3516 tag_index = cciss_tag_to_index(raw_tag);
3517 if (bad_tag(h, tag_index, raw_tag))
5e216153 3518 return next_command(h);
0c2b3908
MM		 3519 c = h->cmd_pool + tag_index;
3520 finish_cmd(h, c, raw_tag);
5e216153 3521 return next_command(h);
0c2b3908
MM		 3522}
3523
3524/* process completion of a non-indexed command */
3525static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
3526{
0c2b3908 3527 CommandList_struct *c = NULL;
0c2b3908
MM		 3528 __u32 busaddr_masked, tag_masked;
3529
0498cc2a 3530 tag_masked = cciss_tag_discard_error_bits(h, raw_tag);
e6e1ee93 3531 list_for_each_entry(c, &h->cmpQ, list) {
0498cc2a 3532 busaddr_masked = cciss_tag_discard_error_bits(h, c->busaddr);
0c2b3908
MM		 3533 if (busaddr_masked == tag_masked) {
3534 finish_cmd(h, c, raw_tag);
5e216153 3535 return next_command(h);
0c2b3908
MM		 3536 }
3537 }
3538 bad_tag(h, h->nr_cmds + 1, raw_tag);
5e216153 3539 return next_command(h);
0c2b3908
MM		 3540}
3541
5afe2781
SC		 3542/* Some controllers, like p400, will give us one interrupt
3543 * after a soft reset, even if we turned interrupts off.
3544 * Only need to check for this in the cciss_xxx_discard_completions
3545 * functions.
3546 */
3547static int ignore_bogus_interrupt(ctlr_info_t *h)
3548{
3549 if (likely(!reset_devices))
3550 return 0;
3551
3552 if (likely(h->interrupts_enabled))
3553 return 0;
3554
3555 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3556 "(known firmware bug.) Ignoring.\n");
3557
3558 return 1;
3559}
3560
3561static irqreturn_t cciss_intx_discard_completions(int irq, void *dev_id)
3562{
3563 ctlr_info_t *h = dev_id;
3564 unsigned long flags;
3565 u32 raw_tag;
3566
3567 if (ignore_bogus_interrupt(h))
3568 return IRQ_NONE;
3569
3570 if (interrupt_not_for_us(h))
3571 return IRQ_NONE;
3572 spin_lock_irqsave(&h->lock, flags);
3573 while (interrupt_pending(h)) {
3574 raw_tag = get_next_completion(h);
3575 while (raw_tag != FIFO_EMPTY)
3576 raw_tag = next_command(h);
3577 }
3578 spin_unlock_irqrestore(&h->lock, flags);
3579 return IRQ_HANDLED;
3580}
3581
3582static irqreturn_t cciss_msix_discard_completions(int irq, void *dev_id)
3583{
3584 ctlr_info_t *h = dev_id;
3585 unsigned long flags;
3586 u32 raw_tag;
3587
3588 if (ignore_bogus_interrupt(h))
3589 return IRQ_NONE;
3590
3591 spin_lock_irqsave(&h->lock, flags);
3592 raw_tag = get_next_completion(h);
3593 while (raw_tag != FIFO_EMPTY)
3594 raw_tag = next_command(h);
3595 spin_unlock_irqrestore(&h->lock, flags);
3596 return IRQ_HANDLED;
3597}
3598
0c2b3908
MM		 3599static irqreturn_t do_cciss_intx(int irq, void *dev_id)
3600{
3601 ctlr_info_t *h = dev_id;
1da177e4 3602 unsigned long flags;
0c2b3908 3603 u32 raw_tag;
1da177e4 3604
3da8b713 3605 if (interrupt_not_for_us(h))
1da177e4 3606 return IRQ_NONE;
f70dba83 3607 spin_lock_irqsave(&h->lock, flags);
3da8b713 3608 while (interrupt_pending(h)) {
0c2b3908
MM		 3609 raw_tag = get_next_completion(h);
3610 while (raw_tag != FIFO_EMPTY) {
3611 if (cciss_tag_contains_index(raw_tag))
3612 raw_tag = process_indexed_cmd(h, raw_tag);
3613 else
3614 raw_tag = process_nonindexed_cmd(h, raw_tag);
1da177e4
LT		 3615 }
3616 }
f70dba83 3617 spin_unlock_irqrestore(&h->lock, flags);
0c2b3908
MM		 3618 return IRQ_HANDLED;
3619}
1da177e4 3620
0c2b3908
MM		 3621/* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
3622 * check the interrupt pending register because it is not set.
3623 */
3624static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
3625{
3626 ctlr_info_t *h = dev_id;
3627 unsigned long flags;
3628 u32 raw_tag;
8a3173de 3629
f70dba83 3630 spin_lock_irqsave(&h->lock, flags);
0c2b3908
MM		 3631 raw_tag = get_next_completion(h);
3632 while (raw_tag != FIFO_EMPTY) {
3633 if (cciss_tag_contains_index(raw_tag))
3634 raw_tag = process_indexed_cmd(h, raw_tag);
3635 else
3636 raw_tag = process_nonindexed_cmd(h, raw_tag);
1da177e4 3637 }
f70dba83 3638 spin_unlock_irqrestore(&h->lock, flags);
1da177e4
LT		 3639 return IRQ_HANDLED;
3640}
7c832835 3641
b368c9dd
AP		 3642/**
3643 * add_to_scan_list() - add controller to rescan queue
3644 * @h: Pointer to the controller.
3645 *
3646 * Adds the controller to the rescan queue if not already on the queue.
3647 *
3648 * returns 1 if added to the queue, 0 if skipped (could be on the
3649 * queue already, or the controller could be initializing or shutting
3650 * down).
3651 **/
3652static int add_to_scan_list(struct ctlr_info *h)
3653{
3654 struct ctlr_info *test_h;
3655 int found = 0;
3656 int ret = 0;
3657
3658 if (h->busy_initializing)
3659 return 0;
3660
3661 if (!mutex_trylock(&h->busy_shutting_down))
3662 return 0;
3663
3664 mutex_lock(&scan_mutex);
3665 list_for_each_entry(test_h, &scan_q, scan_list) {
3666 if (test_h == h) {
3667 found = 1;
3668 break;
3669 }
3670 }
3671 if (!found && !h->busy_scanning) {
16735d02 3672 reinit_completion(&h->scan_wait);
b368c9dd
AP		 3673 list_add_tail(&h->scan_list, &scan_q);
3674 ret = 1;
3675 }
3676 mutex_unlock(&scan_mutex);
3677 mutex_unlock(&h->busy_shutting_down);
3678
3679 return ret;
3680}
3681
3682/**
3683 * remove_from_scan_list() - remove controller from rescan queue
3684 * @h: Pointer to the controller.
3685 *
3686 * Removes the controller from the rescan queue if present. Blocks if
fd8489cf
SC		 3687 * the controller is currently conducting a rescan. The controller
3688 * can be in one of three states:
3689 * 1. Doesn't need a scan
3690 * 2. On the scan list, but not scanning yet (we remove it)
3691 * 3. Busy scanning (and not on the list). In this case we want to wait for
3692 * the scan to complete to make sure the scanning thread for this
3693 * controller is completely idle.
b368c9dd
AP		 3694 **/
3695static void remove_from_scan_list(struct ctlr_info *h)
3696{
3697 struct ctlr_info *test_h, *tmp_h;
b368c9dd
AP		 3698
3699 mutex_lock(&scan_mutex);
3700 list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
fd8489cf 3701 if (test_h == h) { /* state 2. */
b368c9dd
AP		 3702 list_del(&h->scan_list);
3703 complete_all(&h->scan_wait);
3704 mutex_unlock(&scan_mutex);
3705 return;
3706 }
3707 }
fd8489cf
SC		 3708 if (h->busy_scanning) { /* state 3. */
3709 mutex_unlock(&scan_mutex);
b368c9dd 3710 wait_for_completion(&h->scan_wait);
fd8489cf
SC		 3711 } else { /* state 1, nothing to do. */
3712 mutex_unlock(&scan_mutex);
3713 }
b368c9dd
AP		 3714}
3715
3716/**
3717 * scan_thread() - kernel thread used to rescan controllers
3718 * @data: Ignored.
3719 *
3720 * A kernel thread used scan for drive topology changes on
3721 * controllers. The thread processes only one controller at a time
3722 * using a queue. Controllers are added to the queue using
3723 * add_to_scan_list() and removed from the queue either after done
3724 * processing or using remove_from_scan_list().
3725 *
3726 * returns 0.
3727 **/
0a9279cc
MM		 3728static int scan_thread(void *data)
3729{
b368c9dd 3730 struct ctlr_info *h;
0a9279cc 3731
b368c9dd
AP		 3732 while (1) {
3733 set_current_state(TASK_INTERRUPTIBLE);
3734 schedule();
0a9279cc
MM		 3735 if (kthread_should_stop())
3736 break;
b368c9dd
AP		 3737
3738 while (1) {
3739 mutex_lock(&scan_mutex);
3740 if (list_empty(&scan_q)) {
3741 mutex_unlock(&scan_mutex);
3742 break;
3743 }
3744
3745 h = list_entry(scan_q.next,
3746 struct ctlr_info,
3747 scan_list);
3748 list_del(&h->scan_list);
3749 h->busy_scanning = 1;
3750 mutex_unlock(&scan_mutex);
3751
d06dfbd2
SC		 3752 rebuild_lun_table(h, 0, 0);
3753 complete_all(&h->scan_wait);
3754 mutex_lock(&scan_mutex);
3755 h->busy_scanning = 0;
3756 mutex_unlock(&scan_mutex);
b368c9dd 3757 }
0a9279cc 3758 }
b368c9dd 3759
0a9279cc
MM		 3760 return 0;
3761}
3762
3763static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
3764{
3765 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
3766 return 0;
3767
3768 switch (c->err_info->SenseInfo[12]) {
3769 case STATE_CHANGED:
b2a4a43d
SC		 3770 dev_warn(&h->pdev->dev, "a state change "
3771 "detected, command retried\n");
0a9279cc
MM		 3772 return 1;
3773 break;
3774 case LUN_FAILED:
b2a4a43d
SC		 3775 dev_warn(&h->pdev->dev, "LUN failure "
3776 "detected, action required\n");
0a9279cc
MM		 3777 return 1;
3778 break;
3779 case REPORT_LUNS_CHANGED:
b2a4a43d 3780 dev_warn(&h->pdev->dev, "report LUN data changed\n");
da002184
SC		 3781 /*
3782 * Here, we could call add_to_scan_list and wake up the scan thread,
3783 * except that it's quite likely that we will get more than one
3784 * REPORT_LUNS_CHANGED condition in quick succession, which means
3785 * that those which occur after the first one will likely happen
3786 * *during* the scan_thread's rescan. And the rescan code is not
3787 * robust enough to restart in the middle, undoing what it has already
3788 * done, and it's not clear that it's even possible to do this, since
3789 * part of what it does is notify the block layer, which starts
3790 * doing it's own i/o to read partition tables and so on, and the
3791 * driver doesn't have visibility to know what might need undoing.
3792 * In any event, if possible, it is horribly complicated to get right
3793 * so we just don't do it for now.
3794 *
3795 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
3796 */
0a9279cc
MM		 3797 return 1;
3798 break;
3799 case POWER_OR_RESET:
b2a4a43d
SC		 3800 dev_warn(&h->pdev->dev,
3801 "a power on or device reset detected\n");
0a9279cc
MM		 3802 return 1;
3803 break;
3804 case UNIT_ATTENTION_CLEARED:
b2a4a43d
SC		 3805 dev_warn(&h->pdev->dev,
3806 "unit attention cleared by another initiator\n");
0a9279cc
MM		 3807 return 1;
3808 break;
3809 default:
b2a4a43d
SC		 3810 dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
3811 return 1;
0a9279cc
MM		 3812 }
3813}
3814
7c832835 3815/*
d14c4ab5 3816 * We cannot read the structure directly, for portability we must use
1da177e4 3817 * the io functions.
7c832835 3818 * This is for debug only.
1da177e4 3819 */
b2a4a43d 3820static void print_cfg_table(ctlr_info_t *h)
1da177e4
LT		 3821{
3822 int i;
3823 char temp_name[17];
b2a4a43d 3824 CfgTable_struct *tb = h->cfgtable;
1da177e4 3825
b2a4a43d
SC		 3826 dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
3827 dev_dbg(&h->pdev->dev, "------------------------------------\n");
7c832835 3828 for (i = 0; i < 4; i++)
1da177e4 3829 temp_name[i] = readb(&(tb->Signature[i]));
7c832835 3830 temp_name[4] = '\0';
b2a4a43d
SC		 3831 dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name);
3832 dev_dbg(&h->pdev->dev, " Spec Number = %d\n",
3833 readl(&(tb->SpecValence)));
3834 dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n",
7c832835 3835 readl(&(tb->TransportSupport)));
b2a4a43d 3836 dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n",
7c832835 3837 readl(&(tb->TransportActive)));
b2a4a43d 3838 dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n",
7c832835 3839 readl(&(tb->HostWrite.TransportRequest)));
b2a4a43d 3840 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n",
7c832835 3841 readl(&(tb->HostWrite.CoalIntDelay)));
b2a4a43d 3842 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n",
7c832835 3843 readl(&(tb->HostWrite.CoalIntCount)));
b2a4a43d 3844 dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n",
7c832835 3845 readl(&(tb->CmdsOutMax)));
b2a4a43d
SC		 3846 dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n",
3847 readl(&(tb->BusTypes)));
7c832835 3848 for (i = 0; i < 16; i++)
1da177e4
LT		 3849 temp_name[i] = readb(&(tb->ServerName[i]));
3850 temp_name[16] = '\0';
b2a4a43d
SC		 3851 dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name);
3852 dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n",
3853 readl(&(tb->HeartBeat)));
1da177e4 3854}
1da177e4 3855
7c832835 3856static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
1da177e4
LT		 3857{
3858 int i, offset, mem_type, bar_type;
7c832835 3859 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
1da177e4
LT		 3860 return 0;
3861 offset = 0;
7c832835
BH		 3862 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3863 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
1da177e4
LT		 3864 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3865 offset += 4;
3866 else {
3867 mem_type = pci_resource_flags(pdev, i) &
7c832835 3868 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
1da177e4 3869 switch (mem_type) {
7c832835
BH		 3870 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3871 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3872 offset += 4; /* 32 bit */
3873 break;
3874 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3875 offset += 8;
3876 break;
3877 default: /* reserved in PCI 2.2 */
b2a4a43d 3878 dev_warn(&pdev->dev,
7c832835
BH		 3879 "Base address is invalid\n");
3880 return -1;
1da177e4
LT		 3881 break;
3882 }
3883 }
7c832835
BH		 3884 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3885 return i + 1;
1da177e4
LT		 3886 }
3887 return -1;
3888}
3889
5e216153
MM		 3890/* Fill in bucket_map[], given nsgs (the max number of
3891 * scatter gather elements supported) and bucket[],
3892 * which is an array of 8 integers. The bucket[] array
3893 * contains 8 different DMA transfer sizes (in 16
3894 * byte increments) which the controller uses to fetch
3895 * commands. This function fills in bucket_map[], which
3896 * maps a given number of scatter gather elements to one of
3897 * the 8 DMA transfer sizes. The point of it is to allow the
3898 * controller to only do as much DMA as needed to fetch the
3899 * command, with the DMA transfer size encoded in the lower
3900 * bits of the command address.
3901 */
3902static void calc_bucket_map(int bucket[], int num_buckets,
3903 int nsgs, int *bucket_map)
3904{
3905 int i, j, b, size;
3906
3907 /* even a command with 0 SGs requires 4 blocks */
3908#define MINIMUM_TRANSFER_BLOCKS 4
3909#define NUM_BUCKETS 8
3910 /* Note, bucket_map must have nsgs+1 entries. */
3911 for (i = 0; i <= nsgs; i++) {
3912 /* Compute size of a command with i SG entries */
3913 size = i + MINIMUM_TRANSFER_BLOCKS;
3914 b = num_buckets; /* Assume the biggest bucket */
3915 /* Find the bucket that is just big enough */
3916 for (j = 0; j < 8; j++) {
3917 if (bucket[j] >= size) {
3918 b = j;
3919 break;
3920 }
3921 }
3922 /* for a command with i SG entries, use bucket b. */
3923 bucket_map[i] = b;
3924 }
3925}
3926
8d85fce7 3927static void cciss_wait_for_mode_change_ack(ctlr_info_t *h)
0f8a6a1e
SC		 3928{
3929 int i;
3930
3931 /* under certain very rare conditions, this can take awhile.
3932 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3933 * as we enter this code.) */
3934 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3935 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3936 break;
332c2f80 3937 usleep_range(10000, 20000);
0f8a6a1e
SC		 3938 }
3939}
3940
8d85fce7 3941static void cciss_enter_performant_mode(ctlr_info_t *h, u32 use_short_tags)
b9933135
SC		 3942{
3943 /* This is a bit complicated. There are 8 registers on
3944 * the controller which we write to to tell it 8 different
3945 * sizes of commands which there may be. It's a way of
3946 * reducing the DMA done to fetch each command. Encoded into
3947 * each command's tag are 3 bits which communicate to the controller
3948 * which of the eight sizes that command fits within. The size of
3949 * each command depends on how many scatter gather entries there are.
3950 * Each SG entry requires 16 bytes. The eight registers are programmed
3951 * with the number of 16-byte blocks a command of that size requires.
3952 * The smallest command possible requires 5 such 16 byte blocks.
3953 * the largest command possible requires MAXSGENTRIES + 4 16-byte
3954 * blocks. Note, this only extends to the SG entries contained
3955 * within the command block, and does not extend to chained blocks
3956 * of SG elements. bft[] contains the eight values we write to
3957 * the registers. They are not evenly distributed, but have more
3958 * sizes for small commands, and fewer sizes for larger commands.
3959 */
5e216153 3960 __u32 trans_offset;
b9933135 3961 int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
5e216153
MM		 3962 /*
3963 * 5 = 1 s/g entry or 4k
3964 * 6 = 2 s/g entry or 8k
3965 * 8 = 4 s/g entry or 16k
3966 * 10 = 6 s/g entry or 24k
3967 */
5e216153 3968 unsigned long register_value;
5e216153
MM		 3969 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
3970
5e216153
MM		 3971 h->reply_pool_wraparound = 1; /* spec: init to 1 */
3972
3973 /* Controller spec: zero out this buffer. */
3974 memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
3975 h->reply_pool_head = h->reply_pool;
3976
3977 trans_offset = readl(&(h->cfgtable->TransMethodOffset));
3978 calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
3979 h->blockFetchTable);
3980 writel(bft[0], &h->transtable->BlockFetch0);
3981 writel(bft[1], &h->transtable->BlockFetch1);
3982 writel(bft[2], &h->transtable->BlockFetch2);
3983 writel(bft[3], &h->transtable->BlockFetch3);
3984 writel(bft[4], &h->transtable->BlockFetch4);
3985 writel(bft[5], &h->transtable->BlockFetch5);
3986 writel(bft[6], &h->transtable->BlockFetch6);
3987 writel(bft[7], &h->transtable->BlockFetch7);
3988
3989 /* size of controller ring buffer */
3990 writel(h->max_commands, &h->transtable->RepQSize);
3991 writel(1, &h->transtable->RepQCount);
3992 writel(0, &h->transtable->RepQCtrAddrLow32);
3993 writel(0, &h->transtable->RepQCtrAddrHigh32);
3994 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
3995 writel(0, &h->transtable->RepQAddr0High32);
0498cc2a 3996 writel(CFGTBL_Trans_Performant | use_short_tags,
5e216153
MM		 3997 &(h->cfgtable->HostWrite.TransportRequest));
3998
5e216153 3999 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
0f8a6a1e 4000 cciss_wait_for_mode_change_ack(h);
5e216153 4001 register_value = readl(&(h->cfgtable->TransportActive));
b9933135 4002 if (!(register_value & CFGTBL_Trans_Performant))
b2a4a43d 4003 dev_warn(&h->pdev->dev, "cciss: unable to get board into"
5e216153 4004 " performant mode\n");
b9933135
SC		 4005}
4006
8d85fce7 4007static void cciss_put_controller_into_performant_mode(ctlr_info_t *h)
b9933135
SC		 4008{
4009 __u32 trans_support;
4010
13049537
JH		 4011 if (cciss_simple_mode)
4012 return;
4013
b9933135
SC		 4014 dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
4015 /* Attempt to put controller into performant mode if supported */
4016 /* Does board support performant mode? */
4017 trans_support = readl(&(h->cfgtable->TransportSupport));
4018 if (!(trans_support & PERFORMANT_MODE))
4019 return;
4020
b2a4a43d 4021 dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
b9933135
SC		 4022 /* Performant mode demands commands on a 32 byte boundary
4023 * pci_alloc_consistent aligns on page boundarys already.
4024 * Just need to check if divisible by 32
4025 */
4026 if ((sizeof(CommandList_struct) % 32) != 0) {
b2a4a43d 4027 dev_warn(&h->pdev->dev, "%s %d %s\n",
b9933135
SC		 4028 "cciss info: command size[",
4029 (int)sizeof(CommandList_struct),
4030 "] not divisible by 32, no performant mode..\n");
5e216153
MM		 4031 return;
4032 }
4033
b9933135
SC		 4034 /* Performant mode ring buffer and supporting data structures */
4035 h->reply_pool = (__u64 *)pci_alloc_consistent(
4036 h->pdev, h->max_commands * sizeof(__u64),
4037 &(h->reply_pool_dhandle));
4038
4039 /* Need a block fetch table for performant mode */
4040 h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
4041 sizeof(__u32)), GFP_KERNEL);
4042
4043 if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
4044 goto clean_up;
4045
0498cc2a
SC		 4046 cciss_enter_performant_mode(h,
4047 trans_support & CFGTBL_Trans_use_short_tags);
b9933135 4048
5e216153
MM		 4049 /* Change the access methods to the performant access methods */
4050 h->access = SA5_performant_access;
b9933135 4051 h->transMethod = CFGTBL_Trans_Performant;
5e216153
MM		 4052
4053 return;
4054clean_up:
4055 kfree(h->blockFetchTable);
4056 if (h->reply_pool)
4057 pci_free_consistent(h->pdev,
4058 h->max_commands * sizeof(__u64),
4059 h->reply_pool,
4060 h->reply_pool_dhandle);
4061 return;
4062
4063} /* cciss_put_controller_into_performant_mode */
4064
fb86a35b
MM		 4065/* If MSI/MSI-X is supported by the kernel we will try to enable it on
4066 * controllers that are capable. If not, we use IO-APIC mode.
4067 */
4068
8d85fce7 4069static void cciss_interrupt_mode(ctlr_info_t *h)
fb86a35b
MM		 4070{
4071#ifdef CONFIG_PCI_MSI
7c832835
BH		 4072 int err;
4073 struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
4074 {0, 2}, {0, 3}
4075 };
fb86a35b
MM		 4076
4077 /* Some boards advertise MSI but don't really support it */
f70dba83
SC		 4078 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
4079 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
fb86a35b
MM		 4080 goto default_int_mode;
4081
f70dba83
SC		 4082 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
4083 err = pci_enable_msix(h->pdev, cciss_msix_entries, 4);
7c832835 4084 if (!err) {
f70dba83
SC		 4085 h->intr[0] = cciss_msix_entries[0].vector;
4086 h->intr[1] = cciss_msix_entries[1].vector;
4087 h->intr[2] = cciss_msix_entries[2].vector;
4088 h->intr[3] = cciss_msix_entries[3].vector;
4089 h->msix_vector = 1;
7c832835
BH		 4090 return;
4091 }
4092 if (err > 0) {
b2a4a43d
SC		 4093 dev_warn(&h->pdev->dev,
4094 "only %d MSI-X vectors available\n", err);
1ecb9c0f 4095 goto default_int_mode;
7c832835 4096 } else {
b2a4a43d
SC		 4097 dev_warn(&h->pdev->dev,
4098 "MSI-X init failed %d\n", err);
1ecb9c0f 4099 goto default_int_mode;
7c832835
BH		 4100 }
4101 }
f70dba83
SC		 4102 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
4103 if (!pci_enable_msi(h->pdev))
4104 h->msi_vector = 1;
4105 else
b2a4a43d 4106 dev_warn(&h->pdev->dev, "MSI init failed\n");
7c832835 4107 }
1ecb9c0f 4108default_int_mode:
7c832835 4109#endif /* CONFIG_PCI_MSI */
fb86a35b 4110 /* if we get here we're going to use the default interrupt mode */
13049537 4111 h->intr[h->intr_mode] = h->pdev->irq;
fb86a35b
MM		 4112 return;
4113}
4114
8d85fce7 4115static int cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
1da177e4 4116{
6539fa9b
SC		 4117 int i;
4118 u32 subsystem_vendor_id, subsystem_device_id;
2ec24ff1
SC		 4119
4120 subsystem_vendor_id = pdev->subsystem_vendor;
4121 subsystem_device_id = pdev->subsystem_device;
6539fa9b
SC		 4122 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
4123 subsystem_vendor_id;
2ec24ff1 4124
e4292e05
MM		 4125 for (i = 0; i < ARRAY_SIZE(products); i++) {
4126 /* Stand aside for hpsa driver on request */
4127 if (cciss_allow_hpsa)
4128 return -ENODEV;
6539fa9b
SC		 4129 if (*board_id == products[i].board_id)
4130 return i;
e4292e05 4131 }
6539fa9b
SC		 4132 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
4133 *board_id);
4134 return -ENODEV;
4135}
1da177e4 4136
dd9c426e
SC		 4137static inline bool cciss_board_disabled(ctlr_info_t *h)
4138{
4139 u16 command;
1da177e4 4140
dd9c426e
SC		 4141 (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
4142 return ((command & PCI_COMMAND_MEMORY) == 0);
4143}
1da177e4 4144
8d85fce7
GKH		 4145static int cciss_pci_find_memory_BAR(struct pci_dev *pdev,
4146 unsigned long *memory_bar)
d474830d
SC		 4147{
4148 int i;
4e570309 4149
d474830d
SC		 4150 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
4151 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
4152 /* addressing mode bits already removed */
4153 *memory_bar = pci_resource_start(pdev, i);
4154 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
4155 *memory_bar);
4156 return 0;
4157 }
4158 dev_warn(&pdev->dev, "no memory BAR found\n");
4159 return -ENODEV;
4160}
1da177e4 4161
8d85fce7
GKH		 4162static int cciss_wait_for_board_state(struct pci_dev *pdev,
4163 void __iomem *vaddr, int wait_for_ready)
afa842fa
SC		 4164#define BOARD_READY 1
4165#define BOARD_NOT_READY 0
e99ba136 4166{
afa842fa 4167 int i, iterations;
e99ba136 4168 u32 scratchpad;
1da177e4 4169
afa842fa
SC		 4170 if (wait_for_ready)
4171 iterations = CCISS_BOARD_READY_ITERATIONS;
4172 else
4173 iterations = CCISS_BOARD_NOT_READY_ITERATIONS;
4174
4175 for (i = 0; i < iterations; i++) {
4176 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
4177 if (wait_for_ready) {
4178 if (scratchpad == CCISS_FIRMWARE_READY)
4179 return 0;
4180 } else {
4181 if (scratchpad != CCISS_FIRMWARE_READY)
4182 return 0;
4183 }
e99ba136 4184 msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
e1438581 4185 }
afa842fa 4186 dev_warn(&pdev->dev, "board not ready, timed out.\n");
e99ba136
SC		 4187 return -ENODEV;
4188}
e1438581 4189
8d85fce7
GKH		 4190static int cciss_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
4191 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4192 u64 *cfg_offset)
8e93bf6d
SC		 4193{
4194 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4195 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4196 *cfg_base_addr &= (u32) 0x0000ffff;
4197 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4198 if (*cfg_base_addr_index == -1) {
4199 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
4200 "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
4201 return -ENODEV;
4202 }
4203 return 0;
4204}
1da177e4 4205
8d85fce7 4206static int cciss_find_cfgtables(ctlr_info_t *h)
4809d098
SC		 4207{
4208 u64 cfg_offset;
4209 u32 cfg_base_addr;
4210 u64 cfg_base_addr_index;
4211 u32 trans_offset;
8e93bf6d 4212 int rc;
1da177e4 4213
8e93bf6d
SC		 4214 rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4215 &cfg_base_addr_index, &cfg_offset);
4216 if (rc)
4217 return rc;
4809d098 4218 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
d2b805d8 4219 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
4809d098
SC		 4220 if (!h->cfgtable)
4221 return -ENOMEM;
62710ae1
SC		 4222 rc = write_driver_ver_to_cfgtable(h->cfgtable);
4223 if (rc)
4224 return rc;
4809d098 4225 /* Find performant mode table. */
8e93bf6d 4226 trans_offset = readl(&h->cfgtable->TransMethodOffset);
4809d098
SC		 4227 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4228 cfg_base_addr_index)+cfg_offset+trans_offset,
4229 sizeof(*h->transtable));
4230 if (!h->transtable)
4231 return -ENOMEM;
4232 return 0;
4233}
1da177e4 4234
8d85fce7 4235static void cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
adfbc1ff
SC		 4236{
4237 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
186fb9cf
SC		 4238
4239 /* Limit commands in memory limited kdump scenario. */
4240 if (reset_devices && h->max_commands > 32)
4241 h->max_commands = 32;
4242
adfbc1ff
SC		 4243 if (h->max_commands < 16) {
4244 dev_warn(&h->pdev->dev, "Controller reports "
4245 "max supported commands of %d, an obvious lie. "
4246 "Using 16. Ensure that firmware is up to date.\n",
4247 h->max_commands);
4248 h->max_commands = 16;
1da177e4 4249 }
adfbc1ff 4250}
1da177e4 4251
afadbf4b
SC		 4252/* Interrogate the hardware for some limits:
4253 * max commands, max SG elements without chaining, and with chaining,
4254 * SG chain block size, etc.
4255 */
8d85fce7 4256static void cciss_find_board_params(ctlr_info_t *h)
afadbf4b 4257{
adfbc1ff 4258 cciss_get_max_perf_mode_cmds(h);
8a4ec67b 4259 h->nr_cmds = h->max_commands - 4 - cciss_tape_cmds;
afadbf4b 4260 h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
e7b18ede
MM		 4261 /*
4262 * The P600 may exhibit poor performnace under some workloads
4263 * if we use the value in the configuration table. Limit this
4264 * controller to MAXSGENTRIES (32) instead.
4265 */
4266 if (h->board_id == 0x3225103C)
4267 h->maxsgentries = MAXSGENTRIES;
5c07a311 4268 /*
afadbf4b 4269 * Limit in-command s/g elements to 32 save dma'able memory.
5c07a311
DB		 4270 * Howvever spec says if 0, use 31
4271 */
afadbf4b
SC		 4272 h->max_cmd_sgentries = 31;
4273 if (h->maxsgentries > 512) {
4274 h->max_cmd_sgentries = 32;
4275 h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
4276 h->maxsgentries--; /* save one for chain pointer */
5c07a311 4277 } else {
afadbf4b
SC		 4278 h->maxsgentries = 31; /* default to traditional values */
4279 h->chainsize = 0;
5c07a311 4280 }
afadbf4b 4281}
5c07a311 4282
501b92cd
SC		 4283static inline bool CISS_signature_present(ctlr_info_t *h)
4284{
d48c152a 4285 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
501b92cd
SC		 4286 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4287 return false;
1da177e4 4288 }
501b92cd
SC		 4289 return true;
4290}
4291
322e304c
SC		 4292/* Need to enable prefetch in the SCSI core for 6400 in x86 */
4293static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
4294{
1da177e4 4295#ifdef CONFIG_X86
322e304c
SC		 4296 u32 prefetch;
4297
4298 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4299 prefetch |= 0x100;
4300 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
1da177e4 4301#endif
322e304c 4302}
1da177e4 4303
bfd63ee5
SC		 4304/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4305 * in a prefetch beyond physical memory.
4306 */
4307static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
4308{
4309 u32 dma_prefetch;
4310 __u32 dma_refetch;
4311
4312 if (h->board_id != 0x3225103C)
4313 return;
4314 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4315 dma_prefetch |= 0x8000;
4316 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4317 pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
4318 dma_refetch |= 0x1;
4319 pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
4320}
4321
8d85fce7 4322static int cciss_pci_init(ctlr_info_t *h)
6539fa9b 4323{
4809d098 4324 int prod_index, err;
6539fa9b 4325
f70dba83 4326 prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
6539fa9b 4327 if (prod_index < 0)
2ec24ff1 4328 return -ENODEV;
f70dba83
SC		 4329 h->product_name = products[prod_index].product_name;
4330 h->access = *(products[prod_index].access);
1da177e4 4331
f70dba83 4332 if (cciss_board_disabled(h)) {
b2a4a43d 4333 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
c33ac89b 4334 return -ENODEV;
1da177e4 4335 }
19373358
MG		 4336
4337 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
4338 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
4339
f70dba83 4340 err = pci_enable_device(h->pdev);
7c832835 4341 if (err) {
b2a4a43d 4342 dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
c33ac89b 4343 return err;
f92e2f5f
MM		 4344 }
4345
f70dba83 4346 err = pci_request_regions(h->pdev, "cciss");
4e570309 4347 if (err) {
b2a4a43d
SC		 4348 dev_warn(&h->pdev->dev,
4349 "Cannot obtain PCI resources, aborting\n");
872225ca 4350 return err;
4e570309 4351 }
1da177e4 4352
b2a4a43d
SC		 4353 dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
4354 dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
1da177e4 4355
fb86a35b
MM		 4356/* If the kernel supports MSI/MSI-X we will try to enable that functionality,
4357 * else we use the IO-APIC interrupt assigned to us by system ROM.
4358 */
f70dba83
SC		 4359 cciss_interrupt_mode(h);
4360 err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
d474830d 4361 if (err)
e1438581 4362 goto err_out_free_res;
f70dba83
SC		 4363 h->vaddr = remap_pci_mem(h->paddr, 0x250);
4364 if (!h->vaddr) {
da550321
SC		 4365 err = -ENOMEM;
4366 goto err_out_free_res;
7c832835 4367 }
afa842fa 4368 err = cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
e99ba136 4369 if (err)
4e570309 4370 goto err_out_free_res;
f70dba83 4371 err = cciss_find_cfgtables(h);
4809d098 4372 if (err)
4e570309 4373 goto err_out_free_res;
b2a4a43d 4374 print_cfg_table(h);
f70dba83 4375 cciss_find_board_params(h);
1da177e4 4376
f70dba83 4377 if (!CISS_signature_present(h)) {
c33ac89b 4378 err = -ENODEV;
4e570309 4379 goto err_out_free_res;
1da177e4 4380 }
f70dba83
SC		 4381 cciss_enable_scsi_prefetch(h);
4382 cciss_p600_dma_prefetch_quirk(h);
13049537
JH		 4383 err = cciss_enter_simple_mode(h);
4384 if (err)
4385 goto err_out_free_res;
f70dba83 4386 cciss_put_controller_into_performant_mode(h);
1da177e4
LT		 4387 return 0;
4388
5faad620 4389err_out_free_res:
872225ca
MM		 4390 /*
4391 * Deliberately omit pci_disable_device(): it does something nasty to
4392 * Smart Array controllers that pci_enable_device does not undo
4393 */
f70dba83
SC		 4394 if (h->transtable)
4395 iounmap(h->transtable);
4396 if (h->cfgtable)
4397 iounmap(h->cfgtable);
4398 if (h->vaddr)
4399 iounmap(h->vaddr);
4400 pci_release_regions(h->pdev);
c33ac89b 4401 return err;
1da177e4
LT		 4402}
4403
6ae5ce8e
MM		 4404/* Function to find the first free pointer into our hba[] array
4405 * Returns -1 if no free entries are left.
7c832835 4406 */
b2a4a43d 4407static int alloc_cciss_hba(struct pci_dev *pdev)
1da177e4 4408{
799202cb 4409 int i;
1da177e4 4410
7c832835 4411 for (i = 0; i < MAX_CTLR; i++) {
1da177e4 4412 if (!hba[i]) {
f70dba83 4413 ctlr_info_t *h;
f2912a12 4414
f70dba83
SC		 4415 h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
4416 if (!h)
1da177e4 4417 goto Enomem;
f70dba83 4418 hba[i] = h;
1da177e4
LT		 4419 return i;
4420 }
4421 }
b2a4a43d 4422 dev_warn(&pdev->dev, "This driver supports a maximum"
7c832835 4423 " of %d controllers.\n", MAX_CTLR);
799202cb
MM		 4424 return -1;
4425Enomem:
b2a4a43d 4426 dev_warn(&pdev->dev, "out of memory.\n");
1da177e4
LT		 4427 return -1;
4428}
4429
f70dba83 4430static void free_hba(ctlr_info_t *h)
1da177e4 4431{
2c935593 4432 int i;
1da177e4 4433
f70dba83 4434 hba[h->ctlr] = NULL;
2c935593
SC		 4435 for (i = 0; i < h->highest_lun + 1; i++)
4436 if (h->gendisk[i] != NULL)
4437 put_disk(h->gendisk[i]);
4438 kfree(h);
1da177e4
LT		 4439}
4440
82eb03cf 4441/* Send a message CDB to the firmware. */
8d85fce7
GKH		 4442static int cciss_message(struct pci_dev *pdev, unsigned char opcode,
4443 unsigned char type)
82eb03cf
CC		 4444{
4445 typedef struct {
4446 CommandListHeader_struct CommandHeader;
4447 RequestBlock_struct Request;
4448 ErrDescriptor_struct ErrorDescriptor;
4449 } Command;
4450 static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
4451 Command *cmd;
4452 dma_addr_t paddr64;
4453 uint32_t paddr32, tag;
4454 void __iomem *vaddr;
4455 int i, err;
4456
4457 vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
4458 if (vaddr == NULL)
4459 return -ENOMEM;
4460
4461 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
4462 CCISS commands, so they must be allocated from the lower 4GiB of
4463 memory. */
e930438c 4464 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
82eb03cf
CC		 4465 if (err) {
4466 iounmap(vaddr);
4467 return -ENOMEM;
4468 }
4469
4470 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
4471 if (cmd == NULL) {
4472 iounmap(vaddr);
4473 return -ENOMEM;
4474 }
4475
4476 /* This must fit, because of the 32-bit consistent DMA mask. Also,
4477 although there's no guarantee, we assume that the address is at
4478 least 4-byte aligned (most likely, it's page-aligned). */
4479 paddr32 = paddr64;
4480
4481 cmd->CommandHeader.ReplyQueue = 0;
4482 cmd->CommandHeader.SGList = 0;
4483 cmd->CommandHeader.SGTotal = 0;
4484 cmd->CommandHeader.Tag.lower = paddr32;
4485 cmd->CommandHeader.Tag.upper = 0;
4486 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
4487
4488 cmd->Request.CDBLen = 16;
4489 cmd->Request.Type.Type = TYPE_MSG;
4490 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
4491 cmd->Request.Type.Direction = XFER_NONE;
4492 cmd->Request.Timeout = 0; /* Don't time out */
4493 cmd->Request.CDB[0] = opcode;
4494 cmd->Request.CDB[1] = type;
4495 memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
4496
4497 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
4498 cmd->ErrorDescriptor.Addr.upper = 0;
4499 cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
4500
4501 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
4502
4503 for (i = 0; i < 10; i++) {
4504 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
4505 if ((tag & ~3) == paddr32)
4506 break;
3e28601f 4507 msleep(CCISS_POST_RESET_NOOP_TIMEOUT_MSECS);
82eb03cf
CC		 4508 }
4509
4510 iounmap(vaddr);
4511
4512 /* we leak the DMA buffer here ... no choice since the controller could
4513 still complete the command. */
4514 if (i == 10) {
b2a4a43d
SC		 4515 dev_err(&pdev->dev,
4516 "controller message %02x:%02x timed out\n",
82eb03cf
CC		 4517 opcode, type);
4518 return -ETIMEDOUT;
4519 }
4520
4521 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
4522
4523 if (tag & 2) {
b2a4a43d 4524 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
82eb03cf
CC		 4525 opcode, type);
4526 return -EIO;
4527 }
4528
b2a4a43d 4529 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
82eb03cf
CC		 4530 opcode, type);
4531 return 0;
4532}
4533
82eb03cf
CC		 4534#define cciss_noop(p) cciss_message(p, 3, 0)
4535
a6528d01 4536static int cciss_controller_hard_reset(struct pci_dev *pdev,
bf2e2e6b 4537 void * __iomem vaddr, u32 use_doorbell)
82eb03cf 4538{
a6528d01
SC		 4539 u16 pmcsr;
4540 int pos;
82eb03cf 4541
a6528d01
SC		 4542 if (use_doorbell) {
4543 /* For everything after the P600, the PCI power state method
4544 * of resetting the controller doesn't work, so we have this
4545 * other way using the doorbell register.
4546 */
4547 dev_info(&pdev->dev, "using doorbell to reset controller\n");
bf2e2e6b 4548 writel(use_doorbell, vaddr + SA5_DOORBELL);
a6528d01
SC		 4549 } else { /* Try to do it the PCI power state way */
4550
4551 /* Quoting from the Open CISS Specification: "The Power
4552 * Management Control/Status Register (CSR) controls the power
4553 * state of the device. The normal operating state is D0,
4554 * CSR=00h. The software off state is D3, CSR=03h. To reset
4555 * the controller, place the interface device in D3 then to D0,
4556 * this causes a secondary PCI reset which will reset the
4557 * controller." */
4558
4559 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
4560 if (pos == 0) {
4561 dev_err(&pdev->dev,
4562 "cciss_controller_hard_reset: "
4563 "PCI PM not supported\n");
4564 return -ENODEV;
4565 }
4566 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
4567 /* enter the D3hot power management state */
4568 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
4569 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4570 pmcsr |= PCI_D3hot;
4571 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
82eb03cf 4572
a6528d01 4573 msleep(500);
82eb03cf 4574
a6528d01
SC		 4575 /* enter the D0 power management state */
4576 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4577 pmcsr |= PCI_D0;
4578 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
ab5dbebe
MM		 4579
4580 /*
4581 * The P600 requires a small delay when changing states.
4582 * Otherwise we may think the board did not reset and we bail.
4583 * This for kdump only and is particular to the P600.
4584 */
4585 msleep(500);
a6528d01
SC		 4586 }
4587 return 0;
4588}
82eb03cf 4589
8d85fce7 4590static void init_driver_version(char *driver_version, int len)
62710ae1
SC		 4591{
4592 memset(driver_version, 0, len);
4593 strncpy(driver_version, "cciss " DRIVER_NAME, len - 1);
4594}
4595
8d85fce7 4596static int write_driver_ver_to_cfgtable(CfgTable_struct __iomem *cfgtable)
62710ae1
SC		 4597{
4598 char *driver_version;
4599 int i, size = sizeof(cfgtable->driver_version);
4600
4601 driver_version = kmalloc(size, GFP_KERNEL);
4602 if (!driver_version)
4603 return -ENOMEM;
4604
4605 init_driver_version(driver_version, size);
4606 for (i = 0; i < size; i++)
4607 writeb(driver_version[i], &cfgtable->driver_version[i]);
4608 kfree(driver_version);
4609 return 0;
4610}
4611
8d85fce7
GKH		 4612static void read_driver_ver_from_cfgtable(CfgTable_struct __iomem *cfgtable,
4613 unsigned char *driver_ver)
62710ae1
SC		 4614{
4615 int i;
4616
4617 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
4618 driver_ver[i] = readb(&cfgtable->driver_version[i]);
4619}
4620
8d85fce7 4621static int controller_reset_failed(CfgTable_struct __iomem *cfgtable)
62710ae1
SC		 4622{
4623
4624 char *driver_ver, *old_driver_ver;
4625 int rc, size = sizeof(cfgtable->driver_version);
4626
4627 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
4628 if (!old_driver_ver)
4629 return -ENOMEM;
4630 driver_ver = old_driver_ver + size;
4631
4632 /* After a reset, the 32 bytes of "driver version" in the cfgtable
4633 * should have been changed, otherwise we know the reset failed.
4634 */
4635 init_driver_version(old_driver_ver, size);
4636 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
4637 rc = !memcmp(driver_ver, old_driver_ver, size);
4638 kfree(old_driver_ver);
4639 return rc;
4640}
4641
a6528d01
SC		 4642/* This does a hard reset of the controller using PCI power management
4643 * states or using the doorbell register. */
8d85fce7 4644static int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
a6528d01 4645{
a6528d01
SC		 4646 u64 cfg_offset;
4647 u32 cfg_base_addr;
4648 u64 cfg_base_addr_index;
4649 void __iomem *vaddr;
4650 unsigned long paddr;
62710ae1 4651 u32 misc_fw_support;
f442e64b 4652 int rc;
a6528d01 4653 CfgTable_struct __iomem *cfgtable;
bf2e2e6b 4654 u32 use_doorbell;
058a0f9f 4655 u32 board_id;
f442e64b 4656 u16 command_register;
a6528d01
SC		 4657
4658 /* For controllers as old a the p600, this is very nearly
4659 * the same thing as
4660 *
4661 * pci_save_state(pci_dev);
4662 * pci_set_power_state(pci_dev, PCI_D3hot);
4663 * pci_set_power_state(pci_dev, PCI_D0);
4664 * pci_restore_state(pci_dev);
4665 *
a6528d01
SC		 4666 * For controllers newer than the P600, the pci power state
4667 * method of resetting doesn't work so we have another way
4668 * using the doorbell register.
4669 */
82eb03cf 4670
058a0f9f
SC		 4671 /* Exclude 640x boards. These are two pci devices in one slot
4672 * which share a battery backed cache module. One controls the
4673 * cache, the other accesses the cache through the one that controls
4674 * it. If we reset the one controlling the cache, the other will
4675 * likely not be happy. Just forbid resetting this conjoined mess.
4676 */
4677 cciss_lookup_board_id(pdev, &board_id);
ec52d5f1 4678 if (!ctlr_is_resettable(board_id)) {
058a0f9f
SC		 4679 dev_warn(&pdev->dev, "Cannot reset Smart Array 640x "
4680 "due to shared cache module.");
82eb03cf
CC		 4681 return -ENODEV;
4682 }
4683
ec52d5f1
SC		 4684 /* if controller is soft- but not hard resettable... */
4685 if (!ctlr_is_hard_resettable(board_id))
4686 return -ENOTSUPP; /* try soft reset later. */
4687
f442e64b
SC		 4688 /* Save the PCI command register */
4689 pci_read_config_word(pdev, 4, &command_register);
4690 /* Turn the board off. This is so that later pci_restore_state()
4691 * won't turn the board on before the rest of config space is ready.
4692 */
4693 pci_disable_device(pdev);
4694 pci_save_state(pdev);
82eb03cf 4695
a6528d01
SC		 4696 /* find the first memory BAR, so we can find the cfg table */
4697 rc = cciss_pci_find_memory_BAR(pdev, &paddr);
4698 if (rc)
4699 return rc;
4700 vaddr = remap_pci_mem(paddr, 0x250);
4701 if (!vaddr)
4702 return -ENOMEM;
82eb03cf 4703
a6528d01
SC		 4704 /* find cfgtable in order to check if reset via doorbell is supported */
4705 rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
4706 &cfg_base_addr_index, &cfg_offset);
4707 if (rc)
4708 goto unmap_vaddr;
4709 cfgtable = remap_pci_mem(pci_resource_start(pdev,
4710 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
4711 if (!cfgtable) {
4712 rc = -ENOMEM;
4713 goto unmap_vaddr;
4714 }
62710ae1
SC		 4715 rc = write_driver_ver_to_cfgtable(cfgtable);
4716 if (rc)
4717 goto unmap_vaddr;
82eb03cf 4718
bf2e2e6b
SC		 4719 /* If reset via doorbell register is supported, use that.
4720 * There are two such methods. Favor the newest method.
75230ff2 4721 */
bf2e2e6b
SC		 4722 misc_fw_support = readl(&cfgtable->misc_fw_support);
4723 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
4724 if (use_doorbell) {
4725 use_doorbell = DOORBELL_CTLR_RESET2;
4726 } else {
4727 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
063d2cf7
SC		 4728 if (use_doorbell) {
4729 dev_warn(&pdev->dev, "Controller claims that "
4730 "'Bit 2 doorbell reset' is "
4731 "supported, but not 'bit 5 doorbell reset'. "
4732 "Firmware update is recommended.\n");
4733 rc = -ENOTSUPP; /* use the soft reset */
4734 goto unmap_cfgtable;
4735 }
bf2e2e6b 4736 }
75230ff2 4737
a6528d01
SC		 4738 rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
4739 if (rc)
4740 goto unmap_cfgtable;
f442e64b
SC		 4741 pci_restore_state(pdev);
4742 rc = pci_enable_device(pdev);
4743 if (rc) {
4744 dev_warn(&pdev->dev, "failed to enable device.\n");
4745 goto unmap_cfgtable;
82eb03cf 4746 }
f442e64b 4747 pci_write_config_word(pdev, 4, command_register);
82eb03cf 4748
a6528d01
SC		 4749 /* Some devices (notably the HP Smart Array 5i Controller)
4750 need a little pause here */
4751 msleep(CCISS_POST_RESET_PAUSE_MSECS);
4752
afa842fa 4753 /* Wait for board to become not ready, then ready. */
59ec86bb 4754 dev_info(&pdev->dev, "Waiting for board to reset.\n");
afa842fa 4755 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
5afe2781
SC		 4756 if (rc) {
4757 dev_warn(&pdev->dev, "Failed waiting for board to hard reset."
4758 " Will try soft reset.\n");
4759 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
4760 goto unmap_cfgtable;
4761 }
afa842fa
SC		 4762 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_READY);
4763 if (rc) {
4764 dev_warn(&pdev->dev,
5afe2781
SC		 4765 "failed waiting for board to become ready "
4766 "after hard reset\n");
afa842fa
SC		 4767 goto unmap_cfgtable;
4768 }
afa842fa 4769
62710ae1
SC		 4770 rc = controller_reset_failed(vaddr);
4771 if (rc < 0)
4772 goto unmap_cfgtable;
4773 if (rc) {
5afe2781
SC		 4774 dev_warn(&pdev->dev, "Unable to successfully hard reset "
4775 "controller. Will try soft reset.\n");
4776 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
62710ae1 4777 } else {
5afe2781 4778 dev_info(&pdev->dev, "Board ready after hard reset.\n");
a6528d01
SC		 4779 }
4780
4781unmap_cfgtable:
4782 iounmap(cfgtable);
4783
4784unmap_vaddr:
4785 iounmap(vaddr);
4786 return rc;
82eb03cf
CC		 4787}
4788
8d85fce7 4789static int cciss_init_reset_devices(struct pci_dev *pdev)
83123cb1 4790{
a6528d01 4791 int rc, i;
83123cb1
SC		 4792
4793 if (!reset_devices)
4794 return 0;
4795
a6528d01
SC		 4796 /* Reset the controller with a PCI power-cycle or via doorbell */
4797 rc = cciss_kdump_hard_reset_controller(pdev);
83123cb1 4798
a6528d01
SC		 4799 /* -ENOTSUPP here means we cannot reset the controller
4800 * but it's already (and still) up and running in
058a0f9f
SC		 4801 * "performant mode". Or, it might be 640x, which can't reset
4802 * due to concerns about shared bbwc between 6402/6404 pair.
a6528d01
SC		 4803 */
4804 if (rc == -ENOTSUPP)
5afe2781 4805 return rc; /* just try to do the kdump anyhow. */
a6528d01
SC		 4806 if (rc)
4807 return -ENODEV;
83123cb1
SC		 4808
4809 /* Now try to get the controller to respond to a no-op */
59ec86bb 4810 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
83123cb1
SC		 4811 for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
4812 if (cciss_noop(pdev) == 0)
4813 break;
4814 else
4815 dev_warn(&pdev->dev, "no-op failed%s\n",
4816 (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
4817 "; re-trying" : ""));
4818 msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
4819 }
82eb03cf
CC		 4820 return 0;
4821}
4822
8d85fce7 4823static int cciss_allocate_cmd_pool(ctlr_info_t *h)
54dae343 4824{
1f118bc4 4825 h->cmd_pool_bits = kmalloc(BITS_TO_LONGS(h->nr_cmds) *
54dae343
SC		 4826 sizeof(unsigned long), GFP_KERNEL);
4827 h->cmd_pool = pci_alloc_consistent(h->pdev,
4828 h->nr_cmds * sizeof(CommandList_struct),
4829 &(h->cmd_pool_dhandle));
4830 h->errinfo_pool = pci_alloc_consistent(h->pdev,
4831 h->nr_cmds * sizeof(ErrorInfo_struct),
4832 &(h->errinfo_pool_dhandle));
4833 if ((h->cmd_pool_bits == NULL)
4834 || (h->cmd_pool == NULL)
4835 || (h->errinfo_pool == NULL)) {
4836 dev_err(&h->pdev->dev, "out of memory");
4837 return -ENOMEM;
4838 }
4839 return 0;
4840}
4841
8d85fce7 4842static int cciss_allocate_scatterlists(ctlr_info_t *h)
abf7966e
SC		 4843{
4844 int i;
4845
4846 /* zero it, so that on free we need not know how many were alloc'ed */
4847 h->scatter_list = kzalloc(h->max_commands *
4848 sizeof(struct scatterlist *), GFP_KERNEL);
4849 if (!h->scatter_list)
4850 return -ENOMEM;
4851
4852 for (i = 0; i < h->nr_cmds; i++) {
4853 h->scatter_list[i] = kmalloc(sizeof(struct scatterlist) *
4854 h->maxsgentries, GFP_KERNEL);
4855 if (h->scatter_list[i] == NULL) {
4856 dev_err(&h->pdev->dev, "could not allocate "
4857 "s/g lists\n");
4858 return -ENOMEM;
4859 }
4860 }
4861 return 0;
4862}
4863
4864static void cciss_free_scatterlists(ctlr_info_t *h)
4865{
4866 int i;
4867
4868 if (h->scatter_list) {
4869 for (i = 0; i < h->nr_cmds; i++)
4870 kfree(h->scatter_list[i]);
4871 kfree(h->scatter_list);
4872 }
4873}
4874
54dae343
SC		 4875static void cciss_free_cmd_pool(ctlr_info_t *h)
4876{
4877 kfree(h->cmd_pool_bits);
4878 if (h->cmd_pool)
4879 pci_free_consistent(h->pdev,
4880 h->nr_cmds * sizeof(CommandList_struct),
4881 h->cmd_pool, h->cmd_pool_dhandle);
4882 if (h->errinfo_pool)
4883 pci_free_consistent(h->pdev,
4884 h->nr_cmds * sizeof(ErrorInfo_struct),
4885 h->errinfo_pool, h->errinfo_pool_dhandle);
4886}
4887
2b48085f
SC		 4888static int cciss_request_irq(ctlr_info_t *h,
4889 irqreturn_t (*msixhandler)(int, void *),
4890 irqreturn_t (*intxhandler)(int, void *))
4891{
4892 if (h->msix_vector || h->msi_vector) {
13049537 4893 if (!request_irq(h->intr[h->intr_mode], msixhandler,
6225da48 4894 0, h->devname, h))
2b48085f
SC		 4895 return 0;
4896 dev_err(&h->pdev->dev, "Unable to get msi irq %d"
13049537 4897 " for %s\n", h->intr[h->intr_mode],
2b48085f
SC		 4898 h->devname);
4899 return -1;
4900 }
4901
13049537 4902 if (!request_irq(h->intr[h->intr_mode], intxhandler,
6225da48 4903 IRQF_SHARED, h->devname, h))
2b48085f
SC		 4904 return 0;
4905 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
13049537 4906 h->intr[h->intr_mode], h->devname);
2b48085f
SC		 4907 return -1;
4908}
4909
8d85fce7 4910static int cciss_kdump_soft_reset(ctlr_info_t *h)
5afe2781
SC		 4911{
4912 if (cciss_send_reset(h, CTLR_LUNID, CCISS_RESET_TYPE_CONTROLLER)) {
4913 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4914 return -EIO;
4915 }
4916
4917 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4918 if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4919 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4920 return -1;
4921 }
4922
4923 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4924 if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4925 dev_warn(&h->pdev->dev, "Board failed to become ready "
4926 "after soft reset.\n");
4927 return -1;
4928 }
4929
4930 return 0;
4931}
4932
4933static void cciss_undo_allocations_after_kdump_soft_reset(ctlr_info_t *h)
4934{
4935 int ctlr = h->ctlr;
4936
13049537 4937 free_irq(h->intr[h->intr_mode], h);
5afe2781
SC		 4938#ifdef CONFIG_PCI_MSI
4939 if (h->msix_vector)
4940 pci_disable_msix(h->pdev);
4941 else if (h->msi_vector)
4942 pci_disable_msi(h->pdev);
4943#endif /* CONFIG_PCI_MSI */
4944 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4945 cciss_free_scatterlists(h);
4946 cciss_free_cmd_pool(h);
4947 kfree(h->blockFetchTable);
4948 if (h->reply_pool)
4949 pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64),
4950 h->reply_pool, h->reply_pool_dhandle);
4951 if (h->transtable)
4952 iounmap(h->transtable);
4953 if (h->cfgtable)
4954 iounmap(h->cfgtable);
4955 if (h->vaddr)
4956 iounmap(h->vaddr);
4957 unregister_blkdev(h->major, h->devname);
4958 cciss_destroy_hba_sysfs_entry(h);
4959 pci_release_regions(h->pdev);
4960 kfree(h);
4961 hba[ctlr] = NULL;
4962}
4963
1da177e4
LT		 4964/*
4965 * This is it. Find all the controllers and register them. I really hate
4966 * stealing all these major device numbers.
4967 * returns the number of block devices registered.
4968 */
8d85fce7 4969static int cciss_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1da177e4 4970{
1da177e4 4971 int i;
799202cb 4972 int j = 0;
1da177e4 4973 int rc;
5afe2781 4974 int try_soft_reset = 0;
22bece00 4975 int dac, return_code;
212a5026 4976 InquiryData_struct *inq_buff;
f70dba83 4977 ctlr_info_t *h;
5afe2781 4978 unsigned long flags;
1da177e4 4979
0821e904
MM		 4980 /*
4981 * By default the cciss driver is used for all older HP Smart Array
4982 * controllers. There are module paramaters that allow a user to
4983 * override this behavior and instead use the hpsa SCSI driver. If
4984 * this is the case cciss may be loaded first from the kdump initrd
4985 * image and cause a kernel panic. So if reset_devices is true and
4986 * cciss_allow_hpsa is set just bail.
4987 */
4988 if ((reset_devices) && (cciss_allow_hpsa == 1))
4989 return -ENODEV;
83123cb1 4990 rc = cciss_init_reset_devices(pdev);
5afe2781
SC		 4991 if (rc) {
4992 if (rc != -ENOTSUPP)
4993 return rc;
4994 /* If the reset fails in a particular way (it has no way to do
4995 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4996 * a soft reset once we get the controller configured up to the
4997 * point that it can accept a command.
4998 */
4999 try_soft_reset = 1;
5000 rc = 0;
5001 }
5002
5003reinit_after_soft_reset:
5004
b2a4a43d 5005 i = alloc_cciss_hba(pdev);
7c832835 5006 if (i < 0)
e2019b58 5007 return -1;
1f8ef380 5008
f70dba83
SC		 5009 h = hba[i];
5010 h->pdev = pdev;
5011 h->busy_initializing = 1;
13049537 5012 h->intr_mode = cciss_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
e6e1ee93
JA		 5013 INIT_LIST_HEAD(&h->cmpQ);
5014 INIT_LIST_HEAD(&h->reqQ);
f70dba83 5015 mutex_init(&h->busy_shutting_down);
1f8ef380 5016
f70dba83 5017 if (cciss_pci_init(h) != 0)
2cfa948c 5018 goto clean_no_release_regions;
1da177e4 5019
f70dba83
SC		 5020 sprintf(h->devname, "cciss%d", i);
5021 h->ctlr = i;
1da177e4 5022
8a4ec67b
SC		 5023 if (cciss_tape_cmds < 2)
5024 cciss_tape_cmds = 2;
5025 if (cciss_tape_cmds > 16)
5026 cciss_tape_cmds = 16;
5027
f70dba83 5028 init_completion(&h->scan_wait);
b368c9dd 5029
f70dba83 5030 if (cciss_create_hba_sysfs_entry(h))
7fe06326
AP		 5031 goto clean0;
5032
1da177e4 5033 /* configure PCI DMA stuff */
6a35528a 5034 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
40aabb58 5035 dac = 1;
284901a9 5036 else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
40aabb58 5037 dac = 0;
1da177e4 5038 else {
b2a4a43d 5039 dev_err(&h->pdev->dev, "no suitable DMA available\n");
1da177e4
LT		 5040 goto clean1;
5041 }
5042
5043 /*
5044 * register with the major number, or get a dynamic major number
5045 * by passing 0 as argument. This is done for greater than
5046 * 8 controller support.
5047 */
5048 if (i < MAX_CTLR_ORIG)
f70dba83
SC		 5049 h->major = COMPAQ_CISS_MAJOR + i;
5050 rc = register_blkdev(h->major, h->devname);
7c832835 5051 if (rc == -EBUSY || rc == -EINVAL) {
b2a4a43d
SC		 5052 dev_err(&h->pdev->dev,
5053 "Unable to get major number %d for %s "
f70dba83 5054 "on hba %d\n", h->major, h->devname, i);
1da177e4 5055 goto clean1;
7c832835 5056 } else {
1da177e4 5057 if (i >= MAX_CTLR_ORIG)
f70dba83 5058 h->major = rc;
1da177e4
LT		 5059 }
5060
5061 /* make sure the board interrupts are off */
f70dba83 5062 h->access.set_intr_mask(h, CCISS_INTR_OFF);
2b48085f
SC		 5063 rc = cciss_request_irq(h, do_cciss_msix_intr, do_cciss_intx);
5064 if (rc)
5065 goto clean2;
40aabb58 5066
b2a4a43d 5067 dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
f70dba83 5068 h->devname, pdev->device, pci_name(pdev),
13049537 5069 h->intr[h->intr_mode], dac ? "" : " not");
7c832835 5070
54dae343 5071 if (cciss_allocate_cmd_pool(h))
1da177e4 5072 goto clean4;
5c07a311 5073
abf7966e 5074 if (cciss_allocate_scatterlists(h))
4ee69851
DC		 5075 goto clean4;
5076
f70dba83
SC		 5077 h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
5078 h->chainsize, h->nr_cmds);
5079 if (!h->cmd_sg_list && h->chainsize > 0)
5c07a311 5080 goto clean4;
5c07a311 5081
f70dba83 5082 spin_lock_init(&h->lock);
1da177e4 5083
7c832835 5084 /* Initialize the pdev driver private data.
f70dba83
SC		 5085 have it point to h. */
5086 pci_set_drvdata(pdev, h);
7c832835
BH		 5087 /* command and error info recs zeroed out before
5088 they are used */
1f118bc4 5089 bitmap_zero(h->cmd_pool_bits, h->nr_cmds);
1da177e4 5090
f70dba83
SC		 5091 h->num_luns = 0;
5092 h->highest_lun = -1;
6ae5ce8e 5093 for (j = 0; j < CISS_MAX_LUN; j++) {
f70dba83
SC		 5094 h->drv[j] = NULL;
5095 h->gendisk[j] = NULL;
6ae5ce8e 5096 }
1da177e4 5097
5afe2781
SC		 5098 /* At this point, the controller is ready to take commands.
5099 * Now, if reset_devices and the hard reset didn't work, try
5100 * the soft reset and see if that works.
5101 */
5102 if (try_soft_reset) {
5103
5104 /* This is kind of gross. We may or may not get a completion
5105 * from the soft reset command, and if we do, then the value
5106 * from the fifo may or may not be valid. So, we wait 10 secs
5107 * after the reset throwing away any completions we get during
5108 * that time. Unregister the interrupt handler and register
5109 * fake ones to scoop up any residual completions.
5110 */
5111 spin_lock_irqsave(&h->lock, flags);
5112 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5113 spin_unlock_irqrestore(&h->lock, flags);
13049537 5114 free_irq(h->intr[h->intr_mode], h);
5afe2781
SC		 5115 rc = cciss_request_irq(h, cciss_msix_discard_completions,
5116 cciss_intx_discard_completions);
5117 if (rc) {
5118 dev_warn(&h->pdev->dev, "Failed to request_irq after "
5119 "soft reset.\n");
5120 goto clean4;
5121 }
5122
5123 rc = cciss_kdump_soft_reset(h);
5124 if (rc) {
5125 dev_warn(&h->pdev->dev, "Soft reset failed.\n");
5126 goto clean4;
5127 }
5128
5129 dev_info(&h->pdev->dev, "Board READY.\n");
5130 dev_info(&h->pdev->dev,
5131 "Waiting for stale completions to drain.\n");
5132 h->access.set_intr_mask(h, CCISS_INTR_ON);
5133 msleep(10000);
5134 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5135
5136 rc = controller_reset_failed(h->cfgtable);
5137 if (rc)
5138 dev_info(&h->pdev->dev,
5139 "Soft reset appears to have failed.\n");
5140
5141 /* since the controller's reset, we have to go back and re-init
5142 * everything. Easiest to just forget what we've done and do it
5143 * all over again.
5144 */
5145 cciss_undo_allocations_after_kdump_soft_reset(h);
5146 try_soft_reset = 0;
5147 if (rc)
5148 /* don't go to clean4, we already unallocated */
5149 return -ENODEV;
5150
5151 goto reinit_after_soft_reset;
5152 }
5153
f70dba83 5154 cciss_scsi_setup(h);
1da177e4
LT		 5155
5156 /* Turn the interrupts on so we can service requests */
f70dba83 5157 h->access.set_intr_mask(h, CCISS_INTR_ON);
1da177e4 5158
22bece00
MM		 5159 /* Get the firmware version */
5160 inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
5161 if (inq_buff == NULL) {
b2a4a43d 5162 dev_err(&h->pdev->dev, "out of memory\n");
22bece00
MM		 5163 goto clean4;
5164 }
5165
f70dba83 5166 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
b57695fe 5167 sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
22bece00 5168 if (return_code == IO_OK) {
f70dba83
SC		 5169 h->firm_ver[0] = inq_buff->data_byte[32];
5170 h->firm_ver[1] = inq_buff->data_byte[33];
5171 h->firm_ver[2] = inq_buff->data_byte[34];
5172 h->firm_ver[3] = inq_buff->data_byte[35];
22bece00 5173 } else { /* send command failed */
b2a4a43d 5174 dev_warn(&h->pdev->dev, "unable to determine firmware"
22bece00
MM		 5175 " version of controller\n");
5176 }
212a5026 5177 kfree(inq_buff);
22bece00 5178
f70dba83 5179 cciss_procinit(h);
92c4231a 5180
f70dba83 5181 h->cciss_max_sectors = 8192;
92c4231a 5182
f70dba83 5183 rebuild_lun_table(h, 1, 0);
0007a4c9 5184 cciss_engage_scsi(h);
f70dba83 5185 h->busy_initializing = 0;
b88fac63 5186 return 0;
1da177e4 5187
6ae5ce8e 5188clean4:
54dae343 5189 cciss_free_cmd_pool(h);
abf7966e 5190 cciss_free_scatterlists(h);
f70dba83 5191 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
13049537 5192 free_irq(h->intr[h->intr_mode], h);
6ae5ce8e 5193clean2:
f70dba83 5194 unregister_blkdev(h->major, h->devname);
6ae5ce8e 5195clean1:
f70dba83 5196 cciss_destroy_hba_sysfs_entry(h);
7fe06326 5197clean0:
2cfa948c
SC		 5198 pci_release_regions(pdev);
5199clean_no_release_regions:
f70dba83 5200 h->busy_initializing = 0;
9cef0d2f 5201
872225ca
MM		 5202 /*
5203 * Deliberately omit pci_disable_device(): it does something nasty to
5204 * Smart Array controllers that pci_enable_device does not undo
5205 */
799202cb 5206 pci_set_drvdata(pdev, NULL);
f70dba83 5207 free_hba(h);
e2019b58 5208 return -1;
1da177e4
LT		 5209}
5210
e9ca75b5 5211static void cciss_shutdown(struct pci_dev *pdev)
1da177e4 5212{
29009a03
SC		 5213 ctlr_info_t *h;
5214 char *flush_buf;
7c832835 5215 int return_code;
1da177e4 5216
29009a03
SC		 5217 h = pci_get_drvdata(pdev);
5218 flush_buf = kzalloc(4, GFP_KERNEL);
5219 if (!flush_buf) {
b2a4a43d 5220 dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
e9ca75b5 5221 return;
e9ca75b5 5222 }
29009a03 5223 /* write all data in the battery backed cache to disk */
f70dba83 5224 return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
29009a03
SC		 5225 4, 0, CTLR_LUNID, TYPE_CMD);
5226 kfree(flush_buf);
5227 if (return_code != IO_OK)
b2a4a43d 5228 dev_warn(&h->pdev->dev, "Error flushing cache\n");
29009a03 5229 h->access.set_intr_mask(h, CCISS_INTR_OFF);
13049537 5230 free_irq(h->intr[h->intr_mode], h);
e9ca75b5
GB		 5231}
5232
8d85fce7 5233static int cciss_enter_simple_mode(struct ctlr_info *h)
13049537
JH		 5234{
5235 u32 trans_support;
5236
5237 trans_support = readl(&(h->cfgtable->TransportSupport));
5238 if (!(trans_support & SIMPLE_MODE))
5239 return -ENOTSUPP;
5240
5241 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
5242 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
5243 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
5244 cciss_wait_for_mode_change_ack(h);
5245 print_cfg_table(h);
5246 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
5247 dev_warn(&h->pdev->dev, "unable to get board into simple mode\n");
5248 return -ENODEV;
5249 }
5250 h->transMethod = CFGTBL_Trans_Simple;
5251 return 0;
5252}
5253
5254
8d85fce7 5255static void cciss_remove_one(struct pci_dev *pdev)
e9ca75b5 5256{
f70dba83 5257 ctlr_info_t *h;
e9ca75b5
GB		 5258 int i, j;
5259
7c832835 5260 if (pci_get_drvdata(pdev) == NULL) {
b2a4a43d 5261 dev_err(&pdev->dev, "Unable to remove device\n");
1da177e4
LT		 5262 return;
5263 }
0a9279cc 5264
f70dba83
SC		 5265 h = pci_get_drvdata(pdev);
5266 i = h->ctlr;
7c832835 5267 if (hba[i] == NULL) {
b2a4a43d 5268 dev_err(&pdev->dev, "device appears to already be removed\n");
1da177e4
LT		 5269 return;
5270 }
b6550777 5271
f70dba83 5272 mutex_lock(&h->busy_shutting_down);
0a9279cc 5273
f70dba83
SC		 5274 remove_from_scan_list(h);
5275 remove_proc_entry(h->devname, proc_cciss);
5276 unregister_blkdev(h->major, h->devname);
b6550777
BH		 5277
5278 /* remove it from the disk list */
5279 for (j = 0; j < CISS_MAX_LUN; j++) {
f70dba83 5280 struct gendisk *disk = h->gendisk[j];
b6550777 5281 if (disk) {
165125e1 5282 struct request_queue *q = disk->queue;
b6550777 5283
097d0264 5284 if (disk->flags & GENHD_FL_UP) {
f70dba83 5285 cciss_destroy_ld_sysfs_entry(h, j, 1);
b6550777 5286 del_gendisk(disk);
097d0264 5287 }
b6550777
BH		 5288 if (q)
5289 blk_cleanup_queue(q);
5290 }
5291 }
5292
ba198efb 5293#ifdef CONFIG_CISS_SCSI_TAPE
f70dba83 5294 cciss_unregister_scsi(h); /* unhook from SCSI subsystem */
ba198efb 5295#endif
b6550777 5296
e9ca75b5 5297 cciss_shutdown(pdev);
fb86a35b
MM		 5298
5299#ifdef CONFIG_PCI_MSI
f70dba83
SC		 5300 if (h->msix_vector)
5301 pci_disable_msix(h->pdev);
5302 else if (h->msi_vector)
5303 pci_disable_msi(h->pdev);
7c832835 5304#endif /* CONFIG_PCI_MSI */
fb86a35b 5305
f70dba83
SC		 5306 iounmap(h->transtable);
5307 iounmap(h->cfgtable);
5308 iounmap(h->vaddr);
1da177e4 5309
54dae343 5310 cciss_free_cmd_pool(h);
5c07a311 5311 /* Free up sg elements */
f70dba83
SC		 5312 for (j = 0; j < h->nr_cmds; j++)
5313 kfree(h->scatter_list[j]);
5314 kfree(h->scatter_list);
5315 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
e363e014
SC		 5316 kfree(h->blockFetchTable);
5317 if (h->reply_pool)
5318 pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64),
5319 h->reply_pool, h->reply_pool_dhandle);
872225ca
MM		 5320 /*
5321 * Deliberately omit pci_disable_device(): it does something nasty to
5322 * Smart Array controllers that pci_enable_device does not undo
5323 */
7c832835 5324 pci_release_regions(pdev);
4e570309 5325 pci_set_drvdata(pdev, NULL);
f70dba83
SC		 5326 cciss_destroy_hba_sysfs_entry(h);
5327 mutex_unlock(&h->busy_shutting_down);
5328 free_hba(h);
7c832835 5329}
1da177e4
LT		 5330
5331static struct pci_driver cciss_pci_driver = {
7c832835
BH		 5332 .name = "cciss",
5333 .probe = cciss_init_one,
8d85fce7 5334 .remove = cciss_remove_one,
7c832835 5335 .id_table = cciss_pci_device_id, /* id_table */
e9ca75b5 5336 .shutdown = cciss_shutdown,
1da177e4
LT		 5337};
5338
5339/*
5340 * This is it. Register the PCI driver information for the cards we control
7c832835 5341 * the OS will call our registered routines when it finds one of our cards.
1da177e4
LT		 5342 */
5343static int __init cciss_init(void)
5344{
7fe06326
AP		 5345 int err;
5346
10cbda97
JA		 5347 /*
5348 * The hardware requires that commands are aligned on a 64-bit
5349 * boundary. Given that we use pci_alloc_consistent() to allocate an
5350 * array of them, the size must be a multiple of 8 bytes.
5351 */
1b7d0d28 5352 BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
1da177e4
LT		 5353 printk(KERN_INFO DRIVER_NAME "\n");
5354
7fe06326
AP		 5355 err = bus_register(&cciss_bus_type);
5356 if (err)
5357 return err;
5358
b368c9dd
AP		 5359 /* Start the scan thread */
5360 cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
5361 if (IS_ERR(cciss_scan_thread)) {
5362 err = PTR_ERR(cciss_scan_thread);
5363 goto err_bus_unregister;
5364 }
5365
1da177e4 5366 /* Register for our PCI devices */
7fe06326
AP		 5367 err = pci_register_driver(&cciss_pci_driver);
5368 if (err)
b368c9dd 5369 goto err_thread_stop;
7fe06326 5370
617e1344 5371 return err;
7fe06326 5372
b368c9dd
AP		 5373err_thread_stop:
5374 kthread_stop(cciss_scan_thread);
5375err_bus_unregister:
7fe06326 5376 bus_unregister(&cciss_bus_type);
b368c9dd 5377
7fe06326 5378 return err;
1da177e4
LT		 5379}
5380
5381static void __exit cciss_cleanup(void)
5382{
5383 int i;
5384
5385 pci_unregister_driver(&cciss_pci_driver);
5386 /* double check that all controller entrys have been removed */
7c832835
BH		 5387 for (i = 0; i < MAX_CTLR; i++) {
5388 if (hba[i] != NULL) {
b2a4a43d
SC		 5389 dev_warn(&hba[i]->pdev->dev,
5390 "had to remove controller\n");
1da177e4
LT		 5391 cciss_remove_one(hba[i]->pdev);
5392 }
5393 }
b368c9dd 5394 kthread_stop(cciss_scan_thread);
90fdb0b9
JA		 5395 if (proc_cciss)
5396 remove_proc_entry("driver/cciss", NULL);
7fe06326 5397 bus_unregister(&cciss_bus_type);
1da177e4
LT		 5398}
5399
5400module_init(cciss_init);
5401module_exit(cciss_cleanup);
Empty description
This page took 1.778491 seconds and 4 git commands to generate.