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dmaengine: shdma: fix locking
[linux.git] / drivers / block / cciss.c
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1da177e4 1/*
bd4f36d6
MM		 2 * Disk Array driver for HP Smart Array controllers.
3 * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
1da177e4
LT		 4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
bd4f36d6 7 * the Free Software Foundation; version 2 of the License.
1da177e4
LT		 8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
bd4f36d6
MM		 11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
1da177e4
LT		 13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
bd4f36d6
MM		 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
17 * 02111-1307, USA.
1da177e4
LT		 18 *
19 * Questions/Comments/Bugfixes to [email protected]
20 *
21 */
22
1da177e4
LT		 23#include <linux/module.h>
24#include <linux/interrupt.h>
25#include <linux/types.h>
26#include <linux/pci.h>
27#include <linux/kernel.h>
28#include <linux/slab.h>
29#include <linux/delay.h>
30#include <linux/major.h>
31#include <linux/fs.h>
32#include <linux/bio.h>
33#include <linux/blkpg.h>
34#include <linux/timer.h>
35#include <linux/proc_fs.h>
89b6e743 36#include <linux/seq_file.h>
7c832835 37#include <linux/init.h>
4d761609 38#include <linux/jiffies.h>
1da177e4
LT		 39#include <linux/hdreg.h>
40#include <linux/spinlock.h>
41#include <linux/compat.h>
b368c9dd 42#include <linux/mutex.h>
1da177e4
LT		 43#include <asm/uaccess.h>
44#include <asm/io.h>
45
eb0df996 46#include <linux/dma-mapping.h>
1da177e4
LT		 47#include <linux/blkdev.h>
48#include <linux/genhd.h>
49#include <linux/completion.h>
d5d3b736 50#include <scsi/scsi.h>
03bbfee5
MMOD		 51#include <scsi/sg.h>
52#include <scsi/scsi_ioctl.h>
53#include <linux/cdrom.h>
231bc2a2 54#include <linux/scatterlist.h>
0a9279cc 55#include <linux/kthread.h>
1da177e4
LT		 56
57#define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
841fdffd
MM		 58#define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
59#define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
1da177e4
LT		 60
61/* Embedded module documentation macros - see modules.h */
62MODULE_AUTHOR("Hewlett-Packard Company");
24aac480 63MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
841fdffd
MM		 64MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
65MODULE_VERSION("3.6.26");
1da177e4
LT		 66MODULE_LICENSE("GPL");
67
2a48fc0a 68static DEFINE_MUTEX(cciss_mutex);
bbe425cd 69static struct proc_dir_entry *proc_cciss;
2ec24ff1 70
1da177e4
LT		 71#include "cciss_cmd.h"
72#include "cciss.h"
73#include <linux/cciss_ioctl.h>
74
75/* define the PCI info for the cards we can control */
76static const struct pci_device_id cciss_pci_device_id[] = {
f82ccdb9
BH		 77 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
78 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
79 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
80 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
81 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
82 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
83 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
84 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
85 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
86 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
de923916 95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
9cff3b38 96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
1da177e4
LT		 97 {0,}
98};
7c832835 99
1da177e4
LT		 100MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
101
1da177e4
LT		 102/* board_id = Subsystem Device ID & Vendor ID
103 * product = Marketing Name for the board
7c832835 104 * access = Address of the struct of function pointers
1da177e4
LT		 105 */
106static struct board_type products[] = {
49153998
MM		 107 {0x40700E11, "Smart Array 5300", &SA5_access},
108 {0x40800E11, "Smart Array 5i", &SA5B_access},
109 {0x40820E11, "Smart Array 532", &SA5B_access},
110 {0x40830E11, "Smart Array 5312", &SA5B_access},
111 {0x409A0E11, "Smart Array 641", &SA5_access},
112 {0x409B0E11, "Smart Array 642", &SA5_access},
113 {0x409C0E11, "Smart Array 6400", &SA5_access},
114 {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
115 {0x40910E11, "Smart Array 6i", &SA5_access},
116 {0x3225103C, "Smart Array P600", &SA5_access},
4205df34
SC		 117 {0x3223103C, "Smart Array P800", &SA5_access},
118 {0x3234103C, "Smart Array P400", &SA5_access},
49153998
MM		 119 {0x3235103C, "Smart Array P400i", &SA5_access},
120 {0x3211103C, "Smart Array E200i", &SA5_access},
121 {0x3212103C, "Smart Array E200", &SA5_access},
122 {0x3213103C, "Smart Array E200i", &SA5_access},
123 {0x3214103C, "Smart Array E200i", &SA5_access},
124 {0x3215103C, "Smart Array E200i", &SA5_access},
125 {0x3237103C, "Smart Array E500", &SA5_access},
2ec24ff1
SC		 126 {0x3223103C, "Smart Array P800", &SA5_access},
127 {0x3234103C, "Smart Array P400", &SA5_access},
49153998 128 {0x323D103C, "Smart Array P700m", &SA5_access},
1da177e4
LT		 129};
130
d14c4ab5 131/* How long to wait (in milliseconds) for board to go into simple mode */
7c832835 132#define MAX_CONFIG_WAIT 30000
1da177e4
LT		 133#define MAX_IOCTL_CONFIG_WAIT 1000
134
135/*define how many times we will try a command because of bus resets */
136#define MAX_CMD_RETRIES 3
137
1da177e4
LT		 138#define MAX_CTLR 32
139
140/* Originally cciss driver only supports 8 major numbers */
141#define MAX_CTLR_ORIG 8
142
1da177e4
LT		 143static ctlr_info_t *hba[MAX_CTLR];
144
b368c9dd
AP		 145static struct task_struct *cciss_scan_thread;
146static DEFINE_MUTEX(scan_mutex);
147static LIST_HEAD(scan_q);
148
165125e1 149static void do_cciss_request(struct request_queue *q);
0c2b3908
MM		 150static irqreturn_t do_cciss_intx(int irq, void *dev_id);
151static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
ef7822c2 152static int cciss_open(struct block_device *bdev, fmode_t mode);
6e9624b8 153static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
ef7822c2 154static int cciss_release(struct gendisk *disk, fmode_t mode);
8a6cfeb6
AB		 155static int do_ioctl(struct block_device *bdev, fmode_t mode,
156 unsigned int cmd, unsigned long arg);
ef7822c2 157static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
7c832835 158 unsigned int cmd, unsigned long arg);
a885c8c4 159static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
1da177e4 160
1da177e4 161static int cciss_revalidate(struct gendisk *disk);
2d11d993 162static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
a0ea8622 163static int deregister_disk(ctlr_info_t *h, int drv_index,
2d11d993 164 int clear_all, int via_ioctl);
1da177e4 165
f70dba83 166static void cciss_read_capacity(ctlr_info_t *h, int logvol,
00988a35 167 sector_t *total_size, unsigned int *block_size);
f70dba83 168static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
00988a35 169 sector_t *total_size, unsigned int *block_size);
f70dba83 170static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
7b838bde 171 sector_t total_size,
00988a35 172 unsigned int block_size, InquiryData_struct *inq_buff,
7c832835 173 drive_info_struct *drv);
dac5488a 174static void __devinit cciss_interrupt_mode(ctlr_info_t *);
7c832835 175static void start_io(ctlr_info_t *h);
f70dba83 176static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
b57695fe 177 __u8 page_code, unsigned char scsi3addr[],
178 int cmd_type);
85cc61ae 179static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
180 int attempt_retry);
181static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
1da177e4 182
d6f4965d 183static int add_to_scan_list(struct ctlr_info *h);
0a9279cc
MM		 184static int scan_thread(void *data);
185static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
617e1344
SC		 186static void cciss_hba_release(struct device *dev);
187static void cciss_device_release(struct device *dev);
361e9b07 188static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
9cef0d2f 189static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
29979a71 190static inline u32 next_command(ctlr_info_t *h);
a6528d01
SC		 191static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
192 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
193 u64 *cfg_offset);
194static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
195 unsigned long *memory_bar);
16011131 196static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag);
33079b21 197
5e216153
MM		 198/* performant mode helper functions */
199static void calc_bucket_map(int *bucket, int num_buckets, int nsgs,
200 int *bucket_map);
201static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
33079b21 202
1da177e4 203#ifdef CONFIG_PROC_FS
f70dba83 204static void cciss_procinit(ctlr_info_t *h);
1da177e4 205#else
f70dba83 206static void cciss_procinit(ctlr_info_t *h)
7c832835
BH		 207{
208}
209#endif /* CONFIG_PROC_FS */
1da177e4
LT		 210
211#ifdef CONFIG_COMPAT
ef7822c2
AV		 212static int cciss_compat_ioctl(struct block_device *, fmode_t,
213 unsigned, unsigned long);
1da177e4
LT		 214#endif
215
83d5cde4 216static const struct block_device_operations cciss_fops = {
7c832835 217 .owner = THIS_MODULE,
6e9624b8 218 .open = cciss_unlocked_open,
ef7822c2 219 .release = cciss_release,
8a6cfeb6 220 .ioctl = do_ioctl,
7c832835 221 .getgeo = cciss_getgeo,
1da177e4 222#ifdef CONFIG_COMPAT
ef7822c2 223 .compat_ioctl = cciss_compat_ioctl,
1da177e4 224#endif
7c832835 225 .revalidate_disk = cciss_revalidate,
1da177e4
LT		 226};
227
5e216153
MM		 228/* set_performant_mode: Modify the tag for cciss performant
229 * set bit 0 for pull model, bits 3-1 for block fetch
230 * register number
231 */
232static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
233{
0498cc2a 234 if (likely(h->transMethod & CFGTBL_Trans_Performant))
5e216153
MM		 235 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
236}
237
1da177e4
LT		 238/*
239 * Enqueuing and dequeuing functions for cmdlists.
240 */
e6e1ee93 241static inline void addQ(struct list_head *list, CommandList_struct *c)
1da177e4 242{
e6e1ee93 243 list_add_tail(&c->list, list);
1da177e4
LT		 244}
245
8a3173de 246static inline void removeQ(CommandList_struct *c)
1da177e4 247{
b59e64d0
HR		 248 /*
249 * After kexec/dump some commands might still
250 * be in flight, which the firmware will try
251 * to complete. Resetting the firmware doesn't work
252 * with old fw revisions, so we have to mark
253 * them off as 'stale' to prevent the driver from
254 * falling over.
255 */
e6e1ee93 256 if (WARN_ON(list_empty(&c->list))) {
b59e64d0 257 c->cmd_type = CMD_MSG_STALE;
8a3173de 258 return;
b59e64d0 259 }
8a3173de 260
e6e1ee93 261 list_del_init(&c->list);
1da177e4
LT		 262}
263
664a717d
MM		 264static void enqueue_cmd_and_start_io(ctlr_info_t *h,
265 CommandList_struct *c)
266{
267 unsigned long flags;
5e216153 268 set_performant_mode(h, c);
664a717d
MM		 269 spin_lock_irqsave(&h->lock, flags);
270 addQ(&h->reqQ, c);
271 h->Qdepth++;
2a643ec6
SC		 272 if (h->Qdepth > h->maxQsinceinit)
273 h->maxQsinceinit = h->Qdepth;
664a717d
MM		 274 start_io(h);
275 spin_unlock_irqrestore(&h->lock, flags);
276}
277
dccc9b56 278static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
49fc5601
SC		 279 int nr_cmds)
280{
281 int i;
282
283 if (!cmd_sg_list)
284 return;
285 for (i = 0; i < nr_cmds; i++) {
dccc9b56
SC		 286 kfree(cmd_sg_list[i]);
287 cmd_sg_list[i] = NULL;
49fc5601
SC		 288 }
289 kfree(cmd_sg_list);
290}
291
dccc9b56
SC		 292static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
293 ctlr_info_t *h, int chainsize, int nr_cmds)
49fc5601
SC		 294{
295 int j;
dccc9b56 296 SGDescriptor_struct **cmd_sg_list;
49fc5601
SC		 297
298 if (chainsize <= 0)
299 return NULL;
300
301 cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
302 if (!cmd_sg_list)
303 return NULL;
304
305 /* Build up chain blocks for each command */
306 for (j = 0; j < nr_cmds; j++) {
49fc5601 307 /* Need a block of chainsized s/g elements. */
dccc9b56
SC		 308 cmd_sg_list[j] = kmalloc((chainsize *
309 sizeof(*cmd_sg_list[j])), GFP_KERNEL);
310 if (!cmd_sg_list[j]) {
49fc5601
SC		 311 dev_err(&h->pdev->dev, "Cannot get memory "
312 "for s/g chains.\n");
313 goto clean;
314 }
315 }
316 return cmd_sg_list;
317clean:
318 cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
319 return NULL;
320}
321
d45033ef
SC		 322static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
323{
324 SGDescriptor_struct *chain_sg;
325 u64bit temp64;
326
327 if (c->Header.SGTotal <= h->max_cmd_sgentries)
328 return;
329
330 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
331 temp64.val32.lower = chain_sg->Addr.lower;
332 temp64.val32.upper = chain_sg->Addr.upper;
333 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
334}
335
336static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
337 SGDescriptor_struct *chain_block, int len)
338{
339 SGDescriptor_struct *chain_sg;
340 u64bit temp64;
341
342 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
343 chain_sg->Ext = CCISS_SG_CHAIN;
344 chain_sg->Len = len;
345 temp64.val = pci_map_single(h->pdev, chain_block, len,
346 PCI_DMA_TODEVICE);
347 chain_sg->Addr.lower = temp64.val32.lower;
348 chain_sg->Addr.upper = temp64.val32.upper;
349}
350
1da177e4
LT		 351#include "cciss_scsi.c" /* For SCSI tape support */
352
1e6f2dc1
AB		 353static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
354 "UNKNOWN"
355};
0e4a9d03 356#define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
0f5486ec 357
1da177e4
LT		 358#ifdef CONFIG_PROC_FS
359
360/*
361 * Report information about this controller.
362 */
363#define ENG_GIG 1000000000
364#define ENG_GIG_FACTOR (ENG_GIG/512)
89b6e743 365#define ENGAGE_SCSI "engage scsi"
1da177e4 366
89b6e743 367static void cciss_seq_show_header(struct seq_file *seq)
1da177e4 368{
89b6e743
MM		 369 ctlr_info_t *h = seq->private;
370
371 seq_printf(seq, "%s: HP %s Controller\n"
372 "Board ID: 0x%08lx\n"
373 "Firmware Version: %c%c%c%c\n"
374 "IRQ: %d\n"
375 "Logical drives: %d\n"
376 "Current Q depth: %d\n"
377 "Current # commands on controller: %d\n"
378 "Max Q depth since init: %d\n"
379 "Max # commands on controller since init: %d\n"
380 "Max SG entries since init: %d\n",
381 h->devname,
382 h->product_name,
383 (unsigned long)h->board_id,
384 h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
5e216153 385 h->firm_ver[3], (unsigned int)h->intr[PERF_MODE_INT],
89b6e743
MM		 386 h->num_luns,
387 h->Qdepth, h->commands_outstanding,
388 h->maxQsinceinit, h->max_outstanding, h->maxSG);
389
390#ifdef CONFIG_CISS_SCSI_TAPE
f70dba83 391 cciss_seq_tape_report(seq, h);
89b6e743
MM		 392#endif /* CONFIG_CISS_SCSI_TAPE */
393}
1da177e4 394
89b6e743
MM		 395static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
396{
397 ctlr_info_t *h = seq->private;
89b6e743 398 unsigned long flags;
1da177e4
LT		 399
400 /* prevent displaying bogus info during configuration
401 * or deconfiguration of a logical volume
402 */
f70dba83 403 spin_lock_irqsave(&h->lock, flags);
1da177e4 404 if (h->busy_configuring) {
f70dba83 405 spin_unlock_irqrestore(&h->lock, flags);
89b6e743 406 return ERR_PTR(-EBUSY);
1da177e4
LT		 407 }
408 h->busy_configuring = 1;
f70dba83 409 spin_unlock_irqrestore(&h->lock, flags);
1da177e4 410
89b6e743
MM		 411 if (*pos == 0)
412 cciss_seq_show_header(seq);
413
414 return pos;
415}
416
417static int cciss_seq_show(struct seq_file *seq, void *v)
418{
419 sector_t vol_sz, vol_sz_frac;
420 ctlr_info_t *h = seq->private;
421 unsigned ctlr = h->ctlr;
422 loff_t *pos = v;
9cef0d2f 423 drive_info_struct *drv = h->drv[*pos];
89b6e743
MM		 424
425 if (*pos > h->highest_lun)
426 return 0;
427
531c2dc7
SC		 428 if (drv == NULL) /* it's possible for h->drv[] to have holes. */
429 return 0;
430
89b6e743
MM		 431 if (drv->heads == 0)
432 return 0;
433
434 vol_sz = drv->nr_blocks;
435 vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
436 vol_sz_frac *= 100;
437 sector_div(vol_sz_frac, ENG_GIG_FACTOR);
438
fa52bec9 439 if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
89b6e743
MM		 440 drv->raid_level = RAID_UNKNOWN;
441 seq_printf(seq, "cciss/c%dd%d:"
442 "\t%4u.%02uGB\tRAID %s\n",
443 ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
444 raid_label[drv->raid_level]);
445 return 0;
446}
447
448static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
449{
450 ctlr_info_t *h = seq->private;
451
452 if (*pos > h->highest_lun)
453 return NULL;
454 *pos += 1;
455
456 return pos;
457}
458
459static void cciss_seq_stop(struct seq_file *seq, void *v)
460{
461 ctlr_info_t *h = seq->private;
462
463 /* Only reset h->busy_configuring if we succeeded in setting
464 * it during cciss_seq_start. */
465 if (v == ERR_PTR(-EBUSY))
466 return;
7c832835 467
1da177e4 468 h->busy_configuring = 0;
1da177e4
LT		 469}
470
88e9d34c 471static const struct seq_operations cciss_seq_ops = {
89b6e743
MM		 472 .start = cciss_seq_start,
473 .show = cciss_seq_show,
474 .next = cciss_seq_next,
475 .stop = cciss_seq_stop,
476};
477
478static int cciss_seq_open(struct inode *inode, struct file *file)
479{
480 int ret = seq_open(file, &cciss_seq_ops);
481 struct seq_file *seq = file->private_data;
482
483 if (!ret)
484 seq->private = PDE(inode)->data;
485
486 return ret;
487}
488
489static ssize_t
490cciss_proc_write(struct file *file, const char __user *buf,
491 size_t length, loff_t *ppos)
1da177e4 492{
89b6e743
MM		 493 int err;
494 char *buffer;
495
496#ifndef CONFIG_CISS_SCSI_TAPE
497 return -EINVAL;
1da177e4
LT		 498#endif
499
89b6e743 500 if (!buf || length > PAGE_SIZE - 1)
7c832835 501 return -EINVAL;
89b6e743
MM		 502
503 buffer = (char *)__get_free_page(GFP_KERNEL);
504 if (!buffer)
505 return -ENOMEM;
506
507 err = -EFAULT;
508 if (copy_from_user(buffer, buf, length))
509 goto out;
510 buffer[length] = '\0';
511
512#ifdef CONFIG_CISS_SCSI_TAPE
513 if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
514 struct seq_file *seq = file->private_data;
515 ctlr_info_t *h = seq->private;
89b6e743 516
f70dba83 517 err = cciss_engage_scsi(h);
8721c81f 518 if (err == 0)
89b6e743
MM		 519 err = length;
520 } else
521#endif /* CONFIG_CISS_SCSI_TAPE */
522 err = -EINVAL;
7c832835
BH		 523 /* might be nice to have "disengage" too, but it's not
524 safely possible. (only 1 module use count, lock issues.) */
89b6e743
MM		 525
526out:
527 free_page((unsigned long)buffer);
528 return err;
1da177e4
LT		 529}
530
828c0950 531static const struct file_operations cciss_proc_fops = {
89b6e743
MM		 532 .owner = THIS_MODULE,
533 .open = cciss_seq_open,
534 .read = seq_read,
535 .llseek = seq_lseek,
536 .release = seq_release,
537 .write = cciss_proc_write,
538};
539
f70dba83 540static void __devinit cciss_procinit(ctlr_info_t *h)
1da177e4
LT		 541{
542 struct proc_dir_entry *pde;
543
89b6e743 544 if (proc_cciss == NULL)
928b4d8c 545 proc_cciss = proc_mkdir("driver/cciss", NULL);
89b6e743
MM		 546 if (!proc_cciss)
547 return;
f70dba83 548 pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
89b6e743 549 S_IROTH, proc_cciss,
f70dba83 550 &cciss_proc_fops, h);
1da177e4 551}
7c832835 552#endif /* CONFIG_PROC_FS */
1da177e4 553
7fe06326
AP		 554#define MAX_PRODUCT_NAME_LEN 19
555
556#define to_hba(n) container_of(n, struct ctlr_info, dev)
557#define to_drv(n) container_of(n, drive_info_struct, dev)
558
957c2ec5
SC		 559/* List of controllers which cannot be reset on kexec with reset_devices */
560static u32 unresettable_controller[] = {
561 0x324a103C, /* Smart Array P712m */
562 0x324b103C, /* SmartArray P711m */
563 0x3223103C, /* Smart Array P800 */
564 0x3234103C, /* Smart Array P400 */
565 0x3235103C, /* Smart Array P400i */
566 0x3211103C, /* Smart Array E200i */
567 0x3212103C, /* Smart Array E200 */
568 0x3213103C, /* Smart Array E200i */
569 0x3214103C, /* Smart Array E200i */
570 0x3215103C, /* Smart Array E200i */
571 0x3237103C, /* Smart Array E500 */
572 0x323D103C, /* Smart Array P700m */
573 0x409C0E11, /* Smart Array 6400 */
574 0x409D0E11, /* Smart Array 6400 EM */
575};
576
577static int ctlr_is_resettable(struct ctlr_info *h)
578{
579 int i;
580
581 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
582 if (unresettable_controller[i] == h->board_id)
583 return 0;
584 return 1;
585}
586
587static ssize_t host_show_resettable(struct device *dev,
588 struct device_attribute *attr,
589 char *buf)
590{
591 struct ctlr_info *h = to_hba(dev);
592
593 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h));
594}
595static DEVICE_ATTR(resettable, S_IRUGO, host_show_resettable, NULL);
596
d6f4965d
AP		 597static ssize_t host_store_rescan(struct device *dev,
598 struct device_attribute *attr,
599 const char *buf, size_t count)
600{
601 struct ctlr_info *h = to_hba(dev);
602
603 add_to_scan_list(h);
604 wake_up_process(cciss_scan_thread);
605 wait_for_completion_interruptible(&h->scan_wait);
606
607 return count;
608}
8ba95c69 609static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
7fe06326
AP		 610
611static ssize_t dev_show_unique_id(struct device *dev,
612 struct device_attribute *attr,
613 char *buf)
614{
615 drive_info_struct *drv = to_drv(dev);
616 struct ctlr_info *h = to_hba(drv->dev.parent);
617 __u8 sn[16];
618 unsigned long flags;
619 int ret = 0;
620
f70dba83 621 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 622 if (h->busy_configuring)
623 ret = -EBUSY;
624 else
625 memcpy(sn, drv->serial_no, sizeof(sn));
f70dba83 626 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 627
628 if (ret)
629 return ret;
630 else
631 return snprintf(buf, 16 * 2 + 2,
632 "%02X%02X%02X%02X%02X%02X%02X%02X"
633 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
634 sn[0], sn[1], sn[2], sn[3],
635 sn[4], sn[5], sn[6], sn[7],
636 sn[8], sn[9], sn[10], sn[11],
637 sn[12], sn[13], sn[14], sn[15]);
638}
8ba95c69 639static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
7fe06326
AP		 640
641static ssize_t dev_show_vendor(struct device *dev,
642 struct device_attribute *attr,
643 char *buf)
644{
645 drive_info_struct *drv = to_drv(dev);
646 struct ctlr_info *h = to_hba(drv->dev.parent);
647 char vendor[VENDOR_LEN + 1];
648 unsigned long flags;
649 int ret = 0;
650
f70dba83 651 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 652 if (h->busy_configuring)
653 ret = -EBUSY;
654 else
655 memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
f70dba83 656 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 657
658 if (ret)
659 return ret;
660 else
661 return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
662}
8ba95c69 663static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
7fe06326
AP		 664
665static ssize_t dev_show_model(struct device *dev,
666 struct device_attribute *attr,
667 char *buf)
668{
669 drive_info_struct *drv = to_drv(dev);
670 struct ctlr_info *h = to_hba(drv->dev.parent);
671 char model[MODEL_LEN + 1];
672 unsigned long flags;
673 int ret = 0;
674
f70dba83 675 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 676 if (h->busy_configuring)
677 ret = -EBUSY;
678 else
679 memcpy(model, drv->model, MODEL_LEN + 1);
f70dba83 680 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 681
682 if (ret)
683 return ret;
684 else
685 return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
686}
8ba95c69 687static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
7fe06326
AP		 688
689static ssize_t dev_show_rev(struct device *dev,
690 struct device_attribute *attr,
691 char *buf)
692{
693 drive_info_struct *drv = to_drv(dev);
694 struct ctlr_info *h = to_hba(drv->dev.parent);
695 char rev[REV_LEN + 1];
696 unsigned long flags;
697 int ret = 0;
698
f70dba83 699 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 700 if (h->busy_configuring)
701 ret = -EBUSY;
702 else
703 memcpy(rev, drv->rev, REV_LEN + 1);
f70dba83 704 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 705
706 if (ret)
707 return ret;
708 else
709 return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
710}
8ba95c69 711static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
7fe06326 712
ce84a8ae
SC		 713static ssize_t cciss_show_lunid(struct device *dev,
714 struct device_attribute *attr, char *buf)
715{
9cef0d2f
SC		 716 drive_info_struct *drv = to_drv(dev);
717 struct ctlr_info *h = to_hba(drv->dev.parent);
ce84a8ae
SC		 718 unsigned long flags;
719 unsigned char lunid[8];
720
f70dba83 721 spin_lock_irqsave(&h->lock, flags);
ce84a8ae 722 if (h->busy_configuring) {
f70dba83 723 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 724 return -EBUSY;
725 }
726 if (!drv->heads) {
f70dba83 727 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 728 return -ENOTTY;
729 }
730 memcpy(lunid, drv->LunID, sizeof(lunid));
f70dba83 731 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 732 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
733 lunid[0], lunid[1], lunid[2], lunid[3],
734 lunid[4], lunid[5], lunid[6], lunid[7]);
735}
8ba95c69 736static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
ce84a8ae 737
3ff1111d
SC		 738static ssize_t cciss_show_raid_level(struct device *dev,
739 struct device_attribute *attr, char *buf)
740{
9cef0d2f
SC		 741 drive_info_struct *drv = to_drv(dev);
742 struct ctlr_info *h = to_hba(drv->dev.parent);
3ff1111d
SC		 743 int raid;
744 unsigned long flags;
745
f70dba83 746 spin_lock_irqsave(&h->lock, flags);
3ff1111d 747 if (h->busy_configuring) {
f70dba83 748 spin_unlock_irqrestore(&h->lock, flags);
3ff1111d
SC		 749 return -EBUSY;
750 }
751 raid = drv->raid_level;
f70dba83 752 spin_unlock_irqrestore(&h->lock, flags);
3ff1111d
SC		 753 if (raid < 0 || raid > RAID_UNKNOWN)
754 raid = RAID_UNKNOWN;
755
756 return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
757 raid_label[raid]);
758}
8ba95c69 759static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
3ff1111d 760
e272afec
SC		 761static ssize_t cciss_show_usage_count(struct device *dev,
762 struct device_attribute *attr, char *buf)
763{
9cef0d2f
SC		 764 drive_info_struct *drv = to_drv(dev);
765 struct ctlr_info *h = to_hba(drv->dev.parent);
e272afec
SC		 766 unsigned long flags;
767 int count;
768
f70dba83 769 spin_lock_irqsave(&h->lock, flags);
e272afec 770 if (h->busy_configuring) {
f70dba83 771 spin_unlock_irqrestore(&h->lock, flags);
e272afec
SC		 772 return -EBUSY;
773 }
774 count = drv->usage_count;
f70dba83 775 spin_unlock_irqrestore(&h->lock, flags);
e272afec
SC		 776 return snprintf(buf, 20, "%d\n", count);
777}
8ba95c69 778static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
e272afec 779
d6f4965d
AP		 780static struct attribute *cciss_host_attrs[] = {
781 &dev_attr_rescan.attr,
957c2ec5 782 &dev_attr_resettable.attr,
d6f4965d
AP		 783 NULL
784};
785
786static struct attribute_group cciss_host_attr_group = {
787 .attrs = cciss_host_attrs,
788};
789
9f792d9f 790static const struct attribute_group *cciss_host_attr_groups[] = {
d6f4965d
AP		 791 &cciss_host_attr_group,
792 NULL
793};
794
795static struct device_type cciss_host_type = {
796 .name = "cciss_host",
797 .groups = cciss_host_attr_groups,
617e1344 798 .release = cciss_hba_release,
d6f4965d
AP		 799};
800
7fe06326
AP		 801static struct attribute *cciss_dev_attrs[] = {
802 &dev_attr_unique_id.attr,
803 &dev_attr_model.attr,
804 &dev_attr_vendor.attr,
805 &dev_attr_rev.attr,
ce84a8ae 806 &dev_attr_lunid.attr,
3ff1111d 807 &dev_attr_raid_level.attr,
e272afec 808 &dev_attr_usage_count.attr,
7fe06326
AP		 809 NULL
810};
811
812static struct attribute_group cciss_dev_attr_group = {
813 .attrs = cciss_dev_attrs,
814};
815
a4dbd674 816static const struct attribute_group *cciss_dev_attr_groups[] = {
7fe06326
AP		 817 &cciss_dev_attr_group,
818 NULL
819};
820
821static struct device_type cciss_dev_type = {
822 .name = "cciss_device",
823 .groups = cciss_dev_attr_groups,
617e1344 824 .release = cciss_device_release,
7fe06326
AP		 825};
826
827static struct bus_type cciss_bus_type = {
828 .name = "cciss",
829};
830
617e1344
SC		 831/*
832 * cciss_hba_release is called when the reference count
833 * of h->dev goes to zero.
834 */
835static void cciss_hba_release(struct device *dev)
836{
837 /*
838 * nothing to do, but need this to avoid a warning
839 * about not having a release handler from lib/kref.c.
840 */
841}
7fe06326
AP		 842
843/*
844 * Initialize sysfs entry for each controller. This sets up and registers
845 * the 'cciss#' directory for each individual controller under
846 * /sys/bus/pci/devices/<dev>/.
847 */
848static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
849{
850 device_initialize(&h->dev);
851 h->dev.type = &cciss_host_type;
852 h->dev.bus = &cciss_bus_type;
853 dev_set_name(&h->dev, "%s", h->devname);
854 h->dev.parent = &h->pdev->dev;
855
856 return device_add(&h->dev);
857}
858
859/*
860 * Remove sysfs entries for an hba.
861 */
862static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
863{
864 device_del(&h->dev);
617e1344
SC		 865 put_device(&h->dev); /* final put. */
866}
867
868/* cciss_device_release is called when the reference count
9cef0d2f 869 * of h->drv[x]dev goes to zero.
617e1344
SC		 870 */
871static void cciss_device_release(struct device *dev)
872{
9cef0d2f
SC		 873 drive_info_struct *drv = to_drv(dev);
874 kfree(drv);
7fe06326
AP		 875}
876
877/*
878 * Initialize sysfs for each logical drive. This sets up and registers
879 * the 'c#d#' directory for each individual logical drive under
880 * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
881 * /sys/block/cciss!c#d# to this entry.
882 */
617e1344 883static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
7fe06326
AP		 884 int drv_index)
885{
617e1344
SC		 886 struct device *dev;
887
9cef0d2f 888 if (h->drv[drv_index]->device_initialized)
8ce51966
SC		 889 return 0;
890
9cef0d2f 891 dev = &h->drv[drv_index]->dev;
617e1344
SC		 892 device_initialize(dev);
893 dev->type = &cciss_dev_type;
894 dev->bus = &cciss_bus_type;
895 dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
896 dev->parent = &h->dev;
9cef0d2f 897 h->drv[drv_index]->device_initialized = 1;
617e1344 898 return device_add(dev);
7fe06326
AP		 899}
900
901/*
902 * Remove sysfs entries for a logical drive.
903 */
8ce51966
SC		 904static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
905 int ctlr_exiting)
7fe06326 906{
9cef0d2f 907 struct device *dev = &h->drv[drv_index]->dev;
8ce51966
SC		 908
909 /* special case for c*d0, we only destroy it on controller exit */
910 if (drv_index == 0 && !ctlr_exiting)
911 return;
912
617e1344
SC		 913 device_del(dev);
914 put_device(dev); /* the "final" put. */
9cef0d2f 915 h->drv[drv_index] = NULL;
7fe06326
AP		 916}
917
7c832835
BH		 918/*
919 * For operations that cannot sleep, a command block is allocated at init,
1da177e4 920 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6b4d96b8 921 * which ones are free or in use.
7c832835 922 */
6b4d96b8 923static CommandList_struct *cmd_alloc(ctlr_info_t *h)
1da177e4
LT		 924{
925 CommandList_struct *c;
7c832835 926 int i;
1da177e4
LT		 927 u64bit temp64;
928 dma_addr_t cmd_dma_handle, err_dma_handle;
929
6b4d96b8
SC		 930 do {
931 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
932 if (i == h->nr_cmds)
7c832835 933 return NULL;
6b4d96b8
SC		 934 } while (test_and_set_bit(i & (BITS_PER_LONG - 1),
935 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
6b4d96b8
SC		 936 c = h->cmd_pool + i;
937 memset(c, 0, sizeof(CommandList_struct));
938 cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
939 c->err_info = h->errinfo_pool + i;
940 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
941 err_dma_handle = h->errinfo_pool_dhandle
942 + i * sizeof(ErrorInfo_struct);
943 h->nr_allocs++;
1da177e4 944
6b4d96b8 945 c->cmdindex = i;
33079b21 946
e6e1ee93 947 INIT_LIST_HEAD(&c->list);
6b4d96b8
SC		 948 c->busaddr = (__u32) cmd_dma_handle;
949 temp64.val = (__u64) err_dma_handle;
950 c->ErrDesc.Addr.lower = temp64.val32.lower;
951 c->ErrDesc.Addr.upper = temp64.val32.upper;
952 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
7c832835 953
6b4d96b8
SC		 954 c->ctlr = h->ctlr;
955 return c;
956}
33079b21 957
6b4d96b8
SC		 958/* allocate a command using pci_alloc_consistent, used for ioctls,
959 * etc., not for the main i/o path.
960 */
961static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
962{
963 CommandList_struct *c;
964 u64bit temp64;
965 dma_addr_t cmd_dma_handle, err_dma_handle;
966
967 c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
968 sizeof(CommandList_struct), &cmd_dma_handle);
969 if (c == NULL)
970 return NULL;
971 memset(c, 0, sizeof(CommandList_struct));
972
973 c->cmdindex = -1;
974
975 c->err_info = (ErrorInfo_struct *)
976 pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
977 &err_dma_handle);
978
979 if (c->err_info == NULL) {
980 pci_free_consistent(h->pdev,
981 sizeof(CommandList_struct), c, cmd_dma_handle);
982 return NULL;
7c832835 983 }
6b4d96b8 984 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
1da177e4 985
e6e1ee93 986 INIT_LIST_HEAD(&c->list);
1da177e4 987 c->busaddr = (__u32) cmd_dma_handle;
7c832835 988 temp64.val = (__u64) err_dma_handle;
1da177e4
LT		 989 c->ErrDesc.Addr.lower = temp64.val32.lower;
990 c->ErrDesc.Addr.upper = temp64.val32.upper;
991 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
1da177e4 992
7c832835
BH		 993 c->ctlr = h->ctlr;
994 return c;
1da177e4
LT		 995}
996
6b4d96b8 997static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
1da177e4
LT		 998{
999 int i;
6b4d96b8
SC		 1000
1001 i = c - h->cmd_pool;
1002 clear_bit(i & (BITS_PER_LONG - 1),
1003 h->cmd_pool_bits + (i / BITS_PER_LONG));
1004 h->nr_frees++;
1005}
1006
1007static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
1008{
1da177e4
LT		 1009 u64bit temp64;
1010
6b4d96b8
SC		 1011 temp64.val32.lower = c->ErrDesc.Addr.lower;
1012 temp64.val32.upper = c->ErrDesc.Addr.upper;
1013 pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
1014 c->err_info, (dma_addr_t) temp64.val);
16011131
SC		 1015 pci_free_consistent(h->pdev, sizeof(CommandList_struct), c,
1016 (dma_addr_t) cciss_tag_discard_error_bits(h, (u32) c->busaddr));
1da177e4
LT		 1017}
1018
1019static inline ctlr_info_t *get_host(struct gendisk *disk)
1020{
7c832835 1021 return disk->queue->queuedata;
1da177e4
LT		 1022}
1023
1024static inline drive_info_struct *get_drv(struct gendisk *disk)
1025{
1026 return disk->private_data;
1027}
1028
1029/*
1030 * Open. Make sure the device is really there.
1031 */
ef7822c2 1032static int cciss_open(struct block_device *bdev, fmode_t mode)
1da177e4 1033{
f70dba83 1034 ctlr_info_t *h = get_host(bdev->bd_disk);
ef7822c2 1035 drive_info_struct *drv = get_drv(bdev->bd_disk);
1da177e4 1036
b2a4a43d 1037 dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
2e043986 1038 if (drv->busy_configuring)
ddd47442 1039 return -EBUSY;
1da177e4
LT		 1040 /*
1041 * Root is allowed to open raw volume zero even if it's not configured
1042 * so array config can still work. Root is also allowed to open any
1043 * volume that has a LUN ID, so it can issue IOCTL to reread the
1044 * disk information. I don't think I really like this
1045 * but I'm already using way to many device nodes to claim another one
1046 * for "raw controller".
1047 */
7a06f789 1048 if (drv->heads == 0) {
ef7822c2 1049 if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
1da177e4 1050 /* if not node 0 make sure it is a partition = 0 */
ef7822c2 1051 if (MINOR(bdev->bd_dev) & 0x0f) {
7c832835 1052 return -ENXIO;
1da177e4 1053 /* if it is, make sure we have a LUN ID */
39ccf9a6
SC		 1054 } else if (memcmp(drv->LunID, CTLR_LUNID,
1055 sizeof(drv->LunID))) {
1da177e4
LT		 1056 return -ENXIO;
1057 }
1058 }
1059 if (!capable(CAP_SYS_ADMIN))
1060 return -EPERM;
1061 }
1062 drv->usage_count++;
f70dba83 1063 h->usage_count++;
1da177e4
LT		 1064 return 0;
1065}
7c832835 1066
6e9624b8
AB		 1067static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
1068{
1069 int ret;
1070
2a48fc0a 1071 mutex_lock(&cciss_mutex);
6e9624b8 1072 ret = cciss_open(bdev, mode);
2a48fc0a 1073 mutex_unlock(&cciss_mutex);
6e9624b8
AB		 1074
1075 return ret;
1076}
1077
1da177e4
LT		 1078/*
1079 * Close. Sync first.
1080 */
ef7822c2 1081static int cciss_release(struct gendisk *disk, fmode_t mode)
1da177e4 1082{
f70dba83 1083 ctlr_info_t *h;
6e9624b8 1084 drive_info_struct *drv;
1da177e4 1085
2a48fc0a 1086 mutex_lock(&cciss_mutex);
f70dba83 1087 h = get_host(disk);
6e9624b8 1088 drv = get_drv(disk);
b2a4a43d 1089 dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
1da177e4 1090 drv->usage_count--;
f70dba83 1091 h->usage_count--;
2a48fc0a 1092 mutex_unlock(&cciss_mutex);
1da177e4
LT		 1093 return 0;
1094}
1095
ef7822c2
AV		 1096static int do_ioctl(struct block_device *bdev, fmode_t mode,
1097 unsigned cmd, unsigned long arg)
1da177e4
LT		 1098{
1099 int ret;
2a48fc0a 1100 mutex_lock(&cciss_mutex);
ef7822c2 1101 ret = cciss_ioctl(bdev, mode, cmd, arg);
2a48fc0a 1102 mutex_unlock(&cciss_mutex);
1da177e4
LT		 1103 return ret;
1104}
1105
8a6cfeb6
AB		 1106#ifdef CONFIG_COMPAT
1107
ef7822c2
AV		 1108static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1109 unsigned cmd, unsigned long arg);
1110static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1111 unsigned cmd, unsigned long arg);
1da177e4 1112
ef7822c2
AV		 1113static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
1114 unsigned cmd, unsigned long arg)
1da177e4
LT		 1115{
1116 switch (cmd) {
1117 case CCISS_GETPCIINFO:
1118 case CCISS_GETINTINFO:
1119 case CCISS_SETINTINFO:
1120 case CCISS_GETNODENAME:
1121 case CCISS_SETNODENAME:
1122 case CCISS_GETHEARTBEAT:
1123 case CCISS_GETBUSTYPES:
1124 case CCISS_GETFIRMVER:
1125 case CCISS_GETDRIVVER:
1126 case CCISS_REVALIDVOLS:
1127 case CCISS_DEREGDISK:
1128 case CCISS_REGNEWDISK:
1129 case CCISS_REGNEWD:
1130 case CCISS_RESCANDISK:
1131 case CCISS_GETLUNINFO:
ef7822c2 1132 return do_ioctl(bdev, mode, cmd, arg);
1da177e4
LT		 1133
1134 case CCISS_PASSTHRU32:
ef7822c2 1135 return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
1da177e4 1136 case CCISS_BIG_PASSTHRU32:
ef7822c2 1137 return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
1da177e4
LT		 1138
1139 default:
1140 return -ENOIOCTLCMD;
1141 }
1142}
1143
ef7822c2
AV		 1144static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1145 unsigned cmd, unsigned long arg)
1da177e4
LT		 1146{
1147 IOCTL32_Command_struct __user *arg32 =
7c832835 1148 (IOCTL32_Command_struct __user *) arg;
1da177e4
LT		 1149 IOCTL_Command_struct arg64;
1150 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
1151 int err;
1152 u32 cp;
1153
1154 err = 0;
7c832835
BH		 1155 err |=
1156 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1157 sizeof(arg64.LUN_info));
1158 err |=
1159 copy_from_user(&arg64.Request, &arg32->Request,
1160 sizeof(arg64.Request));
1161 err |=
1162 copy_from_user(&arg64.error_info, &arg32->error_info,
1163 sizeof(arg64.error_info));
1da177e4
LT		 1164 err |= get_user(arg64.buf_size, &arg32->buf_size);
1165 err |= get_user(cp, &arg32->buf);
1166 arg64.buf = compat_ptr(cp);
1167 err |= copy_to_user(p, &arg64, sizeof(arg64));
1168
1169 if (err)
1170 return -EFAULT;
1171
ef7822c2 1172 err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
1da177e4
LT		 1173 if (err)
1174 return err;
7c832835
BH		 1175 err |=
1176 copy_in_user(&arg32->error_info, &p->error_info,
1177 sizeof(arg32->error_info));
1da177e4
LT		 1178 if (err)
1179 return -EFAULT;
1180 return err;
1181}
1182
ef7822c2
AV		 1183static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1184 unsigned cmd, unsigned long arg)
1da177e4
LT		 1185{
1186 BIG_IOCTL32_Command_struct __user *arg32 =
7c832835 1187 (BIG_IOCTL32_Command_struct __user *) arg;
1da177e4 1188 BIG_IOCTL_Command_struct arg64;
7c832835
BH		 1189 BIG_IOCTL_Command_struct __user *p =
1190 compat_alloc_user_space(sizeof(arg64));
1da177e4
LT		 1191 int err;
1192 u32 cp;
1193
7ab5118d 1194 memset(&arg64, 0, sizeof(arg64));
1da177e4 1195 err = 0;
7c832835
BH		 1196 err |=
1197 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1198 sizeof(arg64.LUN_info));
1199 err |=
1200 copy_from_user(&arg64.Request, &arg32->Request,
1201 sizeof(arg64.Request));
1202 err |=
1203 copy_from_user(&arg64.error_info, &arg32->error_info,
1204 sizeof(arg64.error_info));
1da177e4
LT		 1205 err |= get_user(arg64.buf_size, &arg32->buf_size);
1206 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
1207 err |= get_user(cp, &arg32->buf);
1208 arg64.buf = compat_ptr(cp);
1209 err |= copy_to_user(p, &arg64, sizeof(arg64));
1210
1211 if (err)
7c832835 1212 return -EFAULT;
1da177e4 1213
ef7822c2 1214 err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
1da177e4
LT		 1215 if (err)
1216 return err;
7c832835
BH		 1217 err |=
1218 copy_in_user(&arg32->error_info, &p->error_info,
1219 sizeof(arg32->error_info));
1da177e4
LT		 1220 if (err)
1221 return -EFAULT;
1222 return err;
1223}
1224#endif
a885c8c4
CH		 1225
1226static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1227{
1228 drive_info_struct *drv = get_drv(bdev->bd_disk);
1229
1230 if (!drv->cylinders)
1231 return -ENXIO;
1232
1233 geo->heads = drv->heads;
1234 geo->sectors = drv->sectors;
1235 geo->cylinders = drv->cylinders;
1236 return 0;
1237}
1238
f70dba83 1239static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
0a9279cc
MM		 1240{
1241 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
1242 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
f70dba83 1243 (void)check_for_unit_attention(h, c);
0a9279cc 1244}
0a25a5ae
SC		 1245
1246static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp)
1da177e4 1247{
0a25a5ae 1248 cciss_pci_info_struct pciinfo;
1da177e4 1249
0a25a5ae
SC		 1250 if (!argp)
1251 return -EINVAL;
1252 pciinfo.domain = pci_domain_nr(h->pdev->bus);
1253 pciinfo.bus = h->pdev->bus->number;
1254 pciinfo.dev_fn = h->pdev->devfn;
1255 pciinfo.board_id = h->board_id;
1256 if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct)))
1257 return -EFAULT;
1258 return 0;
1259}
1da177e4 1260
576e661c
SC		 1261static int cciss_getintinfo(ctlr_info_t *h, void __user *argp)
1262{
1263 cciss_coalint_struct intinfo;
1da177e4 1264
576e661c
SC		 1265 if (!argp)
1266 return -EINVAL;
1267 intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay);
1268 intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount);
1269 if (copy_to_user
1270 (argp, &intinfo, sizeof(cciss_coalint_struct)))
1271 return -EFAULT;
1272 return 0;
1273}
1da177e4 1274
4c800eed
SC		 1275static int cciss_setintinfo(ctlr_info_t *h, void __user *argp)
1276{
1277 cciss_coalint_struct intinfo;
1278 unsigned long flags;
1279 int i;
1da177e4 1280
4c800eed
SC		 1281 if (!argp)
1282 return -EINVAL;
1283 if (!capable(CAP_SYS_ADMIN))
1284 return -EPERM;
1285 if (copy_from_user(&intinfo, argp, sizeof(intinfo)))
1286 return -EFAULT;
1287 if ((intinfo.delay == 0) && (intinfo.count == 0))
1288 return -EINVAL;
1289 spin_lock_irqsave(&h->lock, flags);
1290 /* Update the field, and then ring the doorbell */
1291 writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay));
1292 writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount));
1293 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1294
1295 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1296 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1297 break;
1298 udelay(1000); /* delay and try again */
1299 }
1300 spin_unlock_irqrestore(&h->lock, flags);
1301 if (i >= MAX_IOCTL_CONFIG_WAIT)
1302 return -EAGAIN;
1303 return 0;
1304}
1da177e4 1305
25216109
SC		 1306static int cciss_getnodename(ctlr_info_t *h, void __user *argp)
1307{
1308 NodeName_type NodeName;
1309 int i;
1da177e4 1310
25216109
SC		 1311 if (!argp)
1312 return -EINVAL;
1313 for (i = 0; i < 16; i++)
1314 NodeName[i] = readb(&h->cfgtable->ServerName[i]);
1315 if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
1316 return -EFAULT;
1317 return 0;
1318}
7c832835 1319
4f43f32c
SC		 1320static int cciss_setnodename(ctlr_info_t *h, void __user *argp)
1321{
1322 NodeName_type NodeName;
1323 unsigned long flags;
1324 int i;
7c832835 1325
4f43f32c
SC		 1326 if (!argp)
1327 return -EINVAL;
1328 if (!capable(CAP_SYS_ADMIN))
1329 return -EPERM;
1330 if (copy_from_user(NodeName, argp, sizeof(NodeName_type)))
1331 return -EFAULT;
1332 spin_lock_irqsave(&h->lock, flags);
1333 /* Update the field, and then ring the doorbell */
1334 for (i = 0; i < 16; i++)
1335 writeb(NodeName[i], &h->cfgtable->ServerName[i]);
1336 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1337 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1338 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1339 break;
1340 udelay(1000); /* delay and try again */
1341 }
1342 spin_unlock_irqrestore(&h->lock, flags);
1343 if (i >= MAX_IOCTL_CONFIG_WAIT)
1344 return -EAGAIN;
1345 return 0;
1346}
7c832835 1347
93c74931
SC		 1348static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp)
1349{
1350 Heartbeat_type heartbeat;
7c832835 1351
93c74931
SC		 1352 if (!argp)
1353 return -EINVAL;
1354 heartbeat = readl(&h->cfgtable->HeartBeat);
1355 if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type)))
1356 return -EFAULT;
1357 return 0;
1358}
0a9279cc 1359
d18dfad4
SC		 1360static int cciss_getbustypes(ctlr_info_t *h, void __user *argp)
1361{
1362 BusTypes_type BusTypes;
7c832835 1363
d18dfad4
SC		 1364 if (!argp)
1365 return -EINVAL;
1366 BusTypes = readl(&h->cfgtable->BusTypes);
1367 if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type)))
1368 return -EFAULT;
1369 return 0;
1370}
1371
8a4f7fbf
SC		 1372static int cciss_getfirmver(ctlr_info_t *h, void __user *argp)
1373{
1374 FirmwareVer_type firmware;
1375
1376 if (!argp)
1377 return -EINVAL;
1378 memcpy(firmware, h->firm_ver, 4);
1379
1380 if (copy_to_user
1381 (argp, firmware, sizeof(FirmwareVer_type)))
1382 return -EFAULT;
1383 return 0;
1384}
1385
c525919d
SC		 1386static int cciss_getdrivver(ctlr_info_t *h, void __user *argp)
1387{
1388 DriverVer_type DriverVer = DRIVER_VERSION;
1389
1390 if (!argp)
1391 return -EINVAL;
1392 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
1393 return -EFAULT;
1394 return 0;
1395}
1396
0894b32c
SC		 1397static int cciss_getluninfo(ctlr_info_t *h,
1398 struct gendisk *disk, void __user *argp)
1399{
1400 LogvolInfo_struct luninfo;
1401 drive_info_struct *drv = get_drv(disk);
1402
1403 if (!argp)
1404 return -EINVAL;
1405 memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID));
1406 luninfo.num_opens = drv->usage_count;
1407 luninfo.num_parts = 0;
1408 if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct)))
1409 return -EFAULT;
1410 return 0;
1411}
1412
f32f125b
SC		 1413static int cciss_passthru(ctlr_info_t *h, void __user *argp)
1414{
1415 IOCTL_Command_struct iocommand;
1416 CommandList_struct *c;
1417 char *buff = NULL;
1418 u64bit temp64;
1419 DECLARE_COMPLETION_ONSTACK(wait);
1420
1421 if (!argp)
1422 return -EINVAL;
1423
1424 if (!capable(CAP_SYS_RAWIO))
1425 return -EPERM;
1426
1427 if (copy_from_user
1428 (&iocommand, argp, sizeof(IOCTL_Command_struct)))
1429 return -EFAULT;
1430 if ((iocommand.buf_size < 1) &&
1431 (iocommand.Request.Type.Direction != XFER_NONE)) {
1432 return -EINVAL;
1433 }
1434 if (iocommand.buf_size > 0) {
1435 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
1436 if (buff == NULL)
1437 return -EFAULT;
1438 }
1439 if (iocommand.Request.Type.Direction == XFER_WRITE) {
1440 /* Copy the data into the buffer we created */
1441 if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
1442 kfree(buff);
1443 return -EFAULT;
1444 }
1445 } else {
1446 memset(buff, 0, iocommand.buf_size);
1447 }
1448 c = cmd_special_alloc(h);
1449 if (!c) {
1450 kfree(buff);
1451 return -ENOMEM;
1452 }
1453 /* Fill in the command type */
1454 c->cmd_type = CMD_IOCTL_PEND;
1455 /* Fill in Command Header */
1456 c->Header.ReplyQueue = 0; /* unused in simple mode */
1457 if (iocommand.buf_size > 0) { /* buffer to fill */
1458 c->Header.SGList = 1;
1459 c->Header.SGTotal = 1;
1460 } else { /* no buffers to fill */
1461 c->Header.SGList = 0;
1462 c->Header.SGTotal = 0;
1463 }
1464 c->Header.LUN = iocommand.LUN_info;
1465 /* use the kernel address the cmd block for tag */
1466 c->Header.Tag.lower = c->busaddr;
1467
1468 /* Fill in Request block */
1469 c->Request = iocommand.Request;
1470
1471 /* Fill in the scatter gather information */
1472 if (iocommand.buf_size > 0) {
1473 temp64.val = pci_map_single(h->pdev, buff,
1474 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
1475 c->SG[0].Addr.lower = temp64.val32.lower;
1476 c->SG[0].Addr.upper = temp64.val32.upper;
1477 c->SG[0].Len = iocommand.buf_size;
1478 c->SG[0].Ext = 0; /* we are not chaining */
1479 }
1480 c->waiting = &wait;
1481
1482 enqueue_cmd_and_start_io(h, c);
1483 wait_for_completion(&wait);
1484
1485 /* unlock the buffers from DMA */
1486 temp64.val32.lower = c->SG[0].Addr.lower;
1487 temp64.val32.upper = c->SG[0].Addr.upper;
1488 pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size,
1489 PCI_DMA_BIDIRECTIONAL);
1490 check_ioctl_unit_attention(h, c);
1491
1492 /* Copy the error information out */
1493 iocommand.error_info = *(c->err_info);
1494 if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) {
1495 kfree(buff);
1496 cmd_special_free(h, c);
1497 return -EFAULT;
1498 }
1499
1500 if (iocommand.Request.Type.Direction == XFER_READ) {
1501 /* Copy the data out of the buffer we created */
1502 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
7c832835 1503 kfree(buff);
6b4d96b8 1504 cmd_special_free(h, c);
f32f125b 1505 return -EFAULT;
1da177e4 1506 }
f32f125b
SC		 1507 }
1508 kfree(buff);
1509 cmd_special_free(h, c);
1510 return 0;
1511}
1512
0c9f5ba7
SC		 1513static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp)
1514{
1515 BIG_IOCTL_Command_struct *ioc;
1516 CommandList_struct *c;
1517 unsigned char **buff = NULL;
1518 int *buff_size = NULL;
1519 u64bit temp64;
1520 BYTE sg_used = 0;
1521 int status = 0;
1522 int i;
1523 DECLARE_COMPLETION_ONSTACK(wait);
1524 __u32 left;
1525 __u32 sz;
1526 BYTE __user *data_ptr;
1527
1528 if (!argp)
1529 return -EINVAL;
1530 if (!capable(CAP_SYS_RAWIO))
1531 return -EPERM;
fcab1c11 1532 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
0c9f5ba7
SC		 1533 if (!ioc) {
1534 status = -ENOMEM;
1535 goto cleanup1;
1536 }
1537 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
1538 status = -EFAULT;
1539 goto cleanup1;
1540 }
1541 if ((ioc->buf_size < 1) &&
1542 (ioc->Request.Type.Direction != XFER_NONE)) {
1543 status = -EINVAL;
1544 goto cleanup1;
1545 }
1546 /* Check kmalloc limits using all SGs */
1547 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
1548 status = -EINVAL;
1549 goto cleanup1;
1550 }
1551 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
1552 status = -EINVAL;
1553 goto cleanup1;
1554 }
1555 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
1556 if (!buff) {
1557 status = -ENOMEM;
1558 goto cleanup1;
1559 }
1560 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
1561 if (!buff_size) {
1562 status = -ENOMEM;
1563 goto cleanup1;
1564 }
1565 left = ioc->buf_size;
1566 data_ptr = ioc->buf;
1567 while (left) {
1568 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
1569 buff_size[sg_used] = sz;
1570 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
1571 if (buff[sg_used] == NULL) {
1572 status = -ENOMEM;
1573 goto cleanup1;
1574 }
1575 if (ioc->Request.Type.Direction == XFER_WRITE) {
1576 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
7c832835
BH		 1577 status = -EFAULT;
1578 goto cleanup1;
1579 }
0c9f5ba7
SC		 1580 } else {
1581 memset(buff[sg_used], 0, sz);
1582 }
1583 left -= sz;
1584 data_ptr += sz;
1585 sg_used++;
1586 }
1587 c = cmd_special_alloc(h);
1588 if (!c) {
1589 status = -ENOMEM;
1590 goto cleanup1;
1591 }
1592 c->cmd_type = CMD_IOCTL_PEND;
1593 c->Header.ReplyQueue = 0;
fcfb5c0c
SC		 1594 c->Header.SGList = sg_used;
1595 c->Header.SGTotal = sg_used;
0c9f5ba7
SC		 1596 c->Header.LUN = ioc->LUN_info;
1597 c->Header.Tag.lower = c->busaddr;
1598
1599 c->Request = ioc->Request;
fcfb5c0c
SC		 1600 for (i = 0; i < sg_used; i++) {
1601 temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i],
0c9f5ba7 1602 PCI_DMA_BIDIRECTIONAL);
fcfb5c0c
SC		 1603 c->SG[i].Addr.lower = temp64.val32.lower;
1604 c->SG[i].Addr.upper = temp64.val32.upper;
1605 c->SG[i].Len = buff_size[i];
1606 c->SG[i].Ext = 0; /* we are not chaining */
0c9f5ba7
SC		 1607 }
1608 c->waiting = &wait;
1609 enqueue_cmd_and_start_io(h, c);
1610 wait_for_completion(&wait);
1611 /* unlock the buffers from DMA */
1612 for (i = 0; i < sg_used; i++) {
1613 temp64.val32.lower = c->SG[i].Addr.lower;
1614 temp64.val32.upper = c->SG[i].Addr.upper;
1615 pci_unmap_single(h->pdev,
1616 (dma_addr_t) temp64.val, buff_size[i],
1617 PCI_DMA_BIDIRECTIONAL);
1618 }
1619 check_ioctl_unit_attention(h, c);
1620 /* Copy the error information out */
1621 ioc->error_info = *(c->err_info);
1622 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
1623 cmd_special_free(h, c);
1624 status = -EFAULT;
1625 goto cleanup1;
1626 }
1627 if (ioc->Request.Type.Direction == XFER_READ) {
1628 /* Copy the data out of the buffer we created */
1629 BYTE __user *ptr = ioc->buf;
1630 for (i = 0; i < sg_used; i++) {
1631 if (copy_to_user(ptr, buff[i], buff_size[i])) {
6b4d96b8 1632 cmd_special_free(h, c);
7c832835
BH		 1633 status = -EFAULT;
1634 goto cleanup1;
1635 }
0c9f5ba7 1636 ptr += buff_size[i];
1da177e4 1637 }
0c9f5ba7
SC		 1638 }
1639 cmd_special_free(h, c);
1640 status = 0;
1641cleanup1:
1642 if (buff) {
1643 for (i = 0; i < sg_used; i++)
1644 kfree(buff[i]);
1645 kfree(buff);
1646 }
1647 kfree(buff_size);
1648 kfree(ioc);
1649 return status;
1650}
1651
ef7822c2 1652static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
c525919d 1653 unsigned int cmd, unsigned long arg)
1da177e4 1654{
1da177e4 1655 struct gendisk *disk = bdev->bd_disk;
f70dba83 1656 ctlr_info_t *h = get_host(disk);
1da177e4
LT		 1657 void __user *argp = (void __user *)arg;
1658
b2a4a43d
SC		 1659 dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
1660 cmd, arg);
7c832835 1661 switch (cmd) {
1da177e4 1662 case CCISS_GETPCIINFO:
0a25a5ae 1663 return cciss_getpciinfo(h, argp);
1da177e4 1664 case CCISS_GETINTINFO:
576e661c 1665 return cciss_getintinfo(h, argp);
1da177e4 1666 case CCISS_SETINTINFO:
4c800eed 1667 return cciss_setintinfo(h, argp);
1da177e4 1668 case CCISS_GETNODENAME:
25216109 1669 return cciss_getnodename(h, argp);
1da177e4 1670 case CCISS_SETNODENAME:
4f43f32c 1671 return cciss_setnodename(h, argp);
1da177e4 1672 case CCISS_GETHEARTBEAT:
93c74931 1673 return cciss_getheartbeat(h, argp);
1da177e4 1674 case CCISS_GETBUSTYPES:
d18dfad4 1675 return cciss_getbustypes(h, argp);
1da177e4 1676 case CCISS_GETFIRMVER:
8a4f7fbf 1677 return cciss_getfirmver(h, argp);
7c832835 1678 case CCISS_GETDRIVVER:
c525919d 1679 return cciss_getdrivver(h, argp);
6ae5ce8e
MM		 1680 case CCISS_DEREGDISK:
1681 case CCISS_REGNEWD:
1da177e4 1682 case CCISS_REVALIDVOLS:
f70dba83 1683 return rebuild_lun_table(h, 0, 1);
0894b32c
SC		 1684 case CCISS_GETLUNINFO:
1685 return cciss_getluninfo(h, disk, argp);
1da177e4 1686 case CCISS_PASSTHRU:
f32f125b 1687 return cciss_passthru(h, argp);
0c9f5ba7
SC		 1688 case CCISS_BIG_PASSTHRU:
1689 return cciss_bigpassthru(h, argp);
03bbfee5
MMOD		 1690
1691 /* scsi_cmd_ioctl handles these, below, though some are not */
1692 /* very meaningful for cciss. SG_IO is the main one people want. */
1693
1694 case SG_GET_VERSION_NUM:
1695 case SG_SET_TIMEOUT:
1696 case SG_GET_TIMEOUT:
1697 case SG_GET_RESERVED_SIZE:
1698 case SG_SET_RESERVED_SIZE:
1699 case SG_EMULATED_HOST:
1700 case SG_IO:
1701 case SCSI_IOCTL_SEND_COMMAND:
ef7822c2 1702 return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp);
03bbfee5
MMOD		 1703
1704 /* scsi_cmd_ioctl would normally handle these, below, but */
1705 /* they aren't a good fit for cciss, as CD-ROMs are */
1706 /* not supported, and we don't have any bus/target/lun */
1707 /* which we present to the kernel. */
1708
1709 case CDROM_SEND_PACKET:
1710 case CDROMCLOSETRAY:
1711 case CDROMEJECT:
1712 case SCSI_IOCTL_GET_IDLUN:
1713 case SCSI_IOCTL_GET_BUS_NUMBER:
1da177e4
LT		 1714 default:
1715 return -ENOTTY;
1716 }
1da177e4
LT		 1717}
1718
7b30f092
JA		 1719static void cciss_check_queues(ctlr_info_t *h)
1720{
1721 int start_queue = h->next_to_run;
1722 int i;
1723
1724 /* check to see if we have maxed out the number of commands that can
1725 * be placed on the queue. If so then exit. We do this check here
1726 * in case the interrupt we serviced was from an ioctl and did not
1727 * free any new commands.
1728 */
f880632f 1729 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
7b30f092
JA		 1730 return;
1731
1732 /* We have room on the queue for more commands. Now we need to queue
1733 * them up. We will also keep track of the next queue to run so
1734 * that every queue gets a chance to be started first.
1735 */
1736 for (i = 0; i < h->highest_lun + 1; i++) {
1737 int curr_queue = (start_queue + i) % (h->highest_lun + 1);
1738 /* make sure the disk has been added and the drive is real
1739 * because this can be called from the middle of init_one.
1740 */
9cef0d2f
SC		 1741 if (!h->drv[curr_queue])
1742 continue;
1743 if (!(h->drv[curr_queue]->queue) ||
1744 !(h->drv[curr_queue]->heads))
7b30f092
JA		 1745 continue;
1746 blk_start_queue(h->gendisk[curr_queue]->queue);
1747
1748 /* check to see if we have maxed out the number of commands
1749 * that can be placed on the queue.
1750 */
f880632f 1751 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
7b30f092
JA		 1752 if (curr_queue == start_queue) {
1753 h->next_to_run =
1754 (start_queue + 1) % (h->highest_lun + 1);
1755 break;
1756 } else {
1757 h->next_to_run = curr_queue;
1758 break;
1759 }
7b30f092
JA		 1760 }
1761 }
1762}
1763
ca1e0484
MM		 1764static void cciss_softirq_done(struct request *rq)
1765{
f70dba83
SC		 1766 CommandList_struct *c = rq->completion_data;
1767 ctlr_info_t *h = hba[c->ctlr];
1768 SGDescriptor_struct *curr_sg = c->SG;
ca1e0484 1769 u64bit temp64;
664a717d 1770 unsigned long flags;
ca1e0484 1771 int i, ddir;
5c07a311 1772 int sg_index = 0;
ca1e0484 1773
f70dba83 1774 if (c->Request.Type.Direction == XFER_READ)
ca1e0484
MM		 1775 ddir = PCI_DMA_FROMDEVICE;
1776 else
1777 ddir = PCI_DMA_TODEVICE;
1778
1779 /* command did not need to be retried */
1780 /* unmap the DMA mapping for all the scatter gather elements */
f70dba83 1781 for (i = 0; i < c->Header.SGList; i++) {
5c07a311 1782 if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
f70dba83 1783 cciss_unmap_sg_chain_block(h, c);
5c07a311 1784 /* Point to the next block */
f70dba83 1785 curr_sg = h->cmd_sg_list[c->cmdindex];
5c07a311
DB		 1786 sg_index = 0;
1787 }
1788 temp64.val32.lower = curr_sg[sg_index].Addr.lower;
1789 temp64.val32.upper = curr_sg[sg_index].Addr.upper;
1790 pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
1791 ddir);
1792 ++sg_index;
ca1e0484
MM		 1793 }
1794
b2a4a43d 1795 dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
ca1e0484 1796
c3a4d78c 1797 /* set the residual count for pc requests */
33659ebb 1798 if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
f70dba83 1799 rq->resid_len = c->err_info->ResidualCnt;
ac44e5b2 1800
c3a4d78c 1801 blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
3daeea29 1802
ca1e0484 1803 spin_lock_irqsave(&h->lock, flags);
6b4d96b8 1804 cmd_free(h, c);
7b30f092 1805 cciss_check_queues(h);
ca1e0484
MM		 1806 spin_unlock_irqrestore(&h->lock, flags);
1807}
1808
39ccf9a6
SC		 1809static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
1810 unsigned char scsi3addr[], uint32_t log_unit)
b57695fe 1811{
9cef0d2f
SC		 1812 memcpy(scsi3addr, h->drv[log_unit]->LunID,
1813 sizeof(h->drv[log_unit]->LunID));
b57695fe 1814}
1815
7fe06326
AP		 1816/* This function gets the SCSI vendor, model, and revision of a logical drive
1817 * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
1818 * they cannot be read.
1819 */
f70dba83 1820static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
7fe06326
AP		 1821 char *vendor, char *model, char *rev)
1822{
1823 int rc;
1824 InquiryData_struct *inq_buf;
b57695fe 1825 unsigned char scsi3addr[8];
7fe06326
AP		 1826
1827 *vendor = '\0';
1828 *model = '\0';
1829 *rev = '\0';
1830
1831 inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1832 if (!inq_buf)
1833 return;
1834
f70dba83
SC		 1835 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1836 rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
7b838bde 1837 scsi3addr, TYPE_CMD);
7fe06326
AP		 1838 if (rc == IO_OK) {
1839 memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
1840 vendor[VENDOR_LEN] = '\0';
1841 memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
1842 model[MODEL_LEN] = '\0';
1843 memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
1844 rev[REV_LEN] = '\0';
1845 }
1846
1847 kfree(inq_buf);
1848 return;
1849}
1850
a72da29b
MM		 1851/* This function gets the serial number of a logical drive via
1852 * inquiry page 0x83. Serial no. is 16 bytes. If the serial
1853 * number cannot be had, for whatever reason, 16 bytes of 0xff
1854 * are returned instead.
1855 */
f70dba83 1856static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
a72da29b
MM		 1857 unsigned char *serial_no, int buflen)
1858{
1859#define PAGE_83_INQ_BYTES 64
1860 int rc;
1861 unsigned char *buf;
b57695fe 1862 unsigned char scsi3addr[8];
a72da29b
MM		 1863
1864 if (buflen > 16)
1865 buflen = 16;
1866 memset(serial_no, 0xff, buflen);
1867 buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
1868 if (!buf)
1869 return;
1870 memset(serial_no, 0, buflen);
f70dba83
SC		 1871 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1872 rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
7b838bde 1873 PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
a72da29b
MM		 1874 if (rc == IO_OK)
1875 memcpy(serial_no, &buf[8], buflen);
1876 kfree(buf);
1877 return;
1878}
1879
617e1344
SC		 1880/*
1881 * cciss_add_disk sets up the block device queue for a logical drive
1882 */
1883static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
6ae5ce8e
MM		 1884 int drv_index)
1885{
1886 disk->queue = blk_init_queue(do_cciss_request, &h->lock);
e8074f79
SC		 1887 if (!disk->queue)
1888 goto init_queue_failure;
6ae5ce8e
MM		 1889 sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
1890 disk->major = h->major;
1891 disk->first_minor = drv_index << NWD_SHIFT;
1892 disk->fops = &cciss_fops;
9cef0d2f
SC		 1893 if (cciss_create_ld_sysfs_entry(h, drv_index))
1894 goto cleanup_queue;
1895 disk->private_data = h->drv[drv_index];
1896 disk->driverfs_dev = &h->drv[drv_index]->dev;
6ae5ce8e
MM		 1897
1898 /* Set up queue information */
1899 blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
1900
1901 /* This is a hardware imposed limit. */
8a78362c 1902 blk_queue_max_segments(disk->queue, h->maxsgentries);
6ae5ce8e 1903
086fa5ff 1904 blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
6ae5ce8e
MM		 1905
1906 blk_queue_softirq_done(disk->queue, cciss_softirq_done);
1907
1908 disk->queue->queuedata = h;
1909
e1defc4f 1910 blk_queue_logical_block_size(disk->queue,
9cef0d2f 1911 h->drv[drv_index]->block_size);
6ae5ce8e
MM		 1912
1913 /* Make sure all queue data is written out before */
9cef0d2f 1914 /* setting h->drv[drv_index]->queue, as setting this */
6ae5ce8e
MM		 1915 /* allows the interrupt handler to start the queue */
1916 wmb();
9cef0d2f 1917 h->drv[drv_index]->queue = disk->queue;
6ae5ce8e 1918 add_disk(disk);
617e1344
SC		 1919 return 0;
1920
1921cleanup_queue:
1922 blk_cleanup_queue(disk->queue);
1923 disk->queue = NULL;
e8074f79 1924init_queue_failure:
617e1344 1925 return -1;
6ae5ce8e
MM		 1926}
1927
ddd47442 1928/* This function will check the usage_count of the drive to be updated/added.
a72da29b
MM		 1929 * If the usage_count is zero and it is a heretofore unknown drive, or,
1930 * the drive's capacity, geometry, or serial number has changed,
1931 * then the drive information will be updated and the disk will be
1932 * re-registered with the kernel. If these conditions don't hold,
1933 * then it will be left alone for the next reboot. The exception to this
1934 * is disk 0 which will always be left registered with the kernel since it
1935 * is also the controller node. Any changes to disk 0 will show up on
1936 * the next reboot.
7c832835 1937 */
f70dba83
SC		 1938static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
1939 int first_time, int via_ioctl)
7c832835 1940{
ddd47442 1941 struct gendisk *disk;
ddd47442
MM		 1942 InquiryData_struct *inq_buff = NULL;
1943 unsigned int block_size;
00988a35 1944 sector_t total_size;
ddd47442
MM		 1945 unsigned long flags = 0;
1946 int ret = 0;
a72da29b
MM		 1947 drive_info_struct *drvinfo;
1948
1949 /* Get information about the disk and modify the driver structure */
1950 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
9cef0d2f 1951 drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
a72da29b
MM		 1952 if (inq_buff == NULL || drvinfo == NULL)
1953 goto mem_msg;
1954
1955 /* testing to see if 16-byte CDBs are already being used */
1956 if (h->cciss_read == CCISS_READ_16) {
f70dba83 1957 cciss_read_capacity_16(h, drv_index,
a72da29b
MM		 1958 &total_size, &block_size);
1959
1960 } else {
f70dba83 1961 cciss_read_capacity(h, drv_index, &total_size, &block_size);
a72da29b
MM		 1962 /* if read_capacity returns all F's this volume is >2TB */
1963 /* in size so we switch to 16-byte CDB's for all */
1964 /* read/write ops */
1965 if (total_size == 0xFFFFFFFFULL) {
f70dba83 1966 cciss_read_capacity_16(h, drv_index,
a72da29b
MM		 1967 &total_size, &block_size);
1968 h->cciss_read = CCISS_READ_16;
1969 h->cciss_write = CCISS_WRITE_16;
1970 } else {
1971 h->cciss_read = CCISS_READ_10;
1972 h->cciss_write = CCISS_WRITE_10;
1973 }
1974 }
1975
f70dba83 1976 cciss_geometry_inquiry(h, drv_index, total_size, block_size,
a72da29b
MM		 1977 inq_buff, drvinfo);
1978 drvinfo->block_size = block_size;
1979 drvinfo->nr_blocks = total_size + 1;
1980
f70dba83 1981 cciss_get_device_descr(h, drv_index, drvinfo->vendor,
7fe06326 1982 drvinfo->model, drvinfo->rev);
f70dba83 1983 cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
a72da29b 1984 sizeof(drvinfo->serial_no));
9cef0d2f
SC		 1985 /* Save the lunid in case we deregister the disk, below. */
1986 memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
1987 sizeof(drvinfo->LunID));
a72da29b
MM		 1988
1989 /* Is it the same disk we already know, and nothing's changed? */
9cef0d2f 1990 if (h->drv[drv_index]->raid_level != -1 &&
a72da29b 1991 ((memcmp(drvinfo->serial_no,
9cef0d2f
SC		 1992 h->drv[drv_index]->serial_no, 16) == 0) &&
1993 drvinfo->block_size == h->drv[drv_index]->block_size &&
1994 drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
1995 drvinfo->heads == h->drv[drv_index]->heads &&
1996 drvinfo->sectors == h->drv[drv_index]->sectors &&
1997 drvinfo->cylinders == h->drv[drv_index]->cylinders))
a72da29b
MM		 1998 /* The disk is unchanged, nothing to update */
1999 goto freeret;
a72da29b 2000
6ae5ce8e
MM		 2001 /* If we get here it's not the same disk, or something's changed,
2002 * so we need to * deregister it, and re-register it, if it's not
2003 * in use.
2004 * If the disk already exists then deregister it before proceeding
2005 * (unless it's the first disk (for the controller node).
2006 */
9cef0d2f 2007 if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
b2a4a43d 2008 dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
f70dba83 2009 spin_lock_irqsave(&h->lock, flags);
9cef0d2f 2010 h->drv[drv_index]->busy_configuring = 1;
f70dba83 2011 spin_unlock_irqrestore(&h->lock, flags);
e14ac670 2012
9cef0d2f 2013 /* deregister_disk sets h->drv[drv_index]->queue = NULL
6ae5ce8e
MM		 2014 * which keeps the interrupt handler from starting
2015 * the queue.
2016 */
2d11d993 2017 ret = deregister_disk(h, drv_index, 0, via_ioctl);
ddd47442
MM		 2018 }
2019
2020 /* If the disk is in use return */
2021 if (ret)
a72da29b
MM		 2022 goto freeret;
2023
6ae5ce8e 2024 /* Save the new information from cciss_geometry_inquiry
9cef0d2f
SC		 2025 * and serial number inquiry. If the disk was deregistered
2026 * above, then h->drv[drv_index] will be NULL.
6ae5ce8e 2027 */
9cef0d2f
SC		 2028 if (h->drv[drv_index] == NULL) {
2029 drvinfo->device_initialized = 0;
2030 h->drv[drv_index] = drvinfo;
2031 drvinfo = NULL; /* so it won't be freed below. */
2032 } else {
2033 /* special case for cxd0 */
2034 h->drv[drv_index]->block_size = drvinfo->block_size;
2035 h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
2036 h->drv[drv_index]->heads = drvinfo->heads;
2037 h->drv[drv_index]->sectors = drvinfo->sectors;
2038 h->drv[drv_index]->cylinders = drvinfo->cylinders;
2039 h->drv[drv_index]->raid_level = drvinfo->raid_level;
2040 memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
2041 memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
2042 VENDOR_LEN + 1);
2043 memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
2044 memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
2045 }
ddd47442
MM		 2046
2047 ++h->num_luns;
2048 disk = h->gendisk[drv_index];
9cef0d2f 2049 set_capacity(disk, h->drv[drv_index]->nr_blocks);
ddd47442 2050
6ae5ce8e
MM		 2051 /* If it's not disk 0 (drv_index != 0)
2052 * or if it was disk 0, but there was previously
2053 * no actual corresponding configured logical drive
2054 * (raid_leve == -1) then we want to update the
2055 * logical drive's information.
2056 */
361e9b07
SC		 2057 if (drv_index || first_time) {
2058 if (cciss_add_disk(h, disk, drv_index) != 0) {
2059 cciss_free_gendisk(h, drv_index);
9cef0d2f 2060 cciss_free_drive_info(h, drv_index);
b2a4a43d
SC		 2061 dev_warn(&h->pdev->dev, "could not update disk %d\n",
2062 drv_index);
361e9b07
SC		 2063 --h->num_luns;
2064 }
2065 }
ddd47442 2066
6ae5ce8e 2067freeret:
ddd47442 2068 kfree(inq_buff);
a72da29b 2069 kfree(drvinfo);
ddd47442 2070 return;
6ae5ce8e 2071mem_msg:
b2a4a43d 2072 dev_err(&h->pdev->dev, "out of memory\n");
ddd47442
MM		 2073 goto freeret;
2074}
2075
2076/* This function will find the first index of the controllers drive array
9cef0d2f
SC		 2077 * that has a null drv pointer and allocate the drive info struct and
2078 * will return that index This is where new drives will be added.
2079 * If the index to be returned is greater than the highest_lun index for
2080 * the controller then highest_lun is set * to this new index.
2081 * If there are no available indexes or if tha allocation fails, then -1
2082 * is returned. * "controller_node" is used to know if this is a real
2083 * logical drive, or just the controller node, which determines if this
2084 * counts towards highest_lun.
7c832835 2085 */
9cef0d2f 2086static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
ddd47442
MM		 2087{
2088 int i;
9cef0d2f 2089 drive_info_struct *drv;
ddd47442 2090
9cef0d2f 2091 /* Search for an empty slot for our drive info */
7c832835 2092 for (i = 0; i < CISS_MAX_LUN; i++) {
9cef0d2f
SC		 2093
2094 /* if not cxd0 case, and it's occupied, skip it. */
2095 if (h->drv[i] && i != 0)
2096 continue;
2097 /*
2098 * If it's cxd0 case, and drv is alloc'ed already, and a
2099 * disk is configured there, skip it.
2100 */
2101 if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
2102 continue;
2103
2104 /*
2105 * We've found an empty slot. Update highest_lun
2106 * provided this isn't just the fake cxd0 controller node.
2107 */
2108 if (i > h->highest_lun && !controller_node)
2109 h->highest_lun = i;
2110
2111 /* If adding a real disk at cxd0, and it's already alloc'ed */
2112 if (i == 0 && h->drv[i] != NULL)
ddd47442 2113 return i;
9cef0d2f
SC		 2114
2115 /*
2116 * Found an empty slot, not already alloc'ed. Allocate it.
2117 * Mark it with raid_level == -1, so we know it's new later on.
2118 */
2119 drv = kzalloc(sizeof(*drv), GFP_KERNEL);
2120 if (!drv)
2121 return -1;
2122 drv->raid_level = -1; /* so we know it's new */
2123 h->drv[i] = drv;
2124 return i;
ddd47442
MM		 2125 }
2126 return -1;
2127}
2128
9cef0d2f
SC		 2129static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
2130{
2131 kfree(h->drv[drv_index]);
2132 h->drv[drv_index] = NULL;
2133}
2134
361e9b07
SC		 2135static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
2136{
2137 put_disk(h->gendisk[drv_index]);
2138 h->gendisk[drv_index] = NULL;
2139}
2140
6ae5ce8e
MM		 2141/* cciss_add_gendisk finds a free hba[]->drv structure
2142 * and allocates a gendisk if needed, and sets the lunid
2143 * in the drvinfo structure. It returns the index into
2144 * the ->drv[] array, or -1 if none are free.
2145 * is_controller_node indicates whether highest_lun should
2146 * count this disk, or if it's only being added to provide
2147 * a means to talk to the controller in case no logical
2148 * drives have yet been configured.
2149 */
39ccf9a6
SC		 2150static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
2151 int controller_node)
6ae5ce8e
MM		 2152{
2153 int drv_index;
2154
9cef0d2f 2155 drv_index = cciss_alloc_drive_info(h, controller_node);
6ae5ce8e
MM		 2156 if (drv_index == -1)
2157 return -1;
8ce51966 2158
6ae5ce8e
MM		 2159 /*Check if the gendisk needs to be allocated */
2160 if (!h->gendisk[drv_index]) {
2161 h->gendisk[drv_index] =
2162 alloc_disk(1 << NWD_SHIFT);
2163 if (!h->gendisk[drv_index]) {
b2a4a43d
SC		 2164 dev_err(&h->pdev->dev,
2165 "could not allocate a new disk %d\n",
2166 drv_index);
9cef0d2f 2167 goto err_free_drive_info;
6ae5ce8e
MM		 2168 }
2169 }
9cef0d2f
SC		 2170 memcpy(h->drv[drv_index]->LunID, lunid,
2171 sizeof(h->drv[drv_index]->LunID));
2172 if (cciss_create_ld_sysfs_entry(h, drv_index))
7fe06326 2173 goto err_free_disk;
6ae5ce8e
MM		 2174 /* Don't need to mark this busy because nobody */
2175 /* else knows about this disk yet to contend */
2176 /* for access to it. */
9cef0d2f 2177 h->drv[drv_index]->busy_configuring = 0;
6ae5ce8e
MM		 2178 wmb();
2179 return drv_index;
7fe06326
AP		 2180
2181err_free_disk:
361e9b07 2182 cciss_free_gendisk(h, drv_index);
9cef0d2f
SC		 2183err_free_drive_info:
2184 cciss_free_drive_info(h, drv_index);
7fe06326 2185 return -1;
6ae5ce8e
MM		 2186}
2187
2188/* This is for the special case of a controller which
2189 * has no logical drives. In this case, we still need
2190 * to register a disk so the controller can be accessed
2191 * by the Array Config Utility.
2192 */
2193static void cciss_add_controller_node(ctlr_info_t *h)
2194{
2195 struct gendisk *disk;
2196 int drv_index;
2197
2198 if (h->gendisk[0] != NULL) /* already did this? Then bail. */
2199 return;
2200
39ccf9a6 2201 drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
361e9b07
SC		 2202 if (drv_index == -1)
2203 goto error;
9cef0d2f
SC		 2204 h->drv[drv_index]->block_size = 512;
2205 h->drv[drv_index]->nr_blocks = 0;
2206 h->drv[drv_index]->heads = 0;
2207 h->drv[drv_index]->sectors = 0;
2208 h->drv[drv_index]->cylinders = 0;
2209 h->drv[drv_index]->raid_level = -1;
2210 memset(h->drv[drv_index]->serial_no, 0, 16);
6ae5ce8e 2211 disk = h->gendisk[drv_index];
361e9b07
SC		 2212 if (cciss_add_disk(h, disk, drv_index) == 0)
2213 return;
2214 cciss_free_gendisk(h, drv_index);
9cef0d2f 2215 cciss_free_drive_info(h, drv_index);
361e9b07 2216error:
b2a4a43d 2217 dev_warn(&h->pdev->dev, "could not add disk 0.\n");
361e9b07 2218 return;
6ae5ce8e
MM		 2219}
2220
ddd47442 2221/* This function will add and remove logical drives from the Logical
d14c4ab5 2222 * drive array of the controller and maintain persistency of ordering
ddd47442
MM		 2223 * so that mount points are preserved until the next reboot. This allows
2224 * for the removal of logical drives in the middle of the drive array
2225 * without a re-ordering of those drives.
2226 * INPUT
2227 * h = The controller to perform the operations on
7c832835 2228 */
2d11d993
SC		 2229static int rebuild_lun_table(ctlr_info_t *h, int first_time,
2230 int via_ioctl)
1da177e4 2231{
ddd47442
MM		 2232 int num_luns;
2233 ReportLunData_struct *ld_buff = NULL;
ddd47442
MM		 2234 int return_code;
2235 int listlength = 0;
2236 int i;
2237 int drv_found;
2238 int drv_index = 0;
39ccf9a6 2239 unsigned char lunid[8] = CTLR_LUNID;
1da177e4 2240 unsigned long flags;
ddd47442 2241
6ae5ce8e
MM		 2242 if (!capable(CAP_SYS_RAWIO))
2243 return -EPERM;
2244
ddd47442 2245 /* Set busy_configuring flag for this operation */
f70dba83 2246 spin_lock_irqsave(&h->lock, flags);
7c832835 2247 if (h->busy_configuring) {
f70dba83 2248 spin_unlock_irqrestore(&h->lock, flags);
ddd47442
MM		 2249 return -EBUSY;
2250 }
2251 h->busy_configuring = 1;
f70dba83 2252 spin_unlock_irqrestore(&h->lock, flags);
ddd47442 2253
a72da29b
MM		 2254 ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
2255 if (ld_buff == NULL)
2256 goto mem_msg;
2257
f70dba83 2258 return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
b57695fe 2259 sizeof(ReportLunData_struct),
2260 0, CTLR_LUNID, TYPE_CMD);
ddd47442 2261
a72da29b
MM		 2262 if (return_code == IO_OK)
2263 listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
2264 else { /* reading number of logical volumes failed */
b2a4a43d
SC		 2265 dev_warn(&h->pdev->dev,
2266 "report logical volume command failed\n");
a72da29b
MM		 2267 listlength = 0;
2268 goto freeret;
2269 }
2270
2271 num_luns = listlength / 8; /* 8 bytes per entry */
2272 if (num_luns > CISS_MAX_LUN) {
2273 num_luns = CISS_MAX_LUN;
b2a4a43d 2274 dev_warn(&h->pdev->dev, "more luns configured"
a72da29b
MM		 2275 " on controller than can be handled by"
2276 " this driver.\n");
2277 }
2278
6ae5ce8e
MM		 2279 if (num_luns == 0)
2280 cciss_add_controller_node(h);
2281
2282 /* Compare controller drive array to driver's drive array
2283 * to see if any drives are missing on the controller due
2284 * to action of Array Config Utility (user deletes drive)
2285 * and deregister logical drives which have disappeared.
2286 */
a72da29b
MM		 2287 for (i = 0; i <= h->highest_lun; i++) {
2288 int j;
2289 drv_found = 0;
d8a0be6a
SC		 2290
2291 /* skip holes in the array from already deleted drives */
9cef0d2f 2292 if (h->drv[i] == NULL)
d8a0be6a
SC		 2293 continue;
2294
a72da29b 2295 for (j = 0; j < num_luns; j++) {
39ccf9a6 2296 memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
9cef0d2f 2297 if (memcmp(h->drv[i]->LunID, lunid,
39ccf9a6 2298 sizeof(lunid)) == 0) {
a72da29b
MM		 2299 drv_found = 1;
2300 break;
2301 }
2302 }
2303 if (!drv_found) {
2304 /* Deregister it from the OS, it's gone. */
f70dba83 2305 spin_lock_irqsave(&h->lock, flags);
9cef0d2f 2306 h->drv[i]->busy_configuring = 1;
f70dba83 2307 spin_unlock_irqrestore(&h->lock, flags);
2d11d993 2308 return_code = deregister_disk(h, i, 1, via_ioctl);
9cef0d2f
SC		 2309 if (h->drv[i] != NULL)
2310 h->drv[i]->busy_configuring = 0;
ddd47442 2311 }
a72da29b 2312 }
ddd47442 2313
a72da29b
MM		 2314 /* Compare controller drive array to driver's drive array.
2315 * Check for updates in the drive information and any new drives
2316 * on the controller due to ACU adding logical drives, or changing
2317 * a logical drive's size, etc. Reregister any new/changed drives
2318 */
2319 for (i = 0; i < num_luns; i++) {
2320 int j;
ddd47442 2321
a72da29b 2322 drv_found = 0;
ddd47442 2323
39ccf9a6 2324 memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
a72da29b
MM		 2325 /* Find if the LUN is already in the drive array
2326 * of the driver. If so then update its info
2327 * if not in use. If it does not exist then find
2328 * the first free index and add it.
2329 */
2330 for (j = 0; j <= h->highest_lun; j++) {
9cef0d2f
SC		 2331 if (h->drv[j] != NULL &&
2332 memcmp(h->drv[j]->LunID, lunid,
2333 sizeof(h->drv[j]->LunID)) == 0) {
a72da29b
MM		 2334 drv_index = j;
2335 drv_found = 1;
2336 break;
ddd47442 2337 }
a72da29b 2338 }
ddd47442 2339
a72da29b
MM		 2340 /* check if the drive was found already in the array */
2341 if (!drv_found) {
eece695f 2342 drv_index = cciss_add_gendisk(h, lunid, 0);
a72da29b
MM		 2343 if (drv_index == -1)
2344 goto freeret;
a72da29b 2345 }
f70dba83 2346 cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
a72da29b 2347 } /* end for */
ddd47442 2348
6ae5ce8e 2349freeret:
ddd47442
MM		 2350 kfree(ld_buff);
2351 h->busy_configuring = 0;
2352 /* We return -1 here to tell the ACU that we have registered/updated
2353 * all of the drives that we can and to keep it from calling us
2354 * additional times.
7c832835 2355 */
ddd47442 2356 return -1;
6ae5ce8e 2357mem_msg:
b2a4a43d 2358 dev_err(&h->pdev->dev, "out of memory\n");
a72da29b 2359 h->busy_configuring = 0;
ddd47442
MM		 2360 goto freeret;
2361}
2362
9ddb27b4
SC		 2363static void cciss_clear_drive_info(drive_info_struct *drive_info)
2364{
2365 /* zero out the disk size info */
2366 drive_info->nr_blocks = 0;
2367 drive_info->block_size = 0;
2368 drive_info->heads = 0;
2369 drive_info->sectors = 0;
2370 drive_info->cylinders = 0;
2371 drive_info->raid_level = -1;
2372 memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
2373 memset(drive_info->model, 0, sizeof(drive_info->model));
2374 memset(drive_info->rev, 0, sizeof(drive_info->rev));
2375 memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
2376 /*
2377 * don't clear the LUNID though, we need to remember which
2378 * one this one is.
2379 */
2380}
2381
ddd47442
MM		 2382/* This function will deregister the disk and it's queue from the
2383 * kernel. It must be called with the controller lock held and the
2384 * drv structures busy_configuring flag set. It's parameters are:
2385 *
2386 * disk = This is the disk to be deregistered
2387 * drv = This is the drive_info_struct associated with the disk to be
2388 * deregistered. It contains information about the disk used
2389 * by the driver.
2390 * clear_all = This flag determines whether or not the disk information
2391 * is going to be completely cleared out and the highest_lun
2392 * reset. Sometimes we want to clear out information about
d14c4ab5 2393 * the disk in preparation for re-adding it. In this case
ddd47442
MM		 2394 * the highest_lun should be left unchanged and the LunID
2395 * should not be cleared.
2d11d993
SC		 2396 * via_ioctl
2397 * This indicates whether we've reached this path via ioctl.
2398 * This affects the maximum usage count allowed for c0d0 to be messed with.
2399 * If this path is reached via ioctl(), then the max_usage_count will
2400 * be 1, as the process calling ioctl() has got to have the device open.
2401 * If we get here via sysfs, then the max usage count will be zero.
ddd47442 2402*/
a0ea8622 2403static int deregister_disk(ctlr_info_t *h, int drv_index,
2d11d993 2404 int clear_all, int via_ioctl)
ddd47442 2405{
799202cb 2406 int i;
a0ea8622
SC		 2407 struct gendisk *disk;
2408 drive_info_struct *drv;
9cef0d2f 2409 int recalculate_highest_lun;
1da177e4
LT		 2410
2411 if (!capable(CAP_SYS_RAWIO))
2412 return -EPERM;
2413
9cef0d2f 2414 drv = h->drv[drv_index];
a0ea8622
SC		 2415 disk = h->gendisk[drv_index];
2416
1da177e4 2417 /* make sure logical volume is NOT is use */
7c832835 2418 if (clear_all || (h->gendisk[0] == disk)) {
2d11d993 2419 if (drv->usage_count > via_ioctl)
7c832835
BH		 2420 return -EBUSY;
2421 } else if (drv->usage_count > 0)
2422 return -EBUSY;
1da177e4 2423
9cef0d2f
SC		 2424 recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
2425
ddd47442
MM		 2426 /* invalidate the devices and deregister the disk. If it is disk
2427 * zero do not deregister it but just zero out it's values. This
2428 * allows us to delete disk zero but keep the controller registered.
7c832835
BH		 2429 */
2430 if (h->gendisk[0] != disk) {
5a9df732 2431 struct request_queue *q = disk->queue;
097d0264 2432 if (disk->flags & GENHD_FL_UP) {
8ce51966 2433 cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
5a9df732 2434 del_gendisk(disk);
5a9df732 2435 }
9cef0d2f 2436 if (q)
5a9df732 2437 blk_cleanup_queue(q);
5a9df732
AB		 2438 /* If clear_all is set then we are deleting the logical
2439 * drive, not just refreshing its info. For drives
2440 * other than disk 0 we will call put_disk. We do not
2441 * do this for disk 0 as we need it to be able to
2442 * configure the controller.
a72da29b 2443 */
5a9df732
AB		 2444 if (clear_all){
2445 /* This isn't pretty, but we need to find the
2446 * disk in our array and NULL our the pointer.
2447 * This is so that we will call alloc_disk if
2448 * this index is used again later.
a72da29b 2449 */
5a9df732 2450 for (i=0; i < CISS_MAX_LUN; i++){
a72da29b 2451 if (h->gendisk[i] == disk) {
5a9df732
AB		 2452 h->gendisk[i] = NULL;
2453 break;
799202cb 2454 }
799202cb 2455 }
5a9df732 2456 put_disk(disk);
ddd47442 2457 }
799202cb
MM		 2458 } else {
2459 set_capacity(disk, 0);
9cef0d2f 2460 cciss_clear_drive_info(drv);
ddd47442
MM		 2461 }
2462
2463 --h->num_luns;
ddd47442 2464
9cef0d2f
SC		 2465 /* if it was the last disk, find the new hightest lun */
2466 if (clear_all && recalculate_highest_lun) {
c2d45b4d 2467 int newhighest = -1;
9cef0d2f
SC		 2468 for (i = 0; i <= h->highest_lun; i++) {
2469 /* if the disk has size > 0, it is available */
2470 if (h->drv[i] && h->drv[i]->heads)
2471 newhighest = i;
1da177e4 2472 }
9cef0d2f 2473 h->highest_lun = newhighest;
ddd47442 2474 }
e2019b58 2475 return 0;
1da177e4 2476}
ddd47442 2477
f70dba83 2478static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
b57695fe 2479 size_t size, __u8 page_code, unsigned char *scsi3addr,
2480 int cmd_type)
1da177e4 2481{
1da177e4
LT		 2482 u64bit buff_dma_handle;
2483 int status = IO_OK;
2484
2485 c->cmd_type = CMD_IOCTL_PEND;
2486 c->Header.ReplyQueue = 0;
7c832835 2487 if (buff != NULL) {
1da177e4 2488 c->Header.SGList = 1;
7c832835 2489 c->Header.SGTotal = 1;
1da177e4
LT		 2490 } else {
2491 c->Header.SGList = 0;
7c832835 2492 c->Header.SGTotal = 0;
1da177e4
LT		 2493 }
2494 c->Header.Tag.lower = c->busaddr;
b57695fe 2495 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
1da177e4
LT		 2496
2497 c->Request.Type.Type = cmd_type;
2498 if (cmd_type == TYPE_CMD) {
7c832835
BH		 2499 switch (cmd) {
2500 case CISS_INQUIRY:
1da177e4 2501 /* are we trying to read a vital product page */
7c832835 2502 if (page_code != 0) {
1da177e4
LT		 2503 c->Request.CDB[1] = 0x01;
2504 c->Request.CDB[2] = page_code;
2505 }
2506 c->Request.CDBLen = 6;
7c832835 2507 c->Request.Type.Attribute = ATTR_SIMPLE;
1da177e4
LT		 2508 c->Request.Type.Direction = XFER_READ;
2509 c->Request.Timeout = 0;
7c832835
BH		 2510 c->Request.CDB[0] = CISS_INQUIRY;
2511 c->Request.CDB[4] = size & 0xFF;
2512 break;
1da177e4
LT		 2513 case CISS_REPORT_LOG:
2514 case CISS_REPORT_PHYS:
7c832835 2515 /* Talking to controller so It's a physical command
1da177e4 2516 mode = 00 target = 0. Nothing to write.
7c832835 2517 */
1da177e4
LT		 2518 c->Request.CDBLen = 12;
2519 c->Request.Type.Attribute = ATTR_SIMPLE;
2520 c->Request.Type.Direction = XFER_READ;
2521 c->Request.Timeout = 0;
2522 c->Request.CDB[0] = cmd;
b028461d 2523 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
1da177e4
LT		 2524 c->Request.CDB[7] = (size >> 16) & 0xFF;
2525 c->Request.CDB[8] = (size >> 8) & 0xFF;
2526 c->Request.CDB[9] = size & 0xFF;
2527 break;
2528
2529 case CCISS_READ_CAPACITY:
1da177e4
LT		 2530 c->Request.CDBLen = 10;
2531 c->Request.Type.Attribute = ATTR_SIMPLE;
2532 c->Request.Type.Direction = XFER_READ;
2533 c->Request.Timeout = 0;
2534 c->Request.CDB[0] = cmd;
7c832835 2535 break;
00988a35 2536 case CCISS_READ_CAPACITY_16:
00988a35
MMOD		 2537 c->Request.CDBLen = 16;
2538 c->Request.Type.Attribute = ATTR_SIMPLE;
2539 c->Request.Type.Direction = XFER_READ;
2540 c->Request.Timeout = 0;
2541 c->Request.CDB[0] = cmd;
2542 c->Request.CDB[1] = 0x10;
2543 c->Request.CDB[10] = (size >> 24) & 0xFF;
2544 c->Request.CDB[11] = (size >> 16) & 0xFF;
2545 c->Request.CDB[12] = (size >> 8) & 0xFF;
2546 c->Request.CDB[13] = size & 0xFF;
2547 c->Request.Timeout = 0;
2548 c->Request.CDB[0] = cmd;
2549 break;
1da177e4
LT		 2550 case CCISS_CACHE_FLUSH:
2551 c->Request.CDBLen = 12;
2552 c->Request.Type.Attribute = ATTR_SIMPLE;
2553 c->Request.Type.Direction = XFER_WRITE;
2554 c->Request.Timeout = 0;
2555 c->Request.CDB[0] = BMIC_WRITE;
2556 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
7c832835 2557 break;
88f627ae 2558 case TEST_UNIT_READY:
88f627ae
SC		 2559 c->Request.CDBLen = 6;
2560 c->Request.Type.Attribute = ATTR_SIMPLE;
2561 c->Request.Type.Direction = XFER_NONE;
2562 c->Request.Timeout = 0;
2563 break;
1da177e4 2564 default:
b2a4a43d 2565 dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
e2019b58 2566 return IO_ERROR;
1da177e4
LT		 2567 }
2568 } else if (cmd_type == TYPE_MSG) {
2569 switch (cmd) {
7c832835 2570 case 0: /* ABORT message */
3da8b713 2571 c->Request.CDBLen = 12;
2572 c->Request.Type.Attribute = ATTR_SIMPLE;
2573 c->Request.Type.Direction = XFER_WRITE;
2574 c->Request.Timeout = 0;
7c832835
BH		 2575 c->Request.CDB[0] = cmd; /* abort */
2576 c->Request.CDB[1] = 0; /* abort a command */
3da8b713 2577 /* buff contains the tag of the command to abort */
2578 memcpy(&c->Request.CDB[4], buff, 8);
2579 break;
7c832835 2580 case 1: /* RESET message */
88f627ae 2581 c->Request.CDBLen = 16;
3da8b713 2582 c->Request.Type.Attribute = ATTR_SIMPLE;
88f627ae 2583 c->Request.Type.Direction = XFER_NONE;
3da8b713 2584 c->Request.Timeout = 0;
2585 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
7c832835 2586 c->Request.CDB[0] = cmd; /* reset */
88f627ae 2587 c->Request.CDB[1] = 0x03; /* reset a target */
00988a35 2588 break;
1da177e4
LT		 2589 case 3: /* No-Op message */
2590 c->Request.CDBLen = 1;
2591 c->Request.Type.Attribute = ATTR_SIMPLE;
2592 c->Request.Type.Direction = XFER_WRITE;
2593 c->Request.Timeout = 0;
2594 c->Request.CDB[0] = cmd;
2595 break;
2596 default:
b2a4a43d
SC		 2597 dev_warn(&h->pdev->dev,
2598 "unknown message type %d\n", cmd);
1da177e4
LT		 2599 return IO_ERROR;
2600 }
2601 } else {
b2a4a43d 2602 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
1da177e4
LT		 2603 return IO_ERROR;
2604 }
2605 /* Fill in the scatter gather information */
2606 if (size > 0) {
2607 buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
7c832835
BH		 2608 buff, size,
2609 PCI_DMA_BIDIRECTIONAL);
1da177e4
LT		 2610 c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
2611 c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
2612 c->SG[0].Len = size;
7c832835 2613 c->SG[0].Ext = 0; /* we are not chaining */
1da177e4
LT		 2614 }
2615 return status;
2616}
7c832835 2617
3c2ab402 2618static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
2619{
2620 switch (c->err_info->ScsiStatus) {
2621 case SAM_STAT_GOOD:
2622 return IO_OK;
2623 case SAM_STAT_CHECK_CONDITION:
2624 switch (0xf & c->err_info->SenseInfo[2]) {
2625 case 0: return IO_OK; /* no sense */
2626 case 1: return IO_OK; /* recovered error */
2627 default:
c08fac65
SC		 2628 if (check_for_unit_attention(h, c))
2629 return IO_NEEDS_RETRY;
b2a4a43d 2630 dev_warn(&h->pdev->dev, "cmd 0x%02x "
3c2ab402 2631 "check condition, sense key = 0x%02x\n",
b2a4a43d 2632 c->Request.CDB[0], c->err_info->SenseInfo[2]);
3c2ab402 2633 }
2634 break;
2635 default:
b2a4a43d
SC		 2636 dev_warn(&h->pdev->dev, "cmd 0x%02x"
2637 "scsi status = 0x%02x\n",
3c2ab402 2638 c->Request.CDB[0], c->err_info->ScsiStatus);
2639 break;
2640 }
2641 return IO_ERROR;
2642}
2643
789a424a 2644static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
1da177e4 2645{
5390cfc3 2646 int return_status = IO_OK;
7c832835 2647
789a424a 2648 if (c->err_info->CommandStatus == CMD_SUCCESS)
2649 return IO_OK;
5390cfc3 2650
2651 switch (c->err_info->CommandStatus) {
2652 case CMD_TARGET_STATUS:
3c2ab402 2653 return_status = check_target_status(h, c);
5390cfc3 2654 break;
2655 case CMD_DATA_UNDERRUN:
2656 case CMD_DATA_OVERRUN:
2657 /* expected for inquiry and report lun commands */
2658 break;
2659 case CMD_INVALID:
b2a4a43d 2660 dev_warn(&h->pdev->dev, "cmd 0x%02x is "
5390cfc3 2661 "reported invalid\n", c->Request.CDB[0]);
2662 return_status = IO_ERROR;
2663 break;
2664 case CMD_PROTOCOL_ERR:
b2a4a43d
SC		 2665 dev_warn(&h->pdev->dev, "cmd 0x%02x has "
2666 "protocol error\n", c->Request.CDB[0]);
5390cfc3 2667 return_status = IO_ERROR;
2668 break;
2669 case CMD_HARDWARE_ERR:
b2a4a43d 2670 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
5390cfc3 2671 " hardware error\n", c->Request.CDB[0]);
2672 return_status = IO_ERROR;
2673 break;
2674 case CMD_CONNECTION_LOST:
b2a4a43d 2675 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
5390cfc3 2676 "connection lost\n", c->Request.CDB[0]);
2677 return_status = IO_ERROR;
2678 break;
2679 case CMD_ABORTED:
b2a4a43d 2680 dev_warn(&h->pdev->dev, "cmd 0x%02x was "
5390cfc3 2681 "aborted\n", c->Request.CDB[0]);
2682 return_status = IO_ERROR;
2683 break;
2684 case CMD_ABORT_FAILED:
b2a4a43d 2685 dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
5390cfc3 2686 "abort failed\n", c->Request.CDB[0]);
2687 return_status = IO_ERROR;
2688 break;
2689 case CMD_UNSOLICITED_ABORT:
b2a4a43d 2690 dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
5390cfc3 2691 c->Request.CDB[0]);
789a424a 2692 return_status = IO_NEEDS_RETRY;
5390cfc3 2693 break;
6d9a4f9e
SC		 2694 case CMD_UNABORTABLE:
2695 dev_warn(&h->pdev->dev, "cmd unabortable\n");
2696 return_status = IO_ERROR;
2697 break;
5390cfc3 2698 default:
b2a4a43d 2699 dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
5390cfc3 2700 "unknown status %x\n", c->Request.CDB[0],
2701 c->err_info->CommandStatus);
2702 return_status = IO_ERROR;
7c832835 2703 }
789a424a 2704 return return_status;
2705}
2706
2707static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
2708 int attempt_retry)
2709{
2710 DECLARE_COMPLETION_ONSTACK(wait);
2711 u64bit buff_dma_handle;
789a424a 2712 int return_status = IO_OK;
2713
2714resend_cmd2:
2715 c->waiting = &wait;
664a717d 2716 enqueue_cmd_and_start_io(h, c);
789a424a 2717
2718 wait_for_completion(&wait);
2719
2720 if (c->err_info->CommandStatus == 0 || !attempt_retry)
2721 goto command_done;
2722
2723 return_status = process_sendcmd_error(h, c);
2724
2725 if (return_status == IO_NEEDS_RETRY &&
2726 c->retry_count < MAX_CMD_RETRIES) {
b2a4a43d 2727 dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
789a424a 2728 c->Request.CDB[0]);
2729 c->retry_count++;
2730 /* erase the old error information */
2731 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2732 return_status = IO_OK;
2733 INIT_COMPLETION(wait);
2734 goto resend_cmd2;
2735 }
5390cfc3 2736
2737command_done:
1da177e4 2738 /* unlock the buffers from DMA */
bb2a37bf
MM		 2739 buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
2740 buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
7c832835
BH		 2741 pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
2742 c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
5390cfc3 2743 return return_status;
2744}
2745
f70dba83 2746static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
b57695fe 2747 __u8 page_code, unsigned char scsi3addr[],
2748 int cmd_type)
5390cfc3 2749{
5390cfc3 2750 CommandList_struct *c;
2751 int return_status;
2752
6b4d96b8 2753 c = cmd_special_alloc(h);
5390cfc3 2754 if (!c)
2755 return -ENOMEM;
f70dba83 2756 return_status = fill_cmd(h, c, cmd, buff, size, page_code,
b57695fe 2757 scsi3addr, cmd_type);
5390cfc3 2758 if (return_status == IO_OK)
789a424a 2759 return_status = sendcmd_withirq_core(h, c, 1);
2760
6b4d96b8 2761 cmd_special_free(h, c);
7c832835 2762 return return_status;
1da177e4 2763}
7c832835 2764
f70dba83 2765static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
7b838bde 2766 sector_t total_size,
7c832835
BH		 2767 unsigned int block_size,
2768 InquiryData_struct *inq_buff,
2769 drive_info_struct *drv)
1da177e4
LT		 2770{
2771 int return_code;
00988a35 2772 unsigned long t;
b57695fe 2773 unsigned char scsi3addr[8];
00988a35 2774
1da177e4 2775 memset(inq_buff, 0, sizeof(InquiryData_struct));
f70dba83
SC		 2776 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2777 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
7b838bde 2778 sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
1da177e4 2779 if (return_code == IO_OK) {
7c832835 2780 if (inq_buff->data_byte[8] == 0xFF) {
b2a4a43d
SC		 2781 dev_warn(&h->pdev->dev,
2782 "reading geometry failed, volume "
7c832835 2783 "does not support reading geometry\n");
1da177e4 2784 drv->heads = 255;
b028461d 2785 drv->sectors = 32; /* Sectors per track */
7f42d3b8 2786 drv->cylinders = total_size + 1;
89f97ad1 2787 drv->raid_level = RAID_UNKNOWN;
1da177e4 2788 } else {
1da177e4
LT		 2789 drv->heads = inq_buff->data_byte[6];
2790 drv->sectors = inq_buff->data_byte[7];
2791 drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
2792 drv->cylinders += inq_buff->data_byte[5];
2793 drv->raid_level = inq_buff->data_byte[8];
3f7705ea
MW		 2794 }
2795 drv->block_size = block_size;
97c06978 2796 drv->nr_blocks = total_size + 1;
3f7705ea
MW		 2797 t = drv->heads * drv->sectors;
2798 if (t > 1) {
97c06978
MMOD		 2799 sector_t real_size = total_size + 1;
2800 unsigned long rem = sector_div(real_size, t);
3f7705ea 2801 if (rem)
97c06978
MMOD		 2802 real_size++;
2803 drv->cylinders = real_size;
1da177e4 2804 }
7c832835 2805 } else { /* Get geometry failed */
b2a4a43d 2806 dev_warn(&h->pdev->dev, "reading geometry failed\n");
1da177e4 2807 }
1da177e4 2808}
7c832835 2809
1da177e4 2810static void
f70dba83 2811cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
7c832835 2812 unsigned int *block_size)
1da177e4 2813{
00988a35 2814 ReadCapdata_struct *buf;
1da177e4 2815 int return_code;
b57695fe 2816 unsigned char scsi3addr[8];
1aebe187
MK		 2817
2818 buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
2819 if (!buf) {
b2a4a43d 2820 dev_warn(&h->pdev->dev, "out of memory\n");
00988a35
MMOD		 2821 return;
2822 }
1aebe187 2823
f70dba83
SC		 2824 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2825 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
7b838bde 2826 sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
1da177e4 2827 if (return_code == IO_OK) {
4c1f2b31
AV		 2828 *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
2829 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
7c832835 2830 } else { /* read capacity command failed */
b2a4a43d 2831 dev_warn(&h->pdev->dev, "read capacity failed\n");
1da177e4
LT		 2832 *total_size = 0;
2833 *block_size = BLOCK_SIZE;
2834 }
00988a35 2835 kfree(buf);
00988a35
MMOD		 2836}
2837
f70dba83 2838static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
7b838bde 2839 sector_t *total_size, unsigned int *block_size)
00988a35
MMOD		 2840{
2841 ReadCapdata_struct_16 *buf;
2842 int return_code;
b57695fe 2843 unsigned char scsi3addr[8];
1aebe187
MK		 2844
2845 buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
2846 if (!buf) {
b2a4a43d 2847 dev_warn(&h->pdev->dev, "out of memory\n");
00988a35
MMOD		 2848 return;
2849 }
1aebe187 2850
f70dba83
SC		 2851 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2852 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
2853 buf, sizeof(ReadCapdata_struct_16),
7b838bde 2854 0, scsi3addr, TYPE_CMD);
00988a35 2855 if (return_code == IO_OK) {
4c1f2b31
AV		 2856 *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
2857 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
00988a35 2858 } else { /* read capacity command failed */
b2a4a43d 2859 dev_warn(&h->pdev->dev, "read capacity failed\n");
00988a35
MMOD		 2860 *total_size = 0;
2861 *block_size = BLOCK_SIZE;
2862 }
b2a4a43d 2863 dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n",
97c06978 2864 (unsigned long long)*total_size+1, *block_size);
00988a35 2865 kfree(buf);
1da177e4
LT		 2866}
2867
1da177e4
LT		 2868static int cciss_revalidate(struct gendisk *disk)
2869{
2870 ctlr_info_t *h = get_host(disk);
2871 drive_info_struct *drv = get_drv(disk);
2872 int logvol;
7c832835 2873 int FOUND = 0;
1da177e4 2874 unsigned int block_size;
00988a35 2875 sector_t total_size;
1da177e4
LT		 2876 InquiryData_struct *inq_buff = NULL;
2877
68264e9d 2878 for (logvol = 0; logvol <= h->highest_lun; logvol++) {
0fc13c89 2879 if (!h->drv[logvol])
453434cf 2880 continue;
9cef0d2f 2881 if (memcmp(h->drv[logvol]->LunID, drv->LunID,
39ccf9a6 2882 sizeof(drv->LunID)) == 0) {
7c832835 2883 FOUND = 1;
1da177e4
LT		 2884 break;
2885 }
2886 }
2887
7c832835
BH		 2888 if (!FOUND)
2889 return 1;
1da177e4 2890
7c832835
BH		 2891 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2892 if (inq_buff == NULL) {
b2a4a43d 2893 dev_warn(&h->pdev->dev, "out of memory\n");
7c832835
BH		 2894 return 1;
2895 }
00988a35 2896 if (h->cciss_read == CCISS_READ_10) {
f70dba83 2897 cciss_read_capacity(h, logvol,
00988a35
MMOD		 2898 &total_size, &block_size);
2899 } else {
f70dba83 2900 cciss_read_capacity_16(h, logvol,
00988a35
MMOD		 2901 &total_size, &block_size);
2902 }
f70dba83 2903 cciss_geometry_inquiry(h, logvol, total_size, block_size,
7c832835 2904 inq_buff, drv);
1da177e4 2905
e1defc4f 2906 blk_queue_logical_block_size(drv->queue, drv->block_size);
1da177e4
LT		 2907 set_capacity(disk, drv->nr_blocks);
2908
1da177e4
LT		 2909 kfree(inq_buff);
2910 return 0;
2911}
2912
1da177e4
LT		 2913/*
2914 * Map (physical) PCI mem into (virtual) kernel space
2915 */
2916static void __iomem *remap_pci_mem(ulong base, ulong size)
2917{
7c832835
BH		 2918 ulong page_base = ((ulong) base) & PAGE_MASK;
2919 ulong page_offs = ((ulong) base) - page_base;
2920 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
1da177e4 2921
7c832835 2922 return page_remapped ? (page_remapped + page_offs) : NULL;
1da177e4
LT		 2923}
2924
7c832835
BH		 2925/*
2926 * Takes jobs of the Q and sends them to the hardware, then puts it on
2927 * the Q to wait for completion.
2928 */
2929static void start_io(ctlr_info_t *h)
1da177e4
LT		 2930{
2931 CommandList_struct *c;
7c832835 2932
e6e1ee93
JA		 2933 while (!list_empty(&h->reqQ)) {
2934 c = list_entry(h->reqQ.next, CommandList_struct, list);
1da177e4
LT		 2935 /* can't do anything if fifo is full */
2936 if ((h->access.fifo_full(h))) {
b2a4a43d 2937 dev_warn(&h->pdev->dev, "fifo full\n");
1da177e4
LT		 2938 break;
2939 }
2940
7c832835 2941 /* Get the first entry from the Request Q */
8a3173de 2942 removeQ(c);
1da177e4 2943 h->Qdepth--;
7c832835
BH		 2944
2945 /* Tell the controller execute command */
1da177e4 2946 h->access.submit_command(h, c);
7c832835
BH		 2947
2948 /* Put job onto the completed Q */
8a3173de 2949 addQ(&h->cmpQ, c);
1da177e4
LT		 2950 }
2951}
7c832835 2952
f70dba83 2953/* Assumes that h->lock is held. */
1da177e4
LT		 2954/* Zeros out the error record and then resends the command back */
2955/* to the controller */
7c832835 2956static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
1da177e4
LT		 2957{
2958 /* erase the old error information */
2959 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2960
2961 /* add it to software queue and then send it to the controller */
8a3173de 2962 addQ(&h->reqQ, c);
1da177e4 2963 h->Qdepth++;
7c832835 2964 if (h->Qdepth > h->maxQsinceinit)
1da177e4
LT		 2965 h->maxQsinceinit = h->Qdepth;
2966
2967 start_io(h);
2968}
a9925a06 2969
1a614f50
SC		 2970static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
2971 unsigned int msg_byte, unsigned int host_byte,
2972 unsigned int driver_byte)
2973{
2974 /* inverse of macros in scsi.h */
2975 return (scsi_status_byte & 0xff) |
2976 ((msg_byte & 0xff) << 8) |
2977 ((host_byte & 0xff) << 16) |
2978 ((driver_byte & 0xff) << 24);
2979}
2980
0a9279cc
MM		 2981static inline int evaluate_target_status(ctlr_info_t *h,
2982 CommandList_struct *cmd, int *retry_cmd)
03bbfee5
MMOD		 2983{
2984 unsigned char sense_key;
1a614f50
SC		 2985 unsigned char status_byte, msg_byte, host_byte, driver_byte;
2986 int error_value;
2987
0a9279cc 2988 *retry_cmd = 0;
1a614f50
SC		 2989 /* If we get in here, it means we got "target status", that is, scsi status */
2990 status_byte = cmd->err_info->ScsiStatus;
2991 driver_byte = DRIVER_OK;
2992 msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
2993
33659ebb 2994 if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
1a614f50
SC		 2995 host_byte = DID_PASSTHROUGH;
2996 else
2997 host_byte = DID_OK;
2998
2999 error_value = make_status_bytes(status_byte, msg_byte,
3000 host_byte, driver_byte);
03bbfee5 3001
1a614f50 3002 if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
33659ebb 3003 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
b2a4a43d 3004 dev_warn(&h->pdev->dev, "cmd %p "
03bbfee5
MMOD		 3005 "has SCSI Status 0x%x\n",
3006 cmd, cmd->err_info->ScsiStatus);
1a614f50 3007 return error_value;
03bbfee5
MMOD		 3008 }
3009
3010 /* check the sense key */
3011 sense_key = 0xf & cmd->err_info->SenseInfo[2];
3012 /* no status or recovered error */
33659ebb
CH		 3013 if (((sense_key == 0x0) || (sense_key == 0x1)) &&
3014 (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
1a614f50 3015 error_value = 0;
03bbfee5 3016
0a9279cc 3017 if (check_for_unit_attention(h, cmd)) {
33659ebb 3018 *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
0a9279cc
MM		 3019 return 0;
3020 }
3021
33659ebb
CH		 3022 /* Not SG_IO or similar? */
3023 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
1a614f50 3024 if (error_value != 0)
b2a4a43d 3025 dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
03bbfee5 3026 " sense key = 0x%x\n", cmd, sense_key);
1a614f50 3027 return error_value;
03bbfee5
MMOD		 3028 }
3029
3030 /* SG_IO or similar, copy sense data back */
3031 if (cmd->rq->sense) {
3032 if (cmd->rq->sense_len > cmd->err_info->SenseLen)
3033 cmd->rq->sense_len = cmd->err_info->SenseLen;
3034 memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
3035 cmd->rq->sense_len);
3036 } else
3037 cmd->rq->sense_len = 0;
3038
1a614f50 3039 return error_value;
03bbfee5
MMOD		 3040}
3041
7c832835 3042/* checks the status of the job and calls complete buffers to mark all
a9925a06
JA		 3043 * buffers for the completed job. Note that this function does not need
3044 * to hold the hba/queue lock.
7c832835
BH		 3045 */
3046static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
3047 int timeout)
1da177e4 3048{
1da177e4 3049 int retry_cmd = 0;
198b7660
MMOD		 3050 struct request *rq = cmd->rq;
3051
3052 rq->errors = 0;
7c832835 3053
1da177e4 3054 if (timeout)
1a614f50 3055 rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
1da177e4 3056
d38ae168
MMOD		 3057 if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
3058 goto after_error_processing;
7c832835 3059
d38ae168 3060 switch (cmd->err_info->CommandStatus) {
d38ae168 3061 case CMD_TARGET_STATUS:
0a9279cc 3062 rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
d38ae168
MMOD		 3063 break;
3064 case CMD_DATA_UNDERRUN:
33659ebb 3065 if (cmd->rq->cmd_type == REQ_TYPE_FS) {
b2a4a43d 3066 dev_warn(&h->pdev->dev, "cmd %p has"
03bbfee5
MMOD		 3067 " completed with data underrun "
3068 "reported\n", cmd);
c3a4d78c 3069 cmd->rq->resid_len = cmd->err_info->ResidualCnt;
03bbfee5 3070 }
d38ae168
MMOD		 3071 break;
3072 case CMD_DATA_OVERRUN:
33659ebb 3073 if (cmd->rq->cmd_type == REQ_TYPE_FS)
b2a4a43d 3074 dev_warn(&h->pdev->dev, "cciss: cmd %p has"
03bbfee5
MMOD		 3075 " completed with data overrun "
3076 "reported\n", cmd);
d38ae168
MMOD		 3077 break;
3078 case CMD_INVALID:
b2a4a43d 3079 dev_warn(&h->pdev->dev, "cciss: cmd %p is "
d38ae168 3080 "reported invalid\n", cmd);
1a614f50
SC		 3081 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3082 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3083 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3084 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3085 break;
3086 case CMD_PROTOCOL_ERR:
b2a4a43d
SC		 3087 dev_warn(&h->pdev->dev, "cciss: cmd %p has "
3088 "protocol error\n", cmd);
1a614f50
SC		 3089 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3090 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3091 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3092 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3093 break;
3094 case CMD_HARDWARE_ERR:
b2a4a43d 3095 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
d38ae168 3096 " hardware error\n", cmd);
1a614f50
SC		 3097 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3098 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3099 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3100 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3101 break;
3102 case CMD_CONNECTION_LOST:
b2a4a43d 3103 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
d38ae168 3104 "connection lost\n", cmd);
1a614f50
SC		 3105 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3106 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3107 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3108 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3109 break;
3110 case CMD_ABORTED:
b2a4a43d 3111 dev_warn(&h->pdev->dev, "cciss: cmd %p was "
d38ae168 3112 "aborted\n", cmd);
1a614f50
SC		 3113 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3114 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3115 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3116 DID_PASSTHROUGH : DID_ABORT);
d38ae168
MMOD		 3117 break;
3118 case CMD_ABORT_FAILED:
b2a4a43d 3119 dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
d38ae168 3120 "abort failed\n", cmd);
1a614f50
SC		 3121 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3122 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3123 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3124 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3125 break;
3126 case CMD_UNSOLICITED_ABORT:
b2a4a43d 3127 dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
d38ae168
MMOD		 3128 "abort %p\n", h->ctlr, cmd);
3129 if (cmd->retry_count < MAX_CMD_RETRIES) {
3130 retry_cmd = 1;
b2a4a43d 3131 dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
d38ae168
MMOD		 3132 cmd->retry_count++;
3133 } else
b2a4a43d
SC		 3134 dev_warn(&h->pdev->dev,
3135 "%p retried too many times\n", cmd);
1a614f50
SC		 3136 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3137 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3138 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3139 DID_PASSTHROUGH : DID_ABORT);
d38ae168
MMOD		 3140 break;
3141 case CMD_TIMEOUT:
b2a4a43d 3142 dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
1a614f50
SC		 3143 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3144 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3145 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3146 DID_PASSTHROUGH : DID_ERROR);
d38ae168 3147 break;
6d9a4f9e
SC		 3148 case CMD_UNABORTABLE:
3149 dev_warn(&h->pdev->dev, "cmd %p unabortable\n", cmd);
3150 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3151 cmd->err_info->CommandStatus, DRIVER_OK,
3152 cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC ?
3153 DID_PASSTHROUGH : DID_ERROR);
3154 break;
d38ae168 3155 default:
b2a4a43d 3156 dev_warn(&h->pdev->dev, "cmd %p returned "
d38ae168
MMOD		 3157 "unknown status %x\n", cmd,
3158 cmd->err_info->CommandStatus);
1a614f50
SC		 3159 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3160 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3161 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3162 DID_PASSTHROUGH : DID_ERROR);
1da177e4 3163 }
d38ae168
MMOD		 3164
3165after_error_processing:
3166
1da177e4 3167 /* We need to return this command */
7c832835
BH		 3168 if (retry_cmd) {
3169 resend_cciss_cmd(h, cmd);
1da177e4 3170 return;
7c832835 3171 }
03bbfee5 3172 cmd->rq->completion_data = cmd;
a9925a06 3173 blk_complete_request(cmd->rq);
1da177e4
LT		 3174}
3175
0c2b3908
MM		 3176static inline u32 cciss_tag_contains_index(u32 tag)
3177{
5e216153 3178#define DIRECT_LOOKUP_BIT 0x10
0c2b3908
MM		 3179 return tag & DIRECT_LOOKUP_BIT;
3180}
3181
3182static inline u32 cciss_tag_to_index(u32 tag)
3183{
5e216153 3184#define DIRECT_LOOKUP_SHIFT 5
0c2b3908
MM		 3185 return tag >> DIRECT_LOOKUP_SHIFT;
3186}
3187
0498cc2a 3188static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag)
0c2b3908 3189{
0498cc2a
SC		 3190#define CCISS_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3191#define CCISS_SIMPLE_ERROR_BITS 0x03
3192 if (likely(h->transMethod & CFGTBL_Trans_Performant))
3193 return tag & ~CCISS_PERF_ERROR_BITS;
3194 return tag & ~CCISS_SIMPLE_ERROR_BITS;
0c2b3908
MM		 3195}
3196
3197static inline void cciss_mark_tag_indexed(u32 *tag)
3198{
3199 *tag |= DIRECT_LOOKUP_BIT;
3200}
3201
3202static inline void cciss_set_tag_index(u32 *tag, u32 index)
3203{
3204 *tag |= (index << DIRECT_LOOKUP_SHIFT);
3205}
3206
7c832835
BH		 3207/*
3208 * Get a request and submit it to the controller.
1da177e4 3209 */
165125e1 3210static void do_cciss_request(struct request_queue *q)
1da177e4 3211{
7c832835 3212 ctlr_info_t *h = q->queuedata;
1da177e4 3213 CommandList_struct *c;
00988a35
MMOD		 3214 sector_t start_blk;
3215 int seg;
1da177e4
LT		 3216 struct request *creq;
3217 u64bit temp64;
5c07a311
DB		 3218 struct scatterlist *tmp_sg;
3219 SGDescriptor_struct *curr_sg;
1da177e4
LT		 3220 drive_info_struct *drv;
3221 int i, dir;
5c07a311
DB		 3222 int sg_index = 0;
3223 int chained = 0;
1da177e4 3224
7c832835 3225 queue:
9934c8c0 3226 creq = blk_peek_request(q);
1da177e4
LT		 3227 if (!creq)
3228 goto startio;
3229
5c07a311 3230 BUG_ON(creq->nr_phys_segments > h->maxsgentries);
1da177e4 3231
6b4d96b8
SC		 3232 c = cmd_alloc(h);
3233 if (!c)
1da177e4
LT		 3234 goto full;
3235
9934c8c0 3236 blk_start_request(creq);
1da177e4 3237
5c07a311 3238 tmp_sg = h->scatter_list[c->cmdindex];
1da177e4
LT		 3239 spin_unlock_irq(q->queue_lock);
3240
3241 c->cmd_type = CMD_RWREQ;
3242 c->rq = creq;
7c832835
BH		 3243
3244 /* fill in the request */
1da177e4 3245 drv = creq->rq_disk->private_data;
b028461d 3246 c->Header.ReplyQueue = 0; /* unused in simple mode */
33079b21
MM		 3247 /* got command from pool, so use the command block index instead */
3248 /* for direct lookups. */
3249 /* The first 2 bits are reserved for controller error reporting. */
0c2b3908
MM		 3250 cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
3251 cciss_mark_tag_indexed(&c->Header.Tag.lower);
39ccf9a6 3252 memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
b028461d 3253 c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
3254 c->Request.Type.Type = TYPE_CMD; /* It is a command. */
7c832835
BH		 3255 c->Request.Type.Attribute = ATTR_SIMPLE;
3256 c->Request.Type.Direction =
a52de245 3257 (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
b028461d 3258 c->Request.Timeout = 0; /* Don't time out */
7c832835 3259 c->Request.CDB[0] =
00988a35 3260 (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
83096ebf 3261 start_blk = blk_rq_pos(creq);
b2a4a43d 3262 dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
83096ebf 3263 (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
5c07a311 3264 sg_init_table(tmp_sg, h->maxsgentries);
1da177e4
LT		 3265 seg = blk_rq_map_sg(q, creq, tmp_sg);
3266
7c832835 3267 /* get the DMA records for the setup */
1da177e4
LT		 3268 if (c->Request.Type.Direction == XFER_READ)
3269 dir = PCI_DMA_FROMDEVICE;
3270 else
3271 dir = PCI_DMA_TODEVICE;
3272
5c07a311
DB		 3273 curr_sg = c->SG;
3274 sg_index = 0;
3275 chained = 0;
3276
7c832835 3277 for (i = 0; i < seg; i++) {
5c07a311
DB		 3278 if (((sg_index+1) == (h->max_cmd_sgentries)) &&
3279 !chained && ((seg - i) > 1)) {
5c07a311 3280 /* Point to next chain block. */
dccc9b56 3281 curr_sg = h->cmd_sg_list[c->cmdindex];
5c07a311
DB		 3282 sg_index = 0;
3283 chained = 1;
3284 }
3285 curr_sg[sg_index].Len = tmp_sg[i].length;
45711f1a 3286 temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
5c07a311
DB		 3287 tmp_sg[i].offset,
3288 tmp_sg[i].length, dir);
3289 curr_sg[sg_index].Addr.lower = temp64.val32.lower;
3290 curr_sg[sg_index].Addr.upper = temp64.val32.upper;
3291 curr_sg[sg_index].Ext = 0; /* we are not chaining */
5c07a311 3292 ++sg_index;
1da177e4 3293 }
d45033ef
SC		 3294 if (chained)
3295 cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
3296 (seg - (h->max_cmd_sgentries - 1)) *
3297 sizeof(SGDescriptor_struct));
5c07a311 3298
7c832835
BH		 3299 /* track how many SG entries we are using */
3300 if (seg > h->maxSG)
3301 h->maxSG = seg;
1da177e4 3302
b2a4a43d 3303 dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
5c07a311
DB		 3304 "chained[%d]\n",
3305 blk_rq_sectors(creq), seg, chained);
1da177e4 3306
5e216153
MM		 3307 c->Header.SGTotal = seg + chained;
3308 if (seg <= h->max_cmd_sgentries)
3309 c->Header.SGList = c->Header.SGTotal;
3310 else
5c07a311 3311 c->Header.SGList = h->max_cmd_sgentries;
5e216153 3312 set_performant_mode(h, c);
5c07a311 3313
33659ebb 3314 if (likely(creq->cmd_type == REQ_TYPE_FS)) {
03bbfee5
MMOD		 3315 if(h->cciss_read == CCISS_READ_10) {
3316 c->Request.CDB[1] = 0;
b028461d 3317 c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
03bbfee5
MMOD		 3318 c->Request.CDB[3] = (start_blk >> 16) & 0xff;
3319 c->Request.CDB[4] = (start_blk >> 8) & 0xff;
3320 c->Request.CDB[5] = start_blk & 0xff;
b028461d 3321 c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
83096ebf
TH		 3322 c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
3323 c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
03bbfee5
MMOD		 3324 c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
3325 } else {
582539e5
RD		 3326 u32 upper32 = upper_32_bits(start_blk);
3327
03bbfee5
MMOD		 3328 c->Request.CDBLen = 16;
3329 c->Request.CDB[1]= 0;
b028461d 3330 c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
582539e5
RD		 3331 c->Request.CDB[3]= (upper32 >> 16) & 0xff;
3332 c->Request.CDB[4]= (upper32 >> 8) & 0xff;
3333 c->Request.CDB[5]= upper32 & 0xff;
03bbfee5
MMOD		 3334 c->Request.CDB[6]= (start_blk >> 24) & 0xff;
3335 c->Request.CDB[7]= (start_blk >> 16) & 0xff;
3336 c->Request.CDB[8]= (start_blk >> 8) & 0xff;
3337 c->Request.CDB[9]= start_blk & 0xff;
83096ebf
TH		 3338 c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
3339 c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
3340 c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
3341 c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
03bbfee5
MMOD		 3342 c->Request.CDB[14] = c->Request.CDB[15] = 0;
3343 }
33659ebb 3344 } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
03bbfee5
MMOD		 3345 c->Request.CDBLen = creq->cmd_len;
3346 memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
00988a35 3347 } else {
b2a4a43d
SC		 3348 dev_warn(&h->pdev->dev, "bad request type %d\n",
3349 creq->cmd_type);
03bbfee5 3350 BUG();
00988a35 3351 }
1da177e4
LT		 3352
3353 spin_lock_irq(q->queue_lock);
3354
8a3173de 3355 addQ(&h->reqQ, c);
1da177e4 3356 h->Qdepth++;
7c832835
BH		 3357 if (h->Qdepth > h->maxQsinceinit)
3358 h->maxQsinceinit = h->Qdepth;
1da177e4
LT		 3359
3360 goto queue;
00988a35 3361full:
1da177e4 3362 blk_stop_queue(q);
00988a35 3363startio:
1da177e4
LT		 3364 /* We will already have the driver lock here so not need
3365 * to lock it.
7c832835 3366 */
1da177e4
LT		 3367 start_io(h);
3368}
3369
3da8b713 3370static inline unsigned long get_next_completion(ctlr_info_t *h)
3371{
3da8b713 3372 return h->access.command_completed(h);
3da8b713 3373}
3374
3375static inline int interrupt_pending(ctlr_info_t *h)
3376{
3da8b713 3377 return h->access.intr_pending(h);
3da8b713 3378}
3379
3380static inline long interrupt_not_for_us(ctlr_info_t *h)
3381{
81125860 3382 return ((h->access.intr_pending(h) == 0) ||
2cf3af1c 3383 (h->interrupts_enabled == 0));
3da8b713 3384}
3385
0c2b3908
MM		 3386static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
3387 u32 raw_tag)
1da177e4 3388{
0c2b3908
MM		 3389 if (unlikely(tag_index >= h->nr_cmds)) {
3390 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3391 return 1;
3392 }
3393 return 0;
3394}
3395
3396static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
3397 u32 raw_tag)
3398{
3399 removeQ(c);
3400 if (likely(c->cmd_type == CMD_RWREQ))
3401 complete_command(h, c, 0);
3402 else if (c->cmd_type == CMD_IOCTL_PEND)
3403 complete(c->waiting);
3404#ifdef CONFIG_CISS_SCSI_TAPE
3405 else if (c->cmd_type == CMD_SCSI)
3406 complete_scsi_command(c, 0, raw_tag);
3407#endif
3408}
3409
29979a71
MM		 3410static inline u32 next_command(ctlr_info_t *h)
3411{
3412 u32 a;
3413
0498cc2a 3414 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
29979a71
MM		 3415 return h->access.command_completed(h);
3416
3417 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
3418 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
3419 (h->reply_pool_head)++;
3420 h->commands_outstanding--;
3421 } else {
3422 a = FIFO_EMPTY;
3423 }
3424 /* Check for wraparound */
3425 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
3426 h->reply_pool_head = h->reply_pool;
3427 h->reply_pool_wraparound ^= 1;
3428 }
3429 return a;
3430}
3431
0c2b3908
MM		 3432/* process completion of an indexed ("direct lookup") command */
3433static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
3434{
3435 u32 tag_index;
1da177e4 3436 CommandList_struct *c;
0c2b3908
MM		 3437
3438 tag_index = cciss_tag_to_index(raw_tag);
3439 if (bad_tag(h, tag_index, raw_tag))
5e216153 3440 return next_command(h);
0c2b3908
MM		 3441 c = h->cmd_pool + tag_index;
3442 finish_cmd(h, c, raw_tag);
5e216153 3443 return next_command(h);
0c2b3908
MM		 3444}
3445
3446/* process completion of a non-indexed command */
3447static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
3448{
0c2b3908 3449 CommandList_struct *c = NULL;
0c2b3908
MM		 3450 __u32 busaddr_masked, tag_masked;
3451
0498cc2a 3452 tag_masked = cciss_tag_discard_error_bits(h, raw_tag);
e6e1ee93 3453 list_for_each_entry(c, &h->cmpQ, list) {
0498cc2a 3454 busaddr_masked = cciss_tag_discard_error_bits(h, c->busaddr);
0c2b3908
MM		 3455 if (busaddr_masked == tag_masked) {
3456 finish_cmd(h, c, raw_tag);
5e216153 3457 return next_command(h);
0c2b3908
MM		 3458 }
3459 }
3460 bad_tag(h, h->nr_cmds + 1, raw_tag);
5e216153 3461 return next_command(h);
0c2b3908
MM		 3462}
3463
3464static irqreturn_t do_cciss_intx(int irq, void *dev_id)
3465{
3466 ctlr_info_t *h = dev_id;
1da177e4 3467 unsigned long flags;
0c2b3908 3468 u32 raw_tag;
1da177e4 3469
3da8b713 3470 if (interrupt_not_for_us(h))
1da177e4 3471 return IRQ_NONE;
f70dba83 3472 spin_lock_irqsave(&h->lock, flags);
3da8b713 3473 while (interrupt_pending(h)) {
0c2b3908
MM		 3474 raw_tag = get_next_completion(h);
3475 while (raw_tag != FIFO_EMPTY) {
3476 if (cciss_tag_contains_index(raw_tag))
3477 raw_tag = process_indexed_cmd(h, raw_tag);
3478 else
3479 raw_tag = process_nonindexed_cmd(h, raw_tag);
1da177e4
LT		 3480 }
3481 }
f70dba83 3482 spin_unlock_irqrestore(&h->lock, flags);
0c2b3908
MM		 3483 return IRQ_HANDLED;
3484}
1da177e4 3485
0c2b3908
MM		 3486/* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
3487 * check the interrupt pending register because it is not set.
3488 */
3489static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
3490{
3491 ctlr_info_t *h = dev_id;
3492 unsigned long flags;
3493 u32 raw_tag;
8a3173de 3494
f70dba83 3495 spin_lock_irqsave(&h->lock, flags);
0c2b3908
MM		 3496 raw_tag = get_next_completion(h);
3497 while (raw_tag != FIFO_EMPTY) {
3498 if (cciss_tag_contains_index(raw_tag))
3499 raw_tag = process_indexed_cmd(h, raw_tag);
3500 else
3501 raw_tag = process_nonindexed_cmd(h, raw_tag);
1da177e4 3502 }
f70dba83 3503 spin_unlock_irqrestore(&h->lock, flags);
1da177e4
LT		 3504 return IRQ_HANDLED;
3505}
7c832835 3506
b368c9dd
AP		 3507/**
3508 * add_to_scan_list() - add controller to rescan queue
3509 * @h: Pointer to the controller.
3510 *
3511 * Adds the controller to the rescan queue if not already on the queue.
3512 *
3513 * returns 1 if added to the queue, 0 if skipped (could be on the
3514 * queue already, or the controller could be initializing or shutting
3515 * down).
3516 **/
3517static int add_to_scan_list(struct ctlr_info *h)
3518{
3519 struct ctlr_info *test_h;
3520 int found = 0;
3521 int ret = 0;
3522
3523 if (h->busy_initializing)
3524 return 0;
3525
3526 if (!mutex_trylock(&h->busy_shutting_down))
3527 return 0;
3528
3529 mutex_lock(&scan_mutex);
3530 list_for_each_entry(test_h, &scan_q, scan_list) {
3531 if (test_h == h) {
3532 found = 1;
3533 break;
3534 }
3535 }
3536 if (!found && !h->busy_scanning) {
3537 INIT_COMPLETION(h->scan_wait);
3538 list_add_tail(&h->scan_list, &scan_q);
3539 ret = 1;
3540 }
3541 mutex_unlock(&scan_mutex);
3542 mutex_unlock(&h->busy_shutting_down);
3543
3544 return ret;
3545}
3546
3547/**
3548 * remove_from_scan_list() - remove controller from rescan queue
3549 * @h: Pointer to the controller.
3550 *
3551 * Removes the controller from the rescan queue if present. Blocks if
fd8489cf
SC		 3552 * the controller is currently conducting a rescan. The controller
3553 * can be in one of three states:
3554 * 1. Doesn't need a scan
3555 * 2. On the scan list, but not scanning yet (we remove it)
3556 * 3. Busy scanning (and not on the list). In this case we want to wait for
3557 * the scan to complete to make sure the scanning thread for this
3558 * controller is completely idle.
b368c9dd
AP		 3559 **/
3560static void remove_from_scan_list(struct ctlr_info *h)
3561{
3562 struct ctlr_info *test_h, *tmp_h;
b368c9dd
AP		 3563
3564 mutex_lock(&scan_mutex);
3565 list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
fd8489cf 3566 if (test_h == h) { /* state 2. */
b368c9dd
AP		 3567 list_del(&h->scan_list);
3568 complete_all(&h->scan_wait);
3569 mutex_unlock(&scan_mutex);
3570 return;
3571 }
3572 }
fd8489cf
SC		 3573 if (h->busy_scanning) { /* state 3. */
3574 mutex_unlock(&scan_mutex);
b368c9dd 3575 wait_for_completion(&h->scan_wait);
fd8489cf
SC		 3576 } else { /* state 1, nothing to do. */
3577 mutex_unlock(&scan_mutex);
3578 }
b368c9dd
AP		 3579}
3580
3581/**
3582 * scan_thread() - kernel thread used to rescan controllers
3583 * @data: Ignored.
3584 *
3585 * A kernel thread used scan for drive topology changes on
3586 * controllers. The thread processes only one controller at a time
3587 * using a queue. Controllers are added to the queue using
3588 * add_to_scan_list() and removed from the queue either after done
3589 * processing or using remove_from_scan_list().
3590 *
3591 * returns 0.
3592 **/
0a9279cc
MM		 3593static int scan_thread(void *data)
3594{
b368c9dd 3595 struct ctlr_info *h;
0a9279cc 3596
b368c9dd
AP		 3597 while (1) {
3598 set_current_state(TASK_INTERRUPTIBLE);
3599 schedule();
0a9279cc
MM		 3600 if (kthread_should_stop())
3601 break;
b368c9dd
AP		 3602
3603 while (1) {
3604 mutex_lock(&scan_mutex);
3605 if (list_empty(&scan_q)) {
3606 mutex_unlock(&scan_mutex);
3607 break;
3608 }
3609
3610 h = list_entry(scan_q.next,
3611 struct ctlr_info,
3612 scan_list);
3613 list_del(&h->scan_list);
3614 h->busy_scanning = 1;
3615 mutex_unlock(&scan_mutex);
3616
d06dfbd2
SC		 3617 rebuild_lun_table(h, 0, 0);
3618 complete_all(&h->scan_wait);
3619 mutex_lock(&scan_mutex);
3620 h->busy_scanning = 0;
3621 mutex_unlock(&scan_mutex);
b368c9dd 3622 }
0a9279cc 3623 }
b368c9dd 3624
0a9279cc
MM		 3625 return 0;
3626}
3627
3628static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
3629{
3630 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
3631 return 0;
3632
3633 switch (c->err_info->SenseInfo[12]) {
3634 case STATE_CHANGED:
b2a4a43d
SC		 3635 dev_warn(&h->pdev->dev, "a state change "
3636 "detected, command retried\n");
0a9279cc
MM		 3637 return 1;
3638 break;
3639 case LUN_FAILED:
b2a4a43d
SC		 3640 dev_warn(&h->pdev->dev, "LUN failure "
3641 "detected, action required\n");
0a9279cc
MM		 3642 return 1;
3643 break;
3644 case REPORT_LUNS_CHANGED:
b2a4a43d 3645 dev_warn(&h->pdev->dev, "report LUN data changed\n");
da002184
SC		 3646 /*
3647 * Here, we could call add_to_scan_list and wake up the scan thread,
3648 * except that it's quite likely that we will get more than one
3649 * REPORT_LUNS_CHANGED condition in quick succession, which means
3650 * that those which occur after the first one will likely happen
3651 * *during* the scan_thread's rescan. And the rescan code is not
3652 * robust enough to restart in the middle, undoing what it has already
3653 * done, and it's not clear that it's even possible to do this, since
3654 * part of what it does is notify the block layer, which starts
3655 * doing it's own i/o to read partition tables and so on, and the
3656 * driver doesn't have visibility to know what might need undoing.
3657 * In any event, if possible, it is horribly complicated to get right
3658 * so we just don't do it for now.
3659 *
3660 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
3661 */
0a9279cc
MM		 3662 return 1;
3663 break;
3664 case POWER_OR_RESET:
b2a4a43d
SC		 3665 dev_warn(&h->pdev->dev,
3666 "a power on or device reset detected\n");
0a9279cc
MM		 3667 return 1;
3668 break;
3669 case UNIT_ATTENTION_CLEARED:
b2a4a43d
SC		 3670 dev_warn(&h->pdev->dev,
3671 "unit attention cleared by another initiator\n");
0a9279cc
MM		 3672 return 1;
3673 break;
3674 default:
b2a4a43d
SC		 3675 dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
3676 return 1;
0a9279cc
MM		 3677 }
3678}
3679
7c832835 3680/*
d14c4ab5 3681 * We cannot read the structure directly, for portability we must use
1da177e4 3682 * the io functions.
7c832835 3683 * This is for debug only.
1da177e4 3684 */
b2a4a43d 3685static void print_cfg_table(ctlr_info_t *h)
1da177e4
LT		 3686{
3687 int i;
3688 char temp_name[17];
b2a4a43d 3689 CfgTable_struct *tb = h->cfgtable;
1da177e4 3690
b2a4a43d
SC		 3691 dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
3692 dev_dbg(&h->pdev->dev, "------------------------------------\n");
7c832835 3693 for (i = 0; i < 4; i++)
1da177e4 3694 temp_name[i] = readb(&(tb->Signature[i]));
7c832835 3695 temp_name[4] = '\0';
b2a4a43d
SC		 3696 dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name);
3697 dev_dbg(&h->pdev->dev, " Spec Number = %d\n",
3698 readl(&(tb->SpecValence)));
3699 dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n",
7c832835 3700 readl(&(tb->TransportSupport)));
b2a4a43d 3701 dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n",
7c832835 3702 readl(&(tb->TransportActive)));
b2a4a43d 3703 dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n",
7c832835 3704 readl(&(tb->HostWrite.TransportRequest)));
b2a4a43d 3705 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n",
7c832835 3706 readl(&(tb->HostWrite.CoalIntDelay)));
b2a4a43d 3707 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n",
7c832835 3708 readl(&(tb->HostWrite.CoalIntCount)));
b2a4a43d 3709 dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n",
7c832835 3710 readl(&(tb->CmdsOutMax)));
b2a4a43d
SC		 3711 dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n",
3712 readl(&(tb->BusTypes)));
7c832835 3713 for (i = 0; i < 16; i++)
1da177e4
LT		 3714 temp_name[i] = readb(&(tb->ServerName[i]));
3715 temp_name[16] = '\0';
b2a4a43d
SC		 3716 dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name);
3717 dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n",
3718 readl(&(tb->HeartBeat)));
1da177e4 3719}
1da177e4 3720
7c832835 3721static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
1da177e4
LT		 3722{
3723 int i, offset, mem_type, bar_type;
7c832835 3724 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
1da177e4
LT		 3725 return 0;
3726 offset = 0;
7c832835
BH		 3727 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3728 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
1da177e4
LT		 3729 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3730 offset += 4;
3731 else {
3732 mem_type = pci_resource_flags(pdev, i) &
7c832835 3733 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
1da177e4 3734 switch (mem_type) {
7c832835
BH		 3735 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3736 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3737 offset += 4; /* 32 bit */
3738 break;
3739 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3740 offset += 8;
3741 break;
3742 default: /* reserved in PCI 2.2 */
b2a4a43d 3743 dev_warn(&pdev->dev,
7c832835
BH		 3744 "Base address is invalid\n");
3745 return -1;
1da177e4
LT		 3746 break;
3747 }
3748 }
7c832835
BH		 3749 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3750 return i + 1;
1da177e4
LT		 3751 }
3752 return -1;
3753}
3754
5e216153
MM		 3755/* Fill in bucket_map[], given nsgs (the max number of
3756 * scatter gather elements supported) and bucket[],
3757 * which is an array of 8 integers. The bucket[] array
3758 * contains 8 different DMA transfer sizes (in 16
3759 * byte increments) which the controller uses to fetch
3760 * commands. This function fills in bucket_map[], which
3761 * maps a given number of scatter gather elements to one of
3762 * the 8 DMA transfer sizes. The point of it is to allow the
3763 * controller to only do as much DMA as needed to fetch the
3764 * command, with the DMA transfer size encoded in the lower
3765 * bits of the command address.
3766 */
3767static void calc_bucket_map(int bucket[], int num_buckets,
3768 int nsgs, int *bucket_map)
3769{
3770 int i, j, b, size;
3771
3772 /* even a command with 0 SGs requires 4 blocks */
3773#define MINIMUM_TRANSFER_BLOCKS 4
3774#define NUM_BUCKETS 8
3775 /* Note, bucket_map must have nsgs+1 entries. */
3776 for (i = 0; i <= nsgs; i++) {
3777 /* Compute size of a command with i SG entries */
3778 size = i + MINIMUM_TRANSFER_BLOCKS;
3779 b = num_buckets; /* Assume the biggest bucket */
3780 /* Find the bucket that is just big enough */
3781 for (j = 0; j < 8; j++) {
3782 if (bucket[j] >= size) {
3783 b = j;
3784 break;
3785 }
3786 }
3787 /* for a command with i SG entries, use bucket b. */
3788 bucket_map[i] = b;
3789 }
3790}
3791
0f8a6a1e
SC		 3792static void __devinit cciss_wait_for_mode_change_ack(ctlr_info_t *h)
3793{
3794 int i;
3795
3796 /* under certain very rare conditions, this can take awhile.
3797 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3798 * as we enter this code.) */
3799 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3800 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3801 break;
332c2f80 3802 usleep_range(10000, 20000);
0f8a6a1e
SC		 3803 }
3804}
3805
0498cc2a
SC		 3806static __devinit void cciss_enter_performant_mode(ctlr_info_t *h,
3807 u32 use_short_tags)
b9933135
SC		 3808{
3809 /* This is a bit complicated. There are 8 registers on
3810 * the controller which we write to to tell it 8 different
3811 * sizes of commands which there may be. It's a way of
3812 * reducing the DMA done to fetch each command. Encoded into
3813 * each command's tag are 3 bits which communicate to the controller
3814 * which of the eight sizes that command fits within. The size of
3815 * each command depends on how many scatter gather entries there are.
3816 * Each SG entry requires 16 bytes. The eight registers are programmed
3817 * with the number of 16-byte blocks a command of that size requires.
3818 * The smallest command possible requires 5 such 16 byte blocks.
3819 * the largest command possible requires MAXSGENTRIES + 4 16-byte
3820 * blocks. Note, this only extends to the SG entries contained
3821 * within the command block, and does not extend to chained blocks
3822 * of SG elements. bft[] contains the eight values we write to
3823 * the registers. They are not evenly distributed, but have more
3824 * sizes for small commands, and fewer sizes for larger commands.
3825 */
5e216153 3826 __u32 trans_offset;
b9933135 3827 int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
5e216153
MM		 3828 /*
3829 * 5 = 1 s/g entry or 4k
3830 * 6 = 2 s/g entry or 8k
3831 * 8 = 4 s/g entry or 16k
3832 * 10 = 6 s/g entry or 24k
3833 */
5e216153 3834 unsigned long register_value;
5e216153
MM		 3835 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
3836
5e216153
MM		 3837 h->reply_pool_wraparound = 1; /* spec: init to 1 */
3838
3839 /* Controller spec: zero out this buffer. */
3840 memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
3841 h->reply_pool_head = h->reply_pool;
3842
3843 trans_offset = readl(&(h->cfgtable->TransMethodOffset));
3844 calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
3845 h->blockFetchTable);
3846 writel(bft[0], &h->transtable->BlockFetch0);
3847 writel(bft[1], &h->transtable->BlockFetch1);
3848 writel(bft[2], &h->transtable->BlockFetch2);
3849 writel(bft[3], &h->transtable->BlockFetch3);
3850 writel(bft[4], &h->transtable->BlockFetch4);
3851 writel(bft[5], &h->transtable->BlockFetch5);
3852 writel(bft[6], &h->transtable->BlockFetch6);
3853 writel(bft[7], &h->transtable->BlockFetch7);
3854
3855 /* size of controller ring buffer */
3856 writel(h->max_commands, &h->transtable->RepQSize);
3857 writel(1, &h->transtable->RepQCount);
3858 writel(0, &h->transtable->RepQCtrAddrLow32);
3859 writel(0, &h->transtable->RepQCtrAddrHigh32);
3860 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
3861 writel(0, &h->transtable->RepQAddr0High32);
0498cc2a 3862 writel(CFGTBL_Trans_Performant | use_short_tags,
5e216153
MM		 3863 &(h->cfgtable->HostWrite.TransportRequest));
3864
5e216153 3865 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
0f8a6a1e 3866 cciss_wait_for_mode_change_ack(h);
5e216153 3867 register_value = readl(&(h->cfgtable->TransportActive));
b9933135 3868 if (!(register_value & CFGTBL_Trans_Performant))
b2a4a43d 3869 dev_warn(&h->pdev->dev, "cciss: unable to get board into"
5e216153 3870 " performant mode\n");
b9933135
SC		 3871}
3872
3873static void __devinit cciss_put_controller_into_performant_mode(ctlr_info_t *h)
3874{
3875 __u32 trans_support;
3876
3877 dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
3878 /* Attempt to put controller into performant mode if supported */
3879 /* Does board support performant mode? */
3880 trans_support = readl(&(h->cfgtable->TransportSupport));
3881 if (!(trans_support & PERFORMANT_MODE))
3882 return;
3883
b2a4a43d 3884 dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
b9933135
SC		 3885 /* Performant mode demands commands on a 32 byte boundary
3886 * pci_alloc_consistent aligns on page boundarys already.
3887 * Just need to check if divisible by 32
3888 */
3889 if ((sizeof(CommandList_struct) % 32) != 0) {
b2a4a43d 3890 dev_warn(&h->pdev->dev, "%s %d %s\n",
b9933135
SC		 3891 "cciss info: command size[",
3892 (int)sizeof(CommandList_struct),
3893 "] not divisible by 32, no performant mode..\n");
5e216153
MM		 3894 return;
3895 }
3896
b9933135
SC		 3897 /* Performant mode ring buffer and supporting data structures */
3898 h->reply_pool = (__u64 *)pci_alloc_consistent(
3899 h->pdev, h->max_commands * sizeof(__u64),
3900 &(h->reply_pool_dhandle));
3901
3902 /* Need a block fetch table for performant mode */
3903 h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
3904 sizeof(__u32)), GFP_KERNEL);
3905
3906 if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
3907 goto clean_up;
3908
0498cc2a
SC		 3909 cciss_enter_performant_mode(h,
3910 trans_support & CFGTBL_Trans_use_short_tags);
b9933135 3911
5e216153
MM		 3912 /* Change the access methods to the performant access methods */
3913 h->access = SA5_performant_access;
b9933135 3914 h->transMethod = CFGTBL_Trans_Performant;
5e216153
MM		 3915
3916 return;
3917clean_up:
3918 kfree(h->blockFetchTable);
3919 if (h->reply_pool)
3920 pci_free_consistent(h->pdev,
3921 h->max_commands * sizeof(__u64),
3922 h->reply_pool,
3923 h->reply_pool_dhandle);
3924 return;
3925
3926} /* cciss_put_controller_into_performant_mode */
3927
fb86a35b
MM		 3928/* If MSI/MSI-X is supported by the kernel we will try to enable it on
3929 * controllers that are capable. If not, we use IO-APIC mode.
3930 */
3931
f70dba83 3932static void __devinit cciss_interrupt_mode(ctlr_info_t *h)
fb86a35b
MM		 3933{
3934#ifdef CONFIG_PCI_MSI
7c832835
BH		 3935 int err;
3936 struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
3937 {0, 2}, {0, 3}
3938 };
fb86a35b
MM		 3939
3940 /* Some boards advertise MSI but don't really support it */
f70dba83
SC		 3941 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
3942 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
fb86a35b
MM		 3943 goto default_int_mode;
3944
f70dba83
SC		 3945 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
3946 err = pci_enable_msix(h->pdev, cciss_msix_entries, 4);
7c832835 3947 if (!err) {
f70dba83
SC		 3948 h->intr[0] = cciss_msix_entries[0].vector;
3949 h->intr[1] = cciss_msix_entries[1].vector;
3950 h->intr[2] = cciss_msix_entries[2].vector;
3951 h->intr[3] = cciss_msix_entries[3].vector;
3952 h->msix_vector = 1;
7c832835
BH		 3953 return;
3954 }
3955 if (err > 0) {
b2a4a43d
SC		 3956 dev_warn(&h->pdev->dev,
3957 "only %d MSI-X vectors available\n", err);
1ecb9c0f 3958 goto default_int_mode;
7c832835 3959 } else {
b2a4a43d
SC		 3960 dev_warn(&h->pdev->dev,
3961 "MSI-X init failed %d\n", err);
1ecb9c0f 3962 goto default_int_mode;
7c832835
BH		 3963 }
3964 }
f70dba83
SC		 3965 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
3966 if (!pci_enable_msi(h->pdev))
3967 h->msi_vector = 1;
3968 else
b2a4a43d 3969 dev_warn(&h->pdev->dev, "MSI init failed\n");
7c832835 3970 }
1ecb9c0f 3971default_int_mode:
7c832835 3972#endif /* CONFIG_PCI_MSI */
fb86a35b 3973 /* if we get here we're going to use the default interrupt mode */
f70dba83 3974 h->intr[PERF_MODE_INT] = h->pdev->irq;
fb86a35b
MM		 3975 return;
3976}
3977
6539fa9b 3978static int __devinit cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
1da177e4 3979{
6539fa9b
SC		 3980 int i;
3981 u32 subsystem_vendor_id, subsystem_device_id;
2ec24ff1
SC		 3982
3983 subsystem_vendor_id = pdev->subsystem_vendor;
3984 subsystem_device_id = pdev->subsystem_device;
6539fa9b
SC		 3985 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
3986 subsystem_vendor_id;
2ec24ff1 3987
4205df34 3988 for (i = 0; i < ARRAY_SIZE(products); i++)
6539fa9b
SC		 3989 if (*board_id == products[i].board_id)
3990 return i;
6539fa9b
SC		 3991 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
3992 *board_id);
3993 return -ENODEV;
3994}
1da177e4 3995
dd9c426e
SC		 3996static inline bool cciss_board_disabled(ctlr_info_t *h)
3997{
3998 u16 command;
1da177e4 3999
dd9c426e
SC		 4000 (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
4001 return ((command & PCI_COMMAND_MEMORY) == 0);
4002}
1da177e4 4003
d474830d
SC		 4004static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
4005 unsigned long *memory_bar)
4006{
4007 int i;
4e570309 4008
d474830d
SC		 4009 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
4010 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
4011 /* addressing mode bits already removed */
4012 *memory_bar = pci_resource_start(pdev, i);
4013 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
4014 *memory_bar);
4015 return 0;
4016 }
4017 dev_warn(&pdev->dev, "no memory BAR found\n");
4018 return -ENODEV;
4019}
1da177e4 4020
afa842fa
SC		 4021static int __devinit cciss_wait_for_board_state(struct pci_dev *pdev,
4022 void __iomem *vaddr, int wait_for_ready)
4023#define BOARD_READY 1
4024#define BOARD_NOT_READY 0
e99ba136 4025{
afa842fa 4026 int i, iterations;
e99ba136 4027 u32 scratchpad;
1da177e4 4028
afa842fa
SC		 4029 if (wait_for_ready)
4030 iterations = CCISS_BOARD_READY_ITERATIONS;
4031 else
4032 iterations = CCISS_BOARD_NOT_READY_ITERATIONS;
4033
4034 for (i = 0; i < iterations; i++) {
4035 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
4036 if (wait_for_ready) {
4037 if (scratchpad == CCISS_FIRMWARE_READY)
4038 return 0;
4039 } else {
4040 if (scratchpad != CCISS_FIRMWARE_READY)
4041 return 0;
4042 }
e99ba136 4043 msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
e1438581 4044 }
afa842fa 4045 dev_warn(&pdev->dev, "board not ready, timed out.\n");
e99ba136
SC		 4046 return -ENODEV;
4047}
e1438581 4048
8e93bf6d
SC		 4049static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
4050 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4051 u64 *cfg_offset)
4052{
4053 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4054 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4055 *cfg_base_addr &= (u32) 0x0000ffff;
4056 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4057 if (*cfg_base_addr_index == -1) {
4058 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
4059 "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
4060 return -ENODEV;
4061 }
4062 return 0;
4063}
1da177e4 4064
4809d098
SC		 4065static int __devinit cciss_find_cfgtables(ctlr_info_t *h)
4066{
4067 u64 cfg_offset;
4068 u32 cfg_base_addr;
4069 u64 cfg_base_addr_index;
4070 u32 trans_offset;
8e93bf6d 4071 int rc;
1da177e4 4072
8e93bf6d
SC		 4073 rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4074 &cfg_base_addr_index, &cfg_offset);
4075 if (rc)
4076 return rc;
4809d098 4077 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
8e93bf6d 4078 cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable));
4809d098
SC		 4079 if (!h->cfgtable)
4080 return -ENOMEM;
4081 /* Find performant mode table. */
8e93bf6d 4082 trans_offset = readl(&h->cfgtable->TransMethodOffset);
4809d098
SC		 4083 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4084 cfg_base_addr_index)+cfg_offset+trans_offset,
4085 sizeof(*h->transtable));
4086 if (!h->transtable)
4087 return -ENOMEM;
4088 return 0;
4089}
1da177e4 4090
adfbc1ff
SC		 4091static void __devinit cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
4092{
4093 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
186fb9cf
SC		 4094
4095 /* Limit commands in memory limited kdump scenario. */
4096 if (reset_devices && h->max_commands > 32)
4097 h->max_commands = 32;
4098
adfbc1ff
SC		 4099 if (h->max_commands < 16) {
4100 dev_warn(&h->pdev->dev, "Controller reports "
4101 "max supported commands of %d, an obvious lie. "
4102 "Using 16. Ensure that firmware is up to date.\n",
4103 h->max_commands);
4104 h->max_commands = 16;
1da177e4 4105 }
adfbc1ff 4106}
1da177e4 4107
afadbf4b
SC		 4108/* Interrogate the hardware for some limits:
4109 * max commands, max SG elements without chaining, and with chaining,
4110 * SG chain block size, etc.
4111 */
4112static void __devinit cciss_find_board_params(ctlr_info_t *h)
4113{
adfbc1ff 4114 cciss_get_max_perf_mode_cmds(h);
afadbf4b
SC		 4115 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
4116 h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
5c07a311 4117 /*
afadbf4b 4118 * Limit in-command s/g elements to 32 save dma'able memory.
5c07a311
DB		 4119 * Howvever spec says if 0, use 31
4120 */
afadbf4b
SC		 4121 h->max_cmd_sgentries = 31;
4122 if (h->maxsgentries > 512) {
4123 h->max_cmd_sgentries = 32;
4124 h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
4125 h->maxsgentries--; /* save one for chain pointer */
5c07a311 4126 } else {
afadbf4b
SC		 4127 h->maxsgentries = 31; /* default to traditional values */
4128 h->chainsize = 0;
5c07a311 4129 }
afadbf4b 4130}
5c07a311 4131
501b92cd
SC		 4132static inline bool CISS_signature_present(ctlr_info_t *h)
4133{
4134 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
4135 (readb(&h->cfgtable->Signature[1]) != 'I') ||
4136 (readb(&h->cfgtable->Signature[2]) != 'S') ||
4137 (readb(&h->cfgtable->Signature[3]) != 'S')) {
4138 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4139 return false;
1da177e4 4140 }
501b92cd
SC		 4141 return true;
4142}
4143
322e304c
SC		 4144/* Need to enable prefetch in the SCSI core for 6400 in x86 */
4145static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
4146{
1da177e4 4147#ifdef CONFIG_X86
322e304c
SC		 4148 u32 prefetch;
4149
4150 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4151 prefetch |= 0x100;
4152 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
1da177e4 4153#endif
322e304c 4154}
1da177e4 4155
bfd63ee5
SC		 4156/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4157 * in a prefetch beyond physical memory.
4158 */
4159static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
4160{
4161 u32 dma_prefetch;
4162 __u32 dma_refetch;
4163
4164 if (h->board_id != 0x3225103C)
4165 return;
4166 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4167 dma_prefetch |= 0x8000;
4168 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4169 pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
4170 dma_refetch |= 0x1;
4171 pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
4172}
4173
f70dba83 4174static int __devinit cciss_pci_init(ctlr_info_t *h)
6539fa9b 4175{
4809d098 4176 int prod_index, err;
6539fa9b 4177
f70dba83 4178 prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
6539fa9b 4179 if (prod_index < 0)
2ec24ff1 4180 return -ENODEV;
f70dba83
SC		 4181 h->product_name = products[prod_index].product_name;
4182 h->access = *(products[prod_index].access);
1da177e4 4183
f70dba83 4184 if (cciss_board_disabled(h)) {
b2a4a43d 4185 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
c33ac89b 4186 return -ENODEV;
1da177e4 4187 }
f70dba83 4188 err = pci_enable_device(h->pdev);
7c832835 4189 if (err) {
b2a4a43d 4190 dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
c33ac89b 4191 return err;
f92e2f5f
MM		 4192 }
4193
f70dba83 4194 err = pci_request_regions(h->pdev, "cciss");
4e570309 4195 if (err) {
b2a4a43d
SC		 4196 dev_warn(&h->pdev->dev,
4197 "Cannot obtain PCI resources, aborting\n");
872225ca 4198 return err;
4e570309 4199 }
1da177e4 4200
b2a4a43d
SC		 4201 dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
4202 dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
1da177e4 4203
fb86a35b
MM		 4204/* If the kernel supports MSI/MSI-X we will try to enable that functionality,
4205 * else we use the IO-APIC interrupt assigned to us by system ROM.
4206 */
f70dba83
SC		 4207 cciss_interrupt_mode(h);
4208 err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
d474830d 4209 if (err)
e1438581 4210 goto err_out_free_res;
f70dba83
SC		 4211 h->vaddr = remap_pci_mem(h->paddr, 0x250);
4212 if (!h->vaddr) {
da550321
SC		 4213 err = -ENOMEM;
4214 goto err_out_free_res;
7c832835 4215 }
afa842fa 4216 err = cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
e99ba136 4217 if (err)
4e570309 4218 goto err_out_free_res;
f70dba83 4219 err = cciss_find_cfgtables(h);
4809d098 4220 if (err)
4e570309 4221 goto err_out_free_res;
b2a4a43d 4222 print_cfg_table(h);
f70dba83 4223 cciss_find_board_params(h);
1da177e4 4224
f70dba83 4225 if (!CISS_signature_present(h)) {
c33ac89b 4226 err = -ENODEV;
4e570309 4227 goto err_out_free_res;
1da177e4 4228 }
f70dba83
SC		 4229 cciss_enable_scsi_prefetch(h);
4230 cciss_p600_dma_prefetch_quirk(h);
4231 cciss_put_controller_into_performant_mode(h);
1da177e4
LT		 4232 return 0;
4233
5faad620 4234err_out_free_res:
872225ca
MM		 4235 /*
4236 * Deliberately omit pci_disable_device(): it does something nasty to
4237 * Smart Array controllers that pci_enable_device does not undo
4238 */
f70dba83
SC		 4239 if (h->transtable)
4240 iounmap(h->transtable);
4241 if (h->cfgtable)
4242 iounmap(h->cfgtable);
4243 if (h->vaddr)
4244 iounmap(h->vaddr);
4245 pci_release_regions(h->pdev);
c33ac89b 4246 return err;
1da177e4
LT		 4247}
4248
6ae5ce8e
MM		 4249/* Function to find the first free pointer into our hba[] array
4250 * Returns -1 if no free entries are left.
7c832835 4251 */
b2a4a43d 4252static int alloc_cciss_hba(struct pci_dev *pdev)
1da177e4 4253{
799202cb 4254 int i;
1da177e4 4255
7c832835 4256 for (i = 0; i < MAX_CTLR; i++) {
1da177e4 4257 if (!hba[i]) {
f70dba83 4258 ctlr_info_t *h;
f2912a12 4259
f70dba83
SC		 4260 h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
4261 if (!h)
1da177e4 4262 goto Enomem;
f70dba83 4263 hba[i] = h;
1da177e4
LT		 4264 return i;
4265 }
4266 }
b2a4a43d 4267 dev_warn(&pdev->dev, "This driver supports a maximum"
7c832835 4268 " of %d controllers.\n", MAX_CTLR);
799202cb
MM		 4269 return -1;
4270Enomem:
b2a4a43d 4271 dev_warn(&pdev->dev, "out of memory.\n");
1da177e4
LT		 4272 return -1;
4273}
4274
f70dba83 4275static void free_hba(ctlr_info_t *h)
1da177e4 4276{
2c935593 4277 int i;
1da177e4 4278
f70dba83 4279 hba[h->ctlr] = NULL;
2c935593
SC		 4280 for (i = 0; i < h->highest_lun + 1; i++)
4281 if (h->gendisk[i] != NULL)
4282 put_disk(h->gendisk[i]);
4283 kfree(h);
1da177e4
LT		 4284}
4285
82eb03cf
CC		 4286/* Send a message CDB to the firmware. */
4287static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type)
4288{
4289 typedef struct {
4290 CommandListHeader_struct CommandHeader;
4291 RequestBlock_struct Request;
4292 ErrDescriptor_struct ErrorDescriptor;
4293 } Command;
4294 static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
4295 Command *cmd;
4296 dma_addr_t paddr64;
4297 uint32_t paddr32, tag;
4298 void __iomem *vaddr;
4299 int i, err;
4300
4301 vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
4302 if (vaddr == NULL)
4303 return -ENOMEM;
4304
4305 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
4306 CCISS commands, so they must be allocated from the lower 4GiB of
4307 memory. */
e930438c 4308 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
82eb03cf
CC		 4309 if (err) {
4310 iounmap(vaddr);
4311 return -ENOMEM;
4312 }
4313
4314 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
4315 if (cmd == NULL) {
4316 iounmap(vaddr);
4317 return -ENOMEM;
4318 }
4319
4320 /* This must fit, because of the 32-bit consistent DMA mask. Also,
4321 although there's no guarantee, we assume that the address is at
4322 least 4-byte aligned (most likely, it's page-aligned). */
4323 paddr32 = paddr64;
4324
4325 cmd->CommandHeader.ReplyQueue = 0;
4326 cmd->CommandHeader.SGList = 0;
4327 cmd->CommandHeader.SGTotal = 0;
4328 cmd->CommandHeader.Tag.lower = paddr32;
4329 cmd->CommandHeader.Tag.upper = 0;
4330 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
4331
4332 cmd->Request.CDBLen = 16;
4333 cmd->Request.Type.Type = TYPE_MSG;
4334 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
4335 cmd->Request.Type.Direction = XFER_NONE;
4336 cmd->Request.Timeout = 0; /* Don't time out */
4337 cmd->Request.CDB[0] = opcode;
4338 cmd->Request.CDB[1] = type;
4339 memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
4340
4341 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
4342 cmd->ErrorDescriptor.Addr.upper = 0;
4343 cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
4344
4345 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
4346
4347 for (i = 0; i < 10; i++) {
4348 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
4349 if ((tag & ~3) == paddr32)
4350 break;
4351 schedule_timeout_uninterruptible(HZ);
4352 }
4353
4354 iounmap(vaddr);
4355
4356 /* we leak the DMA buffer here ... no choice since the controller could
4357 still complete the command. */
4358 if (i == 10) {
b2a4a43d
SC		 4359 dev_err(&pdev->dev,
4360 "controller message %02x:%02x timed out\n",
82eb03cf
CC		 4361 opcode, type);
4362 return -ETIMEDOUT;
4363 }
4364
4365 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
4366
4367 if (tag & 2) {
b2a4a43d 4368 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
82eb03cf
CC		 4369 opcode, type);
4370 return -EIO;
4371 }
4372
b2a4a43d 4373 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
82eb03cf
CC		 4374 opcode, type);
4375 return 0;
4376}
4377
4378#define cciss_soft_reset_controller(p) cciss_message(p, 1, 0)
4379#define cciss_noop(p) cciss_message(p, 3, 0)
4380
a6528d01
SC		 4381static int cciss_controller_hard_reset(struct pci_dev *pdev,
4382 void * __iomem vaddr, bool use_doorbell)
82eb03cf 4383{
a6528d01
SC		 4384 u16 pmcsr;
4385 int pos;
82eb03cf 4386
a6528d01
SC		 4387 if (use_doorbell) {
4388 /* For everything after the P600, the PCI power state method
4389 * of resetting the controller doesn't work, so we have this
4390 * other way using the doorbell register.
4391 */
4392 dev_info(&pdev->dev, "using doorbell to reset controller\n");
4393 writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
4394 msleep(1000);
4395 } else { /* Try to do it the PCI power state way */
4396
4397 /* Quoting from the Open CISS Specification: "The Power
4398 * Management Control/Status Register (CSR) controls the power
4399 * state of the device. The normal operating state is D0,
4400 * CSR=00h. The software off state is D3, CSR=03h. To reset
4401 * the controller, place the interface device in D3 then to D0,
4402 * this causes a secondary PCI reset which will reset the
4403 * controller." */
4404
4405 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
4406 if (pos == 0) {
4407 dev_err(&pdev->dev,
4408 "cciss_controller_hard_reset: "
4409 "PCI PM not supported\n");
4410 return -ENODEV;
4411 }
4412 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
4413 /* enter the D3hot power management state */
4414 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
4415 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4416 pmcsr |= PCI_D3hot;
4417 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
82eb03cf 4418
a6528d01 4419 msleep(500);
82eb03cf 4420
a6528d01
SC		 4421 /* enter the D0 power management state */
4422 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4423 pmcsr |= PCI_D0;
4424 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
82eb03cf 4425
a6528d01
SC		 4426 msleep(500);
4427 }
4428 return 0;
4429}
82eb03cf 4430
a6528d01
SC		 4431/* This does a hard reset of the controller using PCI power management
4432 * states or using the doorbell register. */
4433static __devinit int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
4434{
a6528d01
SC		 4435 u64 cfg_offset;
4436 u32 cfg_base_addr;
4437 u64 cfg_base_addr_index;
4438 void __iomem *vaddr;
4439 unsigned long paddr;
4440 u32 misc_fw_support, active_transport;
f442e64b 4441 int rc;
a6528d01
SC		 4442 CfgTable_struct __iomem *cfgtable;
4443 bool use_doorbell;
058a0f9f 4444 u32 board_id;
f442e64b 4445 u16 command_register;
a6528d01
SC		 4446
4447 /* For controllers as old a the p600, this is very nearly
4448 * the same thing as
4449 *
4450 * pci_save_state(pci_dev);
4451 * pci_set_power_state(pci_dev, PCI_D3hot);
4452 * pci_set_power_state(pci_dev, PCI_D0);
4453 * pci_restore_state(pci_dev);
4454 *
a6528d01
SC		 4455 * For controllers newer than the P600, the pci power state
4456 * method of resetting doesn't work so we have another way
4457 * using the doorbell register.
4458 */
82eb03cf 4459
058a0f9f
SC		 4460 /* Exclude 640x boards. These are two pci devices in one slot
4461 * which share a battery backed cache module. One controls the
4462 * cache, the other accesses the cache through the one that controls
4463 * it. If we reset the one controlling the cache, the other will
4464 * likely not be happy. Just forbid resetting this conjoined mess.
4465 */
4466 cciss_lookup_board_id(pdev, &board_id);
4467 if (board_id == 0x409C0E11 || board_id == 0x409D0E11) {
4468 dev_warn(&pdev->dev, "Cannot reset Smart Array 640x "
4469 "due to shared cache module.");
82eb03cf
CC		 4470 return -ENODEV;
4471 }
4472
f442e64b
SC		 4473 /* Save the PCI command register */
4474 pci_read_config_word(pdev, 4, &command_register);
4475 /* Turn the board off. This is so that later pci_restore_state()
4476 * won't turn the board on before the rest of config space is ready.
4477 */
4478 pci_disable_device(pdev);
4479 pci_save_state(pdev);
82eb03cf 4480
a6528d01
SC		 4481 /* find the first memory BAR, so we can find the cfg table */
4482 rc = cciss_pci_find_memory_BAR(pdev, &paddr);
4483 if (rc)
4484 return rc;
4485 vaddr = remap_pci_mem(paddr, 0x250);
4486 if (!vaddr)
4487 return -ENOMEM;
82eb03cf 4488
a6528d01
SC		 4489 /* find cfgtable in order to check if reset via doorbell is supported */
4490 rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
4491 &cfg_base_addr_index, &cfg_offset);
4492 if (rc)
4493 goto unmap_vaddr;
4494 cfgtable = remap_pci_mem(pci_resource_start(pdev,
4495 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
4496 if (!cfgtable) {
4497 rc = -ENOMEM;
4498 goto unmap_vaddr;
4499 }
82eb03cf 4500
a6528d01
SC		 4501 /* If reset via doorbell register is supported, use that. */
4502 misc_fw_support = readl(&cfgtable->misc_fw_support);
4503 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
82eb03cf 4504
75230ff2
SC		 4505 /* The doorbell reset seems to cause lockups on some Smart
4506 * Arrays (e.g. P410, P410i, maybe others). Until this is
4507 * fixed or at least isolated, avoid the doorbell reset.
4508 */
4509 use_doorbell = 0;
4510
a6528d01
SC		 4511 rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
4512 if (rc)
4513 goto unmap_cfgtable;
f442e64b
SC		 4514 pci_restore_state(pdev);
4515 rc = pci_enable_device(pdev);
4516 if (rc) {
4517 dev_warn(&pdev->dev, "failed to enable device.\n");
4518 goto unmap_cfgtable;
82eb03cf 4519 }
f442e64b 4520 pci_write_config_word(pdev, 4, command_register);
82eb03cf 4521
a6528d01
SC		 4522 /* Some devices (notably the HP Smart Array 5i Controller)
4523 need a little pause here */
4524 msleep(CCISS_POST_RESET_PAUSE_MSECS);
4525
afa842fa
SC		 4526 /* Wait for board to become not ready, then ready. */
4527 dev_info(&pdev->dev, "Waiting for board to become ready.\n");
4528 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
4529 if (rc) /* Don't bail, might be E500, etc. which can't be reset */
4530 dev_warn(&pdev->dev,
4531 "failed waiting for board to become not ready\n");
4532 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_READY);
4533 if (rc) {
4534 dev_warn(&pdev->dev,
4535 "failed waiting for board to become ready\n");
4536 goto unmap_cfgtable;
4537 }
4538 dev_info(&pdev->dev, "board ready.\n");
4539
a6528d01
SC		 4540 /* Controller should be in simple mode at this point. If it's not,
4541 * It means we're on one of those controllers which doesn't support
4542 * the doorbell reset method and on which the PCI power management reset
4543 * method doesn't work (P800, for example.)
4544 * In those cases, don't try to proceed, as it generally doesn't work.
4545 */
4546 active_transport = readl(&cfgtable->TransportActive);
4547 if (active_transport & PERFORMANT_MODE) {
4548 dev_warn(&pdev->dev, "Unable to successfully reset controller,"
4549 " Ignoring controller.\n");
4550 rc = -ENODEV;
4551 }
4552
4553unmap_cfgtable:
4554 iounmap(cfgtable);
4555
4556unmap_vaddr:
4557 iounmap(vaddr);
4558 return rc;
82eb03cf
CC		 4559}
4560
83123cb1
SC		 4561static __devinit int cciss_init_reset_devices(struct pci_dev *pdev)
4562{
a6528d01 4563 int rc, i;
83123cb1
SC		 4564
4565 if (!reset_devices)
4566 return 0;
4567
a6528d01
SC		 4568 /* Reset the controller with a PCI power-cycle or via doorbell */
4569 rc = cciss_kdump_hard_reset_controller(pdev);
83123cb1 4570
a6528d01
SC		 4571 /* -ENOTSUPP here means we cannot reset the controller
4572 * but it's already (and still) up and running in
058a0f9f
SC		 4573 * "performant mode". Or, it might be 640x, which can't reset
4574 * due to concerns about shared bbwc between 6402/6404 pair.
a6528d01
SC		 4575 */
4576 if (rc == -ENOTSUPP)
4577 return 0; /* just try to do the kdump anyhow. */
4578 if (rc)
4579 return -ENODEV;
83123cb1
SC		 4580
4581 /* Now try to get the controller to respond to a no-op */
4582 for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
4583 if (cciss_noop(pdev) == 0)
4584 break;
4585 else
4586 dev_warn(&pdev->dev, "no-op failed%s\n",
4587 (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
4588 "; re-trying" : ""));
4589 msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
4590 }
82eb03cf
CC		 4591 return 0;
4592}
4593
1da177e4
LT		 4594/*
4595 * This is it. Find all the controllers and register them. I really hate
4596 * stealing all these major device numbers.
4597 * returns the number of block devices registered.
4598 */
4599static int __devinit cciss_init_one(struct pci_dev *pdev,
7c832835 4600 const struct pci_device_id *ent)
1da177e4 4601{
1da177e4 4602 int i;
799202cb 4603 int j = 0;
5c07a311 4604 int k = 0;
1da177e4 4605 int rc;
22bece00 4606 int dac, return_code;
212a5026 4607 InquiryData_struct *inq_buff;
f70dba83 4608 ctlr_info_t *h;
1da177e4 4609
83123cb1
SC		 4610 rc = cciss_init_reset_devices(pdev);
4611 if (rc)
4612 return rc;
b2a4a43d 4613 i = alloc_cciss_hba(pdev);
7c832835 4614 if (i < 0)
e2019b58 4615 return -1;
1f8ef380 4616
f70dba83
SC		 4617 h = hba[i];
4618 h->pdev = pdev;
4619 h->busy_initializing = 1;
e6e1ee93
JA		 4620 INIT_LIST_HEAD(&h->cmpQ);
4621 INIT_LIST_HEAD(&h->reqQ);
f70dba83 4622 mutex_init(&h->busy_shutting_down);
1f8ef380 4623
f70dba83 4624 if (cciss_pci_init(h) != 0)
2cfa948c 4625 goto clean_no_release_regions;
1da177e4 4626
f70dba83
SC		 4627 sprintf(h->devname, "cciss%d", i);
4628 h->ctlr = i;
1da177e4 4629
f70dba83 4630 init_completion(&h->scan_wait);
b368c9dd 4631
f70dba83 4632 if (cciss_create_hba_sysfs_entry(h))
7fe06326
AP		 4633 goto clean0;
4634
1da177e4 4635 /* configure PCI DMA stuff */
6a35528a 4636 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
40aabb58 4637 dac = 1;
284901a9 4638 else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
40aabb58 4639 dac = 0;
1da177e4 4640 else {
b2a4a43d 4641 dev_err(&h->pdev->dev, "no suitable DMA available\n");
1da177e4
LT		 4642 goto clean1;
4643 }
4644
4645 /*
4646 * register with the major number, or get a dynamic major number
4647 * by passing 0 as argument. This is done for greater than
4648 * 8 controller support.
4649 */
4650 if (i < MAX_CTLR_ORIG)
f70dba83
SC		 4651 h->major = COMPAQ_CISS_MAJOR + i;
4652 rc = register_blkdev(h->major, h->devname);
7c832835 4653 if (rc == -EBUSY || rc == -EINVAL) {
b2a4a43d
SC		 4654 dev_err(&h->pdev->dev,
4655 "Unable to get major number %d for %s "
f70dba83 4656 "on hba %d\n", h->major, h->devname, i);
1da177e4 4657 goto clean1;
7c832835 4658 } else {
1da177e4 4659 if (i >= MAX_CTLR_ORIG)
f70dba83 4660 h->major = rc;
1da177e4
LT		 4661 }
4662
4663 /* make sure the board interrupts are off */
f70dba83
SC		 4664 h->access.set_intr_mask(h, CCISS_INTR_OFF);
4665 if (h->msi_vector || h->msix_vector) {
4666 if (request_irq(h->intr[PERF_MODE_INT],
0c2b3908 4667 do_cciss_msix_intr,
f70dba83 4668 IRQF_DISABLED, h->devname, h)) {
b2a4a43d 4669 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
f70dba83 4670 h->intr[PERF_MODE_INT], h->devname);
0c2b3908
MM		 4671 goto clean2;
4672 }
4673 } else {
f70dba83
SC		 4674 if (request_irq(h->intr[PERF_MODE_INT], do_cciss_intx,
4675 IRQF_DISABLED, h->devname, h)) {
b2a4a43d 4676 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
f70dba83 4677 h->intr[PERF_MODE_INT], h->devname);
0c2b3908
MM		 4678 goto clean2;
4679 }
1da177e4 4680 }
40aabb58 4681
b2a4a43d 4682 dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
f70dba83
SC		 4683 h->devname, pdev->device, pci_name(pdev),
4684 h->intr[PERF_MODE_INT], dac ? "" : " not");
7c832835 4685
f70dba83
SC		 4686 h->cmd_pool_bits =
4687 kmalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
061837bc 4688 * sizeof(unsigned long), GFP_KERNEL);
f70dba83
SC		 4689 h->cmd_pool = (CommandList_struct *)
4690 pci_alloc_consistent(h->pdev,
4691 h->nr_cmds * sizeof(CommandList_struct),
4692 &(h->cmd_pool_dhandle));
4693 h->errinfo_pool = (ErrorInfo_struct *)
4694 pci_alloc_consistent(h->pdev,
4695 h->nr_cmds * sizeof(ErrorInfo_struct),
4696 &(h->errinfo_pool_dhandle));
4697 if ((h->cmd_pool_bits == NULL)
4698 || (h->cmd_pool == NULL)
4699 || (h->errinfo_pool == NULL)) {
b2a4a43d 4700 dev_err(&h->pdev->dev, "out of memory");
1da177e4
LT		 4701 goto clean4;
4702 }
5c07a311
DB		 4703
4704 /* Need space for temp scatter list */
f70dba83 4705 h->scatter_list = kmalloc(h->max_commands *
5c07a311
DB		 4706 sizeof(struct scatterlist *),
4707 GFP_KERNEL);
4ee69851
DC		 4708 if (!h->scatter_list)
4709 goto clean4;
4710
f70dba83
SC		 4711 for (k = 0; k < h->nr_cmds; k++) {
4712 h->scatter_list[k] = kmalloc(sizeof(struct scatterlist) *
4713 h->maxsgentries,
5c07a311 4714 GFP_KERNEL);
f70dba83 4715 if (h->scatter_list[k] == NULL) {
b2a4a43d
SC		 4716 dev_err(&h->pdev->dev,
4717 "could not allocate s/g lists\n");
5c07a311
DB		 4718 goto clean4;
4719 }
4720 }
f70dba83
SC		 4721 h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
4722 h->chainsize, h->nr_cmds);
4723 if (!h->cmd_sg_list && h->chainsize > 0)
5c07a311 4724 goto clean4;
5c07a311 4725
f70dba83 4726 spin_lock_init(&h->lock);
1da177e4 4727
7c832835 4728 /* Initialize the pdev driver private data.
f70dba83
SC		 4729 have it point to h. */
4730 pci_set_drvdata(pdev, h);
7c832835
BH		 4731 /* command and error info recs zeroed out before
4732 they are used */
f70dba83
SC		 4733 memset(h->cmd_pool_bits, 0,
4734 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
061837bc 4735 * sizeof(unsigned long));
1da177e4 4736
f70dba83
SC		 4737 h->num_luns = 0;
4738 h->highest_lun = -1;
6ae5ce8e 4739 for (j = 0; j < CISS_MAX_LUN; j++) {
f70dba83
SC		 4740 h->drv[j] = NULL;
4741 h->gendisk[j] = NULL;
6ae5ce8e 4742 }
1da177e4 4743
f70dba83 4744 cciss_scsi_setup(h);
1da177e4
LT		 4745
4746 /* Turn the interrupts on so we can service requests */
f70dba83 4747 h->access.set_intr_mask(h, CCISS_INTR_ON);
1da177e4 4748
22bece00
MM		 4749 /* Get the firmware version */
4750 inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
4751 if (inq_buff == NULL) {
b2a4a43d 4752 dev_err(&h->pdev->dev, "out of memory\n");
22bece00
MM		 4753 goto clean4;
4754 }
4755
f70dba83 4756 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
b57695fe 4757 sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
22bece00 4758 if (return_code == IO_OK) {
f70dba83
SC		 4759 h->firm_ver[0] = inq_buff->data_byte[32];
4760 h->firm_ver[1] = inq_buff->data_byte[33];
4761 h->firm_ver[2] = inq_buff->data_byte[34];
4762 h->firm_ver[3] = inq_buff->data_byte[35];
22bece00 4763 } else { /* send command failed */
b2a4a43d 4764 dev_warn(&h->pdev->dev, "unable to determine firmware"
22bece00
MM		 4765 " version of controller\n");
4766 }
212a5026 4767 kfree(inq_buff);
22bece00 4768
f70dba83 4769 cciss_procinit(h);
92c4231a 4770
f70dba83 4771 h->cciss_max_sectors = 8192;
92c4231a 4772
f70dba83
SC		 4773 rebuild_lun_table(h, 1, 0);
4774 h->busy_initializing = 0;
e2019b58 4775 return 1;
1da177e4 4776
6ae5ce8e 4777clean4:
f70dba83 4778 kfree(h->cmd_pool_bits);
5c07a311 4779 /* Free up sg elements */
b0722cb1 4780 for (k-- ; k >= 0; k--)
f70dba83
SC		 4781 kfree(h->scatter_list[k]);
4782 kfree(h->scatter_list);
4783 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4784 if (h->cmd_pool)
4785 pci_free_consistent(h->pdev,
4786 h->nr_cmds * sizeof(CommandList_struct),
4787 h->cmd_pool, h->cmd_pool_dhandle);
4788 if (h->errinfo_pool)
4789 pci_free_consistent(h->pdev,
4790 h->nr_cmds * sizeof(ErrorInfo_struct),
4791 h->errinfo_pool,
4792 h->errinfo_pool_dhandle);
4793 free_irq(h->intr[PERF_MODE_INT], h);
6ae5ce8e 4794clean2:
f70dba83 4795 unregister_blkdev(h->major, h->devname);
6ae5ce8e 4796clean1:
f70dba83 4797 cciss_destroy_hba_sysfs_entry(h);
7fe06326 4798clean0:
2cfa948c
SC		 4799 pci_release_regions(pdev);
4800clean_no_release_regions:
f70dba83 4801 h->busy_initializing = 0;
9cef0d2f 4802
872225ca
MM		 4803 /*
4804 * Deliberately omit pci_disable_device(): it does something nasty to
4805 * Smart Array controllers that pci_enable_device does not undo
4806 */
799202cb 4807 pci_set_drvdata(pdev, NULL);
f70dba83 4808 free_hba(h);
e2019b58 4809 return -1;
1da177e4
LT		 4810}
4811
e9ca75b5 4812static void cciss_shutdown(struct pci_dev *pdev)
1da177e4 4813{
29009a03
SC		 4814 ctlr_info_t *h;
4815 char *flush_buf;
7c832835 4816 int return_code;
1da177e4 4817
29009a03
SC		 4818 h = pci_get_drvdata(pdev);
4819 flush_buf = kzalloc(4, GFP_KERNEL);
4820 if (!flush_buf) {
b2a4a43d 4821 dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
e9ca75b5 4822 return;
e9ca75b5 4823 }
29009a03
SC		 4824 /* write all data in the battery backed cache to disk */
4825 memset(flush_buf, 0, 4);
f70dba83 4826 return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
29009a03
SC		 4827 4, 0, CTLR_LUNID, TYPE_CMD);
4828 kfree(flush_buf);
4829 if (return_code != IO_OK)
b2a4a43d 4830 dev_warn(&h->pdev->dev, "Error flushing cache\n");
29009a03 4831 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5e216153 4832 free_irq(h->intr[PERF_MODE_INT], h);
e9ca75b5
GB		 4833}
4834
4835static void __devexit cciss_remove_one(struct pci_dev *pdev)
4836{
f70dba83 4837 ctlr_info_t *h;
e9ca75b5
GB		 4838 int i, j;
4839
7c832835 4840 if (pci_get_drvdata(pdev) == NULL) {
b2a4a43d 4841 dev_err(&pdev->dev, "Unable to remove device\n");
1da177e4
LT		 4842 return;
4843 }
0a9279cc 4844
f70dba83
SC		 4845 h = pci_get_drvdata(pdev);
4846 i = h->ctlr;
7c832835 4847 if (hba[i] == NULL) {
b2a4a43d 4848 dev_err(&pdev->dev, "device appears to already be removed\n");
1da177e4
LT		 4849 return;
4850 }
b6550777 4851
f70dba83 4852 mutex_lock(&h->busy_shutting_down);
0a9279cc 4853
f70dba83
SC		 4854 remove_from_scan_list(h);
4855 remove_proc_entry(h->devname, proc_cciss);
4856 unregister_blkdev(h->major, h->devname);
b6550777
BH		 4857
4858 /* remove it from the disk list */
4859 for (j = 0; j < CISS_MAX_LUN; j++) {
f70dba83 4860 struct gendisk *disk = h->gendisk[j];
b6550777 4861 if (disk) {
165125e1 4862 struct request_queue *q = disk->queue;
b6550777 4863
097d0264 4864 if (disk->flags & GENHD_FL_UP) {
f70dba83 4865 cciss_destroy_ld_sysfs_entry(h, j, 1);
b6550777 4866 del_gendisk(disk);
097d0264 4867 }
b6550777
BH		 4868 if (q)
4869 blk_cleanup_queue(q);
4870 }
4871 }
4872
ba198efb 4873#ifdef CONFIG_CISS_SCSI_TAPE
f70dba83 4874 cciss_unregister_scsi(h); /* unhook from SCSI subsystem */
ba198efb 4875#endif
b6550777 4876
e9ca75b5 4877 cciss_shutdown(pdev);
fb86a35b
MM		 4878
4879#ifdef CONFIG_PCI_MSI
f70dba83
SC		 4880 if (h->msix_vector)
4881 pci_disable_msix(h->pdev);
4882 else if (h->msi_vector)
4883 pci_disable_msi(h->pdev);
7c832835 4884#endif /* CONFIG_PCI_MSI */
fb86a35b 4885
f70dba83
SC		 4886 iounmap(h->transtable);
4887 iounmap(h->cfgtable);
4888 iounmap(h->vaddr);
1da177e4 4889
f70dba83
SC		 4890 pci_free_consistent(h->pdev, h->nr_cmds * sizeof(CommandList_struct),
4891 h->cmd_pool, h->cmd_pool_dhandle);
4892 pci_free_consistent(h->pdev, h->nr_cmds * sizeof(ErrorInfo_struct),
4893 h->errinfo_pool, h->errinfo_pool_dhandle);
4894 kfree(h->cmd_pool_bits);
5c07a311 4895 /* Free up sg elements */
f70dba83
SC		 4896 for (j = 0; j < h->nr_cmds; j++)
4897 kfree(h->scatter_list[j]);
4898 kfree(h->scatter_list);
4899 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
872225ca
MM		 4900 /*
4901 * Deliberately omit pci_disable_device(): it does something nasty to
4902 * Smart Array controllers that pci_enable_device does not undo
4903 */
7c832835 4904 pci_release_regions(pdev);
4e570309 4905 pci_set_drvdata(pdev, NULL);
f70dba83
SC		 4906 cciss_destroy_hba_sysfs_entry(h);
4907 mutex_unlock(&h->busy_shutting_down);
4908 free_hba(h);
7c832835 4909}
1da177e4
LT		 4910
4911static struct pci_driver cciss_pci_driver = {
7c832835
BH		 4912 .name = "cciss",
4913 .probe = cciss_init_one,
4914 .remove = __devexit_p(cciss_remove_one),
4915 .id_table = cciss_pci_device_id, /* id_table */
e9ca75b5 4916 .shutdown = cciss_shutdown,
1da177e4
LT		 4917};
4918
4919/*
4920 * This is it. Register the PCI driver information for the cards we control
7c832835 4921 * the OS will call our registered routines when it finds one of our cards.
1da177e4
LT		 4922 */
4923static int __init cciss_init(void)
4924{
7fe06326
AP		 4925 int err;
4926
10cbda97
JA		 4927 /*
4928 * The hardware requires that commands are aligned on a 64-bit
4929 * boundary. Given that we use pci_alloc_consistent() to allocate an
4930 * array of them, the size must be a multiple of 8 bytes.
4931 */
1b7d0d28 4932 BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
1da177e4
LT		 4933 printk(KERN_INFO DRIVER_NAME "\n");
4934
7fe06326
AP		 4935 err = bus_register(&cciss_bus_type);
4936 if (err)
4937 return err;
4938
b368c9dd
AP		 4939 /* Start the scan thread */
4940 cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
4941 if (IS_ERR(cciss_scan_thread)) {
4942 err = PTR_ERR(cciss_scan_thread);
4943 goto err_bus_unregister;
4944 }
4945
1da177e4 4946 /* Register for our PCI devices */
7fe06326
AP		 4947 err = pci_register_driver(&cciss_pci_driver);
4948 if (err)
b368c9dd 4949 goto err_thread_stop;
7fe06326 4950
617e1344 4951 return err;
7fe06326 4952
b368c9dd
AP		 4953err_thread_stop:
4954 kthread_stop(cciss_scan_thread);
4955err_bus_unregister:
7fe06326 4956 bus_unregister(&cciss_bus_type);
b368c9dd 4957
7fe06326 4958 return err;
1da177e4
LT		 4959}
4960
4961static void __exit cciss_cleanup(void)
4962{
4963 int i;
4964
4965 pci_unregister_driver(&cciss_pci_driver);
4966 /* double check that all controller entrys have been removed */
7c832835
BH		 4967 for (i = 0; i < MAX_CTLR; i++) {
4968 if (hba[i] != NULL) {
b2a4a43d
SC		 4969 dev_warn(&hba[i]->pdev->dev,
4970 "had to remove controller\n");
1da177e4
LT		 4971 cciss_remove_one(hba[i]->pdev);
4972 }
4973 }
b368c9dd 4974 kthread_stop(cciss_scan_thread);
90fdb0b9
JA		 4975 if (proc_cciss)
4976 remove_proc_entry("driver/cciss", NULL);
7fe06326 4977 bus_unregister(&cciss_bus_type);
1da177e4
LT		 4978}
4979
4980module_init(cciss_init);
4981module_exit(cciss_cleanup);
Empty description
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