[linux.git] / drivers / pci / proc.c

/*
 *	$Id: proc.c,v 1.13 1998/05/12 07:36:07 mj Exp $
 *
 *	Procfs interface for the PCI bus.
 *
 *	Copyright (c) 1997--1999 Martin Mares <[email protected]>
 */

#include <linux/init.h>
#include <linux/pci.h>
#include <linux/module.h>
#include <linux/proc_fs.h>
#include <linux/seq_file.h>
#include <linux/smp_lock.h>

#include <asm/uaccess.h>
#include <asm/byteorder.h>

static int proc_initialized;	/* = 0 */

static loff_t
proc_bus_pci_lseek(struct file *file, loff_t off, int whence)
{
	loff_t new = -1;
	struct inode *inode = file->f_dentry->d_inode;

	down(&inode->i_sem);
	switch (whence) {
	case 0:
		new = off;
		break;
	case 1:
		new = file->f_pos + off;
		break;
	case 2:
		new = inode->i_size + off;
		break;
	}
	if (new < 0 || new > inode->i_size)
		new = -EINVAL;
	else
		file->f_pos = new;
	up(&inode->i_sem);
	return new;
}

static ssize_t
proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *ppos)
{
	const struct inode *ino = file->f_dentry->d_inode;
	const struct proc_dir_entry *dp = PDE(ino);
	struct pci_dev *dev = dp->data;
	unsigned int pos = *ppos;
	unsigned int cnt, size;

	/*
	 * Normal users can read only the standardized portion of the
	 * configuration space as several chips lock up when trying to read
	 * undefined locations (think of Intel PIIX4 as a typical example).
	 */

	if (capable(CAP_SYS_ADMIN))
		size = dev->cfg_size;
	else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
		size = 128;
	else
		size = 64;

	if (pos >= size)
		return 0;
	if (nbytes >= size)
		nbytes = size;
	if (pos + nbytes > size)
		nbytes = size - pos;
	cnt = nbytes;

	if (!access_ok(VERIFY_WRITE, buf, cnt))
		return -EINVAL;

	if ((pos & 1) && cnt) {
		unsigned char val;
		pci_read_config_byte(dev, pos, &val);
		__put_user(val, buf);
		buf++;
		pos++;
		cnt--;
	}

	if ((pos & 3) && cnt > 2) {
		unsigned short val;
		pci_read_config_word(dev, pos, &val);
		__put_user(cpu_to_le16(val), (unsigned short __user *) buf);
		buf += 2;
		pos += 2;
		cnt -= 2;
	}

	while (cnt >= 4) {
		unsigned int val;
		pci_read_config_dword(dev, pos, &val);
		__put_user(cpu_to_le32(val), (unsigned int __user *) buf);
		buf += 4;
		pos += 4;
		cnt -= 4;
	}

	if (cnt >= 2) {
		unsigned short val;
		pci_read_config_word(dev, pos, &val);
		__put_user(cpu_to_le16(val), (unsigned short __user *) buf);
		buf += 2;
		pos += 2;
		cnt -= 2;
	}

	if (cnt) {
		unsigned char val;
		pci_read_config_byte(dev, pos, &val);
		__put_user(val, buf);
		buf++;
		pos++;
		cnt--;
	}

	*ppos = pos;
	return nbytes;
}

static ssize_t
proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, loff_t *ppos)
{
	const struct inode *ino = file->f_dentry->d_inode;
	const struct proc_dir_entry *dp = PDE(ino);
	struct pci_dev *dev = dp->data;
	int pos = *ppos;
	int size = dev->cfg_size;
	int cnt;

	if (pos >= size)
		return 0;
	if (nbytes >= size)
		nbytes = size;
	if (pos + nbytes > size)
		nbytes = size - pos;
	cnt = nbytes;

	if (!access_ok(VERIFY_READ, buf, cnt))
		return -EINVAL;

	if ((pos & 1) && cnt) {
		unsigned char val;
		__get_user(val, buf);
		pci_write_config_byte(dev, pos, val);
		buf++;
		pos++;
		cnt--;
	}

	if ((pos & 3) && cnt > 2) {
		unsigned short val;
		__get_user(val, (unsigned short __user *) buf);
		pci_write_config_word(dev, pos, le16_to_cpu(val));
		buf += 2;
		pos += 2;
		cnt -= 2;
	}

	while (cnt >= 4) {
		unsigned int val;
		__get_user(val, (unsigned int __user *) buf);
		pci_write_config_dword(dev, pos, le32_to_cpu(val));
		buf += 4;
		pos += 4;
		cnt -= 4;
	}

	if (cnt >= 2) {
		unsigned short val;
		__get_user(val, (unsigned short __user *) buf);
		pci_write_config_word(dev, pos, le16_to_cpu(val));
		buf += 2;
		pos += 2;
		cnt -= 2;
	}

	if (cnt) {
		unsigned char val;
		__get_user(val, buf);
		pci_write_config_byte(dev, pos, val);
		buf++;
		pos++;
		cnt--;
	}

	*ppos = pos;
	return nbytes;
}

struct pci_filp_private {
	enum pci_mmap_state mmap_state;
	int write_combine;
};

static int proc_bus_pci_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
{
	const struct proc_dir_entry *dp = PDE(inode);
	struct pci_dev *dev = dp->data;
#ifdef HAVE_PCI_MMAP
	struct pci_filp_private *fpriv = file->private_data;
#endif /* HAVE_PCI_MMAP */
	int ret = 0;

	switch (cmd) {
	case PCIIOC_CONTROLLER:
		ret = pci_domain_nr(dev->bus);
		break;

#ifdef HAVE_PCI_MMAP
	case PCIIOC_MMAP_IS_IO:
		fpriv->mmap_state = pci_mmap_io;
		break;

	case PCIIOC_MMAP_IS_MEM:
		fpriv->mmap_state = pci_mmap_mem;
		break;

	case PCIIOC_WRITE_COMBINE:
		if (arg)
			fpriv->write_combine = 1;
		else
			fpriv->write_combine = 0;
		break;

#endif /* HAVE_PCI_MMAP */

	default:
		ret = -EINVAL;
		break;
	};

	return ret;
}

#ifdef HAVE_PCI_MMAP
static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
{
	struct inode *inode = file->f_dentry->d_inode;
	const struct proc_dir_entry *dp = PDE(inode);
	struct pci_dev *dev = dp->data;
	struct pci_filp_private *fpriv = file->private_data;
	int ret;

	if (!capable(CAP_SYS_RAWIO))
		return -EPERM;

	ret = pci_mmap_page_range(dev, vma,
				  fpriv->mmap_state,
				  fpriv->write_combine);
	if (ret < 0)
		return ret;

	return 0;
}

static int proc_bus_pci_open(struct inode *inode, struct file *file)
{
	struct pci_filp_private *fpriv = kmalloc(sizeof(*fpriv), GFP_KERNEL);

	if (!fpriv)
		return -ENOMEM;

	fpriv->mmap_state = pci_mmap_io;
	fpriv->write_combine = 0;

	file->private_data = fpriv;

	return 0;
}

static int proc_bus_pci_release(struct inode *inode, struct file *file)
{
	kfree(file->private_data);
	file->private_data = NULL;

	return 0;
}
#endif /* HAVE_PCI_MMAP */

static struct file_operations proc_bus_pci_operations = {
	.llseek		= proc_bus_pci_lseek,
	.read		= proc_bus_pci_read,
	.write		= proc_bus_pci_write,
	.ioctl		= proc_bus_pci_ioctl,
#ifdef HAVE_PCI_MMAP
	.open		= proc_bus_pci_open,
	.release	= proc_bus_pci_release,
	.mmap		= proc_bus_pci_mmap,
#ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA
	.get_unmapped_area = get_pci_unmapped_area,
#endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */
#endif /* HAVE_PCI_MMAP */
};

#if BITS_PER_LONG == 32
#define LONG_FORMAT "\t%08lx"
#else
#define LONG_FORMAT "\t%16lx"
#endif

/* iterator */
static void *pci_seq_start(struct seq_file *m, loff_t *pos)
{
	struct pci_dev *dev = NULL;
	loff_t n = *pos;

	for_each_pci_dev(dev) {
		if (!n--)
			break;
	}
	return dev;
}

static void *pci_seq_next(struct seq_file *m, void *v, loff_t *pos)
{
	struct pci_dev *dev = v;

	(*pos)++;
	dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
	return dev;
}

static void pci_seq_stop(struct seq_file *m, void *v)
{
	if (v) {
		struct pci_dev *dev = v;
		pci_dev_put(dev);
	}
}

static int show_device(struct seq_file *m, void *v)
{
	const struct pci_dev *dev = v;
	const struct pci_driver *drv;
	int i;

	if (dev == NULL)
		return 0;

	drv = pci_dev_driver(dev);
	seq_printf(m, "%02x%02x\t%04x%04x\t%x",
			dev->bus->number,
			dev->devfn,
			dev->vendor,
			dev->device,
			dev->irq);
	/* Here should be 7 and not PCI_NUM_RESOURCES as we need to preserve compatibility */
	for(i=0; i<7; i++)
		seq_printf(m, LONG_FORMAT,
			dev->resource[i].start |
			(dev->resource[i].flags & PCI_REGION_FLAG_MASK));
	for(i=0; i<7; i++)
		seq_printf(m, LONG_FORMAT,
			dev->resource[i].start < dev->resource[i].end ?
			dev->resource[i].end - dev->resource[i].start + 1 : 0);
	seq_putc(m, '\t');
	if (drv)
		seq_printf(m, "%s", drv->name);
	seq_putc(m, '\n');
	return 0;
}

static struct seq_operations proc_bus_pci_devices_op = {
	.start	= pci_seq_start,
	.next	= pci_seq_next,
	.stop	= pci_seq_stop,
	.show	= show_device
};

static struct proc_dir_entry *proc_bus_pci_dir;

int pci_proc_attach_device(struct pci_dev *dev)
{
	struct pci_bus *bus = dev->bus;
	struct proc_dir_entry *e;
	char name[16];

	if (!proc_initialized)
		return -EACCES;

	if (!bus->procdir) {
		if (pci_proc_domain(bus)) {
			sprintf(name, "%04x:%02x", pci_domain_nr(bus),
					bus->number);
		} else {
			sprintf(name, "%02x", bus->number);
		}
		bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
		if (!bus->procdir)
			return -ENOMEM;
	}

	sprintf(name, "%02x.%x", PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
	e = create_proc_entry(name, S_IFREG | S_IRUGO | S_IWUSR, bus->procdir);
	if (!e)
		return -ENOMEM;
	e->proc_fops = &proc_bus_pci_operations;
	e->data = dev;
	e->size = dev->cfg_size;
	dev->procent = e;

	return 0;
}

int pci_proc_detach_device(struct pci_dev *dev)
{
	struct proc_dir_entry *e;

	if ((e = dev->procent)) {
		if (atomic_read(&e->count))
			return -EBUSY;
		remove_proc_entry(e->name, dev->bus->procdir);
		dev->procent = NULL;
	}
	return 0;
}

int pci_proc_attach_bus(struct pci_bus* bus)
{
	struct proc_dir_entry *de = bus->procdir;

	if (!proc_initialized)
		return -EACCES;

	if (!de) {
		char name[16];
		sprintf(name, "%02x", bus->number);
		de = bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
		if (!de)
			return -ENOMEM;
	}
	return 0;
}

int pci_proc_detach_bus(struct pci_bus* bus)
{
	struct proc_dir_entry *de = bus->procdir;
	if (de)
		remove_proc_entry(de->name, proc_bus_pci_dir);
	return 0;
}

#ifdef CONFIG_PCI_LEGACY_PROC

/*
 *  Backward compatible /proc/pci interface.
 */

/*
 * Convert some of the configuration space registers of the device at
 * address (bus,devfn) into a string (possibly several lines each).
 * The configuration string is stored starting at buf[len].  If the
 * string would exceed the size of the buffer (SIZE), 0 is returned.
 */
static int show_dev_config(struct seq_file *m, void *v)
{
	struct pci_dev *dev = v;
	struct pci_dev *first_dev;
	struct pci_driver *drv;
	u32 class_rev;
	unsigned char latency, min_gnt, max_lat, *class;
	int reg;

	first_dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, NULL);
	if (dev == first_dev)
		seq_puts(m, "PCI devices found:\n");
	pci_dev_put(first_dev);

	drv = pci_dev_driver(dev);

	pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
	pci_read_config_byte (dev, PCI_LATENCY_TIMER, &latency);
	pci_read_config_byte (dev, PCI_MIN_GNT, &min_gnt);
	pci_read_config_byte (dev, PCI_MAX_LAT, &max_lat);
	seq_printf(m, "  Bus %2d, device %3d, function %2d:\n",
	       dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
	class = pci_class_name(class_rev >> 16);
	if (class)
		seq_printf(m, "    %s", class);
	else
		seq_printf(m, "    Class %04x", class_rev >> 16);
#ifdef CONFIG_PCI_NAMES
	seq_printf(m, ": %s", dev->pretty_name);
#else
	seq_printf(m, ": PCI device %04x:%04x", dev->vendor, dev->device);
#endif
	seq_printf(m, " (rev %d).\n", class_rev & 0xff);

	if (dev->irq)
		seq_printf(m, "      IRQ %d.\n", dev->irq);

	if (latency || min_gnt || max_lat) {
		seq_printf(m, "      Master Capable.  ");
		if (latency)
			seq_printf(m, "Latency=%d.  ", latency);
		else
			seq_puts(m, "No bursts.  ");
		if (min_gnt)
			seq_printf(m, "Min Gnt=%d.", min_gnt);
		if (max_lat)
			seq_printf(m, "Max Lat=%d.", max_lat);
		seq_putc(m, '\n');
	}

	for (reg = 0; reg < 6; reg++) {
		struct resource *res = dev->resource + reg;
		unsigned long base, end, flags;

		base = res->start;
		end = res->end;
		flags = res->flags;
		if (!end)
			continue;

		if (flags & PCI_BASE_ADDRESS_SPACE_IO) {
			seq_printf(m, "      I/O at 0x%lx [0x%lx].\n",
				base, end);
		} else {
			const char *pref, *type = "unknown";

			if (flags & PCI_BASE_ADDRESS_MEM_PREFETCH)
				pref = "P";
			else
				pref = "Non-p";
			switch (flags & PCI_BASE_ADDRESS_MEM_TYPE_MASK) {
			      case PCI_BASE_ADDRESS_MEM_TYPE_32:
				type = "32 bit"; break;
			      case PCI_BASE_ADDRESS_MEM_TYPE_1M:
				type = "20 bit"; break;
			      case PCI_BASE_ADDRESS_MEM_TYPE_64:
				type = "64 bit"; break;
			}
			seq_printf(m, "      %srefetchable %s memory at "
				       "0x%lx [0x%lx].\n", pref, type,
				       base,
				       end);
		}
	}
	return 0;
}

static struct seq_operations proc_pci_op = {
	.start	= pci_seq_start,
	.next	= pci_seq_next,
	.stop	= pci_seq_stop,
	.show	= show_dev_config
};

static int proc_pci_open(struct inode *inode, struct file *file)
{
	return seq_open(file, &proc_pci_op);
}
static struct file_operations proc_pci_operations = {
	.open		= proc_pci_open,
	.read		= seq_read,
	.llseek		= seq_lseek,
	.release	= seq_release,
};

static void legacy_proc_init(void)
{
	struct proc_dir_entry * entry = create_proc_entry("pci", 0, NULL);
	if (entry)
		entry->proc_fops = &proc_pci_operations;
}

#else

static void legacy_proc_init(void)
{

}

#endif /* CONFIG_PCI_LEGACY_PROC */

static int proc_bus_pci_dev_open(struct inode *inode, struct file *file)
{
	return seq_open(file, &proc_bus_pci_devices_op);
}
static struct file_operations proc_bus_pci_dev_operations = {
	.open		= proc_bus_pci_dev_open,
	.read		= seq_read,
	.llseek		= seq_lseek,
	.release	= seq_release,
};

static int __init pci_proc_init(void)
{
	struct proc_dir_entry *entry;
	struct pci_dev *dev = NULL;
	proc_bus_pci_dir = proc_mkdir("pci", proc_bus);
	entry = create_proc_entry("devices", 0, proc_bus_pci_dir);
	if (entry)
		entry->proc_fops = &proc_bus_pci_dev_operations;
	proc_initialized = 1;
	while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
		pci_proc_attach_device(dev);
	}
	legacy_proc_init();
	return 0;
}

__initcall(pci_proc_init);

#ifdef CONFIG_HOTPLUG
EXPORT_SYMBOL(pci_proc_attach_device);
EXPORT_SYMBOL(pci_proc_attach_bus);
EXPORT_SYMBOL(pci_proc_detach_bus);
#endif
Commit	Line	Data
1da177e4 LT	1	/*
	2	* $Id: proc.c,v 1.13 1998/05/12 07:36:07 mj Exp $
	3	*
	4	* Procfs interface for the PCI bus.
	5	*
	6	* Copyright (c) 1997--1999 Martin Mares <[email protected]>
	7	*/
	8
	9	#include <linux/init.h>
	10	#include <linux/pci.h>
	11	#include <linux/module.h>
	12	#include <linux/proc_fs.h>
	13	#include <linux/seq_file.h>
	14	#include <linux/smp_lock.h>
	15
	16	#include <asm/uaccess.h>
	17	#include <asm/byteorder.h>
	18
	19	static int proc_initialized; /* = 0 */
	20
	21	static loff_t
	22	proc_bus_pci_lseek(struct file *file, loff_t off, int whence)
	23	{
	24	loff_t new = -1;
	25	struct inode *inode = file->f_dentry->d_inode;
	26
	27	down(&inode->i_sem);
	28	switch (whence) {
	29	case 0:
	30	new = off;
	31	break;
	32	case 1:
	33	new = file->f_pos + off;
	34	break;
	35	case 2:
	36	new = inode->i_size + off;
	37	break;
	38	}
	39	if (new < 0 \|\| new > inode->i_size)
	40	new = -EINVAL;
	41	else
	42	file->f_pos = new;
	43	up(&inode->i_sem);
	44	return new;
	45	}
	46
	47	static ssize_t
	48	proc_bus_pci_read(struct file file, char __user buf, size_t nbytes, loff_t *ppos)
	49	{
	50	const struct inode *ino = file->f_dentry->d_inode;
	51	const struct proc_dir_entry *dp = PDE(ino);
	52	struct pci_dev *dev = dp->data;
	53	unsigned int pos = *ppos;
	54	unsigned int cnt, size;
	55
	56	/*
	57	* Normal users can read only the standardized portion of the
	58	* configuration space as several chips lock up when trying to read
	59	* undefined locations (think of Intel PIIX4 as a typical example).
	60	*/
	61
	62	if (capable(CAP_SYS_ADMIN))
	63	size = dev->cfg_size;
	64	else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
65	size = 128;
66	else
67	size = 64;
68
69	if (pos >= size)
70	return 0;
71	if (nbytes >= size)
72	nbytes = size;
73	if (pos + nbytes > size)
74	nbytes = size - pos;
75	cnt = nbytes;
76
77	if (!access_ok(VERIFY_WRITE, buf, cnt))
78	return -EINVAL;
79
80	if ((pos & 1) && cnt) {
81	unsigned char val;
82	pci_read_config_byte(dev, pos, &val);
83	__put_user(val, buf);
84	buf++;
85	pos++;
86	cnt--;
87	}
88
89	if ((pos & 3) && cnt > 2) {
90	unsigned short val;
91	pci_read_config_word(dev, pos, &val);
92	__put_user(cpu_to_le16(val), (unsigned short __user *) buf);
93	buf += 2;
94	pos += 2;
95	cnt -= 2;
96	}
97
98	while (cnt >= 4) {
99	unsigned int val;
100	pci_read_config_dword(dev, pos, &val);
101	__put_user(cpu_to_le32(val), (unsigned int __user *) buf);
102	buf += 4;
103	pos += 4;
104	cnt -= 4;
105	}
106
107	if (cnt >= 2) {
108	unsigned short val;
109	pci_read_config_word(dev, pos, &val);
110	__put_user(cpu_to_le16(val), (unsigned short __user *) buf);
111	buf += 2;
112	pos += 2;
113	cnt -= 2;
114	}
115
116	if (cnt) {
117	unsigned char val;
118	pci_read_config_byte(dev, pos, &val);
119	__put_user(val, buf);
120	buf++;
121	pos++;
122	cnt--;
123	}
124
125	*ppos = pos;
126	return nbytes;
127	}
128
129	static ssize_t
130	proc_bus_pci_write(struct file file, const char __user buf, size_t nbytes, loff_t *ppos)
131	{
132	const struct inode *ino = file->f_dentry->d_inode;
133	const struct proc_dir_entry *dp = PDE(ino);
134	struct pci_dev *dev = dp->data;
135	int pos = *ppos;
136	int size = dev->cfg_size;
137	int cnt;
138
139	if (pos >= size)
140	return 0;
141	if (nbytes >= size)
142	nbytes = size;
143	if (pos + nbytes > size)
144	nbytes = size - pos;
145	cnt = nbytes;
146
147	if (!access_ok(VERIFY_READ, buf, cnt))
148	return -EINVAL;
149
150	if ((pos & 1) && cnt) {
151	unsigned char val;
152	__get_user(val, buf);
153	pci_write_config_byte(dev, pos, val);
154	buf++;
155	pos++;
156	cnt--;
157	}
158
159	if ((pos & 3) && cnt > 2) {
160	unsigned short val;
161	__get_user(val, (unsigned short __user *) buf);
162	pci_write_config_word(dev, pos, le16_to_cpu(val));
163	buf += 2;
164	pos += 2;
165	cnt -= 2;
166	}
167
168	while (cnt >= 4) {
169	unsigned int val;
170	__get_user(val, (unsigned int __user *) buf);
171	pci_write_config_dword(dev, pos, le32_to_cpu(val));
172	buf += 4;
173	pos += 4;
174	cnt -= 4;
175	}
176
177	if (cnt >= 2) {
178	unsigned short val;
179	__get_user(val, (unsigned short __user *) buf);
180	pci_write_config_word(dev, pos, le16_to_cpu(val));
181	buf += 2;
182	pos += 2;
183	cnt -= 2;
184	}
185
186	if (cnt) {
187	unsigned char val;
188	__get_user(val, buf);
189	pci_write_config_byte(dev, pos, val);
190	buf++;
191	pos++;
192	cnt--;
193	}
194
195	*ppos = pos;
196	return nbytes;
197	}
198
199	struct pci_filp_private {
200	enum pci_mmap_state mmap_state;
201	int write_combine;
202	};
203
204	static int proc_bus_pci_ioctl(struct inode inode, struct file file, unsigned int cmd, unsigned long arg)
205	{
206	const struct proc_dir_entry *dp = PDE(inode);
207	struct pci_dev *dev = dp->data;
208	#ifdef HAVE_PCI_MMAP
209	struct pci_filp_private *fpriv = file->private_data;
210	#endif /* HAVE_PCI_MMAP */
211	int ret = 0;
212
213	switch (cmd) {
214	case PCIIOC_CONTROLLER:
215	ret = pci_domain_nr(dev->bus);
216	break;
217
218	#ifdef HAVE_PCI_MMAP
219	case PCIIOC_MMAP_IS_IO:
220	fpriv->mmap_state = pci_mmap_io;
221	break;
222
223	case PCIIOC_MMAP_IS_MEM:
224	fpriv->mmap_state = pci_mmap_mem;
225	break;
226
227	case PCIIOC_WRITE_COMBINE:
228	if (arg)
229	fpriv->write_combine = 1;
230	else
231	fpriv->write_combine = 0;
232	break;
233
234	#endif /* HAVE_PCI_MMAP */
235
236	default:
237	ret = -EINVAL;
238	break;
239	};
240
241	return ret;
242	}
243
244	#ifdef HAVE_PCI_MMAP
245	static int proc_bus_pci_mmap(struct file file, struct vm_area_struct vma)
246	{
247	struct inode *inode = file->f_dentry->d_inode;
248	const struct proc_dir_entry *dp = PDE(inode);
249	struct pci_dev *dev = dp->data;
250	struct pci_filp_private *fpriv = file->private_data;
251	int ret;
252
253	if (!capable(CAP_SYS_RAWIO))
254	return -EPERM;
255
256	ret = pci_mmap_page_range(dev, vma,
257	fpriv->mmap_state,
258	fpriv->write_combine);
259	if (ret < 0)
260	return ret;
261
262	return 0;
263	}
264
265	static int proc_bus_pci_open(struct inode inode, struct file file)
266	{
267	struct pci_filp_private fpriv = kmalloc(sizeof(fpriv), GFP_KERNEL);
268
269	if (!fpriv)
270	return -ENOMEM;
271
272	fpriv->mmap_state = pci_mmap_io;
273	fpriv->write_combine = 0;
274
275	file->private_data = fpriv;
276
277	return 0;
278	}
279
280	static int proc_bus_pci_release(struct inode inode, struct file file)
281	{
282	kfree(file->private_data);
283	file->private_data = NULL;
284
285	return 0;
286	}
287	#endif /* HAVE_PCI_MMAP */
288
289	static struct file_operations proc_bus_pci_operations = {
290	.llseek = proc_bus_pci_lseek,
291	.read = proc_bus_pci_read,
292	.write = proc_bus_pci_write,
293	.ioctl = proc_bus_pci_ioctl,
294	#ifdef HAVE_PCI_MMAP
295	.open = proc_bus_pci_open,
296	.release = proc_bus_pci_release,
297	.mmap = proc_bus_pci_mmap,
298	#ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA
299	.get_unmapped_area = get_pci_unmapped_area,
300	#endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */
301	#endif /* HAVE_PCI_MMAP */
302	};
303
304	#if BITS_PER_LONG == 32
305	#define LONG_FORMAT "\t%08lx"
306	#else
307	#define LONG_FORMAT "\t%16lx"
308	#endif
309
310	/* iterator */
311	static void pci_seq_start(struct seq_file m, loff_t *pos)
312	{
313	struct pci_dev *dev = NULL;
314	loff_t n = *pos;
315
316	for_each_pci_dev(dev) {
317	if (!n--)
318	break;
319	}
320	return dev;
321	}
322
323	static void pci_seq_next(struct seq_file m, void v, loff_t pos)
324	{
325	struct pci_dev *dev = v;
326
327	(*pos)++;
328	dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
329	return dev;
330	}
331
332	static void pci_seq_stop(struct seq_file m, void v)
333	{
334	if (v) {
335	struct pci_dev *dev = v;
336	pci_dev_put(dev);
337	}
338	}
339
340	static int show_device(struct seq_file m, void v)
341	{
342	const struct pci_dev *dev = v;
343	const struct pci_driver *drv;
344	int i;
345
346	if (dev == NULL)
347	return 0;
348
349	drv = pci_dev_driver(dev);
350	seq_printf(m, "%02x%02x\t%04x%04x\t%x",
351	dev->bus->number,
352	dev->devfn,
353	dev->vendor,
354	dev->device,
355	dev->irq);
356	/* Here should be 7 and not PCI_NUM_RESOURCES as we need to preserve compatibility */
357	for(i=0; i<7; i++)
358	seq_printf(m, LONG_FORMAT,
359	dev->resource[i].start \|
360	(dev->resource[i].flags & PCI_REGION_FLAG_MASK));
361	for(i=0; i<7; i++)
362	seq_printf(m, LONG_FORMAT,
363	dev->resource[i].start < dev->resource[i].end ?
364	dev->resource[i].end - dev->resource[i].start + 1 : 0);
365	seq_putc(m, '\t');
366	if (drv)
367	seq_printf(m, "%s", drv->name);
368	seq_putc(m, '\n');
369	return 0;
370	}
371
372	static struct seq_operations proc_bus_pci_devices_op = {
373	.start = pci_seq_start,
374	.next = pci_seq_next,
375	.stop = pci_seq_stop,
376	.show = show_device
377	};
378
379	static struct proc_dir_entry *proc_bus_pci_dir;
380
381	int pci_proc_attach_device(struct pci_dev *dev)
382	{
383	struct pci_bus *bus = dev->bus;
384	struct proc_dir_entry *e;
385	char name[16];
386
387	if (!proc_initialized)
388	return -EACCES;
389
390	if (!bus->procdir) {
391	if (pci_proc_domain(bus)) {
392	sprintf(name, "%04x:%02x", pci_domain_nr(bus),
393	bus->number);
394	} else {
395	sprintf(name, "%02x", bus->number);
396	}
397	bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
398	if (!bus->procdir)
399	return -ENOMEM;
400	}
401
402	sprintf(name, "%02x.%x", PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
403	e = create_proc_entry(name, S_IFREG \| S_IRUGO \| S_IWUSR, bus->procdir);
404	if (!e)
405	return -ENOMEM;
406	e->proc_fops = &proc_bus_pci_operations;
407	e->data = dev;
408	e->size = dev->cfg_size;
409	dev->procent = e;
410
411	return 0;
412	}
413
414	int pci_proc_detach_device(struct pci_dev *dev)
415	{
416	struct proc_dir_entry *e;
417
418	if ((e = dev->procent)) {
419	if (atomic_read(&e->count))
420	return -EBUSY;
421	remove_proc_entry(e->name, dev->bus->procdir);
422	dev->procent = NULL;
423	}
424	return 0;
425	}
426
427	int pci_proc_attach_bus(struct pci_bus* bus)
428	{
429	struct proc_dir_entry *de = bus->procdir;
430
431	if (!proc_initialized)
432	return -EACCES;
433
434	if (!de) {
435	char name[16];
436	sprintf(name, "%02x", bus->number);
437	de = bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
438	if (!de)
439	return -ENOMEM;
440	}
441	return 0;
442	}
443
444	int pci_proc_detach_bus(struct pci_bus* bus)
445	{
446	struct proc_dir_entry *de = bus->procdir;
447	if (de)
448	remove_proc_entry(de->name, proc_bus_pci_dir);
449	return 0;
450	}
451
452	#ifdef CONFIG_PCI_LEGACY_PROC
453
454	/*
455	* Backward compatible /proc/pci interface.
456	*/
457
458	/*
459	* Convert some of the configuration space registers of the device at
460	* address (bus,devfn) into a string (possibly several lines each).
461	* The configuration string is stored starting at buf[len]. If the
462	* string would exceed the size of the buffer (SIZE), 0 is returned.
463	*/
464	static int show_dev_config(struct seq_file m, void v)
465	{
466	struct pci_dev *dev = v;
467	struct pci_dev *first_dev;
468	struct pci_driver *drv;
469	u32 class_rev;
470	unsigned char latency, min_gnt, max_lat, *class;
471	int reg;
472
473	first_dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, NULL);
474	if (dev == first_dev)
475	seq_puts(m, "PCI devices found:\n");
476	pci_dev_put(first_dev);
477
478	drv = pci_dev_driver(dev);
479
480	pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
481	pci_read_config_byte (dev, PCI_LATENCY_TIMER, &latency);
482	pci_read_config_byte (dev, PCI_MIN_GNT, &min_gnt);
483	pci_read_config_byte (dev, PCI_MAX_LAT, &max_lat);
484	seq_printf(m, " Bus %2d, device %3d, function %2d:\n",
485	dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
486	class = pci_class_name(class_rev >> 16);
487	if (class)
488	seq_printf(m, " %s", class);
489	else
490	seq_printf(m, " Class %04x", class_rev >> 16);
491	#ifdef CONFIG_PCI_NAMES
492	seq_printf(m, ": %s", dev->pretty_name);
493	#else
494	seq_printf(m, ": PCI device %04x:%04x", dev->vendor, dev->device);
495	#endif
496	seq_printf(m, " (rev %d).\n", class_rev & 0xff);
497
498	if (dev->irq)
499	seq_printf(m, " IRQ %d.\n", dev->irq);
500
501	if (latency \|\| min_gnt \|\| max_lat) {
502	seq_printf(m, " Master Capable. ");
503	if (latency)
504	seq_printf(m, "Latency=%d. ", latency);
505	else
506	seq_puts(m, "No bursts. ");
507	if (min_gnt)
508	seq_printf(m, "Min Gnt=%d.", min_gnt);
509	if (max_lat)
510	seq_printf(m, "Max Lat=%d.", max_lat);
511	seq_putc(m, '\n');
512	}
513
514	for (reg = 0; reg < 6; reg++) {
515	struct resource *res = dev->resource + reg;
516	unsigned long base, end, flags;
517
518	base = res->start;
519	end = res->end;
520	flags = res->flags;
521	if (!end)
522	continue;
523
524	if (flags & PCI_BASE_ADDRESS_SPACE_IO) {
525	seq_printf(m, " I/O at 0x%lx [0x%lx].\n",
526	base, end);
527	} else {
528	const char pref, type = "unknown";
529
530	if (flags & PCI_BASE_ADDRESS_MEM_PREFETCH)
531	pref = "P";
532	else
533	pref = "Non-p";
534	switch (flags & PCI_BASE_ADDRESS_MEM_TYPE_MASK) {
535	case PCI_BASE_ADDRESS_MEM_TYPE_32:
536	type = "32 bit"; break;
537	case PCI_BASE_ADDRESS_MEM_TYPE_1M:
538	type = "20 bit"; break;
539	case PCI_BASE_ADDRESS_MEM_TYPE_64:
540	type = "64 bit"; break;
541	}
542	seq_printf(m, " %srefetchable %s memory at "
543	"0x%lx [0x%lx].\n", pref, type,
544	base,
545	end);
546	}
547	}
548	return 0;
549	}
550
551	static struct seq_operations proc_pci_op = {
552	.start = pci_seq_start,
553	.next = pci_seq_next,
554	.stop = pci_seq_stop,
555	.show = show_dev_config
556	};
557
558	static int proc_pci_open(struct inode inode, struct file file)
559	{
560	return seq_open(file, &proc_pci_op);
561	}
562	static struct file_operations proc_pci_operations = {
563	.open = proc_pci_open,
564	.read = seq_read,
565	.llseek = seq_lseek,
566	.release = seq_release,
567	};
568
569	static void legacy_proc_init(void)
570	{
571	struct proc_dir_entry * entry = create_proc_entry("pci", 0, NULL);
572	if (entry)
573	entry->proc_fops = &proc_pci_operations;
574	}
575
576	#else
577
578	static void legacy_proc_init(void)
579	{
580
581	}
582
583	#endif /* CONFIG_PCI_LEGACY_PROC */
584
585	static int proc_bus_pci_dev_open(struct inode inode, struct file file)
586	{
587	return seq_open(file, &proc_bus_pci_devices_op);
588	}
589	static struct file_operations proc_bus_pci_dev_operations = {
590	.open = proc_bus_pci_dev_open,
591	.read = seq_read,
592	.llseek = seq_lseek,
593	.release = seq_release,
594	};
595
596	static int __init pci_proc_init(void)
597	{
598	struct proc_dir_entry *entry;
599	struct pci_dev *dev = NULL;
600	proc_bus_pci_dir = proc_mkdir("pci", proc_bus);
601	entry = create_proc_entry("devices", 0, proc_bus_pci_dir);
602	if (entry)
603	entry->proc_fops = &proc_bus_pci_dev_operations;
604	proc_initialized = 1;
605	while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
606	pci_proc_attach_device(dev);
607	}
608	legacy_proc_init();
609	return 0;
610	}
611
612	__initcall(pci_proc_init);
613
614	#ifdef CONFIG_HOTPLUG
615	EXPORT_SYMBOL(pci_proc_attach_device);
616	EXPORT_SYMBOL(pci_proc_attach_bus);
617	EXPORT_SYMBOL(pci_proc_detach_bus);
618	#endif
619