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[linux.git] / drivers / net / myri_sbus.c
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1da177e4
LT		 1/* myri_sbus.h: MyriCOM MyriNET SBUS card driver.
2 *
3 * Copyright (C) 1996, 1999 David S. Miller ([email protected])
4 */
5
6static char version[] =
7 "myri_sbus.c:v1.9 12/Sep/99 David S. Miller ([email protected])\n";
8
9#include <linux/module.h>
10#include <linux/config.h>
11#include <linux/errno.h>
12#include <linux/kernel.h>
13#include <linux/types.h>
14#include <linux/fcntl.h>
15#include <linux/interrupt.h>
16#include <linux/ioport.h>
17#include <linux/in.h>
18#include <linux/slab.h>
19#include <linux/string.h>
20#include <linux/delay.h>
21#include <linux/init.h>
22#include <linux/netdevice.h>
23#include <linux/etherdevice.h>
24#include <linux/skbuff.h>
25#include <linux/bitops.h>
26
27#include <net/dst.h>
28#include <net/arp.h>
29#include <net/sock.h>
30#include <net/ipv6.h>
31
32#include <asm/system.h>
33#include <asm/io.h>
34#include <asm/dma.h>
35#include <asm/byteorder.h>
36#include <asm/idprom.h>
37#include <asm/sbus.h>
38#include <asm/openprom.h>
39#include <asm/oplib.h>
40#include <asm/auxio.h>
41#include <asm/pgtable.h>
42#include <asm/irq.h>
43#include <asm/checksum.h>
44
45#include "myri_sbus.h"
46#include "myri_code.h"
47
48/* #define DEBUG_DETECT */
49/* #define DEBUG_IRQ */
50/* #define DEBUG_TRANSMIT */
51/* #define DEBUG_RECEIVE */
52/* #define DEBUG_HEADER */
53
54#ifdef DEBUG_DETECT
55#define DET(x) printk x
56#else
57#define DET(x)
58#endif
59
60#ifdef DEBUG_IRQ
61#define DIRQ(x) printk x
62#else
63#define DIRQ(x)
64#endif
65
66#ifdef DEBUG_TRANSMIT
67#define DTX(x) printk x
68#else
69#define DTX(x)
70#endif
71
72#ifdef DEBUG_RECEIVE
73#define DRX(x) printk x
74#else
75#define DRX(x)
76#endif
77
78#ifdef DEBUG_HEADER
79#define DHDR(x) printk x
80#else
81#define DHDR(x)
82#endif
83
84#ifdef MODULE
85static struct myri_eth *root_myri_dev;
86#endif
87
88static void myri_reset_off(void __iomem *lp, void __iomem *cregs)
89{
90 /* Clear IRQ mask. */
91 sbus_writel(0, lp + LANAI_EIMASK);
92
93 /* Turn RESET function off. */
94 sbus_writel(CONTROL_ROFF, cregs + MYRICTRL_CTRL);
95}
96
97static void myri_reset_on(void __iomem *cregs)
98{
99 /* Enable RESET function. */
100 sbus_writel(CONTROL_RON, cregs + MYRICTRL_CTRL);
101
102 /* Disable IRQ's. */
103 sbus_writel(CONTROL_DIRQ, cregs + MYRICTRL_CTRL);
104}
105
106static void myri_disable_irq(void __iomem *lp, void __iomem *cregs)
107{
108 sbus_writel(CONTROL_DIRQ, cregs + MYRICTRL_CTRL);
109 sbus_writel(0, lp + LANAI_EIMASK);
110 sbus_writel(ISTAT_HOST, lp + LANAI_ISTAT);
111}
112
113static void myri_enable_irq(void __iomem *lp, void __iomem *cregs)
114{
115 sbus_writel(CONTROL_EIRQ, cregs + MYRICTRL_CTRL);
116 sbus_writel(ISTAT_HOST, lp + LANAI_EIMASK);
117}
118
119static inline void bang_the_chip(struct myri_eth *mp)
120{
121 struct myri_shmem __iomem *shmem = mp->shmem;
122 void __iomem *cregs = mp->cregs;
123
124 sbus_writel(1, &shmem->send);
125 sbus_writel(CONTROL_WON, cregs + MYRICTRL_CTRL);
126}
127
128static int myri_do_handshake(struct myri_eth *mp)
129{
130 struct myri_shmem __iomem *shmem = mp->shmem;
131 void __iomem *cregs = mp->cregs;
132 struct myri_channel __iomem *chan = &shmem->channel;
133 int tick = 0;
134
135 DET(("myri_do_handshake: "));
136 if (sbus_readl(&chan->state) == STATE_READY) {
137 DET(("Already STATE_READY, failed.\n"));
138 return -1; /* We're hosed... */
139 }
140
141 myri_disable_irq(mp->lregs, cregs);
142
143 while (tick++ <= 25) {
144 u32 softstate;
145
146 /* Wake it up. */
147 DET(("shakedown, CONTROL_WON, "));
148 sbus_writel(1, &shmem->shakedown);
149 sbus_writel(CONTROL_WON, cregs + MYRICTRL_CTRL);
150
151 softstate = sbus_readl(&chan->state);
152 DET(("chanstate[%08x] ", softstate));
153 if (softstate == STATE_READY) {
154 DET(("wakeup successful, "));
155 break;
156 }
157
158 if (softstate != STATE_WFN) {
159 DET(("not WFN setting that, "));
160 sbus_writel(STATE_WFN, &chan->state);
161 }
162
163 udelay(20);
164 }
165
166 myri_enable_irq(mp->lregs, cregs);
167
168 if (tick > 25) {
169 DET(("25 ticks we lose, failure.\n"));
170 return -1;
171 }
172 DET(("success\n"));
173 return 0;
174}
175
176static int myri_load_lanai(struct myri_eth *mp)
177{
178 struct net_device *dev = mp->dev;
179 struct myri_shmem __iomem *shmem = mp->shmem;
180 void __iomem *rptr;
181 int i;
182
183 myri_disable_irq(mp->lregs, mp->cregs);
184 myri_reset_on(mp->cregs);
185
186 rptr = mp->lanai;
187 for (i = 0; i < mp->eeprom.ramsz; i++)
188 sbus_writeb(0, rptr + i);
189
190 if (mp->eeprom.cpuvers >= CPUVERS_3_0)
191 sbus_writel(mp->eeprom.cval, mp->lregs + LANAI_CVAL);
192
193 /* Load executable code. */
194 for (i = 0; i < sizeof(lanai4_code); i++)
195 sbus_writeb(lanai4_code[i], rptr + (lanai4_code_off * 2) + i);
196
197 /* Load data segment. */
198 for (i = 0; i < sizeof(lanai4_data); i++)
199 sbus_writeb(lanai4_data[i], rptr + (lanai4_data_off * 2) + i);
200
201 /* Set device address. */
202 sbus_writeb(0, &shmem->addr[0]);
203 sbus_writeb(0, &shmem->addr[1]);
204 for (i = 0; i < 6; i++)
205 sbus_writeb(dev->dev_addr[i],
206 &shmem->addr[i + 2]);
207
208 /* Set SBUS bursts and interrupt mask. */
209 sbus_writel(((mp->myri_bursts & 0xf8) >> 3), &shmem->burst);
210 sbus_writel(SHMEM_IMASK_RX, &shmem->imask);
211
212 /* Release the LANAI. */
213 myri_disable_irq(mp->lregs, mp->cregs);
214 myri_reset_off(mp->lregs, mp->cregs);
215 myri_disable_irq(mp->lregs, mp->cregs);
216
217 /* Wait for the reset to complete. */
218 for (i = 0; i < 5000; i++) {
219 if (sbus_readl(&shmem->channel.state) != STATE_READY)
220 break;
221 else
222 udelay(10);
223 }
224
225 if (i == 5000)
226 printk(KERN_ERR "myricom: Chip would not reset after firmware load.\n");
227
228 i = myri_do_handshake(mp);
229 if (i)
230 printk(KERN_ERR "myricom: Handshake with LANAI failed.\n");
231
232 if (mp->eeprom.cpuvers == CPUVERS_4_0)
233 sbus_writel(0, mp->lregs + LANAI_VERS);
234
235 return i;
236}
237
238static void myri_clean_rings(struct myri_eth *mp)
239{
240 struct sendq __iomem *sq = mp->sq;
241 struct recvq __iomem *rq = mp->rq;
242 int i;
243
244 sbus_writel(0, &rq->tail);
245 sbus_writel(0, &rq->head);
246 for (i = 0; i < (RX_RING_SIZE+1); i++) {
247 if (mp->rx_skbs[i] != NULL) {
248 struct myri_rxd __iomem *rxd = &rq->myri_rxd[i];
249 u32 dma_addr;
250
251 dma_addr = sbus_readl(&rxd->myri_scatters[0].addr);
252 sbus_unmap_single(mp->myri_sdev, dma_addr, RX_ALLOC_SIZE, SBUS_DMA_FROMDEVICE);
253 dev_kfree_skb(mp->rx_skbs[i]);
254 mp->rx_skbs[i] = NULL;
255 }
256 }
257
258 mp->tx_old = 0;
259 sbus_writel(0, &sq->tail);
260 sbus_writel(0, &sq->head);
261 for (i = 0; i < TX_RING_SIZE; i++) {
262 if (mp->tx_skbs[i] != NULL) {
263 struct sk_buff *skb = mp->tx_skbs[i];
264 struct myri_txd __iomem *txd = &sq->myri_txd[i];
265 u32 dma_addr;
266
267 dma_addr = sbus_readl(&txd->myri_gathers[0].addr);
268 sbus_unmap_single(mp->myri_sdev, dma_addr, (skb->len + 3) & ~3, SBUS_DMA_TODEVICE);
269 dev_kfree_skb(mp->tx_skbs[i]);
270 mp->tx_skbs[i] = NULL;
271 }
272 }
273}
274
275static void myri_init_rings(struct myri_eth *mp, int from_irq)
276{
277 struct recvq __iomem *rq = mp->rq;
278 struct myri_rxd __iomem *rxd = &rq->myri_rxd[0];
279 struct net_device *dev = mp->dev;
280 int gfp_flags = GFP_KERNEL;
281 int i;
282
283 if (from_irq || in_interrupt())
284 gfp_flags = GFP_ATOMIC;
285
286 myri_clean_rings(mp);
287 for (i = 0; i < RX_RING_SIZE; i++) {
288 struct sk_buff *skb = myri_alloc_skb(RX_ALLOC_SIZE, gfp_flags);
289 u32 dma_addr;
290
291 if (!skb)
292 continue;
293 mp->rx_skbs[i] = skb;
294 skb->dev = dev;
295 skb_put(skb, RX_ALLOC_SIZE);
296
297 dma_addr = sbus_map_single(mp->myri_sdev, skb->data, RX_ALLOC_SIZE, SBUS_DMA_FROMDEVICE);
298 sbus_writel(dma_addr, &rxd[i].myri_scatters[0].addr);
299 sbus_writel(RX_ALLOC_SIZE, &rxd[i].myri_scatters[0].len);
300 sbus_writel(i, &rxd[i].ctx);
301 sbus_writel(1, &rxd[i].num_sg);
302 }
303 sbus_writel(0, &rq->head);
304 sbus_writel(RX_RING_SIZE, &rq->tail);
305}
306
307static int myri_init(struct myri_eth *mp, int from_irq)
308{
309 myri_init_rings(mp, from_irq);
310 return 0;
311}
312
313static void myri_is_not_so_happy(struct myri_eth *mp)
314{
315}
316
317#ifdef DEBUG_HEADER
318static void dump_ehdr(struct ethhdr *ehdr)
319{
320 printk("ehdr[h_dst(%02x:%02x:%02x:%02x:%02x:%02x)"
321 "h_source(%02x:%02x:%02x:%02x:%02x:%02x)h_proto(%04x)]\n",
322 ehdr->h_dest[0], ehdr->h_dest[1], ehdr->h_dest[2],
323 ehdr->h_dest[3], ehdr->h_dest[4], ehdr->h_dest[4],
324 ehdr->h_source[0], ehdr->h_source[1], ehdr->h_source[2],
325 ehdr->h_source[3], ehdr->h_source[4], ehdr->h_source[4],
326 ehdr->h_proto);
327}
328
329static void dump_ehdr_and_myripad(unsigned char *stuff)
330{
331 struct ethhdr *ehdr = (struct ethhdr *) (stuff + 2);
332
333 printk("pad[%02x:%02x]", stuff[0], stuff[1]);
334 printk("ehdr[h_dst(%02x:%02x:%02x:%02x:%02x:%02x)"
335 "h_source(%02x:%02x:%02x:%02x:%02x:%02x)h_proto(%04x)]\n",
336 ehdr->h_dest[0], ehdr->h_dest[1], ehdr->h_dest[2],
337 ehdr->h_dest[3], ehdr->h_dest[4], ehdr->h_dest[4],
338 ehdr->h_source[0], ehdr->h_source[1], ehdr->h_source[2],
339 ehdr->h_source[3], ehdr->h_source[4], ehdr->h_source[4],
340 ehdr->h_proto);
341}
342#endif
343
344static void myri_tx(struct myri_eth *mp, struct net_device *dev)
345{
346 struct sendq __iomem *sq= mp->sq;
347 int entry = mp->tx_old;
348 int limit = sbus_readl(&sq->head);
349
350 DTX(("entry[%d] limit[%d] ", entry, limit));
351 if (entry == limit)
352 return;
353 while (entry != limit) {
354 struct sk_buff *skb = mp->tx_skbs[entry];
355 u32 dma_addr;
356
357 DTX(("SKB[%d] ", entry));
358 dma_addr = sbus_readl(&sq->myri_txd[entry].myri_gathers[0].addr);
359 sbus_unmap_single(mp->myri_sdev, dma_addr, skb->len, SBUS_DMA_TODEVICE);
360 dev_kfree_skb(skb);
361 mp->tx_skbs[entry] = NULL;
362 mp->enet_stats.tx_packets++;
363 entry = NEXT_TX(entry);
364 }
365 mp->tx_old = entry;
366}
367
368/* Determine the packet's protocol ID. The rule here is that we
369 * assume 802.3 if the type field is short enough to be a length.
370 * This is normal practice and works for any 'now in use' protocol.
371 */
372static unsigned short myri_type_trans(struct sk_buff *skb, struct net_device *dev)
373{
374 struct ethhdr *eth;
375 unsigned char *rawp;
376
377 skb->mac.raw = (((unsigned char *)skb->data) + MYRI_PAD_LEN);
378 skb_pull(skb, dev->hard_header_len);
379 eth = eth_hdr(skb);
380
381#ifdef DEBUG_HEADER
382 DHDR(("myri_type_trans: "));
383 dump_ehdr(eth);
384#endif
385 if (*eth->h_dest & 1) {
386 if (memcmp(eth->h_dest, dev->broadcast, ETH_ALEN)==0)
387 skb->pkt_type = PACKET_BROADCAST;
388 else
389 skb->pkt_type = PACKET_MULTICAST;
390 } else if (dev->flags & (IFF_PROMISC|IFF_ALLMULTI)) {
391 if (memcmp(eth->h_dest, dev->dev_addr, ETH_ALEN))
392 skb->pkt_type = PACKET_OTHERHOST;
393 }
394
395 if (ntohs(eth->h_proto) >= 1536)
396 return eth->h_proto;
397
398 rawp = skb->data;
399
400 /* This is a magic hack to spot IPX packets. Older Novell breaks
401 * the protocol design and runs IPX over 802.3 without an 802.2 LLC
402 * layer. We look for FFFF which isn't a used 802.2 SSAP/DSAP. This
403 * won't work for fault tolerant netware but does for the rest.
404 */
405 if (*(unsigned short *)rawp == 0xFFFF)
406 return htons(ETH_P_802_3);
407
408 /* Real 802.2 LLC */
409 return htons(ETH_P_802_2);
410}
411
412static void myri_rx(struct myri_eth *mp, struct net_device *dev)
413{
414 struct recvq __iomem *rq = mp->rq;
415 struct recvq __iomem *rqa = mp->rqack;
416 int entry = sbus_readl(&rqa->head);
417 int limit = sbus_readl(&rqa->tail);
418 int drops;
419
420 DRX(("entry[%d] limit[%d] ", entry, limit));
421 if (entry == limit)
422 return;
423 drops = 0;
424 DRX(("\n"));
425 while (entry != limit) {
426 struct myri_rxd __iomem *rxdack = &rqa->myri_rxd[entry];
427 u32 csum = sbus_readl(&rxdack->csum);
428 int len = sbus_readl(&rxdack->myri_scatters[0].len);
429 int index = sbus_readl(&rxdack->ctx);
430 struct myri_rxd __iomem *rxd = &rq->myri_rxd[sbus_readl(&rq->tail)];
431 struct sk_buff *skb = mp->rx_skbs[index];
432
433 /* Ack it. */
434 sbus_writel(NEXT_RX(entry), &rqa->head);
435
436 /* Check for errors. */
437 DRX(("rxd[%d]: %p len[%d] csum[%08x] ", entry, rxd, len, csum));
438 sbus_dma_sync_single_for_cpu(mp->myri_sdev,
439 sbus_readl(&rxd->myri_scatters[0].addr),
440 RX_ALLOC_SIZE, SBUS_DMA_FROMDEVICE);
441 if (len < (ETH_HLEN + MYRI_PAD_LEN) || (skb->data[0] != MYRI_PAD_LEN)) {
442 DRX(("ERROR["));
443 mp->enet_stats.rx_errors++;
444 if (len < (ETH_HLEN + MYRI_PAD_LEN)) {
445 DRX(("BAD_LENGTH] "));
446 mp->enet_stats.rx_length_errors++;
447 } else {
448 DRX(("NO_PADDING] "));
449 mp->enet_stats.rx_frame_errors++;
450 }
451
452 /* Return it to the LANAI. */
453 drop_it:
454 drops++;
455 DRX(("DROP "));
456 mp->enet_stats.rx_dropped++;
457 sbus_dma_sync_single_for_device(mp->myri_sdev,
458 sbus_readl(&rxd->myri_scatters[0].addr),
459 RX_ALLOC_SIZE,
460 SBUS_DMA_FROMDEVICE);
461 sbus_writel(RX_ALLOC_SIZE, &rxd->myri_scatters[0].len);
462 sbus_writel(index, &rxd->ctx);
463 sbus_writel(1, &rxd->num_sg);
464 sbus_writel(NEXT_RX(sbus_readl(&rq->tail)), &rq->tail);
465 goto next;
466 }
467
468 DRX(("len[%d] ", len));
469 if (len > RX_COPY_THRESHOLD) {
470 struct sk_buff *new_skb;
471 u32 dma_addr;
472
473 DRX(("BIGBUFF "));
474 new_skb = myri_alloc_skb(RX_ALLOC_SIZE, GFP_ATOMIC);
475 if (new_skb == NULL) {
476 DRX(("skb_alloc(FAILED) "));
477 goto drop_it;
478 }
479 sbus_unmap_single(mp->myri_sdev,
480 sbus_readl(&rxd->myri_scatters[0].addr),
481 RX_ALLOC_SIZE,
482 SBUS_DMA_FROMDEVICE);
483 mp->rx_skbs[index] = new_skb;
484 new_skb->dev = dev;
485 skb_put(new_skb, RX_ALLOC_SIZE);
486 dma_addr = sbus_map_single(mp->myri_sdev,
487 new_skb->data,
488 RX_ALLOC_SIZE,
489 SBUS_DMA_FROMDEVICE);
490 sbus_writel(dma_addr, &rxd->myri_scatters[0].addr);
491 sbus_writel(RX_ALLOC_SIZE, &rxd->myri_scatters[0].len);
492 sbus_writel(index, &rxd->ctx);
493 sbus_writel(1, &rxd->num_sg);
494 sbus_writel(NEXT_RX(sbus_readl(&rq->tail)), &rq->tail);
495
496 /* Trim the original skb for the netif. */
497 DRX(("trim(%d) ", len));
498 skb_trim(skb, len);
499 } else {
500 struct sk_buff *copy_skb = dev_alloc_skb(len);
501
502 DRX(("SMALLBUFF "));
503 if (copy_skb == NULL) {
504 DRX(("dev_alloc_skb(FAILED) "));
505 goto drop_it;
506 }
507 /* DMA sync already done above. */
508 copy_skb->dev = dev;
509 DRX(("resv_and_put "));
510 skb_put(copy_skb, len);
511 memcpy(copy_skb->data, skb->data, len);
512
513 /* Reuse original ring buffer. */
514 DRX(("reuse "));
515 sbus_dma_sync_single_for_device(mp->myri_sdev,
516 sbus_readl(&rxd->myri_scatters[0].addr),
517 RX_ALLOC_SIZE,
518 SBUS_DMA_FROMDEVICE);
519 sbus_writel(RX_ALLOC_SIZE, &rxd->myri_scatters[0].len);
520 sbus_writel(index, &rxd->ctx);
521 sbus_writel(1, &rxd->num_sg);
522 sbus_writel(NEXT_RX(sbus_readl(&rq->tail)), &rq->tail);
523
524 skb = copy_skb;
525 }
526
527 /* Just like the happy meal we get checksums from this card. */
528 skb->csum = csum;
529 skb->ip_summed = CHECKSUM_UNNECESSARY; /* XXX */
530
531 skb->protocol = myri_type_trans(skb, dev);
532 DRX(("prot[%04x] netif_rx ", skb->protocol));
533 netif_rx(skb);
534
535 dev->last_rx = jiffies;
536 mp->enet_stats.rx_packets++;
537 mp->enet_stats.rx_bytes += len;
538 next:
539 DRX(("NEXT\n"));
540 entry = NEXT_RX(entry);
541 }
542}
543
544static irqreturn_t myri_interrupt(int irq, void *dev_id, struct pt_regs *regs)
545{
546 struct net_device *dev = (struct net_device *) dev_id;
547 struct myri_eth *mp = (struct myri_eth *) dev->priv;
548 void __iomem *lregs = mp->lregs;
549 struct myri_channel __iomem *chan = &mp->shmem->channel;
550 unsigned long flags;
551 u32 status;
552 int handled = 0;
553
554 spin_lock_irqsave(&mp->irq_lock, flags);
555
556 status = sbus_readl(lregs + LANAI_ISTAT);
557 DIRQ(("myri_interrupt: status[%08x] ", status));
558 if (status & ISTAT_HOST) {
559 u32 softstate;
560
561 handled = 1;
562 DIRQ(("IRQ_DISAB "));
563 myri_disable_irq(lregs, mp->cregs);
564 softstate = sbus_readl(&chan->state);
565 DIRQ(("state[%08x] ", softstate));
566 if (softstate != STATE_READY) {
567 DIRQ(("myri_not_so_happy "));
568 myri_is_not_so_happy(mp);
569 }
570 DIRQ(("\nmyri_rx: "));
571 myri_rx(mp, dev);
572 DIRQ(("\nistat=ISTAT_HOST "));
573 sbus_writel(ISTAT_HOST, lregs + LANAI_ISTAT);
574 DIRQ(("IRQ_ENAB "));
575 myri_enable_irq(lregs, mp->cregs);
576 }
577 DIRQ(("\n"));
578
579 spin_unlock_irqrestore(&mp->irq_lock, flags);
580
581 return IRQ_RETVAL(handled);
582}
583
584static int myri_open(struct net_device *dev)
585{
586 struct myri_eth *mp = (struct myri_eth *) dev->priv;
587
588 return myri_init(mp, in_interrupt());
589}
590
591static int myri_close(struct net_device *dev)
592{
593 struct myri_eth *mp = (struct myri_eth *) dev->priv;
594
595 myri_clean_rings(mp);
596 return 0;
597}
598
599static void myri_tx_timeout(struct net_device *dev)
600{
601 struct myri_eth *mp = (struct myri_eth *) dev->priv;
602
603 printk(KERN_ERR "%s: transmit timed out, resetting\n", dev->name);
604
605 mp->enet_stats.tx_errors++;
606 myri_init(mp, 0);
607 netif_wake_queue(dev);
608}
609
610static int myri_start_xmit(struct sk_buff *skb, struct net_device *dev)
611{
612 struct myri_eth *mp = (struct myri_eth *) dev->priv;
613 struct sendq __iomem *sq = mp->sq;
614 struct myri_txd __iomem *txd;
615 unsigned long flags;
616 unsigned int head, tail;
617 int len, entry;
618 u32 dma_addr;
619
620 DTX(("myri_start_xmit: "));
621
622 myri_tx(mp, dev);
623
624 netif_stop_queue(dev);
625
626 /* This is just to prevent multiple PIO reads for TX_BUFFS_AVAIL. */
627 head = sbus_readl(&sq->head);
628 tail = sbus_readl(&sq->tail);
629
630 if (!TX_BUFFS_AVAIL(head, tail)) {
631 DTX(("no buffs available, returning 1\n"));
632 return 1;
633 }
634
635 spin_lock_irqsave(&mp->irq_lock, flags);
636
637 DHDR(("xmit[skbdata(%p)]\n", skb->data));
638#ifdef DEBUG_HEADER
639 dump_ehdr_and_myripad(((unsigned char *) skb->data));
640#endif
641
642 /* XXX Maybe this can go as well. */
643 len = skb->len;
644 if (len & 3) {
645 DTX(("len&3 "));
646 len = (len + 4) & (~3);
647 }
648
649 entry = sbus_readl(&sq->tail);
650
651 txd = &sq->myri_txd[entry];
652 mp->tx_skbs[entry] = skb;
653
654 /* Must do this before we sbus map it. */
655 if (skb->data[MYRI_PAD_LEN] & 0x1) {
656 sbus_writew(0xffff, &txd->addr[0]);
657 sbus_writew(0xffff, &txd->addr[1]);
658 sbus_writew(0xffff, &txd->addr[2]);
659 sbus_writew(0xffff, &txd->addr[3]);
660 } else {
661 sbus_writew(0xffff, &txd->addr[0]);
662 sbus_writew((skb->data[0] << 8) | skb->data[1], &txd->addr[1]);
663 sbus_writew((skb->data[2] << 8) | skb->data[3], &txd->addr[2]);
664 sbus_writew((skb->data[4] << 8) | skb->data[5], &txd->addr[3]);
665 }
666
667 dma_addr = sbus_map_single(mp->myri_sdev, skb->data, len, SBUS_DMA_TODEVICE);
668 sbus_writel(dma_addr, &txd->myri_gathers[0].addr);
669 sbus_writel(len, &txd->myri_gathers[0].len);
670 sbus_writel(1, &txd->num_sg);
671 sbus_writel(KERNEL_CHANNEL, &txd->chan);
672 sbus_writel(len, &txd->len);
673 sbus_writel((u32)-1, &txd->csum_off);
674 sbus_writel(0, &txd->csum_field);
675
676 sbus_writel(NEXT_TX(entry), &sq->tail);
677 DTX(("BangTheChip "));
678 bang_the_chip(mp);
679
680 DTX(("tbusy=0, returning 0\n"));
681 netif_start_queue(dev);
682 spin_unlock_irqrestore(&mp->irq_lock, flags);
683 return 0;
684}
685
686/* Create the MyriNet MAC header for an arbitrary protocol layer
687 *
688 * saddr=NULL means use device source address
689 * daddr=NULL means leave destination address (eg unresolved arp)
690 */
691static int myri_header(struct sk_buff *skb, struct net_device *dev, unsigned short type,
692 void *daddr, void *saddr, unsigned len)
693{
694 struct ethhdr *eth = (struct ethhdr *) skb_push(skb, ETH_HLEN);
695 unsigned char *pad = (unsigned char *) skb_push(skb, MYRI_PAD_LEN);
696
697#ifdef DEBUG_HEADER
698 DHDR(("myri_header: pad[%02x,%02x] ", pad[0], pad[1]));
699 dump_ehdr(eth);
700#endif
701
702 /* Set the MyriNET padding identifier. */
703 pad[0] = MYRI_PAD_LEN;
704 pad[1] = 0xab;
705
706 /* Set the protocol type. For a packet of type ETH_P_802_3 we put the length
707 * in here instead. It is up to the 802.2 layer to carry protocol information.
708 */
709 if (type != ETH_P_802_3)
710 eth->h_proto = htons(type);
711 else
712 eth->h_proto = htons(len);
713
714 /* Set the source hardware address. */
715 if (saddr)
716 memcpy(eth->h_source, saddr, dev->addr_len);
717 else
718 memcpy(eth->h_source, dev->dev_addr, dev->addr_len);
719
720 /* Anyway, the loopback-device should never use this function... */
721 if (dev->flags & IFF_LOOPBACK) {
722 int i;
723 for (i = 0; i < dev->addr_len; i++)
724 eth->h_dest[i] = 0;
725 return(dev->hard_header_len);
726 }
727
728 if (daddr) {
729 memcpy(eth->h_dest, daddr, dev->addr_len);
730 return dev->hard_header_len;
731 }
732 return -dev->hard_header_len;
733}
734
735/* Rebuild the MyriNet MAC header. This is called after an ARP
736 * (or in future other address resolution) has completed on this
737 * sk_buff. We now let ARP fill in the other fields.
738 */
739static int myri_rebuild_header(struct sk_buff *skb)
740{
741 unsigned char *pad = (unsigned char *) skb->data;
742 struct ethhdr *eth = (struct ethhdr *) (pad + MYRI_PAD_LEN);
743 struct net_device *dev = skb->dev;
744
745#ifdef DEBUG_HEADER
746 DHDR(("myri_rebuild_header: pad[%02x,%02x] ", pad[0], pad[1]));
747 dump_ehdr(eth);
748#endif
749
750 /* Refill MyriNet padding identifiers, this is just being anal. */
751 pad[0] = MYRI_PAD_LEN;
752 pad[1] = 0xab;
753
754 switch (eth->h_proto)
755 {
756#ifdef CONFIG_INET
757 case __constant_htons(ETH_P_IP):
758 return arp_find(eth->h_dest, skb);
759#endif
760
761 default:
762 printk(KERN_DEBUG
763 "%s: unable to resolve type %X addresses.\n",
764 dev->name, (int)eth->h_proto);
765
766 memcpy(eth->h_source, dev->dev_addr, dev->addr_len);
767 return 0;
768 break;
769 }
770
771 return 0;
772}
773
774int myri_header_cache(struct neighbour *neigh, struct hh_cache *hh)
775{
776 unsigned short type = hh->hh_type;
777 unsigned char *pad;
778 struct ethhdr *eth;
779 struct net_device *dev = neigh->dev;
780
781 pad = ((unsigned char *) hh->hh_data) +
782 HH_DATA_OFF(sizeof(*eth) + MYRI_PAD_LEN);
783 eth = (struct ethhdr *) (pad + MYRI_PAD_LEN);
784
785 if (type == __constant_htons(ETH_P_802_3))
786 return -1;
787
788 /* Refill MyriNet padding identifiers, this is just being anal. */
789 pad[0] = MYRI_PAD_LEN;
790 pad[1] = 0xab;
791
792 eth->h_proto = type;
793 memcpy(eth->h_source, dev->dev_addr, dev->addr_len);
794 memcpy(eth->h_dest, neigh->ha, dev->addr_len);
795 hh->hh_len = 16;
796 return 0;
797}
798
799
800/* Called by Address Resolution module to notify changes in address. */
801void myri_header_cache_update(struct hh_cache *hh, struct net_device *dev, unsigned char * haddr)
802{
803 memcpy(((u8*)hh->hh_data) + HH_DATA_OFF(sizeof(struct ethhdr)),
804 haddr, dev->addr_len);
805}
806
807static int myri_change_mtu(struct net_device *dev, int new_mtu)
808{
809 if ((new_mtu < (ETH_HLEN + MYRI_PAD_LEN)) || (new_mtu > MYRINET_MTU))
810 return -EINVAL;
811 dev->mtu = new_mtu;
812 return 0;
813}
814
815static struct net_device_stats *myri_get_stats(struct net_device *dev)
816{ return &(((struct myri_eth *)dev->priv)->enet_stats); }
817
818static void myri_set_multicast(struct net_device *dev)
819{
820 /* Do nothing, all MyriCOM nodes transmit multicast frames
821 * as broadcast packets...
822 */
823}
824
825static inline void set_boardid_from_idprom(struct myri_eth *mp, int num)
826{
827 mp->eeprom.id[0] = 0;
828 mp->eeprom.id[1] = idprom->id_machtype;
829 mp->eeprom.id[2] = (idprom->id_sernum >> 16) & 0xff;
830 mp->eeprom.id[3] = (idprom->id_sernum >> 8) & 0xff;
831 mp->eeprom.id[4] = (idprom->id_sernum >> 0) & 0xff;
832 mp->eeprom.id[5] = num;
833}
834
835static inline void determine_reg_space_size(struct myri_eth *mp)
836{
837 switch(mp->eeprom.cpuvers) {
838 case CPUVERS_2_3:
839 case CPUVERS_3_0:
840 case CPUVERS_3_1:
841 case CPUVERS_3_2:
842 mp->reg_size = (3 * 128 * 1024) + 4096;
843 break;
844
845 case CPUVERS_4_0:
846 case CPUVERS_4_1:
847 mp->reg_size = ((4096<<1) + mp->eeprom.ramsz);
848 break;
849
850 case CPUVERS_4_2:
851 case CPUVERS_5_0:
852 default:
853 printk("myricom: AIEEE weird cpu version %04x assuming pre4.0\n",
854 mp->eeprom.cpuvers);
855 mp->reg_size = (3 * 128 * 1024) + 4096;
856 };
857}
858
859#ifdef DEBUG_DETECT
860static void dump_eeprom(struct myri_eth *mp)
861{
862 printk("EEPROM: clockval[%08x] cpuvers[%04x] "
863 "id[%02x,%02x,%02x,%02x,%02x,%02x]\n",
864 mp->eeprom.cval, mp->eeprom.cpuvers,
865 mp->eeprom.id[0], mp->eeprom.id[1], mp->eeprom.id[2],
866 mp->eeprom.id[3], mp->eeprom.id[4], mp->eeprom.id[5]);
867 printk("EEPROM: ramsz[%08x]\n", mp->eeprom.ramsz);
868 printk("EEPROM: fvers[%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x\n",
869 mp->eeprom.fvers[0], mp->eeprom.fvers[1], mp->eeprom.fvers[2],
870 mp->eeprom.fvers[3], mp->eeprom.fvers[4], mp->eeprom.fvers[5],
871 mp->eeprom.fvers[6], mp->eeprom.fvers[7]);
872 printk("EEPROM: %02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x\n",
873 mp->eeprom.fvers[8], mp->eeprom.fvers[9], mp->eeprom.fvers[10],
874 mp->eeprom.fvers[11], mp->eeprom.fvers[12], mp->eeprom.fvers[13],
875 mp->eeprom.fvers[14], mp->eeprom.fvers[15]);
876 printk("EEPROM: %02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x\n",
877 mp->eeprom.fvers[16], mp->eeprom.fvers[17], mp->eeprom.fvers[18],
878 mp->eeprom.fvers[19], mp->eeprom.fvers[20], mp->eeprom.fvers[21],
879 mp->eeprom.fvers[22], mp->eeprom.fvers[23]);
880 printk("EEPROM: %02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x]\n",
881 mp->eeprom.fvers[24], mp->eeprom.fvers[25], mp->eeprom.fvers[26],
882 mp->eeprom.fvers[27], mp->eeprom.fvers[28], mp->eeprom.fvers[29],
883 mp->eeprom.fvers[30], mp->eeprom.fvers[31]);
884 printk("EEPROM: mvers[%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x\n",
885 mp->eeprom.mvers[0], mp->eeprom.mvers[1], mp->eeprom.mvers[2],
886 mp->eeprom.mvers[3], mp->eeprom.mvers[4], mp->eeprom.mvers[5],
887 mp->eeprom.mvers[6], mp->eeprom.mvers[7]);
888 printk("EEPROM: %02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x]\n",
889 mp->eeprom.mvers[8], mp->eeprom.mvers[9], mp->eeprom.mvers[10],
890 mp->eeprom.mvers[11], mp->eeprom.mvers[12], mp->eeprom.mvers[13],
891 mp->eeprom.mvers[14], mp->eeprom.mvers[15]);
892 printk("EEPROM: dlval[%04x] brd_type[%04x] bus_type[%04x] prod_code[%04x]\n",
893 mp->eeprom.dlval, mp->eeprom.brd_type, mp->eeprom.bus_type,
894 mp->eeprom.prod_code);
895 printk("EEPROM: serial_num[%08x]\n", mp->eeprom.serial_num);
896}
897#endif
898
899static int __init myri_ether_init(struct sbus_dev *sdev, int num)
900{
901 static unsigned version_printed;
902 struct net_device *dev;
903 struct myri_eth *mp;
904 unsigned char prop_buf[32];
905 int i;
906
907 DET(("myri_ether_init(%p,%d):\n", sdev, num));
908 dev = alloc_etherdev(sizeof(struct myri_eth));
909
910 if (!dev)
911 return -ENOMEM;
912
913 if (version_printed++ == 0)
914 printk(version);
915
916 mp = (struct myri_eth *) dev->priv;
917 spin_lock_init(&mp->irq_lock);
918 mp->myri_sdev = sdev;
919
920 /* Clean out skb arrays. */
921 for (i = 0; i < (RX_RING_SIZE + 1); i++)
922 mp->rx_skbs[i] = NULL;
923
924 for (i = 0; i < TX_RING_SIZE; i++)
925 mp->tx_skbs[i] = NULL;
926
927 /* First check for EEPROM information. */
928 i = prom_getproperty(sdev->prom_node, "myrinet-eeprom-info",
929 (char *)&mp->eeprom, sizeof(struct myri_eeprom));
930 DET(("prom_getprop(myrinet-eeprom-info) returns %d\n", i));
931 if (i == 0 || i == -1) {
932 /* No eeprom property, must cook up the values ourselves. */
933 DET(("No EEPROM: "));
934 mp->eeprom.bus_type = BUS_TYPE_SBUS;
935 mp->eeprom.cpuvers = prom_getintdefault(sdev->prom_node,"cpu_version",0);
936 mp->eeprom.cval = prom_getintdefault(sdev->prom_node,"clock_value",0);
937 mp->eeprom.ramsz = prom_getintdefault(sdev->prom_node,"sram_size",0);
938 DET(("cpuvers[%d] cval[%d] ramsz[%d]\n", mp->eeprom.cpuvers,
939 mp->eeprom.cval, mp->eeprom.ramsz));
940 if (mp->eeprom.cpuvers == 0) {
941 DET(("EEPROM: cpuvers was zero, setting to %04x\n",CPUVERS_2_3));
942 mp->eeprom.cpuvers = CPUVERS_2_3;
943 }
944 if (mp->eeprom.cpuvers < CPUVERS_3_0) {
945 DET(("EEPROM: cpuvers < CPUVERS_3_0, clockval set to zero.\n"));
946 mp->eeprom.cval = 0;
947 }
948 if (mp->eeprom.ramsz == 0) {
949 DET(("EEPROM: ramsz == 0, setting to 128k\n"));
950 mp->eeprom.ramsz = (128 * 1024);
951 }
952 i = prom_getproperty(sdev->prom_node, "myrinet-board-id",
953 &prop_buf[0], 10);
954 DET(("EEPROM: prom_getprop(myrinet-board-id) returns %d\n", i));
955 if ((i != 0) && (i != -1))
956 memcpy(&mp->eeprom.id[0], &prop_buf[0], 6);
957 else
958 set_boardid_from_idprom(mp, num);
959 i = prom_getproperty(sdev->prom_node, "fpga_version",
960 &mp->eeprom.fvers[0], 32);
961 DET(("EEPROM: prom_getprop(fpga_version) returns %d\n", i));
962 if (i == 0 || i == -1)
963 memset(&mp->eeprom.fvers[0], 0, 32);
964
965 if (mp->eeprom.cpuvers == CPUVERS_4_1) {
966 DET(("EEPROM: cpuvers CPUVERS_4_1, "));
967 if (mp->eeprom.ramsz == (128 * 1024)) {
968 DET(("ramsize 128k, setting to 256k, "));
969 mp->eeprom.ramsz = (256 * 1024);
970 }
971 if ((mp->eeprom.cval==0x40414041)||(mp->eeprom.cval==0x90449044)){
972 DET(("changing cval from %08x to %08x ",
973 mp->eeprom.cval, 0x50e450e4));
974 mp->eeprom.cval = 0x50e450e4;
975 }
976 DET(("\n"));
977 }
978 }
979#ifdef DEBUG_DETECT
980 dump_eeprom(mp);
981#endif
982
983 for (i = 0; i < 6; i++)
984 dev->dev_addr[i] = mp->eeprom.id[i];
985
986 determine_reg_space_size(mp);
987
988 /* Map in the MyriCOM register/localram set. */
989 if (mp->eeprom.cpuvers < CPUVERS_4_0) {
990 /* XXX Makes no sense, if control reg is non-existant this
991 * XXX driver cannot function at all... maybe pre-4.0 is
992 * XXX only a valid version for PCI cards? Ask feldy...
993 */
994 DET(("Mapping regs for cpuvers < CPUVERS_4_0\n"));
995 mp->regs = sbus_ioremap(&sdev->resource[0], 0,
996 mp->reg_size, "MyriCOM Regs");
997 if (!mp->regs) {
998 printk("MyriCOM: Cannot map MyriCOM registers.\n");
999 goto err;
1000 }
1001 mp->lanai = mp->regs + (256 * 1024);
1002 mp->lregs = mp->lanai + (0x10000 * 2);
1003 } else {
1004 DET(("Mapping regs for cpuvers >= CPUVERS_4_0\n"));
1005 mp->cregs = sbus_ioremap(&sdev->resource[0], 0,
1006 PAGE_SIZE, "MyriCOM Control Regs");
1007 mp->lregs = sbus_ioremap(&sdev->resource[0], (256 * 1024),
1008 PAGE_SIZE, "MyriCOM LANAI Regs");
1009 mp->lanai =
1010 sbus_ioremap(&sdev->resource[0], (512 * 1024),
1011 mp->eeprom.ramsz, "MyriCOM SRAM");
1012 }
1013 DET(("Registers mapped: cregs[%p] lregs[%p] lanai[%p]\n",
1014 mp->cregs, mp->lregs, mp->lanai));
1015
1016 if (mp->eeprom.cpuvers >= CPUVERS_4_0)
1017 mp->shmem_base = 0xf000;
1018 else
1019 mp->shmem_base = 0x8000;
1020
1021 DET(("Shared memory base is %04x, ", mp->shmem_base));
1022
1023 mp->shmem = (struct myri_shmem __iomem *)
1024 (mp->lanai + (mp->shmem_base * 2));
1025 DET(("shmem mapped at %p\n", mp->shmem));
1026
1027 mp->rqack = &mp->shmem->channel.recvqa;
1028 mp->rq = &mp->shmem->channel.recvq;
1029 mp->sq = &mp->shmem->channel.sendq;
1030
1031 /* Reset the board. */
1032 DET(("Resetting LANAI\n"));
1033 myri_reset_off(mp->lregs, mp->cregs);
1034 myri_reset_on(mp->cregs);
1035
1036 /* Turn IRQ's off. */
1037 myri_disable_irq(mp->lregs, mp->cregs);
1038
1039 /* Reset once more. */
1040 myri_reset_on(mp->cregs);
1041
1042 /* Get the supported DVMA burst sizes from our SBUS. */
1043 mp->myri_bursts = prom_getintdefault(mp->myri_sdev->bus->prom_node,
1044 "burst-sizes", 0x00);
1045
1046 if (!sbus_can_burst64(sdev))
1047 mp->myri_bursts &= ~(DMA_BURST64);
1048
1049 DET(("MYRI bursts %02x\n", mp->myri_bursts));
1050
1051 /* Encode SBUS interrupt level in second control register. */
1052 i = prom_getint(sdev->prom_node, "interrupts");
1053 if (i == 0)
1054 i = 4;
1055 DET(("prom_getint(interrupts)==%d, irqlvl set to %04x\n",
1056 i, (1 << i)));
1057
1058 sbus_writel((1 << i), mp->cregs + MYRICTRL_IRQLVL);
1059
1060 mp->dev = dev;
1061 dev->open = &myri_open;
1062 dev->stop = &myri_close;
1063 dev->hard_start_xmit = &myri_start_xmit;
1064 dev->tx_timeout = &myri_tx_timeout;
1065 dev->watchdog_timeo = 5*HZ;
1066 dev->get_stats = &myri_get_stats;
1067 dev->set_multicast_list = &myri_set_multicast;
1068 dev->irq = sdev->irqs[0];
1069
1070 /* Register interrupt handler now. */
1071 DET(("Requesting MYRIcom IRQ line.\n"));
1072 if (request_irq(dev->irq, &myri_interrupt,
1073 SA_SHIRQ, "MyriCOM Ethernet", (void *) dev)) {
1074 printk("MyriCOM: Cannot register interrupt handler.\n");
1075 goto err;
1076 }
1077
1078 dev->mtu = MYRINET_MTU;
1079 dev->change_mtu = myri_change_mtu;
1080 dev->hard_header = myri_header;
1081 dev->rebuild_header = myri_rebuild_header;
1082 dev->hard_header_len = (ETH_HLEN + MYRI_PAD_LEN);
1083 dev->hard_header_cache = myri_header_cache;
1084 dev->header_cache_update= myri_header_cache_update;
1085
1086 /* Load code onto the LANai. */
1087 DET(("Loading LANAI firmware\n"));
1088 myri_load_lanai(mp);
1089
1090 if (register_netdev(dev)) {
1091 printk("MyriCOM: Cannot register device.\n");
1092 goto err_free_irq;
1093 }
1094
1095#ifdef MODULE
1096 mp->next_module = root_myri_dev;
1097 root_myri_dev = mp;
1098#endif
1099
1100 printk("%s: MyriCOM MyriNET Ethernet ", dev->name);
1101
1102 for (i = 0; i < 6; i++)
1103 printk("%2.2x%c", dev->dev_addr[i],
1104 i == 5 ? ' ' : ':');
1105 printk("\n");
1106
1107 return 0;
1108
1109err_free_irq:
1110 free_irq(dev->irq, dev);
1111err:
1112 /* This will also free the co-allocated 'dev->priv' */
1113 free_netdev(dev);
1114 return -ENODEV;
1115}
1116
1117static int __init myri_sbus_match(struct sbus_dev *sdev)
1118{
1119 char *name = sdev->prom_name;
1120
1121 if (!strcmp(name, "MYRICOM,mlanai") ||
1122 !strcmp(name, "myri"))
1123 return 1;
1124
1125 return 0;
1126}
1127
1128static int __init myri_sbus_probe(void)
1129{
1130 struct sbus_bus *bus;
1131 struct sbus_dev *sdev = NULL;
1132 static int called;
1133 int cards = 0, v;
1134
1135#ifdef MODULE
1136 root_myri_dev = NULL;
1137#endif
1138
1139 if (called)
1140 return -ENODEV;
1141 called++;
1142
1143 for_each_sbus(bus) {
1144 for_each_sbusdev(sdev, bus) {
1145 if (myri_sbus_match(sdev)) {
1146 cards++;
1147 DET(("Found myricom myrinet as %s\n", sdev->prom_name));
1148 if ((v = myri_ether_init(sdev, (cards - 1))))
1149 return v;
1150 }
1151 }
1152 }
1153 if (!cards)
1154 return -ENODEV;
1155 return 0;
1156}
1157
1158static void __exit myri_sbus_cleanup(void)
1159{
1160#ifdef MODULE
1161 while (root_myri_dev) {
1162 struct myri_eth *next = root_myri_dev->next_module;
1163
1164 unregister_netdev(root_myri_dev->dev);
1165 /* this will also free the co-allocated 'root_myri_dev' */
1166 free_netdev(root_myri_dev->dev);
1167 root_myri_dev = next;
1168 }
1169#endif /* MODULE */
1170}
1171
1172module_init(myri_sbus_probe);
1173module_exit(myri_sbus_cleanup);
1174MODULE_LICENSE("GPL");
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