-
- * opcode/m88k.h: Rename psr macros to avoid conflicts.
-
* libiberty.h (fopen_unlocked, fdopen_unlocked, freopen_unlocked):
* bfdlink.h (bfd_link_info): Add gc_sections.
-
- * opcode/arm.h: Adjust comments for ARM_EXT_V4T and ARM_EXT_V5T.
- Add ARM_EXT_V6T2, ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2,
- and ARM_ARCH_V6ZKT2.
-
* libiberty.h (gettimeofday): Declare.
* fibheap.h (struct fibnode): Only use unsigned long bitfields
when __GNUC__ is defined and ints are less than 32-bits wide.
-
- * opcode/crx.h (enum operand_type): Rename rbase_cst4 to rbase_dispu4.
- Remove redundant instruction types.
- (struct argument): X_op - new field.
- (struct cst4_entry): Remove.
- (no_op_insn): Declare.
-
* bfdlink.h (bfd_link_info): Add default_imported_symver.
* dis-asm.h: Add prototype for print_insn_maxq_little.
-
- * opcode/crx.h (enum argtype): Rename types, remove unused types.
-
-
- * elf/arm.h: Add R_ARM_CALL and R_ARM_JUMP32.
-
-
- * opcode/crx.h (enum reg): Rearrange registers, remove 'ccfg' and `'pc'.
- (enum reg_type): Remove CRX_PC_REGTYPE, CRX_MTPR_REGTYPE.
- (enum operand_type): Rearrange operands, edit comments.
- replace us<N> with ui<N> for unsigned immediate.
- replace d<N> with disps<N>/dispu<N>/dispe<N> for signed/unsigned/escaped
- displacements (respectively).
- replace rbase_ridx_scl2_dispu<N> with rindex_disps<N> for register index.
- (instruction type): Add NO_TYPE_INS.
- (instruction flags): Add USER_REG, CST4MAP, NO_SP, NO_RPTR.
- (operand_entry): New field - 'flags'.
- (operand flags): New.
-
* bfdlink.h (struct bfd_link_info): Add create_default_symver.
-
- * opcode/crx.h (operand_type): Remove redundant types i3, i4,
- i5, i8, i12.
- Add new unsigned immediate types us3, us4, us5, us16.
-
PR 463
* bfdlink.h (bfd_link_callbacks): Add a pointer to struct
bfd_link_hash_entry to reloc_overflow.
-
- * elf/arm.h (EF_ARM_EABI_VER4): Define.
-
-
- * elf/common.h (PT_SUNW_EH_FRAME): Define.
- * elf/x86-64.h (SHT_X86_64_UNWIND): Define.
-
* xtensa-config.h (XSHAL_USE_ABSOLUTE_LITERALS,
xtensa_interface_num_bits, xtensa_interface_inout,
xtensa_interface_has_side_effect, xtensa_funcUnit_lookup,
xtensa_funcUnit_name, xtensa_funcUnit_num_copies): New prototypes.
- * elf/xtensa.h (R_XTENSA_DIFF8, R_XTENSA_DIFF16, R_XTENSA_DIFF32,
- R_XTENSA_SLOT*_OP, R_XTENSA_SLOT*_ALT): New relocations.
- (XTENSA_PROP_SEC_NAME): Define.
- (property_table_entry): Add flags field.
- (XTENSA_PROP_*, GET_XTENSA_PROP_*, SET_XTENSA_PROP_*): Define.
-
* bfdlink.h (bfd_link_info): Add bitfield: warn_shared_textrel.
-
- * elf/arm.h: Remove R_ARM_STKCHK and R_ARM_THM_STKCHK.
- Add R_ARM_TARGET2, R_ARM_PREL31, R_ARM_GOT_ABS, R_ARM_GOT_PREL,
- R_ARM_GOT_BREL12, R_ARM_GOTOFF12 and R_ARM_GOTRELAX.
-
* bfdlink.h (struct bfd_link_hash_entry): Move und_next into elements
* libiberty.h (basename): Prototype for __MINGW32__.
-
- * elf/arm.h: Rename RELABS to TARGET1.
-
* ansidecl.h (ATTRIBUTE_SENTINEL): Define.
* bfdlink.h (struct bfd_link_info): Add relro, relro_start and
relro_end fields.
- * elf/common.h (PT_GNU_EH_FRAME, PT_GNU_STACK): Add comments.
- (PT_GNU_RELRO): Define.
+
+ * arm.h: Add R_ARM_CALL and R_ARM_JUMP32.
+
+ * arm.h (EF_ARM_EABI_VER4): Define.
+
+
+ * common.h (PT_SUNW_EH_FRAME): Define.
+ * x86-64.h (SHT_X86_64_UNWIND): Define.
+
+ * xtensa.h (R_XTENSA_DIFF8, R_XTENSA_DIFF16, R_XTENSA_DIFF32,
+ R_XTENSA_SLOT*_OP, R_XTENSA_SLOT*_ALT): New relocations.
+ (XTENSA_PROP_SEC_NAME): Define.
+ (property_table_entry): Add flags field.
+ (XTENSA_PROP_*, GET_XTENSA_PROP_*, SET_XTENSA_PROP_*): Define.
+
+ * arm.h: Remove R_ARM_STKCHK and R_ARM_THM_STKCHK.
+ Add R_ARM_TARGET2, R_ARM_PREL31, R_ARM_GOT_ABS, R_ARM_GOT_PREL,
+ R_ARM_GOT_BREL12, R_ARM_GOTOFF12 and R_ARM_GOTRELAX.
+
+ * arm.h: Rename RELABS to TARGET1.
+
+ * common.h (PT_GNU_EH_FRAME, PT_GNU_STACK): Add comments.
+ (PT_GNU_RELRO): Define.
+
* mips.h: Define MIPS TLS relocations.
* mips.h (R_MIPS16_GOT16): New reloc code.
(R_MIPS16_CALL16): Likewise.
- * include/elf/avr.h (R_AVR_LDI, R_AVR_6, R_AVR_6_ADIW): New
- relocs.
+ * avr.h (R_AVR_LDI, R_AVR_6, R_AVR_6_ADIW): New relocs.
(R_MIPS_GNU_REL16_S2): Update comment.
* common.h (EM_CR): Define.
* cr16c.h: New file.
+
+ * m88k.h: Rename psr macros to avoid conflicts.
+
+ * arm.h: Adjust comments for ARM_EXT_V4T and ARM_EXT_V5T.
+ Add ARM_EXT_V6T2, ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2,
+ and ARM_ARCH_V6ZKT2.
+
+ * crx.h (enum operand_type): Rename rbase_cst4 to rbase_dispu4.
+ Remove redundant instruction types.
+ (struct argument): X_op - new field.
+ (struct cst4_entry): Remove.
+ (no_op_insn): Declare.
+
+ * crx.h (enum argtype): Rename types, remove unused types.
+
+ * crx.h (enum reg): Rearrange registers, remove 'ccfg' and `'pc'.
+ (enum reg_type): Remove CRX_PC_REGTYPE, CRX_MTPR_REGTYPE.
+ (enum operand_type): Rearrange operands, edit comments.
+ replace us<N> with ui<N> for unsigned immediate.
+ replace d<N> with disps<N>/dispu<N>/dispe<N> for signed/unsigned/escaped
+ displacements (respectively).
+ replace rbase_ridx_scl2_dispu<N> with rindex_disps<N> for register index.
+ (instruction type): Add NO_TYPE_INS.
+ (instruction flags): Add USER_REG, CST4MAP, NO_SP, NO_RPTR.
+ (operand_entry): New field - 'flags'.
+ (operand flags): New.
+
+ * crx.h (operand_type): Remove redundant types i3, i4,
+ i5, i8, i12.
+ Add new unsigned immediate types us3, us4, us5, us16.
+
* i386.h (i386_optab): Mark VIA PadLock instructions as ImmExt and