* dis-asm.h (print_s390_disassembler_options):
Prototype added.
-
- * opcode/avr.h (AVR_ISA_TINY3): Define new opcode set for attiny167.
-
* sha1.h: New file, from gnulib.
DEMANGLE_COMPONENT_CHARACTER as new enum values.
(demangle_component): Add struct s_character to union u.
-
- * opcode/avr.h (AVR_ISA_RF401): Add new opcode set for at86rf401.
-
-
- * opcode/avr.h (AVR_ISA_USB162): Add new opcode set.
- (AVR_ISA_AVR3): Likewise.
-
-
- * elf/mips.h (Tag_GNU_MIPS_ABI_FP): Mention -mips32r2 -mfp64 variant
- in comment.
-
* floatformat.h (struct floatformat): Add split_half field.
(floatformat_ibm_long_double): New.
-
- * coff/pe.h (COFF_ENCODE_ALIGNMENT) Define.
-
* libiberty.h (pex_free): Document process killing.
* dis-asm.h (print_insn_spu): Declare.
-
- * elf/arm.h: Define TAG_CPU_ARCH_* constants.
-
* dis-asm.h: Add prototypes for Score disassembler routines.
* bfdlink.h (bfd_link_info): Replace need_relax_finalize with
relax_pass.
-
- * elf/bfin.h (R_BFIN_GOT17M4, R_BFIN_GOTHI, R_BFIN_GOTLO,
- R_BFIN_FUNCDESC, R_BFIN_FUNCDESC_GOT17M4, R_BFIN_FUNCDESC_GOTHI,
- R_BFIN_FUNCDESC_GOTLO, R_BFIN_FUNCDESC_VALUE,
- R_BFIN_FUNCDESC_GOTOFF17M4, R_BFIN_FUNCDESC_GOTOFFHI,
- R_BFIN_FUNCDESC_GOTOFFLO, R_BFIN_GOTOFF17M4, R_BFIN_GOTOFFHI,
- R_BFIN_GOTOFFLO): New relocs.
- (EF_BFIN_PIC, EF_BFIN_FDPIC, EF_BFIN_PIC_FLAGS): New macros.
-
-
- * elf/x86-64.h: Add the new relocations with their official
- numbers.
-
* dis-asm.h (print_insn_xc16c): New prototype.
-
- * elf/ia64.h (SHF_IA_64_HP_TLS): New.
-
* md5.h: Include ansidecl.h
Second part of ms1 to mt renaming.
* dis-asm.h (print_insn_mt): Renamed.
-
- * elf/mt.h: Renamed from ms1.h
-
PR java/9861
* demangle.h : Add DMGL_RET_POSTFIX define to enable alternative
output format for return types
-
- Add ms2.
- * elf/ms1.h (EF_MS1_CPU_MS2): New.
-
-
- * elf/hppa.h (R_PARISC_DIR64WR, R_PARISC_DIR64DR): Remove relocs.
-
* bfdlink.h (struct bfd_link_order): Tweak comment.
* dis-asm.h (print_insn_bfin): Declare.
- * opcode/bfin.h: New file.
* bfdlink.h: Remove mention of a29k.
* dis-asm.h: Remove a29k support.
- * aout/encap.h: Likewise.
* internal.h (ELF_IS_SECTION_IN_SEGMENT): Adjust to cope with
segments at the end of memory.
+
+ * mips.h (Tag_GNU_MIPS_ABI_FP): Mention -mips32r2 -mfp64 variant
+ in comment.
+
* dwarf2.h: Mention the location of the DWARF3 spec on the web.
(EF_SCORE_FIXDEP): Redefine EF_SCORE_FIXDEP as 0x40000000.
(EF_SCORE_HASENTRY): Delete.
+
+ * arm.h: Define TAG_CPU_ARCH_* constants.
+
* score.h: New file.
* avr.h: Add E_AVR_MACH_AVR6, R_AVR_LO8_LDI_GS and R_AVR_HI8_LDI_GS.
+
+ * bfin.h (R_BFIN_GOT17M4, R_BFIN_GOTHI, R_BFIN_GOTLO,
+ R_BFIN_FUNCDESC, R_BFIN_FUNCDESC_GOT17M4, R_BFIN_FUNCDESC_GOTHI,
+ R_BFIN_FUNCDESC_GOTLO, R_BFIN_FUNCDESC_VALUE,
+ R_BFIN_FUNCDESC_GOTOFF17M4, R_BFIN_FUNCDESC_GOTOFFHI,
+ R_BFIN_FUNCDESC_GOTOFFLO, R_BFIN_GOTOFF17M4, R_BFIN_GOTOFFHI,
+ R_BFIN_GOTOFFLO): New relocs.
+ (EF_BFIN_PIC, EF_BFIN_FDPIC, EF_BFIN_PIC_FLAGS): New macros.
+
+
+ * x86-64.h: Add the new relocations with their official
+ numbers.
+
(DW_LANG_PLI, DW_LANG_ObjC, DW_LANG_ObjC_plus_plus, DW_LANG_UPC,
DW_LANG_D): New.
+
+ * ia64.h (SHF_IA_64_HP_TLS): New.
+
* m32c.h: Add relax relocs.
* common.h (EM_MT): Renamed.
* mt.h: Rename relocs, cpu & other defines.
+
+ * mt.h: Renamed from ms1.h
+
* arm.h (elf32_arm_get_eabi_attr_int): Add prototype.
* mips.h (STO_OPTIONAL): Define.
(ELF_MIPS_IS_OPTIONAL): Define.
+
+ Add ms2.
+ * ms1.h (EF_MS1_CPU_MS2): New.
+
+
+ * hppa.h (R_PARISC_DIR64WR, R_PARISC_DIR64DR): Remove relocs.
+
* bfin.h: New file.
* common.h (EM_M32C): New machine number.
* m32c.h: New file.
+
+ * external.h (GRP_ENTRY_SIZE): Define.
+
* x86-64.h (elf_x86_64_reloc_type): Adjust comment for
* i386.h (MAX_OPERANDS): Set to 5.
(MAX_MNEM_SIZE): Changed to 20.
+
+ * avr.h (AVR_ISA_TINY3): Define new opcode set for attiny167.
+
* arm.h (FPU_VFP_EXT_D32, FPU_VFP_V3D16, FPU_ARCH_VFP_V3D16): Define.
(CPU_OCTEON): New macro.
(OPCODE_IS_MEMBER): Handle Octeon instructions.
+
+ * avr.h (AVR_ISA_RF401): Add new opcode set for at86rf401.
+
+
+ * avr.h (AVR_ISA_USB162): Add new opcode set.
+ (AVR_ISA_AVR3): Likewise.
+
* mips.h (INSN_LOONGSON_2E): New.
before corresponding pa11 opcodes. Add strict pa10 register-immediate
entries for "fdc".
+
+ * bfin.h: New file.
+
* hppa.h (pa_opcodes): Add new "fdc" and "fic" opcode entries.