if (!quiet_warnings
&& (i.tm.operand_types[op] & InOutPortReg) == 0)
as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
- (i.op[op].regs - (i.types[op] & Reg16 ? 8 : 16))->reg_name,
+ (i.op[op].regs
+ + (i.types[op] & Reg16
+ ? REGNAM_AL - REGNAM_AX
+ : REGNAM_AL - REGNAM_EAX))->reg_name,
i.op[op].regs->reg_name,
i.suffix);
#endif
#if REGISTER_WARNINGS
else
as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
- (i.op[op].regs + 8)->reg_name,
+ (i.op[op].regs + REGNAM_EAX - REGNAM_AX)->reg_name,
i.op[op].regs->reg_name,
i.suffix);
#endif
else
#if REGISTER_WARNINGS
as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
- (i.op[op].regs - 8)->reg_name,
+ (i.op[op].regs + REGNAM_AX - REGNAM_EAX)->reg_name,
i.op[op].regs->reg_name,
i.suffix);
#endif
/* make %st first as we test for it */
{"st", FloatReg|FloatAcc, 0, 0},
/* 8 bit regs */
+#define REGNAM_AL 1 /* Entry in i386_regtab. */
{"al", Reg8|Acc, 0, 0},
{"cl", Reg8|ShiftCount, 0, 1},
{"dl", Reg8, 0, 2},
{"r14b", Reg8, RegRex64|RegRex, 6},
{"r15b", Reg8, RegRex64|RegRex, 7},
/* 16 bit regs */
+#define REGNAM_AX 25
{"ax", Reg16|Acc, 0, 0},
{"cx", Reg16, 0, 1},
{"dx", Reg16|InOutPortReg, 0, 2},
{"r14w", Reg16, RegRex, 6},
{"r15w", Reg16, RegRex, 7},
/* 32 bit regs */
+#define REGNAM_EAX 41
{"eax", Reg32|BaseIndex|Acc, 0, 0}, /* Must be in ax + 16 slot */
{"ecx", Reg32|BaseIndex, 0, 1},
{"edx", Reg32|BaseIndex, 0, 2},