Brought over from sh4-980527-branch:

  Fix for execute/921208-1.c -Os -mrelax -m4-single failure:
	* coff-sh.c (sh_insns_conflict): Load of fpscr conflicts with
	floating point operations.

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index c92ead4382d7d5c17103e41041eebafea4d0e1d9..92c5b4211f4302dd207c2a83fc9e8431c27c0e20 100644 (file)
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,8 @@
+Fri Jul  3 14:35:48 1997  J"orn Rennecke <[email protected]>
+
+       * coff-sh.c (sh_insns_conflict): Load of fpscr conflicts with
+       floating point operations.
+
 Thu Jul  2 18:37:25 1998  Ian Lance Taylor  <[email protected]>
 
        * cofflink.c (_bfd_coff_link_input_bfd): Skip undefined global

diff --git a/bfd/coff-sh.c b/bfd/coff-sh.c
index ca68c564c766b3502f4616988134792d565ade65..29c0dcf396b4e2e5afe4ea4a369526343f88f490 100644 (file)
--- a/bfd/coff-sh.c
+++ b/bfd/coff-sh.c
@@ -1952,6 +1952,12 @@ sh_insns_conflict (i1, op1, i2, op2)
   f1 = op1->flags;
   f2 = op2->flags;
 
+  /* Load of fpscr conflicts with floating point operations.
+     FIXME: shouldn't test raw opcodes here.  */
+  if (((i1 & 0xf0ff) == 0x4066 && (i2 & 0xf000) == 0xf000)
+      || ((i2 & 0xf0ff) == 0x4066 && (i1 & 0xf000) == 0xf000))
+    return true;
+
   if ((f1 & (BRANCH | DELAY)) != 0
       || (f2 & (BRANCH | DELAY)) != 0)
     return true;