3 * hppa-dis.c: fix comments and some indentation.
8 * Makefile.am (run-cgen): Pass options to cgen.
9 (stamp-m32r): Build operand instance table.
10 (stamp-fr30,stamp-i960c): Don't build the table.
11 * Makefile.in: Regenerate.
12 * cgen.sh: New arg `options'. Pass to cgen.
14 * fr30-opc.c,i960c-opc.c: Regenerate.
18 * fr30-opc.c: Regenerate.
22 * m32r-dis.c: Regenerate.
27 * mips-opc.c (div1): Add three-operand pattern, just like "div".
28 (divu1): Ditto for "divu".
34 * cgen-asm.in (insert_normal): Use CGEN_BOOL_ATTR.
35 * cgen-asm.in (extract_normal): Ditto.
37 * fr30-asm.c,fr30-dis.c,fr30-opc.h,fr30-opc.c: Regenerate.
38 * i960c-asm.c,i960c-dis.c,i960c-opc.h,i960c-opc.c: Regenerate.
39 * m32r-asm.c,m32r-dis.c,m32r-opc.h,m32r-opc.c: Regenerate.
43 * configure.in: Require autoconf 2.12.1 or higher.
47 * mips16-opc.c: Mark branch insns with MIPS16_INSN_BRANCH.
51 * fr30-opc.c: Regenerated.
56 * mips-dis.c (set_mips_isa_type): Handle bfd_mach_mips4111.
61 * fr30-opc.c,fr30-opc.h: Regenerated.
65 * fr30-opc.c,fr30-opc.h: Regenerated.
70 * mips-dis.c (set_mips_isa_type): Add bfd_mach_mips4121.
71 (_print_insn_mips): Same.
72 * mips-opc.c: Add vr4121.
77 * fr30-opc.c,fr30-opc.h: Regenerated.
81 * m32r-opc.c: Regenerate.
86 * mips-opc.c (mips_builtin_opcodes): Update vmtir syntax.
87 * dvp-opc.c (vu_lower_opcodes): Update mtir entry.
88 (extract_ffstreg): Fix calculation of reg part of returned value.
92 * mips-opc.c (sync*): Flag these instructions with INSN_SYNC.
96 * dvp-opc.c (vu_lower_opcodes): Allow ISW, ISWR, MFIR instructions
97 to take multiple destination (xyzw) flags.
101 * dvp-opc.c (vu_operands): Add UW operand type to force ".w" suffix
102 on ft operand of CLIP.
103 (insert_w): New function for same.
104 (vu_opcodes): Use "broadcast" style argument list for two-operand
105 CLIP insn. Call UW constraint above.
109 * dvp-dis.c (print_insn): Disassemble DVP_OPERAND_RELOC_11_S4 as
115 * dis-buf.c (generic_strcat_address): reformat to GNU coding
116 conventions. change sprintf call to an sprintf_vma call.
120 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
124 The following changes were made by
128 merge in changes by HP; HP did not create ChangeLog entries.
130 * dis-buf.c (generic_strcat_address): new function.
132 * hppa-dis.c: Changes to improve hppa disassembly.
133 Changed formatting in : reg_names, fp_reg_names,control_reg,
134 New variables : sign_extension_names, deposit_names, conversion_names
135 float_test_names, compare_cond_names_double, add_cond_names_double,
136 logical_cond_names_double, unit_cond_names_double,
137 branch_push_pop_names, saturation_names, shift_names, mix_names,
138 New Macros : GET_COMPL_O, GET_PUSH_POP,MERGED_REG
139 Move some definitions to libhppa.h: GET_FIELD, GET_BIT
140 (fput_const): renamed as fput_hex_const
142 - use the macros fputs_filtered and
143 fput_decimal_const whenever possible; calls to sign_extend require
144 2 params -- add a missing second param of 0.
145 - Some new code ifdefed for LOCAL_ONLY, all related to figuring out
146 architecture version number of current machine. HP folks are
147 trying to handle situation where the target program was compiled
148 for PA 1.x (32-bit), but is running on a PA 2.0 machine and
150 - added new cases : 'g', 'B', 'm'
151 - added cases specifically for PA 2.0
152 - changed the following cases : '"', 'n', 'N', 'p', 'Z',
153 - calls to fput_const become calls to fput_hex_const
157 * Makefile.am (CFILES): Add i960c-asm, i960c-dis.c, i960c-opc.c.
158 (ALL_MACHINES): Add i960c-asm.lo, i960c-dis.lo, i960-opc.lo.
159 start-sanitize-cygnus
160 (CLEANFILES): Add stamp-i960.
162 (i960c-opc.h, i960c-opc.c, i960c-asm.c, i960c-dis.c, stamp-i960):
165 (i960-asm.lo, i960c-dis.lo, i960c-opc.lo): New Makefile rules.
166 * Makefile.in: Rebuilt.
167 * configure.in (bfd_i960_arch): Add i960c-opc.lo, i960-asm.o,
169 * i960-dis.c (print_insn_i960): Rename to print_insn_i960_orig.
170 * i960c-asm.c, i960c-dis.c, i960c-opc.c, i960c-opc.h: New files.
174 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
178 * mips-opc.c (mips_builtin_opcodes): Add dmfc2 and dmtc2.
180 * ppc-opc.c (powerpc_opcodes): Add PowerPC403 GC[X] instructions.
185 * fr30-opc.c: Regenerate.
189 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
193 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
197 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerate.
201 * cgen-dis.c (hash_insn_array): CGEN_INSN_VALUE ->
202 CGEN_INSN_BASE_VALUE.
203 start-sanitize-cygnus
204 * cgen-asm.in (insert_normal): Change start,length to unsigned int.
205 New args word_offset, word_length. Rewrite.
207 (insert_1): Fix lsb0 case.
208 * cgen-dis.in (extract_normal): Change start,length to unsigned int.
209 New args word_offset, word_length. Rewrite.
211 (extract_1): Fix lsb0 case.
212 * cgen-opc.in (FLD): Define.
214 * m32r-opc.c,m32r-opc.h,m32r-asm.c,m32r-dis.c: Regenerate.
215 * fr30-opc.c,fr30-opc.h,fr30-asm.c,fr30-dis.c: Regenerate.
217 start-sanitize-cygnus
220 * Makefile.am (CGENFILES): Add rtx-funcs.scm.
221 * Makefile.in: Rebuild.
226 * fr30-asm.c,fr30-dis.c,fr30-opc.c: Regenerated.
230 * fr30-asm.c,fr30-dis.c: Regenerated.
234 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
238 * fr30-opc.c: Regenerated.
242 * fr30-opc.c: Regenerated.
243 * fr30-opc.h: Regenerated.
244 * fr30-dis.c: Regenerated.
245 * fr30-asm.c: Regenerated.
249 * mips-opc.c (sync.p,sync.l): Swap insn values.
253 * fr30-opc.c: Regenerate.
257 * fr30-opc.c: Regenerated.
258 * fr30-opc.h: Regenerated.
262 start-sanitize-cygnus
263 * cgen-asm.in (insert_1): Replace calls to bfd_getb8/putb8.
264 (insert_normal, !CGEN_INT_INSN_P case): Only fetch enough bytes
266 (insert_insn_normal): Fix typo.
267 * cgen-dis.c (cgen_dis_lookup_insn): Update type of `value' arg.
268 * cgen-dis.in (extract_normal): Ditto. New arg `pc'.
269 Rewrite ! CGEN_INT_INSN_P case.
270 (extract_insn_normal): Ditto.
271 (extract_1): New arg `pc'. All callers updated.
272 Replace calls to bfd_getb8.
273 (fill_cache): New fn.
274 * cgen-opc.c (cgen_{get,put}_insn_value): Move here ...
275 * cgen-opc.in: ... from here.
276 (@arch@_cgen_lookup_insn): Rewrite ! CGEN_INT_INSN_P case.
278 * m32r-asm.c,m32r-dis.c,m32r-opc.c: Rebuild.
279 * fr30-asm.c,fr30-dis.c,fr30-opc.c: Rebuild.
283 * fr30-opc.c: Regenerated.
287 * fr30-opc.c: Regenerated.
288 * fr30-opc.h: Regenerated.
289 * fr30-dis.c: Regenerated.
290 * fr30-asm.c: Regenerated.
294 * po/opcodes.pot: Regenerated.
295 * fr30-opc.c: Regenerated.
296 * fr30-opc.h: Regenerated.
297 * fr30-dis.c: Regenerated.
298 * fr30-asm.c: Regenerated.
302 * disassemble.c (disassembler): Add support for FR30 target.
306 start-sanitize-cygnus
307 * cgen-dis.in (print_normal): CGEN_OPERAND_FAKE renamed to
308 CGEN_OPERAND_SEM_ONLY.
310 * m32r-dis.c,m32r-opc.c,m32r-opc.h: Rebuild.
311 * fr30-dis.c,fr30-opc.c,fr30-opc.h: Rebuild.
315 * po/opcodes.pot: Regenerate.
316 * po/POTFILES.in: Regenerate.
317 * fr30-opc.c: Regenerate.
318 * fr30-opc.h: Regenerate.
322 * m32r-asm.c: Regenerate.
326 * configure.in: Added case for bfd_fr30_arch.
327 * Makefile.am (CFILES): Added fr30-asm.c, fr30-dis.c, fr30-opc.c.
328 (ALL_MACHINES): Added fr30-asm.lo, fr30-dis.lo, fr30-opc.lo.
329 (CLEANFILES): Added stamp-fr30.
331 * fr30-asm.c: New file.
332 * fr30-dis.c: New file.
333 * fr30-opc.c: New file.
334 * fr30-opc.h: New file.
335 * po/POTFILES.in: Regenerated
336 * po/opcodes.pot: Regenerated
341 * m32r-opc.c (m32r_cgen_insn_table_entries): Add FILL_SLOT attribute
342 to bcl8,bncl8 entries.
343 (macro_insn_table_entries): Add FILL_SLOT attribute
344 to bcl8r,bncl8r entries.
349 * configure.in: detect cygwin* instead of cygwin32*
350 * configure: regenerate
354 * mips-opc.c (IS_M): Added.
359 * mips-opc.c (vrget, vclipw, vrnext): Correct COP2 opcodes
365 start-sanitize-cygnus
366 * cgen-asm.in (insert_1): New function.
367 (insert_normal): Progress on handling ! CGEN_INT_INSN_P.
368 (insert_insn_normal): Update handling of CGEN_INT_INSN_P.
369 (@arch@_cgen_assemble_insn): Update type of `buf' arg.
370 * cgen-dis.in (extract_1): New function.
371 (extract_normal): buf_ctrl renamed to ex_info, update type.
372 Progress on handling of CGEN_INT_INSN_P.
373 (extract_insn_normal): buf_ctrl renamed to ex_info, update type.
374 Update handling of CGEN_INT_INSN_P. Handle errors from
375 @arch@_cgen_extract_operand.
376 (print_insn): Renamed from print_int_insn. Handle ! CGEN_INT_INSN_P.
377 (default_print_insn): Renamed from print_insn.
378 Handle ! CGEN_INT_INSN_P.
379 (print_insn_@arch@): Handle error returns from print_insn.
380 * cgen-opc.in (cgen_get_insn_value, cgen_put_insn_value): New fns.
381 (@arch@_cgen_lookup_insn): Update handling of CGEN_INT_INSN_P.
382 (@arch@_cgen_lookup_get_insn_operands): Ditto.
384 * m32r-opc.c,m32r-opc.h,m32r-asm.c,m32r-dis.c: Regenerate.
389 * m10300-opc.c: Allow autoincrement stores using the same register
390 for source and destination operands.
394 * m10300-opc.c: DSP instrutions which only write to one general
395 register have no restrictions on matching operands.
397 * m10300-opc.c (lsr_add): Fix typo for "lsr_add imm,reg,reg,reg" case.
402 * m32r-opc.h,m32r-opc.c: Regenerate.
407 * m10300-opc.c (asr, lsr, asl): Fix am33 single bit shift opcode.
412 * i386-dis.c (OP_3DNowSuffix): New static function.
415 (dis386_twobyte): Add GRP14, femms, and 3DNow entries.
416 (twobyte_has_modrm): Set entries corresponding to GRP14, 3DNow.
417 (insn_codep): New static variable.
418 (print_insn_x86): Init insn_codep after prefixes.
419 (grps): Add GRP14 entries for prefetch, prefetchw.
423 * i386-dis.c (Suffix3DNow): New table.
427 * d10v-opc.c: Treat TRAP as if it were a branch type instruction.
431 * d10v-dis.c (print_operand): If num is nonzero, then
432 add OPERAND_ACC1, not OPERAND_ACC0.
436 * d30v-opc.c: Add FLAG_JSR attribute to DBT, REIT, RTD, and TRAP
441 * d30v-opc.c: Add use of EITHER_BUT_PREFER_MU execution unit
447 * dvp-opc.c (gif_opcodes): Support EOP on gifimage.
452 * m32r-opc.h,m32r-opc.c: Add bbpc,bbpsw support.
456 * ppc-opc.c (powerpc_opcodes): Add support for PowerPC 750 move
461 * arm-dis.c (print_insn_big_arm): Detect Thumb symbols in elf
463 (print_insn_little_arm): Detect Thumb symbols in elf object
468 * alpha-dis.c (print_insn_alpha): Use the machine type to
469 decide which PALcode set to include.
473 * sparc-opc.c (FBRX): Fix typo in ",a,pn %fcc3" case.
477 * d30v-opc.c (d30v_opcode_table): Add FLAG_MUL32 to MAC, MACS,
478 MSUB and MSUBS instructions.
483 * mips-opc.c: Insert contents of vu0.h, rather than including it.
485 * Makefile.am: Rebuild dependencies.
491 * ppc-opc.c (powerpc_operands): Omit parens around additions in
496 start-sanitize-coldfire
497 * m68k-opc.c: Correct divsl, divul, remsl, and remul for
498 ColdFire, as below for mulsl and mulul.
500 end-sanitize-coldfire
502 * m68k-opc.c: Correct mulsl and mulul to use q rather than D, a,
503 +, -, and d for ColdFire.
506 * ppc-opc.c (insert_mbe): Handle wrapping bitmasks.
507 (extract_mbe): Likewise.
511 * m10300-opc.c: Fix typo in udf20 .. udf25 instruction opcodes.
513 * m10300-opc.c: First cut at UDF instructions.
517 * m32r-opc.c: Regenerate (remove semantic descriptions).
521 * arm-dis.c (print_insn_big_arm): Fix indentation.
522 (print_insn_little_arm): Likewise.
526 * arm-dis.c (print_insn_big_arm): Check for thumb symbol
528 (print_insn_little_arm): Likewise.
532 Move all global state data into opcode table struct, and treat
533 opcode table as something that is "opened/closed".
534 * cgen-asm.c (all fns): New first arg of opcode table descriptor.
535 (cgen_asm_init): Delete.
536 (cgen_set_parse_operand_fn): New function.
537 * cgen-dis.c (all fns): New first arg of opcode table descriptor.
538 (cgen_dis_init): Delete.
539 * cgen-opc.c (all fns): New first arg of opcode table descriptor.
540 (cgen_current_{opcode_table_mach,endian}): Delete.
541 start-sanitize-cygnus
542 * cgen-asm.in (all fns): New first arg of opcode table descriptor.
543 * cgen-dis.in (all fns): Ditto.
544 * cgen-opc.in (all fns): Ditto.
546 * m32r-asm.c,m32r-dis.c,m32r-opc.c,m32r-opc.h: Regenerate.
548 start-sanitize-cygnus
549 * cgen-asm.in (parse_insn_normal): Ignore case in mnemonics.
551 * cgen-dis.in (print_normal): Split into two.
552 (print_address): New function.
553 (extract_insn_normal): Clarify insn_value arg.
554 (print_int_insn): Renamed from print_insn.
555 (print_insn): New arg.
556 (print_insn_@arch@): Open opcode table if not already done so.
557 Move reading of insn into print_insn.
562 * d30v-opc.c (d30v_opcode_table): Add new "LKR" flag to some
568 Add support for new versions of mulwhi,mulwlo,macwhi,macwlo that
569 accept an accumulator choice.
570 * m32r-opc.c,m32r-opc.h: Regenerate.
575 * m10300-opc.c: Add entries for "no_match_operands" field in
581 * m10300-dis.c: Do not emit a comma before a PLUS (autoincrement)
587 * m32r-asm.c,m32r-opc.c: Regenerate (-Wall cleanups).
592 * m10300-opc.c: Add DSP autoincrement memory loads/stores.
594 * m10300-opc.c: Add autoincrement memory loads/stores.
600 * mips-opc.c: Make phmadh and phmsbh synonyms for phmaddh and
601 phmsubh respectively.
606 start-sanitize-cygnus
607 * cgen-opc.in (@arch@_cgen_lookup_insn): Update call to
609 (@arch@_cgen_get_insn_operands): @arch@_cgen_get_operand renamed to
610 @arch_cgen_get_int_operand.
611 * cgen-asm.in (insert_insn_normal): New arg `pc', callers updated.
612 Update call to @arch@_cgen_insert_operand.
613 (@arch@_cgen_assemble_insn): Update call to CGEN_INSERT_FN.
614 * cgen-dis.in (print_normal): Delete use of CGEN_PCREL_OFFSET.
615 (extract_insn_normal): New arg `pc', callers updated.
616 Update call to @arch@_cgen_extract_operand.
617 (print_insn): Update call to CGEN_EXTRACT_FN.
619 * m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate.
624 * m10300-opc.c: Fix load to sp and store from sp for the am33.
625 Add more multimedia instructions.
629 * m10300-opc.c (mn10300_opcodes): Fix opcode for 4 operand "mul" and
636 * mips-opc.c (pref): Enabled for the r5900.
641 * i386-dis.c (ckprefix): Handle fwait specially only when it isn't
643 (dofloat): Correct test for fnstsw. Print `fnstsw %ax' rather
645 (OP_J): Remove unnecessary subtraction when 16-bit displacement
646 will be masked later.
651 * m10300-opc.c (mn10300_opcodes): Fix destination operand for 3 operand
656 * m10300-dis.c (disassemble): When printing RREGs and XRREGs, map
657 from raw register #s to symbolic names to make debugging easier.
662 * m32r-opc.h (CGEN_MIN_INSN_SIZE): New #define.
666 * m32r-asm.c,m32r-dis.c,m32r-opc.c,m32r-opc.h: Regenerate.
667 start-sanitize-cygnus
668 * Makefile.am (CGENDIR): Set via configure.
669 (CGEN): New variable.
670 (CGENFILES): object.scm renamed to cos.scm.
671 (run-cgen): Renamed from cgen. stamp file renamed to stamp-$prefix.
672 (stamp-m32r): Pass prefix to run-cgen.
673 * Makefile.in: Regenerate.
675 * cgen-dis.in: Ditto.
676 * cgen-opc.in: Ditto.
677 * cgen.sh: New args cgen,prefix. Delete args scheme,schemeflags.
678 * configure.in: AC_SUBST cgen,cgendir. No longer look for guile.
679 * configure: Regenerate.
685 * m10300-opc.c: Reorder "movbu" and "movhu" instructions too.
689 * m10300-opc.c: Reorder more instructions so that we do not
690 accidentally match a mn10300 instruction when we really
691 wanted an am33 instruction.
696 * m10300-dis.c: Only recognize instructions from the currently
698 * m10300-opc.c: Add field indicating the particular variant of
699 the mn10300 each instruction is available on.
703 * configure.in: For bfd_vax_arch, build vax-dis.lo.
704 * Makefile.am: Rebuild dependencies.
705 (CFILES): Add vax-dis.c.
706 (ALL_MACHINES): Add vax-dis.lo.
707 * aclocal.m4: Rebuild with current libtool.
708 * configure, Makefile.in: Rebuild.
712 * vax-dis.c: New file, from work by Pauline Middelink
714 * disassemble.c (ARCH_vax): Define if ARCH_all.
715 (disassembler): Add case for ARCH_vax.
716 * makefile.vms: Support compilation on vms/vax.
721 * dvp-opc.c (DVP_OPERAND_RELOC_11_S4): Temporarily back out
722 the DVP_OPERAND_RELOC_11_S4 relocation.
728 * m10300-dis.c (print_insn_mn10300): 0xf7 opcode prefix specifies
730 (disassemble): Correctly handle FMT_D10 instructions.
732 * m10300-opc.c (mn10300_opcodes): Fix typo in IMM24 versions of the
733 am33 shift instructions.
735 * m10300-dis.c (print_insn_mn10300): 0xf9 opcode prefix specifies
737 (disassemble): Handle new instruction formats FMT_D6, FMT_D7, FMT_D8
738 FMT_D9 and FMT_D10. Handle various new opcode flags for the am33.
740 * m10300-opc.c (IMM32_HIGH8_MEM): New operand type.
741 (mn10300_opcodes): Reorder so as to try and select opcodes from
742 the core chip when multiple alternatives exist. Change several
743 am33 instructions to use IMM32_HIGH8_MEM. Fix typos in "mac" and
744 "macbu" instructions. Fix typos in a couple DSP instructions too.
749 * m10200-dis.c (print_insn_mn10200): Fix various non-portabilities
750 related to sign extension and the size of ints.
754 * m10300-opc.c: Support one operand "asr", "lsr" and "asl"
755 instructions. Support (sp) addressing mode by expanding it into
761 * dvp-opc.c (LIMM11, LUIMM15): New symbol types
762 DVP_OPERAND_RELOC_U15_S3 and DVP_OPERAND_RELOC_11_S4 to allow labels to
763 be used as immediate values.
769 * m10300-opc.c: Support 4 byte DSP instructions.
774 * mips-dis.c (_print_insn_mips): Fix argument interchange typo.
779 * m10300-opc.c: Support 6 and 7 byte am33 instructions.
784 * m10200-dis.c (print_insn_mn10200): Recognize 'break' pseudo-op.
789 * m10300-opc.c: Support for 3 byte and 4 byte extended instructions
790 found on the mn10300.
795 * i386-dis.c: Add support for fxsave, fxrstor, sysenter and
800 * mips-dis.c (print_insn_little_mips): Previously, instruction
801 printing references the symbol table to determine whether the
802 instruction resides in a block regular instructions or mips16
803 instructions. However, when the disassembler gets used in other
804 environments where the symbol table is not present, we no longer
805 rely in the symbol table, rather, use the low bit of the
806 instructions address to guess. There should be no change for usage
807 of the disassembler in host based programs, gdb, objdump.
808 (print_insn_big_mips): ditto.
809 (print_insn_mips): ditto
813 * m10200-dis.c (print_insn_mn10200): Don't bomb on unknown opcodes.
818 * m10300-opc.c (USP, SSP, MSP, PC, IMM4, EPSW, RN0, RM1): New
819 operands for the am33.
820 (mn10300_opcodes): Add new instructions from the am33.
822 * m10300-opc.c (mn10300_opcodes): Change opcode for "syscall".
826 * i386-dis.c (index16): Add '%' to register names. Use ','
831 * i386-dis.c: Don't print opcode suffix when we can figure out the
832 size (and gas can!) by register operands, or from the default
834 (putop): Handle 'A', 'B', 'L', 'P', 'Q', 'R' macros. Rename 'C'
836 (dis386, dis386_twobyte, grps): Use new suffix macros.
837 (dis386): Correct imul Ib to imul sIb. Change jnl to jge to be
838 consistent. Add suffix for call, jmp, lcall, ljmp, iret. Reverse
839 order of cmps operands to agree with Intel docs. Correct operand
840 of aad and aam (Ib -> sIb). Change ud2b from 0fb8 to 0fb9 to
841 agree with Intel docs.
842 (print_insn_x86): Print orphan fwait before other prefixes.
843 Return correct byte count for orphan fwait with prefixes. Don't
844 print `bound' operands in reverse order.
845 (ckprefix): Stop accumulating prefixes if we get fwait.
846 (OP_DIR): Print `$' before Ap operands of ljmp, lcall.
850 * po/Make-in (all-yes): If maintainer mode, depend on .pot file.
851 ($(PACKAGE).pot): Unconditionally depend on POTFILES.
855 Fix problems when bfd_vma is wider than long.
856 * i386-dis.c: Make op_address and start_pc unsigned.
857 (set_op): Make parameter unsigned.
858 (print_insn_x86): Cast to bfd_vma when passing a value to
860 * ns32k-dis.c (CORE_ADDR): Don't define.
861 (print_insn_ns32k): Change type of addr to bfd_vma. Use
862 bfd_scan_vma to read back address.
863 (print_insn_arg): Change type of addr to bfd_vma. Use sprintf_vma
865 * m68k-dis.c (COERCE32): Cast to bfd_signed_vma to avoid overflow.
866 (NEXTULONG): New definition.
867 (print_insn_m68k): Avoid overflow when computing third argument of
869 (print_insn_arg): Use NEXTULONG to fetch 32 bit address values.
870 Use disp instead of val to store offset values.
871 (print_indexed): Use base_disp instead of word to store base
872 displacement, to avoid overflow.
873 * m10300-dis.c (disassemble): Cast value to long when computing
874 pc-relative address, to get correct sign extension.
878 * m32r-opc.c: Regenerate.
882 * arm-opc.h (thumb_opcodes): Display 'add rx, rY, #0' insns as
887 * d30v-opc.c: Remove FALG_MUL32 attribyte from MULX2H insn.
891 * i386-dis.c: Combine aflag and dflag into sizeflag. Change OP_*
893 (OP_DSreg): Rename from OP_DSSI.
894 (OP_ESreg): Rename from OP_ESDI.
895 (Xb, Xv, Yb, Yv): Use index reg code, not b_mode or v_mode.
897 (append_seg): Rename from append_prefix.
898 (ptr_reg): New function.
899 (dis386): Add S suffix to pushf, popf, ret, lret, enter, leave.
901 (PREFIX_ADDR): Rename from PREFIX_ADR.
902 (float_reg): Add non-broken opcodes for people who don't want
907 * m68k-opc.c (tstb, tstw, tstl): Don't allow pcrel on
912 * i386-dis.c (dis386): Change 0x60 to "pushaS", 0x61 to "popaS".
916 * ppc-opc.c (powerpc_macros): Support shifts and rotates of size
917 0; produce error message for shifts of size 32 (or 64 for 64-bit
918 shifts), because the hardware doesn't support them.
923 * mips-opc.c (c.lt.s): Remove r5900 specific variant.
926 * vu0.h (sqc2): Fix opcode.
928 * mips-opc.c (rsqrt.s): Update based on r5900 ISA manual version 2.1
932 start-sanitize-cygnus
935 * mips-opc.c (macc, maccu, macchi, macchiu, msac, msacu, msachi, msachiu):
936 Change pinfo to use WR_HILO.
941 * d30v-opc.c: Add new operand: Ra3. Change SHORT_B3, SHORT_B3b,
942 LONG_2, LONG_2b formats to use this new operand.
946 * sparc-dis.c (compute_arch_mask): Added bfd_mach_sparc_sparclite_le.
950 * sparc-dis.c (print_insn_sparc): big endian instruction / little
955 * d30v-opc.c (d30v_format_table): Change definition of SHORT_B3
956 and SHORT_B3b formats to use Rb instead of Ra.
958 Add FLAG_MUL16 to MUL2XH opcode.
960 Add FLAG_ADDSUBppp to SRC and SATHp opcodes to implement extension
961 to existing 1.1.1 parallelisation prohibition procedure.
965 start-sanitize-cygnus
966 * cgen-asm.in (insert_normal): Handle empty fields and 64 bit hosts.
967 * cgen-dis.in (extract_normal): Likewise.
969 * m32r-asm.c,m32r-dis.c: Regenerate.
974 * dvp-opc.c (parse_dotdest): Missing dest -> xyzw.
980 * mips-opc.c (multu1): Add two operand variant for the r5900.
985 * mips-dis.c (print_mips16_insn_arg): Handle type ']' correctly
986 with a shift count of 0.
991 * mips-opc.c (mult1): Add two-operand variety of mult1 for R5900.
995 * mips-dis.c (print_insn_arg): Handle ';' opcode completer.
996 (_print_insn_mips): Likewise.
997 * vu0.h (vopmula, vopmsub): Correctly handle opcode/operand
1003 * cgen-opc.c (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1004 (cgen_hw_lookup_by_num): New function.
1006 start-sanitize-m32rx
1007 * m32r-opc.c, m32r-opc.h: Regenerate, delete h-abort.
1012 * m32r-asm.c: Regenerate (handle uppercase HIGH/SHIGH/LOW/SDA).
1016 * sparc-dis.c (print_insn_sparc): Always fetch instructions
1017 as big-endian on SPARClite.
1019 start-sanitize-m32rx
1022 * m32r-opc.c: Regenerated - SPECIAL attribute added to some
1024 * m32r-opc.h: Regenerated - SPECIAL attribute added to some
1030 * d30v-opc.c (pre_defined_register): Remove alias for r0.
1032 start-sanitize-r5900
1035 * mips-opc.c (break): Added 20-bit single-operand break
1036 instruction for R5900 only.
1041 * po/Make-in (install-info): New target.
1045 * configure.in (WIN32LIBADD): Add -lintl on cygwin32.
1046 * configure: Rebuild.
1050 * mips-opc.c (teq,tge,tgeu,tlt,tltu,tne): Added three-operand
1051 variety of ISA2 instructions to set bottom ten bits of trap code.
1055 * Makefile.am (config.status): Add explicit target so that
1056 config.status depends upon bfd/configure.in.
1057 * Makefile.in: Rebuild.
1061 * mips-opc.c (break, sdbbp): Added two-operand variety of ISA1
1062 instructions to set bottom ten bits of break code.
1063 * mips-dis.c (print_insn_arg): Implement 'q' operand format used
1064 for above optional argument.
1066 start-sanitize-cygnus
1069 * cgen.sh: s/@ARCH@/${ARCH}/ in opc.h generation.
1070 * m32r-opc.h: Regenerate.
1075 * makefile.vms: Run dec c with /nodebug.
1079 * Makefile.in: Rebuilt.
1080 * Makefile.am: Regenerated dependencies with mkdep.
1082 * opintl.h (_): Define as dgettext.
1084 start-sanitize-cygnus
1087 * configure.in: Add support for --enable-cgen-maint.
1088 * Makefile.am (M32R_DEPS): New variable.
1089 (m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c): Update dependencies.
1090 * aclocal.m4: Regenerate.
1091 * Makefile.in: Regenerate.
1092 * configure: Regenerate.
1094 * Makefile.am (CGENFILES): Add minsn.scm.
1099 * cgen-asm.c: Internationalised.
1100 start-sanitize-cygnus
1101 * cgen-asm.in: Internationalised.
1102 * cgen-opc.in: Internationalised.
1104 * m32r-asm.c: Internationalised.
1105 * m32r-dis.c: Internationalised.
1106 * m32r-opc.c: Internationalised.
1108 * aclocal.m4: Regenerated.
1109 * configure: Regenerated.
1110 * Makefile.am (POTFILES): Remove inclusion of BFD_H.
1111 * Makefile.in: Rebuild.
1112 * po/POTFILES.in: Rebuilt using rule in Makefile.in.
1113 * po/opcodes.pot: Rebuilt after changing POTFILES.in.
1117 * configure.in: Call AC_ISC_POSIX near start. Move CY_GNU_GETTEXT
1119 * aclocal.m4, configure: Rebuild with current tools.
1123 * opintl.h: New file - contains internationalisation macros used
1124 by source files in this directory.
1125 * po/: New subdirectory - contains internationalisation files.
1126 * po/Make-in: New file - Makefile constructor.
1127 * po/POTFILES.in: New file - list of files in opcodes directory
1128 that should be scan for internationalisation macros.
1129 * po/opcodes.pot: New file - list of internationisation strings
1130 found in files mentioned in po/POTFILES.in.
1131 * Makefile.am: Add rule to build po/POTFILES.in. Add SUBDIRS
1132 entry. Add intl directory to include paths.
1133 * acconfig.h: Add ENABLE_NLS, HAVE_CATGETS, HAVE_GETEXT,
1134 HAVE_STRCPY, HAVE_LC_MESSAGES
1135 * configure.in: Add rule to build Makefile in po subdirectory.
1136 * Makefile.in: Rebuilt.
1137 * aclocal.m4: Rebuilt.
1138 * config.in: Rebuilt.
1139 * configure: Rebuilt.
1140 * alpha-opc.c: Internationalised.
1141 * arc-dis.c: Internationalised.
1142 * arc-opc.c: Internationalised.
1143 * arm-dis.c: Internationalised.
1144 * cgen-asm.c: Internationalised.
1145 * d30v-dis.c: Internationalised.
1146 * dis-buf.c: Internationalised.
1148 * dvp-dis.c: Internationalised.
1149 * dvp-opc.c: Internationalised.
1151 * h8300-dis.c: Internationalised.
1152 * h8500-dis.c: Internationalised.
1153 * i386-dis.c: Internationalised.
1154 * m10200-dis.c: Internationalised.
1155 * m10300-dis.c: Internationalised.
1156 * m68k-dis.c: Internationalised.
1157 * m88k-dis.c: Internationalised.
1158 * mips-dis.c: Internationalised.
1159 * ns32k-dis.c: Internationalised.
1160 * opintl.h: Internationalised.
1161 * ppc-opc.c: Internationalised.
1162 * sparc-dis.c: Internationalised.
1163 * v850-dis.c: Internationalised.
1164 * v850-opc.c: Internationalised.
1168 * cgen-asm.c (cgen_current_opcode_table): Renamed from ..._data.
1169 (asm_hash_table_entries): New variable.
1170 (cgen_asm_init): Free asm_hash_table_entries.
1171 (hash_insn_array,hash_insn_list): New functions.
1172 (build_asm_hash_table): Use them. Hash macro insns as well.
1173 (cgen_asm_lookup_insn): Update.
1174 * cgen_dis.c (cgen_current_opcode_table): Renamed from ..._data.
1175 (dis_hash_table_entries): New variable.
1176 (cgen_dis_init): Free dis_hash_table_entries.
1177 (hash_insn_array,hash_insn_list): New functions.
1178 (build_dis_hash_table): Use them. Hash macro insns as well.
1179 (cgen_dis_lookup_insn): Update.
1180 * cgen-opc.c (cgen_current_opcode_table): Renamed from ..._data.
1181 (cgen_set_cpu,cgen_hw_lookup,cgen_insn_count): Update.
1182 (cgen_macro_insn_count): New function.
1183 start-sanitize-cygnus
1184 * cgen-opc.in (@arch@_cgen_lookup_insn): New arg alias_p.
1185 All callers updated. Sanity check result of extract fn.
1186 (@arch@_cgen_get_insn_operands): Change result type to void.
1187 Delete args insn_value, length. New arg fields. All callers updated.
1188 (@arch@_cgen_lookup_get_insn_operands): New function.
1190 * m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate.
1194 * i386-dis.c (OP_DSSI): Print segment override.
1196 start-sanitize-r5900
1199 * mips-opc.c (msub.s): Correct mask pattern for disassembly.
1202 start-sanitize-r5900
1205 * mips-opc.c (madd.s): Correct mask pattern for disassembly.
1208 start-sanitize-r5900
1211 * vu0.h (vlqd, vlqi): Update per revised specs.
1217 * dvp-opc.c (parse_vif_unpackloc,insert_vif_unpackloc): Delete.
1218 (vif_operands): Update.
1219 (vif_get_unpackloc): Delete.
1220 (state_vif_unpackloc{,_star_p}): Delete.
1221 (dvp_opcode_init_parse): Update.
1222 (vif_unpack_len_value): Avoid divide by zero.
1225 start-sanitize-r5900
1228 * vu0.h: Specs changed for VCALLMSR bit pattern.
1229 * mips-dis.c: (print_insn_arg) Matching change.
1234 * arm-dis.c (print_insn_arm): Add "_all" extension to 'C'
1239 * Makefile.am (libopcodes_la_LIBADD): Add @WIN32LIBADD@.
1240 (libopcodes_la_LDFLAGS): Add @WIN32LDFLAGS@.
1241 * configure.in: Define and substitute WIN32LDFLAGS and
1243 * aclocal.m4: Rebuild with new libtool.
1244 * configure, Makefile.in: Rebuild.
1246 start-sanitize-r5900
1249 * vu0.h: Corrected bit pattern for VMAXI opcode.
1254 * m32r-opc.c: Regenerate.
1259 * dvp-opc.c (vif_macros): Tweak unpackloc operand.
1260 (dvp_expand_macro): Implement.
1261 (insert_vif_datalen): Record value with max+1 -> 0 conversion.
1262 (vif_unpack_len): Perform 0 -> max+1 conversion on `wl' value.
1267 * Makefile.am (stamp-lib): Check that .libs/libopcodes.a exists
1268 before trying to copy it.
1269 * Makefile.in: Rebuild.
1273 * m32r-opc.c: Use signed immediate values for CMPUI instruction.
1275 start-sanitize-m32rx
1278 * m32r-opc.c: Fix bit patterns for SAT and SATB.
1283 * ns32k-dis.c (bit_extract_simple): New function to extract bits
1284 from an arbitrary valid buffer instead of fetching them on demand
1286 (invalid_float): use bit_extract_simple() instead of bit_extract().
1288 start-sanitize-m32rx
1291 * m32r-opc.c: Fix SATB bit pattern. Add extra control registers.
1292 * m32r-opc.h: Add extra control registers.
1298 * i386-dis.c (dis386): Change 0x8c and 0x8e to movS, and change Ew
1303 * Branched binutils 2.9.
1307 * d30v-dis.c (print_insn_d30v): Don't use uninitialized "num" when
1308 disassembling last 4 bytes of a section.
1312 Fix some gcc -Wall warnings:
1313 * arc-dis.c (print_insn): Add casts to avoid warnings.
1314 * cgen-opc.c (cgen_keyword_lookup_name): Likewise.
1315 * d10v-dis.c (dis_long, dis_2_short): Likewise.
1317 * dvp-opc.c (issymchar, SKIP_BLANKS): Likewise.
1318 (parse_dotdest, parse_dotdest1, u_parse_sdest): Likewise.
1319 (parse_bc, parse_vfreg, parse_accdest): Likewise.
1320 (parse_ffstreg, parse_vif_mode): Likewise.
1322 * m10200-dis.c (disassemble): Likewise.
1323 * m10300-dis.c (disassemble): Likewise.
1324 * ns32k-dis.c (print_insn_ns32k): Likewise.
1325 * ppc-opc.c (insert_ral, insert_ram): Likewise.
1326 * cgen-dis.c (build_dis_hash_table): Remove used local variables.
1327 * cgen-opc.c (cgen_keyword_search_next): Likewise.
1328 * d10v-dis.c (dis_long, dis_2_short): Likewise.
1329 * d30v-dis.c (print_insn_d30v, lookup_opcode): Likewise.
1331 * dvp-dis.c (print_dma, print_vif, print_gif): Likewise.
1332 * dvp-opc.c (parse_dest1, print_uflags): Likewise.
1333 (parse_gif_nloop, dvp_opcode_init_tables): Likewise.
1335 * ns32k-dis.c (bit_extract, print_insn_ns32k): Likewise.
1336 start-sanitize-tic80
1337 * tic80-dis.c (print_one_instruction): Likewise.
1339 * w65-dis.c (print_operand): Likewise.
1340 * z8k-dis.c (fetch_data): Likewise.
1341 * a29k-dis.c: Add return type for find_byte_func_type.
1342 * arc-opc.c: Include <stdio.h>. Remove declarations of
1343 insert_multshift and extract_multshift.
1344 * d30v-dis.c (lookup_opcode): Parenthesize assignments in
1346 (extract_value): Fully parenthesize expression.
1348 * dvp-opc.c: Include <ctype.h>.
1349 (print_sdest): Add default case to switch.
1351 * h8500-dis.c (print_insn_h8500): Initialize local variables.
1352 * h8500-opc.h (h8500_table): Fully bracket initializer.
1353 * w65-opc.h (optable): Likewise.
1354 * i386-dis.c (print_insn_x86): Declare aflag and flag parameters.
1355 * i386-dis.c (OP_E): Initialize local variables.
1356 * m10200-dis.c (print_insn_mn10200): Likewise.
1357 * mips-dis.c (print_insn_mips16): Likewise.
1358 * sh-dis.c (print_insn_shx): Likewise.
1359 * v850-dis.c (print_insn_v850): Likewise.
1360 * ns32k-dis.c (print_insn_arg): Declare.
1361 (get_displacement, invalid_float): Declare.
1362 (list_search, sign_extend, flip_bytes): Declare return type.
1363 (get_displacement): Likewise.
1364 (print_insn_arg): Likewise. Make d int. Fix sprintf format
1366 (print_insn_ns32k): Make i unsigned.
1367 (invalid_float): Make static. Declare type of val.
1368 * tic30-dis.c (print_par_insn): Make i size_t. Don't check strlen
1369 on each for iteration.
1370 * tic30-dis.c (get_indirect_operand): Likewise.
1371 * z8k-dis.c (print_insn_z8001): Declare return type.
1372 (print_insn_z8002): Likewise.
1373 (unparse_instr): Fix sprintf format strings.
1377 * mips-opc.c: Add "sync.l" and "sync.p".
1382 * dvp-opc.c (extract_vif_datalen): Rewrite.
1383 (vif_insn_len): Perform 0->max+1 conversion for direct length.
1387 * dvp-dis.c (print_insn): Print unpack address in hex.
1388 * dvp-opc.c (parse_vif_mpgloc): Renamed from parse_vif_mpgloc_star.
1389 Don't skip over '*', just record it.
1390 (insert_vif_mpgloc): Don't update state_vif_mpgloc if '*' value.
1391 (parse_vif_unpackloc): Renamed from parse_vif_unpackloc_star.
1392 Don't skip over '*', just record it.
1393 (insert_vif_unpackloc): Don't update state_vif_unpackloc if '*' value.
1394 (vif_operands): Delete VIF_MPGLOC_STAR,VIF_UNPACKLOC_STAR entries.
1395 (vif_opcodes): Likewise.
1396 (state_vif_{mpg,unpack}loc_star_p): New static locals.
1397 (vif_macros,vif_macro_count): New globals.
1398 (vif_unpack_len_value): New arguments wl,cl. All callers updated.
1399 (vif_set_{mpg,unpack}loc): Delete. All callers updated.
1400 (vif_get_wl_cl): New function.
1401 (dvp_opcode_init_parse): Init mpgloc,unpackloc state.
1406 * m68k-dis.c (print_insn_m68k): Use info->mach to select the
1407 default m68k variant to recognize.
1409 * i960-dis.c (pinsn): Change type of first argument to bfd_vma.
1410 (ctrl, cobr, mem, ea): Likewise.
1411 (print_addr): Likewise. Remove cast.
1412 (ea): Cast argument of print_addr to bfd_vma.
1414 * cgen-asm.c (cgen_parse_signed_integer): Fix type of local
1416 (cgen_parse_unsigned_integer): Likewise.
1417 (cgen_parse_address): Likewise.
1421 * i960-dis.c (ctrl): Add full braces to structure initialization.
1422 (cobr, mem, reg): Likewise.
1423 (ea): Correct parenthesization in expression.
1425 * cgen-asm.c: Include <ctype.h>.
1426 (build_asm_hash_table): Remove unused local variable i.
1427 (cgen_parse_keyword): Add casts to avoid warnings.
1429 * arm-dis.c (print_insn_big_arm): Only call coffsymbol for a COFF
1430 symbol. Fix indentation.
1431 (print_insn_little_arm): Likewise.
1433 start-sanitize-r5900
1436 * vu0.h (cfc2, ctc2): Add variants with ".i" and ".ni"
1440 start-sanitize-m32rx
1443 * m32r-opc.c (m32r_cgen_insn_table_entries): Fix SATH bit pattern
1450 * dvp-opc.c (vif_operand_datalen_special): New global.
1453 start-sanitize-r5900
1456 * vu0.h (vcallms): Use 'O' for call target operand.
1457 * mips-dis.c (print_insn_arg): Handle 'O'.
1462 * configure.in: Use AM_DISABLE_SHARED.
1463 * aclocal.m4, configure: Rebuild with libtool 1.2.
1465 start-sanitize-r5900
1468 * mips-dis.c: Change '%' to '#' in r5900 support.
1474 These patches are courtesy of Jonathan Walton and Tony Thompson
1477 * arm-dis.c (print_insn_thumb): Ignore bottom two bits of PC
1480 * arm-opc.h (thumb_opcodes): Annotate PC relative addresses with
1481 both the offset and the label closest to the destination.
1483 start-sanitize-r5900
1486 * vu0.h: New file with cop2/vu0 instructions.
1487 * mips-opc.c: Include vu0.h.
1488 * mips-dis.c (print_insn_arg): Handle new args 0-9, +, -, %, K, &,
1490 (print_insn_mips): Do not emit a tab after an instruction if the
1491 first arg is an instruction completer (&). If the next arg is an
1492 escape character (%), then print the next arg verbatim.
1493 * Makefile.am (mips-opc.lo): Depend on vu0.h
1499 * dvp-opc.c (vif_opcodes): Add stcycl.
1503 * dvp-dis.c (print_dma): Change length from 16 to 8.
1508 * m32r-opc.h: Regenerate.
1513 * dvp-opc.c (print_dest1): Print dest spec again.
1514 (print_vfreg,print_accdest): Likewise.
1515 (vif_unpack_len): Round result up to word boundary.
1518 start-sanitize-vr4320
1521 * mips-opc.c ("clz","dclz"): Added the 4320 versions.
1525 * mips-opc.c ("macc*","mul*"): Added the 4320 versions
1532 * dvp-dis.c (print_gif): Fix length calcs for gifimage.
1533 (print_insn): Do mask comparison on proper opcode word.
1534 Print unsigned values in hex.
1535 * dvp-opc.c (u_parse_sdest): Return -1 if dest missing.
1536 (parse_bc): Catch missing dest.
1537 (parse_vfreg): Replace atoi call with strtol.
1538 (parse_{bcftreg,ffstreg,freg,ireg,vi01,gif_prim,gif_nloop}): Likewise.
1539 (parse_bcftreg,parse_ffstreg): Handle missing dest.
1540 (extract_gif_eop): New function.
1541 (gif_operands): Update eop entry.
1542 (VGIFOP,VGIFNREGS): Fix calcs.
1543 (extract_gif_prim): Set *pinvalid to 1 if prim not used.
1544 (gif_regs): Add entry for unused 11 case.
1545 (print_gif_regs): Print empty list instead of nothing.
1546 (extract_gif_nloop): Fix value calc.
1547 (print_gif_nloop): Always print value, even if 0.
1548 (insert_vif_wlcl,extract_vif_wlcl): New functions.
1549 (vif_operands): Use them for wl,cl fields.
1550 (state_vif_wl,state_vif_cl): New static locals.
1551 (parse_vif_mode): Handle numeric args.
1552 (vif_unpack_len_value,vif_unpack_len): New functions.
1553 (vif_insn_len): Call vif_unpack_len.
1558 * m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate.
1560 start-sanitize-cygnus
1563 * cgen-asm.in: Move insertion of generated routines to top of file.
1564 (insert_normal): Add prototype. Delete `shift' arg.
1565 * cgen-dis.in: Move insertion of generated routines to top of file.
1566 (extract_normal): Add prototype. Delete `shift' arg.
1567 (print_normal): Add prototype. Call CGEN_PRINT_NORMAL if defined.
1568 (print_keyword): Add prototype. Fix type of `attrs' arg.
1571 start-sanitize-vr4320
1574 * mips-dis.c (_print_insn_mips) : Handle bfd_mach_mips4320.
1575 * mips-opc.c ("mac","dmac") : Added 4320 insns.
1580 * arm-dis.c (print_insn_big_arm, print_insn_little_arm): Do not
1581 assume that info->symbols is non-empty.
1585 * alpha-opc.c (cvtqs) There is no such thing.
1586 (cvttq): Missing most of the /*d variants.
1588 start-sanitize-r5900
1591 * mips-opc.c (r5900/madd.s): Takes three operands, not four. Fix
1593 (r5900/min.s): Incorrect opcode ....,101001 not ...110000.
1594 (r5900/msub.s): Takes three operands, not four. Fix opcode.
1599 * d30v-opc.c (d30v_opcode_table): Indicate which instructions are
1600 delayed branches or jumps.
1605 * dvp-opc.c (vif_operands): Add unpack[u] support.
1606 (vif_opcodes): Ditto.
1607 (*_vif_imrubits): Renamed from *_vif_imrbits.
1611 * dvp-dis.c (print_insn): Handle word number.
1612 Handle mips address vs vu address.
1613 * dvp-opc.c (vif_operands): Use DVP_OPERAND_VU_ADDRESS.
1614 (dma_operands): Use DVP_OPERAND_MIPS_ADDRESS.
1615 ({insert,extract}_dma_addr): Fix word ofset.
1616 ({insert,print}_gif_regs): Fix encode/decode.
1621 * arm-dis.c (print_insn_{big,little}_arm): info->symbol changed
1623 * mips-dis.c (print_insn_{big,little}_mips): Likewise.
1624 * tic30-dis.c (print_branch): Likewise.
1626 * mips-dis.c (print_insn_little_mips): Call dvp_info_mach_type.
1627 * dvp-dis.c (dvp_info_mach_type): New function.
1628 (print_insn_dvp): Call it.
1629 (print_vif): Return length of 4 if mpg or direct insn so following
1630 insns get properly disabled.
1631 (print_gif): Fix word order.
1632 * dvp-opc.c (vif_insn_len): New argument `pcpu'. All callers updated.
1633 (gif_operands): Fix word order.
1634 (gif_opcodes): Likewise.
1635 ({insert,extract,print}_gif_regs): Likewise.
1636 (gif_regs): Add new register number/name changes.
1637 (dma_opcodes): Add dmarefe insn.
1642 * arm-dis.c (print_insn_big_arm, print_insn_little_arm): Remove
1643 saved_symbol code as it is no longer needed.
1647 * cgen-asm.c: Include symcat.h.
1648 * cgen-dis.c,cgen-opc.c: Ditto.
1649 start-sanitize-cygnus
1650 * cgen-asm.in,cgen-dis.in: Ditto.
1652 * m32r-asm.c,m32r-dis.c,m32r-opc.h,m32r-opc.c: Regenerate.
1657 * dvp-opc.c (extra_dma_flags): Fix typos.
1658 (dma_operands): Fix word numbers.
1659 (dma_opcodes): Likewise.
1660 ({insert,extract}_dma_flags): Likewise.
1665 * mips-dis.c (print_insn_arg): Do not prefix 'P' arguments with '$'.
1670 * dvp-dis.c (print_gif): Complete.
1671 * dvp-opc.c (gif_operands,gif_opcodes): Complete.
1672 (state_gif_{nregs,regs,nloop}): New static locals.
1673 (*_gif_*): Complete.
1674 (dvp_opcode_init_{parse,print}): Init gif state locals.
1675 (extract_vif_datalen,{insert,extract}_vif_imrbits): New functions.
1676 (vif_insn_len): Handle `unpack'.
1677 ({insert,extract}_dma_flags): Complete.
1680 start-sanitize-r5900
1683 * mips-opc.c (mula.s): Renamed from multa.s.
1688 * m32r-opc.[ch]: Regenerate.
1693 * dvp-opc.c (dma_operands): Rewrite.
1694 (dma_operand_{count,addr}): New globals.
1695 (dma_opcodes): Rewrite. Add "dmaend" with no operands.
1696 (insert_dma_addr): Insert value into insn.
1697 (extract_dma_addr): Extract value from insn.
1701 * dvp-dis.c (print_vu): Handle loi insns.
1702 (print_insn): Likewise.
1703 * dvp-opc.c (vu_lower_opcodes): Add "loi".
1704 (vu_operands): Make LDEST1 a FAKE operand.
1705 (parse_dest1): Allow elided argument.
1706 (print_dest1): Don't print the argument.
1710 * dvp-opc.c (parse_vfreg): Dest spec is optional.
1711 (print_vfreg): Don't print dest spec.
1712 (parse_accdest): Dest spec is optional.
1713 (print_accdest): Don't print dest spec.
1718 start-sanitize-cygnus
1719 * Makefile.am (CGENFILES): Update.
1720 * Makefile.in: Regenerate.
1721 * cgen-asm.in (insert_normal): Result is error message now.
1722 Validate value to be inserted.
1723 (insert_insn_normal): Result is error message now.
1724 (@arch@_cgen_assemble_insn): Update.
1726 * cgen-asm.c (cgen_parse_{signed,unsigned}_integer): Delete min,max
1727 arguments. Don't perform validation here.
1728 * m32r-asm.c,m32r-dis.c,m32r-opc.c: Regenerate.
1732 start-sanitize-cygnus
1733 * cgen-opc.in (@arch@_cgen_get_insn_operands): Handle empty
1734 operand instance list.
1736 * m32r-opc.c: Regenerate.
1740 * Makefile.am (AUTOMAKE_OPTIONS): Define.
1741 * configure, Makefile.in, aclocal.m4: Rebuild with automake 1.2e.
1745 * m10300-dis.c (print_insn_mn10300): Recognize break instruction.
1749 * configure.in: Get the version number from BFD.
1750 * configure: Rebuild.
1753 * Makefile.am (libopcodes_la_LDFLAGS): Define.
1754 * Makefile.in: Rebuild.
1758 * m32r-opc.c: Regenerate.
1759 * m32r-opc.h: Regenerate.
1763 start-sanitize-cygnus
1764 * cgen-opc.in (@arch@_cgen_lookup_insn): New argument alias_p.
1765 Ignore ALIAS insns if asked to.
1766 (@arch@_cgen_get_insn_operands): Pass 0 for alias_p, NULL for insn.
1768 * m32r-opc.c: Regenerate.
1771 * dvp.opc.c: Nicely format opcode tables.
1772 (vu_operands): New element UFLAGS.
1773 (parse_uflags,print_uflags): New functions.
1774 (vu_upper_opcodes): Add UFLAGS to all insns.
1779 Fix rac to accept only a0:
1780 * d10v-opc.c (d10v_predefined_registers, d10v_operands, d10v_opcodes):
1781 Split OPERAND_ACC into OPERAND_ACC0 and OPERAND_ACC1.
1782 Introduce OPERAND_GPR.
1783 * d10v-dis.c (print_operand): Likewise.
1787 start-sanitize-cygnus
1788 * cgen-opc.in: New file.
1790 * Makefile.am (CGENFILES): Add cgen-opc.in.
1791 * Makefile.in: Regenerate.
1792 * cgen-dis.in (*): Use PTR instead of void *.
1793 (print_insn): Delete unused vars `i', `syntax'.
1795 * cgen-opc.c (cgen_set_cpu): Delete init of hw list `next' chain.
1796 (cgen_hw_lookup): Make result const.
1797 * m32r-opc.h, m32r-opc.c, m32r-asm.c, m32r-dis.c: Regenerate.
1802 * dvp-opc.c (*): pke,gpuif renamed to vif,gif.
1803 (vif_opcodes): Update renamed insns.
1804 * dvp-dis.c (*): Likewise.
1809 * configure, aclocal.m4: Rebuild with new libtool.
1813 * d30v-opc.c (repeat{,i} instructions): Repeat/repeati
1814 instructions use a PC relative branch, not absolute.
1818 * configure.in: Set libtool_enable_shared rather than
1819 libtool_shared. Remove diversion hack.
1820 * configure, Makefile.in, aclocal.m4: Rebuild with new libtool.
1824 * cgen-opc.c (cgen_set_cpu): Initialize hardware table.
1825 * m32r-opc.h, m32r-opc.c, m32r-asm.c, m32r-dis.c: Regenerate.
1829 * tic30-dis.c: New file.
1830 * disassemble.c (disassembler): Add bfd_arch_tic30 case.
1831 * configure.in: Handle bfd_tic30_arch.
1832 * Makefile.am: Rebuild dependencies.
1833 (CFILES): Add tic30-dis.c
1834 (ALL_MACHINES): Add tic30-dis.lo.
1835 * configure, Makefile.in: Rebuild.
1837 start-sanitize-m32rx
1840 * m32r-opc.c, m32r-opc.h, m32r-asm.c m32r-dis.c: Newly generated
1841 versions after updates to m32r.cpu to remove mulwhi-a, mulwlo-a,
1842 macwhi-a and macwlo-a instructions.
1848 * dvp-opc.c, fixed encoding of a bunch of instructions to
1849 be consistent with the asmvu assembler (and inconsistent
1850 with the specification).
1854 * dvp-opc.c, fixed order of pkemscal/pkemscalf instructions
1855 in the opcode table. The pkemscalf instruction must come first.
1859 * dvp-opc.c, MAXIi should be VUOP6(0x1d) instead of 0x2d.
1864 * m32r-opc.h (HAVE_CPU_M32R): Define.
1869 * dvp-dis.c, dvp-opc.c: New files.
1870 * configure.in: Compile them if bfd_dvp_arch, as well as mips.
1871 * configure: Regenerate.
1872 * Makefile.am (ALL_MACHINES): Add dvp-{dis,opc}.lo.
1873 (dvp-dis.lo,dvp-opc.lo): Add rules for.
1874 (mips-dis.lo): Compile with @archdefs@.
1875 * Makefile.in: Regenerate.
1876 * disassemble.c: Define ARCH_mips ifdef ARCH_dvp.
1877 * mips-dis.c (print_insn_little_mips): Check for DVP insns.
1882 * v850-opc.c (insertion routines): If both alignment and size is
1883 wrong then report this.
1887 * mips-dis.c (_print_insn_mips): Set target_processor as appropriate.
1888 Only recognize instructions for the current target_processor.
1892 * d10v-dis.c (PC_MASK): Correct value.
1893 (print_operand): If there's a reloc, don't calculate the
1894 address because they could be in different sections.
1896 start-sanitize-cygnus
1899 * cgen.sh: Rewrite to be like simulator's version.
1900 * Makefile.am (cgen): Update call to cgen.sh.
1901 * Makefile.in: Regenerate
1906 * mips-opc.c (mips_builtin_opcodes): Move 4010's "addciu"
1907 instruction after the 4650's "mul" instruction; nobody's using the
1908 4010 these days. If object files someday indicate which processor
1909 variant they're intended for, we can do a better job at this.
1911 start-sanitize-r5900
1914 * mips-opc.c (c.lt.s): Add r5900 variant.
1920 * cgen-asm.c (build_asm_hash_table): Traverse compiled in table using
1921 table provided entry size. Use CGEN_INSN_MNEMONIC.
1922 (cgen_parse_keyword): Rewrite.
1923 * cgen-dis.c (build_dis_hash_table): Traverse compiled in table using
1924 table provided entry size. Use CGEN_INSN_MASK_BITSIZE.
1925 * cgen-opc.c: Clean up pass over `struct foo' usage.
1926 (cgen_keyword_lookup_value): Handle "" entry.
1927 (cgen_keyword_add): Likewise.
1928 start-sanitize-cygnus
1929 * Makefile.am: Add cgen support.
1930 * Makefile.in: Regenerate.
1931 * configure.in: Add cgen support.
1932 * configure: Regenerate.
1933 * aclocal.m4: Regenerate.
1934 * cgen.sh, cgen-asm.in, cgen-dis.in: New files.
1939 * mips-opc.c: Add FP_D to s.d instruction flags.
1943 * m68k-opc.c (halt, pulse): Enable them on the 68060.
1945 start-sanitize-tic80
1948 * tic80-opc.c (tic80_opcodes): Revert change that put the 32 bit
1949 PC relative offset forms before the 15 bit forms. An assembler command
1950 line option now chooses the default.
1953 start-sanitize-r5900
1956 * mips-opc.c: Add many missing r5900 instructions.
1961 * d30v-opc.c (d30v_opcode_table): Set new flags bits
1962 FLAG_{2WORD,MUL{16,32},ADDSUBppp}, in appropriate instructions.
1966 * configure: Only build libopcodes shared if --enable-shared's value
1967 was `yes', or was set to `*opcodes*'.
1968 * aclocal.m4: Likewise.
1969 * NOTE: this really needs to be fixed in libtool/libtool.m4, the
1970 original source of this bit of code. It's not clear what the best fix
1973 start-sanitize-r5900
1976 * mips-opc.c (mtpc, mfpc, mtps, mfps): Add r5900 variants.
1978 start-sanitize-tic80
1981 * tic80-opc.c (OFF_SL_PC, OFF_SL_BR): Minor formatting change.
1982 (tic80_opcodes): Reorder table entries to put the 32 bit PC relative
1983 offset forms before the 15 bit forms, to default to the long forms.
1988 * alpha-opc.c (cvttq/*u*): Remove, as that suffix is invalid.
1992 * arm-dis.c (print_insn_little_arm): Prevent examination of stored
1993 symbol if none is present.
1994 (print_insn_big_arm): Prevent examination of stored symbol if
1999 * d10v-opc.c (d10v_opcodes): Correct entry for RTE.
2003 * disassemble.c: Remove disasm_symaddr() function.
2005 * arm-dis.c: Use info->symbol instead of info->flags to determine
2006 if disassmbly should be in Thumb or Arm mode.
2010 * arm-dis.c: Add support for disassembling Thumb opcodes.
2011 (print_insn_thumb): New function.
2013 * disassemble.c (disasm_symaddr): New function.
2015 * arm-opc.h: Display nop pseudo ops alongside equivalent disassembly.
2016 (thumb_opcodes): Table of Thumb opcodes.
2020 * m68k-opc.c (btst): Change Dd@s to Dd;b.
2022 * m68k-dis.c (print_insn_arg): Recognize 'm', 'n', 'o', 'p', 'q',
2023 and 'v' as operand types.
2027 * m68k-opc.c: Add argument for lpstop. From Olivier Carmona
2029 * m68k-dis.c (print_insn_m68k): Handle special case of lpstop,
2030 which has a two word opcode with a one word argument.
2034 * d30v-opc.c (d30v_opcode_table, case cmpu): Immediate field is
2035 unsigned, not signed.
2036 (d30v_format_table): Add SHORT_CMPU cases for cmpu.
2040 * sh-dis.c (print_insn_shx): Recognize all sh4 additions.
2041 * sh-opc.h (fmov): Add @<REG_M>+,<DX_REG_N> variant for sh4.
2042 (ftrv): Slay the cut-and-paste monster.
2046 * d10v-dis.c (print_operand):
2047 Split OPERAND_FLAG into OPERAND_FFLAG and OPERAND_CFLAG.
2051 * d10v-opc.c (OPERAND_FLAG): Split into:
2052 (OPERAND_FFLAG, OPERAND_CFLAG) .
2058 * mips-opc.c: Move the INSN_MACRO ISA value to the membership
2059 field for all INSN_MACRO's.
2060 * mips16-opc.c: same
2064 * mips-opc.c (sync,cache): These are 3900 insns.
2068 sh-opc.h (sh_table): Remove ftst/nan.
2070 start-sanitize-cygnus
2073 * mips-opc.c (dror32, dror, rzu.ob): Fix bugs in encoding.
2074 (c.*.ob, mula.ob, mull.ob, muls.ob, mulsl.ob): Put 'k' version
2076 * mips-dis.c (print_insn_arg): Handle VR5400 operand types.
2082 * mips-opc.c (deret,dmult,dmultu,madd,maddu,pref,sdbbp):
2083 Add tx49 insns and configury.
2088 * mips-opc.c (ffc, ffs): Fix mask.
2092 * d30v-opc.c (pre_defined_registers): Add eit_vb, int_s, and int_m
2097 * mips-opc.c: Fix bug in mask for "not" pseudo-instruction.
2098 start-sanitize-cygnus
2099 Added VR5400 instructions.
2100 (N5): New cpu-id macro.
2102 (WR_HILO, RD_HILO, MOD_HILO): New macros.
2106 * mips-opc.c: Fix bug in mask for "not" pseudo-instruction.
2107 (WR_HILO, RD_HILO, MOD_HILO): New macros.
2111 * v850-dis.c (disassemble): Replace // with /* ... */
2115 * sparc-opc.c: Add wr & rd for v9a asr's.
2116 * sparc-dis.c (print_insn_sparc): Recognize '_' and '/' for v9a asr's.
2117 (v9a_asr_reg_names): New variable.
2122 * sparc-opc.c (v9notv9a): New insn type.
2123 (IMPDEP): Move to the end to not conflict with edge8 et al.
2128 * mips-opc.c (bnezl,beqzl): Mark these as also tx39.
2132 * mips-opc.c: Note that 'jalx' is (probably incorrectly) marked I1.
2136 * v850-dis.c (disassemble): Use new symbol_at_address_func() field
2137 of disassemble_info structure to determine if an overlay address
2138 has a matching symbol in low memory.
2140 * dis-buf.c (generic_symbol_at_address): New (dummy) function for
2141 new symbol_at_address_func field in disassemble_info structure.
2145 * v850-opc.c (extract_d22): Use signed arithmatic.
2149 * mips-opc.c: Three op mult is not an ISA insn.
2153 * mips-opc.c: Fix formatting.
2157 * i386-dis.c (OP_E): Explicitly sign extend 8 bit values, rather
2158 than assuming that char is signed. Explicitly sign extend 16 bit
2159 values, rather than assuming that short is 16 bits.
2160 (OP_sI, OP_J, OP_DIR): Likewise.
2162 start-sanitize-v850e
2165 * v850-dis.c (v850_sreg_names): Use symbolic names for higher
2171 * v850-opc.c: Fix typo in comment.
2173 * v850-dis.c (disassemble): Add test of processor type when
2174 determining opcodes.
2178 * configure.in: Use a diversion to set enable_shared before the
2179 arguments are parsed.
2180 * configure: Rebuild.
2184 * m68k-opc.c (TBL1): Use ! rather than `.
2185 * m68k-dis.c (print_insn_arg): Remove ` operand specifier.
2189 * m68k-opc.c: Correct bchg, bclr, bset, and btst on ColdFire.
2191 * m68k-opc.c: Accept tst{b,w,l} with immediate operands on cpu32.
2193 * m68k-opc.c: Correct movew of an immediate operand to %sr or %ccr
2196 * configure.in: Call AC_CHECK_TOOL before AM_PROG_LIBTOOL.
2197 * aclocal.m4: Rebuild with new libtool.
2198 * configure: Rebuild.
2200 start-sanitize-v850e
2203 * v850-opc.c ("cmov"): Order reg param r1, r2 not r2, r2.
2208 * sparc-opc.c (sparclet_cpreg_table): Add %ccsr2, %cccrr, %ccrstr.
2212 * v850-opc.c (v850_opcodes): Further rearrangements.
2216 * d30v-opc.c (rot2h, sra2h, srl2h insns): Revert last change.
2220 * v850-opc.c (v850_opcodes): Fields reordered to allow assembler
2225 * mips-opc.c: Added tx39 insns sdbbp, rfe, and deret.
2227 * mips16-opc.c: Added mips16 sdbbp.
2232 * v850-opc.c: Initialise processors field of v850_opcode structure.
2236 Merge changes from Martin Hunt:
2238 * d30v-opc.c: Change mvfacc to accept 6-bit unsigned values.
2240 * d30v-opc.c (pre_defined_registers): Add control registers from 0-63.
2241 (d30v_opcode_tabel): Add dbt, rtd, srah, and srlh instructions. Fix
2242 rot2h, sra2h, and srl2h to use new SHORT_A5S format.
2244 * d30v-dis.c (print_insn): Fix disassembly of SHORT_D2 opcodes.
2246 * d30v-dis.c (print_insn): First operand of d*i (delayed
2247 branch) instructions is relative.
2249 * d30v-opc.c (d30v_opcode_table): Change form for repeati.
2250 (d30v_operand_table): Add IMM6S3 type.
2251 (d30v_format_table): Change SHORT_D2. Add LONG_Db.
2253 * d30v-dis.c: Fix bug with ".s" and ".l" extensions
2254 and cmp instructions.
2256 * d30v-opc.c: Correct entries for repeat*, and sat*.
2257 Make IMM5 unsigned. Create IMM6U and IMM12S3U operand
2258 types. Correct several formats.
2260 * d30v-opc.c: (pre_defined_registers): Add dpsw and dpc.
2262 * d30v-opc.c (pre_defined_registers): Change control registers.
2264 * d30v-opc.c (d30v_format_table): Correct SHORT_C1 and
2265 SHORT_C2. Manual was incorrect.
2267 * d30v-dis.c (lookup_opcode): Return value now indicates
2268 if an opcode has a short and a long form. Used for deciding
2269 to append a ".s" or ".l".
2270 (print_insn): Append a ".s" to an instruction if it is
2271 the short form and ".l" if it is a long form. Do not append
2272 anything if the instruction has only one possible size.
2274 * d30v-opc.c: Change mulx2h to require an even register.
2275 New form: SHORT_A2; a SHORT_A form that needs an even
2276 register as the first operand.
2278 * d30v-dis.c (print_insn_d30v): Fix problem where the last
2279 instruction was not being disassembled if there were an odd
2280 number of instructions.
2282 * d30v-opc.c (SHORT_M2, LONG_M2): Two new forms.
2284 start-sanitize-v850e
2287 * v850-dis.c (disassemble): Improved display of register lists.
2292 * sparc-opc.c (sparc_opcodes): Fix assembler args to
2293 fzeros, fones, fsrc1, fsrc1s, fsrc2s, fnot1, fnot1s, fnot2s,
2294 fors, fnors, fands, fnands, fxors, fxnors, fornot1s, fornot2s,
2295 fandnot1s, fandnot2s.
2299 * sparc-opc.c (sparc_opcodes): Fix op3 field for fcmpq/fcmpeq.
2303 * cgen-asm.c (cgen_parse_address): New argument resultp.
2304 All callers updated.
2305 * m32r-asm.c (parse_h_hi16): Right shift numbers by 16.
2309 * mn10200-dis.c (disassemble): PC relative instructions are
2310 relative to the next instruction, not the current instruction.
2314 * v850-dis.c (disassemble): Only signed extend values that are not
2315 returned by extract functions.
2316 Remove use of V850_OPERAND_ADJUST_SHORT_MEMORY flag.
2320 * v850-opc.c: Update comments. Remove use of
2321 V850_OPERAND_ADJUST_SHORT_MEMORY. Fix several operand patterns.
2325 * v850-opc.c (MOVHI): Immediate parameter is unsigned.
2329 * configure: Rebuilt with latest devo autoconf for NT support.
2333 * v850-dis.c (disassemble): Use curly brace syntax for register
2336 * v850-opc.c (v850_opcodes[]): Add NOT_R0 flag to decect cases
2337 where r0 is being used as a destination register.
2339 start-sanitize-v850e
2342 * v850-opc.c (v850_opcodes[]): Move divh opcodes next to each other.
2347 * sh-opc.h (sh_arg_type): Add A_SGR and A_DBR.
2348 (sh_nibble_type, sh_arg_type): Add SH4 floating point extensions.
2349 (sh_table): Likewise. Add movca.l, ocbi, ocbp, ocbwb.
2350 Add insns to access SGR and DBR.
2351 * sh-dis.c (print_insn_shx): Add SH4 floating point extensions.
2355 * alpha-opc.c (alpha_opcodes): Fix hw_rei_stall mungage.
2357 start-sanitize-v850e
2360 * v850-opc.c (v850_opcodes[]): Remove use of flag field.
2361 * v850-opc.c (v850_opcodes[]): Add support for reversed short load
2366 * configure (cgen_files): Add support for v850e target.
2367 * configure.in (cgen_files): Add support for v850e target.
2371 * configure (cgen_files): Add support for v850ea target.
2372 * configure.in (cgen_files): Add support for v850ea target.
2377 * configure.in (bfd_arc_arch): Add.
2378 * configure: Rebuild.
2379 * Makefile.am (ALL_MACHINES): Add arc-dis.lo, arc-opc.lo.
2380 * Makefile.in: Rebuild.
2381 * arc-dis.c, arc-opc.c: New files.
2382 * disassemble.c (ARCH_all): Define ARCH_arc.
2383 (disassembler): Add ARC support.
2387 start-sanitize-v850e
2388 * v850-dis.c (disassemble): Add support for v850EA instructions.
2390 * v850-opc.c (insert_i5div, extract_i5div): New Functions.
2391 (v850_opcodes): Add v850EA instructions.
2393 * v850-dis.c (disassemble): Add support for v850E instructions.
2395 * v850-opc.c (insert_d5_4, extract_d5_4, insert_d16_16,
2396 extract_d16_16, insert_i9, extract_i9, insert_u9, extract_u9,
2397 insert_spe, extract_spe): New Functions.
2398 (v850_opcodes): Add v850E instructions.
2401 * v850-opc.c: Reorganised and re-layed out to improve readability
2406 * configure: Rebuild with autoconf 2.12.1.
2410 * aclocal.m4, configure: Rebuild with new automake patches.
2414 * configure.in: Set enable_shared before AM_PROG_LIBTOOL.
2415 * acinclude.m4: Just include acinclude.m4 from BFD.
2416 * aclocal.m4, configure: Rebuild.
2420 * Makefile.am: New file, based on old Makefile.in.
2421 * acconfig.h: New file.
2422 * acinclude.m4: New file.
2423 * stamp-h.in: New file.
2424 * configure.in: Call AM_INIT_AUTOMAKE and AM_PROG_LIBTOOL.
2425 Removed shared library handling; now handled by libtool. Replace
2426 AC_CONFIG_HEADER with AM_CONFIG_HEADER. Call AM_MAINTAINER_MODE,
2427 AM_CYGWIN32, and AM_EXEEXT. Replace AC_PROG_INSTALL with
2428 AM_PROG_INSTALL. Change all .o files to .lo. Remove stamp-h
2429 handling in AC_OUTPUT.
2430 * dep-in.sed: Change .o to .lo.
2431 * Makefile.in: Now built with automake.
2432 * aclocal.m4: Now built with aclocal.
2433 * config.in, configure: Rebuild.
2437 * mips-opc.c: Fix typo/thinko in "eret" instruction.
2439 start-sanitize-r5900
2442 * mips-opc.c: Fix coding of mtsa.
2447 * sparc-opc.c (sparc_opcodes): Fix spelling on fpaddX, fpsubX insns.
2449 * sparc-dis.c (sorted_opcodes): New static local.
2450 (struct opcode_hash): `opcode' is pointer to const element.
2451 (build_hash): First arg is now table of sorted pointers.
2452 (print_insn_sparc): Sort opcodes by sorting table of pointers.
2453 (compare_opcodes): Update.
2457 * cgen-opc.c: #include <ctype.h>.
2458 (hash_keyword_name): New arg `case_sensitive_p'. Callers updated.
2459 Handle case insensitive hashing.
2460 (hash_keyword_value): Change type of `value' to unsigned int.
2464 * mips-opc.c (mips_builtin_opcodes): If an insn uses single
2465 precision FP, mark it as such. Likewise for double precision
2466 FP. Mark ISA1 insns. Consolidate duplicate opcodes where
2468 start-sanitize-r5900
2469 (mips_builtin_opcodes): Remove non-existant r5900 instructions
2472 start-sanitize-r5900
2475 * mips-opc.c (mips_builtin_opcodes): Add "pinteh", "pexeh" and
2476 "pexew" as synonyms for "pintoh", "pexoh", "pexow".
2481 * ppc-opc.c (extract_nsi): make unsigned expression signed before
2483 (UNUSED): remove one level of parens, so MSVC doesn't choke on
2484 nesting depth when all the macros are expanded.
2488 * sparc-opc.c: The fcmp v9a instructions take an integer register
2489 as a destination, not a floating point register. From Christian
2494 * m68k-dis.c (print_insn_arg): Print case 7.2 using %pc@()
2495 syntax. From Roman Hodek
2498 * i386-dis.c (twobyte_has_modrm): Fix pand.
2502 * i386-dis.c (dis386_twobyte): Fix pand and pandn.
2506 * arm-dis.c: Add prototypes for arm_decode_shift and
2511 * mips-opc.c: Add r3900 insns.
2515 * sh-dis.c (print_insn_shx): Change relmask to bfd_vma. Don't
2516 print delay slot instructions on the same line. When using a PC
2517 relative load, add a comment with the value being loaded if it can
2522 * i386-dis.c (dis386[], dis386_twobyte[]): change pushl/popl
2523 to pushS/popS for segment regs and byte constant so that
2524 pushw/popw printed when in 16 bit data mode.
2526 * i386-dis.c (dis386[]): change cwtl, cltd to cWtS, cStd to
2527 print cbtw, cwtd in 16 bit data mode.
2528 * i386-dis.c (putop): extra case W to support above.
2530 * i386-dis.c (print_insn_x86): print addr32 prefix when given
2531 address size prefix in 16 bit address mode.
2535 * sh-dis.c: Reindent. Rename local variable fprintf to
2540 * m32r-opc.c (m32r_cgen_insn_table, cmpui): Undo patch of May 2.
2544 * mips-opc.c (mips_builtin_opcodes): Moved INSN_ISA field into new
2546 * mips16-opc.c (mip16_opcodes): same.
2550 * m68k-opc.c (moveb): Change $d to %d.
2554 * i386-dis.c: (dis386_twobyte): Add MMX instructions.
2555 (twobyte_has_modrm): Likewise.
2557 (OP_MMX, OP_EM, OP_MS): New static functions.
2559 * i386-dis.c: Revert patch of April 4. The output now matches
2564 * m32r-opc.c (m32r_cgen_insn_table, cmpui): Use $uimm16 instead
2569 * m32r-opc.h (CGEN_ARCH): Renamed from CGEN_CPU.
2573 * Makefile.in (install): Depend upon installdirs.
2574 (installdirs): New target.
2579 * configure.in: Use ${CONFIG_SHELL} when running $ac_config_sub.
2580 * configure: Rebuild.
2584 * cgen-*.c, m32r-*.c: #include sysdep.h instead of config.h.
2585 Delete string{,s}.h support.
2589 * cgen-asm.c (cgen_parse_operand_fn): New global.
2590 (cgen_parse_{{,un}signed_integer,address}): Update call to
2591 cgen_parse_operand_fn.
2592 (cgen_init_parse_operand): New function.
2593 * m32r-asm.c (parse_insn_normal): cgen_init_parse_operand renamed
2594 from cgen_asm_init_parse.
2595 (m32r_cgen_assemble_insn): New operand `errmsg'.
2596 Delete call to as_bad, return error message to caller.
2597 (m32r_cgen_asm_hash_keywords): #if 0 out.
2601 * m68k-dis.c (print_insn_arg) [case 'd']: Print as address register,
2603 [case 'J']: Fix typo in register name.
2607 * configure.in: Substitute SHLIB_LIBS.
2608 * configure: Rebuild.
2609 * Makefile.in (SHLIB_LIBS): New variable.
2610 ($(SHLIB)): Use $(SHLIB_LIBS).
2614 * cgen-dis.c (build_dis_hash_table): Fix xmalloc size computation.
2616 * cgen-opc.c (hash_keyword_name): Improve algorithm.
2618 * disassemble.c (disassembler): Handle m32r.
2622 * m32r-asm.c, m32r-dis.c, m32r-opc.c, m32r-opc.h: New files.
2623 * cgen-asm.c, cgen-dis.c, cgen-opc.c: New files.
2624 * Makefile.in (CFILES): Add them.
2625 (ALL_MACHINES): Add them.
2626 (dependencies): Regenerate.
2627 * configure.in (cgen_files): New variable.
2628 (bfd_m32r_arch): Add entry.
2629 * configure: Regenerate.
2633 * configure.in: Correct file names for bfd_mn10[23]00_arch.
2634 * configure: Rebuild.
2636 * Makefile.in: Rebuild dependencies.
2638 * d10v-dis.c: Include "ansidecl.h" before "opcode/d10v.h".
2640 * i386-dis.c (float_reg): Swap fsubrp and fsubp. Swap fdivrp and
2645 * Branched binutils 2.8.
2649 * m10200-dis.c: Rename from mn10200-dis.c.
2650 * m10200-opc.c: Rename from mn10200-opc.c.
2651 * m10300-dis.c: Rename from mn10300-dis.c
2652 * m10300-opc.c: Rename from mn10300-opc.c.
2653 * Makefile.in: Update accordingly.
2655 * mips16-opc.c: Add mul and dmul macros.
2659 * makefile.vms: Update CFLAGS, add clean target.
2663 * mips-opc.c: Add "wait". From Ralf Baechle
2666 * configure.in: Add stdlib.h to AC_CHECK_HEADERS list.
2667 * configure, config.in: Rebuild.
2668 * sysdep.h: Include <stdlib.h> if it exists.
2669 * sparc-dis.c: Include <stdio.h> and "sysdep.h". Don't include
2671 * Makefile.in: Rebuild dependencies.
2675 * ppc-opc.c: Add PPC 403 instructions and extended opcodes. From
2678 * mips-opc.c: Add cast when setting mips_opcodes.
2682 * v850-dis.c (disassemble): Fix sign extension problem.
2683 * v850-opc.c (extract_d*): Fix sign extension problems to make
2684 disassembly calculate branch offsets correctly.
2688 * sh-opc.h: Add bf/s and bt/s as synonyms for bf.s and bt.s.
2690 * mips-opc.c: Add dctr and dctw.
2694 * d30v-dis.c (print_insn): Change the way signed constants
2699 * Makefile.in (BFD_H): New variable.
2700 (HFILES): New variable.
2701 (CFILES): Add all C files.
2702 (.dep, .dep1, dep.sed, dep, dep-in): New targets.
2703 Delete old dependencies, and build new ones.
2704 * dep-in.sed: New file.
2708 * m68k-opc.c (m68k_opcode_aliases): Added blo and blo{s,b,w,l}.
2710 start-sanitize-coldfire
2713 * m68k-opc.c (m68k_opcodes): Provide coldfire division module
2716 end-sanitize-coldfire
2719 * mn10200-opc.c: Change "trap" to "syscall".
2720 * mn10300-opc.c: Add new "syscall" instruction.
2724 * m68k-opc.c (m68k_opcodes): Provide correct entries for mulsl and
2725 mulul insns on the coldfire.
2729 * arm-dis.c (print_insn_arm): Don't print instruction bytes.
2730 (print_insn_big_arm): Set bytes_per_chunk and display_endian.
2731 (print_insn_little_arm): Likewise.
2736 * i386-dis.c (fetch_data): Add prototype.
2737 * m68k-dis.c (fetch_data): Add prototype.
2738 (dummy_print_address): Add prototype. Make static.
2739 * ppc-opc.c (valid_bo): Add prototype.
2740 * sparc-dis.c (build_hash_table): Add prototype.
2741 (is_delayed_branch, compute_arch_mask): Add prototypes.
2742 (print_insn_sparc): Make several local variables const.
2743 (compare_opcodes): Change arguments to const PTR. Add prototype.
2744 * sparc-opc.c (arg): Change name field to be const.
2745 (lookup_name, lookup_value): Add prototypes. Change table and
2746 name parameters to be const.
2747 (sparc_encode_asi): Change name parameter to be const.
2748 (sparc_encode_membar, sparc_encode_prefetch): Likewise.
2749 (sparc_encode_sparclet_cpreg): Likewise.
2750 (sparc_decode_asi): Change return type to be const.
2751 (sparc_decode_membar, sparc_decode_prefetch): Likewise.
2752 (sparc_decode_sparclet_cpreg): Likewise.
2756 * Makefile.in ($(SHLINK)): Just use ln -s, not ln -sf, since
2757 Solaris doesn't like the combined options, and the -f is
2759 (stamp-tshlink, install): Likewise.
2763 * mn10300-opc.c (IMM16_PCREL, SD8N_PCREL, D16_SHIFT): Mark these
2768 * m68k-opc.c (m68k_opcodes): Fix last change for the mc68010.
2772 * m68k-opc.c (m68k_opcodes): Added entries for the tst insns on
2777 * m68k-opc.c (m68k_opcodes): Added swbegl pseudo-instruction.
2779 start-sanitize-tic80
2782 * tic80-dis.c (print_insn_tic80): Set info->bytes_per_line to 8.
2786 * tic80-opc.c (tic80_predefined_symbols): Define r25 properly.
2791 * m68k-dis.c (NEXTSINGLE, NEXTDOUBLE, NEXTEXTEND): Use
2792 floatformat_to_double to make portable.
2793 (print_insn_arg): Use NEXTEXTEND macro when extracting extended
2798 * mips-opc.c: Initialize mips_opcodes to mips_builtin_opcodes,
2799 and bfd_mips_num_opcodes to bfd_mips_num_builtin_opcodes.
2803 * d10v-dis.c, d10v-opc.c: Change pre_defined_registers to
2804 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
2806 start-sanitize-tic80
2809 * tic80-opc.c (LSI_SCALED): Renamed from this ...
2810 (OFF_SL_BR_SCALED): ... to this, and added the flag
2811 TIC80_OPERAND_BASEREL to the flags word.
2812 (tic80_opcodes): Replace all occurances of LSI_SCALED with
2818 * mips-opc.c: Add macros for cop0, cop1 cop2 and cop3.
2819 Change mips_opcodes from const array to a pointer,
2820 and change bfd_mips_num_opcodes from const int to int,
2821 so that we can increase the size of the mips opcodes table
2824 start-sanitize-tic80
2827 * tic80-opc.c (tic80_predefined_symbols): Revert change to
2828 store BITNUM values in the table in one's complement form
2829 to match behavior when assembler is given a raw numeric
2830 value for a BITNUM operand.
2831 * tic80-dis.c (print_operand_bitnum): Ditto.
2836 * d30v-opc.c: Removed references to FLAG_X.
2840 * Makefile.in: Add dependencies on ../bfd/bfd.h as required.
2844 * Makefile.in: Added d30v object files.
2845 * configure: (bfd_d30v_arch) Rebuilt.
2846 * configure.in: (bfd_d30v_arch) Added new case.
2847 * d30v-dis.c: New file.
2848 * d30v-opc.c: New file.
2849 * disassemble.c (disassembler) Add entry for d30v.
2851 start-sanitize-tic80
2854 * tic80-opc.c (tic80_predefined_symbols): Add symbolic
2855 representations for the floating point BITNUM values.
2859 * tic80-opc.c (tic80_predefined_symbols): Store BITNUM values
2860 in the table in one's complement form, as they appear in the
2862 (tic80_symbol_to_value): Use macros to access predefined
2864 (tic80_value_to_symbol): Ditto.
2865 (tic80_next_predefined_symbol): New function.
2866 * tic80-dis.c (print_operand_bitnum): Remove code that did
2867 one's complement for BITNUM values.
2870 start-sanitize-r5900
2873 * mips-opc.c: bug fix, can't mark insns INSN_5900 and INSN_ISA4
2878 * makefile.vms: Remove 8 bit characters. Update to latest
2883 * m68k-opc.c (m68k_opcodes): Add swbeg pseudo-instruction.
2887 * mn10200-opc.c (IMM16_PCREL): This is a signed operand.
2888 (IMM24_PCREL): Likewise.
2892 * mips-dis.c (print_mips16_insn_arg): Use memaddr - 2 as the base
2893 address for an extended PC relative instruction that is not a
2898 * m68k-dis.c (print_insn_m68k): Set bytes_per_chunk and
2901 start-sanitize-tic80
2904 * tic80-opc.c (tic80_operands): Fix typo '+' -> '|'.
2905 (tic80_opcodes): Sort entries so that long immediate forms
2906 come after short immediate forms, making it easier for
2907 assembler to select the right one for a given operand.
2912 * mips-dis.c (_print_insn_mips): Set bytes_per_chunk and
2914 (print_insn_mips16): Likewise.
2916 start-sanitize-r5900
2919 * mips-opc.c: add r5900.
2922 start-sanitize-tic80
2925 * tic80-opc.c (tic80_symbol_to_value): Changed to accept
2926 a symbol class that restricts translation to just that
2927 class (general register, condition code, etc).
2931 * tic80-opc.c (tic80_operands): Add REG_0_E, REG_22_E,
2932 and REG_DEST_E for register operands that have to be
2933 an even numbered register. Add REG_FPA for operands that
2934 are one of the floating point accumulator registers.
2935 Add TIC80_OPERAND_MASK to flags for ENDMASK operand.
2936 (tic80_opcodes): Change entries that need even numbered
2937 register operands to use the new operand table entries.
2938 Add "or" entries that are identical to "or.tt" entries.
2943 * mips16-opc.c: Add new cases of exit instruction for
2945 * mips-dis.c (print_mips16_insn_arg): Display floating point
2946 registers in operands of exit instruction. Print `$' before
2947 register names in operands of entry and exit instructions.
2949 start-sanitize-tic80
2952 * tic80-opc.c (tic80_predefined_symbols): Table of name/value
2953 pairs for all predefined symbols recognized by the assembler.
2954 Also used by the disassembling routines.
2955 (tic80_symbol_to_value): New function.
2956 (tic80_value_to_symbol): New function.
2957 * tic80-dis.c (print_operand_control_register,
2958 print_operand_condition_code, print_operand_bitnum):
2959 Remove private tables and use tic80_value_to_symbol function.
2964 * d10v-dis.c (print_operand): Change address printing
2965 to correctly handle PC wrapping. Fixes PR11490.
2969 * mn10200-opc.c (mn10200_operands): Make 8 and 16 bit pc-relative
2974 * mips-dis.c (print_insn_mips16): Set insn_info information.
2975 (print_mips16_insn_arg): Likewise.
2977 * mips-dis.c (print_insn_mips16): Better handling of an extend
2978 opcode followed by an instruction which can not be extended.
2982 * m68k-opc.c (m68k_opcodes): Changed operand specifier for the
2983 coldfire moveb instruction to not allow an address register as
2984 destination. Although the documentation does not indicate that
2985 this is invalid, experiments uncovered unexpected behavior.
2986 Added a comment explaining the situation. Thanks to Andreas
2987 Schwab for pointing this out to me.
2989 start-sanitize-tic80
2992 * tic80-opc.c (tic80_opcodes): Expand comment to note that the
2993 entries are presorted so that entries with the same mnemonic are
2994 adjacent to each other in the table. Sort the entries for each
2995 instruction so that this is true.
3000 * m68k-dis.c: Include <libiberty.h>.
3001 (print_insn_m68k): Sort the opcode table on the most significant
3002 nibble of the opcode.
3004 start-sanitize-tic80
3007 * tic80-dis.c (tic80_opcodes): Add "wrcr", "vmpy", "vrnd",
3008 "vsub", "vst", "xnor", and "xor" instructions.
3009 (V_a1): Renamed from V_a, msb of accumulator reg number.
3010 (V_a0): Add macro, lsb of accumulator reg number.
3014 * tic80-dis.c (print_insn_tic80): Broke excessively long
3015 function up into several smaller ones and arranged for
3016 the instruction printing function to be callable recursively
3017 to print vector instructions that have both a load and a
3018 math instruction packed into a single opcode.
3019 * tic80-opc.c (tic80_opcodes): Expand comment for vld opcode
3020 to explain why it comes after the other vector opcodes.
3025 * m68k-opc.c (m68k_opcodes): add b, w, or l specifier to coldfire
3026 move insns to handle immediate operands.
3030 * m68k-opc.c (m68k_opcodes): Delete duplicate entry for "cmpil".
3031 fix operand mask in the "moveml" entries for the coldfire.
3033 start-sanitize-tic80
3036 * tic80-opc.c (V_a, V_m, V_S, V_Z, V_p, OP_V, MASK_V):
3037 New macros for building vector instruction opcodes.
3038 (tic80_opcodes): Remove all uses of FMT_SI, FMT_REG, and
3039 FMT_LI, which were unused. The field is now a flags field.
3040 Remove some opcodes that are possible, but illegal, such
3041 as long immediate instructions with doubles for immediate
3042 values. Add "vadd" and "vld" instructions.
3046 * tic80-opc.c (tic80_operands): Reorder some table entries to make
3047 the order more logical. Move the shift alias instructions ("rotl",
3048 "shl", "ins", "rotr", "extu", "exts", "srl", and "sra" to be
3049 interspersed with the regular sr.x and sl.x instructions. Add
3050 and test new instruction opcodes for "sl", "sli", "sr", "sri", "st",
3051 "sub", "subu", "swcr", and "trap".
3055 * tic80-opc.c (OFF_SS_PC): Renamed from OFF_SS.
3056 (OFF_SL_PC): Renamed from OFF_SL.
3057 (OFF_SS_BR): New operand type for base relative operand.
3058 (OFF_SL_BR): New operand type for base relative operand.
3059 (REG_BASE): New operand type for base register operand.
3060 (tic80_opcodes): Add and test "fmpy", "frndm", "frndn", "frndp",
3061 "frndz", "fsqrt", "fsub", "illop0", "illopF", "ins", "jsr",
3062 "ld", "ld.u", "lmo", "or", "rdcr", "rmo", "rotl", and "rotr"
3064 * tic80-dis.c (print_insn_tic80): Print opcode name with fixed width
3065 10 char field, padded with spaces on rhs, rather than a string
3066 followed by a tab. Use renamed TIC80_OPERAND_PCREL flag bit rather
3067 than old TIC80_OPERAND_RELATIVE. Add support for new
3068 TIC80_OPERAND_BASEREL flag bit.
3072 * tic80-dis.c (print_insn_tic80): Print floating point operands
3074 * tic80-opc.c (SPFI): Add single precision floating point
3075 immediate operand type.
3076 (ROTATE): Add rotate operand type for shifts.
3077 (ENDMASK): Add for shifts.
3078 (n): Macro for the 'n' bit.
3079 (i): Macro for the 'i' bit.
3080 (PD): Macro for the 'PD' field.
3081 (P2): Macro for the 'P2' field.
3082 (P1): Macro for the 'P1' field.
3083 (tic80_opcodes): Add entries for "exts", "extu", "fadd",
3089 * mn10200-dis.c (disassemble): Mask off unwanted bits after
3090 adding in current address for pc-relative operands.
3092 start-sanitize-tic80
3095 * tic80-dis.c (R_SCALED): Add macro to test for ":s" modifier bit.
3096 (print_insn_tic80): If R_SCALED then print ":s" modifier for operand.
3097 * tic80-opc.c (REG0, REG22, REG27, SSOFF, LSOFF): Names
3098 changed to REG_0, REG_22, REG_DEST, OFF_SS, OFF_SL respectively.
3099 (SICR, LICR, REGM_SI, REGM_LI): Names changed to CR_SI, CR_LI,
3100 REG_BASE_M_SI, REG_BASE_M_LI respectively.
3101 (REG_SCALED, LSI_SCALED): New operand types.
3102 (E): New macro for 'E' bit at bit 27.
3103 (tic80_opcodes): Add and test dld, dld.u, dst, estop, and etrap
3104 opcodes, including the various size flavors (b,h,w,d) for
3105 the direct load and store instructions.
3109 * tic80-dis.c (M_SI, M_LI): Add macros to test for ":m" modifier bit
3111 * tic80-dis.c (print_insn_tic80): Change comma and paren handling.
3112 Use M_SI and M_LI macros to check for ":m" modifier for GPR operands.
3113 * tic80-opc.c (tic80_operands): Add REGM_SI and REGM_LI operands.
3114 (F, M_REG, M_LI, M_SI, SZ_REG, SZ_LI, SZ_SI, D, S): New bit-twiddlers.
3115 (MASK_LI_M, MASK_SI_M, MASK_REG_M): Remove and replace in opcode
3116 masks with "MASK_* & ~M_*" to get the M bit reset.
3117 (tic80_opcodes): Add bsr, bsr.a, cmnd, cmp, dcachec, and dcachef.
3121 * tic80-dis.c (print_insn_tic80): Print TIC80_OPERAND_RELATIVE
3122 correctly. Add support for printing TIC80_OPERAND_BITNUM and
3123 TIC80_OPERAND_CC, and TIC80_OPERAND_CR operands in symbolic
3125 * tic80-opc.c (tic80_operands): Add SSOFF, LSOFF, BITNUM,
3126 CC, SICR, and LICR table entries.
3127 (tic80_opcodes): Add and test "nop", "br", "bbo", "bbz",
3128 "bcnd", and "brcr" opcodes.
3133 * ppc-opc.c (powerpc_operands): Make comment match the
3134 actual fields (no shift field).
3135 * sparc-opc.c (sparc_opcodes): Document why this cannot be "const".
3136 start-sanitize-tic80
3137 * tic80-dis.c (print_insn_tic80): Replace abort stub with a
3138 partial implementation, work in progress.
3139 * tic80-opc.c (tic80_operands): Begin construction operands table.
3140 (tic80_opcodes): Continue populating opcodes table and start
3141 filling in the operand indices.
3142 (tic80_num_opcodes): Add this.
3147 * m68k-opc.c: Add #B case for moveq.
3151 * mn10300-dis.c (disassemble): Make sure all variables are initialized
3152 before they are used.
3156 * v850-opc.c (v850_opcodes): Put curly-braces around operands
3157 for "breakpoint" instruction.
3161 * Makefile.in (ALL_CFLAGS): Add -D_GNU_SOURCE.
3162 (dep): Use ALL_CFLAGS rather than CFLAGS.
3166 * v850-opc.c (D8_{6,7}): Set V850_OPERAND_ADJUST_SHORT_MEMORY
3171 * Makefile.in (m68k-opc.o, alpha-opc.o): Remove dis-asm.h dependency.
3172 start-sanitize-tic80
3173 (tic80-dis.o, tic80-opc.o): Add rules per comment in Makefile.in.
3178 * mips16-opc.c: Add "abs".
3180 start-sanitize-tic80
3183 * Makefile.in (ALL_MACHINES): Add tic80-dis.o and tic80-opc.o.
3184 * disassemble.c (ARCH_tic80): Define if ARCH_all is defined.
3185 (disassembler): Add bfd_arch_tic80 support to set disassemble
3186 to print_insn_tic80.
3187 * tic80-dis.c (print_insn_tic80): Add stub.
3191 * configure.in (arch in $selarchs): Add bfd_tic80_arch entry.
3192 * configure: Regenerate with autoconf.
3193 * tic80-dis.c: Add file.
3194 * tic80-opc.c: Add file.
3199 * d10v-opc.c (pre_defined_registers): Add cr[0-15], dpc, dpsw, link.
3203 * mn10200-opc.c (mn10200_operands): Add SIMM16N.
3204 (mn10200_opcodes): Use it for some logicals and btst insns.
3205 Add "break" and "trap" instructions.
3207 * mn10300-opc.c (mn10300_opcodes): Add "break" instruction.
3209 * mn10200-opc.c: Add pseudo-ops for "mov (an),am" and "mov an,(am)".
3213 * mips-dis.c (print_mips16_insn_arg): The base address of a PC
3214 relative load or add now depends upon whether the instruction is
3219 * mn10200-dis.c: Finish writing disassembler.
3220 * mn10200-opc.c (mn10200_opcodes): Fix mask for "mov imm8,dn".
3221 Fix mask for "jmp (an)".
3223 * mn10300-dis.c (disassemble, print_insn_mn10300): Corrently
3224 handle endianness issues for mn10300.
3226 * mn10200-opc.c (mn10200_opcodes): Fix operands for "movb dm,(an)".
3230 * mn10200-opc.c (mn10200_opcodes): "mov imm8,d0" is a format 2
3231 instruction. Fix opcode field for "movb (imm24),dn".
3233 * mn10200-opc.c (mn10200_operands): Fix insertion position
3238 * mn10200-opc.c: Create mn10200 opcode table.
3239 * mn10200-dis.c: Flesh out mn10200 disassembler. Not ready,
3240 but moving along nicely.
3244 * Makefile.in (ALL_MACHINES): Add mips16-opc.o.
3248 * m68k-opc.c (m68k_opcodes): Revert change to use < and >
3249 specifiers for fmovem* instructions.
3253 * mn10300-dis.c (disassemble): Remove '$' register prefixing.
3257 * mips16-opc.c: Change opcode for entry/exit to avoid conflicting
3262 * mn10300-opc.c: Add some comments explaining the various
3265 * mn10300-dis.c (disassemble): Fix minor gcc -Wall warnings.
3269 * m68k-dis.c (print_insn_arg): Handle new < and > operand
3272 * m68k-opc.c (m68k_opcodes): Simplify table by using < and >
3273 operand specifiers in fmovm* instructions.
3277 * ppc-opc.c (insert_li): Give an error if the offset has the two
3278 least significant bits set.
3282 * mips-dis.c (print_insn_mips16): Separate the instruction from
3283 the arguments with a tab, not a space.
3287 * mn10300-dis.c (disasemble): Finish conversion to '$' as
3290 * mn10300-opc.c (mn10300_opcodes): Fix mask field for
3295 * configure: Rebuild with autoconf 2.12.
3297 Add support for mips16 (16 bit MIPS implementation):
3298 * mips16-opc.c: New file.
3299 * mips-dis.c: Include "elf-bfd.h" and "elf/mips.h".
3300 (mips16_reg_names): New static array.
3301 (print_insn_big_mips): Use print_insn_mips16 in 16 bit mode or
3302 after seeing a 16 bit symbol.
3303 (print_insn_little_mips): Likewise.
3304 (print_insn_mips16): New static function.
3305 (print_mips16_insn_arg): New static function.
3306 * mips-opc.c: Add jalx instruction.
3307 * Makefile.in (mips16-opc.o): New target.
3308 * configure.in: Use mips16-opc.o for bfd_mips_arch.
3309 * configure: Rebuild.
3313 * m68k-opc.c (m68k_opcodes): Simplify table by using < and >
3314 operand specifiers in *save, *restore and movem* instructions.
3316 * m68k-opc.c (m68k_opcodes): Fix move and movem instructions for
3319 * m68k-opc.c (m68k_opcodes): The coldfire (mcf5200) can only use
3320 register operands for immediate arithmetic, not, neg, negx, and
3321 set according to condition instructions.
3323 * m68k-opc.c (m68k_opcodes): Consistantly Use "s" as the storage
3324 specifier of the effective-address operand in immediate forms of
3325 arithmetic instructions. The specifier for the immediate operand
3326 notes how and where the constant will be stored.
3330 * mn10300-opc.c (mn10300_opcodes): Remove redundant "lcc"
3333 * mn10300-dis.c (disassemble): Use '$' instead of '%' for
3336 * mn10300-dis.c (disassemble): Prefix registers with '%'.
3340 * mn10300-dis.c (disassemble): Handle register lists.
3342 * mn10300-opc.c: Fix handling of register list operand for
3343 "call", "ret", and "rets" instructions.
3345 * mn10300-dis.c (disassemble): Print PC-relative and memory
3346 addresses symbolically if possible.
3347 * mn10300-opc.c: Distinguish between absolute memory addresses,
3348 pc-relative offsets & random immediates.
3350 * mn10300-dis.c (print_insn_mn10300): Fix fetch of last byte
3352 (disassemble): Handle SPLIT and EXTENDED operands.
3356 * mn10300-dis.c: Rough cut at printing some operands.
3358 * mn10300-dis.c: Start working on disassembler support.
3359 * mn10300-opc.c (mn10300_opcodes): Fix masks on several insns.
3361 * mn10300-opc.c (mn10300_operands): Add "REGS" for a register
3363 (mn10300_opcodes): Use REGS for register list in "movm" instructions.
3367 * d10v-opc.c (d10v_opcodes): Add3 sets the carry.
3371 * mn10300-opc.c (mn10300_opcodes): Demand parens around
3372 register argument is calls and jmp instructions.
3376 * mn10300-opc.c (mn10300_opcodes): Use DN01 for putx and
3377 getx operand. Fix opcode for mulqu imm,dn.
3381 * mn10300-opc.c (mn10300_operands): Hijack "bits" field
3382 in MN10300_OPERAND_SPLIT operands for how many bits
3383 appear in the basic insn word. Add IMM32_HIGH24,
3384 IMM32_HIGH24_LOWSHIFT8, IMM8E_SHIFT8.
3385 (mn10300_opcodes): Use new operands as needed.
3387 * mn10300-opc.c (mn10300_operands): Add IMM32_LOWSHIFT8
3388 for bset, bclr, btst instructions.
3389 (mn10300_opcodes): Use new IMM32_LOWSHIFT8 as needed.
3391 * mn10300-opc.c (mn10300_operands): Remove many redundant
3392 operands. Update opcode table as appropriate.
3393 (IMM32): Add MN10300_OPERAND_SPLIT flag.
3394 (mn10300_opcodes): Fix single bit error in mov imm32,dn insn.
3398 * mn10300-opc.c (mn10300_operands): Add DN2, DM2, AN2, AM2
3399 operands (for indexed load/stores). Fix bitpos for DI
3400 operand. Add SN8N_SHIFT8, IMM8_SHIFT8, and D16_SHIFT for the
3401 few instructions that insert immediates/displacements in the
3402 middle of the instruction. Add IMM8E for 8 bit immediate in
3403 the extended part of an instruction.
3404 (mn10300_operands): Use new opcodes as appropriate.
3408 * d10v-opc.c (d10v_opcodes): Declare the trap instruction
3409 sequential so the assembler never parallelizes it with
3414 * mn10300-opc.c (mn10300_operands): Add DN01 and AN01 for
3415 a data/address register that appears in register field 0
3416 and register field 1.
3417 (mn10300_opcodes): Use DN01 and AN01 for mov/cmp imm8,DN/AN
3421 * alpha-dis.c (print_insn_alpha): Use new NOPAL mask for
3422 standard disassembly.
3424 * alpha-opc.c (alpha_operands): Rearrange flags slot.
3425 (alpha_opcodes): Add new BWX, CIX, and MAX instructions.
3426 Recategorize PALcode instructions.
3430 * v850-opc.c (v850_opcodes): Add relaxing "jbr".
3434 * mips-dis.c (_print_insn_mips): Don't print a trailing tab if
3435 there are no operand types.
3439 * v850-opc.c (D9_RELAX): Renamed from D9, all references
3441 (v850_operands): Make sure D22 immediately follows D9_RELAX.
3445 * i386-dis.c (print_insn_x86): Set info->bytes_per_line to 5.
3449 * v850-opc.c (insert_d8_6): Fix operand insertion for sld.w
3450 and sst.w instructions.
3452 * v850-opc.c (v850_opcodes): Add "jCC" instructions (aliases for
3457 * mips-dis.c (_print_insn_mips): Use a tab between the instruction
3462 * ppc-opc.c (PPCPWR2): Define.
3463 (powerpc_opcodes): Use PPCPWR2 for fsqrt, rather than duplicating
3468 * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode
3469 field for movhu instruction.
3471 * v850-dis.c (disassemble): For V850_OPERAND_SIGNED operands,
3472 cast value to "long" not "signed long" to keep hpux10
3477 * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode field
3480 * mn10300-opc.c (FMT*): Remove definitions.
3482 * mn10300-opc.c (mn10300_opcodes): Fix destination register
3483 for shift-by-register opcodes.
3485 * mn10300-opc.c (mn10300_operands): Break DN, DM, AN, AM
3486 into [AD][MN][01] for encoding the position of the register
3491 * mn10300-opc.c (mn10300_opcodes): Add "extended" instructions,
3492 "putx", "getx", "mulq", "mulqu", "sat16", "sat24", "bsch".
3496 * mn10300-opc.c (mn10300_operands): Remove "REGS" operand.
3497 Fix various typos. Add "PAREN" operand.
3498 (MEM, MEM2): Define.
3499 (mn10300_opcodes): Surround all memory addresses with "PAREN"
3500 operands. Fix several typos.
3502 * mn10300-opc.c (mn10300_opcodes): Fix typos in yesterday's
3507 * mn10300-opc.c (FMT_XX): Renumber starting at one.
3508 (mn10300_operands): Rough cut. Enough to parse "mov" instructions
3510 (mn10300_opcodes): Break opcode format out into its own field.
3511 Update many operand fields to deal with signed vs unsigned
3512 issues. Fix one or two typos in the "mov" instruction
3513 opcode, mask and/or operand fields.
3517 * m68k-opc.c (plusha): Prefer encoding for m68040up, in case
3518 m68851 wasn't reset.
3522 * mn10300-opc.c (mn10300_opcodes): Add opcode & masks for
3523 all opcodes. Very rough cut at operands for all opcodes.
3525 * mn10300-opc.c (mn10300_opcodes): Start fleshing out the
3530 * mn10200-opc.c, mn10300-opc.c: New files.
3531 * mn10200-dis.c, mn10300-dis.c: New files.
3532 * mn10x00-opc.c, mn10x00-dis.c: Deleted.
3533 * disassemble.c: Break mn10x00 support into 10200 and 10300
3535 * configure.in: Likewise.
3536 * configure: Rebuilt.
3540 * Makefile.in (MOSTLYCLEAN): Move config.log to distclean.
3544 * mn10x00-opc.c, mn10x00-dis.c: New files for Matsushita
3546 * disassemble (ARCH_mn10x00): Define.
3547 (disassembler): Handle bfd_arch_mn10x00.
3548 * configure.in: Recognize bfd_mn10x00_arch.
3549 * configure: Rebuilt.
3553 * i386-dis.c (op_rtn): Change to be a pointer. Adjust uses
3554 accordingly. Don't declare functions using op_rtn.
3558 * v850-dis.c (disassemble): Add memaddr argument. Re-arrange
3559 params to be more standard.
3560 * (disassemble): Print absolute addresses and symbolic names for
3561 branch and jump targets.
3562 * v850-opc.c (v850_operand): Add displacement flag to 9 and 22
3564 * (v850_opcodes): Add breakpoint insn.
3568 * m68k-opc.c: Move the fmovemx data register cases before the
3569 other cases, so that they get recognized before the data register
3570 does gets treated as a degenerate register list.
3574 * mips-opc.c: Add a case for "div" and "divu" with two registers
3575 and a destination of $0.
3579 * mips-dis.c (print_insn_arg): Add prototype.
3580 (_print_insn_mips): Ditto.
3584 * mips-dis.c (print_insn_arg): Print condition code registers as
3589 * sparc-opc.c (sparc_opcodes): Add setuw, setsw, setx.
3593 * v850-dis.c (disassemble): Make static. Provide prototype.
3597 * v850-opc.c (insert_d9, insert_d22): Fix boundary case
3602 * v850-dis.c (disassemble): Handle insertion of ',', '[' and
3603 ']' characters into the output stream.
3604 * v850-opc.c (v850_opcodes: Remove size field from all opcodes.
3605 Add "memop" field to all opcodes (for the disassembler).
3606 Reorder opcodes so that "nop" comes before "mov" and "jr"
3607 comes before "jarl".
3609 * v850-dis.c (print_insn_v850): Fix typo in last change.
3611 * v850-dis.c (print_insn_v850): Properly handle disassembling
3612 a two byte insn at the end of a memory region when the memory
3613 region's size is only two byte aligned.
3615 * v850-dis.c (v850_cc_names): Fix stupid thinkos.
3617 * v850-dis.c (v850_reg_names): Define.
3618 (v850_sreg_names, v850_cc_names): Likewise.
3619 (disassemble): Very rough cut at printing operands (unformatted).
3621 * v850-opc.c (BOP_MASK): Fix.
3622 (v850_opcodes): Fix mask for jarl and jr.
3624 * v850-dis.c: New file. Skeleton for disassembler support.
3625 * Makefile.in Remove v850 references, they're not needed here.
3626 * configure.in: Add v850-dis.o when building v850 toolchains.
3627 * configure: Rebuilt.
3628 * disassemble.c (disassembler): Call v850 disassembler.
3630 * v850-opc.c (insert_d8_7, extract_d8_7): New functions.
3631 (insert_d8_6, extract_d8_6): New functions.
3632 (v850_operands): Rename D7S to D7; operand for D7 is unsigned.
3633 Rename D8 to D8_7, use {insert,extract}_d8_7 routines.
3635 (IF4A, IF4B): Use "D7" instead of "D7S".
3636 (IF4C, IF4D): Use "D8_7" instead of "D8".
3637 (IF4E, IF4F): New. Use "D8_6".
3638 (v850_opcodes): Use IF4A/IF4B for sld.b/sst.b. Use IF4C/IF4D for
3639 sld.h/sst.h. Use IF4E/IF4F for sld.w/sst.w.
3641 * v850-opc.c (insert_d16_15, extract_d16_15): New functions.
3642 (v850_operands): Change D16 to D16_15, use special insert/extract
3643 routines. New new D16 that uses the generic insert/extract code.
3644 (IF7A, IF7B): Use D16_15.
3645 (IF7C, IF7D): New. Use D16.
3646 (v850_opcodes): Use IF7C and IF7D for ld.b and st.b.
3648 * v850-opc.c (insert_d9, insert_d22): Slightly improve error
3649 message. Issue an error if the branch offset is odd.
3651 * v850-opc.c: Add notes about needing special insert/extract
3652 for all the load/store insns, except "ld.b" and "st.b".
3654 * v850-opc.c (insert_d22, extract_d22): New functions.
3655 (v850_operands): Use insert_d22 and extract_d22 for
3657 (insert_d9): Fix range check.
3661 * v850-opc.c (v850_operands): Add V850_OPERAND_SIGNED flag
3662 and set bits field to D9 and D22 operands.
3666 * v850-opc.c (v850_operands): Define SR2 operand.
3667 (v850_opcodes): "ldsr" uses R1,SR2.
3669 * v850-opc.c (v850_opcodes): Fix opcode specs for
3670 sld.w, sst.b, sst.h, sst.w, and nop.
3674 * v850-opc.c (v850_opcodes): Add null opcode to mark the
3675 end of the opcode table.
3679 * d10v-opc.c (pre_defined_registers): Added register pairs,
3680 "r0-r1", "r2-r3", etc.
3684 * v850-opc.c (v850_operands): Make I16 be a signed operand.
3685 Create I16U for an unsigned 16bit mmediate operand.
3686 (v850_opcodes): Use I16U for "ori", "andi" and "xori".
3688 * v850-opc.c (v850_operands): Define EP operand.
3689 (IF4A, IF4B, IF4C, IF4D): Use EP.
3691 * v850-opc.c (v850_opcodes): Fix opcode numbers for "mov"
3692 with immediate operand, "movhi". Tweak "ldsr".
3694 * v850-opc.c (v850_opcodes): Get ld.[bhw] and st.[bhw]
3695 correct. Get sld.[bhw] and sst.[bhw] closer.
3697 * v850-opc.c (v850_operands): "not" is a two byte insn
3699 * v850-opc.c (v850_opcodes): Correct bit pattern for setf.
3701 * v850-opc.c (v850_operands): D16 inserts at offset 16!
3703 * v850-opc.c (two): Get order of words correct.
3705 * v850-opc.c (v850_operands): I16 inserts at offset 16!
3707 * v850-opc.c (v850_operands): Add "SR1" and "SR2" for system
3708 register source and destination operands.
3709 (v850_opcodes): Use SR1 and SR2 for "ldsr" and "stsr".
3711 * v850-opc.c (v850_opcodes): Fix thinko in "jmp" opcode. Fix
3712 same thinko in "trap" opcode.
3714 * v850-opc.c (v850_opcodes): Add initializer for size field
3717 * v850-opc.c (v850_operands): D6 -> DS7. References changed.
3718 Add D8 for 8-bit unsigned field in short load/store insns.
3719 (IF4A, IF4D): These both need two registers.
3720 (IF4C, IF4D): Define. Use 8-bit unsigned field.
3721 (v850_opcodes): For "sld.h", "sld.w", "sst.h", "sst.w", use
3722 IF4C & IF4D. For "trap" use I5U, not I5. Add IF1 operand
3723 for "ldsr" and "stsr".
3724 * v850-opc.c (v850_operands): 3-bit immediate for bit insns
3727 * v850-opc.c (v850_opcodes): Correct short store half (sst.h) and
3728 short store word (sst.w).
3732 * v850-opc.c (v850_operands): Added insert and extract fields,
3733 pointers to functions that handle unusual operand encodings.
3737 * v850-opc.c (v850_opcodes): Enable "trap".
3739 * v850-opc.c (v850_opcodes): Fix order of displacement
3740 and register for "set1", "clr1", "not1", and "tst1".
3744 * v850-opc.c (v850_operands): Add "B3" support.
3745 (v850_opcodes): Fix and enable "set1", "clr1", "not1"
3748 * v850-opc.c (v850_opcodes): "jmp" has only an R1 operand.
3750 * v850-opc.c: Close unterminated comment.
3754 * v850-opc.c (v850_operands): Add flags field.
3755 (v850_opcodes): add move opcodes.
3759 * Makefile.in (ALL_MACHINES): Add v850-opc.o.
3760 * configure: (bfd_v850v_arch) Add new case.
3761 * configure.in: (bfd_v850_arch) Add new case.
3762 * v850-opc.c: New file.
3766 * sparc-dis.c (print_insn_sparc): Handle little endian sparcs.
3770 * d10v-opc.c: Add additional information to the opcode
3771 table to help determinine which instructions can be done
3776 * mpw-make.sed: Update editing of include pathnames to be
3781 * arm-opc.h: Added "bx" instruction definition.
3785 * alpha-opc.c (EV4EXTHWINDEX): Field width should be 8 not 5.
3789 * d10v-opc.c (d10v_opcodes): Minor fixes to addi and bl.l.
3793 * d10v-opc.c (d10v_opcodes): Correct 'mv' unit entry to EITHER.
3797 * makefile.vms: Update for alpha-opc changes.
3801 * i386-dis.c (print_insn_i386): Actually return the correct value.
3802 (ONE, OP_ONE): #ifdef out; not used.
3806 * d10v-opc.c (d10v_opcodes): Added 2 accumulator sub instructions.
3807 Changed subi operand type to treat 0 as 16.
3811 * m68k-opc.c: Add cpushl for the mcf5200. From Ken Rose
3816 * arm-opc.h: (arm_opcodes): Added halfword and sign-extension
3817 memory transfer instructions. Add new format string entries %h and %s.
3818 * arm-dis.c: (print_insn_arm): Provide decoding of the new
3823 * d10v-opc.c (d10v_operands): Added UNUM4S; a 4-bit accumulator shift.
3824 (d10v_opcodes): Modified accumulator shift instructions to use UNUM4S.
3828 * alpha-dis.c (print_insn_alpha_osf): Remove.
3829 (print_insn_alpha_vms): Remove.
3830 (print_insn_alpha): Make globally visible. Chose the register
3831 names based on info->flavour.
3832 * disassemble.c: Always return print_insn_alpha for the alpha.
3836 * d10v-dis.c (dis_long): Handle unknown opcodes.
3840 * d10v-opc.c: Changes to support signed and unsigned numbers.
3841 All instructions with the same name that have long and short forms
3842 now end in ".l" or ".s". Divs added.
3843 * d10v-dis.c: Changes to support signed and unsigned numbers.
3847 * d10v-dis.c: Change all functions to use info->print_address_func.
3851 * m68k-opc.c (m68k_opcodes): Make opcode masks for the ColdFire
3852 move ccr/sr insns more strict so that the disassembler only
3853 selects them when the addressing mode is data register.
3856 * d10v-opc.c (pre_defined_registers): Declare.
3857 * d10v-dis.c (print_operand): Now uses pre_defined_registers
3858 to pick a better name for the registers.
3862 * sparc-opc.c: Fix opcode values for fpack16, and fpackfix. Fix
3863 operands for fexpand and fpmerge. From Christian Kuehnke
3868 * alpha-dis.c (print_insn_alpha): No longer the user-visible
3869 print routine. Take new regnames and cpumask arguments.
3870 Kill the environment variable nonsense.
3871 (print_insn_alpha_osf): New function. Do OSF/1 style regnames.
3872 (print_insn_alpha_vms): New function. Do VMS style regnames.
3873 * disassemble.c (disassembler): Test bfd flavour to pick
3874 between OSF and VMS routines. Default to OSF.
3878 * configure.in: Call AC_SUBST (INSTALL_SHLIB).
3879 * configure: Rebuild.
3880 * Makefile.in (install): Use @INSTALL_SHLIB@.
3884 * configure: (bfd_d10v_arch) Add new case.
3885 * configure.in: (bfd_d10v_arch) Add new case.
3886 * d10v-dis.c: New file.
3887 * d10v-opc.c: New file.
3888 * disassemble.c (disassembler) Add entry for d10v.
3892 * m68k-opc.c (m68k_opcodes): Fix bugs in coldfire insns relating
3893 to bcc, trapfl, subxl, and wddata discovered by Andreas Schwab.
3897 * i386-dis.c: Get rid of print_insn_i8086. Use info.mach to
3898 distinguish between variants of the instruction set.
3899 * sparc-dis.c: Get rid of print_insn_sparclite. Use info.mach to
3900 distinguish between variants of the instruction set.
3904 * i386-dis.c (print_insn_i8086): New routine to disassemble using
3905 the 8086 instruction set.
3906 * i386-dis.c: General cleanups. Make most things static. Add
3907 prototypes. Get rid of static variables aflags and dflags. Pass
3908 them as args (to almost everything).
3912 * h8300-dis.c (bfd_h8_disassemble): Handle macregs in ldmac insns.
3914 * h8300-dis.c (bfd_h8_disassemble): Handle "ldm.l" and "stm.l".
3916 * h8300-dis.c (bfd_h8_disassemble): "abs" is implicitly two
3917 if the next arg is marked with SRC_IN_DST. Gross.
3919 * h8300-dis.c (bfd_h8_disassemble): Print "exr" when
3920 we're looking for and find EXR.
3922 * h8300-dis.c (bfd_h8_disassemble): We don't have a match
3923 if we're looking for KBIT and we don't find it.
3925 * h8300-dis.c (bfd_h8_disassemble): Mask off unwanted bits
3928 * h8300-dis.c (bfd_h8_disassemble): Don't set plen for
3929 3bit immediate operands.
3933 * Released binutils 2.7.
3935 * alpha-opc.c: Add new case of "mov". From Klaus Kaempf
3940 * alpha-opc.c: Correct second case of "mov" to use OPRL.
3944 * sparc-dis.c (print_insn_sparclite): New routine to print
3945 sparclite instructions.
3949 * m68k-opc.c (m68k_opcodes): Add coldfire support.
3953 * sparc-opc.c (asi_table): Add #ASI_N, #ASI_N_L, #ASI_NUCLEUS,
3954 #ASI_NUCLEUS_LITTLE. Rename #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_L
3955 to #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_LITTLE.
3959 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir):
3960 Use autoconf-set values.
3961 (docdir, oldincludedir): Removed.
3962 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3966 * alpha-opc.c: New file.
3967 * alpha-opc.h: Remove.
3968 * alpha-dis.c: Complete rewrite to use new opcode table.
3969 * configure.in: For bfd_alpha_arch, use alpha-opc.o.
3970 * configure: Rebuild with autoconf 2.10.
3971 * Makefile.in (ALL_MACHINES): Add alpha-opc.o.
3972 (alpha-dis.o): Depend upon $(INCDIR)/opcode/alpha.h, not
3974 (alpha-opc.o): New target.
3978 * sparc-dis.c (print_insn_sparc): Remove unused local variable i.
3979 Set imm_added_to_rs1 even if the source and destination register
3982 * sparc-opc.c: Add some two operand forms of the wr instruction.
3986 * h8300-dis.c (bfd_h8_disassemble): Rename "hmode" argument
3989 * disassemble.c (disassembler): Handle H8/S.
3990 * h8300-dis.c (print_insn_h8300s): New function for H8/S.
3994 * sparc-opc.c: Add beq/teq as aliases for be/te.
3996 * ppc-opc.c: Fix fcmpo opcode. From Sergei Steshenko
4001 * makefile.vms: New file.
4003 * alpha-dis.c (print_insn_alpha): Print lda ra,lit(rz) as mov.
4007 * h8300-dis.c (bfd_h8_disassemble): Always print ABS8MEM with :8,
4012 * i386-dis.c (OP_OFF): Call append_prefix.
4016 * ppc-opc.c (instruction encoding macros): Add explicit casts to
4017 unsigned long to silence a warning from the Solaris PowerPC
4022 * sparc-opc.c (sparc_opcodes): Add ultrasparc vis extensions.
4026 * sparc-dis.c (X_IMM,X_SIMM): New macros.
4028 (print_insn_sparc): Merge cases i,I,j together. New cases X,Y.
4029 * sparc-opc.c (sparc_opcodes): Use X for 5 bit shift constants,
4030 Y for 6 bit shift constants. Rewrite entries for crdcxt, cwrcxt,
4031 cpush, cpusha, cpull sparclet insns.
4035 * sparc-dis.c (compute_arch_mask): Replace ANSI style def with K&R.
4039 * sparc-opc.c: Set F_FBR on floating point branch instructions.
4040 Set F_FLOAT on other floating point instructions.
4044 * ppc-opc.c (PPC860): Macro for 860/821 specific instructions and
4046 (powerpc_opcodes): Add 860/821 specific SPRs.
4050 * configure.in: Permit --enable-shared to specify a list of
4051 directories. Set and substitute BFD_PICLIST.
4052 * configure: Rebuild.
4053 * Makefile.in (BFD_PICLIST): Rename from BFD_LIST. Change all
4054 uses. Set to @BFD_PICLIST@.
4058 * h8300-dis.c (bfd_h8_disassemble): Use "bit" for L_3 immediates,
4059 not "abs", which may be needed for the absolute in something
4060 like btst #0,@10:8. Print L_3 immediates separately from other
4061 immediates. Change ABSMOV reference to ABS8MEM.
4065 * sparc-dis.c (opcodes_initialized): Move inside print_insn_sparc.
4066 (current_arch_mask): New static global.
4067 (compute_arch_mask): New static function.
4068 (print_insn_sparc): Delete sparc_v9_p. New static local
4069 current_mach. Resort opcode table if current_mach changes.
4070 Generalize "insn not supported" test.
4071 (compare_opcodes): Prefer supported opcodes to nonsupported ones.
4072 Delete test for v9/!v9.
4073 * sparc-opc.c (MASK_*): Use SPARC_OPCODE_ARCH_MASK.
4075 (brfc): Split into CBR and FBR for coprocessor/fp branches.
4076 (brfcx): Renamed to FBRX.
4077 (condfc): Renamed to CONDFC. Pass v6notlet to CBR (standard
4078 coprocessor mnemonics are not supported on the sparclet).
4079 (condf): Renamed to CONDF.
4080 (SLCBCC2): Delete F_ALIAS flag.
4084 * sparc-opc.c (sparc_opcodes): rd must be 0 for
4085 mov foo,{%y,%psr,%wim,%tbr}. Support mov foo,%asrX.
4089 * Makefile.in (config.status): Depend upon BFD VERSION file, so
4090 that the shared library version number is set correctly.
4094 * configure.in: Use AC_CHECK_TOOL to find ar and ranlib. From
4096 * configure: Rebuild.
4100 * z8kgen.c (internal, gas): Call xmalloc rather than unchecked
4105 * configure: Rebuild with autoconf 2.8.
4109 * sparc-dis.c (print_insn_sparc): Handle 'O' operand char like 'r'.
4110 * sparc-opc.c (sparc_opcodes): Use 'O' operand char for `neg reg'.
4114 * configure.in: Don't set SHLIB or SHLINK to an empty string,
4115 since they appear as targets in Makefile.in.
4116 * configure: Rebuild.
4120 * mpw-make.sed: Edit out shared library support bits.
4124 * sparc-opc.c (v8,v6notv9): Add MASK_SPARCLET.
4125 (sparc_opcode_archs): Add MASK_V8 to sparclet entry.
4126 (sparc_opcodes): Add sparclet insns.
4127 (sparclet_cpreg_table): New static local.
4128 (sparc_{encode,decode}_sparclet_cpreg): New functions.
4129 * sparc-dis.c (print_insn_sparc): Handle sparclet cpregs.
4133 * i386-dis.c (index16): New static variable.
4134 (putop): Print jecxz for 32 bit case, jcxz for 16 bit, not the
4136 (OP_indirE): Return result of OP_E.
4137 (OP_E): Check for 16 bit addressing mode, and disassemble
4138 correctly. Optimised 32 bit case a little. Don't print
4139 "(base,index,scale)" when sib specifies only an offset.
4143 * configure.in: Set and substitute SHLIB_DEP.
4144 * configure: Rebuild.
4145 * Makefile.in (SHLIB_DEP): New variable.
4146 (LIBIBERTY_LISTS, BFD_LIST): New variables.
4147 (stamp-piclist): Depend upon LIBIBERTY_LISTS and BFD_LIST. If
4148 COMMON_SHLIB, add them to piclist with appropriate modifications.
4149 ($(SHLIB)): Depend upon $(SHLIB_DEP). Don't check COMMON_SHLIB
4150 here: just use piclist.
4154 * sparc-dis.c (MASK_V9,V9_ONLY_P,V9_P): Define.
4155 (print_insn_sparc): Rewrite v9/not-v9 tests.
4156 (compare_opcodes): Likewise.
4157 * sparc-opc.c (MASK_<ARCH>): Define.
4158 (v6,v7,v8,sparclite,v9,v9a): Redefine.
4159 (sparclet,v6notv9): Define.
4160 (sparc_opcode_archs): Delete member `conflicts'. Add `supported'.
4161 (sparc_opcodes): Delete F_NOTV9, use v6notv9 instead.
4165 * configure.in: Call AC_PROG_CC before configure.host.
4166 * configure: Rebuild.
4168 * Makefile.in (SONAME): Remove leading ../bfd/ from $(SHLIB).
4172 * i386-dis.c (onebyte_has_modrm): New static array.
4173 (twobyte_has_modrm): New static array.
4174 (print_insn_i386): Only fetch the mod/reg/rm byte if it is needed.
4178 * Makefile.in ($(SHLINK)): Check ts against $(SHLIB), not
4183 * ppc-opc.c (PPC): Undef, so default defination on Windows NT
4188 * m68k-opc.c (m68k_opcodes): The bkpt instruction is supported on
4189 m68010up, not just m68020up | cpu32.
4191 * Makefile.in (SONAME): New variable.
4192 ($(SHLINK)): Make a link to the transformed name, as well.
4193 (stamp-tshlink): New target.
4194 (install): Skip stamp-tshlink during install.
4198 * configure.in: Call AC_ARG_PROGRAM.
4199 * configure: Rebuild.
4200 * Makefile.in (program_transform_name): New variable.
4201 (install): Transform library name before installing it.
4205 * i960-dis.c (mem): Add HX dcinva instruction.
4207 Support for building as a shared library, based on patches from
4209 * configure.in: Add AC_ARG_ENABLE for shared and commonbfdlib.
4210 New substitutions: ALLLIBS, PICFLAG, SHLIB, SHLIB_CC,
4211 SHLIB_CFLAGS, COMMON_SHLIB, SHLINK.
4212 * configure: Rebuild.
4213 * Makefile.in (ALLLIBS): New variable.
4214 (PICFLAG, SHLIB, SHLIB_CC, SHLIB_CFLAGS): New variables.
4215 (COMMON_SHLIB, SHLINK): New variables.
4216 (.c.o): If PICFLAG is set, compile twice, once PIC, once normal.
4217 (STAGESTUFF): Remove variable.
4218 (all): Depend upon $(ALLLIBS) rather than $(TARGETLIB).
4219 (stamp-piclist, piclist): New targets.
4220 ($(SHLIB), $(SHLINK)): New targets.
4221 ($(OFILES)): Depend upon stamp-picdir.
4222 (disassemble.o): Build twice if PICFLAG is set.
4223 (MOSTLYCLEAN): Add pic/*.o.
4224 (clean): Remove $(SHLIB), $(SHLINK), piclist, and stamp-piclist.
4225 (distclean): Remove pic and stamp-picdir.
4226 (install): Install shared libraries.
4227 (stamp-picdir): New target.
4231 * sparc-dis.c (print_insn_sparc): Delete DISASM_RAW_INSN support.
4232 Print unknown instruction as "unknown", rather than in hex.
4236 * dis-buf.c: Include "sysdep.h" before "dis-asm.h".
4240 * sparc-opc.c (sparc_opcode_archs): Mark v8/sparclite as conflicting.
4244 * i386-dis.c (print_insn_i386): Only fetch the mod/reg/rm byte
4245 when necessary. From Ulrich Drepper
4250 * sparc-dis.c (print_insn_sparc): NUMOPCODES replaced with
4251 sparc_num_opcodes. Update architecture enum values.
4252 * sparc-opc.c (sparc_opcode_archs): Replaces architecture_pname.
4253 (sparc_opcode_lookup_arch): New function.
4254 (sparc_num_opcodes): Renamed from bfd_sparc_num_opcodes.
4255 (sparc_opcodes): Add v9a shutdown insn.
4259 * sparc-dis.c (print_insn_sparc): Renamed from print_insn.
4260 If DISASM_RAW_INSN, print insn in hex. Handle v9a as opcode
4262 (print_insn_sparc64): Deleted.
4263 * disassemble.c (disassembler, case bfd_arch_sparc): Always use
4266 * sparc-opc.c (architecture_pname): Add v9a.
4270 * alpha-opc.h (alpha_insn_set): VAX floating point opcode was
4271 incorrectly defined as 0x16 when it should be 0x15.
4272 (FLOAT_FORMAT_MASK): function code is 11 bits, not just 7 bits!
4273 (alpha_insn_set): added cvtst and cvttq float ops. Also added
4274 excb (exception barrier) which is defined in the Alpha
4275 Architecture Handbook version 2.
4276 * alpha-dis.c (print_insn_alpha): Fixed special-case decoding for
4277 OPERATE_FORMAT_CODE type instructions. The bug caused mulq to be
4278 disassembled as or, for example.
4282 * mips-dis.c (print_insn_arg): Print cases 'i' and 'u' in hex.
4283 (_print_insn_mips): Change i from int to unsigned int.
4287 * ppc-opc.c (powerpc_opcodes): tlbi POWER opcode form different
4288 from tlbie PowerPC opcode. Add PPC603 tlbld and tlbli.
4292 * i386-dis.c: Added Pentium Pro instructions.
4296 * ppc-opc.c (fsqrt{,.}): Duplicate for PowerPC in addition to
4301 * sh-opc.h (sh_nibble_type): Added REG_B.
4302 (sh_arg_type): Added A_REG_B.
4303 (sh_table): Added pref and bank reg versions of ldc, ldc.l, stc
4305 * sh-dis.c (print_insn_shx): Added cases for REG_B and A_REG_B.
4309 * disassemble.c (disassembler): Use new bfd_big_endian macro.
4313 * Makefile.in (distclean): Remove stamp-h. From Ronald
4319 * alpha-dis.c (print_insn_alpha): fixed decoding of cpys
4324 * sh-opc.h (sh_arg_type): Added A_SSR and A_SPC.
4325 (sh_table): Added many SH3 opcodes.
4326 * sh-dis.c (print_insn_shx): Added cases for A_SSR and A_SPC.
4330 * ppc-opc.c (subfc., subfco): Mark this PPCCOM, not PPC.
4331 (subco,subco.): Mark this PPC, not PPCCOM.
4335 * configure: Rebuild with autoconf 2.7.
4339 * configure: Rebuild with autoconf 2.6.
4343 * configure.in: Sort list of architectures. Accept but do nothing
4344 for alliant, convex, pyramid, romp, and tahoe.
4348 * a29k-dis.c (print_special): Change num to unsigned int.
4352 * a29k-dis.c (print_insn): Cast insn24 to unsigned long when
4357 * configure.in: Call AC_CHECK_PROG to find and cache AR.
4358 * configure: Rebuilt.
4362 * configure.in: Add case for bfd_i860_arch.
4363 * configure: Rebuild.
4367 * m68k-opc.c (m68k_opcodes): Correct fmoveml operands.
4368 * m68k-dis.c (NEXTSINGLE): Change i to unsigned int.
4369 (NEXTDOUBLE): Likewise.
4370 (print_insn_m68k): Don't match fmoveml if there is more than one
4371 register in the list.
4372 (print_insn_arg): Handle a place of '8' for a type of 'L'.
4376 * m68k-opc.c: Use #W rather than #w.
4377 * m68k-dis.c (print_insn_arg): Handle new 'W' place.
4381 * m68k-opc.c (m68k_opcode_aliases): Add dbfw as an alias for dbf,
4382 and likewise for all the dbxx opcodes.
4386 * arc-dis.c: Include elf-bfd.h rather than libelf.h.
4390 * mips-opc.c: Added shorthand (V1) for INSN_4100 manifest. Added
4391 the VR4100 specific instructions to the mips_opcodes structure.
4395 * mpw-config.in, mpw-make.sed: Remove ugly workaround for
4396 ugly Metrowerks bug in CW6, is fixed in CW7.
4400 * ppc-opc.c (whole file): Add flags for common/any support.
4404 * Makefile.in (BISON): Remove macro.
4405 (FLAGS_TO_PASS): Remove BISON.
4411 * m68k-dis.c (print_insn_m68k): Recognize all two-word
4412 instructions that take no args by looking at the match mask.
4413 (print_insn_arg): Always print "%" before register names.
4414 [case 'c']: Use "nc" for the no-cache case, as recognized by gas.
4415 [case '_']: Don't print "@#" before address.
4416 [case 'J']: Use "%s" as format string, not register name.
4417 [case 'B']: Treat place == 'C' like 'l' and 'L'.
4421 * i386-dis.c: Describe cmpxchg8b operand, and spell the opcode
4428 * alpha-opc.h (MEMORY_FUNCTION_FORMAT_MASK): added.
4429 (alpha_insn_set): added definitions for VAX floating point
4430 instructions (Unix compilers don't generate these, but handcoded
4431 assembly might still use them).
4433 * alpha-dis.c (print_insn_alpha): added support for disassembling
4434 the miscellaneous instructions in the Alpha instruction set.
4438 * mpw-config.in: Add m68k-opc.c.o to BFD_MACHINES for m68k,
4439 no longer create sysdep.h, sed ppc-opc.c to work around a
4440 serious Metrowerks C bug.
4441 * mpw-make.in: Remove.
4442 * mpw-make.sed: New file, used by mpw-configure to edit
4443 Makefile.in into an MPW makefile.
4447 * Makefile.in (maintainer-clean): New synonym for realclean.
4451 * m68k-opc.c: Split pmove patterns which use 'P' into patterns
4452 which use '0', '1', and '2' instead. Specify the proper size for
4453 a pmove immediate operand. Correct the pmovefd patterns to be
4454 moves to a register, not from a register.
4455 * m68k-dis.c (print_insn_arg): Replace 'P' with '0', '1', '2'.
4459 * sparc-opc.c (sparc_opcodes): Mark all insns that reference
4460 %psr, %wim, %tbr as F_NOTV9.
4464 * Makefile.in (Makefile): Just rebuild Makefile when running
4466 (config.h, stamp-h): New targets.
4467 * configure.in: Call AC_CONFIG_HEADER and AC_CANONICAL_SYSTEM
4468 earlier. Don't bother to call AC_ARG_PROGRAM. Touch stamp-h when
4469 rebuilding config.h.
4470 * configure: Rebuild.
4472 * mips-opc.c: Change unaligned loads and stores with "t,A"
4473 operands to use "t,A(b)".
4477 * sh-dis.c (print_insn_shx): Add F_FR0 support.
4481 * sh-dis.c (print_insn_shx): Change loop over op->arg[n] to iterate
4482 until 3 instead of until 2.
4486 * Makefile.in (ALL_CFLAGS): Define.
4487 (.c.o, disassemble.o): Use $(ALL_CFLAGS).
4488 (MOSTLYCLEAN): Add config.log.
4489 (distclean): Don't remove config.log.
4490 * configure.in: Substitute HDEFINES.
4491 * configure: Rebuild.
4495 * sh-opc.h (sh_arg_type): Add F_FR0.
4496 (sh_table, case fmac): Add F_FR0 as first argument.
4500 * sh-opc.h (sh_opcode_info): Increase arg array size to 4.
4504 * sparc-dis.c: Remove all references to NO_V9.
4508 * aclocal.m4: Just include ../bfd/aclocal.m4.
4509 * configure: Rebuild.
4513 * sparc-dis.c (X_DISP19): Define.
4514 (print_insn, case 'G'): Use it.
4515 (print_insn, case 'L'): Sign extend displacement.
4519 * configure.in: Run ../bfd/configure.host before AC_PROG_CC.
4520 Subsitute CFLAGS and AR. Call AC_PROG_INSTALL. Don't substitute
4521 host_makefile_frag or frags.
4522 * aclocal.m4: New file.
4523 * configure: Rebuild.
4524 * Makefile.in (INSTALL): Set to @INSTALL@.
4525 (INSTALL_PROGRAM): Set to @INSTALL_PROGRAM@.
4526 (INSTALL_DATA): Set to @INSTALL_DATA@.
4528 (AR_FLAGS): Set to rc rather than qc.
4529 (CC): Define as @CC@.
4530 (CFLAGS): Set to @CFLAGS@.
4531 (@host_makefile_frag@): Remove.
4532 (config.status): Remove dependency upon @frags@.
4534 * configure.in: ../bfd/config.bfd now just sets shell variables.
4535 Use them rather than looking through target Makefile fragments.
4536 * configure: Rebuild.
4540 * sh-opc.h (ftrc): Change FPUL_N to FPUL_M.
4544 * sparc-opc.c (sparc_opcodes): Delete duplicate wr %y insn.
4545 Add clrx, iprefetch, signx, clruw, cas, casl, casx, casxl synthetic
4548 * sparc-opc.c (sparc_opcodes): Fix prefetcha insn.
4549 (lookup_{name,value}): New functions.
4550 (prefetch_table): New static local.
4551 (sparc_{encode,decode}_prefetch): New functions.
4552 * sparc-dis.c (print_insn): Handle '*' arg (prefetch function).
4556 * sh-opc.h: Add blank lines to improve readabililty of sh3e
4561 * sh-dis.c: Correct comment on first line of file.
4565 * disassemble.c (disassembler): Handle bfd_mach_sparc64.
4567 * sparc-opc.c (asi, membar): New static locals.
4568 (sparc_{encode,decode}_{asi,membar}): New functions.
4569 (sparc_opcodes, membar insn): Fix.
4570 * sparc-dis.c (print_insn): Call sparc_decode_asi.
4571 Support decoding of membar masks.
4576 * m68k-opc.c (m68k_opcode_aliases): Add br, brs, brb, brw, brl.
4580 * m68k-opc.c (m68k_opcode_aliases): Add bhib as an alias for bhis,
4581 and likewise for the other branches. Add bhs as an alias for bcc,
4582 and likewise for the size variants. Add dbhs as an alias for
4587 * sh-opc.h (FP sts instructions): Update to match reality.
4591 * m68k-dis.c: (fpcr_names): Add % before all register names.
4592 (reg_names): Likewise.
4593 (print_insn_arg): Don't explicitly print % before register names.
4594 Add % before register names in static array names. In case 'r',
4595 print data registers as `@(Dn)', not `Dn@'. When printing a
4596 memory address, don't print @# before it.
4597 (print_indexed): Change base_disp and outer_disp from int to
4598 bfd_vma. Print using MIT syntax, not mutant invalid Motorola
4599 syntax. Sign extend 8 byte displacement correctly.
4600 (print_base): Print using MIT syntax. Print zpc when appropriate.
4601 Change parameter disp from int to bfd_vma.
4603 * m68k-opc.c (m68k_opcode_aliases): Add jsrl and jsrs as aliases
4608 * sh-dis.c (print_insn_shx): Handle new operand types F_REG_N,
4609 F_REG_M, FPSCR_M, FPSCR_N, FPUL_M and FPUL_N.
4610 * sh-opc.h (sh_arg_type): Add new operand types.
4611 (sh_table): Add new opcodes from SH3E Floating Point ISA.
4615 * Makefile.in (distclean): Remove generated file config.h.
4619 * Makefile.in (distclean): Remove generated file config.h.
4623 * m68k-opc.c: New file, holding tables from include/opcode/m68k.h.
4625 * m68k-dis.c: Remove BREAK_UP_BIG_DECL stuff.
4627 (print_insn_m68k): Change d to be const. Use m68k_numopcodes
4628 rather than numopcodes. Use m68k_opcodes rather than removed
4629 opcode function. Don't check F_ALIAS.
4630 (print_insn_arg): Change first parameter to be const char *.
4631 * Makefile.in (ALL_MACHINES): Add m68k-opc.o.
4632 (m68k-opc.o): New target.
4633 * configure.in: Build m68k-opc.o for bfd_m68k_arch.
4634 * configure: Rebuild.
4638 * sparc-dis.c (HASH_SIZE, HASH_INSN): Define.
4639 (opcode_bits, opcode_hash_table): New variables.
4640 (opcodes_initialized): Renamed from opcodes_sorted.
4641 (build_hash_table): New function.
4642 (is_delayed_branch): Use hash table.
4643 (print_insn): Renamed from print_insn_sparc, made static.
4644 Build and use hash table. If !sparc64, ignore sparc64 insns,
4645 and vice-versa if sparc64.
4646 (print_insn_sparc, print_insn_sparc64): New functions.
4647 (compare_opcodes): Move sparc64 opcodes to end.
4648 Print commutative insns with constant second.
4649 * sparc-opc.c (all non-v9 insns): Use flag F_NOTV9 instead of F_ALIAS.
4653 * sh-dis.c (print_insn_shx): Remove unused local dslot. Use
4654 print_address_func for A_BDISP12 and A_BDISP8. Correct test which
4655 avoids printing a delay slot in a delay slot.
4656 * sh-opc.h (sh_table): Fully bracket last entry.
4660 * sparc-opc.c (sllx, srax, srlx): Fix disassembly.
4664 * configure.in: Get host_makefile_frag from ${srcdir}.
4666 * configure.in: Autoconfiscated. Check for string[s].h. Create
4667 config.h from config.in. Don't set up sysdep.h link.
4668 * sysdep.h: New file.
4669 * configure, config.in: New files, generated from configure.in.
4670 * Makefile.in: Updated to be processed autoconf-style.
4671 (distclean): Keep sysdep.h. Remove config.log and config.cache.
4672 (Makefile): Depend on config.status.
4673 (config.status): New rule.
4674 * configure.bat: Update Makefile substitutions.
4678 * mips-opc.c (L1): Define.
4679 (mips_opcodes): Add R4010 instructions: flushi, flushd, flushid,
4680 addciu, madd, maddu, ffc, ffs, msub, msubu, selsi, selsr, waiti,
4685 * mips-opc.c (mips_opcodes): For the move pseudo-op, prefer daddu
4686 if ISA 3 and addu otherwise, replacing or, since some MIPS chips
4687 have multiple add units but only a single logical unit.
4689 * ppc-opc.c (powerpc_operands): Change CR to use a bitsize of 3,
4690 shifted by 18, without any insertion or extraction function.
4691 (insert_cr, extract_cr): Remove.
4695 * m68k-dis.c (print_insn_arg, print_indexed): Print "%" before
4700 * mpw-config.in: Add sh and i386 configs, remove sparc config.
4701 * sh-opc.h: Add copyright.
4705 * Makefile.in (crunch-m68k): Delete extra target accidentally
4706 checked in a while ago.
4710 * sh-opc.h (sh_table): Add SH3 support.
4714 * sh-opc.h: Added bsrf and braf.
4718 * arm-opc.h (arm_opcodes): Add 64-bit multiply patterns. Delete
4719 bogus [ls]fm{ea,fd} patterns.
4721 * arm-opc.h (arm_opcodes): Correct typos in stm, ldm, std, and ldc.
4722 * arm-dis.c (print_insn_arm): Make GIVEN a parameter, don't try and
4723 initialize it from memory. Make function static.
4724 (print_insn_{big,little}_arm): New functions.
4725 * disassemble.c (disassembler, case bfd_arch_arm): Disassemble for
4726 the correct endianness.
4730 * sh-opc.h (sh_nibble_type, sh_arg_type): remove trailing , from
4735 * m68k-dis.c (opcode): Finish change made by Kung Hsu on April
4736 17th, so that it builds again using GCC as the compiler.
4740 * mips-dis.c (print_insn_little_mips): Cast return value from
4741 bfd_getl32 from bfd_vma to unsigned long, because _print_insn_mips
4742 expects an unsigned long, and that might be fewer words of
4743 argument storage (e.g., if bfd_vma is long long on a 32-bit
4745 (print_insn_big_mips): Likewise with bfd_getb32 value.
4746 (_print_insn_mips): Now static.
4750 * m68k-dis.c: Take out #define BREAK_UP_BIG_DECL kludge, because
4751 gcc memory hog problem with initializer is fixed.
4755 Merge in support for Mac MPW as a host.
4756 (Old change descriptions retained for informational value.)
4758 * mpw-config.in (archname): Compute from the config.
4759 (BFD_MACHINES, ARCHDEFS): Put into mk.tmp.
4761 * mpw-config.in (target_arch): Compute from canonical target.
4762 (m68k, mips, powerpc, sparc): Add architectures.
4763 * mpw-make.in (disassemble.c.o): Add.
4764 (ALL_CFLAGS): Remove special flags (-mc68020 -mc68881 -model far).
4766 * mpw-config.in (BFD_MACHINES): Set to a default value.
4767 * mpw-make.in (BFD_MACHINES): Remove wired-in value.
4769 * mpw-make.in (CSEARCH): Add extra-include to search path.
4771 * mpw-config.in (varargs.h): Don't create.
4772 (sysdep.h): Create using forward-include.
4773 * mpw-make.in (CSEARCH): Add include/mpw to search path.
4775 * mpw-config.in: New file, MPW version of configure.in.
4776 * mpw-make.in: New file, MPW version of Makefile.in.
4780 * alpha-dis.c (print_insn_alpha): Put empty statement after
4785 * hppa-dis.c (sign_extend): Delete, redundant with libhppa.h version.
4786 (low_sign_extend): Likewise.
4787 (get_field): Delete unused function.
4788 (set_field, deposit_14, deposit_21): Likewise.
4792 * i386-dis.c: Support for more pentium opcodes. From Guy Harris
4799 * alpha-opc.h (OSF_ASMCODE): define
4800 print pal-code names as defined in App C of the
4801 Alpha Architecture Reference Manual
4803 * alpha-dis.c: cleaned up output
4804 print stylized code forms as defined in App A.4.3 of the
4805 Alpha Architecture Reference Manual
4809 * mips-opc.c: Add new mips4 instructions. Don't set INSN_RFE for
4811 * mips-dis.c (print_insn_arg): Handle new argument types 'h', 'R',
4816 * m68k-dis.c (opcode): New function. Returns address of opcode
4817 table entry given index, even if the opcode table was split to
4818 work around gcc bugs.
4819 (print_insn_m68k): Call opcode instead of referencing m68k_opcodes
4821 (BREAK_UP_BIG_DECL): Make secondary array static and const.
4822 (reg_names): Now const.
4823 (print_insn_arg): Arrays cacheFieldName and names now const.
4824 (print_indexed): Array scales now const.
4828 * ppc-opc.c: Sort recently added instructions by minor opcode
4829 number within major opcode number.
4833 * hppa-dis.c: Include libhppa.h.
4837 * mips-opc.c: Change dli to use M_DLI, and add dla.
4841 * Makefile.in (ALL_MACHINES): Add w65-dis.o.
4845 * mips-opc.c: Add r4650 mul instruction.
4849 * mips-opc.c: Add uld and usd macros for unaligned double load and
4854 * ppc-opc.c (powerpc_opcodes): Add 403GA opcodes rfci, dccci,
4855 mfdcr, mtdcr, icbt, iccci.
4859 * i960-dis.c (struct tabent, struct sparse_tabent): Change the
4860 signed char fields to shorts, more portable.
4864 * i960-dis.c (struct tabent, struct sparse_tabent): Declare the
4865 char fields as signed chars, since they may have negative values.
4869 * i386-dis.c (dis386_twobyte): Add cpuid, From Charles Hannum
4875 * ppc-opc.c (extract_bdm): Correct parenthezisation.
4876 * ppc-dis.c (print_insn_powerpc): Print .long before unrecognized
4881 * ppc-opc.c: Changes based on patch from David Edelsohn
4883 (powerpc_operands): Add operands SPRBAT and SPRG. Split TBR out of
4886 (insert_tbr): New static function.
4887 (extract_tbr): New static function.
4888 (XFXFXM_MASK, XFXM): Define.
4889 (XSPRBAT_MASK, XSPRG_MASK): Define.
4890 (powerpc_opcodes): Add instructions to access special registers by
4891 name. Add mtcr and mftbu.
4895 * mips-opc.c (P3): Define.
4896 (mips_opcodes): Add mad and madu.
4898 Sun Jan 15 16:32:59 1995 Steve Chamberlain <sac@splat>
4900 * configure.in: Add W65 support.
4901 * disassemble.c: Likewise.
4902 * w65-opc.h, w65-dis.c: New files.
4906 * h8300-dis.c (bfd_h8_disassemble): Add support for 2 bit
4911 * mips-opc.c: Add dli as a synonym for li.
4915 * alpha-dis.c (print_insn_alpha): Handle call_pal instruction, and
4916 print something for reserved opcode values, even if it won't
4919 * mips-dis.c (_print_insn_mips): When initializing, shift right
4920 and mask, to avoid sign extension problems on the Alpha.
4922 * m68k-dis.c (print_insn_arg, case 'J'): Handle buscr and pcr
4927 * sh-opc.h (mov.l gbr): Get direction right.
4928 * sh-dis.c (print_insn_shx): New function.
4929 (print_insn_shl, print_insn_sh): Call print_insn_shx to
4930 print opcodes with right byte order.
4934 * ns32k-dis.c (struct ns32k_option): Renamed from struct option,
4935 to avoid conflicts with getopt.
4939 * hppa-dis.c (print_insn_hppa): Read the instruction using
4940 bfd_getb32, so that it works on a little endian or 64 bit host.
4941 Remove unused local variable op.
4945 * mips-opc.c: Use or instead of addu for pseudo-op move, since
4946 addu does not work correctly if -mips3.
4950 * a29k-dis.c (print_special): Add special register names defined
4951 on 29030, 29040 and 29050.
4952 (print_insn): Handle new operand type 'I'.
4956 * Makefile.in (INSTALL): Use top level install.sh script.
4960 * sparc-dis.c: Rewrite to use bitfields, rather than a union, so
4961 that it works on a little endian host.
4965 * configure.in: Use ${config_shell} when running config.bfd.
4969 * mips-opc.c (mips_opcodes): "dabs" is only available with -mips3.
4973 * a29k-dis.c (print_insn): Print the opcode.
4977 * mips-opc.c (mips_opcodes): Set WR_t for sc and scd.
4981 * hppa-dis.c (reg_names): Use r26-r23 for arg0-arg3.
4985 * mips-opc.c: Set INSN_STORE_MEMORY flag for all instructions
4986 which store a value into memory.
4990 * configure.in, Makefile.in, disassemble.c: Add support for the ARM.
4991 * arm-dis.c, arm-opc.h: New files.
4995 * Makefile.in (ns32k-dis.o): Add dependency.
4996 * ns32k-dis.c (print_insn_arg): Declare initialized local as
4997 string, not as array of chars.
5001 * sparc-dis.c (print_insn_sparc): Handle new operand type 'x'.
5003 * sparc-opc.c: Added sparclite extended FP operations, and
5004 versions of v9 impdep* instructions permitting specification of
5009 * i960-dis.c (reg_names): Now const.
5010 (struct sparse_tabent): New type, copied from array type in mem
5012 (ctrl): Local static array ctrl_tab now const.
5013 (cobr): Local static array cobr_tab now const.
5014 (mem): Local variables reg1, reg2, reg3 now point to const. Local
5015 static variable mem_tab no longer explicitly initialized. Changed
5016 mem_init to const array of struct sparse_tabent.
5017 (reg): Local static variable reg_tab no longer explicitly
5018 initialized. Changed reg_init to const array of struct
5020 (ea): Local static array scale_tab now const.
5022 * i960-dis.c (reg): Added i960JX instructions to reg_init table.
5027 * configure.bat: the disassember needs to be enabled for
5028 "objdump -d" to work in djgpp.
5032 * ns32k-dis.c: Deleted all code in "#ifdef GDB".
5033 (invalid_float): Enabled general version, doesn't require running
5034 on ns32k host. Changed to take char* argument, and test for
5035 explicitly specified sizes, instead of using sizeof() on host CPU
5037 (INVALID_FLOAT): Cast first argument.
5038 (opt_u, opt_U, opt_O, opt_C, opt_S, list_P532, list_M532,
5039 list_P032, list_M032): Now const.
5040 (optlist, list_search): Made appropriate arguments now point to
5042 (print_insn_arg): Changed static array of one-character-string
5043 pointers into a static const array of characters; fixed sprintf
5044 statement accordingly.
5048 * opcodes/ns32k-dis.c: Semi-new file. Had apparently been dropped
5049 from distribution. A ns32k-dis.c from a previous distribution has
5050 been brought up to date and supports the new interface.
5052 * disassemble.c: define ARCH_ns32k and add case bfd_arch_ns32k.
5054 * configure.in: add bfd_ns32k_arch target support.
5056 * Makefile.in: add ns32k-dis.o to ALL_MACHINES.
5057 Add ns32k-dis.c to CFILES. Add dependencies for ns32k-dis.o.
5061 * h8300-dis.c (bfd_h8_disassemble): Get 16bit branch
5066 * h8300-dis.c, mips-dis.c: Don't use true and false.
5070 * configure.in: Change --with-targets to --enable-targets.
5074 * mips-dis.c (_print_insn_mips): Build a static hash table mapping
5075 opcodes to the first instruction with that opcode, to speed
5081 * Makefile.in (mostlyclean): Fix typo (was mostyclean).
5085 * configure.bat: update to latest makefile.in
5089 * a29k-dis.c (print_insn): Print 'x' type operand in hex.
5090 * h8300-dis.c (bfd_h8_disassemble): Print 16bit rels correctly.
5091 * sh-dis.c (print_insn_sh): Don't recur endlessly if delay
5092 slot insn is in a delay slot.
5093 * z8k-opc.h: (resflg): Fix patterns.
5094 * h8500-opc.h Fix CR insn patterns.
5098 * ppc-opc.c (powerpc_opcodes): Put PowerPC versions of "cmp" and
5099 "cmpl" before POWER versions, so that gas -many uses them.
5103 * disassemble.c: New file.
5104 * Makefile.in (OFILES): Add disassemble.o.
5105 (disassemble.o): Provide dependencies; compile with $(ARCHDEFS).
5106 * configure.in: Define ARCHDEFS in Makefile. Code taken from
5107 binutils/configure.in.
5109 * m68k-dis.c (print_insn_m68k): If F_ALIAS flag is set, skip the
5110 opcode being examined.
5114 * ppc-opc.c (powerpc_operands): Added RAL, RAM and RAS.
5115 (insert_ral, insert_ram, insert_ras): New functions.
5116 (powerpc_opcodes): Use RAL for load with update, RAM for lmw, and
5117 RAS for store with update.
5121 * ppc-opc.c (powerpc_opcodes): Correct fcir. From David Edelsohn
5126 * mips-opc.c (mips_opcodes): Correct operands of "nor" with an
5131 * sparc-opc.c (sparc_opcodes): Fix "rd %fprs,%l0".
5135 * ppc-opc.c (powerpc_operands): The signedp field has been
5136 removed, so don't initialize it. Set the PPC_OPERAND_SIGNED flag
5137 instead. Add new operand SISIGNOPT.
5138 (powerpc_opcodes): For lis, liu, addis, and cau use SISIGNOPT.
5140 * ppc-dis.c (print_insn_powerpc): Check PPC_OPERAND_SIGNED rather
5145 * i386-dis.c (struct private): Renamed to dis_private. `private'
5146 is a reserved word for dynix cc.
5150 * configure.in: Change error message to refer to bfd/config.bfd
5151 rather than bfd/configure.in.
5155 * ppc-opc.c: Define POWER2 as short alias flag.
5156 (powerpc_opcodes): Add POWER/2 opcodes lfq*, stfq*, fcir[z], and
5161 * i960-dis.c (print_insn_i960): Don't read a second word for
5162 opcodes 0, 1, 2 and 3.
5166 * configure.in: Don't build m68881-ext.o for bfd_m68k_arch.
5170 * m68881-ext.c: Removed; no longer used.
5171 * Makefile.in: Changed accordingly.
5173 * m68k-dis.c (ext_format_68881): Don't declare.
5174 (print_insn_m68k): If an instruction uses place 'i', it uses at
5175 least four fixed bytes.
5176 (print_insn_arg): Don't bump p by 2 for case 'I', place 'i'. For
5177 extended float, convert to double using floatformat_to_double, not
5178 ieee_extended_to_double, and fetch the data before converting it.
5182 * mips-opc.c: It's sqrt.s, not sqrt.w. From
5187 * ppc-opc.c (powerpc_opcodes): The POWER uses bdn[l][a] where the
5188 PowerPC uses bdnz[l][a].
5192 * dis-buf.c, i386-dis.c: Include sysdep.h.
5196 * configure.in (bfd_powerpc_arch): Use ppc-dis.o and ppc-opc.o.
5198 * ppc-opc.c (powerpc_opcodes): Mark POWER instructions supported
5199 by Motorola PowerPC 601 with PPC_OPCODE_601.
5200 * ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc):
5201 Disassemble Motorola PowerPC 601 instructions as well as normal
5202 PowerPC instructions.
5206 * i960-dis.c (reg, mem): Just use a static array instead of
5211 * hppa-dis.c (print_insn_hppa): For '?' and '@' only adjust the
5212 condition name index if this is for a negated condition.
5214 * hppa-dis.c (print_insn_hppa): No space before 'H' operand.
5215 Floating point format for 'H' operand is backwards from normal
5216 case (0 == double, 1 == single). For '4', '6', '7', '9', and '8'
5217 operands (fmpyadd and fmpysub), handle bizarre register
5218 translation correctly for single precision format.
5220 * hppa-dis.c (print_insn_hppa): Do not emit a space after 'F'
5221 or 'I' operands if the next format specifier is 'M' (fcmp
5222 condition completer).
5226 * ppc-opc.c (powerpc_operands): New operand type MBE to handle a
5227 single number giving a bitmask for the MB and ME fields of an M
5228 form instruction. Change NB to accept 32, and turn it into 0;
5229 also turn 0 into 32 when disassembling. Seperated SH from NB.
5230 (insert_mbe, extract_mbe): New functions.
5231 (insert_nb, extract_nb): New functions.
5232 (SC_MASK): Mask out SA and LK bits.
5233 (powerpc_opcodes): Change "cal" to use RT, D, RA rather than RT,
5234 RA, SI. Change "liu" and "cau" to use UI rather than SI. Mark
5235 "bctr" and "bctrl" as accepted by POWER. Change "rlwimi",
5236 "rlimi", "rlwimi.", "rlimi.", "rlwinm", "rlinm", "rlwinm.",
5237 "rlinm.", "rlmi", "rlmi.", "rlwnm", "rlnm", "rlwnm.", "rlnm." to
5238 use MBE rather than MB. Add "mfmq" and "mtmq" POWER instructions.
5239 (powerpc_macros): Define table of macro definitions.
5240 (powerpc_num_macros): Define.
5242 * ppc-dis.c (print_insn_powerpc): Don't skip optional operands
5243 if PPC_OPERAND_NEXT is set.
5247 * i960-dis.c (print_insn_i960): Make buffer bfd_byte instead of
5248 char. Retrieve contents using bfd_getl32 instead of shifting.
5252 * ppc-opc.c: New file. Opcode table for PowerPC, including
5253 opcodes for POWER (RS/6000).
5254 * ppc-dis.c: New file. PowerPC and Power (RS/6000) disassembler.
5255 * Makefile.in (ALL_MACHINES): Add ppc-dis.o and ppc-opc.o.
5256 (CFILES): Add ppc-dis.c.
5257 (ppc-dis.o, ppc-opc.o): New targets.
5258 * configure.in: Build ppc-dis.o and ppc-opc.o for bfd_rs6000_arch.
5262 * hppa-dis.c (print_insn_hppa): Handle 'N' in assembler template.
5263 No space before 'u', 'f', or 'N'.
5267 * i386-dis.c (print_insn_i386): Add FIXME comment regarding reading
5268 farther than we should.
5270 * i386-dis.c (dis386): Use Yb and Yv for scasb and scasS.
5274 * sparc-dis.c m68k-dis.c alpha-dis.c a29k-dis.c: Fix comments.
5278 * i960-dis.c (print_insn_i960): Only read word2 if the instruction
5279 needs it, to prevent reading past the end of a section.
5283 * mips-opc.h: Use macro for j instruction, to support SVR4 PIC.
5284 Removed t,A case for la; always use t,A(b) case.
5289 * mips-dis.c (print_insn_arg): Handle 'k'.
5290 * mips-opc.c: Make cache use k, not t.
5294 * alpha-opc.h, alpha-dis.c (print_insn_alpha): Add
5295 FLOAT_MEMORY_FORMAT_CODE, FLOAT_BRANCH_FORMAT_CODE, correct
5296 FLOAT_FORMAT_CODE to put out floating point register names.
5300 * mips-opc.c: Use macros for jal variants, to support SVR4 PIC.
5304 * a29k-dis.c (print_insn): Use 0x%08x, not 0x%8x.
5308 * mips-opc.c (dsll, dsra, dsrl): Added '>' cases for shift counts
5309 larger than 32. Moved dsxx32 variants first for disassembler.
5313 * z8kgen.c, z8k-opc.h: Add full lda information.
5317 * hppa-dis.c (print_insn_hppa): Do not emit a space after
5318 movb instructions. Any necessary space will be emitted by
5319 the code to handle nullification completers.
5323 * mips-opc.c: Moved l.d down so that it disassembles as ldc1.
5327 * alpha-opc.h: Add ldl_l, fix typo for ldq_u.
5328 * alpha-dis.c (print_insn_alpha): Add code for PAL_FORMAT_CODE.
5332 * mips-opc.c: Correct lwu opcode value (book had it wrong).
5336 * z8k-dis.c (FETCH_DATA): get just the right amount of data.
5337 (unpack_instr): Cope with ARG_IMM4M1 type instructions.
5341 * m88k-dis.c (m88kdis): comment change. Remove space after
5343 (printop): handle new arg types DEC and XREG for m88110.
5347 * hppa-dis.c (print_insn_hppa): Handle 'z' operand
5348 type for absolute branch addresses. Delete special
5349 "ble" and "be" code in 'W' operand code.
5353 * mips-opc.c: Set hazard information correctly for branch
5354 likely instructions.
5358 * alpha-dis.c (print_insn_alpha), alpha-opc.h: Fix bugs, use
5359 info->fprintf_func for printing and info->print_address_func for
5364 * mips-opc.c: Set INSN_TRAP for tXX instructions.
5369 Corrected second case of "b" for disassembler.
5373 * mips-dis.c, m88k-dis.c: Don't include libbfd.h. Changed calls
5374 to BFD swapping routines to correspond to BFD name changes.
5378 * mips-opc.c: Change div machine instruction to be z,s,t rather
5379 than s,t. Change div macro to be d,v,t rather than d,s,t.
5380 Likewise for divu, ddiv, ddivu. Added z,s,t case for drem, dremu,
5381 rem and remu which generates only the corresponding div
5382 instruction. This is for compatibility with the MIPS assembler,
5383 which only generates the simple machine instruction when an
5384 explicit destination of $0 is used.
5385 * mips-dis.c (print_insn_arg): Handle 'z' (always register zero).
5390 WR_31 hazard for bal, bgezal, bltzal.
5394 * hppa-dis.c (print_insn_hppa): Use print function
5395 from within the disassemble_info, not fprintf_filtered.
5399 * hppa-dis.c (print_insn_hppa): Handle '|' like '>'. (From Jeff
5404 * mips-opc.c ("absu"): Removed.
5409 * mips-opc.c: Added r6000 and r4000 instructions and macros.
5410 Changed hazard information to distinguish between memory load
5411 delays and coprocessor load delays.
5415 * mips-opc.c: li.d uses "T,L", not "S,F". Added li.s.
5419 * configure.in: Don't pass cpu to config.bfd.
5423 * m88k-dis.c (m88kdis): Make class unsigned.
5427 * alpha-dis.c (print_insn_alpha): One branch format case was
5428 missing the instruction name.
5432 * Makefile.in (ALL_MACHINES): Renamed from DIS_LIBS.
5433 Add the arch-specific auxiliary files.
5434 (OFILES): Remove the arch-specific auxiliary files
5435 and use BFD_MACHINES instead of DIS_LIBS.
5436 * configure.in: Set BFD_MACHINES based on --with-targets option.
5440 * mips-opc.c: Added lwc1 E,A(b) to go with lwc1 T,A(b). Similarly
5445 * sparc-opc.c: Change CONST to const to deal with gcc
5446 -Dconst=__const -traditional.
5451 coprocessor instructions out of #if 0, and made them use new
5456 * sparc-dis.c: Include ansidecl.h before opcodes/sparc.h.
5460 * sparc-opc.c: Add F_JSR, F_UNBR, or F_CONDBR flags to each branch
5461 instruction, for use by the disassembler.
5463 * sparc-dis.c (SEX): Add sign extension macro. Replace many
5464 hand-coded sign extensions that depended on 32-bit host ints.
5465 FIXME, we still depend on big-endian host bitfield ordering.
5466 (sparc_print_insn): Set the insn_info_valid field, and the
5467 other fields that describe the instruction being printed.
5471 * sparc-opc.c (call): Accept all 6 addressing modes valid for
5472 `jmp' instead of just one of them.
5476 * hppa-dis.c: Move floating registers from reg_names to fp_reg_names.
5477 (fput_fp_reg_r): Renamed from fput_reg_r.
5478 (fput_fp_reg): New function.
5479 (print_insn_hppa): Use fput_fp_reg{,_r} where appropriate.
5481 * hppa-dis.c (print_insn_hppa, cases 'a', 'd'): Print space afterwards.
5483 * hppa-dis.c (print_insn_hppa, case 'd'): Use GET_COND not GET_FIELD.
5487 * hppa-dis.c (print_insn_hppa): Use extract_5r_store for 'r'.
5489 * hppa-dis.c (print_insn_hppa, case '>'): If next character is 'n',
5490 don't output a space.
5492 * hppa-dis.c (float_format_names): 10 is undefined, and 11 is quad.
5496 * mips-opc.c: New file, containing opcode table from
5497 ../include/opcode/mips.h.
5498 * Makefile.in: Add it.
5502 * m88k-dis.c: New file, moved in from gdb and changed to use the
5503 new dis-asm.h disassembler interface.
5504 * Makefile.in (DIS_LIBS): Added m88k-dis.o.
5505 (m88k-dis.o): New target.
5509 * mips-dis.c (print_insn_arg, _print_insn_mips): Made pointer to
5510 argument string const char * to correspond to opcode/mips.h.
5514 * mips-dis.c: Updated to account for name changes in new version
5516 * Makefile.in: Added header file dependencies.
5520 * h8300-dis.c (bfd_h8_disassemble): Correct fetching of instruction.
5524 * m68k-dis.c (NEXTWORD, NEXTLONG): Use ((x) ^ 0x8000) - 0x8000 to sign
5525 extend, rather than shifts.
5529 * Makefile.in: Undo 15 June change.
5533 * m68k-dis.c (print_insn_arg): Change return value to byte count
5535 * m68k-dis.c: Re-write to detect invalid operands before
5536 printing anything, so we can handle this the same way we
5537 handle invalid opcodes.
5541 * sh-dis.c, sh-opc.h: Understand some more opcodes.
5545 * hppa-dis.c: Include <ansidecl.h> and sysdep.h before other
5550 * sparc-dis.c: Don't declare qsort, since sysdep.h might.
5552 * configure.in: Do make sysdep.h link.
5553 * Makefile.in: Search ../include. Don't search ../bfd.
5558 * hppa-dis.c: Fix typo. 'a' and 'd' were reversed.
5559 Do not print a space before the completers specified by
5564 * mips-dis.c: No longer need to bomb out if HOST_64_BIT is
5565 defined, since gdb has been fixed.
5568 * hppa-dis.c (print_insn_hppa): Last argument to fput_reg,
5569 fput_reg_r, fput_creg, fput_const, and fputs_filtered should
5570 be a *disassemble_info, not a *FILE.
5571 * hppa-dis.c: Support 'd', '!', and 'a'.
5572 * hppa-dis.c: Support 's' to extract a 2 bit space register.
5573 * hppa-dis.c: Delete cases which are no longer needed.
5577 * m68k-dis.c (print_insn_{m68k,arg}): Add MMU codes.
5581 * h8300-dis.c: New file, removed from bfd/cpu-h8300.c, with
5586 * Makefile.in (CSEARCH): Add -I../bfd for sysdep.h and bfd.h.
5587 * configure.in: No longer need to configure to get sysdep.h.
5592 * hppa-dis.c: Support 'I', 'J', and 'K' in output
5593 templates for 1.1 FP computational instructions.
5597 * h8500-dis.c (print_insn_h8500): Address argument is type
5599 * z8k-dis.c (print_insn_z8k, print_insn_z8001, print_insn_z8002):
5602 * h8500-opc.h (addr_class_type): No comma at end of enumerator.
5603 * sh-opc.h (sh_nibble_type, sh_arg_type): Ditto.
5605 * sparc-dis.c (compare_opcodes): Move static declaration to
5610 * sparc-dis.c (print_insn_sparc): Implement 'n' argument for unimp
5611 instruction, remove unimp hack from 'l' argument.
5615 * z8k-dis.c (fetch_data): Use unsigned char to make ancient gcc's
5621 * mips-dis.c (print_insn_arg): Handle 'C' for general coprocessor
5626 * hppa-dis.c: Include dis-asm.h before sysdep.h. Changed some
5627 arrays of string pointers to 2-d arrays of chars, to save
5632 * a29k-dis.c, alpha-dis.c, i960-dis.c, sparc-dis.c, z8k-dis.c:
5633 Cast second arg to read_memory_func to "bfd_byte *", as necessary.
5637 * hppa-dis.c: New file from Utah, adapted to new disassembler
5639 * Makefile.in: Include it.
5643 * sh-dis.c, sh-opc.h: New files.
5647 * alpha-dis.c, alpha-opc.h: New files.
5651 * mips-dis.c: Sign extend 'j' and 'b' arguments, delta is a signed
5656 * sparc-dis.c: Make "ta" the default trap instruction, "t" the alias.
5660 * a29k-dis.c, sparc-dis.c, sparc-opc.c: Use CONST rather than
5665 * sparc-dis.c: Use fprintf_func a few places where I forgot,
5666 and double percent signs a few places.
5668 * a29k-dis.c, i960-dis.c: New, merged from gdb and binutils.
5670 * i386-dis.c, m68k-dis.c, mips-dis.c, sparc-dis.c:
5671 Use info->print_address_func not print_address.
5673 * dis-buf.c (generic_print_address): New function.
5677 * Makefile.in: Add sparc-dis.c.
5678 sparc-dis.c: New file, merges binutils and gdb versions as follows:
5680 Add `add' instruction to the set that get checked
5681 for a preceding `sethi' in order to print an absolute address.
5682 * (print_insn): Disassembly prefers real instructions.
5683 (is_delayed_branch): Speed up.
5684 * sparc-opcode.h: Add ALIAS bit to aliases. Fix up opcode tables.
5685 Still missing some float ops, and needs testing.
5686 * sparc-pinsn.c (print_insn): Eliminate 'set' test, subsumed by
5687 F_ALIAS. Use printf, not fprintf, when not passing a file
5689 (compare_opcodes): Check that identical instructions have
5690 identical opcodes, complain otherwise.
5693 * Include reg_names.
5695 Use dis-asm.h/read_memory_func interface.
5699 * h8500-dis.c, i386-dis.c, m68k-dis.c, z8k-dis.c (fetch_data):
5700 deliberately return non-zero to setjmp from longjmp. Otherwise
5701 this code fails to compile.
5705 * m68k-dis.c: Fix prototype for fetch_arg().
5709 * dis-buf.c: New file, for new read_memory_func interface.
5710 Makefile.in (OFILES): Include it.
5711 m68k-dis.c, i386-dis.c, h8500-dis.c, mips-dis.c, z8k-dis.c:
5712 Use new read_memory_func interface.
5716 * h8500-dis.c (print_insn_h8500): Get sign of fp offsets right.
5717 * h8500-opc.h: Fix couple of opcodes.
5719 Wed Mar 24 02:03:36 1993 david d `zoo' zuhn (zoo at poseidon.cygnus.com)
5721 * Makefile.in: add dvi & installcheck targets
5725 * Makefile.in: Update for h8500-dis.c.
5729 * h8500-dis.c, h8500-opc.h: New files
5733 * mips-dis.c, z8k-dis.c: Converted to use interface defined in
5734 ../include/dis-asm.h.
5735 * m68k-dis.c: New file (merge of ../binutils/m68k-pinsn.c
5736 and ../gdb/m68k-pinsn.c).
5737 * i386-dis.c: New file (merge of ../binutils/i386-pinsn.c
5738 and ../gdb/i386-pinsn.c).
5739 * m68881-ext.c: New file. Moved definition of
5740 ext_format ext_format_68881 from ../gdb/m68k-tdep.c.
5741 * Makefile.in: Adjust for new files.
5743 * m68k-dis.c: Recognize '9' placement code, so (say) pflush
5744 can be dis-assembled.
5748 * mips-dis.c (print_insn_arg): Now returns void.
5752 * mips-dis.c (ansidecl.h): Include for benefit of sysdep.h
5753 files that use the macros.
5757 * mips-dis.c: New file, from gdb/mips-pinsn.c.
5758 * Makefile.in (DIS_LIBS): Added mips-dis.o.
5759 (CFILES): Added mips-dis.c.
5763 * z8k-dis.c (print_insn_z8001, print_insn_z8002): new routines
5764 * z8kgen.c, z8k-opc.h: fix sizes of some shifts.
5768 * Makefile.in: Improve *clean rules.
5769 * configure.in: Allow a default host.
5771 Tue Nov 17 19:53:54 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com)
5773 * Makefile.in: also use -I$(srcdir)/../bfd, since some sysdep
5774 files include other sysdep files
5778 * z8k-dis.c z8k-opc.h z8kgen.c: checkpoint
5782 * configure.in: For host support, use ../bfd/configure.host
5783 so it stays in sync with the ../bfd/hosts database.
5785 Thu Oct 1 23:38:54 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com)
5787 * configure.in: use cpu-vendor-os triple instead of nested cases
5791 * z8k-dis.c (unparse_instr): fix bug where opcode returned was
5792 *always* the wrong one.
5796 * z8kgen.c: added copyright info
5800 * z8k-dis.c (unparse_instr): prettier tabs
5801 * z8kgen.c -> z8k-opc.h: bug fixes in tables
5803 Fri Sep 25 12:50:32 1992 Stu Grossman (grossman at cygnus.com)
5805 * configure.in: Add ncr* configuration.
5806 * z8k-dis.c (struct instr_data_s): Make instr_asmsrc char to make
5807 picayune ANSI compilers happy.
5811 * configure.in (i386): Make i386 and i486 synonymous for now.
5812 * configure.in (i[34]86-*-sysv4): Add my_host definition.
5816 * Makefile.in (install): Fix typo.
5820 * Makefile.in (make): Remove obsolete crud.
5821 (sparc-opc.o): Avoid Sun Make VPATH bug.
5825 * Makefile.in: since there are no SUBDIRS, remove rule and
5826 references of subdir_do.
5830 * Makefile.in (install): Get the library name right here too.
5831 Don't install bfd.h, since it's unrelated to this library. No
5832 subdirs to recurse into, either.
5833 (CFILES): The source file has a .c suffix, not .o.
5835 * sparc-opc.c: New file, moved from BFD.
5836 * Makefile.in (OFILES): Build it.
5840 * z8k-dis.c: fixed forward refferences of some declarations.
5844 * Makefile.in: get the name of the library right
5848 * z8k-dis.c: knows how to disassemble z8k stuff
5849 * z8k-opc.h: new file full of z8000 opcodes
5853 version-control: never