3 * doc/c-arm.texi (ARM Directives): Remove duplicate .pad entry.
7 * config/tc-aarch64.c (md_assemble): Defer the feature checking until
12 * config/tc-rx.c (rx_include): Rename 'eof' to 'last_char' in
13 order to avoid conflict with same named variable in MinGW system
18 * config/tc-msp430.c (mcu_types): Add some more 430X mcu names.
19 (OPTION_INTR_NOPS): Define.
20 (gen_interrupt_nops): Default to FALSE.
21 (md_parse_opton): Add support for OPTION_INTR_NOPS.
22 (md_longopts): Add -mn.
23 (md_show_usage): Add -mn.
24 (msp430_operands): Generate NOPs for all MCUs not just 430Xv2.
25 * doc/c-msp430.c: Document -mn.
32 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nds32.c.
33 (TARGET_CPU_HFILES): Add config/tc-nds32.h.
34 * Makefile.in: Regenerate.
35 * configure.in (nds32): Add nds32 target extension config support.
36 * configure.tgt : Add case for nds32-*-elf* and nds32-*-linux*.
37 * configure: Regenerate.
38 * config/tc-nds32.c: New file for nds32.
39 * config/tc-nds32.h: New file for nds32.
40 * doc/Makefile.am (CPU_DOCS): Add c-nds32.texi.
41 * doc/Makefile.in: Regenerate.
42 * doc/as.texinfo: Add nds32 options.
43 * doc/all.texi: Set NDS32.
44 * doc/c-nds32.texi: New file dor nds32 document.
45 * NEWS: Announce Andes nds32 support.
49 * Makefile.am (install-exec-bindir): Prefix libtool invocation
50 with $(INSTALL_PROGRAM_ENV).
51 (install-exec-tooldir): Likewise.
52 * Makefile.in: Regenerate.
56 * config/bfin-aux.h: Remove +x file mode.
57 * config/tc-epiphany.c: Likewise.
58 * config/tc-epiphany.h: Likewise.
62 * config/tc-i386-intel.c (i386_intel_simplify): Avoid arithmetic
71 * config/tc-aarch64.c (parse_sys_reg): Do not issue error messages
72 for deprecated system registers when parsing pstate fields.
76 * config/tc-aarch64.c (parse_sys_reg): Do not issue error messages
77 for deprecated system registers when parsing pstate fields.
81 * config/tc-mips.c (mips_fix_pmc_rm7000): Declare.
82 (options): Add OPTION_FIX_PMC_RM7000 and OPTION_NO_FIX_PMC_RM7000.
83 (md_longopts): Add mfix-pmc-rm7000 and mno-fix-pmc-rm7000.
85 (INSN_DMULTU): Define.
86 (insns_between): Detect PMC RM7000 errata.
87 (md_parse_option): Supprt OPTION_FIX_PMC_RM7000 and
88 OPTION_NO_FIX_PMC_RM7000.
89 * doc/as.texinfo: Document new options.
90 * doc/c-mips.texi: Likewise.
95 * app.c (do_scrub_chars): Only insert a newline character if
96 end-of-file has been reached.
100 * config/tc-i386.c (lex_got): Add a dummy "int bnd_prefix"
105 * config/tc-arm.c (arm_archs): New armv7ve architecture option.
106 (arm_cpus): Replace ARM_ARCH_V7A_IDIV_MP_SEC_VIRT with
107 ARM_ARCH_V7VE for cortex-a7, cortex-a12 and cortex-a15.
108 (cpu_arch_ver): Likewise.
109 * doc/c-arm.texi: Document armv7ve.
113 * config/tc-aarch64.c (parse_sys_reg): Support
114 S2_<op1>_<Cn>_<Cm>_<op2>.
122 * config/tc-aarch64.c (set_other_error): New function.
123 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
124 the variable to which it points with 'o'.
125 (parse_operands): Update; check for write to read-only system
126 registers or read from write-only ones.
130 * config/tc-i386.c (reloc): Add an argument, bnd_prefix, to
131 indicate if instruction has the BND prefix. Return
132 BFD_RELOC_X86_64_PC32_BND instead of BFD_RELOC_32_PCREL if
133 bnd_prefix isn't zero.
134 (output_branch): Pass BFD_RELOC_X86_64_PC32_BND to frag_var
136 (output_jump): Update reloc call.
137 (output_interseg_jump): Likewise.
138 (output_disp): Likewise.
139 (output_imm): Likewise.
140 (x86_cons_fix_new): Likewise.
141 (lex_got): Add an argument, bnd_prefix, to indicate if
142 instruction has the BND prefix. Use BFD_RELOC_X86_64_PLT32_BND
144 (x86_cons): Update lex_got call.
145 (i386_immediate): Likewise.
146 (i386_displacement): Likewise.
147 (md_apply_fix): Handle BFD_RELOC_X86_64_PC32_BND and
148 BFD_RELOC_X86_64_PLT32_BND.
149 (tc_gen_reloc): Likewise.
150 * config/tc-i386-intel.c (i386_operator): Update lex_got call.
154 * config/tc-aarch64.c (set_other_error): New function.
155 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
156 the variable to which it points with 'o'.
157 (parse_operands): Update; check for write to read-only system
158 registers or read from write-only ones.
162 * config/tc-i386.c (check_VecOperands): Reorder checks.
166 * config/mips/tc-mips.c (convert_reg_type): Use
167 INSN_LOAD_MEMORY instead of INSN_LOAD_MEMORY_DELAY.
168 (reg_needs_delay): Likewise.
169 (insns_between): Likewise.
173 * config/tc-ppc.c (ppc_elf_localentry): Add cast.
177 * config/tc-aarch64.c (parse_sys_reg): Update to use aarch64_sys_reg;
178 call aarch64_sys_reg_deprecated_p and warn about the deprecated
183 * config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1.
188 * config/tc-aarch64.c (parse_operands): Avoid trying to
189 parse a vector register as an immediate.
193 * config/tc-i386.c (check_long_reg): Correct comment indentation.
194 (check_qword_reg): Correct comment and its indentation.
195 (check_word_reg): Extend comment and correct its indentation. Also
196 check for 64-bit register.
200 * config/tc-ppc.c (md_pseudo_table): Add .localentry.
201 (ppc_elf_localentry): New function.
202 (ppc_force_relocation): Force relocs on all branches to localenty
204 (ppc_fix_adjustable): Don't reduce such symbols to section+offset.
208 * config/tc-ppc.c: Include elf/ppc64.h.
209 (ppc_abiversion): New variable.
210 (md_pseudo_table): Add .abiversion.
211 (ppc_elf_abiversion, ppc_elf_end): New functions.
212 * config/tc-ppc.h (md_end): Define.
216 * config/tc-ppc.c (SEX16): Don't mask.
217 (REPORT_OVERFLOW_HI): Define as zero.
218 (ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
219 @tprel@high, and @tprel@higha modifiers.
220 (md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
221 Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
223 (md_apply_fix): Similarly.
227 * config/tc-mips.c (fpr_read_mask): Test MSA registers.
228 (fpr_write_mask): Test MSA registers.
229 (can_swap_branch_p): Check fpr write followed by fpr read.
233 * config/tc-tic6x.c (tic6x_parse_operand): Revert previous delta.
238 * config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
239 (md_longopts): Add mmsa and mno-msa.
240 (mips_ases): Add msa.
241 (RTYPE_MASK): Update.
242 (RTYPE_MSA): New define.
243 (OT_REG_ELEMENT): Replace with...
244 (OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
245 (mips_operand_token): Replace reg_element with index.
246 (mips_parse_argument_token): Treat vector indices as separate tokens.
247 Handle register indices.
248 (md_begin): Add MSA register names.
249 (operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
250 (convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
251 (match_mdmx_imm_reg_operand): Update accordingly.
252 (match_imm_index_operand): New function.
253 (match_reg_index_operand): New function.
254 (match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
255 (md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
256 (md_show_usage): Print -mmsa and -mno-msa.
257 * doc/as.texinfo: Document -mmsa and -mno-msa.
258 * doc/c-mips.texi: Document -mmsa and -mno-msa.
259 Document .set msa and .set nomsa.
263 * read.c (add_include_dir): Use xrealloc.
264 * config/tc-score.c (do_macro_bcmp): Initialise inst_main.
265 * config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.
269 * config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
270 also test/refer to "sstatus". Reformat the warning message.
274 * tc-xgate.c (xgate_find_match): Refactor opcode matching.
278 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
279 swapping for bndmk, bndldx, and bndstx.
284 * config/tc-epiphany.c (md_convert_frag): Add missing break
288 * config/tc-mn10200.c (md_convert_frag): Add missing break
293 * tc-i386.c (check_word_reg): Remove misplaced "else".
294 (check_long_reg): Restore symmetry with check_word_reg.
298 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
303 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
304 for "<foo>a". Issue error messages for unrecognised or corrrupt
309 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
314 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
315 * doc/c-i386.texi: Add -march=bdver4 option.
319 * configure: Regenerate.
323 * NEWS: Add marker for 2.24.
327 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
328 (move_data): New variable.
329 (md_parse_option): Parse -md.
330 (msp430_section): New function. Catch references to the .bss or
331 .data sections and generate a special symbol for use by the libcrt
333 (md_pseudo_table): Intercept .section directives.
334 (md_longopt): Add -md
335 (md_show_usage): Likewise.
336 (msp430_operands): Generate a warning message if a NOP is inserted
337 into the instruction stream.
338 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
342 * config/tc-mips.c (mips_elf_final_processing): Set
343 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
347 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
348 disallowing element size 64 with interleave other than 1.
352 * config/tc-mips.c (match_insn): Set error when $31 is used for
357 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
363 * config/tc-arm.c (T16_32_TAB): Add _udf.
364 (do_t_udf): New function.
369 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
370 assembler errors at correct position.
375 * config/tc-ia64.c: Fix typos.
376 * config/tc-sparc.c: Likewise.
377 * config/tc-z80.c: Likewise.
378 * doc/c-i386.texi: Likewise.
379 * doc/c-m32r.texi: Likewise.
383 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
384 for pre-indexed addressing modes.
388 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
389 range check label number for use with fb_low_counter array.
393 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
394 (mips_parse_argument_token, validate_micromips_insn, md_begin)
395 (check_regno, match_float_constant, check_completed_insn, append_insn)
396 (match_insn, match_mips16_insn, match_insns, macro_start)
397 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
398 (mips16_ip, mips_set_option_string, md_parse_option)
399 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
400 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
401 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
402 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
403 Start error messages with a lower-case letter. Do not end error
404 messages with a period. Wrap long messages to 80 character-lines.
405 Use "cannot" instead of "can't" and "can not".
409 * config/tc-mips.c (imm_expr): Expand comment.
410 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
415 * config/tc-mips.c (imm2_expr): Delete.
416 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
420 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
421 (macro): Remove M_DEXT and M_DINS handling.
425 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
426 lax_max with lax_match.
427 (match_int_operand): Update accordingly. Don't report an error
428 for !lax_match-only cases.
429 (match_insn): Replace more_alts with lax_match and use it to
430 initialize the mips_arg_info field. Add a complete_p parameter.
431 Handle implicit VU0 suffixes here.
432 (match_invalid_for_isa, match_insns, match_mips16_insns): New
434 (mips_ip, mips16_ip): Use them.
438 * config/tc-mips.c (match_expression): Report uses of registers here.
439 Add a "must be an immediate expression" error. Handle elided offsets
441 (match_int_operand): ...here.
445 * config/tc-mips.c (mips_arg_info): Remove soft_match.
446 (match_out_of_range, match_not_constant): New functions.
447 (match_const_int): Remove fallback parameter and check for soft_match.
448 Use match_not_constant.
449 (match_mapped_int_operand, match_addiusp_operand)
450 (match_perf_reg_operand, match_save_restore_list_operand)
451 (match_mdmx_imm_reg_operand): Update accordingly. Use
452 match_out_of_range and set_insn_error* instead of as_bad.
453 (match_int_operand): Likewise. Use match_not_constant in the
454 !allows_nonconst case.
455 (match_float_constant): Report invalid float constants.
456 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
457 match_float_constant to check for invalid constants. Fail the
458 match if match_const_int or match_float_constant return false.
459 (mips_ip): Update accordingly.
460 (mips16_ip): Likewise. Undo null termination of instruction name
461 once lookup is complete.
465 * config/tc-mips.c (mips_insn_error_format): New enum.
466 (mips_insn_error): New struct.
467 (insn_error): Change to a mips_insn_error.
468 (clear_insn_error, set_insn_error_format, set_insn_error)
469 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
471 (mips_parse_argument_token, md_assemble, match_insn)
472 (match_mips16_insn): Use them instead of manipulating insn_error
474 (mips_ip, mips16_ip): Likewise. Simplify control flow.
478 * config/tc-mips.c (normalize_constant_expr): Move further up file.
479 (normalize_address_expr): Likewise.
480 (match_insn, match_mips16_insn): New functions, split out from...
481 (mips_ip, mips16_ip): ...here.
485 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
487 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
488 for optional operands.
492 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
497 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
501 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
502 argument as alignment.
506 * config/tc-rl78.c (elf_flags): New variable.
507 (enum options): Add OPTION_G10.
508 (md_longopts): Add mg10.
509 (md_parse_option): Parse -mg10.
510 (rl78_elf_final_processing): New function.
511 * config/tc-rl78.c (tc_final_processing): Define.
512 * doc/c-rl78.texi: Document -mg10 option.
516 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
517 suffixes to be elided too.
518 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
519 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
524 * po/POTFILES.in: Regenerate.
529 * config/tc-sparc.c (sparc_arch_types): Add leon.
530 (sparc_arch): Move sparc4 around and add leon.
531 (sparc_target_format): Document -Aleon.
532 * doc/c-sparc.texi: Likewise.
536 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
541 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
542 (RWARN): Bump to 0x8000000.
543 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
544 (RTYPE_R5900_ACC): New register types.
545 (RTYPE_MASK): Include them.
546 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
548 (reg_names): Include them.
549 (mips_parse_register_1): New function, split out from...
550 (mips_parse_register): ...here. Add a channels_ptr parameter.
551 Look for VU0 channel suffixes when nonnull.
552 (reg_lookup): Update the call to mips_parse_register.
553 (mips_parse_vu0_channels): New function.
554 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
555 (mips_operand_token): Add a "channels" field to the union.
556 Extend the comment above "ch" to OT_DOUBLE_CHAR.
557 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
558 (mips_parse_argument_token): Handle channel suffixes here too.
559 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
560 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
562 (md_begin): Register $vfN and $vfI registers.
563 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
564 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
565 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
566 (match_vu0_suffix_operand): New function.
567 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
568 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
569 (mips_lookup_insn): New function.
570 (mips_ip): Use it. Allow "+K" operands to be elided at the end
571 of an instruction. Handle '#' sequences.
575 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
576 values and use it instead of sreg, treg, xreg, etc.
580 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
581 and mips_int_operand_max.
582 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
584 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
585 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
586 instead of mips16_immed_operand.
590 * config/tc-mips.c (mips16_macro): Don't use move_register.
591 (mips16_ip): Allow macros to use 'p'.
595 * config/tc-mips.c (MAX_OPERANDS): New macro.
596 (mips_operand_array): New structure.
597 (mips_operands, mips16_operands, micromips_operands): New arrays.
598 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
599 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
600 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
601 (micromips_to_32_reg_q_map): Delete.
602 (insn_operands, insn_opno, insn_extract_operand): New functions.
603 (validate_mips_insn): Take a mips_operand_array as argument and
604 use it to build up a list of operands. Extend to handle INSN_MACRO
606 (validate_mips16_insn): New function.
607 (validate_micromips_insn): Take a mips_operand_array as argument.
609 (md_begin): Initialize mips_operands, mips16_operands and
610 micromips_operands. Call validate_mips_insn and
611 validate_micromips_insn for macro instructions too.
612 Call validate_mips16_insn for MIPS16 instructions.
613 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
615 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
616 them. Handle INSN_UDI.
617 (get_append_method): Use gpr_read_mask.
621 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
622 flags for MIPS16 and non-MIPS16 instructions.
623 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
624 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
625 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
626 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
627 and non-MIPS16 instructions. Fix formatting.
631 * config/tc-mips.c (reg_needs_delay): Move later in file.
633 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
646 * config/tc-i386-intel.c (O_zmmword_ptr): New.
647 (i386_types): Add zmmword.
648 (i386_intel_simplify_register): Allow regzmm.
649 (i386_intel_simplify): Handle zmmwords.
650 (i386_intel_operand): Handle RC/SAE, vector operations and
652 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
653 (struct RC_Operation): New.
654 (struct Mask_Operation): New.
655 (struct Broadcast_Operation): New.
656 (vex_prefix): Size of bytes increased to 4 to support EVEX
658 (enum i386_error): Add new error codes: unsupported_broadcast,
659 broadcast_not_on_src_operand, broadcast_needed,
660 unsupported_masking, mask_not_on_destination, no_default_mask,
661 unsupported_rc_sae, rc_sae_operand_not_last_imm,
662 invalid_register_operand, try_vector_disp8.
663 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
664 rounding, broadcast, memshift.
665 (struct RC_name): New.
666 (RC_NamesTable): New.
669 (extra_symbol_chars): Add '{'.
670 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
671 (i386_operand_type): Add regzmm, regmask and vec_disp8.
672 (match_mem_size): Handle zmmwords.
673 (operand_type_match): Handle zmm-registers.
674 (mode_from_disp_size): Handle vec_disp8.
675 (fits_in_vec_disp8): New.
676 (md_begin): Handle {} properly.
677 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
678 (build_vex_prefix): Handle vrex.
679 (build_evex_prefix): New.
680 (process_immext): Adjust to properly handle EVEX.
681 (md_assemble): Add EVEX encoding support.
682 (swap_2_operands): Correctly handle operands with masking,
683 broadcasting or RC/SAE.
684 (check_VecOperands): Support EVEX features.
685 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
686 (match_template): Support regzmm and handle new error codes.
687 (process_suffix): Handle zmmwords and zmm-registers.
688 (check_byte_reg): Extend to zmm-registers.
689 (process_operands): Extend to zmm-registers.
690 (build_modrm_byte): Handle EVEX.
691 (output_insn): Adjust to properly handle EVEX case.
692 (disp_size): Handle vec_disp8.
693 (output_disp): Support compressed disp8*N evex feature.
694 (output_imm): Handle RC/SAE immediates properly.
695 (check_VecOperations): New.
696 (i386_immediate): Handle EVEX features.
697 (i386_index_check): Handle zmmwords and zmm-registers.
698 (RC_SAE_immediate): New.
699 (i386_att_operand): Handle EVEX features.
700 (parse_real_register): Add a check for ZMM/Mask registers.
701 (OPTION_MEVEXLIG): New.
702 (OPTION_MEVEXWIG): New.
703 (md_longopts): Add mevexlig and mevexwig.
704 (md_parse_option): Handle mevexlig and mevexwig options.
705 (md_show_usage): Add description for mevexlig and mevexwig.
706 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
707 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
711 * config/tc-i386.c (cpu_arch): Add .sha.
712 * doc/c-i386.texi: Document sha/.sha.
718 * config/tc-i386.c (BND_PREFIX): New.
719 (struct _i386_insn): Add new field bnd_prefix.
720 (add_bnd_prefix): New.
722 (i386_operand_type): Add regbnd.
723 (md_assemble): Handle BND prefixes.
724 (parse_insn): Likewise.
725 (output_branch): Likewise.
726 (output_jump): Likewise.
727 (build_modrm_byte): Handle regbnd.
728 (OPTION_MADD_BND_PREFIX): New.
729 (md_longopts): Add entry for 'madd-bnd-prefix'.
730 (md_parse_option): Handle madd-bnd-prefix option.
731 (md_show_usage): Add description for madd-bnd-prefix
733 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
737 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
742 * config/tc-s390.c (s390_machine): Don't force the .machine
743 argument to lower case.
747 * config/tc-arm.c (s_arm_arch_extension): Improve error message
748 for invalid extension.
752 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
753 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
754 (aarch64_abi): New variable.
755 (ilp32_p): Change to be a macro.
756 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
757 (struct aarch64_option_abi_value_table): New struct.
758 (aarch64_abis): New table.
759 (aarch64_parse_abi): New function.
760 (aarch64_long_opts): Add entry for -mabi=.
761 * doc/as.texinfo (Target AArch64 options): Document -mabi.
762 * doc/c-aarch64.texi: Likewise.
766 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
771 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
773 * config/rx-parse.y: (rx_check_float_support): Add function to
774 check floating point operation support for target RX100 and
776 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
777 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
778 RX200, RX600, and RX610
782 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
786 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
787 * doc/c-avr.texi: Likewise.
791 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
792 error with older GCCs.
793 (mips16_macro_build): Dereference args.
797 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
798 New functions, split out from...
799 (reg_lookup): ...here. Remove itbl support.
800 (reglist_lookup): Delete.
801 (mips_operand_token_type): New enum.
802 (mips_operand_token): New structure.
803 (mips_operand_tokens): New variable.
804 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
805 (mips_parse_arguments): New functions.
806 (md_begin): Initialize mips_operand_tokens.
807 (mips_arg_info): Add a token field. Remove optional_reg field.
808 (match_char, match_expression): New functions.
809 (match_const_int): Use match_expression. Remove "s" argument
810 and return a boolean result. Remove O_register handling.
811 (match_regno, match_reg, match_reg_range): New functions.
812 (match_int_operand, match_mapped_int_operand, match_msb_operand)
813 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
814 (match_addiusp_operand, match_clo_clz_dest_operand)
815 (match_lwm_swm_list_operand, match_entry_exit_operand)
816 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
817 (match_tied_reg_operand): Remove "s" argument and return a boolean
818 result. Match tokens rather than text. Update calls to
819 match_const_int. Rely on match_regno to call check_regno.
820 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
821 "arg" argument. Return a boolean result.
822 (parse_float_constant): Replace with...
823 (match_float_constant): ...this new function.
824 (match_operand): Remove "s" argument and return a boolean result.
825 Update calls to subfunctions.
826 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
827 rather than string-parsing routines. Update handling of optional
828 registers for token scheme.
832 * config/tc-mips.c (parse_float_constant): Split out from...
837 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
842 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
843 (match_entry_exit_operand): New function.
844 (match_save_restore_list_operand): Likewise.
845 (match_operand): Use them.
846 (check_absolute_expr): Delete.
847 (mips16_ip): Rewrite main parsing loop to use mips_operands.
851 * config/tc-mips.c: Enable functions commented out in previous patch.
852 (SKIP_SPACE_TABS): Move further up file.
853 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
854 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
855 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
856 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
857 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
858 (micromips_imm_b_map, micromips_imm_c_map): Delete.
859 (mips_lookup_reg_pair): Delete.
860 (macro): Use report_bad_range and report_bad_field.
861 (mips_immed, expr_const_in_range): Delete.
862 (mips_ip): Rewrite main parsing loop to use new functions.
866 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
867 Change return type to bfd_boolean.
868 (report_bad_range, report_bad_field): New functions.
869 (mips_arg_info): New structure.
870 (match_const_int, convert_reg_type, check_regno, match_int_operand)
871 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
872 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
873 (match_addiusp_operand, match_clo_clz_dest_operand)
874 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
875 (match_pc_operand, match_tied_reg_operand, match_operand)
876 (check_completed_insn): New functions, commented out for now.
880 * config/tc-mips.c (insn_insert_operand): New function.
881 (macro_build, mips16_macro_build): Put null character check
882 in the for loop and convert continues to breaks. Use operand
883 structures to handle constant operands.
887 * config/tc-mips.c (validate_mips_insn): Move further up file.
888 Add insn_bits and decode_operand arguments. Use the mips_operand
889 fields to work out which bits an operand occupies. Detect double
891 (validate_micromips_insn): Move further up file. Call into
896 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
900 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
902 (macro): Update accordingly.
906 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
908 (md_assemble): Remove imm_reloc handling.
909 (mips_ip): Update commentary. Use offset_expr and offset_reloc
910 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
911 Use a temporary array rather than imm_reloc when parsing
912 constant expressions. Remove imm_reloc initialization.
913 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
914 for the relaxable field. Use a relax_char variable to track the
915 type of this field. Remove imm_reloc initialization.
919 * config/tc-mips.c (mips16_ip): Handle "I".
923 * config/tc-mips.c (mips_flag_nan2008): New variable.
924 (options): Add OPTION_NAN enum value.
925 (md_longopts): Handle it.
926 (md_parse_option): Likewise.
927 (s_nan): New function.
928 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
929 (md_show_usage): Add -mnan.
931 * doc/as.texinfo (Overview): Add -mnan.
932 * doc/c-mips.texi (MIPS Opts): Document -mnan.
933 (MIPS NaN Encodings): New node. Document .nan directive.
934 (MIPS-Dependent): List the new node.
938 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
942 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
943 for 'A' and assume that the constant has been elided if the result
948 * config/tc-mips.c (gprel16_reloc_p): New function.
949 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
951 (offset_high_part, small_offset_p): New functions.
952 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
953 register load and store macros, handle the 16-bit offset case first.
954 If a 16-bit offset is not suitable for the instruction we're
955 generating, load it into the temporary register using
956 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
957 M_L_DAB code once the address has been constructed. For double load
958 and store macros, again handle the 16-bit offset case first.
959 If the second register cannot be accessed from the same high
960 part as the first, load it into AT using ADDRESS_ADDI_INSN.
961 Fix the handling of LD in cases where the first register is the
962 same as the base. Also handle the case where the offset is
963 not 16 bits and the second register cannot be accessed from the
964 same high part as the first. For unaligned loads and stores,
965 fuse the offbits == 12 and old "ab" handling. Apply this handling
966 whenever the second offset needs a different high part from the first.
967 Construct the offset using ADDRESS_ADDI_INSN where possible,
968 for offbits == 16 as well as offbits == 12. Use offset_reloc
969 when constructing the individual loads and stores.
970 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
971 and offset_reloc before matching against a particular opcode.
972 Handle elided 'A' constants. Allow 'A' constants to use
973 relocation operators.
977 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
978 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
979 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
983 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
984 Require the msb to be <= 31 for "+s". Check that the size is <= 31
985 for both "+s" and "+S".
989 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
990 (mips_ip, mips16_ip): Handle "+i".
994 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
995 (micromips_to_32_reg_h_map): Rename to...
996 (micromips_to_32_reg_h_map1): ...this.
997 (micromips_to_32_reg_i_map): Rename to...
998 (micromips_to_32_reg_h_map2): ...this.
999 (mips_lookup_reg_pair): New function.
1000 (gpr_write_mask, macro): Adjust after above renaming.
1001 (validate_micromips_insn): Remove "mi" handling.
1002 (mips_ip): Likewise. Parse both registers in a pair for "mh".
1006 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
1007 (mips_ip): Remove "+D" and "+T" handling.
1011 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
1016 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
1020 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
1021 (aarch64_force_relocation): Likewise.
1025 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
1029 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
1030 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
1031 Replace @sc{mips16} with literal `MIPS16'.
1032 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
1036 * config/tc-aarch64.c (reloc_table): Replace
1037 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
1038 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
1039 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
1040 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
1041 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
1042 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
1043 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
1044 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
1045 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
1046 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
1047 (aarch64_force_relocation): Likewise.
1051 * config/tc-aarch64.c (ilp32_p): New static variable.
1052 (elf64_aarch64_target_format): Return the target according to the
1054 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
1055 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
1056 (aarch64_dwarf2_addr_size): New function.
1057 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
1058 (DWARF2_ADDR_SIZE): New define.
1062 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
1066 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
1070 * config/tc-mips.c (mips_set_options): Add insn32 member.
1071 (mips_opts): Initialize it.
1072 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
1073 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
1074 (md_longopts): Add "minsn32" and "mno-insn32" options.
1075 (is_size_valid): Handle insn32 mode.
1076 (md_assemble): Pass instruction string down to macro.
1077 (brk_fmt): Add second dimension and insn32 mode initializers.
1078 (mfhl_fmt): Likewise.
1079 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
1080 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
1081 (macro_build_jalr, move_register): Handle insn32 mode.
1082 (macro_build_branch_rs): Likewise.
1083 (macro): Handle insn32 mode.
1084 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
1085 (mips_ip): Handle insn32 mode.
1086 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
1087 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
1088 (mips_handle_align): Handle insn32 mode.
1089 (md_show_usage): Add -minsn32 and -mno-insn32.
1091 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
1092 -mno-insn32 options.
1093 (-minsn32, -mno-insn32): New options.
1094 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
1096 (MIPS assembly options): New node. Document .set insn32 and
1098 (MIPS-Dependent): List the new node.
1102 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
1103 the PC in indirect addressing on 430xv2 parts.
1104 (msp430_operands): Add version test to hardware bug encoding
1109 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
1110 so it skips whitespace before it.
1111 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
1113 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
1114 (arm_reg_parse_multi): Skip whitespace first.
1115 (parse_reg_list): Likewise.
1116 (parse_vfp_reg_list): Likewise.
1117 (s_arm_unwind_save_mmxwcg): Likewise.
1122 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
1126 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
1130 * config/tc-mips.c: Assert that offsetT and valueT are at least
1132 (GPR_SMIN, GPR_SMAX): New macros.
1133 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
1137 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
1138 conditions. Remove any code deselected by them.
1139 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
1143 * NEWS: Note removal of ECOFF support.
1144 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
1145 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
1146 (MULTI_CFILES): Remove config/e-mipsecoff.c.
1147 * Makefile.in: Regenerate.
1148 * configure.in: Remove MIPS ECOFF references.
1149 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
1151 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
1152 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
1153 (mips-*-*): ...this single case.
1154 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
1155 MIPS emulations to be e-mipself*.
1156 * configure: Regenerate.
1157 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
1158 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
1159 (mips-*-sysv*): Remove coff and ecoff cases.
1160 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
1161 * ecoff.c: Remove reference to MIPS ECOFF.
1162 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
1163 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
1164 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
1165 (mips_hi_fixup): Tweak comment.
1166 (append_insn): Require a howto.
1167 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
1171 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
1172 Use "CPU" instead of "cpu".
1173 * doc/c-mips.texi: Likewise.
1174 (MIPS Opts): Rename to MIPS Options.
1175 (MIPS option stack): Rename to MIPS Option Stack.
1176 (MIPS ASE instruction generation overrides): Rename to
1177 MIPS ASE Instruction Generation Overrides (for now).
1178 (MIPS floating-point): Rename to MIPS Floating-Point.
1182 * doc/c-mips.texi (MIPS Macros): New section.
1183 (MIPS Object): Replace with...
1184 (MIPS Small Data): ...this new section.
1188 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
1189 Capitalize name. Use @kindex instead of @cindex for .set entries.
1193 * doc/c-mips.texi (MIPS Stabs): Remove section.
1197 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
1198 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
1199 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
1200 (ISA_SUPPORTS_VIRT64_ASE): Delete.
1201 (mips_ase): New structure.
1202 (mips_ases): New table.
1203 (FP64_ASES): New macro.
1204 (mips_ase_groups): New array.
1205 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
1206 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
1208 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
1209 (md_parse_option): Use mips_ases and mips_set_ase instead of
1210 separate case statements for each ASE option.
1211 (mips_after_parse_args): Use FP64_ASES. Use
1212 mips_check_isa_supports_ases to check the ASEs against
1214 (s_mipsset): Use mips_ases and mips_set_ase instead of
1215 separate if statements for each ASE option. Use
1216 mips_check_isa_supports_ases, even when a non-ASE option
1221 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
1225 * config/tc-mips.c (md_shortopts, options, md_longopts)
1226 (md_longopts_size): Move earlier in file.
1230 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
1231 with a single "ase" bitmask.
1232 (mips_opts): Update accordingly.
1233 (file_ase, file_ase_explicit): New variables.
1234 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
1235 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
1236 (ISA_HAS_ROR): Adjust for mips_set_options change.
1237 (is_opcode_valid): Take the base ase mask directly from mips_opts.
1238 (mips_ip): Adjust for mips_set_options change.
1239 (md_parse_option): Likewise. Update file_ase_explicit.
1240 (mips_after_parse_args): Adjust for mips_set_options change.
1241 Use bitmask operations to select the default ASEs. Set file_ase
1242 rather than individual per-ASE variables.
1243 (s_mipsset): Adjust for mips_set_options change.
1244 (mips_elf_final_processing): Test file_ase rather than
1245 file_ase_mdmx. Remove commented-out code.
1249 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
1250 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
1251 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
1252 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
1253 (mips_after_parse_args): Use the new "ase" field to choose
1255 (mips_cpu_info_table): Move ASEs from the "flags" field to the
1260 * config/tc-arm.c (symbol_preemptible): New function.
1261 (relax_branch): Use it.
1267 * config/tc-mips.c (mips_set_options): Add ase_eva.
1268 (mips_set_options mips_opts): Add ase_eva.
1269 (file_ase_eva): Declare.
1270 (ISA_SUPPORTS_EVA_ASE): Define.
1271 (IS_SEXT_9BIT_NUM): Define.
1272 (MIPS_CPU_ASE_EVA): Define.
1273 (is_opcode_valid): Add support for ase_eva.
1274 (macro_build): Likewise.
1276 (validate_mips_insn): Likewise.
1277 (validate_micromips_insn): Likewise.
1278 (mips_ip): Likewise.
1279 (options): Add OPTION_EVA and OPTION_NO_EVA.
1280 (md_longopts): Add -meva and -mno-eva.
1281 (md_parse_option): Process new options.
1282 (mips_after_parse_args): Check for valid EVA combinations.
1283 (s_mipsset): Likewise.
1287 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1288 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1289 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1290 (dwarf2_gen_line_info_1): Update call accordingly.
1291 (dwarf2_move_insn): New function.
1292 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1301 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1302 (dwarf2_gen_line_info_1): Delete.
1303 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1304 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1305 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1306 (dwarf2_directive_loc): Push previous .locs instead of generating
1311 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1312 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1317 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1318 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1319 function. Generates an error if the adjusted offset is out of a
1324 * config/tc-nios2.c (md_apply_fix): Mask constant
1325 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1329 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1330 MIPS-3D instructions either.
1331 (md_convert_frag): Update the COPx branch mask accordingly.
1333 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1335 * doc/as.texinfo (Overview): Add --relax-branch and
1337 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1342 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1347 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1348 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1349 (append_insn): Change INSN_xxxx to ASE_xxxx.
1353 * gas/config/tc-avr.c: Change ISA for devices with USB support to
1358 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1363 * config/tc-mips.c (s_ehword): New.
1367 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1371 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1372 convert relocs who have no relocatable field either. Rephrase
1373 the conditional so that the PC-relative check is only applied
1378 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1383 * config/tc-aarch64.c (reloc_table): Update to use
1384 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
1385 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1386 (md_apply_fix): Likewise.
1387 (aarch64_force_relocation): Likewise.
1391 * config/tc-arm.c (it_fsm_post_encode): Improve
1392 warning messages about deprecated IT block formats.
1396 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1397 inside fx_done condition.
1401 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1405 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1406 and clean up warning when using PRINT_OPCODE_TABLE.
1410 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1411 and data fixups performing shift/high adjust/sign extension on
1412 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1413 when writing data fixups rather than recalculating size.
1417 * doc/c-msp430.texi: Fix typo.
1421 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1422 are also TOC symbols.
1426 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1427 Add -mcpu command to specify core type.
1428 * doc/c-msp430.texi: Update documentation.
1432 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1433 (mips_opts): Update for the new field.
1434 (file_ase_virt): New variable.
1435 (ISA_SUPPORTS_VIRT_ASE): New macro.
1436 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1437 (MIPS_CPU_ASE_VIRT): New define.
1438 (is_opcode_valid): Handle ase_virt.
1439 (macro_build): Handle "+J".
1440 (validate_mips_insn): Likewise.
1441 (mips_ip): Likewise.
1442 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1443 (md_longopts): Add mvirt and mnovirt
1444 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1445 (mips_after_parse_args): Handle ase_virt field.
1446 (s_mipsset): Handle "virt" and "novirt".
1447 (mips_elf_final_processing): Add a comment about virt ASE might need
1449 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1450 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1451 Document ".set virt" and ".set novirt".
1455 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1456 control of operand flag bits.
1460 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1461 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1462 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1463 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1464 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1465 Shift and sign-extend fieldval for use by some VLE reloc
1466 operand->insert functions.
1471 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1472 (limited_pcrel_reloc_p): Likewise.
1473 (md_apply_fix): Likewise.
1474 (tc_gen_reloc): Likewise.
1478 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1479 (mips_fix_adjustable): Adjust pc-relative check to use
1484 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1485 (s_mips_stab): Do not restrict to stabn only.
1489 * config/tc-msp430.c: Add support for the MSP430X architecture.
1490 Add code to insert a NOP instruction after any instruction that
1491 might change the interrupt state.
1492 Add support for the LARGE memory model.
1493 Add code to initialise the .MSP430.attributes section.
1494 * config/tc-msp430.h: Add support for the MSP430X architecture.
1495 * doc/c-msp430.texi: Document the new -mL and -mN command line
1497 * NEWS: Mention support for the MSP430X architecture.
1501 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1502 alpha*-*-linux*ecoff*.
1506 * config/tc-mips.c (mips_ip): Add sizelo.
1507 For "+C", "+G", and "+H", set sizelo and compare against it.
1511 * as.c (Options): Add -gdwarf-sections.
1512 (parse_args): Likewise.
1513 * as.h (flag_dwarf_sections): Declare.
1514 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1515 (process_entries): When -gdwarf-sections is enabled generate
1516 fragmentary .debug_line sections.
1517 (out_debug_line): Set the section for the .debug_line section end
1519 * doc/as.texinfo: Document -gdwarf-sections.
1520 * NEWS: Mention -gdwarf-sections.
1524 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1525 according to the target parameter. Don't call s_segm since s_segm
1526 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1528 (md_begin): Call s_segm according to target parameter from command
1533 * configure.in: Allow little-endian linux.
1534 * configure: Regenerate.
1538 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1539 "fstatus" control register to "eccinj".
1543 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1547 * expr.c (add_to_result, subtract_from_result): Make global.
1548 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1549 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1550 subtract_from_result to handle extra bit of precision for .sleb128
1555 * read.c (convert_to_bignum): Add sign parameter. Use it
1556 instead of X_unsigned to determine sign of resulting bignum.
1557 (emit_expr): Pass extra argument to convert_to_bignum.
1558 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1559 X_extrabit to convert_to_bignum.
1560 (parse_bitfield_cons): Set X_extrabit.
1561 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1562 Initialise X_extrabit field as appropriate.
1563 (add_to_result): New.
1564 (subtract_from_result): New.
1566 * expr.h (expressionS): Add X_extrabit field.
1570 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1571 register being PC when is_t or writeback, and use distinct
1572 diagnostic for the latter case.
1576 * gas/config/tc-arm.c (parse_operands): Re-write
1577 po_barrier_or_imm().
1578 (do_barrier): Remove bogus constraint().
1579 (do_t_barrier): Remove.
1583 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1584 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1586 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1590 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1591 Use local variable Rt in more places.
1592 (do_vmsr): Accept all control registers.
1596 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1597 if there was none specified for moves between scalar and core
1602 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1603 NEON_ALL_LANES case.
1607 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1612 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1617 * doc/as.texinfo: Add support to generate man options for h8300.
1618 * doc/c-h8300.texi: Likewise.
1622 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1628 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1633 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1634 start of the file each time.
1637 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1642 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1647 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1648 pc-relative str instructions in Thumb mode.
1652 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1653 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1655 * config/tc-h8300.h: Remove duplicated defines.
1660 * tc-avr.c (mcu_has_3_byte_pc): New function.
1661 (tc_cfi_frame_initial_instructions): Call it to find return
1667 * config/tc-tic6x.c (tic6x_try_encode): Handle
1668 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1669 encode register pair numbers when required.
1673 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1674 in vstr in Thumb mode for pre-ARMv7 cores.
1678 * doc/c-arc.texi (ARC Directives): Revert last change and use
1679 @itemize instead of @table.
1680 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1685 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1686 NULL message, instead just check ARM_CPU_IS_ANY directly.
1691 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1693 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1694 to the @item directives.
1695 (ARM-Neon-Alignment): Move to correct place in the document.
1696 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1698 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1703 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1704 case. Add default BAD_CASE to switch.
1708 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1709 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1713 * config/tc-arm.c (crc_ext_armv8): New feature set.
1714 (UNPRED_REG): New macro.
1715 (do_crc32_1): New function.
1716 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1717 do_crc32ch, do_crc32cw): Likewise.
1719 (insns): Add entries for crc32 mnemonics.
1720 (arm_extensions): Add entry for crc.
1724 * write.h (struct fix): Add fx_dot_frag field.
1725 (dot_frag): Declare.
1726 * write.c (dot_frag): New variable.
1727 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1728 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1729 * expr.c (expr): Save value of frag_now in dot_frag when setting
1731 * read.c (emit_expr): Likewise. Delete comments.
1735 * config/tc-i386.c (flag_code_names): Removed.
1736 (i386_index_check): Rewrote.
1740 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1742 (aarch64_double_precision_fmovable): New function.
1743 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1744 function; handle hexadecimal representation of IEEE754 encoding.
1745 (parse_operands): Update the call to parse_aarch64_imm_float.
1749 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1750 (check_hle): Updated.
1751 (md_assemble): Likewise.
1752 (parse_insn): Likewise.
1756 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1757 (md_assemble): Check if REP prefix is OK.
1758 (parse_insn): Remove expecting_string_instruction. Set
1763 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1767 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1768 for system registers.
1772 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1773 (rl78_op): Handle %code().
1774 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1775 (tc_gen_reloc): Likwise; convert to a computed reloc.
1776 (md_apply_fix): Likewise.
1780 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1784 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1785 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1786 list of accepted CPUs.
1791 * config/tc-i386.c (cpu_arch): Add ".smap".
1793 * doc/c-i386.texi: Document smap.
1797 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1798 mips_assembling_insn appropriately.
1799 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1803 * config/tc-mips.c (append_insn): Correct indentation, remove
1808 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1812 * configure.tgt: Add nios2-*-rtems*.
1816 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1821 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1822 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1826 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1832 Based on patches from Altera Corporation.
1834 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1835 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1836 * Makefile.in: Regenerated.
1837 * configure.tgt: Add case for nios2*-linux*.
1838 * config/obj-elf.c: Conditionally include elf/nios2.h.
1839 * config/tc-nios2.c: New file.
1840 * config/tc-nios2.h: New file.
1841 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1842 * doc/Makefile.in: Regenerated.
1843 * doc/all.texi: Set NIOSII.
1844 * doc/as.texinfo (Overview): Add Nios II options.
1845 (Machine Dependencies): Include c-nios2.texi.
1846 * doc/c-nios2.texi: New file.
1847 * NEWS: Note Altera Nios II support.
1852 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1853 Don't skip fixups with fx_subsy non-NULL.
1854 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1855 with fx_subsy non-NULL.
1859 * doc/c-metag.texi: Add "@c man" markers.
1863 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1865 (TC_ADJUST_RELOC_COUNT): Delete.
1866 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1870 * po/POTFILES.in: Regenerate.
1874 * config/tc-metag.c: Make SWAP instruction less permissive with
1879 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1880 relocs in .word/.etc statements.
1884 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1885 immediate value for 8-bit offset" error so it shows line info.
1889 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1894 * config/tc-v850.c: Add support for e3v5 architecture.
1895 * doc/c-v850.texi: Mention new support.
1900 * config/tc-avr.c: Include dwarf2dbg.h.
1904 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1905 (tc_i386_fix_adjustable): Likewise.
1906 (lex_got): Likewise.
1907 (tc_gen_reloc): Likewise.
1911 * config/tc-aarch64.c (output_operand_error_record): Change to output
1912 the out-of-range error message as value-expected message if there is
1913 only one single value in the expected range.
1914 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1915 LSL #0 as a programmer-friendly feature.
1919 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1920 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1921 BFD_RELOC_64_SIZE relocations.
1922 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1924 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1925 relocations against local symbols.
1929 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1930 finding some sort of toc syntax error, and break to avoid
1931 compiler uninit warning.
1936 * config/tc-i386.c (lex_got): Increment length by 1 if the
1937 relocation token is removed.
1941 * config/tc-v850.c (md_assemble): Allow signed values for
1946 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1951 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1952 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1953 * config/tc-ppc.c (md_show_usage): Likewise.
1954 (ppc_handle_align): Handle power8's group ending nop.
1958 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1959 that the assember exits after the opcodes have been printed.
1963 * app.c: Remove trailing white spaces.
1967 * dw2gencfi.c: Likewise.
1968 * dwarf2dbg.h: Likewise.
1969 * ecoff.c: Likewise.
1970 * input-file.c: Likewise.
1971 * itbl-lex.h: Likewise.
1972 * output-file.c: Likewise.
1975 * subsegs.c: Likewise.
1976 * symbols.c: Likewise.
1977 * write.c: Likewise.
1978 * config/tc-i386.c: Likewise.
1979 * doc/Makefile.am: Likewise.
1980 * doc/Makefile.in: Likewise.
1981 * doc/c-aarch64.texi: Likewise.
1982 * doc/c-alpha.texi: Likewise.
1983 * doc/c-arc.texi: Likewise.
1984 * doc/c-arm.texi: Likewise.
1985 * doc/c-avr.texi: Likewise.
1986 * doc/c-bfin.texi: Likewise.
1987 * doc/c-cr16.texi: Likewise.
1988 * doc/c-d10v.texi: Likewise.
1989 * doc/c-d30v.texi: Likewise.
1990 * doc/c-h8300.texi: Likewise.
1991 * doc/c-hppa.texi: Likewise.
1992 * doc/c-i370.texi: Likewise.
1993 * doc/c-i386.texi: Likewise.
1994 * doc/c-i860.texi: Likewise.
1995 * doc/c-m32c.texi: Likewise.
1996 * doc/c-m32r.texi: Likewise.
1997 * doc/c-m68hc11.texi: Likewise.
1998 * doc/c-m68k.texi: Likewise.
1999 * doc/c-microblaze.texi: Likewise.
2000 * doc/c-mips.texi: Likewise.
2001 * doc/c-msp430.texi: Likewise.
2002 * doc/c-mt.texi: Likewise.
2003 * doc/c-s390.texi: Likewise.
2004 * doc/c-score.texi: Likewise.
2005 * doc/c-sh.texi: Likewise.
2006 * doc/c-sh64.texi: Likewise.
2007 * doc/c-tic54x.texi: Likewise.
2008 * doc/c-tic6x.texi: Likewise.
2009 * doc/c-v850.texi: Likewise.
2010 * doc/c-xc16x.texi: Likewise.
2011 * doc/c-xgate.texi: Likewise.
2012 * doc/c-xtensa.texi: Likewise.
2013 * doc/c-z80.texi: Likewise.
2014 * doc/internals.texi: Likewise.
2018 * hash.c (hash_new_sized): Make it global.
2019 * hash.h: Declare it.
2020 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
2025 * Makefile.am: Add Meta.
2026 * Makefile.in: Regenerate.
2027 * config/tc-metag.c: New file.
2028 * config/tc-metag.h: New file.
2029 * configure.tgt: Add Meta.
2030 * doc/Makefile.am: Add Meta.
2031 * doc/Makefile.in: Regenerate.
2032 * doc/all.texi: Add Meta.
2033 * doc/as.texiinfo: Document Meta options.
2034 * doc/c-metag.texi: New file.
2038 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
2040 * config/tc-mips.c (internalError): Remove, replace with abort.
2044 * config/tc-aarch64.c (parse_operands): Change to compare the result
2045 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
2050 * config/tc-arm.c (skip_past_char): Skip whitespace before the
2051 anticipated character.
2052 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
2053 here as it is no longer needed.
2057 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
2058 * doc/c-score.texi (SCORE-Opts): Likewise.
2059 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
2063 * config/tc-mips.c: Add support for MIPS r5900.
2064 Add M_LQ_AB and M_SQ_AB to support large values for instructions
2066 (can_swap_branch_p, get_append_method): Detect some conditional
2067 short loops to fix a bug on the r5900 by NOP in the branch delay
2069 (M_MUL): Support 3 operands in multu on r5900.
2070 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
2071 (s_mipsset): Force 32 bit floating point on r5900.
2072 (mips_ip): Check parameter range of instructions mfps and mtps on
2074 * configure.in: Detect CPU type when target string contains r5900
2075 (e.g. mips64r5900el-linux-gnu).
2079 * as.c (parse_args): Update copyright year to 2013.
2083 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
2089 * config/tc-arm.c (parse_address_main): Skip whitespace before a
2092 For older changes see ChangeLog-2012
2094 Copyright (C) 2013 Free Software Foundation, Inc.
2096 Copying and distribution of this file, with or without modification,
2097 are permitted in any medium without royalty provided the copyright
2098 notice and this notice are preserved.
2104 version-control: never