3 * ia64-dis.c (print_insn_ia64): Add failed label after ia64_free_opcode
4 call. Change last goto to use failed instead of done.
8 * cgen-ibld.in (cgen_put_insn_int_value): New function.
9 (insert_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
10 (insert_insn_normal): Use cgen_put_insn_int_value with CGEN_INT_INSN_P.
11 (extract_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
12 * cgen-dis.in (read_insn): New static function.
13 (print_insn): Use read_insn to read the insn into the buffer and set
15 (print_insn): in CGEN_INT_INSN_P, make sure that the entire insn is
17 * fr30-asm.c: Regenerated.
18 * fr30-desc.c: Regenerated.
19 * fr30-desc.h Regenerated.
20 * fr30-dis.c: Regenerated.
21 * fr30-ibld.c: Regenerated.
22 * fr30-opc.c: Regenerated.
23 * fr30-opc.h Regenerated.
24 * m32r-asm.c: Regenerated.
25 * m32r-desc.c: Regenerated.
26 * m32r-desc.h Regenerated.
27 * m32r-dis.c: Regenerated.
28 * m32r-ibld.c: Regenerated.
29 * m32r-opc.c: Regenerated.
33 * tic30-dis.c: Fix formatting.
37 * sh-dis.c: Fix formatting.
41 * ppc-opc.c (powerpc_opcodes): Add rfid, mtsrd, mtsrdin, mtmsrd.
45 * z8k-dis.c: Fix formatting.
49 * ia64-ic.tbl (pr-readers-nobr-nomovpr): Add addl, adds. Delete
50 break, mov-immediate, nop.
51 * ia64-opc-f.c: Delete fpsub instructions.
52 * ia64-opc-m.c: Add POSTINC to all instructions with postincrement
53 address operand. Rewrite using macros to avoid long lines.
54 * ia64-opc.h (POSTINC): Define.
55 * ia64-asmtab.c: Regenerate.
59 * ia64-ic.tbl: Add missing entries.
63 * i860-dis.c (print_br_address): Change third argument from int
68 * ia64-dis.c (print_insn_ia64): Get byte skip count correct
69 for MLI templates. Handle IA64_OPND_TGT64.
73 * avr-dis.c (avr_operand): Use PARAMS macro in declaration.
74 Change return type from void to int. Check the combination
75 of operands, return 1 if valid. Fix to avoid BUF overflow.
76 Report undefined combinations of operands in COMMENT.
77 Report internal errors to stderr. Output the adiw/sbiw
78 constant operand in both decimal and hex.
79 (print_insn_avr): Disassemble ldd/std with displacement of 0
80 as ld/st. Check avr_operand () return value, handle invalid
81 combinations of operands like unknown opcodes.
85 * cgen-dis.in, cgen-asm.in, cgen-ibld.in: New files.
90 * ia64-dis.c (print_insn_ia64): Call ia64_free_opcode at end.
94 * Makefile.am (CGEN, CGENDEPS, CGENDIR, CGENFLAGS): New.
95 (run-cgen, stamp-m32r, stamp-fr30): New targets.
96 * Makefile.in: Regenerate.
97 * configure.in: Add --enable-cgen-maint option.
98 * configure: Regenerate.
102 * cgen-opc.c (cgen_hw_lookup_by_name): 'i' is now unsigned.
103 (cgen_hw_lookup_by_num): Ditto.
104 (cgen_operand_lookup_by_name): Ditto.
105 (print_address): Ditto.
106 (print_keyword): Ditto.
107 * cgen-dis.c (hash_insn_array): Mark unused parameters with
109 * cgen-asm.c (hash_insn_array): Mark unused parameters with
111 (cgen_parse_keyword): Ditto.
115 * i860-dis.c: New file.
116 (print_insn_i860): New function.
117 (print_br_address): New function.
118 (sign_extend): New function.
119 (BITWISE_OP): New macro.
120 (I860_REG_PREFIX): New macro.
121 (grnames, frnames, crnames): New structures.
123 * disassemble.c (ARCH_i860): Define.
124 (disassembler): Add check for bfd_arch_i860 to set disassemble
125 function to print_insn_i860.
127 * Makefile.in (CFILES): Added i860-dis.c.
128 (ALL_MACHINES): Added i860-dis.lo.
129 (i860-dis.lo): New dependences.
131 * configure.in: New bits for bfd_i860_arch.
133 * configure: Regenerated.
137 * Makefile.am (CFILES): Add cris-dis.c and cris-opc.c.
138 (ALL_MACHINES): Add cris-dis.lo and cris-opc.lo.
139 (cris-dis.lo, cris-opc.lo): New rules.
140 * Makefile.in: Rebuild.
141 * configure.in (bfd_cris_arch): New target.
142 * configure: Rebuild.
143 * disassemble.c (ARCH_cris): Define.
144 (disassembler): Support ARCH_cris.
145 * cris-dis.c, cris-opc.c: New files.
146 * po/POTFILES.in, po/opcodes.pot: Regenerate.
150 * sparc-opc.c (sparc_opcodes): popc has 0 in rs1, not rs2.
155 * ppc-opc.c (powerpc_opcodes): Correct suffix for vslw.
160 * hppa-dis.c (fput_reg, fput_fp_reg, fput_fp_reg_r, fput_creg,
161 fput_const, extract_3, extract_5_load, extract_5_store,
162 extract_5r_store, extract_5R_store, extract_10U_store,
163 extract_5Q_store, extract_11, extract_14, extract_16, extract_21,
164 extract_12, extract_17, extract_22): Prototype.
165 (print_insn_hppa): Rename inner block opcode -> opc to avoid
166 shadowing outer block.
175 * arm-dis.c (print_insn_arm): Output combinations of PSR flags.
179 * avr-dis.c (avr_operand): Change _ () to _() around all strings
180 marked for translation (exception from the usual coding style).
181 (print_insn_avr): Initialize insn2 to avoid warnings.
185 * h8300-dis.c (bfd_h8_disassemble): Improve readability.
186 * h8500-dis.c: Fix formatting.
190 * Makefile.am (DEP): Fix 2000-06-22. grep after running dep.sed
191 (CLEANFILES): Add DEPA.
192 * Makefile.in: Regenerate.
196 * arm-dis.c (regnames): Add an additional register set to match
197 the set used by GCC. Make it the default.
201 * Makefile.am (DEP): grep for leading `/' in DEP1, and fail if we
203 * Makefile.in: Regenerate.
207 * Makefile.am: Rebuild dependency.
208 * Makefile.in: Rebuild.
212 * Makefile.in, configure: regenerate
213 * disassemble.c (disassembler): Recognize ARCH_m68hc12,
215 * m68hc11-dis.c (read_memory, print_insn, print_insn_m68hc12):
217 * configure.in: Recognize m68hc12 and m68hc11.
218 * m68hc11-dis.c, m68hc11-opc.c: New files for support of m68hc1x
219 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
220 and opcode generation for m68hc11 and m68hc12.
224 * disassemble.c (disassembler): Refer to the PowerPC 620 using
225 bfd_mach_ppc_620 instead of 620.
229 * h8300-dis.c: Fix formatting.
230 (bfd_h8_disassemble): Distinguish adds/subs, inc/dec.[wl]
235 * avr-dis.c (avr_operand): Bugfix for jmp/call address.
239 * avr-dis.c: completely rewritten.
243 * h8300-dis.c: Follow the GNU coding style.
244 (bfd_h8_disassemble) Fix a typo.
248 * h8300-dis.c (bfd_h8_disassemble_init): Fix a typo.
249 (bfd_h8_disassemble): Distinguish the operand size of inc/dev.[wl]
250 correctly. Fix a typo.
254 * opintl.h (_(String)): Explain why dgettext is used instead of
259 * opintl.h (gettext, dgettext, dcgettext, textdomain,
260 bindtextdomain): Replace defines with those from intl/libgettext.h
261 to quieten gcc warnings.
265 * Makefile.am: Update dependencies with "make dep-am"
266 * Makefile.in: Regenerate.
270 * m10300-dis.c (disassemble): Don't assume 32-bit longs when
271 sign-extending operands.
275 * d10v-opc.c (d10v_opcodes): add ALONE tag to all short branches
280 * Makefile.am (LIBIBERTY): Define.
284 * mips-dis.c (REGISTER_NAMES): Rename to STD_REGISTER_NAMES.
285 (STD_REGISTER_NAMES): New name for REGISTER_NAMES.
286 (reg_names): Rename to std_reg_names. Change it to a char **
288 (std_reg_names): New name for reg_names.
289 (set_mips_isa_type): Set reg_names to point to std_reg_names by
294 * fr30-desc.h: Partially regenerated to account for changed
295 CGEN_MAX_* -> CGEN_ACTUAL_MAX_* macros.
296 * m32r-desc.h: Ditto.
300 * arm-opc.h: Use upper case for flasg in MSR and MRS
301 instructions. Allow any bit to be set in the field_mask of
304 * arm-dis.c (print_insn_arm): Decode _x and _s bits of the
305 field_mask of an MSR instruction.
309 * arm-opc.c: Disassembly of thumb ldsb/ldsh
310 instructions changed to ldrsb/ldrsh.
314 * mips-dis.c (print_insn_arg): Don't mask top 32 bits of 64-bit
315 target addresses for 'jal' and 'j'.
319 * ppc-opc.c (powerpc_opcodes): Make the predicted-branch opcodes
320 also available in common mode when powerpc syntax is being used.
324 * m68k-dis.c (dummy_printer): Add ATTRIBUTE_UNUSED to args.
325 (dummy_print_address): Ditto.
331 * disassemble.c (disassembler): Add ARCH_tic54x.
332 * configure.in: Added tic54x target.
334 * Makefile.am: Add tic54x dependencies.
335 * Makefile.in: Ditto.
339 * ppc-opc.c (VA, VB, VC, VD, VS, SIMM, UIMM, SHB): New macros, for
340 vector unit operands.
341 (VX, VX_MASK, VXA, VXA_MASK, VXR, VXR_MASK): New macros, for vector
342 unit instruction formats.
343 (PPCVEC): New macro, mask for vector instructions.
344 (powerpc_operands): Add table entries for above operand types.
345 (powerpc_opcodes): Add table entries for vector instructions.
347 * ppc-dis.c (print_insn_big_powerpc): Add PPC_OPCODE_ALTIVEC to mask.
348 (print_insn_little_powerpc): Likewise.
349 (print_insn_powerpc): Prepend 'v' when printing vector registers.
353 * avr-dis.c (reg_fmul_d): New. Extract destination register from
355 (reg_fmul_r): New. Extract source register from FMUL instruction.
356 (reg_muls_d): New. Extract destination register from MULS instruction.
357 (reg_muls_r): New. Extract source register from MULS instruction.
358 (reg_movw_d): New. Extract destination register from MOVW instruction.
359 (reg_movw_r): New. Extract source register from MOVW instruction.
360 (print_insn_avr): Handle MOVW, MULS, MULSU, FMUL, FMULS, FMULSU,
361 EICALL, EIJMP, LPM r,Z, ELPM r,Z, SPM, ESPM instructions.
365 * configure.in: Add bfd_powerpc_64_arch.
366 * disassemble.c (disassembler): Use print_insn_big_powerpc for
371 * fr30-desc.c (fr30_cgen_cpu_open): Initialise signed_overflow
376 * ia64-gen.c (general): Add an ordered table of primary
377 opcode names, as well as priority fields to disassembly data
378 structures to enforce a preferred disassembly format based on the
379 ordering of the opcode tables.
380 (load_insn_classes): Show a useful message if IC tables are missing.
381 (load_depfile): Ditto.
382 * ia64-asmtab.h (struct ia64_dis_names ): Add priority flag to
383 distinguish preferred disassembly.
384 * ia64-opc-f.c: Reorder some insn for preferred disassembly
385 format. Fix incorrect flag on fma.s/fma.s.s0.
386 * ia64-opc.c: Scan *all* disassembly matches and use the one with
387 the highest priority.
388 * ia64-opc-b.c: Use more abbreviations.
389 * ia64-asmtab.c: Regenerate.
393 * hppa-dis.c (extract_16): New function.
394 (print_insn_hppa): Fix incorrect handling of 'fe'. Added handling of
395 new operand types l,y,&,fe,fE,fx.
403 * Makefile.am (HFILES): Add ia64-asmtab.h, ia64-opc.h.
404 (CFILES): Add ia64-dis.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c,
405 ia64-opc-i.c, ia64-opc-m.c, ia64-opc-d.c, ia64-opc.c, ia64-gen.c,
407 (ALL_MACHINES): Add ia64-dis.lo, ia64-opc.lo.
408 (ia64-ic.tbl, ia64-raw.tbl, ia64-waw.tbl, ia64-war.tbl, ia64-gen,
409 ia64-gen.o, ia64-asmtab.c, ia64-dis.lo, ia64-opc.lo): New rules.
410 * Makefile.in: Rebuild.
412 * configure.in (bfd_ia64_arch): New target.
413 * disassemble.c (ARCH_ia64): Define.
414 (disassembler): Support ARCH_ia64.
415 * ia64-asmtab.c, ia64-asmtab.h, ia64-dis.c, ia64-gen.c ia64-ic.tbl,
416 ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c ia64-opc-f.c, ia64-opc-i.c,
417 ia64-opc-m.c, ia64-opc-x.c, ia64-opc.c, ia64-opc.h, ia64-raw.tbl,
418 ia64-war.tbl, ia64-waw.tbl): New files.
422 * m10300-dis.c (HAVE_AM30, HAVE_AM33): Define.
423 (disassemble): Use them.
427 * sysdep.h: Include "ansidecl.h" not <ansidecl.h>
428 * Makefile.am: Update dependencies.
429 * Makefile.in: Regenerate.
433 * a29k-dis.c, alpha-dis.c, alpha-opc.c, arc-dis.c, arc-opc.c,
434 avr-dis.c, d10v-dis.c, d10v-opc.c, d30v-dis.c, d30v-opc.c,
435 disassemble.c, h8300-dis.c, h8500-dis.c, hppa-dis.c, i370-dis.c,
436 i370-opc.c, i960-dis.c, m10200-dis.c, m10200-opc.c, m10300-dis.c,
437 m10300-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c, mcore-dis.c,
438 mips-dis.c, mips-opc.c, mips16-opc.c, pj-dis.c, pj-opc.c,
439 ppc-dis.c, ppc-opc.c, sh-dis.c, sparc-dis.c, sparc-opc.c,
440 tic80-dis.c, tic80-opc.c, v850-dis.c, v850-opc.c, vax-dis.c,
441 w65-dis.c, z8k-dis.c, z8kgen.c: Include sysdep.h. Remove
442 ansidecl.h as sysdep.h includes it.
446 * configure.in (WARN_CFLAGS): Set to -W -Wall by default. Add
447 --enable-build-warnings option.
448 * Makefile.am (AM_CFLAGS, WARN_CFLAGS): Add definitions.
449 * Makefile.in, configure: Re-generate.
453 * sh-opc.c (sh_table): Use A_DISP_PC / PCRELIMM_8BY2 for ldre & ldrs.
454 stc GBR,@-<REG_N> is available for arch_sh1_up.
455 Group parallel processing insn with identical mnemonics together.
456 Make three-operand psha / pshl come first.
460 * sh-opc.h (sh_nibble_type): Remove DISP_8 and DISP_4.
461 Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
462 (sh_arg_type): Add A_PC.
463 (sh_table): Update entries using immediates. Add repeat.
464 * sh-dis.c (print_insn_shx): Remove DISP_8 and DISP_4.
465 Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
469 * po/opcodes.pot: Regenerate.
471 * Makefile.am (MKDEP): Use gcc -MM rather than mkdep.
472 (DEP): Quote when passing vars to sub-make. Add warning message
474 (DEP1): Rewrite for "gcc -MM".
475 (CLEANFILES): Add DEP2.
477 * Makefile.in: Regenerate.
481 * avr-dis.c: Syntax cleanup.
482 (add0fff): Print the pc relative address as a signed number.
487 * disassemble.c (disassembler_usage): Don't use a prototype. Mark
488 the parameter ATTRIBUTE_UNUSED.
489 * ppc-opc.c: Add ATTRIBUTE_UNUSED as needed.
493 * m10300-opc.c: SP-based offsets are always unsigned.
497 * arm-opc.h (thumb_opcodes): Disassemble 0xde.. to "bal"
498 [branch always] instead of "undefined".
502 * d30v-opc.c (d30v_format_table): Move SHORT_AR to end of list of
503 short instructions, from end of list of long instructions.
507 * Makefile.am (CFILES): Add avr-dis.c.
508 (ALL_MACHINES): Add avr-dis.lo.
512 * avr-dis.c (add0fff, add03f8): Don't use structure bitfields to
514 (print_insn_avr): Call function via pointer in K&R compatible way.
515 (dispLDD, regPP, reg50, reg104, reg40, reg20w, lit404, lit204,
516 add0fff, add03f8): Convert to old style function declaration and
518 (avrdis_opcode): Add prototype.
522 * avr-dis.c: New file. AVR disassembler.
523 * configure.in (bfd_avr_arch): New architecture support.
524 * disassemble.c: Likewise.
525 * configure: Regenerate.
529 * sh-opc.h (sh_table): ldre and ldrs have a *signed* displacement.
533 * d30v-dis.c (print_insn): Remove d*i hacks. Use per-operand
534 flag to determine if operand is pc-relative.
537 (REL6S3): Renamed from IMM6S3.
538 Added flag OPERAND_PCREL.
539 (REL12S3, REL18S3, REL32): Split from IMM12S3, IMM18S3, REL32, with
540 added flag OPERAND_PCREL.
541 (IMM12S3U): Replaced with REL12S3.
542 (SHORT_D2, LONG_D): Delay target is pc-relative.
543 (SHORT_B2r, SHORT_B3r, SHORT_B3br, SHORT_D2r, LONG_Ur, LONG_2r):
544 Split from SHORT_B2, SHORT_D2, SHORT_B3b, SHORT_D2, LONG_U, LONG_2r,
545 using the REL* operands.
546 (LONG_2br, LONG_Dr): Likewise, from LONG_2b, LONG_D.
547 (SHORT_D1r, SHORT_D2Br, LONG_Dbr): Renamed from SHORT_D1, SHORT_D2B,
548 LONG_Db, using REL* operands.
549 (SHORT_U, SHORT_A5S): Removed stray alternatives.
550 (d30v_opcode_table): Use new *r formats.
554 * m32r-desc.c (m32r_cgen_cpu_open): Replace 'flags' with
555 'signed_overflow_ok_p'.
559 * Makefile.am (stamp-lib): Use $(LIBTOOL) --config to get the
560 name of the libtool directory.
561 * Makefile.in: Rebuild.
565 * cgen-opc.c (cgen_set_signed_overflow_ok): New function.
566 (cgen_clear_signed_overflow_ok): New function.
567 (cgen_signed_overflow_ok_p): New function.
571 * m32r-asm.c, m32r-desc.c, m32r-desc.h, m32r-dis.c,
572 m32r-ibld.c,m32r-opc.h: Rebuild.
576 * i370-dis.c, i370-opc.c: New.
578 * disassemble.c (ARCH_i370): Define.
579 (disassembler): Handle it.
581 * Makefile.am: Add support for Linux/IBM 370.
582 * configure.in: Likewise.
584 * Makefile.in: Regenerate.
585 * configure: Likewise.
589 * d30v-opc.c (d30v_opcode_tab) : Added FLAG_NOT_WITH_ADDSUBppp to
590 ST2H, STB, STH, STHH, STW and ST2H opcodes to prohibit parallel
595 * mips-dis.c (_print_insn_mips): New arg for OPCODE_IS_MEMBER:
597 * mips-opc.c (G6): New define.
598 (mips_builtin_op): Add "move" definition for -gp32.
603 * ppc-opc.c: Correct dcread--it takes 3 arguments, not 2.
607 * dis-buf.c (buffer_read_memory): Change `length' param and all int
612 * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions.
613 (print_insn_ppi): Likewise.
614 (print_insn_shx): Use info->mach to select appropriate insn set.
615 Add support for sh-dsp. Remove FD_REG_N support.
616 * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support.
617 (sh_arg_type): Likewise. Remove FD_REG_N.
618 (sh_dsp_reg_nums): New enum.
619 (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros.
620 (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise.
621 (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise.
622 (arch_sh3_dsp_up): Likewise.
623 (sh_opcode_info): New field: arch.
624 (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and
625 D_REG_N. Fill in arch field. Add sh-dsp insns.
629 * arm-dis.c: Change flavor name from atpcs-special to
630 special-atpcs to prevent name conflict in gdb.
631 (get_arm_regname_num_options, set_arm_regname_option,
632 get_arm_regnames): New functions. API to access the several
633 flavor of register names. Note: Used by gdb.
634 (print_insn_thumb): Use the register name entry from the currently
635 selected flavor for LR and PC.
639 * mcore-opc.h (enum mcore_opclass): Add MULSH and OPSR
641 (mcore_table): Add "idly4", "psrclr", "psrset", "mulsh" and
642 "mulsh.h" instructions.
643 * mcore-dis.c (imsk array): Add masks for MULSH and OPSR
645 (print_insn_mcore): Add support for little endian targets.
646 Add support for MULSH and OPSR classes.
650 * arm-dis.c (parse_arm_diassembler_option): Rename again.
651 Previous delat did not take.
655 * dis-buf.c (buffer_read_memory): Use octets_per_byte field
656 to adjust target address bounds checking and calculate the
657 appropriate octet offset into data.
661 * arm-dis.c: (parse_disassembler_option): Rename to
662 parse_arm_disassembler_option and allow to be exported.
664 * disassemble.c (disassembler_usage): New function: Print out any
665 target specific disassembler options.
666 Call arm_disassembler_options() if the ARM architecture is being
669 * arm-dis.c (NUM_ELEM): Define this macro if not already
671 (arm_regname): New struct type for ARM register names.
672 (arm_toggle_regnames): Delete.
673 (parse_disassembler_option): Use register name structure.
674 (print_insn): New function: Combines duplicate code found in
675 print_insn_big_arm and print_insn_little_arm.
676 (print_insn_big_arm): Call print_insn.
677 (print_insn_little_arm): Call print_insn.
678 (print_arm_disassembler_options): Display list of supported,
679 ARM specific disassembler options.
683 * arm-dis.c (printf_insn_big_arm): Treat ELF symbols with the
684 ARM_STT_16BIT flag as Thumb code symbols.
686 * arm-dis.c (printf_insn_little_arm): Ditto.
690 * arm-dis.c (printf_insn_thumb): Prevent double dumping
691 of raw thumb instructions.
695 * mcore-opc.h (mcore_table): Add "add" as an alias for "addu".
699 * arm-dis.c (streq): New macro.
701 (force_thumb): ew local variable.
702 (parse_disassembler_option): New function: Parse a single, ARM
703 specific disassembler command line switch.
704 (parse_disassembler_option): Call parse_disassembler_option to
705 parse individual command line switches.
706 (print_insn_big_arm): Check force_thumb.
707 (print_insn_little_arm): Check force_thumb.
711 * i386-dis.c (grps[]): Correct GRP5 FF/3 from "call" to "lcall".
715 * m10300-opc.c, m10300-dis.c: Add am33 support.
719 * hppa-dis.c (unit_cond_names): Add PA2.0 unit condition names.
720 (print_insn_hppa): Handle 'B' operand.
724 * d10v-opc.c: Fix pattern for "cpfg,f{0|1},c" instruction.
728 * mips-opc.c (I5): New.
729 (abs.ps,add.ps,alnv.ps,c.COND.ps,cvt.s.pl,cvt.s.pu,cvt.ps.s
730 madd.ps,movf.ps,movt.ps,mul.ps,net.ps,nmadd.ps,nmsub.ps,
731 pll.ps,plu.ps,pul.ps,puu.ps,sub.ps,suxc1,luxc1): New.
735 * arm-dis.c (print_insn_arm): Added general purpose 'X' format.
736 * arm-opc.h (print_insn_arm): Added comment documenting
737 the 'X' format just added to arm-dis.c.
741 * mips-opc.c (la): Create a version that just uses addiu directly.
742 (dla): Expand to daddiu if possible.
746 * mips-opc.c: Add ssnop pattern.
750 * mips-dis.c (_print_insn_mips): Use OPCODE_IS_MEMBER.
754 * d30v-opc.c (mvtacc): Use format SHORT_AR not SHORT_AA
755 (d30v_format_tab): Define the SHORT_AR format.
759 * mcore-dis.c: Remove spurious code introduced in previous delta.
763 * arm-dis.c: Include sysdep.h to prevent compile time warnings.
767 * alpha-opc.c (alpha_operands): Fill in missing initializer.
768 (alpha_num_operands): Convert to unsigned.
769 (alpha_num_opcodes): Ditto.
770 (insert_rba): Declare unused arguments ATTRIBUTE_UNUSED.
775 (extract_bdisp): Ditto.
776 (extract_jhint): Ditto.
777 (extract_ev6hwjhint): Ditto.
781 * hppa-dis.c (print_insn_hppa): Add new codes 'cc', 'cd', 'cC',
784 * hppa-dis.c (print_insn_hppa): Removed unused args. Fix '?W'.
786 * hppa-dis.c (print_insn_hppa): Implement codes "?N", "?Q".
790 * d10v-opc.c (d10v_operands): Add RESTRICTED_NUM3 flag for
791 rac/rachi instructions.
792 (d10v_opcodes): Added seven new instructions ld, ld2w, sac, sachi,
797 * fr30-asm.c,fr30-desc.h: Rebuild.
798 * m32r-asm.c,m32r-desc.c,m32r-desc.h: Rebuild. Add m32rx support.
799 * m32r-dis.c,m32r-ibld.c,m32r-opc.c,m32r-opc.h,m32r-opinst.c: Ditto.
803 * sh-opc.h: Fix bit patterns for several load and store
808 * hppa-dis.c (print_insn_hppa): Replace 'B', 'M', 'g' and 'l' with
809 cleaner code using completer prefixes. Add 'Y'.
813 * hppa-dis.c: (print_insn_hppa): Correct 'cJ', 'cc'.
815 * hppa-dis.c (extract_22): New function.
817 * hppa-dis.c (print_insn_hppa): Handle 'J', 'K', and 'cc'.
819 * hppa-dis.c (print_insn_hppa): Handle 'fe' and 'cJ'.
821 * hppa-dis.c (print_insn_hppa): Handle '#', 'd', and 'cq'.
823 * hppa-dis.c (print_insn_hppa): Handle 'm', 'h', '='.
825 * hppa-dis.c (print_insn_hppa): Handle 'X' operand.
827 * hppa-dis.c (print_insn_hppa): Handle 'B' operand.
829 * hppa-dis.c (print_insn_hppa): Handle 'M' and 'L' operands.
831 * hppa-dis.c (print_insn_hppa): Handle 'l' operand.
833 * hppa-dis.c (print_insn_hppa): Handle 'g' operand.
837 * hppa-dis.c (print_insn_hppa): Output a space after 'X' completer.
839 * hppa-dis.c: (print_insn_hppa): Do output a space before a 'v'
842 * hppa-dis.c: (print_insn_hppa): Handle 'fX'.
844 * hppa-dis.c: (print_insn_hppa): Add missing break after
847 * hppa-dis.c: Finish constifying various completers, register
852 * configure.in (Canonicalization of target names): Remove adding
853 ${CONFIG_SHELL} in front of $ac_config_sub, since autoconfig 2.14
854 generates $ac_config_sub with a ${CONFIG_SHELL} already.
855 * configure: Regenerate.
859 * hppa-dis.c (print_insn_hppa): Escape '%' in output strings.
861 * hppa-dis.c (print_insn_hppa): Handle 'Z' argument.
865 * sh-opc.h: Add mulu.w and muls.w patterns. These are the correct
866 names for the mulu and muls patterns.
870 * pj-opc.c: New file.
871 * pj-dis.c: New file.
872 * disassemble.c (disassembler): Handle bfd_arch_pj.
873 * configure.in: Handle bfd_pj_arch.
874 * Makefile.am: Rebuild dependencies.
875 (CFILES): Add pj-dis.c and pj-opc.c.
876 (ALL_MACHINES): Add pj-dis.lo and pj-opc.lo.
877 * configure, Makefile.in: Rebuild.
881 * i386-dis.c (print_insn_i386): Set bytes_per_line to 7.
885 * alpha-opc.c (fetch, fetch_m, ecb, wh64): RA must be R31.
889 * fr30-asm.c,fr30-desc.h,fr30-dis.c,fr30-ibld.c,fr30-opc.c: Rebuild.
890 * m32r-asm.c,m32r-desc.h,m32r-dis.c,m32r-ibld.c,m32r-opc.c: Rebuild.
891 * m32r-opinst.c: Rebuild.
895 * hppa-dis.c (print_insn_hppa): Replace 'f' by 'v'. Prefix float
896 register args by 'f'.
898 * hppa-dis.c (print_insn_hppa): Add args q, %, !, and |.
900 * hppa-dis.c (MASK_10, read_write_names, add_compl_names,
901 extract_10U_store): New.
902 (print_insn_hppa): Add new completers.
904 * hppa-dis.c (signed_unsigned_names,mix_half_names,
905 saturation_names): New.
906 (print_insn_hppa): Add completer codes 'a', 'ch', 'cH', 'cS', and 'c*'.
908 * hppa-dis.c (print_insn_hppa): Place completers behind prefix 'c'.
910 * hppa-dis.c (print_insn_hppa): Add cases for '.', '~'. '$'. and '!'
912 * hppa-dis.c (print_insn_hppa): Look at next arg instead of bits
913 to decide to print a space.
917 * i386-dis.c: Add AMD athlon instruction support.
922 * dis-buf.c (buffer_read_memory): Rewrite expression to avoid
923 overflow at end of address space.
924 (generic_print_address): Use sprintf_vma.
928 * Makefile.am: Rename .dep* files to DEP*. Change DEP variable to
929 MKDEP. Rebuild dependencies.
930 * Makefile.in: Rebuild.
934 * hppa-dis.c (compare_cond_64_names, cmpib_cond_64_names,
935 add_cond_64_names, wide_add_cond_names, logical_cond_64_names,
936 unit_cond_64_names, shift_cond_64_names, bb_cond_64_names): New.
937 (print_insn_hppa): Add 64 bit condition completers.
941 * hppa-dis.c (print_insn_hppa): Change condition args to use
946 * hppa-dis.c (print_insn_hppa): Remove unnecessary test in 'E'
952 * configure.bat: Remove; obsolete.
956 * dis-buf.c: Add ATTRIBUTE_UNUSED as appropriate.
957 (generic_strcat_address): Add cast to avoid warning.
958 * i386-dis.c: Initialize all structure fields to avoid warnings.
959 Add ATTRIBUTE_UNUSED as appropriate.
963 * sparc-dis.c (print_insn_sparc): Differentiate between
964 addition and oring when guessing symbol for comment.
968 * arm-dis.c (print_insn_arm): Display hex equivalent of rotated
973 * i386-dis.c: Mention intel mode specials in macro char comment.
977 * alpha-dis.c: Don't include <stdlib.h>.
978 * arm-dis.c: Include "sysdep.h".
979 * tic30-dis.c: Don't include <stdlib.h> or <string.h>. Include
981 * Makefile.am: Rebuild dependencies.
982 * Makefile.in: Rebuild.
986 * arm-dis.c (print_insn_arm): Add detection of IMB and IMBRange
991 * arm-dis.c (arm_regnames): Turn into a pointer to a register
993 (arm_regnames_standard): New variable: Array of ARM register
994 names according to ARM instruction set nomenclature.
995 (arm_regnames_apcs): New variable: Array of ARM register names
996 according to ARM Procedure Call Standard.
997 (arm_regnames_raw): New variable: Array of ARM register names
998 using just 'r' and the register number.
999 (arm_toggle_regnames): New function: Toggle the chosen register set
1001 (parse_disassembler_options): New function: Parse any target
1002 disassembler command line options.
1003 (print_insn_big_arm): Call parse_disassembler_options if any
1005 (print_insn_little_arm): Call parse_disassembler_options if any
1010 * i386-dis.c (FWAIT_OPCODE): Define.
1011 (used_prefixes): New static variable.
1012 (fetch_data): Don't print an error message if we have already
1013 fetched some bytes successfully.
1014 (ckprefix): Clear used_prefixes. Use FWAIT_OPCODE, not 0x9b.
1015 (prefix_name): New static function.
1016 (print_insn_i386): If setjmp fails, indicating a data error, but
1017 we have managed to fetch some bytes, print the first one as a
1018 prefix or a .byte pseudo-op. If fwait is followed by a non
1019 floating point instruction, print the first prefix. Set
1020 used_prefixes when prefixes are used. If any prefixes were not
1021 used after disassembling the instruction, print the first prefix
1022 instead of printing the instruction.
1023 (putop): Set used_prefixes when prefixes are used.
1024 (append_seg, OP_E, OP_G, OP_REG, OP_I, OP_sI, OP_J): Likewise.
1025 (OP_DIR, OP_SIMD_Suffix): Likewise.
1029 * sparc-opc.c: Fix up set, setsw, setuw operand kinds.
1030 Support signx %reg, clruw %reg.
1034 * sparc-opc.c: Add aliases Solaris as supports.
1038 * Makefile.am (CFILES): Add arc-{dis,opc}.c and v850-{dis,opc}.c.
1039 * Makefile.in: Regenerated.
1043 * arm-dis.c (print_insn_arm): Make LDRH/LDRB consistent with LDR
1044 when target is PC-relative.
1048 * m68k-opc.c: Rename MACL/MSACL to MAC/MSAC. Add MACM/MSACM. Add
1051 * m68k-dis.c (fetch_arg): Add places `n', `o'.
1053 * m68k-opc.c: Add MSAC, MACL, MOVE to/from ACC, MACSR, MASK.
1054 Add mcf5206e to appropriate instructions.
1055 Add alias for MAC, MSAC.
1057 * m68k-dis.c (print_insn_arg): Add formats `E', `G', `H' and place
1060 * m68k-opc.c (m68k_opcodes): Add divsw, divsl, divuw, divul, macl,
1061 macw, remsl, remul for mcf5307. Change mcf5200 --> mcf.
1063 * m68k-dis.c: Add format `u' and places `h', `m', `M'.
1067 * i386-dis.c (Ed): Define.
1068 (dis386_twobyte_att, dis386_twobyte_intel): Use Ed for movd.
1070 (OP_rm): Rename to OP_Rd.
1073 (putop): Add const to template and p.
1074 (print_insn_x86): Delete.
1075 (print_insn_i386): Merge old function print_insn_x86. Add const
1077 (struct dis386): Add const to name.
1078 (dis386_att, dis386_intel): Add const.
1079 (dis386_twobyte_att, dis386_twobyte_intel): Add const.
1080 (names32, names16, names8, names_seg, index16): Add const.
1081 (grps, prefix_user_table, float_reg): Add const.
1082 (float_mem_att, float_mem_intel): Add const.
1083 (oappend): Add const to s.
1084 (OP_REG): Add const to s.
1085 (ptr_reg): Add const to s.
1086 (dofloat): Add const to dp.
1087 (OP_C): Don't skip modrm, it's now done in OP_Rd.
1090 (OP_Rd): Check for valid mod. Call Op_E to print.
1091 (OP_E): Handle d_mode arg. Check for bad sfence,lea,lds etc.
1092 (OP_MS): Check for valid mod. Call Op_EM to print.
1093 (OP_3DNowSuffix): Set obufp and use oappend rather than
1094 strcat. Call BadOp() for errors.
1095 (OP_SIMD_Suffix): Likewise.
1096 (BadOp): New function.
1100 * i386-dis.c (dis386_intel): Remove macro chars, except for
1101 jEcxz. Change cWtR and cRtd to cW and cR.
1102 (dis386_twobyte_intel): Remove macro chars here too.
1103 (putop): Handle R and W macros for intel mode.
1105 * i386-dis.c (SIMD_Fixup): New function.
1106 (dis386_twobyte_att): Use it on movlps and movhps, and change
1107 Ev to EX on these insns. Change movmskps Ev, XM to Gv, EX.
1108 (dis386_twobyte_intel): Same here.
1110 * i386-dis.c (Av): Remove.
1114 (OP_SIMD_Suffix): New function.
1115 (OP_DIR): Remove dead code.
1116 (eAX_reg..eDI_reg): Renumber.
1117 (onebyte_has_modrm): Table numbering comments.
1118 (INTERNAL_DISASSEMBLER_ERROR): Move to before print_insn_x86.
1119 (print_insn_x86): Move all prefix oappends to after uses_f3_prefix
1120 checks. Print error on invalid dp->bytemode2. Remove simd_cmp,
1121 and handle SIMD cmp insns in OP_SIMD_Suffix.
1122 (info->bytes_per_line): Bump from 5 to 6.
1124 (OP_E): Use INTERNAL_DISASSEMBLER_ERROR. Handle sfence.
1125 (OP_3DNowSuffix): Ensure mnemonic index unsigned.
1128 * i386-dis.c (XM, EX, None): Define.
1129 (OP_XMM, OP_EX, OP_None): New functions.
1130 (USE_GROUPS, USE_PREFIX_USER_TABLE): Define.
1131 (GRP14): Rename to GRPAMD.
1132 (GRP*): Add USE_GROUPS flag.
1134 (dis386_twobyte_att, dis386_twobyte_intel): Add SIMD insns.
1135 (twobyte_has_modrm): Add SIMD entries.
1136 (twobyte_uses_f3_prefix, simd_cmp_op, prefix_user_table): New.
1137 (grps): Add SIMD insns.
1138 (print_insn_x86): New vars uses_f3_prefix and simd_cmp. Don't
1139 oappend repz if uses_f3_prefix. Add code to handle new groups for
1143 * i386-dis.c (dis386_att, dis386_intel): Change 0xE8 call insn
1144 operand from Av to Jv.
1148 * mcore-dis.c (print_insn_mcore): Use .short to display
1149 unidentified instructions, not .word.
1153 * aclocal.m4, configure: Updated for new version of libtool.
1157 * fr30-desc.c,fr30-desc.h,fr30-dis.c,fr30-ibld.c,fr30-opc.c: Rebuild.
1158 * m32r-desc.c,m32r-desc.h,m32r-dis.c,m32r-ibld.c,m32r-opc.c: Rebuild.
1162 * hppa-dis.c (print_insn_hppa, case '3'): New case for PA2.0
1167 * fr30-desc.c,fr30-desc.h,fr30-ibld.c: Rebuild.
1168 * m32r-desc.c,m32r-desc.h,m32r-opinst.c: Rebuild.
1172 * opintl.h (LC_MESSAGES): Never define.
1176 * i386-dis.c (intel_syntax, open_char, close_char): Make static.
1177 (separator_char, scale_char): Likewise.
1178 (print_insn_x86): Likewise.
1179 (print_insn_i386): Likewise. Add declaration.
1183 * fr30-dis.c: Rebuild.
1184 * m32r-dis.c: Rebuild.
1188 * m68k-opc.c: Change compare instructions to use "@s" rather than
1189 ";s" when used with an immediate operand.
1193 * cgen-opc.c (cgen_set_cpu): Delete.
1194 (cgen_lookup_insn): max_insn_size renamed to max_insn_bitsize.
1195 * fr30-desc.c,fr30-desc.h,fr30-dis.c,fr30-ibld.c,fr30-opc.c,fr30-opc.h:
1197 * m32r-desc.c,m32r-desc.h,m32r-dis.c,m32r-ibld.c,m32r-opc.c,m32r-opc.h:
1199 * po/opcodes.pot: Rebuild.
1203 * d30v-opc.c (mvtsys): Remove FLAG_LKR.
1207 * cgen-opc.c (cgen_set_cpu): New arg `isa'. All callers updated.
1208 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): New fns.
1209 (cgen_get_insn_operands): Rewrite test for hardcoded/operand index.
1210 * fr30-asm.c,fr30-desc.c,fr30-desc.h,fr30-dis.c,fr30-ibld.c: Rebuild.
1211 * m32r-asm.c,m32r-desc.c,m32r-desc.h,m32r-dis.c,m32r-ibld.c: Rebuild.
1212 * m32r-opinst.c: Rebuild.
1216 * cgen-opc.c (cgen_hw_lookup_by_name): Rewrite.
1217 (cgen_hw_lookup_by_num): Rewrite.
1218 * fr30-desc.c,fr30-desc.h,fr30-dis.c,fr30-ibld.c,fr30-opc.c: Rebuild.
1219 * m32r-desc.c,m32r-desc.h,m32r-dis.c,m32r-ibld.c,m32r-opc.c: Rebuild.
1220 * m32r-opinst.c: Rebuild.
1224 * alpha-opc.c: Add sqrt+flags patterns. Add EV6 PALcode insns.
1225 (insert_jhint): Fix insertion mask.
1226 * alpha-dis.c (print_insn_alpha): Disassemble EV6 PALcode insns.
1230 * Makefile.in: Rebuild.
1234 * i960c-asm.c,i960c-dis.c,i960c-opc.c,i960c-opc.h: Delete.
1235 * i960-dis.c (print_insn_i960): Rename from print_insn_i960_orig.
1236 * Makefile.am: Remove references to them.
1237 (HFILES): Add fr30-desc.h,m32r-desc.h.
1238 (CFILES): Add fr30-desc.c,fr30-ibld.c,m32r-desc.c,m32r-ibld.c,
1240 (ALL_MACHINES): Update.
1241 * configure.in: Redo handling of cgen_files.
1242 (bfd_i960_arch): Delete i960c-*.lo files.
1243 * configure: Regenerate.
1244 * cgen-asm.c (*): CGEN_OPCODE_DESC renamed to CGEN_CPU_DESC.
1245 (hash_insn_array): Rewrite.
1246 * cgen-dis.c (*): CGEN_OPCODE_DESC renamed to CGEN_CPU_DESC.
1247 (hash_insn_array): Rewrite.
1248 * cgen-opc.c (*): CGEN_OPCODE_DESC renamed to CGEN_CPU_DESC.
1249 (cgen_lookup_insn,cgen_get_insn_operands): Define here.
1250 (cgen_lookup_get_insn_operands): Ditto.
1251 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerate.
1252 * m32r-asm.c,m32r-dis.c,m32r-opc.c,m32r-opc.h: Regenerate.
1253 * po/POTFILES.in: Rebuild.
1254 * po/opcodes.pot: Rebuild.
1258 * Makefile.am: Rebuild dependencies.
1259 (HFILES): Add fr30-opc.h.
1260 (CFILES): Add fr30-asm.c, fr30-dis.c, fr30-opc.c.
1261 * Makefile.in: Rebuild.
1263 * configure.in: Change AC_PREREQ to 2.13. Remove AM_CYGWIN32.
1264 Change AM_EXEEXT to AC_EXEEXT and AM_PROG_INSTALL to
1266 * acconfig.h: Remove.
1267 * configure: Rebuild with current autoconf/automake.
1268 * aclocal.m4: Likewise.
1269 * config.in: Likewise.
1270 * Makefile.in: Likewise.
1274 * m68k-opc.c: Correct move (not movew) to status word on 5200.
1278 * disassemble.c (disassembler): Handle bfd_mach_i386_i386_intel_syntax.
1279 * i386-dis.c (x_mode): Define.
1282 (dis386_intel): New.
1283 (dis386_twobyte): Remove.
1284 (dis386_twobyte_att): New.
1285 (dis386_twobyte_intel): New.
1286 (print_insn_x86): Use new arrays.
1287 (float_mem): Remove.
1288 (float_mem_intel): New.
1289 (float_mem_att): New.
1290 (dofloat): Use new float_mem arrays.
1291 (print_insn_i386_att): New.
1292 (print_insn_i386_intel): New.
1293 (print_insn_i386): Handle bfd_mach_i386_i386_intel_syntax.
1294 (putop): Handle intel syntax.
1295 (OP_indirE): Handle intel syntax.
1296 (OP_E): Handle intel syntax.
1297 (OP_I): Handle intel syntax.
1298 (OP_sI): Handle intel syntax.
1299 (OP_OFF): Handle intel syntax.
1303 * fr30-opc.h,fr30-opc.c: Rebuild.
1304 * i960c-opc.h,i960c-opc.c: Rebuild.
1305 * m32r-opc.c: Rebuild.
1309 * hppa-dis.c: revert HP merge changes until HP gives us
1314 * arm-dis.c (print_insn_arm): Display ARM syntax for PC relative
1315 offsets as well as symbloic address.
1319 * hppa-dis.c: fix comments and some indentation.
1323 * fr30-opc.c,i960c-opc.c: Regenerate.
1327 * fr30-opc.c: Regenerate.
1331 * m32r-dis.c: Regenerate.
1335 * fr30-asm.c,fr30-dis.c,fr30-opc.h,fr30-opc.c: Regenerate.
1336 * i960c-asm.c,i960c-dis.c,i960c-opc.h,i960c-opc.c: Regenerate.
1337 * m32r-asm.c,m32r-dis.c,m32r-opc.h,m32r-opc.c: Regenerate.
1341 * configure.in: Require autoconf 2.12.1 or higher.
1345 * mips16-opc.c: Mark branch insns with MIPS16_INSN_BRANCH.
1349 * fr30-opc.c: Regenerated.
1353 * mips-dis.c (set_mips_isa_type): Handle bfd_mach_mips4111.
1357 * fr30-opc.c,fr30-opc.h: Regenerated.
1361 * fr30-opc.c,fr30-opc.h: Regenerated.
1365 * fr30-opc.c,fr30-opc.h: Regenerated.
1369 * m32r-opc.c: Regenerate.
1373 * dis-buf.c (generic_strcat_address): reformat to GNU coding
1374 conventions. change sprintf call to an sprintf_vma call.
1378 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
1382 The following changes were made by
1386 merge in changes by HP; HP did not create ChangeLog entries.
1388 * dis-buf.c (generic_strcat_address): new function.
1390 * hppa-dis.c: Changes to improve hppa disassembly.
1391 Changed formatting in : reg_names, fp_reg_names,control_reg,
1392 New variables : sign_extension_names, deposit_names, conversion_names
1393 float_test_names, compare_cond_names_double, add_cond_names_double,
1394 logical_cond_names_double, unit_cond_names_double,
1395 branch_push_pop_names, saturation_names, shift_names, mix_names,
1396 New Macros : GET_COMPL_O, GET_PUSH_POP,MERGED_REG
1397 Move some definitions to libhppa.h: GET_FIELD, GET_BIT
1398 (fput_const): renamed as fput_hex_const
1400 - use the macros fputs_filtered and
1401 fput_decimal_const whenever possible; calls to sign_extend require
1402 2 params -- add a missing second param of 0.
1403 - Some new code ifdefed for LOCAL_ONLY, all related to figuring out
1404 architecture version number of current machine. HP folks are
1405 trying to handle situation where the target program was compiled
1406 for PA 1.x (32-bit), but is running on a PA 2.0 machine and
1408 - added new cases : 'g', 'B', 'm'
1409 - added cases specifically for PA 2.0
1410 - changed the following cases : '"', 'n', 'N', 'p', 'Z',
1411 - calls to fput_const become calls to fput_hex_const
1415 * Makefile.am (CFILES): Add i960c-asm, i960c-dis.c, i960c-opc.c.
1416 (ALL_MACHINES): Add i960c-asm.lo, i960c-dis.lo, i960-opc.lo.
1417 (i960-asm.lo, i960c-dis.lo, i960c-opc.lo): New Makefile rules.
1418 * Makefile.in: Rebuilt.
1419 * configure.in (bfd_i960_arch): Add i960c-opc.lo, i960-asm.o,
1421 * i960-dis.c (print_insn_i960): Rename to print_insn_i960_orig.
1422 * i960c-asm.c, i960c-dis.c, i960c-opc.c, i960c-opc.h: New files.
1426 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
1430 * mips-opc.c (mips_builtin_opcodes): Add dmfc2 and dmtc2.
1432 * ppc-opc.c (powerpc_opcodes): Add PowerPC403 GC[X] instructions.
1437 * fr30-opc.c: Regenerate.
1441 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
1445 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
1449 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerate.
1453 * cgen-dis.c (hash_insn_array): CGEN_INSN_VALUE ->
1454 CGEN_INSN_BASE_VALUE.
1455 * m32r-opc.c,m32r-opc.h,m32r-asm.c,m32r-dis.c: Regenerate.
1456 * fr30-opc.c,fr30-opc.h,fr30-asm.c,fr30-dis.c: Regenerate.
1460 * fr30-asm.c,fr30-dis.c,fr30-opc.c: Regenerated.
1464 * fr30-asm.c,fr30-dis.c: Regenerated.
1468 * fr30-asm.c,fr30-dis.c,fr30-opc.c,fr30-opc.h: Regenerated.
1472 * fr30-opc.c: Regenerated.
1476 * fr30-opc.c: Regenerated.
1477 * fr30-opc.h: Regenerated.
1478 * fr30-dis.c: Regenerated.
1479 * fr30-asm.c: Regenerated.
1483 * mips-opc.c (sync.p,sync.l): Swap insn values.
1487 * fr30-opc.c: Regenerate.
1491 * fr30-opc.c: Regenerated.
1492 * fr30-opc.h: Regenerated.
1496 * m32r-asm.c,m32r-dis.c,m32r-opc.c: Rebuild.
1497 * fr30-asm.c,fr30-dis.c,fr30-opc.c: Rebuild.
1501 * fr30-opc.c: Regenerated.
1505 * fr30-opc.c: Regenerated.
1506 * fr30-opc.h: Regenerated.
1507 * fr30-dis.c: Regenerated.
1508 * fr30-asm.c: Regenerated.
1512 * po/opcodes.pot: Regenerated.
1513 * fr30-opc.c: Regenerated.
1514 * fr30-opc.h: Regenerated.
1515 * fr30-dis.c: Regenerated.
1516 * fr30-asm.c: Regenerated.
1520 * disassemble.c (disassembler): Add support for FR30 target.
1524 * m32r-dis.c,m32r-opc.c,m32r-opc.h: Rebuild.
1525 * fr30-dis.c,fr30-opc.c,fr30-opc.h: Rebuild.
1529 * po/opcodes.pot: Regenerate.
1530 * po/POTFILES.in: Regenerate.
1531 * fr30-opc.c: Regenerate.
1532 * fr30-opc.h: Regenerate.
1536 * m32r-asm.c: Regenerate.
1540 * configure.in: Added case for bfd_fr30_arch.
1541 * Makefile.am (CFILES): Added fr30-asm.c, fr30-dis.c, fr30-opc.c.
1542 (ALL_MACHINES): Added fr30-asm.lo, fr30-dis.lo, fr30-opc.lo.
1543 (CLEANFILES): Added stamp-fr30.
1545 * fr30-asm.c: New file.
1546 * fr30-dis.c: New file.
1547 * fr30-opc.c: New file.
1548 * fr30-opc.h: New file.
1549 * po/POTFILES.in: Regenerated
1550 * po/opcodes.pot: Regenerated
1554 * configure.in: detect cygwin* instead of cygwin32*
1555 * configure: regenerate
1559 * mips-opc.c (IS_M): Added.
1563 * m32r-opc.c,m32r-opc.h,m32r-asm.c,m32r-dis.c: Regenerate.
1567 * m32r-opc.h,m32r-opc.c: Regenerate.
1571 * i386-dis.c (OP_3DNowSuffix): New static function.
1574 (dis386_twobyte): Add GRP14, femms, and 3DNow entries.
1575 (twobyte_has_modrm): Set entries corresponding to GRP14, 3DNow.
1576 (insn_codep): New static variable.
1577 (print_insn_x86): Init insn_codep after prefixes.
1578 (grps): Add GRP14 entries for prefetch, prefetchw.
1582 * i386-dis.c (Suffix3DNow): New table.
1586 * d10v-opc.c: Treat TRAP as if it were a branch type instruction.
1590 * d10v-dis.c (print_operand): If num is nonzero, then
1591 add OPERAND_ACC1, not OPERAND_ACC0.
1595 * d30v-opc.c: Add FLAG_JSR attribute to DBT, REIT, RTD, and TRAP
1600 * d30v-opc.c: Add use of EITHER_BUT_PREFER_MU execution unit
1605 * m32r-opc.h,m32r-opc.c: Add bbpc,bbpsw support.
1609 * ppc-opc.c (powerpc_opcodes): Add support for PowerPC 750 move
1614 * arm-dis.c (print_insn_big_arm): Detect Thumb symbols in elf
1616 (print_insn_little_arm): Detect Thumb symbols in elf object
1621 * alpha-dis.c (print_insn_alpha): Use the machine type to
1622 decide which PALcode set to include.
1626 * sparc-opc.c (FBRX): Fix typo in ",a,pn %fcc3" case.
1630 * d30v-opc.c (d30v_opcode_table): Add FLAG_MUL32 to MAC, MACS,
1631 MSUB and MSUBS instructions.
1635 * ppc-opc.c (powerpc_operands): Omit parens around additions in
1636 operand name macros.
1641 * m68k-opc.c: Correct mulsl and mulul to use q rather than D, a,
1642 +, -, and d for ColdFire.
1645 * ppc-opc.c (insert_mbe): Handle wrapping bitmasks.
1646 (extract_mbe): Likewise.
1650 * m10300-opc.c: Fix typo in udf20 .. udf25 instruction opcodes.
1652 * m10300-opc.c: First cut at UDF instructions.
1656 * m32r-opc.c: Regenerate (remove semantic descriptions).
1660 * arm-dis.c (print_insn_big_arm): Fix indentation.
1661 (print_insn_little_arm): Likewise.
1665 * arm-dis.c (print_insn_big_arm): Check for thumb symbol
1667 (print_insn_little_arm): Likewise.
1671 Move all global state data into opcode table struct, and treat
1672 opcode table as something that is "opened/closed".
1673 * cgen-asm.c (all fns): New first arg of opcode table descriptor.
1674 (cgen_asm_init): Delete.
1675 (cgen_set_parse_operand_fn): New function.
1676 * cgen-dis.c (all fns): New first arg of opcode table descriptor.
1677 (cgen_dis_init): Delete.
1678 * cgen-opc.c (all fns): New first arg of opcode table descriptor.
1679 (cgen_current_{opcode_table_mach,endian}): Delete.
1680 * m32r-asm.c,m32r-dis.c,m32r-opc.c,m32r-opc.h: Regenerate.
1684 * d30v-opc.c (d30v_opcode_table): Add new "LKR" flag to some
1689 * m10300-opc.c: Add entries for "no_match_operands" field in
1694 * m32r-asm.c,m32r-opc.c: Regenerate (-Wall cleanups).
1698 * m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate.
1702 * i386-dis.c (ckprefix): Handle fwait specially only when it isn't
1704 (dofloat): Correct test for fnstsw. Print `fnstsw %ax' rather
1706 (OP_J): Remove unnecessary subtraction when 16-bit displacement
1707 will be masked later.
1711 * m32r-opc.h (CGEN_MIN_INSN_SIZE): New #define.
1715 * m32r-asm.c,m32r-dis.c,m32r-opc.c,m32r-opc.h: Regenerate.
1719 * m10300-dis.c: Only recognize instructions from the currently
1721 * m10300-opc.c: Add field indicating the particular variant of
1722 the mn10300 each instruction is available on.
1726 * configure.in: For bfd_vax_arch, build vax-dis.lo.
1727 * Makefile.am: Rebuild dependencies.
1728 (CFILES): Add vax-dis.c.
1729 (ALL_MACHINES): Add vax-dis.lo.
1730 * aclocal.m4: Rebuild with current libtool.
1731 * configure, Makefile.in: Rebuild.
1735 * vax-dis.c: New file, from work by Pauline Middelink
1737 * disassemble.c (ARCH_vax): Define if ARCH_all.
1738 (disassembler): Add case for ARCH_vax.
1739 * makefile.vms: Support compilation on vms/vax.
1743 * m10200-dis.c (print_insn_mn10200): Fix various non-portabilities
1744 related to sign extension and the size of ints.
1748 * m10300-opc.c: Support one operand "asr", "lsr" and "asl"
1749 instructions. Support (sp) addressing mode by expanding it into
1754 * mips-dis.c (_print_insn_mips): Fix argument interchange typo.
1758 * m10200-dis.c (print_insn_mn10200): Recognize 'break' pseudo-op.
1762 * i386-dis.c: Add support for fxsave, fxrstor, sysenter and
1767 * mips-dis.c (print_insn_little_mips): Previously, instruction
1768 printing references the symbol table to determine whether the
1769 instruction resides in a block regular instructions or mips16
1770 instructions. However, when the disassembler gets used in other
1771 environments where the symbol table is not present, we no longer
1772 rely in the symbol table, rather, use the low bit of the
1773 instructions address to guess. There should be no change for usage
1774 of the disassembler in host based programs, gdb, objdump.
1775 (print_insn_big_mips): ditto.
1776 (print_insn_mips): ditto
1780 * m10200-dis.c (print_insn_mn10200): Don't bomb on unknown opcodes.
1784 * m10300-opc.c (mn10300_opcodes): Change opcode for "syscall".
1788 * i386-dis.c (index16): Add '%' to register names. Use ','
1793 * i386-dis.c: Don't print opcode suffix when we can figure out the
1794 size (and gas can!) by register operands, or from the default
1796 (putop): Handle 'A', 'B', 'L', 'P', 'Q', 'R' macros. Rename 'C'
1798 (dis386, dis386_twobyte, grps): Use new suffix macros.
1799 (dis386): Correct imul Ib to imul sIb. Change jnl to jge to be
1800 consistent. Add suffix for call, jmp, lcall, ljmp, iret. Reverse
1801 order of cmps operands to agree with Intel docs. Correct operand
1802 of aad and aam (Ib -> sIb). Change ud2b from 0fb8 to 0fb9 to
1803 agree with Intel docs.
1804 (print_insn_x86): Print orphan fwait before other prefixes.
1805 Return correct byte count for orphan fwait with prefixes. Don't
1806 print `bound' operands in reverse order.
1807 (ckprefix): Stop accumulating prefixes if we get fwait.
1808 (OP_DIR): Print `$' before Ap operands of ljmp, lcall.
1812 * po/Make-in (all-yes): If maintainer mode, depend on .pot file.
1813 ($(PACKAGE).pot): Unconditionally depend on POTFILES.
1817 Fix problems when bfd_vma is wider than long.
1818 * i386-dis.c: Make op_address and start_pc unsigned.
1819 (set_op): Make parameter unsigned.
1820 (print_insn_x86): Cast to bfd_vma when passing a value to
1822 * ns32k-dis.c (CORE_ADDR): Don't define.
1823 (print_insn_ns32k): Change type of addr to bfd_vma. Use
1824 bfd_scan_vma to read back address.
1825 (print_insn_arg): Change type of addr to bfd_vma. Use sprintf_vma
1827 * m68k-dis.c (COERCE32): Cast to bfd_signed_vma to avoid overflow.
1828 (NEXTULONG): New definition.
1829 (print_insn_m68k): Avoid overflow when computing third argument of
1831 (print_insn_arg): Use NEXTULONG to fetch 32 bit address values.
1832 Use disp instead of val to store offset values.
1833 (print_indexed): Use base_disp instead of word to store base
1834 displacement, to avoid overflow.
1835 * m10300-dis.c (disassemble): Cast value to long when computing
1836 pc-relative address, to get correct sign extension.
1840 * m32r-opc.c: Regenerate.
1844 * arm-opc.h (thumb_opcodes): Display 'add rx, rY, #0' insns as
1849 * d30v-opc.c: Remove FALG_MUL32 attribyte from MULX2H insn.
1853 * i386-dis.c: Combine aflag and dflag into sizeflag. Change OP_*
1855 (OP_DSreg): Rename from OP_DSSI.
1856 (OP_ESreg): Rename from OP_ESDI.
1857 (Xb, Xv, Yb, Yv): Use index reg code, not b_mode or v_mode.
1859 (append_seg): Rename from append_prefix.
1860 (ptr_reg): New function.
1861 (dis386): Add S suffix to pushf, popf, ret, lret, enter, leave.
1863 (PREFIX_ADDR): Rename from PREFIX_ADR.
1864 (float_reg): Add non-broken opcodes for people who don't want
1869 * m68k-opc.c (tstb, tstw, tstl): Don't allow pcrel on
1874 * i386-dis.c (dis386): Change 0x60 to "pushaS", 0x61 to "popaS".
1878 * ppc-opc.c (powerpc_macros): Support shifts and rotates of size
1879 0; produce error message for shifts of size 32 (or 64 for 64-bit
1880 shifts), because the hardware doesn't support them.
1884 * d30v-opc.c: Add new operand: Ra3. Change SHORT_B3, SHORT_B3b,
1885 LONG_2, LONG_2b formats to use this new operand.
1889 * sparc-dis.c (compute_arch_mask): Added bfd_mach_sparc_sparclite_le.
1893 * sparc-dis.c (print_insn_sparc): big endian instruction / little
1894 endian data support.
1898 * d30v-opc.c (d30v_format_table): Change definition of SHORT_B3
1899 and SHORT_B3b formats to use Rb instead of Ra.
1901 Add FLAG_MUL16 to MUL2XH opcode.
1903 Add FLAG_ADDSUBppp to SRC and SATHp opcodes to implement extension
1904 to existing 1.1.1 parallelisation prohibition procedure.
1908 * m32r-asm.c,m32r-dis.c: Regenerate.
1912 * mips-dis.c (print_mips16_insn_arg): Handle type ']' correctly
1913 with a shift count of 0.
1917 * cgen-opc.c (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1918 (cgen_hw_lookup_by_num): New function.
1922 * m32r-asm.c: Regenerate (handle uppercase HIGH/SHIGH/LOW/SDA).
1926 * sparc-dis.c (print_insn_sparc): Always fetch instructions
1927 as big-endian on SPARClite.
1931 * d30v-opc.c (pre_defined_register): Remove alias for r0.
1935 * po/Make-in (install-info): New target.
1939 * configure.in (WIN32LIBADD): Add -lintl on cygwin32.
1940 * configure: Rebuild.
1944 * mips-opc.c (teq,tge,tgeu,tlt,tltu,tne): Added three-operand
1945 variety of ISA2 instructions to set bottom ten bits of trap code.
1949 * Makefile.am (config.status): Add explicit target so that
1950 config.status depends upon bfd/configure.in.
1951 * Makefile.in: Rebuild.
1955 * mips-opc.c (break, sdbbp): Added two-operand variety of ISA1
1956 instructions to set bottom ten bits of break code.
1957 * mips-dis.c (print_insn_arg): Implement 'q' operand format used
1958 for above optional argument.
1962 * makefile.vms: Run dec c with /nodebug.
1966 * Makefile.in: Rebuilt.
1967 * Makefile.am: Regenerated dependencies with mkdep.
1969 * opintl.h (_): Define as dgettext.
1973 * cgen-asm.c: Internationalised.
1974 * m32r-asm.c: Internationalised.
1975 * m32r-dis.c: Internationalised.
1976 * m32r-opc.c: Internationalised.
1978 * aclocal.m4: Regenerated.
1979 * configure: Regenerated.
1980 * Makefile.am (POTFILES): Remove inclusion of BFD_H.
1981 * Makefile.in: Rebuild.
1982 * po/POTFILES.in: Rebuilt using rule in Makefile.in.
1983 * po/opcodes.pot: Rebuilt after changing POTFILES.in.
1987 * configure.in: Call AC_ISC_POSIX near start. Move CY_GNU_GETTEXT
1989 * aclocal.m4, configure: Rebuild with current tools.
1993 * opintl.h: New file - contains internationalisation macros used
1994 by source files in this directory.
1995 * po/: New subdirectory - contains internationalisation files.
1996 * po/Make-in: New file - Makefile constructor.
1997 * po/POTFILES.in: New file - list of files in opcodes directory
1998 that should be scan for internationalisation macros.
1999 * po/opcodes.pot: New file - list of internationisation strings
2000 found in files mentioned in po/POTFILES.in.
2001 * Makefile.am: Add rule to build po/POTFILES.in. Add SUBDIRS
2002 entry. Add intl directory to include paths.
2003 * acconfig.h: Add ENABLE_NLS, HAVE_CATGETS, HAVE_GETEXT,
2004 HAVE_STRCPY, HAVE_LC_MESSAGES
2005 * configure.in: Add rule to build Makefile in po subdirectory.
2006 * Makefile.in: Rebuilt.
2007 * aclocal.m4: Rebuilt.
2008 * config.in: Rebuilt.
2009 * configure: Rebuilt.
2010 * alpha-opc.c: Internationalised.
2011 * arc-dis.c: Internationalised.
2012 * arc-opc.c: Internationalised.
2013 * arm-dis.c: Internationalised.
2014 * cgen-asm.c: Internationalised.
2015 * d30v-dis.c: Internationalised.
2016 * dis-buf.c: Internationalised.
2017 * h8300-dis.c: Internationalised.
2018 * h8500-dis.c: Internationalised.
2019 * i386-dis.c: Internationalised.
2020 * m10200-dis.c: Internationalised.
2021 * m10300-dis.c: Internationalised.
2022 * m68k-dis.c: Internationalised.
2023 * m88k-dis.c: Internationalised.
2024 * mips-dis.c: Internationalised.
2025 * ns32k-dis.c: Internationalised.
2026 * opintl.h: Internationalised.
2027 * ppc-opc.c: Internationalised.
2028 * sparc-dis.c: Internationalised.
2029 * v850-dis.c: Internationalised.
2030 * v850-opc.c: Internationalised.
2034 * cgen-asm.c (cgen_current_opcode_table): Renamed from ..._data.
2035 (asm_hash_table_entries): New variable.
2036 (cgen_asm_init): Free asm_hash_table_entries.
2037 (hash_insn_array,hash_insn_list): New functions.
2038 (build_asm_hash_table): Use them. Hash macro insns as well.
2039 (cgen_asm_lookup_insn): Update.
2040 * cgen_dis.c (cgen_current_opcode_table): Renamed from ..._data.
2041 (dis_hash_table_entries): New variable.
2042 (cgen_dis_init): Free dis_hash_table_entries.
2043 (hash_insn_array,hash_insn_list): New functions.
2044 (build_dis_hash_table): Use them. Hash macro insns as well.
2045 (cgen_dis_lookup_insn): Update.
2046 * cgen-opc.c (cgen_current_opcode_table): Renamed from ..._data.
2047 (cgen_set_cpu,cgen_hw_lookup,cgen_insn_count): Update.
2048 (cgen_macro_insn_count): New function.
2049 * m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate.
2053 * i386-dis.c (OP_DSSI): Print segment override.
2057 * arm-dis.c (print_insn_arm): Add "_all" extension to 'C'
2062 * Makefile.am (libopcodes_la_LIBADD): Add @WIN32LIBADD@.
2063 (libopcodes_la_LDFLAGS): Add @WIN32LDFLAGS@.
2064 * configure.in: Define and substitute WIN32LDFLAGS and
2066 * aclocal.m4: Rebuild with new libtool.
2067 * configure, Makefile.in: Rebuild.
2071 * m32r-opc.c: Regenerate.
2075 * Makefile.am (stamp-lib): Check that .libs/libopcodes.a exists
2076 before trying to copy it.
2077 * Makefile.in: Rebuild.
2081 * m32r-opc.c: Use signed immediate values for CMPUI instruction.
2085 * ns32k-dis.c (bit_extract_simple): New function to extract bits
2086 from an arbitrary valid buffer instead of fetching them on demand
2088 (invalid_float): use bit_extract_simple() instead of bit_extract().
2093 * i386-dis.c (dis386): Change 0x8c and 0x8e to movS, and change Ew
2098 * Branched binutils 2.9.
2102 * d30v-dis.c (print_insn_d30v): Don't use uninitialized "num" when
2103 disassembling last 4 bytes of a section.
2107 Fix some gcc -Wall warnings:
2108 * arc-dis.c (print_insn): Add casts to avoid warnings.
2109 * cgen-opc.c (cgen_keyword_lookup_name): Likewise.
2110 * d10v-dis.c (dis_long, dis_2_short): Likewise.
2111 * m10200-dis.c (disassemble): Likewise.
2112 * m10300-dis.c (disassemble): Likewise.
2113 * ns32k-dis.c (print_insn_ns32k): Likewise.
2114 * ppc-opc.c (insert_ral, insert_ram): Likewise.
2115 * cgen-dis.c (build_dis_hash_table): Remove used local variables.
2116 * cgen-opc.c (cgen_keyword_search_next): Likewise.
2117 * d10v-dis.c (dis_long, dis_2_short): Likewise.
2118 * d30v-dis.c (print_insn_d30v, lookup_opcode): Likewise.
2119 * ns32k-dis.c (bit_extract, print_insn_ns32k): Likewise.
2120 * tic80-dis.c (print_one_instruction): Likewise.
2121 * w65-dis.c (print_operand): Likewise.
2122 * z8k-dis.c (fetch_data): Likewise.
2123 * a29k-dis.c: Add return type for find_byte_func_type.
2124 * arc-opc.c: Include <stdio.h>. Remove declarations of
2125 insert_multshift and extract_multshift.
2126 * d30v-dis.c (lookup_opcode): Parenthesize assignments in
2128 (extract_value): Fully parenthesize expression.
2129 * h8500-dis.c (print_insn_h8500): Initialize local variables.
2130 * h8500-opc.h (h8500_table): Fully bracket initializer.
2131 * w65-opc.h (optable): Likewise.
2132 * i386-dis.c (print_insn_x86): Declare aflag and flag parameters.
2133 * i386-dis.c (OP_E): Initialize local variables.
2134 * m10200-dis.c (print_insn_mn10200): Likewise.
2135 * mips-dis.c (print_insn_mips16): Likewise.
2136 * sh-dis.c (print_insn_shx): Likewise.
2137 * v850-dis.c (print_insn_v850): Likewise.
2138 * ns32k-dis.c (print_insn_arg): Declare.
2139 (get_displacement, invalid_float): Declare.
2140 (list_search, sign_extend, flip_bytes): Declare return type.
2141 (get_displacement): Likewise.
2142 (print_insn_arg): Likewise. Make d int. Fix sprintf format
2144 (print_insn_ns32k): Make i unsigned.
2145 (invalid_float): Make static. Declare type of val.
2146 * tic30-dis.c (print_par_insn): Make i size_t. Don't check strlen
2147 on each for iteration.
2148 * tic30-dis.c (get_indirect_operand): Likewise.
2149 * z8k-dis.c (print_insn_z8001): Declare return type.
2150 (print_insn_z8002): Likewise.
2151 (unparse_instr): Fix sprintf format strings.
2155 * mips-opc.c: Add "sync.l" and "sync.p".
2159 * m68k-dis.c (print_insn_m68k): Use info->mach to select the
2160 default m68k variant to recognize.
2162 * i960-dis.c (pinsn): Change type of first argument to bfd_vma.
2163 (ctrl, cobr, mem, ea): Likewise.
2164 (print_addr): Likewise. Remove cast.
2165 (ea): Cast argument of print_addr to bfd_vma.
2167 * cgen-asm.c (cgen_parse_signed_integer): Fix type of local
2169 (cgen_parse_unsigned_integer): Likewise.
2170 (cgen_parse_address): Likewise.
2174 * i960-dis.c (ctrl): Add full braces to structure initialization.
2175 (cobr, mem, reg): Likewise.
2176 (ea): Correct parenthesization in expression.
2178 * cgen-asm.c: Include <ctype.h>.
2179 (build_asm_hash_table): Remove unused local variable i.
2180 (cgen_parse_keyword): Add casts to avoid warnings.
2182 * arm-dis.c (print_insn_big_arm): Only call coffsymbol for a COFF
2183 symbol. Fix indentation.
2184 (print_insn_little_arm): Likewise.
2188 * configure.in: Use AM_DISABLE_SHARED.
2189 * aclocal.m4, configure: Rebuild with libtool 1.2.
2193 These patches are courtesy of Jonathan Walton and Tony Thompson
2196 * arm-dis.c (print_insn_thumb): Ignore bottom two bits of PC
2199 * arm-opc.h (thumb_opcodes): Annotate PC relative addresses with
2200 both the offset and the label closest to the destination.
2204 * m32r-opc.h: Regenerate.
2208 * m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate.
2212 * arm-dis.c (print_insn_big_arm, print_insn_little_arm): Do not
2213 assume that info->symbols is non-empty.
2217 * alpha-opc.c (cvtqs) There is no such thing.
2218 (cvttq): Missing most of the /*d variants.
2222 * d30v-opc.c (d30v_opcode_table): Indicate which instructions are
2223 delayed branches or jumps.
2227 * arm-dis.c (print_insn_{big,little}_arm): info->symbol changed
2229 * mips-dis.c (print_insn_{big,little}_mips): Likewise.
2230 * tic30-dis.c (print_branch): Likewise.
2234 * arm-dis.c (print_insn_big_arm, print_insn_little_arm): Remove
2235 saved_symbol code as it is no longer needed.
2239 * cgen-asm.c: Include symcat.h.
2240 * cgen-dis.c,cgen-opc.c: Ditto.
2241 * m32r-asm.c,m32r-dis.c,m32r-opc.h,m32r-opc.c: Regenerate.
2245 * mips-dis.c (print_insn_arg): Do not prefix 'P' arguments with '$'.
2249 * m32r-opc.[ch]: Regenerate.
2253 * cgen-asm.c (cgen_parse_{signed,unsigned}_integer): Delete min,max
2254 arguments. Don't perform validation here.
2255 * m32r-asm.c,m32r-dis.c,m32r-opc.c: Regenerate.
2259 * m32r-opc.c: Regenerate.
2263 * Makefile.am (AUTOMAKE_OPTIONS): Define.
2264 * configure, Makefile.in, aclocal.m4: Rebuild with automake 1.2e.
2268 * m10300-dis.c (print_insn_mn10300): Recognize break instruction.
2272 * configure.in: Get the version number from BFD.
2273 * configure: Rebuild.
2276 * Makefile.am (libopcodes_la_LDFLAGS): Define.
2277 * Makefile.in: Rebuild.
2281 * m32r-opc.c: Regenerate.
2282 * m32r-opc.h: Regenerate.
2286 * m32r-opc.c: Regenerate.
2290 Fix rac to accept only a0:
2291 * d10v-opc.c (d10v_predefined_registers, d10v_operands, d10v_opcodes):
2292 Split OPERAND_ACC into OPERAND_ACC0 and OPERAND_ACC1.
2293 Introduce OPERAND_GPR.
2294 * d10v-dis.c (print_operand): Likewise.
2298 * cgen-opc.c (cgen_set_cpu): Delete init of hw list `next' chain.
2299 (cgen_hw_lookup): Make result const.
2300 * m32r-opc.h, m32r-opc.c, m32r-asm.c, m32r-dis.c: Regenerate.
2304 * configure, aclocal.m4: Rebuild with new libtool.
2308 * d30v-opc.c (repeat{,i} instructions): Repeat/repeati
2309 instructions use a PC relative branch, not absolute.
2313 * configure.in: Set libtool_enable_shared rather than
2314 libtool_shared. Remove diversion hack.
2315 * configure, Makefile.in, aclocal.m4: Rebuild with new libtool.
2319 * cgen-opc.c (cgen_set_cpu): Initialize hardware table.
2320 * m32r-opc.h, m32r-opc.c, m32r-asm.c, m32r-dis.c: Regenerate.
2324 * tic30-dis.c: New file.
2325 * disassemble.c (disassembler): Add bfd_arch_tic30 case.
2326 * configure.in: Handle bfd_tic30_arch.
2327 * Makefile.am: Rebuild dependencies.
2328 (CFILES): Add tic30-dis.c
2329 (ALL_MACHINES): Add tic30-dis.lo.
2330 * configure, Makefile.in: Rebuild.
2334 * m32r-opc.h (HAVE_CPU_M32R): Define.
2338 * v850-opc.c (insertion routines): If both alignment and size is
2339 wrong then report this.
2343 * mips-dis.c (_print_insn_mips): Set target_processor as appropriate.
2344 Only recognize instructions for the current target_processor.
2348 * d10v-dis.c (PC_MASK): Correct value.
2349 (print_operand): If there's a reloc, don't calculate the
2350 address because they could be in different sections.
2354 * mips-opc.c (mips_builtin_opcodes): Move 4010's "addciu"
2355 instruction after the 4650's "mul" instruction; nobody's using the
2356 4010 these days. If object files someday indicate which processor
2357 variant they're intended for, we can do a better job at this.
2361 * cgen-asm.c (build_asm_hash_table): Traverse compiled in table using
2362 table provided entry size. Use CGEN_INSN_MNEMONIC.
2363 (cgen_parse_keyword): Rewrite.
2364 * cgen-dis.c (build_dis_hash_table): Traverse compiled in table using
2365 table provided entry size. Use CGEN_INSN_MASK_BITSIZE.
2366 * cgen-opc.c: Clean up pass over `struct foo' usage.
2367 (cgen_keyword_lookup_value): Handle "" entry.
2368 (cgen_keyword_add): Likewise.
2372 * mips-opc.c: Add FP_D to s.d instruction flags.
2376 * m68k-opc.c (halt, pulse): Enable them on the 68060.
2380 * tic80-opc.c (tic80_opcodes): Revert change that put the 32 bit
2381 PC relative offset forms before the 15 bit forms. An assembler command
2382 line option now chooses the default.
2386 * d30v-opc.c (d30v_opcode_table): Set new flags bits
2387 FLAG_{2WORD,MUL{16,32},ADDSUBppp}, in appropriate instructions.
2391 * configure: Only build libopcodes shared if --enable-shared's value
2392 was `yes', or was set to `*opcodes*'.
2393 * aclocal.m4: Likewise.
2394 * NOTE: this really needs to be fixed in libtool/libtool.m4, the
2395 original source of this bit of code. It's not clear what the best fix
2400 * tic80-opc.c (OFF_SL_PC, OFF_SL_BR): Minor formatting change.
2401 (tic80_opcodes): Reorder table entries to put the 32 bit PC relative
2402 offset forms before the 15 bit forms, to default to the long forms.
2406 * alpha-opc.c (cvttq/*u*): Remove, as that suffix is invalid.
2410 * arm-dis.c (print_insn_little_arm): Prevent examination of stored
2411 symbol if none is present.
2412 (print_insn_big_arm): Prevent examination of stored symbol if
2417 * d10v-opc.c (d10v_opcodes): Correct entry for RTE.
2421 * disassemble.c: Remove disasm_symaddr() function.
2423 * arm-dis.c: Use info->symbol instead of info->flags to determine
2424 if disassmbly should be in Thumb or Arm mode.
2428 * arm-dis.c: Add support for disassembling Thumb opcodes.
2429 (print_insn_thumb): New function.
2431 * disassemble.c (disasm_symaddr): New function.
2433 * arm-opc.h: Display nop pseudo ops alongside equivalent disassembly.
2434 (thumb_opcodes): Table of Thumb opcodes.
2438 * m68k-opc.c (btst): Change Dd@s to Dd;b.
2440 * m68k-dis.c (print_insn_arg): Recognize 'm', 'n', 'o', 'p', 'q',
2441 and 'v' as operand types.
2445 * m68k-opc.c: Add argument for lpstop. From Olivier Carmona
2447 * m68k-dis.c (print_insn_m68k): Handle special case of lpstop,
2448 which has a two word opcode with a one word argument.
2452 * d30v-opc.c (d30v_opcode_table, case cmpu): Immediate field is
2453 unsigned, not signed.
2454 (d30v_format_table): Add SHORT_CMPU cases for cmpu.
2458 * d10v-dis.c (print_operand):
2459 Split OPERAND_FLAG into OPERAND_FFLAG and OPERAND_CFLAG.
2463 * d10v-opc.c (OPERAND_FLAG): Split into:
2464 (OPERAND_FFLAG, OPERAND_CFLAG) .
2470 * mips-opc.c: Move the INSN_MACRO ISA value to the membership
2471 field for all INSN_MACRO's.
2472 * mips16-opc.c: same
2476 * mips-opc.c (sync,cache): These are 3900 insns.
2480 sh-opc.h (sh_table): Remove ftst/nan.
2484 * mips-opc.c (ffc, ffs): Fix mask.
2488 * d30v-opc.c (pre_defined_registers): Add eit_vb, int_s, and int_m
2493 * mips-opc.c: Fix bug in mask for "not" pseudo-instruction.
2494 (WR_HILO, RD_HILO, MOD_HILO): New macros.
2498 * mips-opc.c: Fix bug in mask for "not" pseudo-instruction.
2499 (WR_HILO, RD_HILO, MOD_HILO): New macros.
2503 * v850-dis.c (disassemble): Replace // with /* ... */
2507 * sparc-opc.c: Add wr & rd for v9a asr's.
2508 * sparc-dis.c (print_insn_sparc): Recognize '_' and '/' for v9a asr's.
2509 (v9a_asr_reg_names): New variable.
2514 * sparc-opc.c (v9notv9a): New insn type.
2515 (IMPDEP): Move to the end to not conflict with edge8 et al.
2520 * mips-opc.c (bnezl,beqzl): Mark these as also tx39.
2524 * mips-opc.c: Note that 'jalx' is (probably incorrectly) marked I1.
2528 * v850-dis.c (disassemble): Use new symbol_at_address_func() field
2529 of disassemble_info structure to determine if an overlay address
2530 has a matching symbol in low memory.
2532 * dis-buf.c (generic_symbol_at_address): New (dummy) function for
2533 new symbol_at_address_func field in disassemble_info structure.
2537 * v850-opc.c (extract_d22): Use signed arithmatic.
2541 * mips-opc.c: Three op mult is not an ISA insn.
2545 * mips-opc.c: Fix formatting.
2549 * i386-dis.c (OP_E): Explicitly sign extend 8 bit values, rather
2550 than assuming that char is signed. Explicitly sign extend 16 bit
2551 values, rather than assuming that short is 16 bits.
2552 (OP_sI, OP_J, OP_DIR): Likewise.
2556 * v850-dis.c (v850_sreg_names): Use symbolic names for higher
2561 * v850-opc.c: Fix typo in comment.
2563 * v850-dis.c (disassemble): Add test of processor type when
2564 determining opcodes.
2568 * configure.in: Use a diversion to set enable_shared before the
2569 arguments are parsed.
2570 * configure: Rebuild.
2574 * m68k-opc.c (TBL1): Use ! rather than `.
2575 * m68k-dis.c (print_insn_arg): Remove ` operand specifier.
2579 * m68k-opc.c: Correct bchg, bclr, bset, and btst on ColdFire.
2581 * m68k-opc.c: Accept tst{b,w,l} with immediate operands on cpu32.
2583 * m68k-opc.c: Correct movew of an immediate operand to %sr or %ccr
2586 * configure.in: Call AC_CHECK_TOOL before AM_PROG_LIBTOOL.
2587 * aclocal.m4: Rebuild with new libtool.
2588 * configure: Rebuild.
2592 * v850-opc.c ("cmov"): Order reg param r1, r2 not r2, r2.
2596 * sparc-opc.c (sparclet_cpreg_table): Add %ccsr2, %cccrr, %ccrstr.
2600 * v850-opc.c (v850_opcodes): Further rearrangements.
2604 * d30v-opc.c (rot2h, sra2h, srl2h insns): Revert last change.
2608 * v850-opc.c (v850_opcodes): Fields reordered to allow assembler
2613 * mips-opc.c: Added tx39 insns sdbbp, rfe, and deret.
2617 * v850-opc.c: Initialise processors field of v850_opcode structure.
2621 Merge changes from Martin Hunt:
2623 * d30v-opc.c: Change mvfacc to accept 6-bit unsigned values.
2625 * d30v-opc.c (pre_defined_registers): Add control registers from 0-63.
2626 (d30v_opcode_tabel): Add dbt, rtd, srah, and srlh instructions. Fix
2627 rot2h, sra2h, and srl2h to use new SHORT_A5S format.
2629 * d30v-dis.c (print_insn): Fix disassembly of SHORT_D2 opcodes.
2631 * d30v-dis.c (print_insn): First operand of d*i (delayed
2632 branch) instructions is relative.
2634 * d30v-opc.c (d30v_opcode_table): Change form for repeati.
2635 (d30v_operand_table): Add IMM6S3 type.
2636 (d30v_format_table): Change SHORT_D2. Add LONG_Db.
2638 * d30v-dis.c: Fix bug with ".s" and ".l" extensions
2639 and cmp instructions.
2641 * d30v-opc.c: Correct entries for repeat*, and sat*.
2642 Make IMM5 unsigned. Create IMM6U and IMM12S3U operand
2643 types. Correct several formats.
2645 * d30v-opc.c: (pre_defined_registers): Add dpsw and dpc.
2647 * d30v-opc.c (pre_defined_registers): Change control registers.
2649 * d30v-opc.c (d30v_format_table): Correct SHORT_C1 and
2650 SHORT_C2. Manual was incorrect.
2652 * d30v-dis.c (lookup_opcode): Return value now indicates
2653 if an opcode has a short and a long form. Used for deciding
2654 to append a ".s" or ".l".
2655 (print_insn): Append a ".s" to an instruction if it is
2656 the short form and ".l" if it is a long form. Do not append
2657 anything if the instruction has only one possible size.
2659 * d30v-opc.c: Change mulx2h to require an even register.
2660 New form: SHORT_A2; a SHORT_A form that needs an even
2661 register as the first operand.
2663 * d30v-dis.c (print_insn_d30v): Fix problem where the last
2664 instruction was not being disassembled if there were an odd
2665 number of instructions.
2667 * d30v-opc.c (SHORT_M2, LONG_M2): Two new forms.
2671 * v850-dis.c (disassemble): Improved display of register lists.
2675 * sparc-opc.c (sparc_opcodes): Fix assembler args to
2676 fzeros, fones, fsrc1, fsrc1s, fsrc2s, fnot1, fnot1s, fnot2s,
2677 fors, fnors, fands, fnands, fxors, fxnors, fornot1s, fornot2s,
2678 fandnot1s, fandnot2s.
2682 * sparc-opc.c (sparc_opcodes): Fix op3 field for fcmpq/fcmpeq.
2686 * cgen-asm.c (cgen_parse_address): New argument resultp.
2687 All callers updated.
2688 * m32r-asm.c (parse_h_hi16): Right shift numbers by 16.
2692 * mn10200-dis.c (disassemble): PC relative instructions are
2693 relative to the next instruction, not the current instruction.
2697 * v850-dis.c (disassemble): Only signed extend values that are not
2698 returned by extract functions.
2699 Remove use of V850_OPERAND_ADJUST_SHORT_MEMORY flag.
2703 * v850-opc.c: Update comments. Remove use of
2704 V850_OPERAND_ADJUST_SHORT_MEMORY. Fix several operand patterns.
2708 * v850-opc.c (MOVHI): Immediate parameter is unsigned.
2712 * configure: Rebuilt with latest devo autoconf for NT support.
2716 * v850-dis.c (disassemble): Use curly brace syntax for register
2719 * v850-opc.c (v850_opcodes[]): Add NOT_R0 flag to decect cases
2720 where r0 is being used as a destination register.
2724 * v850-opc.c (v850_opcodes[]): Move divh opcodes next to each other.
2728 * alpha-opc.c (alpha_opcodes): Fix hw_rei_stall mungage.
2732 * v850-opc.c (v850_opcodes[]): Remove use of flag field.
2733 * v850-opc.c (v850_opcodes[]): Add support for reversed short load
2738 * configure (cgen_files): Add support for v850e target.
2739 * configure.in (cgen_files): Add support for v850e target.
2743 * configure (cgen_files): Add support for v850ea target.
2744 * configure.in (cgen_files): Add support for v850ea target.
2748 * configure.in (bfd_arc_arch): Add.
2749 * configure: Rebuild.
2750 * Makefile.am (ALL_MACHINES): Add arc-dis.lo, arc-opc.lo.
2751 * Makefile.in: Rebuild.
2752 * arc-dis.c, arc-opc.c: New files.
2753 * disassemble.c (ARCH_all): Define ARCH_arc.
2754 (disassembler): Add ARC support.
2758 * v850-dis.c (disassemble): Add support for v850EA instructions.
2760 * v850-opc.c (insert_i5div, extract_i5div): New Functions.
2761 (v850_opcodes): Add v850EA instructions.
2763 * v850-dis.c (disassemble): Add support for v850E instructions.
2765 * v850-opc.c (insert_d5_4, extract_d5_4, insert_d16_16,
2766 extract_d16_16, insert_i9, extract_i9, insert_u9, extract_u9,
2767 insert_spe, extract_spe): New Functions.
2768 (v850_opcodes): Add v850E instructions.
2770 * v850-opc.c: Reorganised and re-layed out to improve readability
2775 * configure: Rebuild with autoconf 2.12.1.
2779 * aclocal.m4, configure: Rebuild with new automake patches.
2783 * configure.in: Set enable_shared before AM_PROG_LIBTOOL.
2784 * acinclude.m4: Just include acinclude.m4 from BFD.
2785 * aclocal.m4, configure: Rebuild.
2789 * Makefile.am: New file, based on old Makefile.in.
2790 * acconfig.h: New file.
2791 * acinclude.m4: New file.
2792 * stamp-h.in: New file.
2793 * configure.in: Call AM_INIT_AUTOMAKE and AM_PROG_LIBTOOL.
2794 Removed shared library handling; now handled by libtool. Replace
2795 AC_CONFIG_HEADER with AM_CONFIG_HEADER. Call AM_MAINTAINER_MODE,
2796 AM_CYGWIN32, and AM_EXEEXT. Replace AC_PROG_INSTALL with
2797 AM_PROG_INSTALL. Change all .o files to .lo. Remove stamp-h
2798 handling in AC_OUTPUT.
2799 * dep-in.sed: Change .o to .lo.
2800 * Makefile.in: Now built with automake.
2801 * aclocal.m4: Now built with aclocal.
2802 * config.in, configure: Rebuild.
2806 * mips-opc.c: Fix typo/thinko in "eret" instruction.
2810 * sparc-opc.c (sparc_opcodes): Fix spelling on fpaddX, fpsubX insns.
2812 * sparc-dis.c (sorted_opcodes): New static local.
2813 (struct opcode_hash): `opcode' is pointer to const element.
2814 (build_hash): First arg is now table of sorted pointers.
2815 (print_insn_sparc): Sort opcodes by sorting table of pointers.
2816 (compare_opcodes): Update.
2820 * cgen-opc.c: #include <ctype.h>.
2821 (hash_keyword_name): New arg `case_sensitive_p'. Callers updated.
2822 Handle case insensitive hashing.
2823 (hash_keyword_value): Change type of `value' to unsigned int.
2827 * mips-opc.c (mips_builtin_opcodes): If an insn uses single
2828 precision FP, mark it as such. Likewise for double precision
2829 FP. Mark ISA1 insns. Consolidate duplicate opcodes where
2834 * ppc-opc.c (extract_nsi): make unsigned expression signed before
2836 (UNUSED): remove one level of parens, so MSVC doesn't choke on
2837 nesting depth when all the macros are expanded.
2841 * sparc-opc.c: The fcmp v9a instructions take an integer register
2842 as a destination, not a floating point register. From Christian
2847 * m68k-dis.c (print_insn_arg): Print case 7.2 using %pc@()
2848 syntax. From Roman Hodek
2851 * i386-dis.c (twobyte_has_modrm): Fix pand.
2855 * i386-dis.c (dis386_twobyte): Fix pand and pandn.
2859 * arm-dis.c: Add prototypes for arm_decode_shift and
2864 * mips-opc.c: Add r3900 insns.
2868 * sh-dis.c (print_insn_shx): Change relmask to bfd_vma. Don't
2869 print delay slot instructions on the same line. When using a PC
2870 relative load, add a comment with the value being loaded if it can
2875 * i386-dis.c (dis386[], dis386_twobyte[]): change pushl/popl
2876 to pushS/popS for segment regs and byte constant so that
2877 pushw/popw printed when in 16 bit data mode.
2879 * i386-dis.c (dis386[]): change cwtl, cltd to cWtS, cStd to
2880 print cbtw, cwtd in 16 bit data mode.
2881 * i386-dis.c (putop): extra case W to support above.
2883 * i386-dis.c (print_insn_x86): print addr32 prefix when given
2884 address size prefix in 16 bit address mode.
2888 * sh-dis.c: Reindent. Rename local variable fprintf to
2893 * m32r-opc.c (m32r_cgen_insn_table, cmpui): Undo patch of May 2.
2897 * mips-opc.c (mips_builtin_opcodes): Moved INSN_ISA field into new
2899 * mips16-opc.c (mip16_opcodes): same.
2903 * m68k-opc.c (moveb): Change $d to %d.
2907 * i386-dis.c: (dis386_twobyte): Add MMX instructions.
2908 (twobyte_has_modrm): Likewise.
2910 (OP_MMX, OP_EM, OP_MS): New static functions.
2912 * i386-dis.c: Revert patch of April 4. The output now matches
2917 * m32r-opc.c (m32r_cgen_insn_table, cmpui): Use $uimm16 instead
2922 * m32r-opc.h (CGEN_ARCH): Renamed from CGEN_CPU.
2926 * Makefile.in (install): Depend upon installdirs.
2927 (installdirs): New target.
2932 * configure.in: Use ${CONFIG_SHELL} when running $ac_config_sub.
2933 * configure: Rebuild.
2937 * cgen-*.c, m32r-*.c: #include sysdep.h instead of config.h.
2938 Delete string{,s}.h support.
2942 * cgen-asm.c (cgen_parse_operand_fn): New global.
2943 (cgen_parse_{{,un}signed_integer,address}): Update call to
2944 cgen_parse_operand_fn.
2945 (cgen_init_parse_operand): New function.
2946 * m32r-asm.c (parse_insn_normal): cgen_init_parse_operand renamed
2947 from cgen_asm_init_parse.
2948 (m32r_cgen_assemble_insn): New operand `errmsg'.
2949 Delete call to as_bad, return error message to caller.
2950 (m32r_cgen_asm_hash_keywords): #if 0 out.
2954 * m68k-dis.c (print_insn_arg) [case 'd']: Print as address register,
2956 [case 'J']: Fix typo in register name.
2960 * configure.in: Substitute SHLIB_LIBS.
2961 * configure: Rebuild.
2962 * Makefile.in (SHLIB_LIBS): New variable.
2963 ($(SHLIB)): Use $(SHLIB_LIBS).
2967 * cgen-dis.c (build_dis_hash_table): Fix xmalloc size computation.
2969 * cgen-opc.c (hash_keyword_name): Improve algorithm.
2971 * disassemble.c (disassembler): Handle m32r.
2975 * m32r-asm.c, m32r-dis.c, m32r-opc.c, m32r-opc.h: New files.
2976 * cgen-asm.c, cgen-dis.c, cgen-opc.c: New files.
2977 * Makefile.in (CFILES): Add them.
2978 (ALL_MACHINES): Add them.
2979 (dependencies): Regenerate.
2980 * configure.in (cgen_files): New variable.
2981 (bfd_m32r_arch): Add entry.
2982 * configure: Regenerate.
2986 * configure.in: Correct file names for bfd_mn10[23]00_arch.
2987 * configure: Rebuild.
2989 * Makefile.in: Rebuild dependencies.
2991 * d10v-dis.c: Include "ansidecl.h" before "opcode/d10v.h".
2993 * i386-dis.c (float_reg): Swap fsubrp and fsubp. Swap fdivrp and
2998 * Branched binutils 2.8.
3002 * m10200-dis.c: Rename from mn10200-dis.c.
3003 * m10200-opc.c: Rename from mn10200-opc.c.
3004 * m10300-dis.c: Rename from mn10300-dis.c
3005 * m10300-opc.c: Rename from mn10300-opc.c.
3006 * Makefile.in: Update accordingly.
3008 * mips16-opc.c: Add mul and dmul macros.
3012 * makefile.vms: Update CFLAGS, add clean target.
3016 * mips-opc.c: Add "wait". From Ralf Baechle
3019 * configure.in: Add stdlib.h to AC_CHECK_HEADERS list.
3020 * configure, config.in: Rebuild.
3021 * sysdep.h: Include <stdlib.h> if it exists.
3022 * sparc-dis.c: Include <stdio.h> and "sysdep.h". Don't include
3024 * Makefile.in: Rebuild dependencies.
3028 * ppc-opc.c: Add PPC 403 instructions and extended opcodes. From
3031 * mips-opc.c: Add cast when setting mips_opcodes.
3035 * v850-dis.c (disassemble): Fix sign extension problem.
3036 * v850-opc.c (extract_d*): Fix sign extension problems to make
3037 disassembly calculate branch offsets correctly.
3041 * sh-opc.h: Add bf/s and bt/s as synonyms for bf.s and bt.s.
3043 * mips-opc.c: Add dctr and dctw.
3047 * d30v-dis.c (print_insn): Change the way signed constants
3052 * Makefile.in (BFD_H): New variable.
3053 (HFILES): New variable.
3054 (CFILES): Add all C files.
3055 (.dep, .dep1, dep.sed, dep, dep-in): New targets.
3056 Delete old dependencies, and build new ones.
3057 * dep-in.sed: New file.
3061 * m68k-opc.c (m68k_opcode_aliases): Added blo and blo{s,b,w,l}.
3065 * mn10200-opc.c: Change "trap" to "syscall".
3066 * mn10300-opc.c: Add new "syscall" instruction.
3070 * m68k-opc.c (m68k_opcodes): Provide correct entries for mulsl and
3071 mulul insns on the coldfire.
3075 * arm-dis.c (print_insn_arm): Don't print instruction bytes.
3076 (print_insn_big_arm): Set bytes_per_chunk and display_endian.
3077 (print_insn_little_arm): Likewise.
3082 * i386-dis.c (fetch_data): Add prototype.
3083 * m68k-dis.c (fetch_data): Add prototype.
3084 (dummy_print_address): Add prototype. Make static.
3085 * ppc-opc.c (valid_bo): Add prototype.
3086 * sparc-dis.c (build_hash_table): Add prototype.
3087 (is_delayed_branch, compute_arch_mask): Add prototypes.
3088 (print_insn_sparc): Make several local variables const.
3089 (compare_opcodes): Change arguments to const PTR. Add prototype.
3090 * sparc-opc.c (arg): Change name field to be const.
3091 (lookup_name, lookup_value): Add prototypes. Change table and
3092 name parameters to be const.
3093 (sparc_encode_asi): Change name parameter to be const.
3094 (sparc_encode_membar, sparc_encode_prefetch): Likewise.
3095 (sparc_encode_sparclet_cpreg): Likewise.
3096 (sparc_decode_asi): Change return type to be const.
3097 (sparc_decode_membar, sparc_decode_prefetch): Likewise.
3098 (sparc_decode_sparclet_cpreg): Likewise.
3102 * Makefile.in ($(SHLINK)): Just use ln -s, not ln -sf, since
3103 Solaris doesn't like the combined options, and the -f is
3105 (stamp-tshlink, install): Likewise.
3109 * mn10300-opc.c (IMM16_PCREL, SD8N_PCREL, D16_SHIFT): Mark these
3114 * m68k-opc.c (m68k_opcodes): Fix last change for the mc68010.
3118 * m68k-opc.c (m68k_opcodes): Added entries for the tst insns on
3123 * m68k-opc.c (m68k_opcodes): Added swbegl pseudo-instruction.
3127 * tic80-dis.c (print_insn_tic80): Set info->bytes_per_line to 8.
3131 * tic80-opc.c (tic80_predefined_symbols): Define r25 properly.
3135 * m68k-dis.c (NEXTSINGLE, NEXTDOUBLE, NEXTEXTEND): Use
3136 floatformat_to_double to make portable.
3137 (print_insn_arg): Use NEXTEXTEND macro when extracting extended
3142 * mips-opc.c: Initialize mips_opcodes to mips_builtin_opcodes,
3143 and bfd_mips_num_opcodes to bfd_mips_num_builtin_opcodes.
3147 * d10v-dis.c, d10v-opc.c: Change pre_defined_registers to
3148 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
3152 * tic80-opc.c (LSI_SCALED): Renamed from this ...
3153 (OFF_SL_BR_SCALED): ... to this, and added the flag
3154 TIC80_OPERAND_BASEREL to the flags word.
3155 (tic80_opcodes): Replace all occurances of LSI_SCALED with
3160 * mips-opc.c: Add macros for cop0, cop1 cop2 and cop3.
3161 Change mips_opcodes from const array to a pointer,
3162 and change bfd_mips_num_opcodes from const int to int,
3163 so that we can increase the size of the mips opcodes table
3168 * tic80-opc.c (tic80_predefined_symbols): Revert change to
3169 store BITNUM values in the table in one's complement form
3170 to match behavior when assembler is given a raw numeric
3171 value for a BITNUM operand.
3172 * tic80-dis.c (print_operand_bitnum): Ditto.
3176 * d30v-opc.c: Removed references to FLAG_X.
3180 * Makefile.in: Add dependencies on ../bfd/bfd.h as required.
3184 * Makefile.in: Added d30v object files.
3185 * configure: (bfd_d30v_arch) Rebuilt.
3186 * configure.in: (bfd_d30v_arch) Added new case.
3187 * d30v-dis.c: New file.
3188 * d30v-opc.c: New file.
3189 * disassemble.c (disassembler) Add entry for d30v.
3193 * tic80-opc.c (tic80_predefined_symbols): Add symbolic
3194 representations for the floating point BITNUM values.
3198 * tic80-opc.c (tic80_predefined_symbols): Store BITNUM values
3199 in the table in one's complement form, as they appear in the
3201 (tic80_symbol_to_value): Use macros to access predefined
3203 (tic80_value_to_symbol): Ditto.
3204 (tic80_next_predefined_symbol): New function.
3205 * tic80-dis.c (print_operand_bitnum): Remove code that did
3206 one's complement for BITNUM values.
3210 * makefile.vms: Remove 8 bit characters. Update to latest
3215 * m68k-opc.c (m68k_opcodes): Add swbeg pseudo-instruction.
3219 * mn10200-opc.c (IMM16_PCREL): This is a signed operand.
3220 (IMM24_PCREL): Likewise.
3224 * mips-dis.c (print_mips16_insn_arg): Use memaddr - 2 as the base
3225 address for an extended PC relative instruction that is not a
3230 * m68k-dis.c (print_insn_m68k): Set bytes_per_chunk and
3235 * tic80-opc.c (tic80_operands): Fix typo '+' -> '|'.
3236 (tic80_opcodes): Sort entries so that long immediate forms
3237 come after short immediate forms, making it easier for
3238 assembler to select the right one for a given operand.
3242 * mips-dis.c (_print_insn_mips): Set bytes_per_chunk and
3244 (print_insn_mips16): Likewise.
3248 * tic80-opc.c (tic80_symbol_to_value): Changed to accept
3249 a symbol class that restricts translation to just that
3250 class (general register, condition code, etc).
3254 * tic80-opc.c (tic80_operands): Add REG_0_E, REG_22_E,
3255 and REG_DEST_E for register operands that have to be
3256 an even numbered register. Add REG_FPA for operands that
3257 are one of the floating point accumulator registers.
3258 Add TIC80_OPERAND_MASK to flags for ENDMASK operand.
3259 (tic80_opcodes): Change entries that need even numbered
3260 register operands to use the new operand table entries.
3261 Add "or" entries that are identical to "or.tt" entries.
3265 * mips16-opc.c: Add new cases of exit instruction for
3267 * mips-dis.c (print_mips16_insn_arg): Display floating point
3268 registers in operands of exit instruction. Print `$' before
3269 register names in operands of entry and exit instructions.
3273 * tic80-opc.c (tic80_predefined_symbols): Table of name/value
3274 pairs for all predefined symbols recognized by the assembler.
3275 Also used by the disassembling routines.
3276 (tic80_symbol_to_value): New function.
3277 (tic80_value_to_symbol): New function.
3278 * tic80-dis.c (print_operand_control_register,
3279 print_operand_condition_code, print_operand_bitnum):
3280 Remove private tables and use tic80_value_to_symbol function.
3284 * d10v-dis.c (print_operand): Change address printing
3285 to correctly handle PC wrapping. Fixes PR11490.
3289 * mn10200-opc.c (mn10200_operands): Make 8 and 16 bit pc-relative
3294 * mips-dis.c (print_insn_mips16): Set insn_info information.
3295 (print_mips16_insn_arg): Likewise.
3297 * mips-dis.c (print_insn_mips16): Better handling of an extend
3298 opcode followed by an instruction which can not be extended.
3302 * m68k-opc.c (m68k_opcodes): Changed operand specifier for the
3303 coldfire moveb instruction to not allow an address register as
3304 destination. Although the documentation does not indicate that
3305 this is invalid, experiments uncovered unexpected behavior.
3306 Added a comment explaining the situation. Thanks to Andreas
3307 Schwab for pointing this out to me.
3311 * tic80-opc.c (tic80_opcodes): Expand comment to note that the
3312 entries are presorted so that entries with the same mnemonic are
3313 adjacent to each other in the table. Sort the entries for each
3314 instruction so that this is true.
3318 * m68k-dis.c: Include <libiberty.h>.
3319 (print_insn_m68k): Sort the opcode table on the most significant
3320 nibble of the opcode.
3324 * tic80-dis.c (tic80_opcodes): Add "wrcr", "vmpy", "vrnd",
3325 "vsub", "vst", "xnor", and "xor" instructions.
3326 (V_a1): Renamed from V_a, msb of accumulator reg number.
3327 (V_a0): Add macro, lsb of accumulator reg number.
3331 * tic80-dis.c (print_insn_tic80): Broke excessively long
3332 function up into several smaller ones and arranged for
3333 the instruction printing function to be callable recursively
3334 to print vector instructions that have both a load and a
3335 math instruction packed into a single opcode.
3336 * tic80-opc.c (tic80_opcodes): Expand comment for vld opcode
3337 to explain why it comes after the other vector opcodes.
3341 * m68k-opc.c (m68k_opcodes): add b, w, or l specifier to coldfire
3342 move insns to handle immediate operands.
3346 * m68k-opc.c (m68k_opcodes): Delete duplicate entry for "cmpil".
3347 fix operand mask in the "moveml" entries for the coldfire.
3351 * tic80-opc.c (V_a, V_m, V_S, V_Z, V_p, OP_V, MASK_V):
3352 New macros for building vector instruction opcodes.
3353 (tic80_opcodes): Remove all uses of FMT_SI, FMT_REG, and
3354 FMT_LI, which were unused. The field is now a flags field.
3355 Remove some opcodes that are possible, but illegal, such
3356 as long immediate instructions with doubles for immediate
3357 values. Add "vadd" and "vld" instructions.
3361 * tic80-opc.c (tic80_operands): Reorder some table entries to make
3362 the order more logical. Move the shift alias instructions ("rotl",
3363 "shl", "ins", "rotr", "extu", "exts", "srl", and "sra" to be
3364 interspersed with the regular sr.x and sl.x instructions. Add
3365 and test new instruction opcodes for "sl", "sli", "sr", "sri", "st",
3366 "sub", "subu", "swcr", and "trap".
3370 * tic80-opc.c (OFF_SS_PC): Renamed from OFF_SS.
3371 (OFF_SL_PC): Renamed from OFF_SL.
3372 (OFF_SS_BR): New operand type for base relative operand.
3373 (OFF_SL_BR): New operand type for base relative operand.
3374 (REG_BASE): New operand type for base register operand.
3375 (tic80_opcodes): Add and test "fmpy", "frndm", "frndn", "frndp",
3376 "frndz", "fsqrt", "fsub", "illop0", "illopF", "ins", "jsr",
3377 "ld", "ld.u", "lmo", "or", "rdcr", "rmo", "rotl", and "rotr"
3379 * tic80-dis.c (print_insn_tic80): Print opcode name with fixed width
3380 10 char field, padded with spaces on rhs, rather than a string
3381 followed by a tab. Use renamed TIC80_OPERAND_PCREL flag bit rather
3382 than old TIC80_OPERAND_RELATIVE. Add support for new
3383 TIC80_OPERAND_BASEREL flag bit.
3387 * tic80-dis.c (print_insn_tic80): Print floating point operands
3389 * tic80-opc.c (SPFI): Add single precision floating point
3390 immediate operand type.
3391 (ROTATE): Add rotate operand type for shifts.
3392 (ENDMASK): Add for shifts.
3393 (n): Macro for the 'n' bit.
3394 (i): Macro for the 'i' bit.
3395 (PD): Macro for the 'PD' field.
3396 (P2): Macro for the 'P2' field.
3397 (P1): Macro for the 'P1' field.
3398 (tic80_opcodes): Add entries for "exts", "extu", "fadd",
3403 * mn10200-dis.c (disassemble): Mask off unwanted bits after
3404 adding in current address for pc-relative operands.
3408 * tic80-dis.c (R_SCALED): Add macro to test for ":s" modifier bit.
3409 (print_insn_tic80): If R_SCALED then print ":s" modifier for operand.
3410 * tic80-opc.c (REG0, REG22, REG27, SSOFF, LSOFF): Names
3411 changed to REG_0, REG_22, REG_DEST, OFF_SS, OFF_SL respectively.
3412 (SICR, LICR, REGM_SI, REGM_LI): Names changed to CR_SI, CR_LI,
3413 REG_BASE_M_SI, REG_BASE_M_LI respectively.
3414 (REG_SCALED, LSI_SCALED): New operand types.
3415 (E): New macro for 'E' bit at bit 27.
3416 (tic80_opcodes): Add and test dld, dld.u, dst, estop, and etrap
3417 opcodes, including the various size flavors (b,h,w,d) for
3418 the direct load and store instructions.
3422 * tic80-dis.c (M_SI, M_LI): Add macros to test for ":m" modifier bit
3424 * tic80-dis.c (print_insn_tic80): Change comma and paren handling.
3425 Use M_SI and M_LI macros to check for ":m" modifier for GPR operands.
3426 * tic80-opc.c (tic80_operands): Add REGM_SI and REGM_LI operands.
3427 (F, M_REG, M_LI, M_SI, SZ_REG, SZ_LI, SZ_SI, D, S): New bit-twiddlers.
3428 (MASK_LI_M, MASK_SI_M, MASK_REG_M): Remove and replace in opcode
3429 masks with "MASK_* & ~M_*" to get the M bit reset.
3430 (tic80_opcodes): Add bsr, bsr.a, cmnd, cmp, dcachec, and dcachef.
3434 * tic80-dis.c (print_insn_tic80): Print TIC80_OPERAND_RELATIVE
3435 correctly. Add support for printing TIC80_OPERAND_BITNUM and
3436 TIC80_OPERAND_CC, and TIC80_OPERAND_CR operands in symbolic
3438 * tic80-opc.c (tic80_operands): Add SSOFF, LSOFF, BITNUM,
3439 CC, SICR, and LICR table entries.
3440 (tic80_opcodes): Add and test "nop", "br", "bbo", "bbz",
3441 "bcnd", and "brcr" opcodes.
3445 * ppc-opc.c (powerpc_operands): Make comment match the
3446 actual fields (no shift field).
3447 * sparc-opc.c (sparc_opcodes): Document why this cannot be "const".
3448 * tic80-dis.c (print_insn_tic80): Replace abort stub with a
3449 partial implementation, work in progress.
3450 * tic80-opc.c (tic80_operands): Begin construction operands table.
3451 (tic80_opcodes): Continue populating opcodes table and start
3452 filling in the operand indices.
3453 (tic80_num_opcodes): Add this.
3457 * m68k-opc.c: Add #B case for moveq.
3461 * mn10300-dis.c (disassemble): Make sure all variables are initialized
3462 before they are used.
3466 * v850-opc.c (v850_opcodes): Put curly-braces around operands
3467 for "breakpoint" instruction.
3471 * Makefile.in (ALL_CFLAGS): Add -D_GNU_SOURCE.
3472 (dep): Use ALL_CFLAGS rather than CFLAGS.
3476 * v850-opc.c (D8_{6,7}): Set V850_OPERAND_ADJUST_SHORT_MEMORY
3481 * Makefile.in (m68k-opc.o, alpha-opc.o): Remove dis-asm.h dependency.
3482 (tic80-dis.o, tic80-opc.o): Add rules per comment in Makefile.in.
3486 * mips16-opc.c: Add "abs".
3490 * Makefile.in (ALL_MACHINES): Add tic80-dis.o and tic80-opc.o.
3491 * disassemble.c (ARCH_tic80): Define if ARCH_all is defined.
3492 (disassembler): Add bfd_arch_tic80 support to set disassemble
3493 to print_insn_tic80.
3494 * tic80-dis.c (print_insn_tic80): Add stub.
3498 * configure.in (arch in $selarchs): Add bfd_tic80_arch entry.
3499 * configure: Regenerate with autoconf.
3500 * tic80-dis.c: Add file.
3501 * tic80-opc.c: Add file.
3505 * d10v-opc.c (pre_defined_registers): Add cr[0-15], dpc, dpsw, link.
3509 * mn10200-opc.c (mn10200_operands): Add SIMM16N.
3510 (mn10200_opcodes): Use it for some logicals and btst insns.
3511 Add "break" and "trap" instructions.
3513 * mn10300-opc.c (mn10300_opcodes): Add "break" instruction.
3515 * mn10200-opc.c: Add pseudo-ops for "mov (an),am" and "mov an,(am)".
3519 * mips-dis.c (print_mips16_insn_arg): The base address of a PC
3520 relative load or add now depends upon whether the instruction is
3525 * mn10200-dis.c: Finish writing disassembler.
3526 * mn10200-opc.c (mn10200_opcodes): Fix mask for "mov imm8,dn".
3527 Fix mask for "jmp (an)".
3529 * mn10300-dis.c (disassemble, print_insn_mn10300): Corrently
3530 handle endianness issues for mn10300.
3532 * mn10200-opc.c (mn10200_opcodes): Fix operands for "movb dm,(an)".
3536 * mn10200-opc.c (mn10200_opcodes): "mov imm8,d0" is a format 2
3537 instruction. Fix opcode field for "movb (imm24),dn".
3539 * mn10200-opc.c (mn10200_operands): Fix insertion position
3544 * mn10200-opc.c: Create mn10200 opcode table.
3545 * mn10200-dis.c: Flesh out mn10200 disassembler. Not ready,
3546 but moving along nicely.
3550 * Makefile.in (ALL_MACHINES): Add mips16-opc.o.
3554 * m68k-opc.c (m68k_opcodes): Revert change to use < and >
3555 specifiers for fmovem* instructions.
3559 * mn10300-dis.c (disassemble): Remove '$' register prefixing.
3563 * mips16-opc.c: Change opcode for entry/exit to avoid conflicting
3568 * mn10300-opc.c: Add some comments explaining the various
3571 * mn10300-dis.c (disassemble): Fix minor gcc -Wall warnings.
3575 * m68k-dis.c (print_insn_arg): Handle new < and > operand
3578 * m68k-opc.c (m68k_opcodes): Simplify table by using < and >
3579 operand specifiers in fmovm* instructions.
3583 * ppc-opc.c (insert_li): Give an error if the offset has the two
3584 least significant bits set.
3588 * mips-dis.c (print_insn_mips16): Separate the instruction from
3589 the arguments with a tab, not a space.
3593 * mn10300-dis.c (disasemble): Finish conversion to '$' as
3596 * mn10300-opc.c (mn10300_opcodes): Fix mask field for
3601 * configure: Rebuild with autoconf 2.12.
3603 Add support for mips16 (16 bit MIPS implementation):
3604 * mips16-opc.c: New file.
3605 * mips-dis.c: Include "elf-bfd.h" and "elf/mips.h".
3606 (mips16_reg_names): New static array.
3607 (print_insn_big_mips): Use print_insn_mips16 in 16 bit mode or
3608 after seeing a 16 bit symbol.
3609 (print_insn_little_mips): Likewise.
3610 (print_insn_mips16): New static function.
3611 (print_mips16_insn_arg): New static function.
3612 * mips-opc.c: Add jalx instruction.
3613 * Makefile.in (mips16-opc.o): New target.
3614 * configure.in: Use mips16-opc.o for bfd_mips_arch.
3615 * configure: Rebuild.
3619 * m68k-opc.c (m68k_opcodes): Simplify table by using < and >
3620 operand specifiers in *save, *restore and movem* instructions.
3622 * m68k-opc.c (m68k_opcodes): Fix move and movem instructions for
3625 * m68k-opc.c (m68k_opcodes): The coldfire (mcf5200) can only use
3626 register operands for immediate arithmetic, not, neg, negx, and
3627 set according to condition instructions.
3629 * m68k-opc.c (m68k_opcodes): Consistantly Use "s" as the storage
3630 specifier of the effective-address operand in immediate forms of
3631 arithmetic instructions. The specifier for the immediate operand
3632 notes how and where the constant will be stored.
3636 * mn10300-opc.c (mn10300_opcodes): Remove redundant "lcc"
3639 * mn10300-dis.c (disassemble): Use '$' instead of '%' for
3642 * mn10300-dis.c (disassemble): Prefix registers with '%'.
3646 * mn10300-dis.c (disassemble): Handle register lists.
3648 * mn10300-opc.c: Fix handling of register list operand for
3649 "call", "ret", and "rets" instructions.
3651 * mn10300-dis.c (disassemble): Print PC-relative and memory
3652 addresses symbolically if possible.
3653 * mn10300-opc.c: Distinguish between absolute memory addresses,
3654 pc-relative offsets & random immediates.
3656 * mn10300-dis.c (print_insn_mn10300): Fix fetch of last byte
3658 (disassemble): Handle SPLIT and EXTENDED operands.
3662 * mn10300-dis.c: Rough cut at printing some operands.
3664 * mn10300-dis.c: Start working on disassembler support.
3665 * mn10300-opc.c (mn10300_opcodes): Fix masks on several insns.
3667 * mn10300-opc.c (mn10300_operands): Add "REGS" for a register
3669 (mn10300_opcodes): Use REGS for register list in "movm" instructions.
3673 * d10v-opc.c (d10v_opcodes): Add3 sets the carry.
3677 * mn10300-opc.c (mn10300_opcodes): Demand parens around
3678 register argument is calls and jmp instructions.
3682 * mn10300-opc.c (mn10300_opcodes): Use DN01 for putx and
3683 getx operand. Fix opcode for mulqu imm,dn.
3687 * mn10300-opc.c (mn10300_operands): Hijack "bits" field
3688 in MN10300_OPERAND_SPLIT operands for how many bits
3689 appear in the basic insn word. Add IMM32_HIGH24,
3690 IMM32_HIGH24_LOWSHIFT8, IMM8E_SHIFT8.
3691 (mn10300_opcodes): Use new operands as needed.
3693 * mn10300-opc.c (mn10300_operands): Add IMM32_LOWSHIFT8
3694 for bset, bclr, btst instructions.
3695 (mn10300_opcodes): Use new IMM32_LOWSHIFT8 as needed.
3697 * mn10300-opc.c (mn10300_operands): Remove many redundant
3698 operands. Update opcode table as appropriate.
3699 (IMM32): Add MN10300_OPERAND_SPLIT flag.
3700 (mn10300_opcodes): Fix single bit error in mov imm32,dn insn.
3704 * mn10300-opc.c (mn10300_operands): Add DN2, DM2, AN2, AM2
3705 operands (for indexed load/stores). Fix bitpos for DI
3706 operand. Add SN8N_SHIFT8, IMM8_SHIFT8, and D16_SHIFT for the
3707 few instructions that insert immediates/displacements in the
3708 middle of the instruction. Add IMM8E for 8 bit immediate in
3709 the extended part of an instruction.
3710 (mn10300_operands): Use new opcodes as appropriate.
3714 * d10v-opc.c (d10v_opcodes): Declare the trap instruction
3715 sequential so the assembler never parallelizes it with
3720 * mn10300-opc.c (mn10300_operands): Add DN01 and AN01 for
3721 a data/address register that appears in register field 0
3722 and register field 1.
3723 (mn10300_opcodes): Use DN01 and AN01 for mov/cmp imm8,DN/AN
3727 * alpha-dis.c (print_insn_alpha): Use new NOPAL mask for
3728 standard disassembly.
3730 * alpha-opc.c (alpha_operands): Rearrange flags slot.
3731 (alpha_opcodes): Add new BWX, CIX, and MAX instructions.
3732 Recategorize PALcode instructions.
3736 * v850-opc.c (v850_opcodes): Add relaxing "jbr".
3740 * mips-dis.c (_print_insn_mips): Don't print a trailing tab if
3741 there are no operand types.
3745 * v850-opc.c (D9_RELAX): Renamed from D9, all references
3747 (v850_operands): Make sure D22 immediately follows D9_RELAX.
3751 * i386-dis.c (print_insn_x86): Set info->bytes_per_line to 5.
3755 * v850-opc.c (insert_d8_6): Fix operand insertion for sld.w
3756 and sst.w instructions.
3758 * v850-opc.c (v850_opcodes): Add "jCC" instructions (aliases for
3763 * mips-dis.c (_print_insn_mips): Use a tab between the instruction
3768 * ppc-opc.c (PPCPWR2): Define.
3769 (powerpc_opcodes): Use PPCPWR2 for fsqrt, rather than duplicating
3774 * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode
3775 field for movhu instruction.
3777 * v850-dis.c (disassemble): For V850_OPERAND_SIGNED operands,
3778 cast value to "long" not "signed long" to keep hpux10
3783 * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode field
3786 * mn10300-opc.c (FMT*): Remove definitions.
3788 * mn10300-opc.c (mn10300_opcodes): Fix destination register
3789 for shift-by-register opcodes.
3791 * mn10300-opc.c (mn10300_operands): Break DN, DM, AN, AM
3792 into [AD][MN][01] for encoding the position of the register
3797 * mn10300-opc.c (mn10300_opcodes): Add "extended" instructions,
3798 "putx", "getx", "mulq", "mulqu", "sat16", "sat24", "bsch".
3802 * mn10300-opc.c (mn10300_operands): Remove "REGS" operand.
3803 Fix various typos. Add "PAREN" operand.
3804 (MEM, MEM2): Define.
3805 (mn10300_opcodes): Surround all memory addresses with "PAREN"
3806 operands. Fix several typos.
3808 * mn10300-opc.c (mn10300_opcodes): Fix typos in yesterday's
3813 * mn10300-opc.c (FMT_XX): Renumber starting at one.
3814 (mn10300_operands): Rough cut. Enough to parse "mov" instructions
3816 (mn10300_opcodes): Break opcode format out into its own field.
3817 Update many operand fields to deal with signed vs unsigned
3818 issues. Fix one or two typos in the "mov" instruction
3819 opcode, mask and/or operand fields.
3823 * m68k-opc.c (plusha): Prefer encoding for m68040up, in case
3824 m68851 wasn't reset.
3828 * mn10300-opc.c (mn10300_opcodes): Add opcode & masks for
3829 all opcodes. Very rough cut at operands for all opcodes.
3831 * mn10300-opc.c (mn10300_opcodes): Start fleshing out the
3836 * mn10200-opc.c, mn10300-opc.c: New files.
3837 * mn10200-dis.c, mn10300-dis.c: New files.
3838 * mn10x00-opc.c, mn10x00-dis.c: Deleted.
3839 * disassemble.c: Break mn10x00 support into 10200 and 10300
3841 * configure.in: Likewise.
3842 * configure: Rebuilt.
3846 * Makefile.in (MOSTLYCLEAN): Move config.log to distclean.
3850 * mn10x00-opc.c, mn10x00-dis.c: New files for Matsushita
3852 * disassemble (ARCH_mn10x00): Define.
3853 (disassembler): Handle bfd_arch_mn10x00.
3854 * configure.in: Recognize bfd_mn10x00_arch.
3855 * configure: Rebuilt.
3859 * i386-dis.c (op_rtn): Change to be a pointer. Adjust uses
3860 accordingly. Don't declare functions using op_rtn.
3864 * v850-dis.c (disassemble): Add memaddr argument. Re-arrange
3865 params to be more standard.
3866 * (disassemble): Print absolute addresses and symbolic names for
3867 branch and jump targets.
3868 * v850-opc.c (v850_operand): Add displacement flag to 9 and 22
3870 * (v850_opcodes): Add breakpoint insn.
3874 * m68k-opc.c: Move the fmovemx data register cases before the
3875 other cases, so that they get recognized before the data register
3876 does gets treated as a degenerate register list.
3880 * mips-opc.c: Add a case for "div" and "divu" with two registers
3881 and a destination of $0.
3885 * mips-dis.c (print_insn_arg): Add prototype.
3886 (_print_insn_mips): Ditto.
3890 * mips-dis.c (print_insn_arg): Print condition code registers as
3895 * sparc-opc.c (sparc_opcodes): Add setuw, setsw, setx.
3899 * v850-dis.c (disassemble): Make static. Provide prototype.
3903 * v850-opc.c (insert_d9, insert_d22): Fix boundary case
3908 * v850-dis.c (disassemble): Handle insertion of ',', '[' and
3909 ']' characters into the output stream.
3910 * v850-opc.c (v850_opcodes: Remove size field from all opcodes.
3911 Add "memop" field to all opcodes (for the disassembler).
3912 Reorder opcodes so that "nop" comes before "mov" and "jr"
3913 comes before "jarl".
3915 * v850-dis.c (print_insn_v850): Fix typo in last change.
3917 * v850-dis.c (print_insn_v850): Properly handle disassembling
3918 a two byte insn at the end of a memory region when the memory
3919 region's size is only two byte aligned.
3921 * v850-dis.c (v850_cc_names): Fix stupid thinkos.
3923 * v850-dis.c (v850_reg_names): Define.
3924 (v850_sreg_names, v850_cc_names): Likewise.
3925 (disassemble): Very rough cut at printing operands (unformatted).
3927 * v850-opc.c (BOP_MASK): Fix.
3928 (v850_opcodes): Fix mask for jarl and jr.
3930 * v850-dis.c: New file. Skeleton for disassembler support.
3931 * Makefile.in Remove v850 references, they're not needed here.
3932 * configure.in: Add v850-dis.o when building v850 toolchains.
3933 * configure: Rebuilt.
3934 * disassemble.c (disassembler): Call v850 disassembler.
3936 * v850-opc.c (insert_d8_7, extract_d8_7): New functions.
3937 (insert_d8_6, extract_d8_6): New functions.
3938 (v850_operands): Rename D7S to D7; operand for D7 is unsigned.
3939 Rename D8 to D8_7, use {insert,extract}_d8_7 routines.
3941 (IF4A, IF4B): Use "D7" instead of "D7S".
3942 (IF4C, IF4D): Use "D8_7" instead of "D8".
3943 (IF4E, IF4F): New. Use "D8_6".
3944 (v850_opcodes): Use IF4A/IF4B for sld.b/sst.b. Use IF4C/IF4D for
3945 sld.h/sst.h. Use IF4E/IF4F for sld.w/sst.w.
3947 * v850-opc.c (insert_d16_15, extract_d16_15): New functions.
3948 (v850_operands): Change D16 to D16_15, use special insert/extract
3949 routines. New new D16 that uses the generic insert/extract code.
3950 (IF7A, IF7B): Use D16_15.
3951 (IF7C, IF7D): New. Use D16.
3952 (v850_opcodes): Use IF7C and IF7D for ld.b and st.b.
3954 * v850-opc.c (insert_d9, insert_d22): Slightly improve error
3955 message. Issue an error if the branch offset is odd.
3957 * v850-opc.c: Add notes about needing special insert/extract
3958 for all the load/store insns, except "ld.b" and "st.b".
3960 * v850-opc.c (insert_d22, extract_d22): New functions.
3961 (v850_operands): Use insert_d22 and extract_d22 for
3963 (insert_d9): Fix range check.
3967 * v850-opc.c (v850_operands): Add V850_OPERAND_SIGNED flag
3968 and set bits field to D9 and D22 operands.
3972 * v850-opc.c (v850_operands): Define SR2 operand.
3973 (v850_opcodes): "ldsr" uses R1,SR2.
3975 * v850-opc.c (v850_opcodes): Fix opcode specs for
3976 sld.w, sst.b, sst.h, sst.w, and nop.
3980 * v850-opc.c (v850_opcodes): Add null opcode to mark the
3981 end of the opcode table.
3985 * d10v-opc.c (pre_defined_registers): Added register pairs,
3986 "r0-r1", "r2-r3", etc.
3990 * v850-opc.c (v850_operands): Make I16 be a signed operand.
3991 Create I16U for an unsigned 16bit mmediate operand.
3992 (v850_opcodes): Use I16U for "ori", "andi" and "xori".
3994 * v850-opc.c (v850_operands): Define EP operand.
3995 (IF4A, IF4B, IF4C, IF4D): Use EP.
3997 * v850-opc.c (v850_opcodes): Fix opcode numbers for "mov"
3998 with immediate operand, "movhi". Tweak "ldsr".
4000 * v850-opc.c (v850_opcodes): Get ld.[bhw] and st.[bhw]
4001 correct. Get sld.[bhw] and sst.[bhw] closer.
4003 * v850-opc.c (v850_operands): "not" is a two byte insn
4005 * v850-opc.c (v850_opcodes): Correct bit pattern for setf.
4007 * v850-opc.c (v850_operands): D16 inserts at offset 16!
4009 * v850-opc.c (two): Get order of words correct.
4011 * v850-opc.c (v850_operands): I16 inserts at offset 16!
4013 * v850-opc.c (v850_operands): Add "SR1" and "SR2" for system
4014 register source and destination operands.
4015 (v850_opcodes): Use SR1 and SR2 for "ldsr" and "stsr".
4017 * v850-opc.c (v850_opcodes): Fix thinko in "jmp" opcode. Fix
4018 same thinko in "trap" opcode.
4020 * v850-opc.c (v850_opcodes): Add initializer for size field
4023 * v850-opc.c (v850_operands): D6 -> DS7. References changed.
4024 Add D8 for 8-bit unsigned field in short load/store insns.
4025 (IF4A, IF4D): These both need two registers.
4026 (IF4C, IF4D): Define. Use 8-bit unsigned field.
4027 (v850_opcodes): For "sld.h", "sld.w", "sst.h", "sst.w", use
4028 IF4C & IF4D. For "trap" use I5U, not I5. Add IF1 operand
4029 for "ldsr" and "stsr".
4030 * v850-opc.c (v850_operands): 3-bit immediate for bit insns
4033 * v850-opc.c (v850_opcodes): Correct short store half (sst.h) and
4034 short store word (sst.w).
4038 * v850-opc.c (v850_operands): Added insert and extract fields,
4039 pointers to functions that handle unusual operand encodings.
4043 * v850-opc.c (v850_opcodes): Enable "trap".
4045 * v850-opc.c (v850_opcodes): Fix order of displacement
4046 and register for "set1", "clr1", "not1", and "tst1".
4050 * v850-opc.c (v850_operands): Add "B3" support.
4051 (v850_opcodes): Fix and enable "set1", "clr1", "not1"
4054 * v850-opc.c (v850_opcodes): "jmp" has only an R1 operand.
4056 * v850-opc.c: Close unterminated comment.
4060 * v850-opc.c (v850_operands): Add flags field.
4061 (v850_opcodes): add move opcodes.
4065 * Makefile.in (ALL_MACHINES): Add v850-opc.o.
4066 * configure: (bfd_v850v_arch) Add new case.
4067 * configure.in: (bfd_v850_arch) Add new case.
4068 * v850-opc.c: New file.
4072 * sparc-dis.c (print_insn_sparc): Handle little endian sparcs.
4076 * d10v-opc.c: Add additional information to the opcode
4077 table to help determinine which instructions can be done
4082 * mpw-make.sed: Update editing of include pathnames to be
4087 * arm-opc.h: Added "bx" instruction definition.
4091 * alpha-opc.c (EV4EXTHWINDEX): Field width should be 8 not 5.
4095 * d10v-opc.c (d10v_opcodes): Minor fixes to addi and bl.l.
4099 * d10v-opc.c (d10v_opcodes): Correct 'mv' unit entry to EITHER.
4103 * makefile.vms: Update for alpha-opc changes.
4107 * i386-dis.c (print_insn_i386): Actually return the correct value.
4108 (ONE, OP_ONE): #ifdef out; not used.
4112 * d10v-opc.c (d10v_opcodes): Added 2 accumulator sub instructions.
4113 Changed subi operand type to treat 0 as 16.
4117 * m68k-opc.c: Add cpushl for the mcf5200. From Ken Rose
4122 * arm-opc.h: (arm_opcodes): Added halfword and sign-extension
4123 memory transfer instructions. Add new format string entries %h and %s.
4124 * arm-dis.c: (print_insn_arm): Provide decoding of the new
4129 * d10v-opc.c (d10v_operands): Added UNUM4S; a 4-bit accumulator shift.
4130 (d10v_opcodes): Modified accumulator shift instructions to use UNUM4S.
4134 * alpha-dis.c (print_insn_alpha_osf): Remove.
4135 (print_insn_alpha_vms): Remove.
4136 (print_insn_alpha): Make globally visible. Chose the register
4137 names based on info->flavour.
4138 * disassemble.c: Always return print_insn_alpha for the alpha.
4142 * d10v-dis.c (dis_long): Handle unknown opcodes.
4146 * d10v-opc.c: Changes to support signed and unsigned numbers.
4147 All instructions with the same name that have long and short forms
4148 now end in ".l" or ".s". Divs added.
4149 * d10v-dis.c: Changes to support signed and unsigned numbers.
4153 * d10v-dis.c: Change all functions to use info->print_address_func.
4157 * m68k-opc.c (m68k_opcodes): Make opcode masks for the ColdFire
4158 move ccr/sr insns more strict so that the disassembler only
4159 selects them when the addressing mode is data register.
4162 * d10v-opc.c (pre_defined_registers): Declare.
4163 * d10v-dis.c (print_operand): Now uses pre_defined_registers
4164 to pick a better name for the registers.
4168 * sparc-opc.c: Fix opcode values for fpack16, and fpackfix. Fix
4169 operands for fexpand and fpmerge. From Christian Kuehnke
4174 * alpha-dis.c (print_insn_alpha): No longer the user-visible
4175 print routine. Take new regnames and cpumask arguments.
4176 Kill the environment variable nonsense.
4177 (print_insn_alpha_osf): New function. Do OSF/1 style regnames.
4178 (print_insn_alpha_vms): New function. Do VMS style regnames.
4179 * disassemble.c (disassembler): Test bfd flavour to pick
4180 between OSF and VMS routines. Default to OSF.
4184 * configure.in: Call AC_SUBST (INSTALL_SHLIB).
4185 * configure: Rebuild.
4186 * Makefile.in (install): Use @INSTALL_SHLIB@.
4190 * configure: (bfd_d10v_arch) Add new case.
4191 * configure.in: (bfd_d10v_arch) Add new case.
4192 * d10v-dis.c: New file.
4193 * d10v-opc.c: New file.
4194 * disassemble.c (disassembler) Add entry for d10v.
4198 * m68k-opc.c (m68k_opcodes): Fix bugs in coldfire insns relating
4199 to bcc, trapfl, subxl, and wddata discovered by Andreas Schwab.
4203 * i386-dis.c: Get rid of print_insn_i8086. Use info.mach to
4204 distinguish between variants of the instruction set.
4205 * sparc-dis.c: Get rid of print_insn_sparclite. Use info.mach to
4206 distinguish between variants of the instruction set.
4210 * i386-dis.c (print_insn_i8086): New routine to disassemble using
4211 the 8086 instruction set.
4212 * i386-dis.c: General cleanups. Make most things static. Add
4213 prototypes. Get rid of static variables aflags and dflags. Pass
4214 them as args (to almost everything).
4218 * h8300-dis.c (bfd_h8_disassemble): Handle macregs in ldmac insns.
4220 * h8300-dis.c (bfd_h8_disassemble): Handle "ldm.l" and "stm.l".
4222 * h8300-dis.c (bfd_h8_disassemble): "abs" is implicitly two
4223 if the next arg is marked with SRC_IN_DST. Gross.
4225 * h8300-dis.c (bfd_h8_disassemble): Print "exr" when
4226 we're looking for and find EXR.
4228 * h8300-dis.c (bfd_h8_disassemble): We don't have a match
4229 if we're looking for KBIT and we don't find it.
4231 * h8300-dis.c (bfd_h8_disassemble): Mask off unwanted bits
4234 * h8300-dis.c (bfd_h8_disassemble): Don't set plen for
4235 3bit immediate operands.
4239 * Released binutils 2.7.
4241 * alpha-opc.c: Add new case of "mov". From Klaus Kaempf
4246 * alpha-opc.c: Correct second case of "mov" to use OPRL.
4250 * sparc-dis.c (print_insn_sparclite): New routine to print
4251 sparclite instructions.
4255 * m68k-opc.c (m68k_opcodes): Add coldfire support.
4259 * sparc-opc.c (asi_table): Add #ASI_N, #ASI_N_L, #ASI_NUCLEUS,
4260 #ASI_NUCLEUS_LITTLE. Rename #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_L
4261 to #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_LITTLE.
4265 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir):
4266 Use autoconf-set values.
4267 (docdir, oldincludedir): Removed.
4268 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
4272 * alpha-opc.c: New file.
4273 * alpha-opc.h: Remove.
4274 * alpha-dis.c: Complete rewrite to use new opcode table.
4275 * configure.in: For bfd_alpha_arch, use alpha-opc.o.
4276 * configure: Rebuild with autoconf 2.10.
4277 * Makefile.in (ALL_MACHINES): Add alpha-opc.o.
4278 (alpha-dis.o): Depend upon $(INCDIR)/opcode/alpha.h, not
4280 (alpha-opc.o): New target.
4284 * sparc-dis.c (print_insn_sparc): Remove unused local variable i.
4285 Set imm_added_to_rs1 even if the source and destination register
4288 * sparc-opc.c: Add some two operand forms of the wr instruction.
4292 * h8300-dis.c (bfd_h8_disassemble): Rename "hmode" argument
4295 * disassemble.c (disassembler): Handle H8/S.
4296 * h8300-dis.c (print_insn_h8300s): New function for H8/S.
4300 * sparc-opc.c: Add beq/teq as aliases for be/te.
4302 * ppc-opc.c: Fix fcmpo opcode. From Sergei Steshenko
4307 * makefile.vms: New file.
4309 * alpha-dis.c (print_insn_alpha): Print lda ra,lit(rz) as mov.
4313 * h8300-dis.c (bfd_h8_disassemble): Always print ABS8MEM with :8,
4318 * i386-dis.c (OP_OFF): Call append_prefix.
4322 * ppc-opc.c (instruction encoding macros): Add explicit casts to
4323 unsigned long to silence a warning from the Solaris PowerPC
4328 * sparc-opc.c (sparc_opcodes): Add ultrasparc vis extensions.
4332 * sparc-dis.c (X_IMM,X_SIMM): New macros.
4334 (print_insn_sparc): Merge cases i,I,j together. New cases X,Y.
4335 * sparc-opc.c (sparc_opcodes): Use X for 5 bit shift constants,
4336 Y for 6 bit shift constants. Rewrite entries for crdcxt, cwrcxt,
4337 cpush, cpusha, cpull sparclet insns.
4341 * sparc-dis.c (compute_arch_mask): Replace ANSI style def with K&R.
4345 * sparc-opc.c: Set F_FBR on floating point branch instructions.
4346 Set F_FLOAT on other floating point instructions.
4350 * ppc-opc.c (PPC860): Macro for 860/821 specific instructions and
4352 (powerpc_opcodes): Add 860/821 specific SPRs.
4356 * configure.in: Permit --enable-shared to specify a list of
4357 directories. Set and substitute BFD_PICLIST.
4358 * configure: Rebuild.
4359 * Makefile.in (BFD_PICLIST): Rename from BFD_LIST. Change all
4360 uses. Set to @BFD_PICLIST@.
4364 * h8300-dis.c (bfd_h8_disassemble): Use "bit" for L_3 immediates,
4365 not "abs", which may be needed for the absolute in something
4366 like btst #0,@10:8. Print L_3 immediates separately from other
4367 immediates. Change ABSMOV reference to ABS8MEM.
4371 * sparc-dis.c (opcodes_initialized): Move inside print_insn_sparc.
4372 (current_arch_mask): New static global.
4373 (compute_arch_mask): New static function.
4374 (print_insn_sparc): Delete sparc_v9_p. New static local
4375 current_mach. Resort opcode table if current_mach changes.
4376 Generalize "insn not supported" test.
4377 (compare_opcodes): Prefer supported opcodes to nonsupported ones.
4378 Delete test for v9/!v9.
4379 * sparc-opc.c (MASK_*): Use SPARC_OPCODE_ARCH_MASK.
4381 (brfc): Split into CBR and FBR for coprocessor/fp branches.
4382 (brfcx): Renamed to FBRX.
4383 (condfc): Renamed to CONDFC. Pass v6notlet to CBR (standard
4384 coprocessor mnemonics are not supported on the sparclet).
4385 (condf): Renamed to CONDF.
4386 (SLCBCC2): Delete F_ALIAS flag.
4390 * sparc-opc.c (sparc_opcodes): rd must be 0 for
4391 mov foo,{%y,%psr,%wim,%tbr}. Support mov foo,%asrX.
4395 * Makefile.in (config.status): Depend upon BFD VERSION file, so
4396 that the shared library version number is set correctly.
4400 * configure.in: Use AC_CHECK_TOOL to find ar and ranlib. From
4402 * configure: Rebuild.
4406 * z8kgen.c (internal, gas): Call xmalloc rather than unchecked
4411 * configure: Rebuild with autoconf 2.8.
4415 * sparc-dis.c (print_insn_sparc): Handle 'O' operand char like 'r'.
4416 * sparc-opc.c (sparc_opcodes): Use 'O' operand char for `neg reg'.
4420 * configure.in: Don't set SHLIB or SHLINK to an empty string,
4421 since they appear as targets in Makefile.in.
4422 * configure: Rebuild.
4426 * mpw-make.sed: Edit out shared library support bits.
4430 * sparc-opc.c (v8,v6notv9): Add MASK_SPARCLET.
4431 (sparc_opcode_archs): Add MASK_V8 to sparclet entry.
4432 (sparc_opcodes): Add sparclet insns.
4433 (sparclet_cpreg_table): New static local.
4434 (sparc_{encode,decode}_sparclet_cpreg): New functions.
4435 * sparc-dis.c (print_insn_sparc): Handle sparclet cpregs.
4439 * i386-dis.c (index16): New static variable.
4440 (putop): Print jecxz for 32 bit case, jcxz for 16 bit, not the
4442 (OP_indirE): Return result of OP_E.
4443 (OP_E): Check for 16 bit addressing mode, and disassemble
4444 correctly. Optimised 32 bit case a little. Don't print
4445 "(base,index,scale)" when sib specifies only an offset.
4449 * configure.in: Set and substitute SHLIB_DEP.
4450 * configure: Rebuild.
4451 * Makefile.in (SHLIB_DEP): New variable.
4452 (LIBIBERTY_LISTS, BFD_LIST): New variables.
4453 (stamp-piclist): Depend upon LIBIBERTY_LISTS and BFD_LIST. If
4454 COMMON_SHLIB, add them to piclist with appropriate modifications.
4455 ($(SHLIB)): Depend upon $(SHLIB_DEP). Don't check COMMON_SHLIB
4456 here: just use piclist.
4460 * sparc-dis.c (MASK_V9,V9_ONLY_P,V9_P): Define.
4461 (print_insn_sparc): Rewrite v9/not-v9 tests.
4462 (compare_opcodes): Likewise.
4463 * sparc-opc.c (MASK_<ARCH>): Define.
4464 (v6,v7,v8,sparclite,v9,v9a): Redefine.
4465 (sparclet,v6notv9): Define.
4466 (sparc_opcode_archs): Delete member `conflicts'. Add `supported'.
4467 (sparc_opcodes): Delete F_NOTV9, use v6notv9 instead.
4471 * configure.in: Call AC_PROG_CC before configure.host.
4472 * configure: Rebuild.
4474 * Makefile.in (SONAME): Remove leading ../bfd/ from $(SHLIB).
4478 * i386-dis.c (onebyte_has_modrm): New static array.
4479 (twobyte_has_modrm): New static array.
4480 (print_insn_i386): Only fetch the mod/reg/rm byte if it is needed.
4484 * Makefile.in ($(SHLINK)): Check ts against $(SHLIB), not
4489 * ppc-opc.c (PPC): Undef, so default defination on Windows NT
4494 * m68k-opc.c (m68k_opcodes): The bkpt instruction is supported on
4495 m68010up, not just m68020up | cpu32.
4497 * Makefile.in (SONAME): New variable.
4498 ($(SHLINK)): Make a link to the transformed name, as well.
4499 (stamp-tshlink): New target.
4500 (install): Skip stamp-tshlink during install.
4504 * configure.in: Call AC_ARG_PROGRAM.
4505 * configure: Rebuild.
4506 * Makefile.in (program_transform_name): New variable.
4507 (install): Transform library name before installing it.
4511 * i960-dis.c (mem): Add HX dcinva instruction.
4513 Support for building as a shared library, based on patches from
4515 * configure.in: Add AC_ARG_ENABLE for shared and commonbfdlib.
4516 New substitutions: ALLLIBS, PICFLAG, SHLIB, SHLIB_CC,
4517 SHLIB_CFLAGS, COMMON_SHLIB, SHLINK.
4518 * configure: Rebuild.
4519 * Makefile.in (ALLLIBS): New variable.
4520 (PICFLAG, SHLIB, SHLIB_CC, SHLIB_CFLAGS): New variables.
4521 (COMMON_SHLIB, SHLINK): New variables.
4522 (.c.o): If PICFLAG is set, compile twice, once PIC, once normal.
4523 (STAGESTUFF): Remove variable.
4524 (all): Depend upon $(ALLLIBS) rather than $(TARGETLIB).
4525 (stamp-piclist, piclist): New targets.
4526 ($(SHLIB), $(SHLINK)): New targets.
4527 ($(OFILES)): Depend upon stamp-picdir.
4528 (disassemble.o): Build twice if PICFLAG is set.
4529 (MOSTLYCLEAN): Add pic/*.o.
4530 (clean): Remove $(SHLIB), $(SHLINK), piclist, and stamp-piclist.
4531 (distclean): Remove pic and stamp-picdir.
4532 (install): Install shared libraries.
4533 (stamp-picdir): New target.
4537 * sparc-dis.c (print_insn_sparc): Delete DISASM_RAW_INSN support.
4538 Print unknown instruction as "unknown", rather than in hex.
4542 * dis-buf.c: Include "sysdep.h" before "dis-asm.h".
4546 * sparc-opc.c (sparc_opcode_archs): Mark v8/sparclite as conflicting.
4550 * i386-dis.c (print_insn_i386): Only fetch the mod/reg/rm byte
4551 when necessary. From Ulrich Drepper
4556 * sparc-dis.c (print_insn_sparc): NUMOPCODES replaced with
4557 sparc_num_opcodes. Update architecture enum values.
4558 * sparc-opc.c (sparc_opcode_archs): Replaces architecture_pname.
4559 (sparc_opcode_lookup_arch): New function.
4560 (sparc_num_opcodes): Renamed from bfd_sparc_num_opcodes.
4561 (sparc_opcodes): Add v9a shutdown insn.
4565 * sparc-dis.c (print_insn_sparc): Renamed from print_insn.
4566 If DISASM_RAW_INSN, print insn in hex. Handle v9a as opcode
4568 (print_insn_sparc64): Deleted.
4569 * disassemble.c (disassembler, case bfd_arch_sparc): Always use
4572 * sparc-opc.c (architecture_pname): Add v9a.
4576 * alpha-opc.h (alpha_insn_set): VAX floating point opcode was
4577 incorrectly defined as 0x16 when it should be 0x15.
4578 (FLOAT_FORMAT_MASK): function code is 11 bits, not just 7 bits!
4579 (alpha_insn_set): added cvtst and cvttq float ops. Also added
4580 excb (exception barrier) which is defined in the Alpha
4581 Architecture Handbook version 2.
4582 * alpha-dis.c (print_insn_alpha): Fixed special-case decoding for
4583 OPERATE_FORMAT_CODE type instructions. The bug caused mulq to be
4584 disassembled as or, for example.
4588 * mips-dis.c (print_insn_arg): Print cases 'i' and 'u' in hex.
4589 (_print_insn_mips): Change i from int to unsigned int.
4593 * ppc-opc.c (powerpc_opcodes): tlbi POWER opcode form different
4594 from tlbie PowerPC opcode. Add PPC603 tlbld and tlbli.
4598 * i386-dis.c: Added Pentium Pro instructions.
4602 * ppc-opc.c (fsqrt{,.}): Duplicate for PowerPC in addition to
4607 * sh-opc.h (sh_nibble_type): Added REG_B.
4608 (sh_arg_type): Added A_REG_B.
4609 (sh_table): Added pref and bank reg versions of ldc, ldc.l, stc
4611 * sh-dis.c (print_insn_shx): Added cases for REG_B and A_REG_B.
4615 * disassemble.c (disassembler): Use new bfd_big_endian macro.
4619 * Makefile.in (distclean): Remove stamp-h. From Ronald
4625 * alpha-dis.c (print_insn_alpha): fixed decoding of cpys
4630 * sh-opc.h (sh_arg_type): Added A_SSR and A_SPC.
4631 (sh_table): Added many SH3 opcodes.
4632 * sh-dis.c (print_insn_shx): Added cases for A_SSR and A_SPC.
4636 * ppc-opc.c (subfc., subfco): Mark this PPCCOM, not PPC.
4637 (subco,subco.): Mark this PPC, not PPCCOM.
4641 * configure: Rebuild with autoconf 2.7.
4645 * configure: Rebuild with autoconf 2.6.
4649 * configure.in: Sort list of architectures. Accept but do nothing
4650 for alliant, convex, pyramid, romp, and tahoe.
4654 * a29k-dis.c (print_special): Change num to unsigned int.
4658 * a29k-dis.c (print_insn): Cast insn24 to unsigned long when
4663 * configure.in: Call AC_CHECK_PROG to find and cache AR.
4664 * configure: Rebuilt.
4668 * configure.in: Add case for bfd_i860_arch.
4669 * configure: Rebuild.
4673 * m68k-opc.c (m68k_opcodes): Correct fmoveml operands.
4674 * m68k-dis.c (NEXTSINGLE): Change i to unsigned int.
4675 (NEXTDOUBLE): Likewise.
4676 (print_insn_m68k): Don't match fmoveml if there is more than one
4677 register in the list.
4678 (print_insn_arg): Handle a place of '8' for a type of 'L'.
4682 * m68k-opc.c: Use #W rather than #w.
4683 * m68k-dis.c (print_insn_arg): Handle new 'W' place.
4687 * m68k-opc.c (m68k_opcode_aliases): Add dbfw as an alias for dbf,
4688 and likewise for all the dbxx opcodes.
4692 * arc-dis.c: Include elf-bfd.h rather than libelf.h.
4696 * mips-opc.c: Added shorthand (V1) for INSN_4100 manifest. Added
4697 the VR4100 specific instructions to the mips_opcodes structure.
4701 * mpw-config.in, mpw-make.sed: Remove ugly workaround for
4702 ugly Metrowerks bug in CW6, is fixed in CW7.
4706 * ppc-opc.c (whole file): Add flags for common/any support.
4710 * Makefile.in (BISON): Remove macro.
4711 (FLAGS_TO_PASS): Remove BISON.
4717 * m68k-dis.c (print_insn_m68k): Recognize all two-word
4718 instructions that take no args by looking at the match mask.
4719 (print_insn_arg): Always print "%" before register names.
4720 [case 'c']: Use "nc" for the no-cache case, as recognized by gas.
4721 [case '_']: Don't print "@#" before address.
4722 [case 'J']: Use "%s" as format string, not register name.
4723 [case 'B']: Treat place == 'C' like 'l' and 'L'.
4727 * i386-dis.c: Describe cmpxchg8b operand, and spell the opcode
4734 * alpha-opc.h (MEMORY_FUNCTION_FORMAT_MASK): added.
4735 (alpha_insn_set): added definitions for VAX floating point
4736 instructions (Unix compilers don't generate these, but handcoded
4737 assembly might still use them).
4739 * alpha-dis.c (print_insn_alpha): added support for disassembling
4740 the miscellaneous instructions in the Alpha instruction set.
4744 * mpw-config.in: Add m68k-opc.c.o to BFD_MACHINES for m68k,
4745 no longer create sysdep.h, sed ppc-opc.c to work around a
4746 serious Metrowerks C bug.
4747 * mpw-make.in: Remove.
4748 * mpw-make.sed: New file, used by mpw-configure to edit
4749 Makefile.in into an MPW makefile.
4753 * Makefile.in (maintainer-clean): New synonym for realclean.
4757 * m68k-opc.c: Split pmove patterns which use 'P' into patterns
4758 which use '0', '1', and '2' instead. Specify the proper size for
4759 a pmove immediate operand. Correct the pmovefd patterns to be
4760 moves to a register, not from a register.
4761 * m68k-dis.c (print_insn_arg): Replace 'P' with '0', '1', '2'.
4765 * sparc-opc.c (sparc_opcodes): Mark all insns that reference
4766 %psr, %wim, %tbr as F_NOTV9.
4770 * Makefile.in (Makefile): Just rebuild Makefile when running
4772 (config.h, stamp-h): New targets.
4773 * configure.in: Call AC_CONFIG_HEADER and AC_CANONICAL_SYSTEM
4774 earlier. Don't bother to call AC_ARG_PROGRAM. Touch stamp-h when
4775 rebuilding config.h.
4776 * configure: Rebuild.
4778 * mips-opc.c: Change unaligned loads and stores with "t,A"
4779 operands to use "t,A(b)".
4783 * sh-dis.c (print_insn_shx): Add F_FR0 support.
4787 * sh-dis.c (print_insn_shx): Change loop over op->arg[n] to iterate
4788 until 3 instead of until 2.
4792 * Makefile.in (ALL_CFLAGS): Define.
4793 (.c.o, disassemble.o): Use $(ALL_CFLAGS).
4794 (MOSTLYCLEAN): Add config.log.
4795 (distclean): Don't remove config.log.
4796 * configure.in: Substitute HDEFINES.
4797 * configure: Rebuild.
4801 * sh-opc.h (sh_arg_type): Add F_FR0.
4802 (sh_table, case fmac): Add F_FR0 as first argument.
4806 * sh-opc.h (sh_opcode_info): Increase arg array size to 4.
4810 * sparc-dis.c: Remove all references to NO_V9.
4814 * aclocal.m4: Just include ../bfd/aclocal.m4.
4815 * configure: Rebuild.
4819 * sparc-dis.c (X_DISP19): Define.
4820 (print_insn, case 'G'): Use it.
4821 (print_insn, case 'L'): Sign extend displacement.
4825 * configure.in: Run ../bfd/configure.host before AC_PROG_CC.
4826 Subsitute CFLAGS and AR. Call AC_PROG_INSTALL. Don't substitute
4827 host_makefile_frag or frags.
4828 * aclocal.m4: New file.
4829 * configure: Rebuild.
4830 * Makefile.in (INSTALL): Set to @INSTALL@.
4831 (INSTALL_PROGRAM): Set to @INSTALL_PROGRAM@.
4832 (INSTALL_DATA): Set to @INSTALL_DATA@.
4834 (AR_FLAGS): Set to rc rather than qc.
4835 (CC): Define as @CC@.
4836 (CFLAGS): Set to @CFLAGS@.
4837 (@host_makefile_frag@): Remove.
4838 (config.status): Remove dependency upon @frags@.
4840 * configure.in: ../bfd/config.bfd now just sets shell variables.
4841 Use them rather than looking through target Makefile fragments.
4842 * configure: Rebuild.
4846 * sh-opc.h (ftrc): Change FPUL_N to FPUL_M.
4850 * sparc-opc.c (sparc_opcodes): Delete duplicate wr %y insn.
4851 Add clrx, iprefetch, signx, clruw, cas, casl, casx, casxl synthetic
4854 * sparc-opc.c (sparc_opcodes): Fix prefetcha insn.
4855 (lookup_{name,value}): New functions.
4856 (prefetch_table): New static local.
4857 (sparc_{encode,decode}_prefetch): New functions.
4858 * sparc-dis.c (print_insn): Handle '*' arg (prefetch function).
4862 * sh-opc.h: Add blank lines to improve readabililty of sh3e
4867 * sh-dis.c: Correct comment on first line of file.
4871 * disassemble.c (disassembler): Handle bfd_mach_sparc64.
4873 * sparc-opc.c (asi, membar): New static locals.
4874 (sparc_{encode,decode}_{asi,membar}): New functions.
4875 (sparc_opcodes, membar insn): Fix.
4876 * sparc-dis.c (print_insn): Call sparc_decode_asi.
4877 Support decoding of membar masks.
4882 * m68k-opc.c (m68k_opcode_aliases): Add br, brs, brb, brw, brl.
4886 * m68k-opc.c (m68k_opcode_aliases): Add bhib as an alias for bhis,
4887 and likewise for the other branches. Add bhs as an alias for bcc,
4888 and likewise for the size variants. Add dbhs as an alias for
4893 * sh-opc.h (FP sts instructions): Update to match reality.
4897 * m68k-dis.c: (fpcr_names): Add % before all register names.
4898 (reg_names): Likewise.
4899 (print_insn_arg): Don't explicitly print % before register names.
4900 Add % before register names in static array names. In case 'r',
4901 print data registers as `@(Dn)', not `Dn@'. When printing a
4902 memory address, don't print @# before it.
4903 (print_indexed): Change base_disp and outer_disp from int to
4904 bfd_vma. Print using MIT syntax, not mutant invalid Motorola
4905 syntax. Sign extend 8 byte displacement correctly.
4906 (print_base): Print using MIT syntax. Print zpc when appropriate.
4907 Change parameter disp from int to bfd_vma.
4909 * m68k-opc.c (m68k_opcode_aliases): Add jsrl and jsrs as aliases
4914 * sh-dis.c (print_insn_shx): Handle new operand types F_REG_N,
4915 F_REG_M, FPSCR_M, FPSCR_N, FPUL_M and FPUL_N.
4916 * sh-opc.h (sh_arg_type): Add new operand types.
4917 (sh_table): Add new opcodes from SH3E Floating Point ISA.
4921 * Makefile.in (distclean): Remove generated file config.h.
4925 * Makefile.in (distclean): Remove generated file config.h.
4929 * m68k-opc.c: New file, holding tables from include/opcode/m68k.h.
4931 * m68k-dis.c: Remove BREAK_UP_BIG_DECL stuff.
4933 (print_insn_m68k): Change d to be const. Use m68k_numopcodes
4934 rather than numopcodes. Use m68k_opcodes rather than removed
4935 opcode function. Don't check F_ALIAS.
4936 (print_insn_arg): Change first parameter to be const char *.
4937 * Makefile.in (ALL_MACHINES): Add m68k-opc.o.
4938 (m68k-opc.o): New target.
4939 * configure.in: Build m68k-opc.o for bfd_m68k_arch.
4940 * configure: Rebuild.
4944 * sparc-dis.c (HASH_SIZE, HASH_INSN): Define.
4945 (opcode_bits, opcode_hash_table): New variables.
4946 (opcodes_initialized): Renamed from opcodes_sorted.
4947 (build_hash_table): New function.
4948 (is_delayed_branch): Use hash table.
4949 (print_insn): Renamed from print_insn_sparc, made static.
4950 Build and use hash table. If !sparc64, ignore sparc64 insns,
4951 and vice-versa if sparc64.
4952 (print_insn_sparc, print_insn_sparc64): New functions.
4953 (compare_opcodes): Move sparc64 opcodes to end.
4954 Print commutative insns with constant second.
4955 * sparc-opc.c (all non-v9 insns): Use flag F_NOTV9 instead of F_ALIAS.
4959 * sh-dis.c (print_insn_shx): Remove unused local dslot. Use
4960 print_address_func for A_BDISP12 and A_BDISP8. Correct test which
4961 avoids printing a delay slot in a delay slot.
4962 * sh-opc.h (sh_table): Fully bracket last entry.
4966 * sparc-opc.c (sllx, srax, srlx): Fix disassembly.
4970 * configure.in: Get host_makefile_frag from ${srcdir}.
4972 * configure.in: Autoconfiscated. Check for string[s].h. Create
4973 config.h from config.in. Don't set up sysdep.h link.
4974 * sysdep.h: New file.
4975 * configure, config.in: New files, generated from configure.in.
4976 * Makefile.in: Updated to be processed autoconf-style.
4977 (distclean): Keep sysdep.h. Remove config.log and config.cache.
4978 (Makefile): Depend on config.status.
4979 (config.status): New rule.
4980 * configure.bat: Update Makefile substitutions.
4984 * mips-opc.c (L1): Define.
4985 (mips_opcodes): Add R4010 instructions: flushi, flushd, flushid,
4986 addciu, madd, maddu, ffc, ffs, msub, msubu, selsi, selsr, waiti,
4991 * mips-opc.c (mips_opcodes): For the move pseudo-op, prefer daddu
4992 if ISA 3 and addu otherwise, replacing or, since some MIPS chips
4993 have multiple add units but only a single logical unit.
4995 * ppc-opc.c (powerpc_operands): Change CR to use a bitsize of 3,
4996 shifted by 18, without any insertion or extraction function.
4997 (insert_cr, extract_cr): Remove.
5001 * m68k-dis.c (print_insn_arg, print_indexed): Print "%" before
5006 * mpw-config.in: Add sh and i386 configs, remove sparc config.
5007 * sh-opc.h: Add copyright.
5011 * Makefile.in (crunch-m68k): Delete extra target accidentally
5012 checked in a while ago.
5016 * sh-opc.h (sh_table): Add SH3 support.
5020 * sh-opc.h: Added bsrf and braf.
5024 * arm-opc.h (arm_opcodes): Add 64-bit multiply patterns. Delete
5025 bogus [ls]fm{ea,fd} patterns.
5027 * arm-opc.h (arm_opcodes): Correct typos in stm, ldm, std, and ldc.
5028 * arm-dis.c (print_insn_arm): Make GIVEN a parameter, don't try and
5029 initialize it from memory. Make function static.
5030 (print_insn_{big,little}_arm): New functions.
5031 * disassemble.c (disassembler, case bfd_arch_arm): Disassemble for
5032 the correct endianness.
5036 * sh-opc.h (sh_nibble_type, sh_arg_type): remove trailing , from
5041 * m68k-dis.c (opcode): Finish change made by Kung Hsu on April
5042 17th, so that it builds again using GCC as the compiler.
5046 * mips-dis.c (print_insn_little_mips): Cast return value from
5047 bfd_getl32 from bfd_vma to unsigned long, because _print_insn_mips
5048 expects an unsigned long, and that might be fewer words of
5049 argument storage (e.g., if bfd_vma is long long on a 32-bit
5051 (print_insn_big_mips): Likewise with bfd_getb32 value.
5052 (_print_insn_mips): Now static.
5056 * m68k-dis.c: Take out #define BREAK_UP_BIG_DECL kludge, because
5057 gcc memory hog problem with initializer is fixed.
5061 Merge in support for Mac MPW as a host.
5062 (Old change descriptions retained for informational value.)
5064 * mpw-config.in (archname): Compute from the config.
5065 (BFD_MACHINES, ARCHDEFS): Put into mk.tmp.
5067 * mpw-config.in (target_arch): Compute from canonical target.
5068 (m68k, mips, powerpc, sparc): Add architectures.
5069 * mpw-make.in (disassemble.c.o): Add.
5070 (ALL_CFLAGS): Remove special flags (-mc68020 -mc68881 -model far).
5072 * mpw-config.in (BFD_MACHINES): Set to a default value.
5073 * mpw-make.in (BFD_MACHINES): Remove wired-in value.
5075 * mpw-make.in (CSEARCH): Add extra-include to search path.
5077 * mpw-config.in (varargs.h): Don't create.
5078 (sysdep.h): Create using forward-include.
5079 * mpw-make.in (CSEARCH): Add include/mpw to search path.
5081 * mpw-config.in: New file, MPW version of configure.in.
5082 * mpw-make.in: New file, MPW version of Makefile.in.
5086 * alpha-dis.c (print_insn_alpha): Put empty statement after
5091 * hppa-dis.c (sign_extend): Delete, redundant with libhppa.h version.
5092 (low_sign_extend): Likewise.
5093 (get_field): Delete unused function.
5094 (set_field, deposit_14, deposit_21): Likewise.
5098 * i386-dis.c: Support for more pentium opcodes. From Guy Harris
5105 * alpha-opc.h (OSF_ASMCODE): define
5106 print pal-code names as defined in App C of the
5107 Alpha Architecture Reference Manual
5109 * alpha-dis.c: cleaned up output
5110 print stylized code forms as defined in App A.4.3 of the
5111 Alpha Architecture Reference Manual
5115 * mips-opc.c: Add new mips4 instructions. Don't set INSN_RFE for
5117 * mips-dis.c (print_insn_arg): Handle new argument types 'h', 'R',
5122 * m68k-dis.c (opcode): New function. Returns address of opcode
5123 table entry given index, even if the opcode table was split to
5124 work around gcc bugs.
5125 (print_insn_m68k): Call opcode instead of referencing m68k_opcodes
5127 (BREAK_UP_BIG_DECL): Make secondary array static and const.
5128 (reg_names): Now const.
5129 (print_insn_arg): Arrays cacheFieldName and names now const.
5130 (print_indexed): Array scales now const.
5134 * ppc-opc.c: Sort recently added instructions by minor opcode
5135 number within major opcode number.
5139 * hppa-dis.c: Include libhppa.h.
5143 * mips-opc.c: Change dli to use M_DLI, and add dla.
5147 * Makefile.in (ALL_MACHINES): Add w65-dis.o.
5151 * mips-opc.c: Add r4650 mul instruction.
5155 * mips-opc.c: Add uld and usd macros for unaligned double load and
5160 * ppc-opc.c (powerpc_opcodes): Add 403GA opcodes rfci, dccci,
5161 mfdcr, mtdcr, icbt, iccci.
5165 * i960-dis.c (struct tabent, struct sparse_tabent): Change the
5166 signed char fields to shorts, more portable.
5170 * i960-dis.c (struct tabent, struct sparse_tabent): Declare the
5171 char fields as signed chars, since they may have negative values.
5175 * i386-dis.c (dis386_twobyte): Add cpuid, From Charles Hannum
5181 * ppc-opc.c (extract_bdm): Correct parenthezisation.
5182 * ppc-dis.c (print_insn_powerpc): Print .long before unrecognized
5187 * ppc-opc.c: Changes based on patch from David Edelsohn
5189 (powerpc_operands): Add operands SPRBAT and SPRG. Split TBR out of
5192 (insert_tbr): New static function.
5193 (extract_tbr): New static function.
5194 (XFXFXM_MASK, XFXM): Define.
5195 (XSPRBAT_MASK, XSPRG_MASK): Define.
5196 (powerpc_opcodes): Add instructions to access special registers by
5197 name. Add mtcr and mftbu.
5201 * mips-opc.c (P3): Define.
5202 (mips_opcodes): Add mad and madu.
5204 Sun Jan 15 16:32:59 1995 Steve Chamberlain <sac@splat>
5206 * configure.in: Add W65 support.
5207 * disassemble.c: Likewise.
5208 * w65-opc.h, w65-dis.c: New files.
5212 * h8300-dis.c (bfd_h8_disassemble): Add support for 2 bit
5217 * mips-opc.c: Add dli as a synonym for li.
5221 * alpha-dis.c (print_insn_alpha): Handle call_pal instruction, and
5222 print something for reserved opcode values, even if it won't
5225 * mips-dis.c (_print_insn_mips): When initializing, shift right
5226 and mask, to avoid sign extension problems on the Alpha.
5228 * m68k-dis.c (print_insn_arg, case 'J'): Handle buscr and pcr
5233 * sh-opc.h (mov.l gbr): Get direction right.
5234 * sh-dis.c (print_insn_shx): New function.
5235 (print_insn_shl, print_insn_sh): Call print_insn_shx to
5236 print opcodes with right byte order.
5240 * ns32k-dis.c (struct ns32k_option): Renamed from struct option,
5241 to avoid conflicts with getopt.
5245 * hppa-dis.c (print_insn_hppa): Read the instruction using
5246 bfd_getb32, so that it works on a little endian or 64 bit host.
5247 Remove unused local variable op.
5251 * mips-opc.c: Use or instead of addu for pseudo-op move, since
5252 addu does not work correctly if -mips3.
5256 * a29k-dis.c (print_special): Add special register names defined
5257 on 29030, 29040 and 29050.
5258 (print_insn): Handle new operand type 'I'.
5262 * Makefile.in (INSTALL): Use top level install.sh script.
5266 * sparc-dis.c: Rewrite to use bitfields, rather than a union, so
5267 that it works on a little endian host.
5271 * configure.in: Use ${config_shell} when running config.bfd.
5275 * mips-opc.c (mips_opcodes): "dabs" is only available with -mips3.
5279 * a29k-dis.c (print_insn): Print the opcode.
5283 * mips-opc.c (mips_opcodes): Set WR_t for sc and scd.
5287 * hppa-dis.c (reg_names): Use r26-r23 for arg0-arg3.
5291 * mips-opc.c: Set INSN_STORE_MEMORY flag for all instructions
5292 which store a value into memory.
5296 * configure.in, Makefile.in, disassemble.c: Add support for the ARM.
5297 * arm-dis.c, arm-opc.h: New files.
5301 * Makefile.in (ns32k-dis.o): Add dependency.
5302 * ns32k-dis.c (print_insn_arg): Declare initialized local as
5303 string, not as array of chars.
5307 * sparc-dis.c (print_insn_sparc): Handle new operand type 'x'.
5309 * sparc-opc.c: Added sparclite extended FP operations, and
5310 versions of v9 impdep* instructions permitting specification of
5315 * i960-dis.c (reg_names): Now const.
5316 (struct sparse_tabent): New type, copied from array type in mem
5318 (ctrl): Local static array ctrl_tab now const.
5319 (cobr): Local static array cobr_tab now const.
5320 (mem): Local variables reg1, reg2, reg3 now point to const. Local
5321 static variable mem_tab no longer explicitly initialized. Changed
5322 mem_init to const array of struct sparse_tabent.
5323 (reg): Local static variable reg_tab no longer explicitly
5324 initialized. Changed reg_init to const array of struct
5326 (ea): Local static array scale_tab now const.
5328 * i960-dis.c (reg): Added i960JX instructions to reg_init table.
5333 * configure.bat: the disassember needs to be enabled for
5334 "objdump -d" to work in djgpp.
5338 * ns32k-dis.c: Deleted all code in "#ifdef GDB".
5339 (invalid_float): Enabled general version, doesn't require running
5340 on ns32k host. Changed to take char* argument, and test for
5341 explicitly specified sizes, instead of using sizeof() on host CPU
5343 (INVALID_FLOAT): Cast first argument.
5344 (opt_u, opt_U, opt_O, opt_C, opt_S, list_P532, list_M532,
5345 list_P032, list_M032): Now const.
5346 (optlist, list_search): Made appropriate arguments now point to
5348 (print_insn_arg): Changed static array of one-character-string
5349 pointers into a static const array of characters; fixed sprintf
5350 statement accordingly.
5354 * opcodes/ns32k-dis.c: Semi-new file. Had apparently been dropped
5355 from distribution. A ns32k-dis.c from a previous distribution has
5356 been brought up to date and supports the new interface.
5358 * disassemble.c: define ARCH_ns32k and add case bfd_arch_ns32k.
5360 * configure.in: add bfd_ns32k_arch target support.
5362 * Makefile.in: add ns32k-dis.o to ALL_MACHINES.
5363 Add ns32k-dis.c to CFILES. Add dependencies for ns32k-dis.o.
5367 * h8300-dis.c (bfd_h8_disassemble): Get 16bit branch
5372 * h8300-dis.c, mips-dis.c: Don't use true and false.
5376 * configure.in: Change --with-targets to --enable-targets.
5380 * mips-dis.c (_print_insn_mips): Build a static hash table mapping
5381 opcodes to the first instruction with that opcode, to speed
5387 * Makefile.in (mostlyclean): Fix typo (was mostyclean).
5391 * configure.bat: update to latest makefile.in
5395 * a29k-dis.c (print_insn): Print 'x' type operand in hex.
5396 * h8300-dis.c (bfd_h8_disassemble): Print 16bit rels correctly.
5397 * sh-dis.c (print_insn_sh): Don't recur endlessly if delay
5398 slot insn is in a delay slot.
5399 * z8k-opc.h: (resflg): Fix patterns.
5400 * h8500-opc.h Fix CR insn patterns.
5404 * ppc-opc.c (powerpc_opcodes): Put PowerPC versions of "cmp" and
5405 "cmpl" before POWER versions, so that gas -many uses them.
5409 * disassemble.c: New file.
5410 * Makefile.in (OFILES): Add disassemble.o.
5411 (disassemble.o): Provide dependencies; compile with $(ARCHDEFS).
5412 * configure.in: Define ARCHDEFS in Makefile. Code taken from
5413 binutils/configure.in.
5415 * m68k-dis.c (print_insn_m68k): If F_ALIAS flag is set, skip the
5416 opcode being examined.
5420 * ppc-opc.c (powerpc_operands): Added RAL, RAM and RAS.
5421 (insert_ral, insert_ram, insert_ras): New functions.
5422 (powerpc_opcodes): Use RAL for load with update, RAM for lmw, and
5423 RAS for store with update.
5427 * ppc-opc.c (powerpc_opcodes): Correct fcir. From David Edelsohn
5432 * mips-opc.c (mips_opcodes): Correct operands of "nor" with an
5437 * sparc-opc.c (sparc_opcodes): Fix "rd %fprs,%l0".
5441 * ppc-opc.c (powerpc_operands): The signedp field has been
5442 removed, so don't initialize it. Set the PPC_OPERAND_SIGNED flag
5443 instead. Add new operand SISIGNOPT.
5444 (powerpc_opcodes): For lis, liu, addis, and cau use SISIGNOPT.
5446 * ppc-dis.c (print_insn_powerpc): Check PPC_OPERAND_SIGNED rather
5451 * i386-dis.c (struct private): Renamed to dis_private. `private'
5452 is a reserved word for dynix cc.
5456 * configure.in: Change error message to refer to bfd/config.bfd
5457 rather than bfd/configure.in.
5461 * ppc-opc.c: Define POWER2 as short alias flag.
5462 (powerpc_opcodes): Add POWER/2 opcodes lfq*, stfq*, fcir[z], and
5467 * i960-dis.c (print_insn_i960): Don't read a second word for
5468 opcodes 0, 1, 2 and 3.
5472 * configure.in: Don't build m68881-ext.o for bfd_m68k_arch.
5476 * m68881-ext.c: Removed; no longer used.
5477 * Makefile.in: Changed accordingly.
5479 * m68k-dis.c (ext_format_68881): Don't declare.
5480 (print_insn_m68k): If an instruction uses place 'i', it uses at
5481 least four fixed bytes.
5482 (print_insn_arg): Don't bump p by 2 for case 'I', place 'i'. For
5483 extended float, convert to double using floatformat_to_double, not
5484 ieee_extended_to_double, and fetch the data before converting it.
5488 * mips-opc.c: It's sqrt.s, not sqrt.w. From
5493 * ppc-opc.c (powerpc_opcodes): The POWER uses bdn[l][a] where the
5494 PowerPC uses bdnz[l][a].
5498 * dis-buf.c, i386-dis.c: Include sysdep.h.
5502 * configure.in (bfd_powerpc_arch): Use ppc-dis.o and ppc-opc.o.
5504 * ppc-opc.c (powerpc_opcodes): Mark POWER instructions supported
5505 by Motorola PowerPC 601 with PPC_OPCODE_601.
5506 * ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc):
5507 Disassemble Motorola PowerPC 601 instructions as well as normal
5508 PowerPC instructions.
5512 * i960-dis.c (reg, mem): Just use a static array instead of
5517 * hppa-dis.c (print_insn_hppa): For '?' and '@' only adjust the
5518 condition name index if this is for a negated condition.
5520 * hppa-dis.c (print_insn_hppa): No space before 'H' operand.
5521 Floating point format for 'H' operand is backwards from normal
5522 case (0 == double, 1 == single). For '4', '6', '7', '9', and '8'
5523 operands (fmpyadd and fmpysub), handle bizarre register
5524 translation correctly for single precision format.
5526 * hppa-dis.c (print_insn_hppa): Do not emit a space after 'F'
5527 or 'I' operands if the next format specifier is 'M' (fcmp
5528 condition completer).
5532 * ppc-opc.c (powerpc_operands): New operand type MBE to handle a
5533 single number giving a bitmask for the MB and ME fields of an M
5534 form instruction. Change NB to accept 32, and turn it into 0;
5535 also turn 0 into 32 when disassembling. Seperated SH from NB.
5536 (insert_mbe, extract_mbe): New functions.
5537 (insert_nb, extract_nb): New functions.
5538 (SC_MASK): Mask out SA and LK bits.
5539 (powerpc_opcodes): Change "cal" to use RT, D, RA rather than RT,
5540 RA, SI. Change "liu" and "cau" to use UI rather than SI. Mark
5541 "bctr" and "bctrl" as accepted by POWER. Change "rlwimi",
5542 "rlimi", "rlwimi.", "rlimi.", "rlwinm", "rlinm", "rlwinm.",
5543 "rlinm.", "rlmi", "rlmi.", "rlwnm", "rlnm", "rlwnm.", "rlnm." to
5544 use MBE rather than MB. Add "mfmq" and "mtmq" POWER instructions.
5545 (powerpc_macros): Define table of macro definitions.
5546 (powerpc_num_macros): Define.
5548 * ppc-dis.c (print_insn_powerpc): Don't skip optional operands
5549 if PPC_OPERAND_NEXT is set.
5553 * i960-dis.c (print_insn_i960): Make buffer bfd_byte instead of
5554 char. Retrieve contents using bfd_getl32 instead of shifting.
5558 * ppc-opc.c: New file. Opcode table for PowerPC, including
5559 opcodes for POWER (RS/6000).
5560 * ppc-dis.c: New file. PowerPC and Power (RS/6000) disassembler.
5561 * Makefile.in (ALL_MACHINES): Add ppc-dis.o and ppc-opc.o.
5562 (CFILES): Add ppc-dis.c.
5563 (ppc-dis.o, ppc-opc.o): New targets.
5564 * configure.in: Build ppc-dis.o and ppc-opc.o for bfd_rs6000_arch.
5568 * hppa-dis.c (print_insn_hppa): Handle 'N' in assembler template.
5569 No space before 'u', 'f', or 'N'.
5573 * i386-dis.c (print_insn_i386): Add FIXME comment regarding reading
5574 farther than we should.
5576 * i386-dis.c (dis386): Use Yb and Yv for scasb and scasS.
5580 * sparc-dis.c m68k-dis.c alpha-dis.c a29k-dis.c: Fix comments.
5584 * i960-dis.c (print_insn_i960): Only read word2 if the instruction
5585 needs it, to prevent reading past the end of a section.
5589 * mips-opc.h: Use macro for j instruction, to support SVR4 PIC.
5590 Removed t,A case for la; always use t,A(b) case.
5595 * mips-dis.c (print_insn_arg): Handle 'k'.
5596 * mips-opc.c: Make cache use k, not t.
5600 * alpha-opc.h, alpha-dis.c (print_insn_alpha): Add
5601 FLOAT_MEMORY_FORMAT_CODE, FLOAT_BRANCH_FORMAT_CODE, correct
5602 FLOAT_FORMAT_CODE to put out floating point register names.
5606 * mips-opc.c: Use macros for jal variants, to support SVR4 PIC.
5610 * a29k-dis.c (print_insn): Use 0x%08x, not 0x%8x.
5614 * mips-opc.c (dsll, dsra, dsrl): Added '>' cases for shift counts
5615 larger than 32. Moved dsxx32 variants first for disassembler.
5619 * z8kgen.c, z8k-opc.h: Add full lda information.
5623 * hppa-dis.c (print_insn_hppa): Do not emit a space after
5624 movb instructions. Any necessary space will be emitted by
5625 the code to handle nullification completers.
5629 * mips-opc.c: Moved l.d down so that it disassembles as ldc1.
5633 * alpha-opc.h: Add ldl_l, fix typo for ldq_u.
5634 * alpha-dis.c (print_insn_alpha): Add code for PAL_FORMAT_CODE.
5638 * mips-opc.c: Correct lwu opcode value (book had it wrong).
5642 * z8k-dis.c (FETCH_DATA): get just the right amount of data.
5643 (unpack_instr): Cope with ARG_IMM4M1 type instructions.
5647 * m88k-dis.c (m88kdis): comment change. Remove space after
5649 (printop): handle new arg types DEC and XREG for m88110.
5653 * hppa-dis.c (print_insn_hppa): Handle 'z' operand
5654 type for absolute branch addresses. Delete special
5655 "ble" and "be" code in 'W' operand code.
5659 * mips-opc.c: Set hazard information correctly for branch
5660 likely instructions.
5664 * alpha-dis.c (print_insn_alpha), alpha-opc.h: Fix bugs, use
5665 info->fprintf_func for printing and info->print_address_func for
5670 * mips-opc.c: Set INSN_TRAP for tXX instructions.
5675 Corrected second case of "b" for disassembler.
5679 * mips-dis.c, m88k-dis.c: Don't include libbfd.h. Changed calls
5680 to BFD swapping routines to correspond to BFD name changes.
5684 * mips-opc.c: Change div machine instruction to be z,s,t rather
5685 than s,t. Change div macro to be d,v,t rather than d,s,t.
5686 Likewise for divu, ddiv, ddivu. Added z,s,t case for drem, dremu,
5687 rem and remu which generates only the corresponding div
5688 instruction. This is for compatibility with the MIPS assembler,
5689 which only generates the simple machine instruction when an
5690 explicit destination of $0 is used.
5691 * mips-dis.c (print_insn_arg): Handle 'z' (always register zero).
5696 WR_31 hazard for bal, bgezal, bltzal.
5700 * hppa-dis.c (print_insn_hppa): Use print function
5701 from within the disassemble_info, not fprintf_filtered.
5705 * hppa-dis.c (print_insn_hppa): Handle '|' like '>'. (From Jeff
5710 * mips-opc.c ("absu"): Removed.
5715 * mips-opc.c: Added r6000 and r4000 instructions and macros.
5716 Changed hazard information to distinguish between memory load
5717 delays and coprocessor load delays.
5721 * mips-opc.c: li.d uses "T,L", not "S,F". Added li.s.
5725 * configure.in: Don't pass cpu to config.bfd.
5729 * m88k-dis.c (m88kdis): Make class unsigned.
5733 * alpha-dis.c (print_insn_alpha): One branch format case was
5734 missing the instruction name.
5738 * Makefile.in (ALL_MACHINES): Renamed from DIS_LIBS.
5739 Add the arch-specific auxiliary files.
5740 (OFILES): Remove the arch-specific auxiliary files
5741 and use BFD_MACHINES instead of DIS_LIBS.
5742 * configure.in: Set BFD_MACHINES based on --with-targets option.
5746 * mips-opc.c: Added lwc1 E,A(b) to go with lwc1 T,A(b). Similarly
5751 * sparc-opc.c: Change CONST to const to deal with gcc
5752 -Dconst=__const -traditional.
5757 coprocessor instructions out of #if 0, and made them use new
5762 * sparc-dis.c: Include ansidecl.h before opcodes/sparc.h.
5766 * sparc-opc.c: Add F_JSR, F_UNBR, or F_CONDBR flags to each branch
5767 instruction, for use by the disassembler.
5769 * sparc-dis.c (SEX): Add sign extension macro. Replace many
5770 hand-coded sign extensions that depended on 32-bit host ints.
5771 FIXME, we still depend on big-endian host bitfield ordering.
5772 (sparc_print_insn): Set the insn_info_valid field, and the
5773 other fields that describe the instruction being printed.
5777 * sparc-opc.c (call): Accept all 6 addressing modes valid for
5778 `jmp' instead of just one of them.
5782 * hppa-dis.c: Move floating registers from reg_names to fp_reg_names.
5783 (fput_fp_reg_r): Renamed from fput_reg_r.
5784 (fput_fp_reg): New function.
5785 (print_insn_hppa): Use fput_fp_reg{,_r} where appropriate.
5787 * hppa-dis.c (print_insn_hppa, cases 'a', 'd'): Print space afterwards.
5789 * hppa-dis.c (print_insn_hppa, case 'd'): Use GET_COND not GET_FIELD.
5793 * hppa-dis.c (print_insn_hppa): Use extract_5r_store for 'r'.
5795 * hppa-dis.c (print_insn_hppa, case '>'): If next character is 'n',
5796 don't output a space.
5798 * hppa-dis.c (float_format_names): 10 is undefined, and 11 is quad.
5802 * mips-opc.c: New file, containing opcode table from
5803 ../include/opcode/mips.h.
5804 * Makefile.in: Add it.
5808 * m88k-dis.c: New file, moved in from gdb and changed to use the
5809 new dis-asm.h disassembler interface.
5810 * Makefile.in (DIS_LIBS): Added m88k-dis.o.
5811 (m88k-dis.o): New target.
5815 * mips-dis.c (print_insn_arg, _print_insn_mips): Made pointer to
5816 argument string const char * to correspond to opcode/mips.h.
5820 * mips-dis.c: Updated to account for name changes in new version
5822 * Makefile.in: Added header file dependencies.
5826 * h8300-dis.c (bfd_h8_disassemble): Correct fetching of instruction.
5830 * m68k-dis.c (NEXTWORD, NEXTLONG): Use ((x) ^ 0x8000) - 0x8000 to sign
5831 extend, rather than shifts.
5835 * Makefile.in: Undo 15 June change.
5839 * m68k-dis.c (print_insn_arg): Change return value to byte count
5841 * m68k-dis.c: Re-write to detect invalid operands before
5842 printing anything, so we can handle this the same way we
5843 handle invalid opcodes.
5847 * sh-dis.c, sh-opc.h: Understand some more opcodes.
5851 * hppa-dis.c: Include <ansidecl.h> and sysdep.h before other
5856 * sparc-dis.c: Don't declare qsort, since sysdep.h might.
5858 * configure.in: Do make sysdep.h link.
5859 * Makefile.in: Search ../include. Don't search ../bfd.
5864 * hppa-dis.c: Fix typo. 'a' and 'd' were reversed.
5865 Do not print a space before the completers specified by
5870 * mips-dis.c: No longer need to bomb out if HOST_64_BIT is
5871 defined, since gdb has been fixed.
5874 * hppa-dis.c (print_insn_hppa): Last argument to fput_reg,
5875 fput_reg_r, fput_creg, fput_const, and fputs_filtered should
5876 be a *disassemble_info, not a *FILE.
5877 * hppa-dis.c: Support 'd', '!', and 'a'.
5878 * hppa-dis.c: Support 's' to extract a 2 bit space register.
5879 * hppa-dis.c: Delete cases which are no longer needed.
5883 * m68k-dis.c (print_insn_{m68k,arg}): Add MMU codes.
5887 * h8300-dis.c: New file, removed from bfd/cpu-h8300.c, with
5892 * Makefile.in (CSEARCH): Add -I../bfd for sysdep.h and bfd.h.
5893 * configure.in: No longer need to configure to get sysdep.h.
5898 * hppa-dis.c: Support 'I', 'J', and 'K' in output
5899 templates for 1.1 FP computational instructions.
5903 * h8500-dis.c (print_insn_h8500): Address argument is type
5905 * z8k-dis.c (print_insn_z8k, print_insn_z8001, print_insn_z8002):
5908 * h8500-opc.h (addr_class_type): No comma at end of enumerator.
5909 * sh-opc.h (sh_nibble_type, sh_arg_type): Ditto.
5911 * sparc-dis.c (compare_opcodes): Move static declaration to
5916 * sparc-dis.c (print_insn_sparc): Implement 'n' argument for unimp
5917 instruction, remove unimp hack from 'l' argument.
5921 * z8k-dis.c (fetch_data): Use unsigned char to make ancient gcc's
5927 * mips-dis.c (print_insn_arg): Handle 'C' for general coprocessor
5932 * hppa-dis.c: Include dis-asm.h before sysdep.h. Changed some
5933 arrays of string pointers to 2-d arrays of chars, to save
5938 * a29k-dis.c, alpha-dis.c, i960-dis.c, sparc-dis.c, z8k-dis.c:
5939 Cast second arg to read_memory_func to "bfd_byte *", as necessary.
5943 * hppa-dis.c: New file from Utah, adapted to new disassembler
5945 * Makefile.in: Include it.
5949 * sh-dis.c, sh-opc.h: New files.
5953 * alpha-dis.c, alpha-opc.h: New files.
5957 * mips-dis.c: Sign extend 'j' and 'b' arguments, delta is a signed
5962 * sparc-dis.c: Make "ta" the default trap instruction, "t" the alias.
5966 * a29k-dis.c, sparc-dis.c, sparc-opc.c: Use CONST rather than
5971 * sparc-dis.c: Use fprintf_func a few places where I forgot,
5972 and double percent signs a few places.
5974 * a29k-dis.c, i960-dis.c: New, merged from gdb and binutils.
5976 * i386-dis.c, m68k-dis.c, mips-dis.c, sparc-dis.c:
5977 Use info->print_address_func not print_address.
5979 * dis-buf.c (generic_print_address): New function.
5983 * Makefile.in: Add sparc-dis.c.
5984 sparc-dis.c: New file, merges binutils and gdb versions as follows:
5986 Add `add' instruction to the set that get checked
5987 for a preceding `sethi' in order to print an absolute address.
5988 * (print_insn): Disassembly prefers real instructions.
5989 (is_delayed_branch): Speed up.
5990 * sparc-opcode.h: Add ALIAS bit to aliases. Fix up opcode tables.
5991 Still missing some float ops, and needs testing.
5992 * sparc-pinsn.c (print_insn): Eliminate 'set' test, subsumed by
5993 F_ALIAS. Use printf, not fprintf, when not passing a file
5995 (compare_opcodes): Check that identical instructions have
5996 identical opcodes, complain otherwise.
5999 * Include reg_names.
6001 Use dis-asm.h/read_memory_func interface.
6005 * h8500-dis.c, i386-dis.c, m68k-dis.c, z8k-dis.c (fetch_data):
6006 deliberately return non-zero to setjmp from longjmp. Otherwise
6007 this code fails to compile.
6011 * m68k-dis.c: Fix prototype for fetch_arg().
6015 * dis-buf.c: New file, for new read_memory_func interface.
6016 Makefile.in (OFILES): Include it.
6017 m68k-dis.c, i386-dis.c, h8500-dis.c, mips-dis.c, z8k-dis.c:
6018 Use new read_memory_func interface.
6022 * h8500-dis.c (print_insn_h8500): Get sign of fp offsets right.
6023 * h8500-opc.h: Fix couple of opcodes.
6025 Wed Mar 24 02:03:36 1993 david d `zoo' zuhn (zoo at poseidon.cygnus.com)
6027 * Makefile.in: add dvi & installcheck targets
6031 * Makefile.in: Update for h8500-dis.c.
6035 * h8500-dis.c, h8500-opc.h: New files
6039 * mips-dis.c, z8k-dis.c: Converted to use interface defined in
6040 ../include/dis-asm.h.
6041 * m68k-dis.c: New file (merge of ../binutils/m68k-pinsn.c
6042 and ../gdb/m68k-pinsn.c).
6043 * i386-dis.c: New file (merge of ../binutils/i386-pinsn.c
6044 and ../gdb/i386-pinsn.c).
6045 * m68881-ext.c: New file. Moved definition of
6046 ext_format ext_format_68881 from ../gdb/m68k-tdep.c.
6047 * Makefile.in: Adjust for new files.
6049 * m68k-dis.c: Recognize '9' placement code, so (say) pflush
6050 can be dis-assembled.
6054 * mips-dis.c (print_insn_arg): Now returns void.
6058 * mips-dis.c (ansidecl.h): Include for benefit of sysdep.h
6059 files that use the macros.
6063 * mips-dis.c: New file, from gdb/mips-pinsn.c.
6064 * Makefile.in (DIS_LIBS): Added mips-dis.o.
6065 (CFILES): Added mips-dis.c.
6069 * z8k-dis.c (print_insn_z8001, print_insn_z8002): new routines
6070 * z8kgen.c, z8k-opc.h: fix sizes of some shifts.
6074 * Makefile.in: Improve *clean rules.
6075 * configure.in: Allow a default host.
6077 Tue Nov 17 19:53:54 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com)
6079 * Makefile.in: also use -I$(srcdir)/../bfd, since some sysdep
6080 files include other sysdep files
6084 * z8k-dis.c z8k-opc.h z8kgen.c: checkpoint
6088 * configure.in: For host support, use ../bfd/configure.host
6089 so it stays in sync with the ../bfd/hosts database.
6091 Thu Oct 1 23:38:54 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com)
6093 * configure.in: use cpu-vendor-os triple instead of nested cases
6097 * z8k-dis.c (unparse_instr): fix bug where opcode returned was
6098 *always* the wrong one.
6102 * z8kgen.c: added copyright info
6106 * z8k-dis.c (unparse_instr): prettier tabs
6107 * z8kgen.c -> z8k-opc.h: bug fixes in tables
6109 Fri Sep 25 12:50:32 1992 Stu Grossman (grossman at cygnus.com)
6111 * configure.in: Add ncr* configuration.
6112 * z8k-dis.c (struct instr_data_s): Make instr_asmsrc char to make
6113 picayune ANSI compilers happy.
6117 * configure.in (i386): Make i386 and i486 synonymous for now.
6118 * configure.in (i[34]86-*-sysv4): Add my_host definition.
6122 * Makefile.in (install): Fix typo.
6126 * Makefile.in (make): Remove obsolete crud.
6127 (sparc-opc.o): Avoid Sun Make VPATH bug.
6131 * Makefile.in: since there are no SUBDIRS, remove rule and
6132 references of subdir_do.
6136 * Makefile.in (install): Get the library name right here too.
6137 Don't install bfd.h, since it's unrelated to this library. No
6138 subdirs to recurse into, either.
6139 (CFILES): The source file has a .c suffix, not .o.
6141 * sparc-opc.c: New file, moved from BFD.
6142 * Makefile.in (OFILES): Build it.
6146 * z8k-dis.c: fixed forward refferences of some declarations.
6150 * Makefile.in: get the name of the library right
6154 * z8k-dis.c: knows how to disassemble z8k stuff
6155 * z8k-opc.h: new file full of z8000 opcodes
6159 version-control: never