1 /* m68k.c All the m68020 specific stuff in one convenient, huge,
2 slow to compile, easy to find file.
3 Copyright (C) 1987, 1991 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
27 /* note that this file includes real declarations and thus can only be included by one source file per executable. */
28 #include "m68k-opcode.h"
30 /* This variable contains the value to write out at the beginning of
31 the a.out file. The 2<<16 means that this is a 68020 file instead
32 of an old-style 68000 file */
34 long omagic = 2<<16|OMAGIC; /* Magic byte for header file */
39 /* This array holds the chars that always start a comment. If the
40 pre-processor is disabled, these aren't very useful */
41 const char comment_chars[] = "|";
43 /* This array holds the chars that only start a comment at the beginning of
44 a line. If the line seems to have the form '# 123 filename'
45 .line and .file directives will appear in the pre-processed output */
46 /* Note that input_file.c hand checks for '#' at the beginning of the
47 first line of the input file. This is because the compiler outputs
48 #NO_APP at the beginning of its output. */
49 /* Also note that comments like this one will always work. */
50 const char line_comment_chars[] = "#";
52 /* Chars that can be used to separate mant from exp in floating point nums */
53 const char EXP_CHARS[] = "eE";
55 /* Chars that mean this number is a floating point constant */
59 const char FLT_CHARS[] = "rRsSfFdDxXeEpP";
61 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
62 changed in read.c . Ideally it shouldn't have to know about it at all,
63 but nothing is ideal around here.
66 int md_reloc_size = 8; /* Size of relocation record */
68 /* Its an arbitrary name: This means I don't approve of it */
69 /* See flames below */
70 static struct obstack robyn;
72 #define TAB(x,y) (((x)<<2)+(y))
73 #define TABTYPE(xy) ((xy) >> 2)
86 /* Operands we can parse: (And associated modes)
92 reg: address or data register
93 areg: address register
94 apc: address register, PC, ZPC or empty string
97 sz: w or l if omitted, l assumed
98 scale: 1 2 4 or 8 if omitted, 1 assumed
100 7.4 IMMED #num --> NUM
101 0.? DREG dreg --> dreg
102 1.? AREG areg --> areg
103 2.? AINDR areg@ --> *(areg)
104 3.? AINC areg@+ --> *(areg++)
105 4.? ADEC areg@- --> *(--areg)
106 5.? AOFF apc@(numw) --> *(apc+numw) -- empty string and ZPC not allowed here
107 6.? AINDX apc@(num,reg:sz:scale) --> *(apc+num+reg*scale)
108 6.? AINDX apc@(reg:sz:scale) --> same, with num=0
109 6.? APODX apc@(num)@(num2,reg:sz:scale) --> *(*(apc+num)+num2+reg*scale)
110 6.? APODX apc@(num)@(reg:sz:scale) --> same, with num2=0
111 6.? AMIND apc@(num)@(num2) --> *(*(apc+num)+num2) (previous mode without an index reg)
112 6.? APRDX apc@(num,reg:sz:scale)@(num2) --> *(*(apc+num+reg*scale)+num2)
113 6.? APRDX apc@(reg:sz:scale)@(num2) --> same, with num=0
114 7.0 ABSL num:sz --> *(num)
115 num --> *(num) (sz L assumed)
116 *** MSCR otherreg --> Magic
118 5.? AOFF apc@(num) --> *(apc+num) -- empty string and ZPC not allowed here still
128 a1@(5,d2:w:1) @(45,d6:l:4)
133 #name@(numw) -->turn into PC rel mode
134 apc@(num8,reg:sz:scale) --> *(apc+num8+reg*scale)
160 short e_siz; /* 0== default 1==short/byte 2==word 3==long */
163 /* Internal form of an operand. */
165 char *error; /* Couldn't parse it */
166 enum operand_type mode; /* What mode this instruction is in. */
167 unsigned long reg; /* Base register */
168 struct m68k_exp *con1;
169 int ireg; /* Index register */
170 int isiz; /* 0==unspec 1==byte(?) 2==short 3==long */
171 int imul; /* Multipy ireg by this (1,2,4,or 8) */
172 struct m68k_exp *con2;
175 /* internal form of a 68020 instruction */
178 char *args; /* list of opcode info */
181 int numo; /* Number of shorts in opcode */
184 struct m68k_op operands[6];
186 int nexp; /* number of exprs in use */
187 struct m68k_exp exprs[4];
189 int nfrag; /* Number of frags we have to produce */
191 int fragoff; /* Where in the current opcode[] the frag ends */
197 int nrel; /* Num of reloc strucs in use */
205 } reloc[5]; /* Five is enough??? */
208 struct m68_it the_ins; /* the instruction being assembled */
211 /* Macros for adding things to the m68_it struct */
213 #define addword(w) the_ins.opcode[the_ins.numo++]=(w)
215 /* Like addword, but goes BEFORE general operands */
216 #define insop(w) {int z;\
217 for(z=the_ins.numo;z>opcode->m_codenum;--z)\
218 the_ins.opcode[z]=the_ins.opcode[z-1];\
219 for(z=0;z<the_ins.nrel;z++)\
220 the_ins.reloc[z].n+=2;\
221 the_ins.opcode[opcode->m_codenum]=w;\
226 #define add_exp(beg,end) (\
227 the_ins.exprs[the_ins.nexp].e_beg=beg,\
228 the_ins.exprs[the_ins.nexp].e_end=end,\
229 &the_ins.exprs[the_ins.nexp++]\
233 /* The numo+1 kludge is so we can hit the low order byte of the prev word. Blecch*/
234 #define add_fix(width,exp,pc_rel) {\
235 the_ins.reloc[the_ins.nrel].n= ((width)=='B') ? (the_ins.numo*2-1) : \
236 (((width)=='b') ? ((the_ins.numo-1)*2) : (the_ins.numo*2));\
237 the_ins.reloc[the_ins.nrel].add=adds((exp));\
238 the_ins.reloc[the_ins.nrel].sub=subs((exp));\
239 the_ins.reloc[the_ins.nrel].off=offs((exp));\
240 the_ins.reloc[the_ins.nrel].wid=width;\
241 the_ins.reloc[the_ins.nrel++].pcrel=pc_rel;\
244 #define add_frag(add,off,type) {\
245 the_ins.fragb[the_ins.nfrag].fragoff=the_ins.numo;\
246 the_ins.fragb[the_ins.nfrag].fadd=add;\
247 the_ins.fragb[the_ins.nfrag].foff=off;\
248 the_ins.fragb[the_ins.nfrag++].fragty=type;\
251 #define isvar(exp) ((exp) && (adds(exp) || subs(exp)))
253 #define seg(exp) ((exp)->e_exp.X_seg)
254 #define adds(exp) ((exp)->e_exp.X_add_symbol)
255 #define subs(exp) ((exp)->e_exp.X_subtract_symbol)
256 #define offs(exp) ((exp)->e_exp.X_add_number)
261 unsigned long m_opcode;
264 struct m68_incant *m_next;
267 #define getone(x) ((((x)->m_opcode)>>16)&0xffff)
268 #define gettwo(x) (((x)->m_opcode)&0xffff)
273 static char *crack_operand(char *str, struct m68k_op *opP);
274 static int get_num(struct m68k_exp *exp, int ok);
275 static int get_regs(int i, char *str, struct m68k_op *opP);
276 static int reverse_16_bits(int in);
277 static int reverse_8_bits(int in);
278 static int try_index(char **s, struct m68k_op *opP);
279 static void install_gen_operand(int mode, int val);
280 static void install_operand(int mode, int val);
281 static void s_bss(void);
282 static void s_data1(void);
283 static void s_data2(void);
284 static void s_even(void);
285 static void s_proc(void);
289 static char *crack_operand();
290 static int get_num();
291 static int get_regs();
292 static int reverse_16_bits();
293 static int reverse_8_bits();
294 static int try_index();
295 static void install_gen_operand();
296 static void install_operand();
298 static void s_data1();
299 static void s_data2();
300 static void s_even();
301 static void s_proc();
303 #endif /* __STDC__ */
305 /* BCC68000 is for patching in an extra jmp instruction for long offsets
306 on the 68000. The 68000 doesn't support long branches with branchs */
308 /* This table desribes how you change sizes for the various types of variable
309 size expressions. This version only supports two kinds. */
311 /* Note that calls to frag_var need to specify the maximum expansion needed */
312 /* This is currently 10 bytes for DBCC */
315 How far Forward this mode will reach:
316 How far Backward this mode will reach:
317 How many bytes this mode will add to the size of the frag
318 Which mode to go to if the offset won't fit in this one
322 { 1, 1, 0, 0 }, /* First entries aren't used */
323 { 1, 1, 0, 0 }, /* For no good reason except */
324 { 1, 1, 0, 0 }, /* that the VAX doesn't either */
327 { (127), (-128), 0, TAB(BRANCH,SHORT)},
328 { (32767), (-32768), 2, TAB(BRANCH,LONG) },
332 { 1, 1, 0, 0 }, /* FBRANCH doesn't come BYTE */
333 { (32767), (-32768), 2, TAB(FBRANCH,LONG)},
337 { 1, 1, 0, 0 }, /* PCREL doesn't come BYTE */
338 { (32767), (-32768), 2, TAB(PCREL,LONG)},
342 { (127), (-128), 0, TAB(BCC68000,SHORT)},
343 { (32767), (-32768), 2, TAB(BCC68000,LONG) },
344 { 0, 0, 6, 0 }, /* jmp long space */
347 { 1, 1, 0, 0 }, /* DBCC doesn't come BYTE */
348 { (32767), (-32768), 2, TAB(DBCC,LONG) },
349 { 0, 0, 10, 0 }, /* bra/jmp long space */
352 { 1, 1, 0, 0 }, /* PCLEA doesn't come BYTE */
353 { 32767, -32768, 2, TAB(PCLEA,LONG) },
359 /* These are the machine dependent pseudo-ops. These are included so
360 the assembler can work on the output from the SUN C compiler, which
364 /* This table describes all the machine specific pseudo-ops the assembler
365 has to support. The fields are:
366 pseudo-op name without dot
367 function to call to execute this pseudo-op
368 Integer arg to pass to the function
370 const pseudo_typeS md_pseudo_table[] = {
371 { "data1", s_data1, 0 },
372 { "data2", s_data2, 0 },
374 { "even", s_even, 0 },
375 { "skip", s_space, 0 },
376 { "proc", s_proc, 0 },
381 /* #define isbyte(x) ((x)>=-128 && (x)<=127) */
382 /* #define isword(x) ((x)>=-32768 && (x)<=32767) */
384 #define issbyte(x) ((x)>=-128 && (x)<=127)
385 #define isubyte(x) ((x)>=0 && (x)<=255)
386 #define issword(x) ((x)>=-32768 && (x)<=32767)
387 #define isuword(x) ((x)>=0 && (x)<=65535)
389 #define isbyte(x) ((x)>=-128 && (x)<=255)
390 #define isword(x) ((x)>=-32768 && (x)<=65535)
391 #define islong(x) (1)
393 extern char *input_line_pointer;
398 /* DATA and ADDR have to be contiguous, so that reg-DATA gives 0-7==data reg,
399 8-15==addr reg for operands that take both types */
400 #define DATA 1 /* 1- 8 == data registers 0-7 */
401 #define ADDR (DATA+8) /* 9-16 == address regs 0-7 */
402 #define FPREG (ADDR+8) /* 17-24 Eight FP registers */
403 #define COPNUM (FPREG+8) /* 25-32 Co-processor #1-#8 */
405 #define PC (COPNUM+8) /* 33 Program counter */
406 #define ZPC (PC+1) /* 34 Hack for Program space, but 0 addressing */
407 #define SR (ZPC+1) /* 35 Status Reg */
408 #define CCR (SR+1) /* 36 Condition code Reg */
410 /* These have to be in order for the movec instruction to work. */
411 #define USP (CCR+1) /* 37 User Stack Pointer */
412 #define ISP (USP+1) /* 38 Interrupt stack pointer */
413 #define SFC (ISP+1) /* 39 */
414 #define DFC (SFC+1) /* 40 */
415 #define CACR (DFC+1) /* 41 */
416 #define VBR (CACR+1) /* 42 */
417 #define CAAR (VBR+1) /* 43 */
418 #define MSP (CAAR+1) /* 44 */
420 #define FPI (MSP+1) /* 45 */
421 #define FPS (FPI+1) /* 46 */
422 #define FPC (FPS+1) /* 47 */
424 * these defines should be in m68k.c but
425 * i put them here to keep all the m68851 stuff
427 * JF--Make sure these #s don't clash with the ones in m68k.c
430 #define TC (FPC+1) /* 48 */
431 #define DRP (TC+1) /* 49 */
432 #define SRP (DRP+1) /* 50 */
433 #define CRP (SRP+1) /* 51 */
434 #define CAL (CRP+1) /* 52 */
435 #define VAL (CAL+1) /* 53 */
436 #define SCC (VAL+1) /* 54 */
437 #define AC (SCC+1) /* 55 */
438 #define BAD (AC+1) /* 56,57,58,59, 60,61,62,63 */
439 #define BAC (BAD+8) /* 64,65,66,67, 68,69,70,71 */
440 #define PSR (BAC+8) /* 72 */
441 #define PCSR (PSR+1) /* 73 */
444 /* Note that COPNUM==processor #1 -- COPNUM+7==#8, which stores as 000 */
449 /* JF these tables here are for speed at the expense of size */
450 /* You can replace them with the #if 0 versions if you really
451 need space and don't mind it running a bit slower */
453 static char mklower_table[256];
454 #define mklower(c) (mklower_table[(unsigned char)(c)])
455 static char notend_table[256];
456 static char alt_notend_table[256];
457 #define notend(s) ( !(notend_table[(unsigned char)(*s)] || (*s==':' &&\
458 alt_notend_table[(unsigned char)(s[1])])))
461 #define mklower(c) (isupper(c) ? tolower(c) : c)
465 /* JF modified this to handle cases where the first part of a symbol name
466 looks like a register */
479 c1=mklower(ccp[0][0]);
480 #ifdef REGISTER_PREFIX
481 if(c1!=REGISTER_PREFIX)
483 c1=mklower(ccp[0][1]);
484 c2=mklower(ccp[0][2]);
485 c3=mklower(ccp[0][3]);
486 c4=mklower(ccp[0][4]);
488 c2=mklower(ccp[0][1]);
489 c3=mklower(ccp[0][2]);
490 c4=mklower(ccp[0][3]);
494 if(c2>='0' && c2<='7') {
499 else if (c2 == 'c') {
509 if (c4 >= '0' && c4 <= '7') {
511 ret = BAD + c4 - '0';
515 if (c4 >= '0' && c4 <= '7') {
517 ret = BAC + c4 - '0';
525 if (c2 == 'a' && c3 == 'l') {
530 /* This supports both CCR and CC as the ccr reg. */
531 if(c2=='c' && c3=='r') {
537 } else if(c2=='a' && (c3=='a' || c3=='c') && c4=='r') {
539 ret = c3=='a' ? CAAR : CACR;
542 else if (c2 == 'r' && c3 == 'p') {
549 if(c2>='0' && c2<='7') {
552 } else if(c2=='f' && c3=='c') {
557 else if (c2 == 'r' && c3 == 'p') {
565 if(c3>='0' && c3<='7') {
574 n= (c4 == 'r' ? 4 : 3);
577 n= (c4 == 'r' ? 4 : 3);
583 if(c2=='s' && c3=='p') {
589 if(c2=='s' && c3=='p') {
597 if(c3 == 's' && c4=='r') {
608 else if (c2 == 's' && c3 == 'r') {
616 if (c2 == 'c' && c3 == 'c') {
619 } else if (c2 == 'r' && c3 == 'p') {
630 } else if(c2=='f' && c3=='c') {
644 if(c2=='s' && c3=='p') {
651 if (c2 == 'a' && c3 == 'l') {
656 if(c2=='b' && c3=='r') {
662 if(c2=='p' && c3=='c') {
671 #ifdef REGISTER_PREFIX
674 if(isalnum(ccp[0][n]) || ccp[0][n]=='_')
683 #define SKIP_WHITE() { str++; if(*str==' ') str++;}
688 register struct m68k_op *opP;
696 /* Find the end of the string */
699 opP->error="Missing operand";
702 for(strend=str;*strend;strend++)
706 /* Guess what: A constant. Shar and enjoy */
709 opP->con1=add_exp(str,strend);
713 i=m68k_reg_parse(&str);
714 if((i==FAIL || *str!='\0') && *str!='@') {
717 if(i!=FAIL && (*str=='/' || *str=='-')) {
719 return get_regs(i,str,opP);
721 if ((stmp=strchr(str,'@')) != '\0') {
722 opP->con1=add_exp(str,stmp-1);
728 if(*stmp++!='(' || *strend--!=')') {
729 opP->error="Malformed operand";
732 i=try_index(&stmp,opP);
733 opP->con2=add_exp(stmp,strend);
734 if(i==FAIL) opP->mode=AMIND;
735 else opP->mode=APODX;
739 opP->con1=add_exp(str,strend);
744 if(i>=DATA+0 && i<=DATA+7)
746 else if(i>=ADDR+0 && i<=ADDR+7)
752 if((i<ADDR+0 || i>ADDR+7) && i!=PC && i!=ZPC && i!=FAIL) { /* Can't indirect off non address regs */
753 opP->error="Invalid indirect register";
773 opP->error="Junk after indirect";
776 /* Some kind of indexing involved. Lets find out how bad it is */
777 i=try_index(&str,opP);
778 /* Didn't start with an index reg, maybe its offset or offset,reg */
786 opP->error="Missing )";
788 case ',': i=0; break;
789 case '(': i++; break;
790 case ')': --i; break;
793 /* if(str[-3]==':') {
810 opP->error="Specified size isn't :w or :l";
813 opP->con1=add_exp(beg_str,str-4);
814 opP->con1->e_siz=siz;
816 opP->con1=add_exp(beg_str,str-2);
817 /* Should be offset,reg */
819 i=try_index(&str,opP);
821 opP->error="Malformed index reg";
826 /* We've now got offset) offset,reg) or reg) */
829 /* Th-the-thats all folks */
830 if(opP->reg==FAIL) opP->mode=AINDX; /* Other form of indirect */
831 else if(opP->ireg==FAIL) opP->mode=AOFF;
832 else opP->mode=AINDX;
835 /* Next thing had better be another @ */
836 if(*str!='@' || str[1]!='(') {
837 opP->error="junk after indirect";
841 if(opP->ireg!=FAIL) {
843 i=try_index(&str,opP);
845 opP->error="Two index registers! not allowed!";
849 i=try_index(&str,opP);
857 opP->error="Missing )";
859 case ',': i=0; break;
860 case '(': i++; break;
861 case ')': --i; break;
864 opP->con2=add_exp(beg_str,str-2);
866 if(opP->ireg!=FAIL) {
867 opP->error="Can't have two index regs";
870 i=try_index(&str,opP);
872 opP->error="malformed index reg";
876 } else if(opP->ireg!=FAIL)
883 opP->error="Junk after indirect";
889 static int try_index(s,opP)
895 #define SKIP_W() { ss++; if(*ss==' ') ss++;}
899 i=m68k_reg_parse(&ss);
900 if(!(i>=DATA+0 && i<=ADDR+7)) { /* if i is not DATA or ADDR reg */
914 opP->error="Missing : in index register";
929 opP->error="Index register size spec not :w or :l";
944 opP->error="index multiplier not 1, 2, 4 or 8";
951 opP->error="Missing )";
960 #ifdef TEST1 /* TEST1 tests m68k_ip_op(), which parses operands */
964 struct m68k_op thark;
969 bzero(&thark,sizeof(thark));
970 if(!m68k_ip_op(buf,&thark)) printf("FAIL:");
972 printf("op1 error %s in %s\n",thark.error,buf);
973 printf("mode %d, reg %d, ",thark.mode,thark.reg);
975 printf("Constant: '%.*s',",1+thark.e_const-thark.b_const,thark.b_const);
976 printf("ireg %d, isiz %d, imul %d ",thark.ireg,thark.isiz,thark.imul);
978 printf("Iadd: '%.*s'",1+thark.e_iadd-thark.b_iadd,thark.b_iadd);
987 static struct hash_control* op_hash = NULL; /* handle of the OPCODE hash table
988 NULL means any use before m68_ip_begin()
995 * This converts a string into a 68k instruction.
996 * The string must be a bare single instruction in sun format
997 * with RMS-style 68020 indirects
1000 * It provides some error messages: at most one fatal error message (which
1001 * stops the scan) and at most one warning message for each operand.
1002 * The 68k instruction is returned in exploded form, since we have no
1003 * knowledge of how you parse (or evaluate) your expressions.
1004 * We do however strip off and decode addressing modes and operation
1007 * This function's value is a string. If it is not "" then an internal
1008 * logic error was found: read this code to assign meaning to the string.
1009 * No argument string should generate such an error string:
1010 * it means a bug in our code, not in the user's text.
1012 * You MUST have called m86_ip_begin() once and m86_ip_end() never before using
1016 /* JF this function no longer returns a useful value. Sorry */
1022 register struct m68k_op *opP;
1023 register struct m68_incant *opcode;
1025 register int tmpreg,
1034 char *crack_operand();
1035 LITTLENUM_TYPE words[6];
1036 LITTLENUM_TYPE *wordp;
1038 if (*instring == ' ')
1039 instring++; /* skip leading whitespace */
1041 /* Scan up to end of operation-code, which MUST end in end-of-string
1042 or exactly 1 space. */
1043 for (p = instring; *p != '\0'; p++)
1048 if (p == instring) {
1049 the_ins.error = "No operator";
1050 the_ins.opcode[0] = NULL;
1051 /* the_ins.numo=1; */
1055 /* p now points to the end of the opcode name, probably whitespace.
1056 make sure the name is null terminated by clobbering the whitespace,
1057 look it up in the hash table, then fix it back. */
1060 opcode = (struct m68_incant *)hash_find (op_hash, instring);
1063 if (opcode == NULL) {
1064 the_ins.error = "Unknown operator";
1065 the_ins.opcode[0] = NULL;
1066 /* the_ins.numo=1; */
1070 /* found a legitimate opcode, start matching operands */
1071 for(opP= &the_ins.operands[0];*p;opP++) {
1072 p = crack_operand (p, opP);
1074 the_ins.error=opP->error;
1079 opsfound=opP- &the_ins.operands[0];
1080 /* This ugly hack is to support the floating pt opcodes in their standard form */
1081 /* Essentially, we fake a first enty of type COP#1 */
1082 if(opcode->m_operands[0]=='I') {
1085 for(n=opsfound;n>0;--n)
1086 the_ins.operands[n]=the_ins.operands[n-1];
1088 /* bcopy((char *)(&the_ins.operands[0]),(char *)(&the_ins.operands[1]),opsfound*sizeof(the_ins.operands[0])); */
1089 bzero((char *)(&the_ins.operands[0]),sizeof(the_ins.operands[0]));
1090 the_ins.operands[0].mode=MSCR;
1091 the_ins.operands[0].reg=COPNUM; /* COP #1 */
1094 /* We've got the operands. Find an opcode that'll
1097 if(opsfound!=opcode->m_opnum)
1099 else for(s=opcode->m_operands,opP= &the_ins.operands[0];*s && !losing;s+=2,opP++) {
1100 /* Warning: this switch is huge! */
1101 /* I've tried to organize the cases into this order:
1102 non-alpha first, then alpha by letter. lower-case goes directly
1103 before uppercase counterpart. */
1104 /* Code with multiple case ...: gets sorted by the lowest case ...
1105 it belongs to. I hope this makes sense. */
1108 if(opP->mode==MSCR || opP->mode==IMMED ||
1109 opP->mode==DREG || opP->mode==AREG || opP->mode==AINC || opP->mode==ADEC || opP->mode==REGLST)
1114 if(opP->mode!=IMMED)
1119 t=get_num(opP->con1,80);
1120 if(s[1]=='b' && !isbyte(t))
1122 else if(s[1]=='w' && !isword(t))
1129 if(opP->mode!=IMMED)
1134 if(opP->mode==MSCR || opP->mode==AREG ||
1135 opP->mode==IMMED || opP->reg==PC || opP->reg==ZPC || opP->mode==REGLST)
1140 if(opP->mode==MSCR || opP->reg==PC ||
1141 opP->reg==ZPC || opP->mode==REGLST)
1147 if(opP->mode==MSCR || opP->mode==DREG ||
1148 opP->mode==AREG || opP->mode==IMMED || opP->reg==PC || opP->reg==ZPC ||
1149 opP->mode==AINC || opP->mode==ADEC || opP->mode==REGLST)
1154 if(opP->mode==MSCR || opP->mode==REGLST)
1169 if(opP->mode==MSCR || opP->mode==AREG ||
1170 opP->mode==AINC || opP->mode==ADEC || opP->mode==IMMED || opP->mode==REGLST)
1175 if(opP->mode==MSCR || opP->mode==AREG || opP->mode==REGLST)
1180 if(opP->mode==MSCR || opP->mode==AREG ||
1181 opP->mode==AINC || opP->mode==ADEC || opP->mode==IMMED || opP->reg==PC ||
1182 opP->reg==ZPC || opP->mode==REGLST)
1187 if(opP->mode==MSCR || opP->mode==AREG ||
1188 opP->mode==IMMED || opP->mode==REGLST)
1192 case '~': /* For now! (JF FOO is this right?) */
1193 if(opP->mode==MSCR || opP->mode==DREG ||
1194 opP->mode==AREG || opP->mode==IMMED || opP->reg==PC || opP->reg==ZPC || opP->mode==REGLST)
1209 if(opP->mode!=MSCR || opP->reg!=CCR)
1213 case 'd': /* FOO This mode is a KLUDGE!! */
1214 if(opP->mode!=AOFF && (opP->mode!=ABSL ||
1215 opP->con1->e_beg[0]!='(' || opP->con1->e_end[0]!=')'))
1225 if(opP->mode!=MSCR || opP->reg<(FPREG+0) || opP->reg>(FPREG+7))
1230 if(opP->mode!=MSCR || opP->reg<COPNUM ||
1236 if(opP->mode!=MSCR || opP->reg<USP || opP->reg>MSP)
1241 if(opP->mode!=IMMED)
1247 if(opP->mode==DREG || opP->mode==AREG || opP->mode==FPREG) {
1252 opP->reg=1<<(opP->reg-DATA);
1254 } else if(opP->mode!=REGLST) {
1256 } else if(s[1]=='8' && opP->reg&0x0FFffFF)
1258 else if(s[1]=='3' && opP->reg&0x7000000)
1263 if(opP->mode!=IMMED)
1268 t=get_num(opP->con1,80);
1269 if(!issbyte(t) || isvar(opP->con1))
1275 if(opP->mode!=DREG && opP->mode!=IMMED)
1280 if(opP->mode!=IMMED)
1285 t=get_num(opP->con1,80);
1286 if(t<1 || t>8 || isvar(opP->con1))
1292 if(opP->mode!=DREG && opP->mode!=AREG)
1297 if(opP->mode!=MSCR || !(opP->reg==FPI || opP->reg==FPS || opP->reg==FPC))
1302 if(opP->mode!=MSCR || opP->reg!=SR)
1307 if(opP->mode!=MSCR || opP->reg!=USP)
1311 /* JF these are out of order. We could put them
1312 in order if we were willing to put up with
1313 bunches of #ifdef m68851s in the code */
1315 /* Memory addressing mode used by pflushr */
1317 if(opP->mode==MSCR || opP->mode==DREG ||
1318 opP->mode==AREG || opP->mode==REGLST)
1323 if (opP->mode != MSCR || (opP->reg != SFC && opP->reg != DFC))
1328 if (opP->mode != MSCR || (opP->reg != TC && opP->reg != CAL &&
1329 opP->reg != VAL && opP->reg != SCC && opP->reg != AC))
1334 if (opP->reg != VAL)
1339 if (opP->mode != MSCR || (opP->reg != DRP && opP->reg != SRP &&
1345 if (opP->mode != MSCR ||
1346 (!(opP->reg >= BAD && opP->reg <= BAD+7) &&
1347 !(opP->reg >= BAC && opP->reg <= BAC+7)))
1352 if (opP->reg != PSR)
1357 if (opP->reg != PCSR)
1362 as_fatal("Internal error: Operand mode %c unknown in line %s of file \"%s\"",
1363 *s, __LINE__, __FILE__);
1368 opcode=opcode->m_next;
1369 if(!opcode) { /* Fell off the end */
1370 the_ins.error="instruction/operands mismatch";
1375 the_ins.args=opcode->m_operands;
1376 the_ins.numargs=opcode->m_opnum;
1377 the_ins.numo=opcode->m_codenum;
1378 the_ins.opcode[0]=getone(opcode);
1379 the_ins.opcode[1]=gettwo(opcode);
1381 for(s=the_ins.args,opP= &the_ins.operands[0];*s;s+=2,opP++) {
1382 /* This switch is a doozy.
1383 What the first step; its a big one! */
1401 tmpreg=0x3c; /* 7.4 */
1402 if (strchr("bwl",s[1])) nextword=get_num(opP->con1,80);
1403 else nextword=nextword=get_num(opP->con1,0);
1404 if(isvar(opP->con1))
1405 add_fix(s[1],opP->con1,0);
1408 if(!isbyte(nextword))
1409 opP->error="operand out of range";
1414 if(!isword(nextword))
1415 opP->error="operand out of range";
1420 addword(nextword>>16);
1442 as_fatal("Internal error: Can't decode %c%c in line %s of file \"%s\"",
1443 *s, s[1], __LINE__, __FILE__);
1448 /* We gotta put out some float */
1449 if(seg(opP->con1)!=SEG_BIG) {
1450 int_to_gen(nextword);
1451 gen_to_words(words,baseo,(long int)outro);
1452 for(wordp=words;baseo--;wordp++)
1456 if(offs(opP->con1)>0) {
1457 as_warn("Bignum assumed to be binary bit-pattern");
1458 if(offs(opP->con1)>baseo) {
1459 as_warn("Bignum too big for %c format; truncated",s[1]);
1460 offs(opP->con1)=baseo;
1462 baseo-=offs(opP->con1);
1463 for(wordp=generic_bignum+offs(opP->con1)-1;offs(opP->con1)--;--wordp)
1469 gen_to_words(words,baseo,(long)outro);
1470 for (wordp=words;baseo--;wordp++)
1474 tmpreg=opP->reg-DATA; /* 0.dreg */
1477 tmpreg=0x08+opP->reg-ADDR; /* 1.areg */
1480 tmpreg=0x10+opP->reg-ADDR; /* 2.areg */
1483 tmpreg=0x20+opP->reg-ADDR; /* 4.areg */
1486 tmpreg=0x18+opP->reg-ADDR; /* 3.areg */
1490 nextword=get_num(opP->con1,80);
1491 /* Force into index mode. Hope this works */
1493 /* We do the first bit for 32-bit displacements,
1494 and the second bit for 16 bit ones. It is
1495 possible that we should make the default be
1496 WORD instead of LONG, but I think that'd
1497 break GCC, so we put up with a little
1498 inefficiency for the sake of working output.
1501 if( !issword(nextword)
1502 || ( isvar(opP->con1)
1503 && ( ( opP->con1->e_siz==0
1504 && flagseen['l']==0)
1505 || opP->con1->e_siz==3))) {
1508 tmpreg=0x3B; /* 7.3 */
1510 tmpreg=0x30+opP->reg-ADDR; /* 6.areg */
1511 if(isvar(opP->con1)) {
1513 add_frag(adds(opP->con1),
1515 TAB(PCLEA,SZ_UNDEF));
1519 add_fix('l',opP->con1,1);
1523 addword(nextword>>16);
1526 tmpreg=0x3A; /* 7.2 */
1528 tmpreg=0x28+opP->reg-ADDR; /* 5.areg */
1530 if(isvar(opP->con1)) {
1532 add_fix('w',opP->con1,1);
1534 add_fix('w',opP->con1,0);
1544 baseo=get_num(opP->con1,80);
1545 outro=get_num(opP->con2,80);
1546 /* Figure out the 'addressing mode' */
1547 /* Also turn on the BASE_DISABLE bit, if needed */
1548 if(opP->reg==PC || opP->reg==ZPC) {
1549 tmpreg=0x3b; /* 7.3 */
1552 } else if(opP->reg==FAIL) {
1554 tmpreg=0x30; /* 6.garbage */
1555 } else tmpreg=0x30+opP->reg-ADDR; /* 6.areg */
1557 siz1= (opP->con1) ? opP->con1->e_siz : 0;
1558 siz2= (opP->con2) ? opP->con2->e_siz : 0;
1560 /* Index register stuff */
1561 if(opP->ireg>=DATA+0 && opP->ireg<=ADDR+7) {
1562 nextword|=(opP->ireg-DATA)<<12;
1564 if(opP->isiz==0 || opP->isiz==3)
1568 case 2: nextword|=0x200; break;
1569 case 4: nextword|=0x400; break;
1570 case 8: nextword|=0x600; break;
1574 GET US OUT OF HERE! */
1576 /* Must be INDEX, with an index
1577 register. Address register
1578 cannot be ZERO-PC, and either
1579 :b was forced, or we know
1581 if( opP->mode==AINDX
1586 && !isvar(opP->con1)))) {
1587 nextword +=baseo&0xff;
1589 if(isvar(opP->con1))
1590 add_fix('B',opP->con1,0);
1594 nextword|=0x40; /* No index reg */
1596 /* It aint simple */
1598 /* If the guy specified a width, we assume that
1599 it is wide enough. Maybe it isn't. Ifso, we lose
1603 if(isvar(opP->con1) || !issword(baseo)) {
1614 as_warn("Byte dispacement won't work. Defaulting to :w");
1623 /* Figure out innner displacement stuff */
1624 if(opP->mode!=AINDX) {
1627 if(isvar(opP->con2) || !issword(outro)) {
1638 as_warn("Byte dispacement won't work. Defaulting to :w");
1646 if(opP->mode==APODX) nextword|=0x04;
1647 else if(opP->mode==AMIND) nextword|=0x40;
1651 if(isvar(opP->con1)) {
1652 if(opP->reg==PC || opP->reg==ZPC) {
1653 add_fix(siz1==3 ? 'l' : 'w',opP->con1,1);
1654 opP->con1->e_exp.X_add_number+=6;
1656 add_fix(siz1==3 ? 'l' : 'w',opP->con1,0);
1663 if(isvar(opP->con2)) {
1664 if(opP->reg==PC || opP->reg==ZPC) {
1665 add_fix(siz2==3 ? 'l' : 'w',opP->con2,1);
1666 opP->con1->e_exp.X_add_number+=6;
1668 add_fix(siz2==3 ? 'l' : 'w',opP->con2,0);
1678 nextword=get_num(opP->con1,80);
1679 switch(opP->con1->e_siz) {
1681 as_warn("Unknown size for absolute reference");
1683 if(!isvar(opP->con1) && issword(offs(opP->con1))) {
1684 tmpreg=0x38; /* 7.0 */
1688 /* Don't generate pc relative code
1689 on 68010 and 68000 */
1690 if(isvar(opP->con1) &&
1692 seg(opP->con1)==SEG_TEXT &&
1693 now_seg==SEG_TEXT &&
1695 !strchr("~%&$?", s[0])) {
1696 tmpreg=0x3A; /* 7.2 */
1697 add_frag(adds(opP->con1),
1699 TAB(PCREL,SZ_UNDEF));
1702 case 3: /* Fall through into long */
1703 if(isvar(opP->con1))
1704 add_fix('l',opP->con1,0);
1706 tmpreg=0x39; /* 7.1 mode */
1707 addword(nextword>>16);
1712 if(isvar(opP->con1))
1713 add_fix('w',opP->con1,0);
1715 tmpreg=0x38; /* 7.0 mode */
1722 as_bad("unknown/incorrect operand");
1725 install_gen_operand(s[1],tmpreg);
1730 switch(s[1]) { /* JF: I hate floating point! */
1745 tmpreg=get_num(opP->con1,tmpreg);
1746 if(isvar(opP->con1))
1747 add_fix(s[1],opP->con1,0);
1749 case 'b': /* Danger: These do no check for
1750 certain types of overflow.
1753 opP->error="out of range";
1755 if(isvar(opP->con1))
1756 the_ins.reloc[the_ins.nrel-1].n=(opcode->m_codenum)*2;
1760 opP->error="out of range";
1762 if(isvar(opP->con1))
1763 the_ins.reloc[the_ins.nrel-1].n=(opcode->m_codenum)*2;
1766 insop(tmpreg); /* Because of the way insop works, we put these two out backwards */
1768 if(isvar(opP->con1))
1769 the_ins.reloc[the_ins.nrel-1].n=(opcode->m_codenum)*2;
1775 install_operand(s[1],tmpreg);
1778 as_fatal("Internal error: Unknown mode #%c in line %s of file \"%s\"", s[1], __LINE__, __FILE__);
1785 install_operand(s[1],opP->reg-ADDR);
1789 tmpreg=get_num(opP->con1,80);
1792 /* Needs no offsetting */
1793 add_fix('B',opP->con1,1);
1796 /* Offset the displacement to be relative to byte disp location */
1797 opP->con1->e_exp.X_add_number+=2;
1798 add_fix('w',opP->con1,1);
1803 if(flagseen['m']) /* 68000 or 010 */
1804 as_warn("Can't use long branches on 68000/68010");
1805 the_ins.opcode[the_ins.numo-1]|=0xff;
1806 /* Offset the displacement to be relative to byte disp location */
1807 opP->con1->e_exp.X_add_number+=4;
1808 add_fix('l',opP->con1,1);
1813 if(subs(opP->con1)) /* We can't relax it */
1816 /* This could either be a symbol, or an
1817 absolute address. No matter, the
1818 frag hacking will finger it out.
1819 Not quite: it can't switch from
1820 BRANCH to BCC68000 for the case
1821 where opnd is absolute (it needs
1822 to use the 68000 hack since no
1823 conditional abs jumps). */
1825 (flagseen['m'] || (0==adds(opP->con1)))
1826 && (the_ins.opcode[0] >= 0x6200) &&
1827 (the_ins.opcode[0] <= 0x6f00)) {
1828 add_frag(adds(opP->con1),offs(opP->con1),TAB(BCC68000,SZ_UNDEF));
1830 add_frag(adds(opP->con1),offs(opP->con1),TAB(BRANCH,SZ_UNDEF));
1834 if(isvar(opP->con1)) {
1835 /* check for DBcc instruction */
1836 if ((the_ins.opcode[0] & 0xf0f8) ==0x50c8) {
1837 /* size varies if patch */
1838 /* needed for long form */
1839 add_frag(adds(opP->con1),offs(opP->con1),TAB(DBCC,SZ_UNDEF));
1844 opP->con1->e_exp.X_add_number+=2;
1845 add_fix('w',opP->con1,1);
1849 case 'C': /* Fixed size LONG coproc branches */
1850 the_ins.opcode[the_ins.numo-1]|=0x40;
1851 /* Offset the displacement to be relative to byte disp location */
1852 /* Coproc branches don't have a byte disp option, but they are
1853 compatible with the ordinary branches, which do... */
1854 opP->con1->e_exp.X_add_number+=4;
1855 add_fix('l',opP->con1,1);
1859 case 'c': /* Var size Coprocesssor branches */
1860 if(subs(opP->con1)) {
1861 add_fix('l',opP->con1,1);
1862 add_frag((symbolS *)0,(long)0,TAB(FBRANCH,LONG));
1863 } else if(adds(opP->con1)) {
1864 add_frag(adds(opP->con1),offs(opP->con1),TAB(FBRANCH,SZ_UNDEF));
1866 /* add_frag((symbolS *)0,offs(opP->con1),TAB(FBRANCH,SHORT)); */
1867 the_ins.opcode[the_ins.numo-1]|=0x40;
1868 add_fix('l',opP->con1,1);
1874 as_fatal("Internal error: operand type B%c unknown in line %s of file \"%s\"",
1875 s[1], __LINE__, __FILE__);
1879 case 'C': /* Ignore it */
1882 case 'd': /* JF this is a kludge */
1883 if(opP->mode==AOFF) {
1884 install_operand('s',opP->reg-ADDR);
1888 tmpP=opP->con1->e_end-2;
1890 opP->con1->e_end-=4; /* point to the , */
1891 baseo=m68k_reg_parse(&tmpP);
1892 if(baseo<ADDR+0 || baseo>ADDR+7) {
1893 as_bad("Unknown address reg, using A0");
1896 install_operand('s',baseo);
1898 tmpreg=get_num(opP->con1,80);
1899 if(!issword(tmpreg)) {
1900 as_warn("Expression out of range, using 0");
1907 install_operand(s[1],opP->reg-DATA);
1911 install_operand(s[1],opP->reg-FPREG);
1915 tmpreg=1+opP->reg-COPNUM;
1918 install_operand(s[1],tmpreg);
1921 case 'J': /* JF foo */
1950 install_operand(s[1],tmpreg);
1954 tmpreg=get_num(opP->con1,55);
1955 install_operand(s[1],tmpreg&0x7f);
1961 if(tmpreg&0x7FF0000)
1962 as_bad("Floating point register in register list");
1963 insop(reverse_16_bits(tmpreg));
1965 if(tmpreg&0x700FFFF)
1966 as_bad("Wrong register in floating-point reglist");
1967 install_operand(s[1],reverse_8_bits(tmpreg>>16));
1974 if(tmpreg&0x7FF0000)
1975 as_bad("Floating point register in register list");
1977 } else if(s[1]=='8') {
1978 if(tmpreg&0x0FFFFFF)
1979 as_bad("incorrect register in reglist");
1980 install_operand(s[1],tmpreg>>24);
1982 if(tmpreg&0x700FFFF)
1983 as_bad("wrong register in floating-point reglist");
1985 install_operand(s[1],tmpreg>>16);
1990 install_operand(s[1],get_num(opP->con1,60));
1994 tmpreg= (opP->mode==DREG)
1995 ? 0x20+opP->reg-DATA
1996 : (get_num(opP->con1,40)&0x1F);
1997 install_operand(s[1],tmpreg);
2001 tmpreg=get_num(opP->con1,10);
2004 install_operand(s[1],tmpreg);
2008 /* This depends on the fact that ADDR registers are
2009 eight more than their corresponding DATA regs, so
2010 the result will have the ADDR_REG bit set */
2011 install_operand(s[1],opP->reg-DATA);
2015 if(opP->reg==FPI) tmpreg=0x1;
2016 else if(opP->reg==FPS) tmpreg=0x2;
2017 else if(opP->reg==FPC) tmpreg=0x4;
2019 install_operand(s[1],tmpreg);
2022 case 'S': /* Ignore it */
2026 install_operand(s[1],get_num(opP->con1,30));
2029 case 'U': /* Ignore it */
2033 /* JF: These are out of order, I fear. */
2045 install_operand(s[1],tmpreg);
2068 install_operand(s[1],tmpreg);
2072 if (opP->reg == VAL)
2091 install_operand(s[1],tmpreg);
2096 case BAD: case BAD+1: case BAD+2: case BAD+3:
2097 case BAD+4: case BAD+5: case BAD+6: case BAD+7:
2098 tmpreg = (4 << 10) | ((opP->reg - BAD) << 2);
2101 case BAC: case BAC+1: case BAC+2: case BAC+3:
2102 case BAC+4: case BAC+5: case BAC+6: case BAC+7:
2103 tmpreg = (5 << 10) | ((opP->reg - BAC) << 2);
2109 install_operand(s[1], tmpreg);
2112 if (opP->reg == PSR)
2117 if (opP->reg == PCSR)
2122 as_fatal("Internal error: Operand type %c unknown in line %s of file \"%s\"", s[0], __LINE__, __FILE__);
2125 /* By the time whe get here (FINALLY) the_ins contains the complete
2126 instruction, ready to be emitted. . . */
2129 static int get_regs(i,str,opP)
2131 struct m68k_op *opP;
2134 /* 26, 25, 24, 23-16, 15-8, 0-7 */
2135 /* Low order 24 bits encoded fpc,fps,fpi,fp7-fp0,a7-a0,d7-d0 */
2136 unsigned long cur_regs = 0;
2140 #define ADD_REG(x) { if(x==FPI) cur_regs|=(1<<24);\
2141 else if(x==FPS) cur_regs|=(1<<25);\
2142 else if(x==FPC) cur_regs|=(1<<26);\
2143 else cur_regs|=(1<<(x-1)); }
2150 } else if(*str=='-') {
2152 reg2=m68k_reg_parse(&str);
2153 if(reg2<DATA || reg2>=FPREG+8 || reg1==FPI || reg1==FPS || reg1==FPC) {
2154 opP->error="unknown register in register list";
2163 } else if(*str=='\0') {
2167 opP->error="unknow character in register list";
2170 /* DJA -- Bug Fix. Did't handle d1-d2/a1 until the following instruction was added */
2173 reg1=m68k_reg_parse(&str);
2174 if((reg1<DATA || reg1>=FPREG+8) && !(reg1==FPI || reg1==FPS || reg1==FPC)) {
2175 opP->error="unknown register in register list";
2183 static int reverse_16_bits(in)
2189 static int mask[16] = {
2190 0x0001,0x0002,0x0004,0x0008,0x0010,0x0020,0x0040,0x0080,
2191 0x0100,0x0200,0x0400,0x0800,0x1000,0x2000,0x4000,0x8000
2198 } /* reverse_16_bits() */
2200 static int reverse_8_bits(in)
2206 static int mask[8] = {
2207 0x0001,0x0002,0x0004,0x0008,0x0010,0x0020,0x0040,0x0080,
2215 } /* reverse_8_bits() */
2217 static void install_operand(mode,val)
2223 the_ins.opcode[0]|=val & 0xFF; /* JF FF is for M kludge */
2226 the_ins.opcode[0]|=val<<9;
2229 the_ins.opcode[1]|=val<<12;
2232 the_ins.opcode[1]|=val<<6;
2235 the_ins.opcode[1]|=val;
2238 the_ins.opcode[2]|=val<<12;
2241 the_ins.opcode[2]|=val<<6;
2244 /* DANGER! This is a hack to force cas2l and cas2w cmds
2245 to be three words long! */
2247 the_ins.opcode[2]|=val;
2250 the_ins.opcode[1]|=val<<7;
2253 the_ins.opcode[1]|=val<<10;
2257 the_ins.opcode[1]|=val<<5;
2262 the_ins.opcode[1]|=(val<<10)|(val<<7);
2265 the_ins.opcode[1]|=(val<<12)|val;
2268 the_ins.opcode[0]|=val=0xff;
2271 the_ins.opcode[0]|=val<<9;
2274 the_ins.opcode[1]|=val;
2277 the_ins.opcode[1]|=val;
2278 the_ins.numo++; /* What a hack */
2281 the_ins.opcode[1]|=val<<4;
2291 } /* install_operand() */
2293 static void install_gen_operand(mode,val)
2299 the_ins.opcode[0]|=val;
2302 /* This is a kludge!!! */
2303 the_ins.opcode[0]|=(val&0x07)<<9|(val&0x38)<<3;
2312 the_ins.opcode[0]|=val;
2314 /* more stuff goes here */
2318 } /* install_gen_operand() */
2320 static char *crack_operand(str,opP)
2322 register struct m68k_op *opP;
2324 register int parens;
2326 register char *beg_str;
2332 for(parens=0;*str && (parens>0 || notend(str));str++) {
2333 if(*str=='(') parens++;
2334 else if(*str==')') {
2335 if(!parens) { /* ERROR */
2336 opP->error="Extra )";
2342 if(!*str && parens) { /* ERROR */
2343 opP->error="Missing )";
2348 if(m68k_ip_op(beg_str,opP)==FAIL) {
2354 c= *++str; /* JF bitfield hack */
2358 as_bad("Missing operand");
2363 /* See the comment up above where the #define notend(... is */
2368 if(*s==',') return 0;
2369 if(*s=='{' || *s=='}')
2371 if(*s!=':') return 1;
2372 /* This kludge here is for the division cmd, which is a kludge */
2373 if(index("aAdD#",s[1])) return 0;
2378 /* This is the guts of the machine-dependent assembler. STR points to a
2379 machine dependent instruction. This funciton is supposed to emit
2380 the frags/bytes it assembles to.
2391 int shorts_this_frag;
2393 bzero((char *)(&the_ins),sizeof(the_ins)); /* JF for paranoia sake */
2397 for(n=the_ins.numargs;n;--n)
2398 if(the_ins.operands[n].error) {
2399 er=the_ins.operands[n].error;
2404 as_bad("\"%s\" -- Statement '%s' ignored",er,str);
2408 if(the_ins.nfrag==0) { /* No frag hacking involved; just put it out */
2409 toP=frag_more(2*the_ins.numo);
2410 fromP= &the_ins.opcode[0];
2411 for(m=the_ins.numo;m;--m) {
2412 md_number_to_chars(toP,(long)(*fromP),2);
2416 /* put out symbol-dependent info */
2417 for(m=0;m<the_ins.nrel;m++) {
2418 switch(the_ins.reloc[m].wid) {
2435 as_fatal("Don't know how to figure width of %c in md_assemble()",the_ins.reloc[m].wid);
2439 (toP-frag_now->fr_literal)-the_ins.numo*2+the_ins.reloc[m].n,
2441 the_ins.reloc[m].add,
2442 the_ins.reloc[m].sub,
2443 the_ins.reloc[m].off,
2444 the_ins.reloc[m].pcrel,
2450 /* There's some frag hacking */
2451 for(n=0,fromP= &the_ins.opcode[0];n<the_ins.nfrag;n++) {
2454 if(n==0) wid=2*the_ins.fragb[n].fragoff;
2455 else wid=2*(the_ins.numo-the_ins.fragb[n-1].fragoff);
2459 for(m=wid/2;m;--m) {
2460 md_number_to_chars(toP,(long)(*fromP),2);
2465 for(m=0;m<the_ins.nrel;m++) {
2466 if((the_ins.reloc[m].n)>= 2*shorts_this_frag /* 2*the_ins.fragb[n].fragoff */) {
2467 the_ins.reloc[m].n-= 2*shorts_this_frag /* 2*the_ins.fragb[n].fragoff */;
2470 wid=the_ins.reloc[m].wid;
2473 the_ins.reloc[m].wid=0;
2474 wid = (wid=='b') ? 1 : (wid=='w') ? 2 : (wid=='l') ? 4 : 4000;
2477 (toP-frag_now->fr_literal)-the_ins.numo*2+the_ins.reloc[m].n,
2479 the_ins.reloc[m].add,
2480 the_ins.reloc[m].sub,
2481 the_ins.reloc[m].off,
2482 the_ins.reloc[m].pcrel,
2485 know(the_ins.fragb[n].fadd);
2486 (void)frag_var(rs_machine_dependent,10,0,(relax_substateT)(the_ins.fragb[n].fragty),
2487 the_ins.fragb[n].fadd,the_ins.fragb[n].foff,to_beg_P);
2489 n=(the_ins.numo-the_ins.fragb[n-1].fragoff);
2492 toP=frag_more(n*sizeof(short));
2494 md_number_to_chars(toP,(long)(*fromP),2);
2500 for(m=0;m<the_ins.nrel;m++) {
2503 wid=the_ins.reloc[m].wid;
2506 the_ins.reloc[m].wid=0;
2507 wid = (wid=='b') ? 1 : (wid=='w') ? 2 : (wid=='l') ? 4 : 4000;
2510 (the_ins.reloc[m].n + toP-frag_now->fr_literal)-/* the_ins.numo */ shorts_this_frag*2,
2512 the_ins.reloc[m].add,
2513 the_ins.reloc[m].sub,
2514 the_ins.reloc[m].off,
2515 the_ins.reloc[m].pcrel,
2520 /* This function is called once, at assembler startup time. This should
2521 set up all the tables, etc that the MD part of the assembler needs
2527 * md_begin -- set up hash tables with 68000 instructions.
2528 * similar to what the vax assembler does. ---phr
2530 /* RMS claims the thing to do is take the m68k-opcode.h table, and make
2531 a copy of it at runtime, adding in the information we want but isn't
2532 there. I think it'd be better to have an awk script hack the table
2533 at compile time. Or even just xstr the table and use it as-is. But
2534 my lord ghod hath spoken, so we do it this way. Excuse the ugly var
2537 register const struct m68k_opcode *ins;
2538 register struct m68_incant *hack,
2540 register char *retval = 0; /* empty string, or error msg text */
2541 register unsigned int i;
2544 if ((op_hash = hash_new()) == NULL)
2545 as_fatal("Virtual memory exhausted");
2547 obstack_begin(&robyn,4000);
2548 for (ins = m68k_opcodes; ins < endop; ins++) {
2549 hack=slak=(struct m68_incant *)obstack_alloc(&robyn,sizeof(struct m68_incant));
2551 slak->m_operands=ins->args;
2552 slak->m_opnum=strlen(slak->m_operands)/2;
2553 slak->m_opcode=ins->opcode;
2554 /* This is kludgey */
2555 slak->m_codenum=((ins->match)&0xffffL) ? 2 : 1;
2556 if((ins+1)!=endop && !strcmp(ins->name,(ins+1)->name)) {
2557 slak->m_next=(struct m68_incant *)
2558 obstack_alloc(&robyn,sizeof(struct m68_incant));
2565 retval = hash_insert (op_hash, ins->name,(char *)hack);
2566 /* Didn't his mommy tell him about null pointers? */
2567 if(retval && *retval)
2568 as_fatal("Internal Error: Can't hash %s: %s",ins->name,retval);
2571 for (i = 0; i < sizeof(mklower_table) ; i++)
2572 mklower_table[i] = (isupper(c = (char) i)) ? tolower(c) : c;
2574 for (i = 0 ; i < sizeof(notend_table) ; i++) {
2575 notend_table[i] = 0;
2576 alt_notend_table[i] = 0;
2578 notend_table[','] = 1;
2579 notend_table['{'] = 1;
2580 notend_table['}'] = 1;
2581 alt_notend_table['a'] = 1;
2582 alt_notend_table['A'] = 1;
2583 alt_notend_table['d'] = 1;
2584 alt_notend_table['D'] = 1;
2585 alt_notend_table['#'] = 1;
2586 alt_notend_table['f'] = 1;
2587 alt_notend_table['F'] = 1;
2588 #ifdef REGISTER_PREFIX
2589 alt_notend_table[REGISTER_PREFIX] = 1;
2594 #define notend(s) ((*s == ',' || *s == '}' || *s == '{' \
2595 || (*s == ':' && strchr("aAdD#", s[1]))) \
2599 /* This funciton is called once, before the assembler exits. It is
2600 supposed to do any final cleanup for this part of the assembler.
2607 /* Equal to MAX_PRECISION in atof-ieee.c */
2608 #define MAX_LITTLENUMS 6
2610 /* Turn a string in input_line_pointer into a floating point constant of type
2611 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
2612 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
2615 md_atof(type,litP,sizeP)
2621 LITTLENUM_TYPE words[MAX_LITTLENUMS];
2622 LITTLENUM_TYPE *wordP;
2653 return "Bad call to MD_ATOF()";
2655 t=atof_ieee(input_line_pointer,type,words);
2657 input_line_pointer=t;
2659 *sizeP=prec * sizeof(LITTLENUM_TYPE);
2660 for(wordP=words;prec--;) {
2661 md_number_to_chars(litP,(long)(*wordP++),sizeof(LITTLENUM_TYPE));
2662 litP+=sizeof(LITTLENUM_TYPE);
2664 return ""; /* Someone should teach Dean about null pointers */
2667 /* Turn an integer of n bytes (in val) into a stream of bytes appropriate
2668 for use in the a.out file, and stores them in the array pointed to by buf.
2669 This knows about the endian-ness of the target machine and does
2670 THE RIGHT THING, whatever it is. Possible values for n are 1 (byte)
2671 2 (short) and 4 (long) Floating numbers are put out as a series of
2672 LITTLENUMS (shorts, here at least)
2675 md_number_to_chars(buf,val,n)
2700 md_apply_fix(fixP, val)
2704 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
2706 switch(fixP->fx_size) {
2721 BAD_CASE (fixP->fx_size);
2726 /* *fragP has been relaxed to its final size, and now needs to have
2727 the bytes inside it modified to conform to the new size There is UGLY
2731 md_convert_frag(headers, fragP)
2732 object_headers *headers;
2733 register fragS *fragP;
2738 /* Address in object code of the displacement. */
2739 register int object_address = fragP -> fr_fix + fragP -> fr_address;
2741 #ifdef IBM_COMPILER_SUX
2742 /* This is wrong but it convinces the native rs6000 compiler to
2743 generate the code we want. */
2744 register char *buffer_address = fragP -> fr_literal;
2745 buffer_address += fragP -> fr_fix;
2746 #else /* IBM_COMPILER_SUX */
2747 /* Address in gas core of the place to store the displacement. */
2748 register char *buffer_address = fragP->fr_fix + fragP->fr_literal;
2749 #endif /* IBM_COMPILER_SUX */
2751 /* No longer true: know(fragP->fr_symbol); */
2753 /* The displacement of the address, from current location. */
2754 disp = fragP->fr_symbol ? S_GET_VALUE(fragP->fr_symbol) : 0;
2755 disp = (disp + fragP->fr_offset) - object_address;
2757 switch(fragP->fr_subtype) {
2758 case TAB(BCC68000,BYTE):
2759 case TAB(BRANCH,BYTE):
2760 know(issbyte(disp));
2762 as_bad("short branch with zero offset: use :w");
2763 fragP->fr_opcode[1]=disp;
2766 case TAB(DBCC,SHORT):
2767 know(issword(disp));
2770 case TAB(BCC68000,SHORT):
2771 case TAB(BRANCH,SHORT):
2772 know(issword(disp));
2773 fragP->fr_opcode[1]=0x00;
2776 case TAB(BRANCH,LONG):
2778 if(fragP->fr_opcode[0]==0x61) {
2779 fragP->fr_opcode[0]= 0x4E;
2780 fragP->fr_opcode[1]= 0xB9; /* JBSR with ABSL LONG offset */
2781 subseg_change(SEG_TEXT, 0);
2794 } else if(fragP->fr_opcode[0]==0x60) {
2795 fragP->fr_opcode[0]= 0x4E;
2796 fragP->fr_opcode[1]= 0xF9; /* JMP with ABSL LONG offset */
2797 subseg_change(SEG_TEXT, 0);
2798 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0, fragP->fr_offset,0,
2803 as_bad("Long branch offset not supported.");
2806 fragP->fr_opcode[1]=0xff;
2810 case TAB(BCC68000,LONG):
2811 /* only Bcc 68000 instructions can come here */
2812 /* change bcc into b!cc/jmp absl long */
2813 fragP->fr_opcode[0] ^= 0x01; /* invert bcc */
2814 fragP->fr_opcode[1] = 0x6; /* branch offset = 6 */
2816 /* JF: these used to be fr_opcode[2,3], but they may be in a
2817 different frag, in which case refering to them is a no-no.
2818 Only fr_opcode[0,1] are guaranteed to work. */
2819 *buffer_address++ = 0x4e; /* put in jmp long (0x4ef9) */
2820 *buffer_address++ = 0xf9;
2821 fragP->fr_fix += 2; /* account for jmp instruction */
2822 subseg_change(SEG_TEXT,0);
2823 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0,
2829 case TAB(DBCC,LONG):
2830 /* only DBcc 68000 instructions can come here */
2831 /* change dbcc into dbcc/jmp absl long */
2832 /* JF: these used to be fr_opcode[2-7], but that's wrong */
2833 *buffer_address++ = 0x00; /* branch offset = 4 */
2834 *buffer_address++ = 0x04;
2835 *buffer_address++ = 0x60; /* put in bra pc+6 */
2836 *buffer_address++ = 0x06;
2837 *buffer_address++ = 0x4e; /* put in jmp long (0x4ef9) */
2838 *buffer_address++ = 0xf9;
2840 fragP->fr_fix += 6; /* account for bra/jmp instructions */
2841 subseg_change(SEG_TEXT,0);
2842 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0,
2848 case TAB(FBRANCH,SHORT):
2849 know((fragP->fr_opcode[1]&0x40)==0);
2852 case TAB(FBRANCH,LONG):
2853 fragP->fr_opcode[1]|=0x40; /* Turn on LONG bit */
2856 case TAB(PCREL,SHORT):
2859 case TAB(PCREL,LONG):
2860 /* The thing to do here is force it to ABSOLUTE LONG, since
2861 PCREL is really trying to shorten an ABSOLUTE address anyway */
2862 /* JF FOO This code has not been tested */
2863 subseg_change(SEG_TEXT,0);
2864 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0, fragP->fr_offset, 0, NO_RELOC);
2865 if((fragP->fr_opcode[1] & 0x3F) != 0x3A)
2866 as_bad("Internal error (long PC-relative operand) for insn 0x%04lx at 0x%lx",
2867 fragP->fr_opcode[0],fragP->fr_address);
2868 fragP->fr_opcode[1]&= ~0x3F;
2869 fragP->fr_opcode[1]|=0x39; /* Mode 7.1 */
2871 /* md_number_to_chars(buffer_address,
2872 (long)(fragP->fr_symbol->sy_value + fragP->fr_offset),
2876 case TAB(PCLEA,SHORT):
2877 subseg_change(SEG_TEXT,0);
2878 fix_new(fragP,(int)(fragP->fr_fix),2,fragP->fr_symbol,(symbolS *)0,fragP->fr_offset,1,
2880 fragP->fr_opcode[1] &= ~0x3F;
2881 fragP->fr_opcode[1] |= 0x3A;
2884 case TAB(PCLEA,LONG):
2885 subseg_change(SEG_TEXT,0);
2886 fix_new(fragP,(int)(fragP->fr_fix)+2,4,fragP->fr_symbol,(symbolS *)0,fragP->fr_offset+2,1,
2888 *buffer_address++ = 0x01;
2889 *buffer_address++ = 0x70;
2891 /* buffer_address+=2; */
2895 } /* switch on subtype */
2898 md_number_to_chars(buffer_address, (long) disp, (int) ext);
2899 fragP->fr_fix += ext;
2900 /* H_SET_TEXT_SIZE(headers, H_GET_TEXT_SIZE(headers) + ext); */
2901 } /* if extending */
2903 know((fragP->fr_next == NULL)
2904 || ((fragP->fr_next->fr_address - fragP->fr_address)
2905 == (fragP->fr_fix)));
2908 } /* md_convert_frag() */
2910 /* Force truly undefined symbols to their maximum size, and generally set up
2911 the frag list to be relaxed
2913 int md_estimate_size_before_relax(fragP, segment)
2914 register fragS *fragP;
2918 register char *buffer_address = fragP -> fr_fix + fragP -> fr_literal;
2920 old_fix=fragP->fr_fix;
2922 /* handle SZ_UNDEF first, it can be changed to BYTE or SHORT */
2923 switch(fragP->fr_subtype) {
2925 case TAB(BCC68000,SZ_UNDEF): {
2926 if((fragP->fr_symbol != NULL)
2927 && S_GET_SEGMENT(fragP->fr_symbol) == segment) {
2928 fragP->fr_subtype=TAB(BCC68000,BYTE);
2931 /* only Bcc 68000 instructions can come here */
2932 /* change bcc into b!cc/jmp absl long */
2933 fragP->fr_opcode[0] ^= 0x01; /* invert bcc */
2935 fragP->fr_opcode[1] = 0x04; /* branch offset = 6 */
2936 /* JF: these were fr_opcode[2,3] */
2937 buffer_address[0] = 0x4e; /* put in jmp long (0x4ef9) */
2938 buffer_address[1] = 0xf8;
2939 fragP->fr_fix += 2; /* account for jmp instruction */
2940 subseg_change(SEG_TEXT,0);
2941 fix_new(fragP, fragP->fr_fix, 2, fragP->fr_symbol, 0,
2942 fragP->fr_offset, 0, NO_RELOC);
2945 fragP->fr_opcode[1] = 0x06; /* branch offset = 6 */
2946 /* JF: these were fr_opcode[2,3] */
2947 buffer_address[2] = 0x4e; /* put in jmp long (0x4ef9) */
2948 buffer_address[3] = 0xf9;
2949 fragP->fr_fix += 2; /* account for jmp instruction */
2950 subseg_change(SEG_TEXT,0);
2951 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0,
2952 fragP->fr_offset, 0, NO_RELOC);
2957 } /* case TAB(BCC68000,SZ_UNDEF) */
2959 case TAB(DBCC,SZ_UNDEF): {
2960 if (fragP->fr_symbol != NULL && S_GET_SEGMENT(fragP->fr_symbol) == segment) {
2961 fragP->fr_subtype=TAB(DBCC,SHORT);
2965 /* only DBcc 68000 instructions can come here */
2966 /* change dbcc into dbcc/jmp absl long */
2967 /* JF: these used to be fr_opcode[2-4], which is wrong. */
2968 buffer_address[0] = 0x00; /* branch offset = 4 */
2969 buffer_address[1] = 0x04;
2970 buffer_address[2] = 0x60; /* put in bra pc + ... */
2973 /* JF: these were fr_opcode[5-7] */
2974 buffer_address[3] = 0x04; /* plus 4 */
2975 buffer_address[4] = 0x4e;/* Put in Jump Word */
2976 buffer_address[5] = 0xf8;
2977 fragP->fr_fix += 6; /* account for bra/jmp instruction */
2978 subseg_change(SEG_TEXT,0);
2979 fix_new(fragP, fragP->fr_fix, 2, fragP->fr_symbol, 0,
2980 fragP->fr_offset, 0, NO_RELOC);
2983 /* JF: these were fr_opcode[5-7] */
2984 buffer_address[3] = 0x06; /* Plus 6 */
2985 buffer_address[4] = 0x4e; /* put in jmp long (0x4ef9) */
2986 buffer_address[5] = 0xf9;
2987 fragP->fr_fix += 6; /* account for bra/jmp instruction */
2988 subseg_change(SEG_TEXT,0);
2989 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0,
2990 fragP->fr_offset, 0, NO_RELOC);
2996 } /* case TAB(DBCC,SZ_UNDEF) */
2998 case TAB(BRANCH,SZ_UNDEF): {
2999 if((fragP->fr_symbol != NULL) /* Not absolute */
3000 && S_GET_SEGMENT(fragP->fr_symbol) == segment) {
3001 fragP->fr_subtype=TAB(TABTYPE(fragP->fr_subtype),BYTE);
3003 } else if((fragP->fr_symbol == 0) || flagseen['m']) {
3004 /* On 68000, or for absolute value, switch to abs long */
3005 /* FIXME, we should check abs val, pick short or long */
3006 if(fragP->fr_opcode[0]==0x61) {
3007 fragP->fr_opcode[0]= 0x4E;
3008 fragP->fr_opcode[1]= 0xB9; /* JBSR with ABSL LONG offset */
3009 subseg_change(SEG_TEXT, 0);
3010 fix_new(fragP, fragP->fr_fix, 4,
3011 fragP->fr_symbol, 0, fragP->fr_offset, 0, NO_RELOC);
3014 } else if(fragP->fr_opcode[0]==0x60) {
3015 fragP->fr_opcode[0]= 0x4E;
3016 fragP->fr_opcode[1]= 0xF9; /* JMP with ABSL LONG offset */
3017 subseg_change(SEG_TEXT, 0);
3018 fix_new(fragP, fragP->fr_fix, 4,
3019 fragP->fr_symbol, 0, fragP->fr_offset, 0, NO_RELOC);
3023 as_warn("Long branch offset to extern symbol not supported.");
3025 } else { /* Symbol is still undefined. Make it simple */
3026 fix_new(fragP, (int)(fragP->fr_fix), 4, fragP->fr_symbol,
3027 (symbolS *)0, fragP->fr_offset+4, 1, NO_RELOC);
3029 fragP->fr_opcode[1]=0xff;
3033 } /* case TAB(BRANCH,SZ_UNDEF) */
3035 case TAB(PCLEA,SZ_UNDEF): {
3036 if ((S_GET_SEGMENT(fragP->fr_symbol))==segment || flagseen['l']) {
3037 fragP->fr_subtype=TAB(PCLEA,SHORT);
3040 fragP->fr_subtype=TAB(PCLEA,LONG);
3044 } /* TAB(PCLEA,SZ_UNDEF) */
3046 case TAB(PCREL,SZ_UNDEF): {
3047 if(S_GET_SEGMENT(fragP->fr_symbol) == segment || flagseen['l']) {
3048 fragP->fr_subtype = TAB(PCREL,SHORT);
3051 fragP->fr_subtype = TAB(PCREL,LONG);
3055 } /* TAB(PCREL,SZ_UNDEF) */
3061 /* now that SZ_UNDEF are taken care of, check others */
3062 switch(fragP->fr_subtype) {
3063 case TAB(BCC68000,BYTE):
3064 case TAB(BRANCH,BYTE):
3065 /* We can't do a short jump to the next instruction,
3066 so we force word mode. */
3067 if (fragP->fr_symbol && S_GET_VALUE(fragP->fr_symbol)==0 &&
3068 fragP->fr_symbol->sy_frag==fragP->fr_next) {
3069 fragP->fr_subtype=TAB(TABTYPE(fragP->fr_subtype),SHORT);
3076 return fragP->fr_var + fragP->fr_fix - old_fix;
3079 #if defined(OBJ_AOUT) | defined(OBJ_BOUT)
3080 /* the bit-field entries in the relocation_info struct plays hell
3081 with the byte-order problems of cross-assembly. So as a hack,
3082 I added this mach. dependent ri twiddler. Ugly, but it gets
3084 /* on m68k: first 4 bytes are normal unsigned long, next three bytes
3085 are symbolnum, most sig. byte first. Last byte is broken up with
3086 bit 7 as pcrel, bits 6 & 5 as length, bit 4 as pcrel, and the lower
3087 nibble as nuthin. (on Sun 3 at least) */
3088 /* Translate the internal relocation information into target-specific
3091 md_ri_to_chars(the_bytes, ri)
3093 struct reloc_info_generic *ri;
3096 md_number_to_chars(the_bytes, ri->r_address, 4);
3097 /* now the fun stuff */
3098 the_bytes[4] = (ri->r_symbolnum >> 16) & 0x0ff;
3099 the_bytes[5] = (ri->r_symbolnum >> 8) & 0x0ff;
3100 the_bytes[6] = ri->r_symbolnum & 0x0ff;
3101 the_bytes[7] = (((ri->r_pcrel << 7) & 0x80) | ((ri->r_length << 5) & 0x60) |
3102 ((ri->r_extern << 4) & 0x10));
3104 #endif /* OBJ_AOUT or OBJ_BOUT */
3106 #ifndef WORKING_DOT_WORD
3107 const int md_short_jump_size = 4;
3108 const int md_long_jump_size = 6;
3111 md_create_short_jump(ptr,from_addr,to_addr,frag,to_symbol)
3120 offset = to_addr - (from_addr+2);
3122 md_number_to_chars(ptr ,(long)0x6000,2);
3123 md_number_to_chars(ptr+2,(long)offset,2);
3127 md_create_long_jump(ptr,from_addr,to_addr,frag,to_symbol)
3136 if (flagseen['m']) {
3137 offset=to_addr-S_GET_VALUE(to_symbol);
3138 md_number_to_chars(ptr ,(long)0x4EF9,2);
3139 md_number_to_chars(ptr+2,(long)offset,4);
3140 fix_new(frag,(ptr+2)-frag->fr_literal,4,to_symbol,(symbolS *)0,(long)0,0,
3143 offset=to_addr - (from_addr+2);
3144 md_number_to_chars(ptr ,(long)0x60ff,2);
3145 md_number_to_chars(ptr+2,(long)offset,4);
3150 /* Different values of OK tell what its OK to return. Things that aren't OK are an error (what a shock, no?)
3153 10: Absolute 1:8 only
3154 20: Absolute 0:7 only
3155 30: absolute 0:15 only
3156 40: Absolute 0:31 only
3157 50: absolute 0:127 only
3158 55: absolute -64:63 only
3159 60: absolute -128:127 only
3160 70: absolute 0:4095 only
3165 static int get_num(exp,ok)
3166 struct m68k_exp *exp;
3174 if(*exp->e_beg=='0') {
3175 if(exp->e_beg[1]=='x')
3176 sscanf(exp->e_beg+2,"%x",&l);
3178 sscanf(exp->e_beg+1,"%O",&l);
3181 return atol(exp->e_beg);
3187 /* Can't do anything */
3190 if(!exp->e_beg || !exp->e_end) {
3191 seg(exp)=SEG_ABSOLUTE;
3194 offs(exp)= (ok==10) ? 1 : 0;
3195 as_warn("Null expression defaults to %ld",offs(exp));
3200 if(/* ok!=80 && */exp->e_end[-1]==':' && (exp->e_end-exp->e_beg)>=2) {
3201 switch(exp->e_end[0]) {
3217 as_bad("Unknown size for expression \"%c\"",exp->e_end[0]);
3221 c_save=exp->e_end[1];
3223 save_in=input_line_pointer;
3224 input_line_pointer=exp->e_beg;
3225 switch(expression(&(exp->e_exp))) {
3227 seg(exp)=SEG_ABSOLUTE;
3230 offs(exp)= (ok==10) ? 1 : 0;
3231 as_warn("Unknown expression: '%s' defaulting to %d",exp->e_beg,offs(exp));
3235 /* Do the same thing the VAX asm does */
3236 seg(exp)=SEG_ABSOLUTE;
3241 as_warn("expression out of range: defaulting to 1");
3248 if(offs(exp)<1 || offs(exp)>8) {
3249 as_warn("expression out of range: defaulting to 1");
3254 if(offs(exp)<0 || offs(exp)>7)
3258 if(offs(exp)<0 || offs(exp)>15)
3262 if(offs(exp)<0 || offs(exp)>32)
3266 if(offs(exp)<0 || offs(exp)>127)
3270 if(offs(exp)<-64 || offs(exp)>63)
3274 if(offs(exp)<-128 || offs(exp)>127)
3278 if(offs(exp)<0 || offs(exp)>4095) {
3280 as_warn("expression out of range: defaulting to 0");
3292 case SEG_DIFFERENCE:
3293 if(ok>=10 && ok<=70) {
3294 seg(exp)=SEG_ABSOLUTE;
3297 offs(exp)= (ok==10) ? 1 : 0;
3298 as_warn("Can't deal with expression \"%s\": defaulting to %ld",exp->e_beg,offs(exp));
3302 if(ok==80 && offs(exp)<0) { /* HACK! Turn it into a long */
3303 LITTLENUM_TYPE words[6];
3305 gen_to_words(words,2,8L);/* These numbers are magic! */
3306 seg(exp)=SEG_ABSOLUTE;
3309 offs(exp)=words[1]|(words[0]<<16);
3311 seg(exp)=SEG_ABSOLUTE;
3314 offs(exp)= (ok==10) ? 1 : 0;
3315 as_warn("Can't deal with expression \"%s\": defaulting to %ld",exp->e_beg,offs(exp));
3321 if(input_line_pointer!=exp->e_end+1)
3322 as_bad("Ignoring junk after expression");
3323 exp->e_end[1]=c_save;
3324 input_line_pointer=save_in;
3326 switch(exp->e_siz) {
3328 if(!isbyte(offs(exp)))
3329 as_warn("expression doesn't fit in BYTE");
3332 if(!isword(offs(exp)))
3333 as_warn("expression doesn't fit in WORD");
3341 /* These are the back-ends for the various machine dependent pseudo-ops. */
3342 void demand_empty_rest_of_line(); /* Hate those extra verbose names */
3344 static void s_data1() {
3345 subseg_new(SEG_DATA,1);
3346 demand_empty_rest_of_line();
3349 static void s_data2() {
3350 subseg_new(SEG_DATA,2);
3351 demand_empty_rest_of_line();
3354 static void s_bss() {
3355 /* We don't support putting frags in the BSS segment, but we
3356 can put them into initialized data for now... */
3357 subseg_new(SEG_DATA,255); /* FIXME-SOON */
3358 demand_empty_rest_of_line();
3361 static void s_even() {
3363 register long temp_fill;
3365 temp = 1; /* JF should be 2? */
3366 temp_fill = get_absolute_expression ();
3367 if ( ! need_pass_2 ) /* Never make frag if expect extra pass. */
3368 frag_align (temp, (int)temp_fill);
3369 demand_empty_rest_of_line();
3372 static void s_proc() {
3373 demand_empty_rest_of_line();
3376 /* s_space is defined in read.c .skip is simply an alias to it. */
3379 md_parse_option(argP,cntP,vecP)
3385 case 'l': /* -l means keep external to 2 bit offset
3386 rather than 16 bit one */
3390 /* Gas almost ignores this option! */
3394 if(!strcmp(*argP,"68000"))
3396 else if(!strcmp(*argP,"68010")) {
3398 omagic= 1<<16|OMAGIC;
3401 } else if(!strcmp(*argP,"68020"))
3404 as_warn("Unknown -m option ignored");
3410 if (!strcmp(*argP,"pic")) {
3412 break; /* -pic, Position Independent Code */
3425 /* TEST2: Test md_assemble() */
3426 /* Warning, this routine probably doesn't work anymore */
3430 struct m68_it the_ins;
3437 if(!gets(buf) || !*buf)
3439 if(buf[0]=='|' || buf[1]=='.')
3441 for(cp=buf;*cp;cp++)
3446 bzero(&the_ins,sizeof(the_ins));
3447 m68_ip(&the_ins,buf);
3449 printf("Error %s in %s\n",the_ins.error,buf);
3451 printf("Opcode(%d.%s): ",the_ins.numo,the_ins.args);
3452 for(n=0;n<the_ins.numo;n++)
3453 printf(" 0x%x",the_ins.opcode[n]&0xffff);
3455 print_the_insn(&the_ins.opcode[0],stdout);
3456 (void)putchar('\n');
3458 for(n=0;n<strlen(the_ins.args)/2;n++) {
3459 if(the_ins.operands[n].error) {
3460 printf("op%d Error %s in %s\n",n,the_ins.operands[n].error,buf);
3463 printf("mode %d, reg %d, ",the_ins.operands[n].mode,the_ins.operands[n].reg);
3464 if(the_ins.operands[n].b_const)
3465 printf("Constant: '%.*s', ",1+the_ins.operands[n].e_const-the_ins.operands[n].b_const,the_ins.operands[n].b_const);
3466 printf("ireg %d, isiz %d, imul %d, ",the_ins.operands[n].ireg,the_ins.operands[n].isiz,the_ins.operands[n].imul);
3467 if(the_ins.operands[n].b_iadd)
3468 printf("Iadd: '%.*s',",1+the_ins.operands[n].e_iadd-the_ins.operands[n].b_iadd,the_ins.operands[n].b_iadd);
3469 (void)putchar('\n');
3481 while(*str && *str!=' ')
3483 if(str[-1]==':' || str[1]=='=')
3490 /* Possible states for relaxation:
3492 0 0 branch offset byte (bra, etc)
3496 1 0 indexed offsets byte a0@(32,d4:w:1) etc
3500 2 0 two-offset index word-word a0@(32,d4)@(45) etc
3536 extern fragS *text_frag_root;
3538 for(fragP=text_frag_root;fragP;fragP=fragP->fr_next) {
3539 printf("addr %lu next 0x%x fix %ld var %ld symbol 0x%x offset %ld\n",
3540 fragP->fr_address,fragP->fr_next,fragP->fr_fix,fragP->fr_var,fragP->fr_symbol,fragP->fr_offset);
3541 printf("opcode 0x%x type %d subtype %d\n\n",fragP->fr_opcode,fragP->fr_type,fragP->fr_subtype);
3553 fputs("Internal error:",stderr);
3554 _doprnt(format,&args,stderr);
3555 (void)putc('\n',stderr);
3561 /* We have no need to default values of symbols. */
3565 md_undefined_symbol (name)
3571 /* Parse an operand that is machine-specific.
3572 We just return without modifying the expression if we have nothing
3577 md_operand (expressionP)
3578 expressionS *expressionP;
3582 /* Round up a section size to the appropriate boundary. */
3584 md_section_align (segment, size)
3588 return size; /* Byte alignment is fine */
3591 /* Exactly what point is a PC-relative offset relative TO?
3592 On the 68k, they're relative to the address of the offset, plus
3593 its size. (??? Is this right? FIXME-SOON!) */
3595 md_pcrel_from (fixP)
3598 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address;
3601 /* Opcode table for m68000/m68020 and m68881.
3602 Copyright (C) 1989, Free Software Foundation.
3604 This file is part of GDB, the GNU Debugger and GAS, the GNU Assembler.
3606 Both GDB and GAS are free software; you can redistribute and/or modify
3607 it under the terms of the GNU General Public License as published by
3608 the Free Software Foundation; either version 2, or (at your option)
3611 GDB and GAS are distributed in the hope that it will be useful,
3612 but WITHOUT ANY WARRANTY; without even the implied warranty of
3613 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3614 GNU General Public License for more details.
3616 You should have received a copy of the GNU General Public License
3617 along with GDB or GAS; see the file COPYING. If not, write to
3618 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
3620 /* We store four bytes of opcode for all opcodes because that
3621 is the most any of them need. The actual length of an instruction
3622 is always at least 2 bytes, and is as much longer as necessary to
3623 hold the operands it has.
3625 The match component is a mask saying which bits must match
3626 particular opcode in order for an instruction to be an instance
3629 The args component is a string containing two characters
3630 for each operand of the instruction. The first specifies
3631 the kind of operand; the second, the place it is stored. */
3633 /* Kinds of operands:
3634 D data register only. Stored as 3 bits.
3635 A address register only. Stored as 3 bits.
3636 R either kind of register. Stored as 4 bits.
3637 F floating point coprocessor register only. Stored as 3 bits.
3638 O an offset (or width): immediate data 0-31 or data register.
3639 Stored as 6 bits in special format for BF... insns.
3640 + autoincrement only. Stored as 3 bits (number of the address register).
3641 - autodecrement only. Stored as 3 bits (number of the address register).
3642 Q quick immediate data. Stored as 3 bits.
3643 This matches an immediate operand only when value is in range 1 .. 8.
3644 M moveq immediate data. Stored as 8 bits.
3645 This matches an immediate operand only when value is in range -128..127
3646 T trap vector immediate data. Stored as 4 bits.
3648 k K-factor for fmove.p instruction. Stored as a 7-bit constant or
3649 a three bit register offset, depending on the field type.
3651 # immediate data. Stored in special places (b, w or l)
3652 which say how many bits to store.
3653 ^ immediate data for floating point instructions. Special places
3654 are offset by 2 bytes from '#'...
3655 B pc-relative address, converted to an offset
3656 that is treated as immediate data.
3657 d displacement and register. Stores the register as 3 bits
3658 and stores the displacement in the entire second word.
3660 C the CCR. No need to store it; this is just for filtering validity.
3661 S the SR. No need to store, just as with CCR.
3662 U the USP. No need to store, just as with CCR.
3664 I Coprocessor ID. Not printed if 1. The Coprocessor ID is always
3665 extracted from the 'd' field of word one, which means that an extended
3666 coprocessor opcode can be skipped using the 'i' place, if needed.
3668 s System Control register for the floating point coprocessor.
3669 S List of system control registers for floating point coprocessor.
3671 J Misc register for movec instruction, stored in 'j' format.
3673 000 SFC Source Function Code reg
3674 001 DFC Data Function Code reg
3675 002 CACR Cache Control Register
3676 800 USP User Stack Pointer
3677 801 VBR Vector Base reg
3678 802 CAAR Cache Address Register
3679 803 MSP Master Stack Pointer
3680 804 ISP Interrupt Stack Pointer
3682 L Register list of the type d0-d7/a0-a7 etc.
3683 (New! Improved! Can also hold fp0-fp7, as well!)
3684 The assembler tries to see if the registers match the insn by
3685 looking at where the insn wants them stored.
3687 l Register list like L, but with all the bits reversed.
3688 Used for going the other way. . .
3690 They are all stored as 6 bits using an address mode and a register number;
3691 they differ in which addressing modes they match.
3693 * all (modes 0-6,7.*)
3694 ~ alterable memory (modes 2-6,7.0,7.1)(not 0,1,7.~)
3695 % alterable (modes 0-6,7.0,7.1)(not 7.~)
3696 ; data (modes 0,2-6,7.*)(not 1)
3697 @ data, but not immediate (modes 0,2-6,7.? ? ?)(not 1,7.?) This may really be ;, the 68020 book says it is
3698 ! control (modes 2,5,6,7.*-)(not 0,1,3,4,7.4)
3699 & alterable control (modes 2,5,6,7.0,7.1)(not 0,1,7.? ? ?)
3700 $ alterable data (modes 0,2-6,7.0,7.1)(not 1,7.~)
3701 ? alterable control, or data register (modes 0,2,5,6,7.0,7.1)(not 1,3,4,7.~)
3702 / control, or data register (modes 0,2,5,6,7.0,7.1,7.2,7.3)(not 1,3,4,7.4)
3705 /* JF: for the 68851 */
3707 I didn't use much imagination in choosing the
3708 following codes, so many of them aren't very
3713 000 TC Translation Control reg
3714 100 CAL Current Access Level
3715 101 VAL Validate Access Level
3716 110 SCC Stack Change Control
3717 111 AC Access Control
3719 W wide pmmu registers
3721 001 DRP Dma Root Pointer
3722 010 SRP Supervisor Root Pointer
3723 011 CRP Cpu Root Pointer
3725 f function code register
3732 100 BAD Breakpoint Acknowledge Data
3733 101 BAC Breakpoint Acknowledge Control
3738 | memory (modes 2-6, 7.*)
3742 /* Places to put an operand, for non-general operands:
3743 s source, low bits of first word.
3744 d dest, shifted 9 in first word
3745 1 second word, shifted 12
3746 2 second word, shifted 6
3747 3 second word, shifted 0
3748 4 third word, shifted 12
3749 5 third word, shifted 6
3750 6 third word, shifted 0
3751 7 second word, shifted 7
3752 8 second word, shifted 10
3753 D store in both place 1 and place 3; for divul and divsl.
3754 b second word, low byte
3755 w second word (entire)
3756 l second and third word (entire)
3757 g branch offset for bra and similar instructions.
3758 The place to store depends on the magnitude of offset.
3759 t store in both place 7 and place 8; for floating point operations
3760 c branch offset for cpBcc operations.
3761 The place to store is word two if bit six of word one is zero,
3762 and words two and three if bit six of word one is one.
3763 i Increment by two, to skip over coprocessor extended operands. Only
3764 works with the 'I' format.
3765 k Dynamic K-factor field. Bits 6-4 of word 2, used as a register number.
3766 Also used for dynamic fmovem instruction.
3767 C floating point coprocessor constant - 7 bits. Also used for static
3769 j Movec register #, stored in 12 low bits of second word.
3771 Places to put operand, for general operands:
3772 d destination, shifted 6 bits in first word
3773 b source, at low bit of first word, and immediate uses one byte
3774 w source, at low bit of first word, and immediate uses two bytes
3775 l source, at low bit of first word, and immediate uses four bytes
3776 s source, at low bit of first word.
3777 Used sometimes in contexts where immediate is not allowed anyway.
3778 f single precision float, low bit of 1st word, immediate uses 4 bytes
3779 F double precision float, low bit of 1st word, immediate uses 8 bytes
3780 x extended precision float, low bit of 1st word, immediate uses 12 bytes
3781 p packed float, low bit of 1st word, immediate uses 12 bytes
3784 #define one(x) ((x) << 16)
3785 #define two(x, y) (((x) << 16) + y)
3794 /* end of tc-m68k.c */