4 * config/tc-i386.c (match_template): Use MAX_OPERANDS for the
5 number of operands. Issue an error if MAX_OPERANDS != 4. Add
10 * config/tc-arm.c (arm_arch_option_table): Add v7-{a,r,m}.
11 * doc/c-arm.texi: Fix spelling of ARMv7 profile variants.
15 * config/tc-i386.h (WordMem): Document it for 64 bit memory
20 * doc/Makefile.am (as_TEXINFOS): Set.
21 (as.info as.dvi as.html): Delete rule.
22 * doc/Makefile.in: Regenerated.
26 * configure.in: Define GENINSRC_NEVER.
27 * doc/Makefile.am (as.info): Remove srcdir prefix.
28 (MAINTAINERCLEANFILES): Add info file.
29 (DISTCLEANFILES): Pretend to add info file.
30 * po/Make-in (.po.gmo): Put gmo files in objdir.
31 * configure, Makefile.in, doc/Makefile.in: Regenerated.
35 * config/tc-i386.h (template): Use MAX_OPERANDS instead of 4
36 for operand_types array.
40 * config/tc-z8k.c (whatreg): Add comment describing function.
41 Return NULL if symbol name characters follow the register number.
42 (parse_reg): Use NULL instead of 0 for pointer values. Stop
43 processing if whatreg returned NULL.
47 * config/tc-m68k.c: Update uses of EF_M68K_*.
51 * config/tc-i386.h: Change the prefix order to SEG_PREFIX,
52 ADDR_PREFIX, DATA_PREFIX, LOCKREP_PREFIX.
57 * subsegs.c (subseg_set_rest): Clear frch_cfi_data field.
61 * config/tc-arm.c (arm_force_relocation): Return 1 for relocs against
66 * config/tc-arm.c (arm_is_eabi): New function.
67 * config/tc-arm.h (arm_is_eabi): New prototype.
68 (THUMB_IS_FUNC): Use ELF function type for EABI objects.
69 * doc/c-arm.texi (.thumb_func): Update documentation.
73 * config/tc-arm.c (do_vfp_sp_const, do_vfp_dp_const): Fix operans
78 * config/tc-xtensa.c (xtensa_sanity_check): Check for RELAX_IMMED
79 as the first slot_subtype, not the frag subtype.
83 * config/tc-xtensa.c (XSHAL_ABI): Add default definition.
84 (directive_state): Disable scheduling by default.
85 (xtensa_add_config_info): New.
86 (xtensa_end): Call xtensa_add_config_info.
90 * config/tc-sparc.c (tc_gen_reloc): Turn aligned relocs into
91 their unaligned counterparts in debugging sections.
95 * config/tc-spu.c (md_pseudo_table): Add eqv and .eqv.
99 * config/tc-arm.h (md_cons_align): Define.
100 (mapping_state): New prototype.
101 * config/tc-arm.c (mapping_state): Make global.
105 * config/obj-elf.c (obj_elf_version): Use memcpy rather than strcpy.
109 * config/tc-score.c (score_relax_frag): If next frag contains 32 bit
110 branch instruction, handle it specially.
111 (score_insns): Modify 32 bit branch instruction.
115 * symbols.c (resolve_symbol_value): Formatting.
120 * symbols.c (symbol_clone): Mark symbol ending up not on symbol
121 chain by linking it to itself.
122 (resolve_symbol_value): Also check symbol_shadow_p().
123 (symbol_shadow_p): New.
124 * symbols.h (symbol_shadow_p): Declare.
128 * config/tc-arm.c (do_t_czb): Rename to do_t_cbz.
129 (insns): Adjust accordingly.
130 (md_apply_fix): Alter comments to use CBZ instead of CZB.
134 * config/tc-arm.c (arm_fix_adjustable) [OBJ_COFF]: Delete.
135 (arm_fix_adjustable) [OBJ_ELF]: Use it on coff targets too.
140 * config/obj-elf.c (obj_elf_version): Do not include the name
141 field's padding in the namesz value.
145 * config/tc-mips.c: Fix outdated comment.
149 * config/tc-i386.h (CpuPNI): Removed.
150 (CpuUnknownFlags): Replace CpuPNI with CpuSSE3.
151 * config/tc-i386.c (md_assemble): Likewise.
155 * symbols.c (symbol_create, symbol_clone): Don't set udata.p.
159 * config/tc-mips.c (pic_need_relax): Return true for section symbols.
163 * doc/c-mips.texi (-march): Document sb1a.
167 * config/tc-mips.c (mips_cpu_info_table): Remove 24k/24ke aliases.
168 34k always has DSP ASE.
172 * config/tc-mips.c (md_pcrel_from_section): Disallow PC relative
173 MIPS16 instructions referencing other sections, unless they are
178 * config/tc-mips.c (mips_cpu_info_table): The 25Kf is a MIPS64
183 * dw2gencfi.c (struct fde_entry): Add per_encoding, lsda_encoding,
184 personality and lsda.
185 (struct cie_entry): Add per_encoding, lsda_encoding and personality.
186 (alloc_fde_entry): Initialize per_encoding and lsda_encoding.
187 (cfi_pseudo_table): Handle .cfi_personality and .cfi_lsda.
188 (dot_cfi_personality, dot_cfi_lsda, encoding_size): New functions.
189 (output_cie): Output personality including its encoding and LSDA encoding.
190 (output_fde): Output LSDA.
191 (select_cie_for_fde): Don't share CIE if personality, its encoding or
192 LSDA encoding are different. Copy the 3 fields from fde_entry to
194 * doc/as.texinfo (.cfi_personality, .cfi_lsda): Document.
196 * subsegs.h (struct frchain): Add frch_cfi_data field.
197 * dw2gencfi.c: Include subsegs.h.
198 (cur_fde_data, last_address, cur_cfa_offset, cfa_save_stack): Removed.
199 (struct frch_cfi_data): New type.
200 (unused_cfi_data): New variable.
201 (alloc_fde_entry): Move cur_fde_data, last_address, cur_cfa_offset
202 and cfa_save_stack static vars into a structure pointed from
204 (alloc_cfi_insn_data, cfi_new_fde, cfi_end_fde, cfi_set_return_column,
205 cfi_add_advance_loc, cfi_add_CFA_def_cfa, cfi_add_CFA_def_cfa_offset,
206 cfi_add_CFA_remember_state, cfi_add_CFA_restore_state, dot_cfi,
207 dot_cfi_escape, dot_cfi_startproc, dot_cfi_endproc, cfi_finish):
212 * config/tc-h8300.c (build_bytes): Fix const warning.
216 * tc-score.c (do16_rdrs): Handle not! instruction especially.
220 * config/tc-arm.c (arm_adjust_symtab): Don't use STT_ARM_16BIT
226 * config/tc-arm.c (object_arch): New variable.
227 (s_arm_object_arch): New function.
228 (md_pseudo_table): Add object_arch.
229 (aeabi_set_public_attributes): Obey object_arch.
230 * doc/c-arm.texi: Document .object_arch.
234 * tc-score.c (data_op2): Check invalid operands.
235 (my_get_expression): Const operand of some instructions can not be
237 (get_insn_class_from_type): Handle instruction type Insn_internal.
238 (do_macro_ldst_label): Modify inst.type.
240 (data_op2): The immediate value in lw is 15 bit signed.
244 * config/tc-hppa.c (hppa_cfi_frame_initial_instructions)
245 (hppa_regname_to_dw2regnum): New funcions.
246 * config/tc-hppa.h [OBJ_ELF] (TARGET_USE_CFIPOP): Define.
247 (tc_cfi_frame_initial_instructions)
248 (tc_regname_to_dw2regnum): Define.
249 (hppa_cfi_frame_initial_instructions)
250 (hppa_regname_to_dw2regnum): Declare.
251 (DWARF2_LINE_MIN_INSN_LENGTH, DWARF2_DEFAULT_RETURN_COLUMN)
252 (DWARF2_CIE_DATA_ALIGNMENT): Define.
256 * config/tc-spu.c (md_assemble): Cast printf string size parameter
257 to int in order to avoid a compiler warning.
261 * config/tc-sh.c (md_assemble): Define size of branches.
265 * dw2gencfi.c (cfi_add_CFA_offset):
266 Assert DWARF2_CIE_DATA_ALIGNMENT is non-zero.
268 * write.c (chain_frchains_together_1): Assert that this function
269 never returns a pointer to the auto variable `dummy'.
277 * config/tc-spu.c: New file.
278 * config/tc-spu.h: New file.
279 * configure.tgt: Add SPU support.
280 * Makefile.am: Likewise. Run "make dep-am".
281 * Makefile.in: Regenerate.
282 * po/POTFILES.in: Regenerate.
286 * expr.c (expr): Replace O_add case in switch (op_left) explaining
287 why it can never occur.
291 * doc/c-ppc.texi (-mcell): Document.
292 * config/tc-ppc.c (parse_cpu): Parse -mcell.
293 (md_show_usage): Document -mcell.
297 * doc/c-i386.texi : Document amdfam10,.sse4a and .abm in cpu_type.
301 * config/tc-m68hc11.c (md_assemble): Quiet warning.
305 * config/tc-i386.c (md_parse_option): Use CONST_STRNEQ.
306 (x86_64_section_letter): Likewise.
310 * config/tc-score.c (build_relax_frag): Compute correct
315 * config/tc-sparc.c (md_parse_option): Treat any target starting with
316 elf32-sparc as a viable target for the -32 switch and any target
317 starting with elf64-sparc as a viable target for the -64 switch.
318 (sparc_target_format): For 64-bit ELF flavoured output use
319 ELF_TARGET_FORMAT64 while for 32-bit ELF flavoured output use
321 * config/tc-sparc.h (ELF_TARGET_FORMAT, ELF_TARGET_FORMAT64): Define.
325 * configure: Regenerated.
329 * input-scrub.c (input_scrub_next_buffer): Use TC_EOL_IN_INSN
330 in addition to testing for '\n'.
331 (TC_EOL_IN_INSN): Provide a default definition if necessary.
335 * dwarf2dbg.c (out_debug_info): Use TC_DWARF2_EMIT_OFFSET to emit
336 a disjoint DW_AT range.
340 * config/tc-score.c (md_show_usage): Print -KPIC option usage.
344 * config/tc-arm.c (parse_big_immediate): 64-bit host fix.
345 (parse_operands): Use parse_big_immediate for OP_NILO.
346 (neon_cmode_for_logic_imm): Try smaller element sizes.
347 (neon_cmode_for_move_imm): Ditto.
348 (do_neon_logic): Handle .i64 pseudo-op.
352 * po/POTFILES.in: Regenerate.
356 * config/tc-i386.h (CpuMNI): Renamed to ...
358 (CpuUnknownFlags): Updated.
359 (processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
360 and PROCESSOR_MEROM with PROCESSOR_CORE2.
361 * config/tc-i386.c: Updated.
362 * doc/c-i386.texi: Likewise.
364 * config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
368 * config/tc-arm.c (md_apply_fix): Do not clear write_back bit.
372 * output-file.c (output_file_close): Prevent an infinite loop
373 reporting that stdoutput could not be closed.
380 * config/tc-arm.c (arm_cext_iwmmxt2): New.
381 (enum operand_parse_code): New code OP_RIWR_I32z.
382 (parse_operands): Handle OP_RIWR_I32z.
383 (do_iwmmxt_wmerge): New function.
384 (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
386 (do_iwmmxt_wrwrwr_or_imm5): New function.
387 (insns): Mark instructions as RIWR_I32z as appropriate.
388 Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
389 waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
390 wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
391 wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
392 (md_begin): Handle IWMMXT2.
393 (arm_cpus): Add iwmmxt2.
394 (arm_extensions): Likewise.
395 (arm_archs): Likewise.
399 * doc/as.texinfo (Overview): Revise description of --keep-locals.
400 Add xref to "Symbol Names".
401 (L): Refer to "local symbols" instead of "local labels". Move
402 definition to "Symbol Names" section; add xref to that section.
403 (Symbol Names): Use "Local Symbol Names" section to define local
404 symbols. Add "Local Labels" heading for description of temporary
405 forward/backward labels, and refer to those as "local labels".
410 * config/tc-i386.c (match_template): Check address size prefix
411 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
416 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
420 * as.h (as_perror): Delete declaration.
421 * gdbinit.in (as_perror): Delete breakpoint.
422 * messages.c (as_perror): Delete function.
423 * doc/internals.texi: Remove as_perror description.
424 * listing.c (listing_print: Don't use as_perror.
425 * output-file.c (output_file_create, output_file_close): Likewise.
426 * symbols.c (symbol_create, symbol_clone): Likewise.
427 * write.c (write_contents): Likewise.
428 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
429 * config/tc-tic54x.c (tic54x_mlib): Likewise.
433 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
434 (ppc_handle_align): New function.
435 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
436 (SUB_SEGMENT_ALIGN): Define as zero.
440 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
441 (Overview): Skip cross reference in man page.
445 * configure.in: Add new target x86_64-pc-mingw64.
446 * configure: Regenerate.
447 * configure.tgt: Add new target x86_64-pc-mingw64.
448 * config/obj-coff.h: Add handling for TE_PEP target specific code
450 * config/tc-i386.c: Add new targets.
451 (md_parse_option): Add targets to OPTION_64.
452 (x86_64_target_format): Add new method for setup proper default
454 * config/te-pep.h: Add new target definition header.
455 (TE_PEP): New macro: Identifies new target architecture.
456 (COFF_WITH_pex64): Set proper includes in bfd.
457 * NEWS: Mention new target.
461 * config/bfin-parse.y (binary): Change sub of const to add of negated
466 * config/tc-score.c: New file.
467 * config/tc-score.h: Newf file.
468 * configure.tgt: Add Score target.
469 * Makefile.am: Add Score files.
470 * Makefile.in: Regenerate.
471 * NEWS: Mention new target support.
475 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
476 * doc/c-arm.texi (movsp): Document offset argument.
480 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
481 unsigned int to avoid 64-bit host problems.
485 * config/bfin-parse.y (binary): Do some more constant folding for
490 * input-file.c (input_file_give_next_buffer): Demote as_bad to
496 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
501 * input-file.c (input_file_open): Replace as_perror with as_bad
502 so that gas exits with error on file errors. Correct error
504 (input_file_get, input_file_give_next_buffer): Likewise.
505 * input-file.h: Update comment.
510 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
511 registers as a sub-class of wC registers.
516 * config/tc-mips.h (enum dwarf2_format): Forward declare.
517 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
518 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
519 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
524 * doc/as.texinfo (Macro): Improve documentation about separating
525 macro arguments from following text.
529 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
533 * config/tc-arm.c (parse_operands): Mark operand as present.
537 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
538 (do_neon_dyadic_if_i_d): Avoid setting U bit.
539 (do_neon_mac_maybe_scalar): Ditto.
540 (do_neon_dyadic_narrow): Force operand type to NT_integer.
541 (insns): Remove out of date comments.
545 * read.c (s_align): Initialize the 'stopc' variable to prevent
546 compiler complaints about it being used without being
548 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
549 s_float_space, s_struct, cons_worker, equals): Likewise.
553 * ecoff.c (ecoff_directive_val): Fix message typo.
554 * config/tc-ns32k.c (convert_iif): Likewise.
555 * config/tc-sh64.c (shmedia_check_limits): Likewise.
560 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
561 the state of the absolute_literals directive. Remove align frag at
562 the start of the literal pool position.
566 * doc/c-xtensa.texi: Add @group commands in examples.
570 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
571 (INIT_LITERAL_SECTION_NAME): Delete.
572 (lit_state struct): Remove segment names, init_lit_seg, and
573 fini_lit_seg. Add lit_prefix and current_text_seg.
574 (init_literal_head_h, init_literal_head): Delete.
575 (fini_literal_head_h, fini_literal_head): Delete.
576 (xtensa_begin_directive): Move argument parsing to
577 xtensa_literal_prefix function.
578 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
579 (xtensa_literal_prefix): Parse the directive argument here and
580 record it in the lit_prefix field. Remove code to derive literal
583 (get_is_linkonce_section): Use linkonce_len. Check for any
584 ".gnu.linkonce.*" section, not just text sections.
585 (md_begin): Remove initialization of deleted lit_state fields.
586 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
587 to init_literal_head and fini_literal_head.
588 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
589 when traversing literal_head list.
590 (match_section_group): New.
591 (cache_literal_section): Rewrite to determine the literal section
592 name on the fly, create the section and return it.
593 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
594 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
595 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
596 Use xtensa_get_property_section from bfd.
597 (retrieve_xtensa_section): Delete.
598 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
599 description to refer to plural literal sections and add xref to
600 the Literal Directive section.
601 (Literal Directive): Describe new rules for deriving literal section
602 names. Add footnote for special case of .init/.fini with
603 --text-section-literals.
604 (Literal Prefix Directive): Replace old naming rules with xref to the
605 Literal Directive section.
609 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
610 merging with previous long opcode.
614 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
615 * Makefile.in: Regenerate.
616 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
621 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
622 to use ARM instructions on non-ARM-supporting cores.
623 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
624 mode automatically based on cpu variant.
625 (md_begin): Call above function.
629 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
630 recognized in non-unified syntax mode.
636 * configure.tgt: Handle mips*-sde-elf*.
640 * config/tc-mips.c (mips16_ip): Fix argument register handling
641 for restore instruction.
645 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
647 (out_fixed_inc_line_addr): New.
648 (process_entries): Use out_fixed_inc_line_addr when
649 DWARF2_USE_FIXED_ADVANCE_PC is set.
650 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
654 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
655 vs full symbols so that we never have more than one pointer value
656 for any given symbol in our symbol table.
660 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
661 and emit DW_AT_ranges when code in compilation unit is not
663 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
665 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
666 (out_debug_ranges): New function to emit .debug_ranges section
667 when code is not contiguous.
671 * config/tc-arm.c (WARN_DEPRECATED): Enable.
675 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
677 (pe_directive_secrel) [TE_PE]: New function.
678 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
679 loc, loc_mark_labels.
680 [TE_PE]: Handle secrel32.
681 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
683 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
684 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
685 (md_section_align): Only round section sizes here for AOUT
687 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
688 (tc_pe_dwarf2_emit_offset): New function.
689 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
690 (cons_fix_new_arm): Handle O_secrel.
691 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
692 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
693 of OBJ_ELF only block.
694 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
695 tc_pe_dwarf2_emit_offset.
699 * config/tc-sh.c (apply_full_field_fix): New function.
700 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
701 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
702 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
703 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
708 * config.in: Regenerate.
712 * config/tc-arm.c (parse_operands): Handle invalid register name
717 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
718 (parse_operands): Handle it.
719 (insns): Use it for tmcr and tmrc.
724 * config/tc-i386.c (md_parse_option): Treat any target starting
725 with elf64_x86_64 as a viable target for the -64 switch.
726 (i386_target_format): For 64-bit ELF flavoured output use
728 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
733 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
735 * configure.in: Run BFD_BINARY_FOPEN.
736 * configure: Regenerate.
737 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
742 * config/tc-i386.c (md_assemble): Don't update
747 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
751 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
752 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
753 BFD_RELOC_32 and BFD_RELOC_16.
754 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
755 md_convert_frag, md_obj_end): Fix comment formatting.
759 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
760 handling for BFD_RELOC_MIPS16_JMP.
765 * read.c (read_a_source_file): Ignore unknown text after line
766 comment character. Fix misleading comment.
770 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
771 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
772 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
773 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
774 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
775 doc/c-z80.texi, doc/internals.texi: Fix some typos.
779 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
785 * config/tc-mips.c (md_parse_option): Don't infer optimisation
786 options from debug options.
790 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
791 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
795 * config/tc-arm.c (insns): Fix rbit Arm opcode.
799 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
800 (md_convert_frag): Use correct reloc for add_pc. Use
801 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
802 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
803 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
807 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
808 when file and line unknown.
812 * read.c (s_struct): Use IS_ELF.
813 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
814 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
815 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
816 s_mips_mask): Likewise.
821 * read.c (s_struct): Handle ELF section changing.
822 * config/tc-mips.c (s_align): Leave enabling auto-align to the
824 (s_change_sec): Try section changing only if we output ELF.
828 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
830 (smallest_imm_type): Remove Cpu086.
831 (i386_target_format): Likewise.
833 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
839 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
840 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
841 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
843 (i386_align_code): Ditto.
844 (md_assemble_code): Add support for insertq/extrq instructions,
845 swapping as needed for intel syntax.
846 (swap_imm_operands): New function to swap immediate operands.
847 (swap_operands): Deal with 4 operand instructions.
848 (build_modrm_byte): Add support for insertq instruction.
852 * config/tc-i386.h (Size64): Fix a typo in comment.
856 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
857 fixup_segment() to repeat a range check on a value that has
858 already been checked here.
862 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
868 * doc/as.texi: Fix spelling typo: branchs => branches.
869 * doc/c-m68hc11.texi: Likewise.
870 * config/tc-m68hc11.c: Likewise.
871 Support old spelling of command line switch for backwards
877 * config/tc-mips.c (s_is_linkonce): New function.
878 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
879 weak, external, and linkonce symbols.
880 (pic_need_relax): Use s_is_linkonce.
884 * doc/as.texinfo (Org): Remove space.
885 (P2align): Add "@var{abs-expr},".
889 * config/tc-i386.c (cpu_arch_tune_set): New.
890 (cpu_arch_isa): Likewise.
891 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
892 nops with short or long nop sequences based on -march=/.arch
894 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
895 set cpu_arch_tune and cpu_arch_tune_flags.
896 (md_parse_option): For -march=, set cpu_arch_isa and set
897 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
898 0. Set cpu_arch_tune_set to 1 for -mtune=.
899 (i386_target_format): Don't set cpu_arch_tune.
903 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
904 generated .sbss.* and .gnu.linkonce.sb.*.
909 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
911 * config/tc-mips.c (label_list): Define per-segment label_list.
912 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
913 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
914 mips_from_file_after_relocs, mips_define_label): Use per-segment
919 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
920 (append_insn): Use it.
921 (md_apply_fix): Whitespace formatting.
922 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
923 mips16_extended_frag): Remove register specifier.
924 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
929 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
930 a directive saving VFP registers for ARMv6 or later.
931 (s_arm_unwind_save): Add parameter arch_v6 and call
932 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
934 (md_pseudo_table): Add entry for new "vsave" directive.
935 * doc/c-arm.texi: Correct error in example for "save"
936 directive (fstmdf -> fstmdx). Also document "vsave" directive.
941 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
942 and atmega644p devices. Rename atmega164/atmega324 devices to
943 atmega164p/atmega324p.
944 * doc/c-avr.texi: Document new mcu and arch options.
948 * config/tc-arm.c (enum parse_operand_result): Move outside of
949 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
953 * config/tc-i386.h (processor_type): New.
954 (arch_entry): Add type.
956 * config/tc-i386.c (cpu_arch_tune): New.
957 (cpu_arch_tune_flags): Likewise.
958 (cpu_arch_isa_flags): Likewise.
960 (set_cpu_arch): Also update cpu_arch_isa_flags.
961 (md_assemble): Update cpu_arch_isa_flags.
963 (OPTION_MTUNE): Likewise.
964 (md_longopts): Add -march= and -mtune=.
965 (md_parse_option): Support -march= and -mtune=.
966 (md_show_usage): Add -march=CPU/-mtune=CPU.
967 (i386_target_format): Also update cpu_arch_isa_flags,
968 cpu_arch_tune and cpu_arch_tune_flags.
970 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
972 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
976 * config/tc-arm.c (enum parse_operand_result): New.
977 (struct group_reloc_table_entry): New.
978 (enum group_reloc_type): New.
979 (group_reloc_table): New array.
980 (find_group_reloc_table_entry): New function.
981 (parse_shifter_operand_group_reloc): New function.
982 (parse_address_main): New function, incorporating code
983 from the old parse_address function. To be used via...
984 (parse_address): wrapper for parse_address_main; and
985 (parse_address_group_reloc): new function, likewise.
986 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
987 OP_ADDRGLDRS, OP_ADDRGLDC.
988 (parse_operands): Support for these new operand codes.
989 New macro po_misc_or_fail_no_backtrack.
990 (encode_arm_cp_address): Preserve group relocations.
991 (insns): Modify to use the above operand codes where group
992 relocations are permitted.
993 (md_apply_fix): Handle the group relocations
994 ALU_PC_G0_NC through LDC_SB_G2.
995 (tc_gen_reloc): Likewise.
996 (arm_force_relocation): Leave group relocations for the linker.
997 (arm_fix_adjustable): Likewise.
1001 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
1002 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
1007 * config/tc-i386.c (process_suffix): Don't add rex64 for
1012 * config/tc-mips.c (mips_ip): Maintain argument count.
1016 * config/tc-iq2000.c: Include sb.h.
1020 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
1021 aliases for better compatibility with SGI tools.
1025 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
1026 * Makefile.am (GASLIBS): Expand @BFDLIB@.
1028 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
1029 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
1030 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
1032 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
1033 * Makefile.in: Regenerate.
1034 * doc/Makefile.in: Regenerate.
1035 * configure: Regenerate.
1039 * po/Make-in (pdf, ps): New dummy targets.
1043 * config/tc-arm.c (stdarg.h): include.
1044 (arm_it): Add uncond_value field. Add isvec and issingle to operand
1046 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
1047 REG_TYPE_NSDQ (single, double or quad vector reg).
1048 (reg_expected_msgs): Update.
1049 (BAD_FPU): Add macro for unsupported FPU instruction error.
1050 (parse_neon_type): Support 'd' as an alias for .f64.
1051 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
1053 (parse_vfp_reg_list): Don't update first arg on error.
1054 (parse_neon_mov): Support extra syntax for VFP moves.
1055 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
1056 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
1057 (parse_operands): Support isvec, issingle operands fields, new parse
1059 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
1061 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
1062 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
1063 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
1064 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
1066 (neon_shape): Redefine in terms of above.
1067 (neon_shape_class): New enumeration, table of shape classes.
1068 (neon_shape_el): New enumeration. One element of a shape.
1069 (neon_shape_el_size): Register widths of above, where appropriate.
1070 (neon_shape_info): New struct. Info for shape table.
1071 (neon_shape_tab): New array.
1072 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
1073 (neon_check_shape): Rewrite as...
1074 (neon_select_shape): New function to classify instruction shapes,
1075 driven by new table neon_shape_tab array.
1076 (neon_quad): New function. Return 1 if shape should set Q flag in
1077 instructions (or equivalent), 0 otherwise.
1078 (type_chk_of_el_type): Support F64.
1079 (el_type_of_type_chk): Likewise.
1080 (neon_check_type): Add support for VFP type checking (VFP data
1081 elements fill their containing registers).
1082 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
1083 in thumb mode for VFP instructions.
1084 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
1085 and encode the current instruction as if it were that opcode.
1086 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
1087 arguments, call function in PFN.
1088 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
1089 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
1090 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
1091 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
1092 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
1093 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
1094 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
1095 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
1096 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
1097 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
1098 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
1099 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
1100 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
1101 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
1102 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
1104 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
1105 between VFP and Neon turns out to belong to Neon. Perform
1106 architecture check and fill in condition field if appropriate.
1107 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
1108 (do_neon_cvt): Add support for VFP variants of instructions.
1109 (neon_cvt_flavour): Extend to cover VFP conversions.
1110 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
1112 (do_neon_ldr_str): Handle single-precision VFP load/store.
1113 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
1114 NS_NULL not NS_IGNORE.
1115 (opcode_tag): Add OT_csuffixF for operands which either take a
1116 conditional suffix, or have 0xF in the condition field.
1117 (md_assemble): Add support for OT_csuffixF.
1118 (NCE): Replace macro with...
1119 (NCE_tag, NCE, NCEF): New macros.
1120 (nCE): Replace macro with...
1121 (nCE_tag, nCE, nCEF): New macros.
1122 (insns): Add support for VFP insns or VFP versions of insns msr,
1123 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
1124 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
1125 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
1126 VFP/Neon insns together.
1131 * app.c: Don't include headers already included by as.h.
1133 * atof-generic.c: Likewise.
1135 * dwarf2dbg.c: Likewise.
1137 * input-file.c: Likewise.
1138 * input-scrub.c: Likewise.
1139 * macro.c: Likewise.
1140 * output-file.c: Likewise.
1143 * config/bfin-lex.l: Likewise.
1144 * config/obj-coff.h: Likewise.
1145 * config/obj-elf.h: Likewise.
1146 * config/obj-som.h: Likewise.
1147 * config/tc-arc.c: Likewise.
1148 * config/tc-arm.c: Likewise.
1149 * config/tc-avr.c: Likewise.
1150 * config/tc-bfin.c: Likewise.
1151 * config/tc-cris.c: Likewise.
1152 * config/tc-d10v.c: Likewise.
1153 * config/tc-d30v.c: Likewise.
1154 * config/tc-dlx.h: Likewise.
1155 * config/tc-fr30.c: Likewise.
1156 * config/tc-frv.c: Likewise.
1157 * config/tc-h8300.c: Likewise.
1158 * config/tc-hppa.c: Likewise.
1159 * config/tc-i370.c: Likewise.
1160 * config/tc-i860.c: Likewise.
1161 * config/tc-i960.c: Likewise.
1162 * config/tc-ip2k.c: Likewise.
1163 * config/tc-iq2000.c: Likewise.
1164 * config/tc-m32c.c: Likewise.
1165 * config/tc-m32r.c: Likewise.
1166 * config/tc-maxq.c: Likewise.
1167 * config/tc-mcore.c: Likewise.
1168 * config/tc-mips.c: Likewise.
1169 * config/tc-mmix.c: Likewise.
1170 * config/tc-mn10200.c: Likewise.
1171 * config/tc-mn10300.c: Likewise.
1172 * config/tc-msp430.c: Likewise.
1173 * config/tc-mt.c: Likewise.
1174 * config/tc-ns32k.c: Likewise.
1175 * config/tc-openrisc.c: Likewise.
1176 * config/tc-ppc.c: Likewise.
1177 * config/tc-s390.c: Likewise.
1178 * config/tc-sh.c: Likewise.
1179 * config/tc-sh64.c: Likewise.
1180 * config/tc-sparc.c: Likewise.
1181 * config/tc-tic30.c: Likewise.
1182 * config/tc-tic4x.c: Likewise.
1183 * config/tc-tic54x.c: Likewise.
1184 * config/tc-v850.c: Likewise.
1185 * config/tc-vax.c: Likewise.
1186 * config/tc-xc16x.c: Likewise.
1187 * config/tc-xstormy16.c: Likewise.
1188 * config/tc-xtensa.c: Likewise.
1189 * config/tc-z80.c: Likewise.
1190 * config/tc-z8k.c: Likewise.
1191 * macro.h: Don't include sb.h or ansidecl.h.
1192 * sb.h: Don't include stdio.h or ansidecl.h.
1193 * cond.c: Include sb.h.
1194 * itbl-lex.l: Include as.h instead of other system headers.
1195 * itbl-parse.y: Likewise.
1196 * itbl-ops.c: Similarly.
1197 * itbl-ops.h: Don't include as.h or ansidecl.h.
1198 * config/bfin-defs.h: Don't include bfd.h or as.h.
1199 * config/bfin-parse.y: Include as.h instead of other system headers.
1204 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
1205 (md_show_usage): Document it.
1206 (ppc_setup_opcodes): Test power6 opcode flag bits.
1207 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
1212 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
1213 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
1214 (macro_build): Update comment.
1215 (mips_ip): Allow DSP64 instructions for MIPS64R2.
1216 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
1218 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
1219 MIPS_CPU_ASE_MDMX flags for sb1.
1223 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
1225 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
1226 (mips_ip): Make overflowed/underflowed constant arguments in DSP
1227 and MT instructions a fatal error. Use INSERT_OPERAND where
1228 appropriate. Improve warnings for break and wait code overflows.
1229 Use symbolic constant of OP_MASK_COPZ.
1230 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
1234 * po/Make-in (top_builddir): Define.
1238 * doc/Makefile.am (TEXI2DVI): Define.
1239 * doc/Makefile.in: Regenerate.
1240 * doc/c-arc.texi: Fix typo.
1244 * config/obj-ieee.c: Delete.
1245 * config/obj-ieee.h: Delete.
1246 * Makefile.am (OBJ_FORMATS): Remove ieee.
1247 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
1248 (obj-ieee.o): Remove rule.
1249 * Makefile.in: Regenerate.
1250 * configure.in (atof): Remove tahoe.
1251 (OBJ_MAYBE_IEEE): Don't define.
1252 * configure: Regenerate.
1253 * config.in: Regenerate.
1254 * doc/Makefile.in: Regenerate.
1255 * po/POTFILES.in: Regenerate.
1259 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
1260 and LIBINTL_DEP everywhere.
1262 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
1263 * acinclude.m4: Include new gettext macros.
1264 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
1265 Remove local code for po/Makefile.
1266 * Makefile.in, configure, doc/Makefile.in: Regenerated.
1270 * po/es.po: Updated Spanish translation.
1274 * doc/c-avr.texi: New file.
1275 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
1276 * doc/all.texi: Set AVR
1277 * doc/as.texinfo: Include c-avr.texi
1281 * config/bfin-parse.y (check_macfunc): Loose the condition of
1282 calling check_multiply_halfregs ().
1286 * config/bfin-parse.y (asm_1): Better check and deal with
1287 vector and scalar Multiply 16-Bit Operands instructions.
1291 * config/tc-hppa.c: Convert to ISO C90 format.
1292 * config/tc-hppa.h: Likewise.
1297 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
1298 is_tls_ieoff, is_tls_leoff): Define.
1299 (fix_new_hppa): Handle TLS.
1300 (cons_fix_new_hppa): Likewise.
1302 (md_apply_fix): Handle TLS relocs.
1303 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
1307 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
1314 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
1315 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
1316 ISA_HAS_MXHC1): New macros.
1317 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
1318 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
1319 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
1320 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
1321 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
1322 (mips_after_parse_args): Change default handling of float register
1323 size to account for 32bit code with 64bit FP. Better sanity checking
1324 of ISA/ASE/ABI option combinations.
1325 (s_mipsset): Support switching of GPR and FPR sizes via
1326 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
1328 (mips_elf_final_processing): We should record the use of 64bit FP
1329 registers in 32bit code but we don't, because ELF header flags are
1331 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
1332 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
1333 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
1334 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
1335 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
1336 missing -march options. Document .set arch=CPU. Move .set smartmips
1337 to ASE page. Use @code for .set FOO examples.
1341 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
1346 * config/bfin-defs.h (bfin_equals): Remove declaration.
1347 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
1348 * config/tc-bfin.c (bfin_name_is_register): Remove.
1349 (bfin_equals): Remove.
1350 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
1351 (bfin_name_is_register): Remove declaration.
1356 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
1357 (mips_oddfpreg_ok): New function.
1363 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
1364 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
1365 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
1366 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
1367 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
1368 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
1369 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
1370 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
1371 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
1372 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
1373 reg_names_o32, reg_names_n32n64): Define register classes.
1374 (reg_lookup): New function, use register classes.
1375 (md_begin): Reserve register names in the symbol table. Simplify
1377 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
1379 (mips16_ip): Use reg_lookup.
1380 (tc_get_register): Likewise.
1381 (tc_mips_regname_to_dw2regnum): New function.
1385 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
1386 Un-constify string argument.
1387 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
1389 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
1391 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
1393 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
1395 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
1397 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
1402 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
1403 cfloat/m68881 to correct architecture before using it.
1407 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
1412 * config/tc-arm.c (arm_adjust_symtab): Use
1413 bfd_is_arm_special_symbol_name.
1417 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1418 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1419 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1420 Handle errors from calls to xtensa_opcode_is_* functions.
1424 * config/tc-mips.c (macro_build): Test for currently active
1426 (mips16_ip): Reject invalid opcodes.
1430 * doc/as.texinfo: Rename "Index" to "AS Index",
1431 and "ABORT" to "ABORT (COFF)".
1435 * config/tc-arm.c (parse_half): New function.
1436 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1437 (parse_operands): Ditto.
1438 (do_mov16): Reject invalid relocations.
1439 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1440 (insns): Replace Iffff with HALF.
1441 (md_apply_fix): Add MOVW and MOVT relocs.
1442 (tc_gen_reloc): Ditto.
1443 * doc/c-arm.texi: Document relocation operators
1447 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1451 * config/tc-mips.c (append_insn): Don't check the range of j or
1456 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
1457 relocs against external symbols for WinCE targets.
1458 (md_apply_fix): Likewise.
1462 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1467 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1468 against symbols which are not going to be placed into the symbol
1473 * expr.c (operand): Remove `if (0 && ..)' statement and
1474 subsequently unused target_op label. Collapse `if (1 || ..)'
1476 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1477 separately above the switch.
1482 * config/tc-msp430.c (line_separator_character): Define as |.
1488 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1489 (mips_opts): Likewise.
1490 (file_ase_smartmips): New variable.
1491 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1492 (macro_build): Handle SmartMIPS instructions.
1493 (mips_ip): Likewise.
1494 (md_longopts): Add argument handling for smartmips.
1495 (md_parse_options, mips_after_parse_args): Likewise.
1496 (s_mipsset): Add .set smartmips support.
1497 (md_show_usage): Document -msmartmips/-mno-smartmips.
1498 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1500 * doc/c-mips.texi: Likewise.
1504 * write.c (relax_segment): Add pass count arg. Don't error on
1505 negative org/space on first two passes.
1506 (relax_seg_info): New struct.
1507 (relax_seg, write_object_file): Adjust.
1508 * write.h (relax_segment): Update prototype.
1512 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1514 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1515 architecture version checks.
1516 (insns): Allow overlapping instructions to be used in VFP mode.
1521 * config/obj-elf.c (obj_elf_change_section): Allow user
1522 specified SHF_ALPHA_GPREL.
1526 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1527 for PMEM related expressions.
1532 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1533 insertion of a directory separator character into a string at a
1534 given offset. Uses heuristics to decide when to use a backslash
1535 character rather than a forward-slash character.
1536 (dwarf2_directive_loc): Use the macro.
1537 (out_debug_info): Likewise.
1542 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1544 (macro): Add new case M_CACHE_AB.
1548 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1549 (opcode_lookup): Issue a warning for opcode with
1550 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1551 identical to OT_cinfix3.
1552 (TxC3w, TC3w, tC3w): New.
1553 (insns): Use tC3w and TC3w for comparison instructions with
1558 * subsegs.h (struct frchain): Delete frch_seg.
1559 (frchain_root): Delete.
1560 (seg_info): Define as macro.
1561 * subsegs.c (frchain_root): Delete.
1562 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1563 (subsegs_begin, subseg_change): Adjust for above.
1564 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1565 rather than to one big list.
1566 (subseg_get): Don't special case abs, und sections.
1567 (subseg_new, subseg_force_new): Don't set frchainP here.
1569 (subsegs_print_statistics): Adjust frag chain control list traversal.
1570 * debug.c (dmp_frags): Likewise.
1571 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1572 at frchain_root. Make use of known frchain ordering.
1573 (last_frag_for_seg): Likewise.
1574 (get_frag_fix): Likewise. Add seg param.
1575 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1576 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1577 (SUB_SEGMENT_ALIGN): Likewise.
1578 (subsegs_finish): Adjust frchain list traversal.
1579 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1580 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1581 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1582 (xtensa_fix_b_j_loop_end_frags): Likewise.
1583 (xtensa_fix_close_loop_end_frags): Likewise.
1584 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1585 (retrieve_segment_info): Delete frch_seg initialisation.
1589 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1590 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1591 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1592 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1596 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1598 (md_apply_fix3): Multiply offset by 4 here for
1599 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1604 * config/tc-i386.c (output_invalid_buf): Change size for
1606 * config/tc-tic30.c (output_invalid_buf): Likewise.
1608 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1610 * config/tc-tic30.c (output_invalid): Likewise.
1614 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1615 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1616 (asconfig.texi): Don't set top_srcdir.
1617 * doc/as.texinfo: Don't use top_srcdir.
1618 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1622 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1623 * config/tc-tic30.c (output_invalid_buf): Likewise.
1625 * config/tc-i386.c (output_invalid): Use snprintf instead of
1627 * config/tc-ia64.c (declare_register_set): Likewise.
1628 (emit_one_bundle): Likewise.
1629 (check_dependencies): Likewise.
1630 * config/tc-tic30.c (output_invalid): Likewise.
1634 * config/tc-arm.c (arm_optimize_expr): New function.
1635 * config/tc-arm.h (md_optimize_expr): Define
1636 (arm_optimize_expr): Add prototype.
1637 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1641 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1644 * sb.h (sb_list_vector): Move to sb.c.
1645 * sb.c (free_list): Use type of sb_list_vector directly.
1646 (sb_build): Fix off-by-one error in assertion about `size'.
1650 * listing.c (listing_listing): Remove useless loop.
1651 * macro.c (macro_expand): Remove is_positional local variable.
1652 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1653 and simplify surrounding expressions, where possible.
1654 (assign_symbol): Likewise.
1655 (s_weakref): Likewise.
1656 * symbols.c (colon): Likewise.
1660 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1665 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1666 (mips_immed): New table that records various handling of udi
1667 instruction patterns.
1668 (mips_ip): Adds udi handling.
1672 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1673 of list rather than beginning.
1677 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1678 (is_quarter_float): Rename from above. Simplify slightly.
1679 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1681 (parse_neon_mov): Parse floating-point constants.
1682 (neon_qfloat_bits): Fix encoding.
1683 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1684 preference to integer encoding when using the F32 type.
1688 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1689 zero-initialising structures containing it will lead to invalid types).
1690 (arm_it): Add vectype to each operand.
1691 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1693 (neon_typed_alias): New structure. Extra information for typed
1695 (reg_entry): Add neon type info field.
1696 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1697 Break out alternative syntax for coprocessor registers, etc. into...
1698 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1699 out from arm_reg_parse.
1700 (parse_neon_type): Move. Return SUCCESS/FAIL.
1701 (first_error): New function. Call to ensure first error which occurs is
1703 (parse_neon_operand_type): Parse exactly one type.
1704 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1705 (parse_typed_reg_or_scalar): New function. Handle core of both
1706 arm_typed_reg_parse and parse_scalar.
1707 (arm_typed_reg_parse): Parse a register with an optional type.
1708 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1710 (parse_scalar): Parse a Neon scalar with optional type.
1711 (parse_reg_list): Use first_error.
1712 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1713 (neon_alias_types_same): New function. Return true if two (alias) types
1715 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1717 (insert_reg_alias): Return new reg_entry not void.
1718 (insert_neon_reg_alias): New function. Insert type/index information as
1719 well as register for alias.
1720 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1721 make typed register aliases accordingly.
1722 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1724 (s_unreq): Delete type information if present.
1725 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1726 (s_arm_unwind_save_mmxwcg): Likewise.
1727 (s_arm_unwind_movsp): Likewise.
1728 (s_arm_unwind_setfp): Likewise.
1729 (parse_shift): Likewise.
1730 (parse_shifter_operand): Likewise.
1731 (parse_address): Likewise.
1732 (parse_tb): Likewise.
1733 (tc_arm_regname_to_dw2regnum): Likewise.
1734 (md_pseudo_table): Add dn, qn.
1735 (parse_neon_mov): Handle typed operands.
1736 (parse_operands): Likewise.
1737 (neon_type_mask): Add N_SIZ.
1738 (N_ALLMODS): New macro.
1739 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1740 (el_type_of_type_chk): Add some safeguards.
1741 (modify_types_allowed): Fix logic bug.
1742 (neon_check_type): Handle operands with types.
1743 (neon_three_same): Remove redundant optional arg handling.
1744 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1745 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1746 (do_neon_step): Adjust accordingly.
1747 (neon_cmode_for_logic_imm): Use first_error.
1748 (do_neon_bitfield): Call neon_check_type.
1749 (neon_dyadic): Rename to...
1750 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1751 to allow modification of type of the destination.
1752 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1753 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1754 (do_neon_compare): Make destination be an untyped bitfield.
1755 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1756 (neon_mul_mac): Return early in case of errors.
1757 (neon_move_immediate): Use first_error.
1758 (neon_mac_reg_scalar_long): Fix type to include scalar.
1759 (do_neon_dup): Likewise.
1760 (do_neon_mov): Likewise (in several places).
1761 (do_neon_tbl_tbx): Fix type.
1762 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1763 (do_neon_ld_dup): Exit early in case of errors and/or use
1765 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1766 Handle .dn/.qn directives.
1767 (REGDEF): Add zero for reg_entry neon field.
1771 * config/tc-arm.c (limits.h): Include.
1772 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1773 (fpu_vfp_v3_or_neon_ext): Declare constants.
1774 (neon_el_type): New enumeration of types for Neon vector elements.
1775 (neon_type_el): New struct. Define type and size of a vector element.
1776 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1778 (neon_type): Define struct. The type of an instruction.
1779 (arm_it): Add 'vectype' for the current instruction.
1780 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1781 (vfp_sp_reg_pos): Rename to...
1782 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1784 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1785 (Neon D or Q register).
1786 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1788 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1789 (my_get_expression): Allow above constant as argument to accept
1790 64-bit constants with optional prefix.
1791 (arm_reg_parse): Add extra argument to return the specific type of
1792 register in when either a D or Q register (REG_TYPE_NDQ) is
1793 requested. Can be NULL.
1794 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1795 (parse_reg_list): Update for new arm_reg_parse args.
1796 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1797 (parse_neon_el_struct_list): New function. Parse element/structure
1798 register lists for VLD<n>/VST<n> instructions.
1799 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1800 (s_arm_unwind_save_mmxwr): Likewise.
1801 (s_arm_unwind_save_mmxwcg): Likewise.
1802 (s_arm_unwind_movsp): Likewise.
1803 (s_arm_unwind_setfp): Likewise.
1804 (parse_big_immediate): New function. Parse an immediate, which may be
1805 64 bits wide. Put results in inst.operands[i].
1806 (parse_shift): Update for new arm_reg_parse args.
1807 (parse_address): Likewise. Add parsing of alignment specifiers.
1808 (parse_neon_mov): Parse the operands of a VMOV instruction.
1809 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1810 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1811 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1812 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1813 (parse_operands): Handle new codes above.
1814 (encode_arm_vfp_sp_reg): Rename to...
1815 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1816 selected VFP version only supports D0-D15.
1817 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1818 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1819 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1820 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1821 encode_arm_vfp_reg name, and allow 32 D regs.
1822 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1823 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1825 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1826 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1827 constant-load and conversion insns introduced with VFPv3.
1828 (neon_tab_entry): New struct.
1829 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1830 those which are the targets of pseudo-instructions.
1831 (neon_opc): Enumerate opcodes, use as indices into...
1832 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1833 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1834 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1835 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1837 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1839 (neon_type_mask): New. Compact type representation for type checking.
1840 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1841 permitted type combinations.
1842 (N_IGNORE_TYPE): New macro.
1843 (neon_check_shape): New function. Check an instruction shape for
1844 multiple alternatives. Return the specific shape for the current
1846 (neon_modify_type_size): New function. Modify a vector type and size,
1847 depending on the bit mask in argument 1.
1848 (neon_type_promote): New function. Convert a given "key" type (of an
1849 operand) into the correct type for a different operand, based on a bit
1851 (type_chk_of_el_type): New function. Convert a type and size into the
1852 compact representation used for type checking.
1853 (el_type_of_type_ckh): New function. Reverse of above (only when a
1854 single bit is set in the bit mask).
1855 (modify_types_allowed): New function. Alter a mask of allowed types
1856 based on a bit mask of modifications.
1857 (neon_check_type): New function. Check the type of the current
1858 instruction against the variable argument list. The "key" type of the
1859 instruction is returned.
1860 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1861 a Neon data-processing instruction depending on whether we're in ARM
1862 mode or Thumb-2 mode.
1863 (neon_logbits): New function.
1864 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1865 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1866 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1867 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1868 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1869 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1870 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1871 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1872 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1873 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1874 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1875 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1876 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1877 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1878 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1879 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1880 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1881 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1882 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1883 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1884 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1885 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1886 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1887 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1888 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1890 (parse_neon_type): New function. Parse Neon type specifier.
1891 (opcode_lookup): Allow parsing of Neon type specifiers.
1892 (REGNUM2, REGSETH, REGSET2): New macros.
1893 (reg_names): Add new VFPv3 and Neon registers.
1894 (NUF, nUF, NCE, nCE): New macros for opcode table.
1895 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1896 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1897 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1898 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1899 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1900 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1901 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1902 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1903 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1904 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1905 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1906 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1907 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1908 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1910 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1911 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1912 (arm_option_cpu_value): Add vfp3 and neon.
1913 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1918 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1919 syntax instead of hardcoded opcodes with ".w18" suffixes.
1920 (wide_branch_opcode): New.
1921 (build_transition): Use it to check for wide branch opcodes with
1922 either ".w18" or ".w15" suffixes.
1926 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1927 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1928 frag's is_literal flag.
1932 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1936 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1937 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1938 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1939 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1940 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1944 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1946 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1950 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1951 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1952 Make some cpus unsupported on ELF. Run "make dep-am".
1953 * Makefile.in: Regenerate.
1957 * configure.in (--enable-targets): Indent help message.
1958 * configure: Regenerate.
1963 * config/tc-i386.c (i386_immediate): Check illegal immediate
1968 * config/tc-i386.c: Formatting.
1969 (output_disp, output_imm): ISO C90 params.
1971 * frags.c (frag_offset_fixed_p): Constify args.
1972 * frags.h (frag_offset_fixed_p): Ditto.
1974 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1975 (COFF_MAGIC): Delete.
1977 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1981 * po/POTFILES.in: Regenerated.
1985 * doc/as.texinfo: Mention that some .type syntaxes are not
1986 supported on all architectures.
1990 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1991 instructions when such transformations have been disabled.
1995 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1996 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1997 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1998 decoding the loop instructions. Remove current_offset variable.
1999 (xtensa_fix_short_loop_frags): Likewise.
2000 (min_bytes_to_other_loop_end): Remove current_offset argument.
2004 * config/tc-z80.c (z80_optimize_expr): Removed.
2005 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
2009 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
2010 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
2011 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
2012 atmega644, atmega329, atmega3290, atmega649, atmega6490,
2013 atmega406, atmega640, atmega1280, atmega1281, at90can32,
2014 at90can64, at90usb646, at90usb647, at90usb1286 and
2016 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
2020 * config/tc-arm.c (parse_operands): Set default error message.
2024 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
2028 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
2032 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
2033 (move_or_literal_pool): Handle Thumb-2 instructions.
2034 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
2039 * config/tc-i386.c (match_template): Move 64-bit operand tests
2044 * po/Make-in: Add install-html target.
2045 * Makefile.am: Add install-html and install-html-recursive targets.
2046 * Makefile.in: Regenerate.
2047 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
2048 * configure: Regenerate.
2049 * doc/Makefile.am: Add install-html and install-html-am targets.
2050 * doc/Makefile.in: Regenerate.
2054 * frags.c (frag_offset_fixed_p): Reinitialise offset before
2060 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
2061 (GOTT_BASE, GOTT_INDEX): New.
2062 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
2063 GOTT_INDEX when generating VxWorks PIC.
2064 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
2065 use the generic *-*-vxworks* stanza instead.
2070 * frags.c (frag_offset_fixed_p): New function.
2071 * frags.h (frag_offset_fixed_p): Declare.
2072 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
2073 (resolve_expression): Likewise.
2077 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
2078 of the same length but different numbers of slots.
2082 * configure.in: Fix help string for --enable-targets option.
2083 * configure: Regenerate.
2087 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
2088 (m68k_ip): ... here. Use for all chips. Protect against buffer
2089 overrun and avoid excessive copying.
2091 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
2092 m68020_control_regs, m68040_control_regs, m68060_control_regs,
2093 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
2094 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
2095 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
2096 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
2097 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
2098 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
2099 mcf5282_ctrl, mcfv4e_ctrl): ... these.
2100 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
2101 (struct m68k_cpu): Change chip field to control_regs.
2102 (current_chip): Remove.
2103 (control_regs): New.
2104 (m68k_archs, m68k_extensions): Adjust.
2105 (m68k_cpus): Reorder to be in cpu number order. Adjust.
2106 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
2107 (find_cf_chip): Reimplement for new organization of cpu table.
2108 (select_control_regs): Remove.
2110 (struct save_opts): Save control regs, not chip.
2111 (s_save, s_restore): Adjust.
2112 (m68k_lookup_cpu): Give deprecated warning when necessary.
2113 (m68k_init_arch): Adjust.
2114 (md_show_usage): Adjust for new cpu table organization.
2118 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
2119 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
2120 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
2122 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
2123 (any_gotrel): New rule.
2124 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
2125 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
2127 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
2128 (bfin_pic_ptr): New function.
2129 (md_pseudo_table): Add it for ".picptr".
2130 (OPTION_FDPIC): New macro.
2131 (md_longopts): Add -mfdpic.
2132 (md_parse_option): Handle it.
2133 (md_begin): Set BFD flags.
2134 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
2135 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
2137 * Makefile.am (bfin-parse.o): Update dependencies.
2138 (DEPTC_bfin_elf): Likewise.
2139 * Makefile.in: Regenerate.
2143 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
2144 mcfemac instead of mcfmac.
2148 * config/tc-i386.c (type_names): Correct placement of 'static'.
2149 (reloc): Map some more relocs to their 64 bit counterpart when
2151 (output_insn): Work around breakage if DEBUG386 is defined.
2152 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
2153 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
2154 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
2155 different from i386.
2156 (output_imm): Ditto.
2157 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
2159 (md_convert_frag): Jumps can now be larger than 2GB away, error
2161 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
2162 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
2171 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
2172 (md_begin): Complain about -G being used for PIC. Don't change
2173 the text, data and bss alignments on VxWorks.
2174 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
2175 generating VxWorks PIC.
2176 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
2177 (macro): Likewise, but do not treat la $25 specially for
2178 VxWorks PIC, and do not handle jal.
2179 (OPTION_MVXWORKS_PIC): New macro.
2180 (md_longopts): Add -mvxworks-pic.
2181 (md_parse_option): Don't complain about using PIC and -G together here.
2182 Handle OPTION_MVXWORKS_PIC.
2183 (md_estimate_size_before_relax): Always use the first relaxation
2184 sequence on VxWorks.
2185 * config/tc-mips.h (VXWORKS_PIC): New.
2189 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
2193 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
2194 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
2195 (get_loop_align_size): New.
2196 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
2197 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
2198 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
2199 (get_noop_aligned_address): Use get_loop_align_size.
2200 (get_aligned_diff): Likewise.
2204 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
2208 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
2209 (do_t_branch): Encode branches inside IT blocks as unconditional.
2210 (do_t_cps): New function.
2211 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
2212 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
2213 (opcode_lookup): Allow conditional suffixes on all instructions in
2215 (md_assemble): Advance condexec state before checking for errors.
2216 (insns): Use do_t_cps.
2220 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
2221 outputting the insn.
2225 * config/tc-vax.c: Update copyright year.
2226 * config/tc-vax.h: Likewise.
2230 * config/tc-vax.c (md_chars_to_number): Used only locally, so
2232 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
2236 * config/tc-arm.c (insns): Add ldm and stm.
2241 * doc/as.texinfo (Ident): Document this directive more thoroughly.
2245 * config/tc-arm.c (insns): Add "svc".
2249 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
2250 flag and avoid double underscore prefixes.
2254 * config/tc-arm.c (md_begin): Handle EABIv5.
2255 (arm_eabis): Add EF_ARM_EABI_VER5.
2256 * doc/c-arm.texi: Document -meabi=5.
2260 * app.c (do_scrub_chars): Simplify string handling.
2270 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
2271 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
2273 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
2274 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
2275 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
2279 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
2280 even when using the text-section-literals option.
2284 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
2286 (m68k_ip): <case 'J'> Check we have some control regs.
2287 (md_parse_option): Allow raw arch switch.
2288 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
2289 whether 68881 or cfloat was meant by -mfloat.
2290 (md_show_usage): Adjust extension display.
2291 (m68k_elf_final_processing): Adjust.
2295 * config/tc-avr.c (avr_mod_hash_value): New function.
2296 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
2297 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
2298 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
2299 instead of int avr_ldi_expression: use avr_mod_hash_value instead
2301 (tc_gen_reloc): Handle substractions of symbols, if possible do
2302 fixups, abort otherwise.
2303 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
2304 tc_fix_adjustable): Define.
2308 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
2309 change the template, then clear md.slot[curr].end_of_insn_group.
2313 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
2318 * macro.c (getstring): Don't treat parentheses special anymore.
2319 (get_any_string): Don't consider '(' and ')' as quoting anymore.
2320 Special-case '(', ')', '[', and ']' when dealing with non-quoting
2325 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
2329 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
2331 (CFI_signal_frame): Define.
2332 (cfi_pseudo_table): Add .cfi_signal_frame.
2333 (dot_cfi): Handle CFI_signal_frame.
2334 (output_cie): Handle cie->signal_frame.
2335 (select_cie_for_fde): Don't share CIE if signal_frame flag is
2336 different. Copy signal_frame from FDE to newly created CIE.
2337 * doc/as.texinfo: Document .cfi_signal_frame.
2341 * doc/Makefile.am: Add html target.
2342 * doc/Makefile.in: Regenerate.
2343 * po/Make-in: Add html target.
2347 * config/tc-i386.c (output_insn): Support Intel Merom New
2350 * config/tc-i386.h (CpuMNI): New.
2351 (CpuUnknownFlags): Add CpuMNI.
2355 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
2356 (hpriv_reg_table): New table for hyperprivileged registers.
2357 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
2362 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
2363 (tc_gen_reloc): Don't define.
2364 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
2365 (OPTION_LINKRELAX): New.
2366 (md_longopts): Add it.
2368 (md_parse_options): Set it.
2369 (md_assemble): Emit relaxation relocs as needed.
2370 (md_convert_frag): Emit relaxation relocs as needed.
2371 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
2372 (m32c_apply_fix): New.
2373 (tc_gen_reloc): New.
2374 (m32c_force_relocation): Force out jump relocs when relaxing.
2375 (m32c_fix_adjustable): Return false if relaxing.
2379 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
2380 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
2381 (struct asm_barrier_opt): Define.
2382 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
2383 (parse_psr): Accept V7M psr names.
2384 (parse_barrier): New function.
2385 (enum operand_parse_code): Add OP_oBARRIER.
2386 (parse_operands): Implement OP_oBARRIER.
2387 (do_barrier): New function.
2388 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
2389 (do_t_cpsi): Add V7M restrictions.
2390 (do_t_mrs, do_t_msr): Validate V7M variants.
2391 (md_assemble): Check for NULL variants.
2392 (v7m_psrs, barrier_opt_names): New tables.
2393 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
2394 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
2395 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
2396 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
2397 (struct cpu_arch_ver_table): Define.
2398 (cpu_arch_ver): New.
2399 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
2400 Tag_CPU_arch_profile.
2401 * doc/c-arm.texi: Document new cpu and arch options.
2405 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
2409 * config/tc-ia64.c: Update copyright years.
2413 * config/tc-ia64.c (specify_resource): Add the rule 17 from
2418 * config/tc-arm.c (do_pld): Remove incorrect write to
2420 (encode_thumb32_addr_mode): Use correct operand.
2424 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2430 * Makefile.am: Add xc16x related entry.
2431 * Makefile.in: Regenerate.
2432 * configure.in: Added xc16x related entry.
2433 * configure: Regenerate.
2434 * config/tc-xc16x.h: New file
2435 * config/tc-xc16x.c: New file
2436 * doc/c-xc16x.texi: New file for xc16x
2437 * doc/all.texi: Entry for xc16x
2438 * doc/Makefile.texi: Added c-xc16x.texi
2439 * NEWS: Announce the support for the new target.
2443 * configure.tgt: set emulation for mips-*-netbsd*
2447 * config.in: Rebuilt.
2451 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2452 from 1, not 0, in error messages.
2453 (md_assemble): Simplify special-case check for ENTRY instructions.
2454 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2455 operand in error message.
2459 * configure.tgt (arm-*-linux-gnueabi*): Change to
2464 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2465 32-bit value is propagated into the upper bits of a 64-bit long.
2467 * config/tc-arc.c (init_opcode_tables): Fix cast.
2468 (arc_extoper, md_operand): Likewise.
2472 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2473 each relaxation step.
2477 * configure.in (CHECK_DECLS): Add vsnprintf.
2478 * configure: Regenerate.
2479 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2480 include/declare here, but...
2481 * as.h: Move code detecting VARARGS idiom to the top.
2482 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2483 (vsnprintf): Declare if not already declared.
2487 * as.c (close_output_file): New.
2488 (main): Register close_output_file with xatexit before
2489 dump_statistics. Don't call output_file_close.
2493 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2494 mcf5329_control_regs): New.
2495 (not_current_architecture, selected_arch, selected_cpu): New.
2496 (m68k_archs, m68k_extensions): New.
2497 (archs): Renamed to ...
2498 (m68k_cpus): ... here. Adjust.
2500 (md_pseudo_table): Add arch and cpu directives.
2501 (find_cf_chip, m68k_ip): Adjust table scanning.
2502 (no_68851, no_68881): Remove.
2503 (md_assemble): Lazily initialize.
2504 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2505 (md_init_after_args): Move functionality to m68k_init_arch.
2506 (mri_chip): Adjust table scanning.
2507 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2508 options with saner parsing.
2509 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2510 m68k_init_arch): New.
2511 (s_m68k_cpu, s_m68k_arch): New.
2512 (md_show_usage): Adjust.
2513 (m68k_elf_final_processing): Set CF EF flags.
2514 * config/tc-m68k.h (m68k_init_after_args): Remove.
2515 (tc_init_after_args): Remove.
2516 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2517 (M68k-Directives): Document .arch and .cpu directives.
2521 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2522 synonyms for equ and defl.
2523 (z80_cons_fix_new): New function.
2524 (emit_byte): Disallow relative jumps to absolute locations.
2525 (emit_data): Only handle defb, prototype changed, because defb is
2526 now handled as pseudo-op rather than an instruction.
2527 (instab): Entries for defb,defw,db,dw moved from here...
2528 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
2529 Add entries for def24,def32,d24,d32.
2530 (md_assemble): Improved error handling.
2531 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2532 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2533 (z80_cons_fix_new): Declare.
2534 * doc/c-z80.texi (defb, db): Mention warning on overflow.
2535 (def24,d24,def32,d32): New pseudo-ops.
2539 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2543 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2544 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2545 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2546 T2_OPCODE_RSB): Define.
2547 (thumb32_negate_data_op): New function.
2548 (md_apply_fix): Use it.
2552 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2554 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2555 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2557 (relaxation_requirements): Add pfinish_frag argument and use it to
2558 replace setting tinsn->record_fix fields.
2559 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2560 and vinsn_to_insnbuf. Remove references to record_fix and
2561 slot_sub_symbols fields.
2562 (xtensa_mark_narrow_branches): Delete unused code.
2563 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2565 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2567 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2568 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2569 of the record_fix field. Simplify error messages for unexpected
2571 (set_expr_symbol_offset_diff): Delete.
2575 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2580 * config/tc-arm.c: Use arm_feature_set.
2581 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2582 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2583 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2586 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2587 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2588 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2589 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2591 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2592 (arm_opts): Move old cpu/arch options from here...
2593 (arm_legacy_opts): ... to here.
2594 (md_parse_option): Search arm_legacy_opts.
2595 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2596 (arm_float_abis, arm_eabis): Make const.
2600 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2604 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2605 in load immediate intruction.
2609 * config/bfin-parse.y (value_match): Use correct conversion
2610 specifications in template string for __FILE__ and __LINE__.
2616 Introduce TLS descriptors for i386 and x86_64.
2617 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2618 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2619 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2620 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2621 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2623 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2624 (lex_got): Handle @tlsdesc and @tlscall.
2625 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2629 Fixes for building on 64-bit hosts:
2630 * config/tc-avr.c (mod_index): New union to allow conversion
2631 between pointers and integers.
2632 (md_begin, avr_ldi_expression): Use it.
2633 * config/tc-i370.c (md_assemble): Add cast for argument to print
2635 * config/tc-tic54x.c (subsym_substitute): Likewise.
2636 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2637 opindex field of fr_cgen structure into a pointer so that it can
2638 be stored in a frag.
2639 * config/tc-mn10300.c (md_assemble): Likewise.
2640 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2642 * config/tc-v850.c: Replace uses of (int) casts with correct
2648 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2653 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2654 a local-label reference.
2656 For older changes see ChangeLog-2005
2662 version-control: never
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