3 * config/tc-i386.c (tc_x86_parse_to_dw2regnum): Don't use
8 * config/tc-i386.c (i386_is_register): Remove is_intel_syntax.
10 (parse_register): Likewise.
11 (tc_x86_parse_to_dw2regnum): Likewise.
12 * config/tc-i386-intel.c (i386_intel_simplify): Likewise.
13 (i386_intel_operand): Likewise.
18 * config/tc-i386-intel.c (i386_intel_simplify_register): New.
19 (i386_intel_simplify): Use i386_is_register and
20 i386_intel_simplify_register. Set X_md for O_register and
21 check X_md for O_constant.
22 (i386_intel_operand): Use i386_is_register.
24 * config/tc-i386.c (i386_is_register): New.
25 (x86_cons): Initialize the X_md field. Use i386_is_register.
26 (parse_register): Use i386_is_register.
27 (tc_x86_parse_to_dw2regnum): Likewise.
31 * expr.c (expr): Initialize the X_md field.
35 * config/tc-tic6x.c (OPTION_MGENERATE_REL): New.
36 (md_longopts): Add -mgenerate-rel.
37 (tic6x_generate_rela): New.
38 (md_parse_option): Handle -mgenerate-rel.
39 (md_show_usage): Add comment that -mgenerate-rel is undocumented.
40 (tic6x_init_after_args): New.
41 (md_apply_fix): Correct shift calculations for SB-relative
43 (md_pcrel_from): Change to tic6x_pcrel_from_section. Do not
44 adjust addresses for relocations referencing symbols in other
46 (tc_gen_reloc): Adjust addend calculations for REL relocations.
47 * config/tc-tic6x.h (MD_PCREL_FROM_SECTION,
48 tic6x_pcrel_from_section, tc_init_after_args,
49 tic6x_init_after_args): New.
54 * macro.c (macro_expand_body): Do not treat LOCAL as a keyword in
55 altmacro mode if found inside a quoted string.
59 * config/bfin-lex.l (parse_int): Change index() to strchr().
64 * config/tc-hppa.c (pa_ip): Do not allow 64-bit add condition
65 matcher to accept and unconditional 32-bit add instruction.
66 (pa_build_unwind_subspace): Cope with error conditions not
67 allowing the start symbol to be set.
71 * config/tc-arm.c (arm_convert_symbolic_attribute): Add support for
72 new tag names in v2.08 of ARM ABI.
73 * doc/c-arm.texi: Document new tag names in ABI.
77 * config/tc-alpha.c: Includes vms/egps.h on EVAX.
78 (s_alpha_comm): Used new EGPS macros from egps.h
79 (RGPS__V_NO_SHIFT, EGPS__V_MASK): New local macros.
80 (s_alpha_section_word): Add comments. Use new EGPS macros.
81 Adjust for modified bfd_vms_set_section_flags function.
86 * config/tc-ppc.c (ppc_elf_cons): Clear frag contents.
90 * as.c (create_obj_attrs_section): Remove unused variable addr.
91 * listing.c (listing_listing): Remove unused variable message.
92 * read.c: Remove unnecessary register type qualifiers.
93 (s_mri): Only define/use old_flag variable if MRI_MODE_CHANGE is
98 * config/tc-avr.c (mcu_types): Add support for atmega16a, atmega168a,
99 atmega164a, atmega165a, atmega169a, atmega169pa, atmega16hva2,
100 atmega324a, atmega324pa, atmega325a, atmega3250a, atmega328,
101 atmega329a, atmega329pa, atmega3290a, atmega48a, atmega644a,
102 atmega645a, atmega645p, atmega6450a, atmega6450p, atmega649a,
103 atmega649p, atmega6490a, atmega6490p, atmega64hve, atmega88a,
104 atmega88pa, attiny461a, attiny84a, m3000.
105 Remove support for atmega8m1, atmega8c1, atmega16c1, atmega4hvd,
106 atmega8hvd, attiny327, m3000f, m3000s, m3001b.
107 * doc/c-avr.texi: Same.
111 * config/tc-arm.c (make_mapping_symbol): Handle the case
112 that multiple mapping symbols have the same value 0.
116 * configure: Regenerate.
120 * po/ru.po: New Russian translation.
121 * configure.in (ALL_LINGUAS): Add ru.
122 * configure: Regenerate.
127 * input-scrub.c (input_scrub_next_buffer): Use memmove instead
128 of memcpy to copy overlap memory.
132 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c.
133 (TARGET_CPU_HFILES): Add config/tc-tic6x.h.
134 * Makefile.in: Regenerate.
135 * NEWS: Add news entry for TI C6X support.
136 * app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle
137 TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in
138 operands if TC_KEEP_OPERAND_SPACES.
139 * configure.tgt (tic6x-*-*): New.
140 * config/tc-ia64.h (TC_PREDICATE_START_CHAR,
141 TC_PREDICATE_END_CHAR): Define.
142 * config/tc-tic6x.c, config/tc-tic6x.h: New.
143 * doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi.
144 * doc/Makefile.in: Regenerate.
145 * doc/all.texi (TIC6X): Define.
146 * doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi.
147 * doc/c-tic6x.texi: New.
151 * config/tc-i386.c (lex_got): Use STRING_COMMA_LEN on gotrel.
155 * config/tc-i386.c (i386_error): Replace oprand_size_mismatch
156 with operand_size_mismatch.
157 (operand_size_match): Updated.
158 (match_template): Likewise.
162 * config/tc-i386.c (i386_error): New.
163 (_i386_insn): Replace err_msg with error.
164 (operand_size_match): Set error instead of err_msg on failure.
165 (operand_type_match): Likewise.
166 (operand_type_register_match): Likewise.
167 (VEX_check_operands): Likewise.
168 (match_template): Likewise. Use error instead of err_msg with
173 * config/tc-arm.c (make_mapping_symbol): Hanle the case
174 that two mapping symbols have the same value.
178 * doc/c-arm.texi (.setfp): Correct example.
183 * config/tc-arm.c (reloc_names): New relocation names.
184 (md_apply_fix): New case for BFD_RELOC_ARM_GOT_PREL.
185 (tc_gen_reloc): New case for BFD_RELOC_ARM_GOT_PREL.
186 * doc/c-arm.texi (ARM-Relocations): Document the new relocation.
190 * dw2gencfi.c (output_cie): Consider emitting the S augmentation in all
191 cases, and not only for .eh_frame.
193 * dw2gencfi.c (output_cie): Make it more explicit which code paths
194 belong to .eh_frame only.
198 * config/tc-v850.c (v850_insert_operand): Handle out-of-range
199 assembler constants on 64-bit hosts.
203 * bfin-defs.h, bfin-lex.l, bfin-parse.y, tc-bfin.c, tc-bfin.h:
204 Strip trailing whitespace.
208 * doc/c-bfin.texi (-mcpu): Add bf504 and bf506.
209 * config/tc-bfin.c (bfin_cpu_type): Add BFIN_CPU_BF504 and
211 (bfin_cpus[]): Add 0.0 for bf504 and bf506.
215 * doc/as.texinfo: Add Blackfin options.
216 * doc/c-bfin.texi: Document -mfdpic, -mno-fdpic and -mnopic.
217 * config/tc-bfin.c (md_show_usage): Show usage for all
218 Blackfin specific options.
223 * listing.c (listing_newline): Correct backslash quote logic.
227 * config/tc-i386.h [TE_SOLARIS] (ELF_TARGET_FORMAT): Define.
228 (ELF_TARGET_FORMAT64): Define.
232 * config/tc-arm.c (arm_cpu_option_table): Add cortex-m4.
236 * config/tc-sh.c (get_specific): Move overflow checking code to avoid
237 reading uninitialized data.
241 * config/tc-score7.c (s7_frag_check): Add ATTRIBUTE_UNUSED.
245 * configure.tgt: Fix mep cpu case.
249 * config/tc-arm.c (do_t_strexd): Remove
250 operand[1] != operand[2] contraint.
254 * config/tc-arm.c (neon_select_shape): No need to match
255 the remaining operands in the shape when one operand does
260 * config/tc-arm.c (do_neon_ld_st_interleave): Reject bad
265 * cgen.c: Whitespace fixes.
266 (weak_operand_overflow_check): Formatting fix.
270 * config/tc-i386.c (match_template): Update error messages.
274 * config/tc-i386.c (_i386_insn): Add err_msg.
275 (operand_size_match): Set err_msg on failure.
276 (operand_type_match): Likewise.
277 (operand_type_register_match): Likewise.
278 (VEX_check_operands): Likewise.
279 (match_template): Likewise. Use i.err_msg with as_bad.
283 * config/tc-mips.c (mips_fix_loongson2f, mips_fix_loongson2f_nop,
284 mips_fix_loongson2f_jump): New variables.
285 (md_longopts): Add New options -mfix-loongson2f-nop/jump,
286 -mno-fix-loongson2f-nop/jump.
287 (md_parse_option): Initialize variables via above options.
288 (options): New enums for the above options.
289 (md_begin): Initialize nop_insn from LOONGSON2F_NOP_INSN.
290 (fix_loongson2f, fix_loongson2f_nop, fix_loongson2f_jump):
292 (append_insn): call fix_loongson2f().
293 (mips_handle_align): Replace the implicit nops.
294 * config/tc-mips.h (MAX_MEM_FOR_RS_ALIGN_CODE): Modified
295 for the new mips_handle_align().
296 * doc/c-mips.texi: Document the new options.
300 * config/tc-arm.c (do_rd_rm_rn): Added warning
306 * config/tc-avr.c (md_apply_fix): Handle BFD_RELOC_8.
307 (avr_cons_fix_new): Handle fixups of a single byte.
312 * config/tc-arm.c (CPU_DEFAULT): Do not define based upon build
313 compiler's predefines.
317 * configure.tgt: Whiltespace. Sort moxie entry.
321 * config/tc-arm.c (arm_convert_symbolic_attribute): Add Tag_DIV_use.
322 * doc/c-arm.texi: Likewise.
326 * config/tc-arm.c (asm_opcode): operands type
328 (BAD_PC_ADDRESSING): New macro message.
329 (BAD_PC_WRITEBACK): Likewise.
330 (MIX_ARM_THUMB_OPERANDS): New macro.
331 (operand_parse_code): Added enum values.
332 (parse_operands): Added thumb/arm distinction,
333 plus new enum values handling.
334 (encode_arm_addr_mode_2): Validations enhanced.
335 (encode_arm_addr_mode_3): Likewise.
336 (do_rm_rd_rn): Likewise.
337 (encode_thumb32_addr_mode): Likewise.
338 (do_t_ldrex): Likewise.
339 (do_t_ldst): Likewise.
340 (do_t_strex): Likewise.
341 (md_assemble): Call parse_operands with
349 (insns): Updated insns operands.
354 * config/tc-ia64.c (enum reloc_func): Add FUNC_SLOTCOUNT_RELOC.
355 (DUMMY_RELOC_IA64_SLOTCOUNT): Added.
356 (pseudo_func): Add an entry for slotcount.
357 (md_begin): Initialize slotcount pseudo symbol.
358 (ia64_parse_name): Handle @slotcount parameter.
359 (ia64_gen_real_reloc_type): Handle slotcount.
360 (md_apply_fix): Ditto.
361 * doc/c-ia64.texi (IA-64-Relocs): Document @slotcount.
365 * config/tc-xtensa.c (istack_init): Don't call memset.
369 * config/tc-xtensa.c (cache_literal_section): Handle prefixes as
374 * config/tc-xtensa.c (xtensa_find_unaligned_loops): Rewrite.
378 * config/tc-i386.c (build_modrm_byte): Reformat.
382 * config/tc-i386.c: Update copyright.
387 * config/tc-i386.c (vec_imm4) New operand type.
389 (VEX_check_operands): New.
390 (check_reverse): Call VEX_check_operands.
391 (build_modrm_byte): Reintroduce code for 5
392 operand insns. Fix whitespace.
396 * config/tc-ppc.c (md_show_usage): Add -mpwr4, -mpwr5, -mpwr5x,
401 * config/tc-xtensa.c (RELAXED_LOOP_INSN_BYTES): New.
402 (next_frag_pre_opcode_bytes): Use RELAXED_LOOP_INSN_BYTES.
403 (xtensa_mark_zcl_first_insns): Rewrite to handle corner case.
407 * config/tc-arm.c (md_pcrel_from_section): Keep base to zero for
408 non-local branches (BFD_RELOC_THUMB_PCREL_BRANCH23,
409 BFD_RELOC_THUMB_PCREL_BLX, BFD_RELOC_ARM_PCREL_BLX,
410 BFD_RELOC_ARM_PCREL_CALL)
414 * config/tc-xtensa.c (frag_format_size): Generalize logic to
415 handle more instruction sizes and fetch widths.
416 (branch_align_power): Likewise.
417 (text_align_power): Likewise.
418 (bytes_to_stretch): Likewise.
422 * config/tc-ppc.c (md_show_usage): Mention -mtitan. Don't use tabs.
423 (ppc_mach): Handle titan.
424 * doc/c-ppc.texi: Mention -mtitan.
428 * config/tc-xtensa.c (UNREACHABLE_MAX_WIDTH): Delete and
430 (xtensa_fetch_width) ...this.
434 * Makefile.am (CPU_TYPES, OBJ_FORMATS, CPU_OBJ_VALID,
435 MULTI_CPU_TYPES, MULTI_CPU_OBJ_VALID): Remove.
436 * Makefile.in: Regenerate.
440 * config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1.
441 (i386_align_code): Rename PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1.
442 * config/tc-i386.h (processor_type): Same.
443 * doc/c-i386.texi: Change amdfam15 to bdver1.
448 * config/tc-arm.c (neon_check_type): Handle a neon_shape value of
453 * NEWS: Mention new feature.
454 * config/obj-coff.c (obj_coff_section): Accept digits and use
455 to override default section alignment power if specified.
456 * doc/as.texinfo (.section directive): Update documentation.
460 * config/tc-i386.c (avxscalar): New.
461 (OPTION_MAVXSCALAR): Likewise.
462 (build_vex_prefix): Select vector_length for scalar instructions
464 (md_longopts): Add OPTION_MAVXSCALAR.
465 (md_parse_option): Handle OPTION_MAVXSCALAR.
466 (md_show_usage): Add -mavxscalar=.
468 * doc/c-i386.texi: Document -mavxscalar=.
472 * config/tc-i386.c (build_vex_prefix): Set i.vex.bytes[0] to
477 * write.h (fix_at_start): Declare.
478 * write.c (fix_new_internal): Add at_beginning parameter.
479 Use it instead of REVERSE_SORT_RELOCS. Fix the handling of
480 seg_fix_tailP for the at_beginning/REVERSE_SORT_RELOCS case.
481 (fix_new, fix_new_exp): Update accordingly.
482 (fix_at_start): New function.
483 * config/tc-ppc.c (md_pseudo_table): Add .ref to the OBJ_XCOFF section.
484 (ppc_ref): New function, for OBJ_XCOFF.
485 (md_apply_fix): Handle BFD_RELOC_NONE for OBJ_XCOFF.
486 * config/te-i386aix.h (REVERSE_SORT_RELOCS): Remove #undef.
490 * config/te-solaris.h (DWARF2_EH_FRAME_READ_ONLY): Make read-only
491 on 64-bit Solaris/x86.
492 Include obj-format.h earlier.
496 * config/tc-s390.c (s390_elf_final_processing): New function.
497 * config/tc-s390.h (elf_tc_final_processing): New macro definition.
498 (s390_elf_final_processing): Added prototype.
504 * config/tc-arm.c (do_neon_cvt): Rename to do_neon_cvt_1. Add
505 code to handle round-to-zero for VCVT conversions.
506 (do_neon_cvt): New. Call do_neon_cvt_1.
507 (do_neon_cvtr): New. Call do_neon_cvt_1.
508 (insns): Use do_neon_cvt for VCVT insn and do_neon_cvtr for VCVTR
513 * config/tc-ia64.c (ia64_vms_note): Generate 24 bytes note headers.
517 * config/tc-i386.c (md_assemble): Before accessing the IMM field
518 check that it's not an XOP insn.
522 * config/bfin-aux.h: Remove argument names in function
524 * config/bfin-lex.l (parse_int): Fix shadowed variable name
526 * config/bfin-parse.y (value_match): Remove argument names
528 (notethat): Likewise.
533 * config/tc-arm.c (do_t_nop): Correct check for Thumb-2 NOP.
537 * config/tc-h8300.c (h8300_elf_section): New function - issue a
538 warning message if a new section is created without setting any
540 (md_pseudo_table): Intercept section creation pseudos.
541 (md_pcrel_from): Replace abort with an error message.
542 * config/obj-elf.c (obj_elf_section_name): Export this function.
543 * config/obj-elf.h (obj_elf_section_name): Prototype.
548 * listing.c (print_source): Add one to line number.
552 * Makefile.in: Regenerate.
553 * configure: Regenerate.
554 * doc/Makefile.in: Regenerate.
558 * version.c (parse_args): Change to "Copyright 2010".
562 * config/tc-i386.c (cpu_arch): Add amdfam15.
563 (i386_align_code): Add PROCESSOR_AMDFAM15 cases.
564 * config/tc-i386.h (processor_type): Add PROCESSOR_AMDFAM15.
565 * doc/c-i386.texi: Add amdfam15.
569 * config/tc-arm.c (do_neon_logic): Accept imm value
570 in the third operand too.
571 (operand_parse_code): OP_RNDQ_IMVNb renamed to
573 (parse_operands): OP_NILO case removed, applied renaming.
574 (insns): Neon shape changed for some logic instructions.
578 * config/tc-arm.c (do_neon_ldx_stx): Added
579 validation for vector load/store insns.
583 * config/tc-ppc.c (md_show_usage): Document -me500mc64.
587 * config/tc-arm.c (struct arm_it): New flag 'is_neon'.
588 (NEON_ENC_*): Macros renamed to _NEON_ENC_*.
589 (NEON_ENCODE): New macro.
590 (check_neon_suffixes): New macro.
591 (do_vfp_cond_or_thumb): Set the 'is_neon' flag.
592 (do_vfp_nsyn_opcode): Likewise.
593 (do_vfp_nsyn_nmul): Use the new 'NEON_ENCODE' macro.
594 (do_vfp_nsyn_cmp): Likewise.
595 (do_neon_shl_imm): Likewise.
596 (do_neon_qshl_imm): Likewise.
597 (neon_dyadic_misc): Likewise.
598 (do_neon_mac_maybe_scalar): Likewise.
599 (do_neon_qdmulh): Likewise.
600 (do_neon_qmovn): Likewise.
601 (do_neon_qmovun): Likewise.
602 (do_neon_movn): Likewise.
603 (neon_mac_reg_scalar_long): Likewise.
604 (do_neon_vmull): Likewise.
605 (do_neon_trn): Likewise.
606 (do_neon_ldx_stx): Likewise.
607 (neon_dp_fixup): Changed signature and set the flag.
608 (neon_three_same): Call the above with new signature.
609 (neon_two_same): Likewise.
610 (neon_imm_shift): Likewise.
611 (neon_mul_mac): Likewise.
612 (do_neon_abs_neg): Likewise.
613 (neon_mixed_length): Likewise.
614 (do_neon_ext): Likewise.
615 (do_neon_mov): Likewise.
616 (do_neon_tbl_tbx): Likewise.
617 (do_neon_logic): Likewise, and use the new 'NEON_ENCODE' macro.
618 (neon_compare): Likewise.
619 (do_neon_shll): Likewise.
620 (do_neon_cvt): Likewise.
621 (do_neon_mvn): Likewise.
622 (do_neon_dup): Likewise.
623 (md_assemble): Call check_neon_suffixes ().
625 For older changes see ChangeLog-2009
631 version-control: never