3 * config/tc-avr.c (mcu_types): Add support for atmega16a, atmega168a,
4 atmega164a, atmega165a, atmega169a, atmega169pa, atmega16hva2,
5 atmega324a, atmega324pa, atmega325a, atmega3250a, atmega328,
6 atmega329a, atmega329pa, atmega3290a, atmega48a, atmega644a,
7 atmega645a, atmega645p, atmega6450a, atmega6450p, atmega649a,
8 atmega649p, atmega6490a, atmega6490p, atmega64hve, atmega88a,
9 atmega88pa, attiny461a, attiny84a, m3000.
10 Remove support for atmega8m1, atmega8c1, atmega16c1, atmega4hvd,
11 atmega8hvd, attiny327, m3000f, m3000s, m3001b.
12 * doc/c-avr.texi: Same.
16 * config/tc-arm.c (make_mapping_symbol): Handle the case
17 that multiple mapping symbols have the same value 0.
21 * configure: Regenerate.
25 * po/ru.po: New Russian translation.
26 * configure.in (ALL_LINGUAS): Add ru.
27 * configure: Regenerate.
32 * input-scrub.c (input_scrub_next_buffer): Use memmove instead
33 of memcpy to copy overlap memory.
37 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c.
38 (TARGET_CPU_HFILES): Add config/tc-tic6x.h.
39 * Makefile.in: Regenerate.
40 * NEWS: Add news entry for TI C6X support.
41 * app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle
42 TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in
43 operands if TC_KEEP_OPERAND_SPACES.
44 * configure.tgt (tic6x-*-*): New.
45 * config/tc-ia64.h (TC_PREDICATE_START_CHAR,
46 TC_PREDICATE_END_CHAR): Define.
47 * config/tc-tic6x.c, config/tc-tic6x.h: New.
48 * doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi.
49 * doc/Makefile.in: Regenerate.
50 * doc/all.texi (TIC6X): Define.
51 * doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi.
52 * doc/c-tic6x.texi: New.
56 * config/tc-i386.c (lex_got): Use STRING_COMMA_LEN on gotrel.
60 * config/tc-i386.c (i386_error): Replace oprand_size_mismatch
61 with operand_size_mismatch.
62 (operand_size_match): Updated.
63 (match_template): Likewise.
67 * config/tc-i386.c (i386_error): New.
68 (_i386_insn): Replace err_msg with error.
69 (operand_size_match): Set error instead of err_msg on failure.
70 (operand_type_match): Likewise.
71 (operand_type_register_match): Likewise.
72 (VEX_check_operands): Likewise.
73 (match_template): Likewise. Use error instead of err_msg with
78 * config/tc-arm.c (make_mapping_symbol): Hanle the case
79 that two mapping symbols have the same value.
83 * doc/c-arm.texi (.setfp): Correct example.
88 * config/tc-arm.c (reloc_names): New relocation names.
89 (md_apply_fix): New case for BFD_RELOC_ARM_GOT_PREL.
90 (tc_gen_reloc): New case for BFD_RELOC_ARM_GOT_PREL.
91 * doc/c-arm.texi (ARM-Relocations): Document the new relocation.
95 * dw2gencfi.c (output_cie): Consider emitting the S augmentation in all
96 cases, and not only for .eh_frame.
98 * dw2gencfi.c (output_cie): Make it more explicit which code paths
99 belong to .eh_frame only.
103 * config/tc-v850.c (v850_insert_operand): Handle out-of-range
104 assembler constants on 64-bit hosts.
108 * bfin-defs.h, bfin-lex.l, bfin-parse.y, tc-bfin.c, tc-bfin.h:
109 Strip trailing whitespace.
113 * doc/c-bfin.texi (-mcpu): Add bf504 and bf506.
114 * config/tc-bfin.c (bfin_cpu_type): Add BFIN_CPU_BF504 and
116 (bfin_cpus[]): Add 0.0 for bf504 and bf506.
120 * doc/as.texinfo: Add Blackfin options.
121 * doc/c-bfin.texi: Document -mfdpic, -mno-fdpic and -mnopic.
122 * config/tc-bfin.c (md_show_usage): Show usage for all
123 Blackfin specific options.
128 * listing.c (listing_newline): Correct backslash quote logic.
132 * config/tc-i386.h [TE_SOLARIS] (ELF_TARGET_FORMAT): Define.
133 (ELF_TARGET_FORMAT64): Define.
137 * config/tc-arm.c (arm_cpu_option_table): Add cortex-m4.
141 * config/tc-sh.c (get_specific): Move overflow checking code to avoid
142 reading uninitialized data.
146 * config/tc-score7.c (s7_frag_check): Add ATTRIBUTE_UNUSED.
150 * configure.tgt: Fix mep cpu case.
154 * config/tc-arm.c (do_t_strexd): Remove
155 operand[1] != operand[2] contraint.
159 * config/tc-arm.c (neon_select_shape): No need to match
160 the remaining operands in the shape when one operand does
165 * config/tc-arm.c (do_neon_ld_st_interleave): Reject bad
170 * cgen.c: Whitespace fixes.
171 (weak_operand_overflow_check): Formatting fix.
175 * config/tc-i386.c (match_template): Update error messages.
179 * config/tc-i386.c (_i386_insn): Add err_msg.
180 (operand_size_match): Set err_msg on failure.
181 (operand_type_match): Likewise.
182 (operand_type_register_match): Likewise.
183 (VEX_check_operands): Likewise.
184 (match_template): Likewise. Use i.err_msg with as_bad.
188 * config/tc-mips.c (mips_fix_loongson2f, mips_fix_loongson2f_nop,
189 mips_fix_loongson2f_jump): New variables.
190 (md_longopts): Add New options -mfix-loongson2f-nop/jump,
191 -mno-fix-loongson2f-nop/jump.
192 (md_parse_option): Initialize variables via above options.
193 (options): New enums for the above options.
194 (md_begin): Initialize nop_insn from LOONGSON2F_NOP_INSN.
195 (fix_loongson2f, fix_loongson2f_nop, fix_loongson2f_jump):
197 (append_insn): call fix_loongson2f().
198 (mips_handle_align): Replace the implicit nops.
199 * config/tc-mips.h (MAX_MEM_FOR_RS_ALIGN_CODE): Modified
200 for the new mips_handle_align().
201 * doc/c-mips.texi: Document the new options.
205 * config/tc-arm.c (do_rd_rm_rn): Added warning
211 * config/tc-avr.c (md_apply_fix): Handle BFD_RELOC_8.
212 (avr_cons_fix_new): Handle fixups of a single byte.
217 * config/tc-arm.c (CPU_DEFAULT): Do not define based upon build
218 compiler's predefines.
222 * configure.tgt: Whiltespace. Sort moxie entry.
226 * config/tc-arm.c (arm_convert_symbolic_attribute): Add Tag_DIV_use.
227 * doc/c-arm.texi: Likewise.
231 * config/tc-arm.c (asm_opcode): operands type
233 (BAD_PC_ADDRESSING): New macro message.
234 (BAD_PC_WRITEBACK): Likewise.
235 (MIX_ARM_THUMB_OPERANDS): New macro.
236 (operand_parse_code): Added enum values.
237 (parse_operands): Added thumb/arm distinction,
238 plus new enum values handling.
239 (encode_arm_addr_mode_2): Validations enhanced.
240 (encode_arm_addr_mode_3): Likewise.
241 (do_rm_rd_rn): Likewise.
242 (encode_thumb32_addr_mode): Likewise.
243 (do_t_ldrex): Likewise.
244 (do_t_ldst): Likewise.
245 (do_t_strex): Likewise.
246 (md_assemble): Call parse_operands with
254 (insns): Updated insns operands.
259 * config/tc-ia64.c (enum reloc_func): Add FUNC_SLOTCOUNT_RELOC.
260 (DUMMY_RELOC_IA64_SLOTCOUNT): Added.
261 (pseudo_func): Add an entry for slotcount.
262 (md_begin): Initialize slotcount pseudo symbol.
263 (ia64_parse_name): Handle @slotcount parameter.
264 (ia64_gen_real_reloc_type): Handle slotcount.
265 (md_apply_fix): Ditto.
266 * doc/c-ia64.texi (IA-64-Relocs): Document @slotcount.
270 * config/tc-xtensa.c (istack_init): Don't call memset.
274 * config/tc-xtensa.c (cache_literal_section): Handle prefixes as
279 * config/tc-xtensa.c (xtensa_find_unaligned_loops): Rewrite.
283 * config/tc-i386.c (build_modrm_byte): Reformat.
287 * config/tc-i386.c: Update copyright.
292 * config/tc-i386.c (vec_imm4) New operand type.
294 (VEX_check_operands): New.
295 (check_reverse): Call VEX_check_operands.
296 (build_modrm_byte): Reintroduce code for 5
297 operand insns. Fix whitespace.
301 * config/tc-ppc.c (md_show_usage): Add -mpwr4, -mpwr5, -mpwr5x,
306 * config/tc-xtensa.c (RELAXED_LOOP_INSN_BYTES): New.
307 (next_frag_pre_opcode_bytes): Use RELAXED_LOOP_INSN_BYTES.
308 (xtensa_mark_zcl_first_insns): Rewrite to handle corner case.
312 * config/tc-arm.c (md_pcrel_from_section): Keep base to zero for
313 non-local branches (BFD_RELOC_THUMB_PCREL_BRANCH23,
314 BFD_RELOC_THUMB_PCREL_BLX, BFD_RELOC_ARM_PCREL_BLX,
315 BFD_RELOC_ARM_PCREL_CALL)
319 * config/tc-xtensa.c (frag_format_size): Generalize logic to
320 handle more instruction sizes and fetch widths.
321 (branch_align_power): Likewise.
322 (text_align_power): Likewise.
323 (bytes_to_stretch): Likewise.
327 * config/tc-ppc.c (md_show_usage): Mention -mtitan. Don't use tabs.
328 (ppc_mach): Handle titan.
329 * doc/c-ppc.texi: Mention -mtitan.
333 * config/tc-xtensa.c (UNREACHABLE_MAX_WIDTH): Delete and
335 (xtensa_fetch_width) ...this.
339 * Makefile.am (CPU_TYPES, OBJ_FORMATS, CPU_OBJ_VALID,
340 MULTI_CPU_TYPES, MULTI_CPU_OBJ_VALID): Remove.
341 * Makefile.in: Regenerate.
345 * config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1.
346 (i386_align_code): Rename PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1.
347 * config/tc-i386.h (processor_type): Same.
348 * doc/c-i386.texi: Change amdfam15 to bdver1.
353 * config/tc-arm.c (neon_check_type): Handle a neon_shape value of
358 * NEWS: Mention new feature.
359 * config/obj-coff.c (obj_coff_section): Accept digits and use
360 to override default section alignment power if specified.
361 * doc/as.texinfo (.section directive): Update documentation.
365 * config/tc-i386.c (avxscalar): New.
366 (OPTION_MAVXSCALAR): Likewise.
367 (build_vex_prefix): Select vector_length for scalar instructions
369 (md_longopts): Add OPTION_MAVXSCALAR.
370 (md_parse_option): Handle OPTION_MAVXSCALAR.
371 (md_show_usage): Add -mavxscalar=.
373 * doc/c-i386.texi: Document -mavxscalar=.
377 * config/tc-i386.c (build_vex_prefix): Set i.vex.bytes[0] to
382 * write.h (fix_at_start): Declare.
383 * write.c (fix_new_internal): Add at_beginning parameter.
384 Use it instead of REVERSE_SORT_RELOCS. Fix the handling of
385 seg_fix_tailP for the at_beginning/REVERSE_SORT_RELOCS case.
386 (fix_new, fix_new_exp): Update accordingly.
387 (fix_at_start): New function.
388 * config/tc-ppc.c (md_pseudo_table): Add .ref to the OBJ_XCOFF section.
389 (ppc_ref): New function, for OBJ_XCOFF.
390 (md_apply_fix): Handle BFD_RELOC_NONE for OBJ_XCOFF.
391 * config/te-i386aix.h (REVERSE_SORT_RELOCS): Remove #undef.
395 * config/te-solaris.h (DWARF2_EH_FRAME_READ_ONLY): Make read-only
396 on 64-bit Solaris/x86.
397 Include obj-format.h earlier.
401 * config/tc-s390.c (s390_elf_final_processing): New function.
402 * config/tc-s390.h (elf_tc_final_processing): New macro definition.
403 (s390_elf_final_processing): Added prototype.
409 * config/tc-arm.c (do_neon_cvt): Rename to do_neon_cvt_1. Add
410 code to handle round-to-zero for VCVT conversions.
411 (do_neon_cvt): New. Call do_neon_cvt_1.
412 (do_neon_cvtr): New. Call do_neon_cvt_1.
413 (insns): Use do_neon_cvt for VCVT insn and do_neon_cvtr for VCVTR
418 * config/tc-ia64.c (ia64_vms_note): Generate 24 bytes note headers.
422 * config/tc-i386.c (md_assemble): Before accessing the IMM field
423 check that it's not an XOP insn.
427 * config/bfin-aux.h: Remove argument names in function
429 * config/bfin-lex.l (parse_int): Fix shadowed variable name
431 * config/bfin-parse.y (value_match): Remove argument names
433 (notethat): Likewise.
438 * config/tc-arm.c (do_t_nop): Correct check for Thumb-2 NOP.
442 * config/tc-h8300.c (h8300_elf_section): New function - issue a
443 warning message if a new section is created without setting any
445 (md_pseudo_table): Intercept section creation pseudos.
446 (md_pcrel_from): Replace abort with an error message.
447 * config/obj-elf.c (obj_elf_section_name): Export this function.
448 * config/obj-elf.h (obj_elf_section_name): Prototype.
453 * listing.c (print_source): Add one to line number.
457 * Makefile.in: Regenerate.
458 * configure: Regenerate.
459 * doc/Makefile.in: Regenerate.
463 * version.c (parse_args): Change to "Copyright 2010".
467 * config/tc-i386.c (cpu_arch): Add amdfam15.
468 (i386_align_code): Add PROCESSOR_AMDFAM15 cases.
469 * config/tc-i386.h (processor_type): Add PROCESSOR_AMDFAM15.
470 * doc/c-i386.texi: Add amdfam15.
474 * config/tc-arm.c (do_neon_logic): Accept imm value
475 in the third operand too.
476 (operand_parse_code): OP_RNDQ_IMVNb renamed to
478 (parse_operands): OP_NILO case removed, applied renaming.
479 (insns): Neon shape changed for some logic instructions.
483 * config/tc-arm.c (do_neon_ldx_stx): Added
484 validation for vector load/store insns.
488 * config/tc-ppc.c (md_show_usage): Document -me500mc64.
492 * config/tc-arm.c (struct arm_it): New flag 'is_neon'.
493 (NEON_ENC_*): Macros renamed to _NEON_ENC_*.
494 (NEON_ENCODE): New macro.
495 (check_neon_suffixes): New macro.
496 (do_vfp_cond_or_thumb): Set the 'is_neon' flag.
497 (do_vfp_nsyn_opcode): Likewise.
498 (do_vfp_nsyn_nmul): Use the new 'NEON_ENCODE' macro.
499 (do_vfp_nsyn_cmp): Likewise.
500 (do_neon_shl_imm): Likewise.
501 (do_neon_qshl_imm): Likewise.
502 (neon_dyadic_misc): Likewise.
503 (do_neon_mac_maybe_scalar): Likewise.
504 (do_neon_qdmulh): Likewise.
505 (do_neon_qmovn): Likewise.
506 (do_neon_qmovun): Likewise.
507 (do_neon_movn): Likewise.
508 (neon_mac_reg_scalar_long): Likewise.
509 (do_neon_vmull): Likewise.
510 (do_neon_trn): Likewise.
511 (do_neon_ldx_stx): Likewise.
512 (neon_dp_fixup): Changed signature and set the flag.
513 (neon_three_same): Call the above with new signature.
514 (neon_two_same): Likewise.
515 (neon_imm_shift): Likewise.
516 (neon_mul_mac): Likewise.
517 (do_neon_abs_neg): Likewise.
518 (neon_mixed_length): Likewise.
519 (do_neon_ext): Likewise.
520 (do_neon_mov): Likewise.
521 (do_neon_tbl_tbx): Likewise.
522 (do_neon_logic): Likewise, and use the new 'NEON_ENCODE' macro.
523 (neon_compare): Likewise.
524 (do_neon_shll): Likewise.
525 (do_neon_cvt): Likewise.
526 (do_neon_mvn): Likewise.
527 (do_neon_dup): Likewise.
528 (md_assemble): Call check_neon_suffixes ().
530 For older changes see ChangeLog-2009
536 version-control: never