3 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerated.
7 * i386-dis.c: Convert to ISO C90 prototypes.
8 * i370-dis.c: Likewise.
9 * i370-opc.c: Likewiwse.
10 * i960-dis.c: Likewise.
11 * ia64-opc.c: Likewise.
15 * frv-desc.c: Regenerated.
20 * Makefile.am (run-cgen): Pass new args archfile and opcfile
22 (stamp-ip2k,stamp-m32r,stamp-fr30,stamp-frv,stamp-openrisc,
23 stamp-iq2000,stamp-xstormy16): Pass paths of .cpu and .opc files
25 (stamp-frv): Delete hardcoded path spec workaround.
26 * Makefile.in: Regenerate.
27 * cgen.sh: New args archfile and opcfile. Pass on to cgen.
31 * v850-dis.c (disassemble): Accept bfd_mach_v850e1.
32 * v850-opc.c (v850_opcodes): Add DBTRAP and DBRET instructions.
36 * ppc-dis.c (struct dis_private): New.
37 (powerpc_dialect): Make static. Accept -Many in addition to existing
38 options. Save dialect in dis_private.
39 (print_insn_big_powerpc): Retrieve dialect from dis_private.
40 (print_insn_little_powerpc): Likewise.
41 (print_insn_powerpc): Call powpc_dialect here. Remove unnecessary
42 efs/altivec check. Try harder to disassemble if given -Many.
43 * ppc-opc.c (insert_fxm): Expand comment.
44 (PPC, PPCCOM, PPC32, PPC64, PPCVEC): Remove PPC_OPCODE_ANY.
45 (POWER, POWER2, PPCPWR2, POWER32, COM, COM32, M601, PWRCOM): Likewise.
46 (POWER4): Remove PPCCOM.
47 (PPCONLY): Don't define. Update all occurrences to PPC.
51 * dis-init.c (init_disassemble_info): New file and function.
52 * Makefile.am (CFILES): Add "dis-init.c".
53 (libopcodes_la_SOURCES): Add "dis-init.c".
54 (dis-init.lo): Specify dependencies.
55 * Makefile.in: Regenerate.
63 * ppc-opc.c (powerpc_opcodes): Combine identical PPC403/BOOKE entries.
64 Move duplicate mnemonic entries together. Use RS instead of RT on
66 * ppc-dis.c: Convert to ISO C.
70 * Makefile.am (stamp-frv): Copy frv.cpu and frv.opc from
71 $(srcdir)/../cpu temporarily when regenerating source files.
72 * Makefile.in: Regenerated.
76 * arm-dis.c (print_insn_arm: case 'A'): Add code to
77 disassemble unindexed form of Addressing Mode 5.
81 * ppc-opc.c (PPC440): Define.
82 (powerpc_opcodes): Allow mac*, mul*, nmac*, dccci, dcread, iccci,
83 icread instructions when PPC440. Add dlmzb instruction.
87 * dep-in.sed: Remove libintl.h.
88 * Makefile.am (POTFILES.in): Unset LC_COLLATE.
90 * Makefile.in: Regenerate.
94 * cgen-asm.c (hash_insn_array): Remove PARAMS macro.
95 (hash_insn_list): Ditto.
96 (build_asm_hash_table): Ditto.
97 (cgen_set_parse_operand_fn): Prototype definition.
98 (cgen_init_parse_operand): Ditto.
99 (hash_insn_array): Ditto.
100 (hash_insn_list): Ditto.
101 (build_asm_hash_table): Ditto.
102 (cgen_asm_lookup_insn): Ditto.
103 (cgen_parse_keyword): Ditto.
104 (cgen_parse_signed_integer): Ditto.
105 (cgen_parse_unsigned_integer): Ditto.
106 (cgen_parse_address): Ditto.
107 (cgen_validate_signed_integer): Ditto.
108 (cgen_validate_unsigned_integer): Ditto.
110 * cgen-opc.c (hash_keyword_name): Remove PARAMS macro.
111 (hash_keyword_value): Ditto.
112 (build_keyword_hash_tables): Ditto.
113 (cgen_keyword_lookup_name): Prototype definition.
114 (cgen_keyword_lookup_value): Ditto.
115 (cgen_keyword_add): Ditto.
116 (cgen_keyword_search_init): Ditto.
117 (cgen_keyword_search_next): Ditto.
118 (hash_keyword_name): Ditto.
119 (hash_keyword_value): Ditto.
120 (build_keyword_hash_tables): Ditto.
121 (cgen_hw_lookup_by_name): Ditto.
122 (cgen_hw_lookup_by_num): Ditto.
123 (cgen_operand_lookup_by_name): Ditto.
124 (cgen_operand_lookup_by_num): Ditto.
125 (cgen_insn_count): Ditto.
126 (cgen_macro_insn_count): Ditto.
127 (cgen_get_insn_value): Ditto.
128 (cgen_put_insn_value): Ditto.
129 (cgen_lookup_insn): Ditto.
130 (cgen_get_insn_operands): Ditto.
131 (cgen_lookup_get_insn_operands): Ditto.
132 (cgen_set_signed_overflow_ok): Ditto.
133 (cgen_clear_signed_overflow_ok): Ditto.
134 (cgen_signed_overflow_ok_p): Ditto.
136 * cgen-dis.c (hash_insn_array): Remove PARAMS macro.
137 (hash_insn_list): Ditto.
138 (build_dis_hash_table): Ditto.
139 (count_decodable_bits): Ditto.
140 (add_insn_to_hash_chain): Ditto.
141 (count_decodable_bits): Prototype definition.
142 (add_insn_to_hash_chain): Ditto.
143 (hash_insn_array): Ditto.
144 (hash_insn_list): Ditto.
145 (build_dis_hash_table): Ditto.
146 (cgen_dis_lookup_insn): Ditto.
148 * cgen-asm.in (parse_insn_normal): Remove PARAMS macro.
149 (@arch@_cgen_build_insn_regex): Prototype definition.
150 (parse_insn_normal): Ditto.
151 (@arch@_cgen_assemble_insn): Ditto.
152 (@arch@_cgen_asm_hash_keywords): Ditto.
154 * cgen-dis.in (print_normal): Remove PARAMS macro. Use void *
156 (print_address): Ditto.
157 (print_keyword): Ditto.
158 (print_insn_normal): Ditto.
160 (default_print_insn): Ditto.
162 (print_normal): Prototype definition. Use void * instead of PTR.
163 (print_address): Ditto.
164 (print_keyword): Ditto.
165 (print_insn_normal): Ditto.
168 (default_print_insn): Ditto.
169 (print_insn_@arch@): Ditto.
171 * cgen-ibld.in (insert_normal): Remove PARAMS macro.
172 (insn_insn_normal): Ditto.
173 (extract_normal): Ditto.
174 (extract_insn_normal): Ditto.
175 (put_insn_int_value): Ditto.
179 (insert_1): Prototype definition.
180 (insert_normal): Ditto.
181 (insert_insn_normal): Ditto.
182 (put_insn_int_value): Ditto.
185 (extract_normal): Ditto.
186 (extract_insn_normal): Ditto.
188 * fr30-asm.c: Regenerate.
190 * fr30-ibld.c: Ditto.
196 * ip2k-ibld.c: Ditto.
197 * iq2000-asm.c: Ditto.
198 * iq2000-dis.c: Ditto.
199 * iq2000-ibld.c: Ditto.
202 * m32r-ibld.c: Ditto.
203 * openrisc-asm.c: Ditto.
204 * openrisc-dis.c: Ditto.
205 * openrisc-ibld.c: Ditto.
206 * xstormy16-asm.c: Ditto.
207 * xstormy16-dis.c: Ditto.
208 * xstormy16-ibld.c: Ditto.
212 * po/fr.po: Updated French translation.
216 * configure.in (ALL_LINGUAS): Add nl.
217 * configure: Regenerate.
218 * po/nl.po: New Dutch translation.
222 * i860-dis.c: Convert to ISO C90. Remove superflous prototypes.
226 * po/ro.po: Updated Romanian translation.
230 * ppc-opc.c (insert_mbe, extract_mbe): Shift 1L instead of 1 up.
234 * po/fr.po: Updated French translation.
238 * arm-dis.c (parse_arm_disassembler_option): Do not expect
239 option string to be NUL terminated.
240 (parse_disassembler_options): Allow options to be space or
245 * po/es.po: New Spanish translation.
246 * po/sv.po: New Swedish translation.
247 * po/opcodes.pot: Regenerate.
251 * mips-dis.c (mips_arch_choices): Add rm7000 and rm9000 entries.
255 * po/tr.po: Update with latest version.
256 * po/POTFILES.in: Regenerate.
257 * Makefile.in: Regenerate.
261 * po/opcodes.pot: Regenerate.
266 * m10300-dis.c (disassemble): Negate negative accumulator's shift.
268 * m10300-dis.c (disassemble, case FSREG, FDREG): Don't assume
269 32-bit longs when sign-extending operands.
271 * m10300-opc.c: Remove MN10300_OPERAND_RELAX from all FSREGs.
272 * m10300-dis.c (HAVE_AM33_2): Define.
273 (disassemble): Use it.
274 (HAVE_AM33): Redefine.
275 (print_insn_mn10300): Fix mask for 5-byte extended insns.
277 * m10300-opc.c: Renamed AM332 to AM33_2.
279 * m10300-opc.c: Defined AM33 2.0 register operands. Added support
280 for AM33 2.0 `imm8,(abs16)' addressing mode for btst, bset and
281 bclr. Implemented `fbCC', `flCC', `dcpf' and all FP insns.
282 * m10300-dis.c (print_insn_mn10300): Recognize 5byte extended
283 insn code of AM33 2.0.
284 (disassemble): Recognize FMT_D3. Print out FP register names.
288 * mips-dis.c (set_default_mips_dis_options): Get BFD from
289 the disassembler_info's section, rather than from the
290 disassembler_info's symbols pointer.
294 * ppc-opc.c: Remove NULL pointer checks. Formatting. Remove
295 extraneous ATTRIBUTE_UNUSED.
296 * ppc-dis.c (print_insn_powerpc): Always pass a valid address to
301 * ppc-opc.c: Convert to C90, removing unnecessary prototypes and
304 * ppc-opc.c: Remove PARAMS from prototypes.
306 (insert_fxm): New function, used by both FXM and FXM4.
307 (extract_fxm): Likewise.
308 (XFXFXM_MASK): Remove 1 << 20 term.
309 (powerpc_opcodes): Add Power4 version of "mfcr". Simplify "mtcr" mask.
313 * s390-dis.c (s390_extract_operand): Add support for long displacements.
314 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z990.
315 * s390-opc.c (D20_20): Add define for 20 bit displacements.
316 (INSTR_RRF_R0RR, INSTR_RSL_R0RD, INSTR_RSY_RRRD, INSTR_RSY_RURD,
317 INSTR_RSY_AARD, INSTR_RXY_RRRD, INSTR_RXY_FRRD, INSTR_SIY_URD): Add
318 new instruction formats.
319 (MASK_RRF_R0RR, MASK_RSL_R0RD, MASK_RSY_RRRD, MASK_RSY_RURD,
320 MASK_RSY_AARD, MASK_RXY_RRRD, MASK_RXY_FRRD, MASK_SIY_URD): Likewise.
321 (s390_opformats): Likewise.
322 * s390-opc.txt: Add new instructions for cpu type z990. Add missing
323 hfp instructions. Add missing instructions pgin, pgout and xsch.
327 * i386-dis.c (PNI_Fixup): New. Fix up "mwait" and "monitor" in
328 Intel Precott New Instructions.
329 (PREGRP27): New. Added for "addsubpd" and "addsubps".
330 (PREGRP28): New. Added for "haddpd" and "haddps".
331 (PREGRP29): New. Added for "hsubpd" and "hsubps".
332 (PREGRP30): New. Added for "movsldup" and "movddup".
333 (PREGRP31): New. Added for "movshdup" and "movhpd".
334 (PREGRP32): New. Added for "lddqu".
335 (dis386_twobyte): Use PREGRP30 to replace the "movlpX" entry.
336 Use PREGRP31 to replace the "movhpX" entry. Use PREGRP28 for
337 entry 0x7c. Use PREGRP29 for entry 0x7d. Use PREGRP27 for
338 entry 0xd0. Use PREGRP32 for entry 0xf0.
339 (twobyte_has_modrm): Updated.
340 (twobyte_uses_SSE_prefix): Likewise.
341 (grps): Use PNI_Fixup in the "sidtQ" entry.
342 (prefix_user_table): Add PREGRP27, PREGRP28, PREGRP29, PREGRP30,
343 PREGRP31 and PREGRP32.
344 (float_mem): Use "fisttp{l||l|}" in entry 1 in opcode 0xdb.
345 Use "fisttpll" in entry 1 in opcode 0xdd.
346 Use "fisttp" in entry 1 in opcode 0xdf.
350 * z8k-dis.c (instr_data_s): Change tabl_index from long to int.
351 (print_insn_z8k): Correctly check return value from
352 z8k_lookup_instr call.
353 (unparse_instr): Handle CLASS_IRO case.
354 * z8kgen.c: Fix function definitions. Fix formatting.
355 (opt): Add brk opcode alias for non-simulator breakpoint. Add
356 missing and fix existing in/out and sin/sout opcode definitions.
357 (args): "@ri", "@ro" - add CLASS_IRO register usage for in/out
359 (internal): Check p->flags for non-zero before dereferencing it.
360 (gas): Add CLASS_IRO line. Insert new OPC_xxx lines for the added
361 opcodes and renumber the remaining lines repectively.
362 (main): Remove "-d" command line switch.
363 * z8k-opc.h: Regenerate with new z8kgen.c.
367 * po/Make-in (DESTDIR): New.
368 (install-data-yes): Support $(DESTDIR).
369 (uninstall): Likewise.
373 * Makefile.am: Run "make dep-am".
374 * Makefile.in: Regenerate.
375 * po/POTFILES.in: Regenerate.
379 * cgen-asm.in (@arch@_cgen_assemble_insn): CGEN_INSN_RELAX renamed to
381 * fr30-asm.c,fr30-desc.c,fr30-desc.h: Regenerate.
382 * frv-asm.c,frv-desc.c,frv-desc.h: Regenerate.
383 * ip2k-asm.c,ip2k-desc.c,ip2k-desc.h: Regenerate.
384 * iq2000-asm.c,iq2000-desc.c,iq2000-desc.h: Regenerate.
385 * m32r-asm.c,m32r-desc.c,m32r-desc.h,m32r-opc.c: Regenerate.
386 * openrisc-asm.c,openrisc-desc.c,openrisc-desc.h: Regenerate.
387 * xstormy16-asm.c,xstormy16-desc.c,xstormy16-desc.h: Regenerate.
392 * ppc-opc.c (DQ, RAQ, RSQ, RTQ): Define.
393 (insert_dq, extract_dq, insert_raq, insert_rtq, insert_rsq): New.
394 (powerpc_opcodes): Add "attn", "lq" and "stq".
398 * h8300-dis.c (bfd_h8_disassemble): Don't print brackets round
399 rts/l and rte/l register lists.
403 * frv-desc.c: Regenerate.
404 * frv-opc.c: Regenerate.
405 * frv-asm.c: Regenerate.
406 * frv-desc.h: Regenerate.
407 * frv-dis.c: Regenerate.
408 * frv-ibld.c: Regenerate.
409 * frv-opc.h: Regenerate.
410 * po/opcodes.pot: Regenerate.
416 * disassemble.c (disassembler): Add support for h8300sx.
417 * h8300-dis.c: Ditto.
421 * frv-desc.c: Regenerate.
422 * frv-opc.c: Regenerate.
424 * aclocal.m4: Regenerate.
425 * config.in: Regenerate.
426 * configure: Regenerate.
427 * iq2000-asm.c: Regenerate.
428 * iq2000-desc.c: Regenerate.
429 * iq2000-desc.h: Regenerate.
430 * iq2000-dis.c: Regenerate.
431 * iq2000-ibld.c: Regenerate.
432 * iq2000-opc.c: Regenerate.
433 * iq2000-opc.h: Regenerate.
434 * po/POTFILES.in: Regenerate.
435 * po/opcodes.pot: Regenerate.
439 * i860-dis.c (crnames): Add bear, ccr, p0, p1, p2, p3.
440 (print_insn_i860): Grab 4 bits of the control register field
445 * i860-dis.c (print_insn_i860): Instruction shrd has a dual bit,
450 * Makefile.am (libopcodes_la_LIBADD): Add libbfd.la.
451 (libopcodes_la_DEPENDENCIES): Add libbfd.la.
452 * Makefile.in: Regenerated.
456 * configure.in (ALL_LINGUAS): Add Romanian translation.
457 * configure: Regenerate.
458 * po/ro.po: New file: Romanian translation.
462 * disassemble.c (disassembler): Add support for h8300hn and h8300sn.
466 * i386-dis.c (print_insn): Test intel_syntax against (char) -1 in
467 case char is unsigned.
471 * z8k-dis.c (z8k_lookup_instr): Optimize FETCH_DATA calls.
472 (unpack_instr): Fix representation of segmented addresses.
473 (intr_name): Added, contains names of the parameters to the EI/DI
475 (unparse_instr): Fix display of EI/DI parameters.
479 * fr30-desc.c,fr30-desc.h,fr30-opc.c,fr30-opc.h: Regenerate.
480 * frv-desc.c,frv-desc.h,frv-opc.c,frv-opc.h: Regenerate.
481 * ip2k-desc.c,ip2k-desc.h,ip2k-opc.c,ip2k-opc.h: Regenerate.
482 * m32r-desc.c,m32r-desc.h,m32r-opc.c,m32r-opc.h: Regenerate.
483 * m32r-opinst.c: Regenerate.
484 * openrisc-desc.c,openrisc-desc.h,openrisc-opc.c,openrisc-opc.h: Regenerate.
485 * xstormy16-desc.c,xstormy16-desc.h,xstormy16-opc.c,xstormy16-opc.h: Regenerate.
489 * h8500-opc.c: Replace occurrances of 'Hitachi' with 'Renesas'.
493 * ia64-ic.tbl (fr-readers): Add mem-writers-fp.
494 * ia64-asmtab.c: Regenerate.
498 * mips-dis.c (mips_gpr_names_newabi): Reverted previous patch.
502 * mips-dis.c (mips_gpr_names_newabi): $12-$15 are named $t4-$t7.
506 * tic4x-dis.c: Namespace cleanup. Replace s/c4x/tic4x and
511 * arm-dis.c: Remove presence of (r) and (tm) symbols.
512 * arm-opc.h: Remove presence of (r) and (tm) symbols.
517 Contribute support for Intel's iWMMXt chip - an ARM variant:
519 * arm-dis.c (regnames): Add iWMMXt register names.
520 (set_iwmmxt_regnames): New function.
521 (print_insn_arm): Handle iWMMXt formatters.
522 * arm-opc.h: Document iWMMXt formatters.
523 (arm_opcod): Add iWMMXt instructions.
527 * i386-dis.c (dis386): Recognize icebp (0xf1).
531 * s390-dis.c (init_disasm): Rename S390_OPCODE_ESAME to
533 (print_insn_s390): Use new modes field of s390_opcodes.
534 * s390-mkopc.c (ARCHBITS_ESAONLY, ARCHBITS_ESA, ARCHBITS_ESAME): Remove.
535 (s390_opcode_mode_val, s390_opcode_cpu_val): New enums.
536 (struct op_struct): Remove archbits. Add mode_bits and min_cpu.
537 (insertOpcode): Replace archbits by min_cpu and mode_bits.
538 (dumpTable): Write mode_bits and min_cpu instead of archbits.
539 (main): Adapt to new format in s390-opcode.txt.
540 * s390-opc.c (s390_opformats): Replace archbits by min_cpu and
542 * s390-opc.txt: Replace archbits by min_cpu and mode_bits.
546 * ppc-opc.c: Fix formatting. Update copyright date.
550 * ppc-opc.c (powerpc_opcodes): Readd tlbre for PPC403.
554 * hppa-dis.c: Formatting.
558 * hppa-dis.c (print_insn_hppa): Implement fcnv instruction modifiers.
560 * hppa-dis.c (print_insn_hppa <2 bit space register>): Do not print
561 the space register when the value is zero.
565 * mips-dis.c (print_mips_disassembler_options): Make 'i' unsigned,
566 use ARRAY_SIZE in loops.
570 * fr30-desc.c: Regenerate.
574 * i386-dis.c (dq_mode, Edq): Define.
575 (dis386_twobyte): Correct movd operands.
576 (OP_E): Handle dq_mode case.
580 * sparc-dis.c (print_insn_sparc): When examining values added in
581 to rs1, make sure that there are previous instructions.
589 * sh-dis.c (print_insn_shx): Handle bfd_mach_sh2e.
590 * sh-opc.h (arch_sh2e, arch_sh2e_up): New.
591 (arch_sh2_up): Added sh2e.
592 (sh_table): Replaced all occurrences of arch_sh3e_up with
593 arch_sh2e_up, except in fsqrt.
597 * sh64-dis.c: Include elf32-sh64.h.
598 * Makefile.am: Run "make dep-am".
599 * Makefile.in: Regenerate.
603 * alpha-opc.c (alpha_opcodes): Add bugchk, rduniq, wruniq, gentrap
608 * Makefile.am: Run "make dep-am".
609 * Makefile.in: Regenerate.
610 * po/POTFILES.in: Regenerate.
614 * Makefile.am (ALL_MACHINES): Add msp430-dis.lo.
615 * Makefile.in: Regenerate.
619 * ppc-opc.c (powerpc_macros <extrwi>): Accept a shift of 32.
624 * iq2000-asm.c: New file.
625 * iq2000-desc.c: Likewise.
626 * iq2000-desc.h: Likewise.
627 * iq2000-dis.c: Likewise.
628 * iq2000-ibld.c: Likewise.
629 * iq2000-opc.c: Likewise.
630 * iq2000-opc.h: Likewise.
631 * Makefile.am (HFILES): Add iq2000-desc.h, iq2000-opc.h.
632 (CFILES): Add iq2000-asm.c, iq2000-desc.c, iq2000-dis.c,
633 iq2000-ibld.c, iq2000-opc.c.
634 (ALL_MACHINES): Add iq2000-asm.lo, iq2000-desc.lo, iq2000-dis.lo,
635 iq2000-ibld.lo, iq2000-opc.lo.
636 (CLEANFILES): Add stamp-iq2000.
637 (IQ2000_DEPS): New macro.
638 (stamp-iq2000): New target.
639 * Makefile.in: Regenerate.
640 * configure.in: Handle bfd_iq2000_arch.
641 * configure: Regenerate.
645 * mips-dis.c (print_insn_args): Use position extracted by "+A"
646 to calculate size for "+B". Redo code for "+C" so it shares
647 the same style as "+A" and "+B" now do.
651 * mips-dis.c: Update copyright years.
652 (print_insn_arg): Rename to...
653 (print_insn_args): This, returning void. Process the whole
654 string of args rather than a single one. Reindent.
655 (print_insn_mips): Update to match the above.
659 * mips-opc.c (mips_builtin_opcodes): Move "di" into the
660 right order alphabetically, and make all hex constants use
665 * mips-dis.c (mips_cp0sel_name): New structure.
666 (mips_cp0sel_names_mips3264, mips_cp0sel_names_mips3264r2)
667 (mips_cp0sel_names_sb1): New arrays.
668 (mips_arch_choice): New structure members "cp0sel_names" and
670 (mips_arch_choices): Add references to new cp0sel_names arrays
671 as appropriate, and make all existing entries reference
672 appropriate mips_XXX_names_numeric arrays rather than simply
674 (mips_cp0sel_names, mips_cp0sel_names_len): New variables.
675 (lookup_mips_cp0sel_name): New function.
676 (set_default_mips_dis_options): Set mips_cp0sel_names and
677 mips_cp0sel_names_len as appropriate. Remove now-unnecessary
678 checks for NULL register name arrays.
679 (parse_mips_dis_option): Likewise.
680 (print_insn_arg): Handle "+D" operand type.
681 * mips-opc.c (mips_builtin_opcodes): Add new "+D" variants
682 of mfc0, mtc0, dmfc0, and dmtc0 to print CP0+sel register
687 * mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric)
688 (mips_hwr_names_mips3264r2): New arrays.
689 (mips_arch_choice): New "hwr_names" member.
690 (mips_arch_choices): Adjust for structure change, and add a new
691 entry for "mips32r2" ISA.
692 (mips_hwr_names): New variable.
693 (set_default_mips_dis_options): Set mips_hwr_names.
694 (parse_mips_dis_option): New "hwr-names" option which sets
695 mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names.
696 (print_insn_arg): Change return type to "int"
697 and use that to indicate number of characters consumed.
698 Add support for "+" operand extension character, "+A", "+B",
699 "+C", and "K" operands.
700 (print_insn_mips): Adjust for changes to print_insn_arg.
701 (print_mips_disassembler_options): Adjust for "hwr-names"
702 addition and "reg-names" change.
703 * mips-opc (I33): New define (shorthand for INSN_ISA32R2).
704 (mips_builtin_opcodes): Note that "nop" and "ssnop" are special
705 forms of "sll". Add new MIPS32 Release 2 instructions: ehb,
706 di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2,
707 rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh.
708 Note that hardware rotate instructions (ror, rorv) can be
709 used on MIPS32 Release 2, and add the official mnemonics
710 for them (rotr, rotrv) and the similar "rotl" mnemonic for
715 * configure.in: Add msp430 target.
716 * configure: Regenerate.
717 * disassemble.c: Add entry for msp430 disassembly.
718 * msp430-dis.c: New file: msp430 disassembler.
722 * disassemble.c (disassembler_usage): Add invocation of
723 print_mips_disassembler_options.
724 * mips-dis.c: Include libiberty.h.
725 (print_mips_disassembler_options, set_default_mips_dis_options)
726 (parse_mips_dis_option, parse_mips_dis_options, choose_abi_by_name)
727 (choose_arch_by_name, choose_arch_by_number): New functions.
728 (mips_abi_choice, mips_arch_choice): New structures.
729 (mips32_reg_names, mips64_reg_names, reg_names): Remove.
730 (mips_gpr_names_numeric, mips_gpr_names_oldabi)
731 (mips_gpr_names_newabi, mips_fpr_names_numeric)
732 (mips_fpr_names_32, mips_fpr_names_n32, mips_fpr_names_64)
733 (mips_cp0_names_numeric, mips_cp0_names_mips3264)
734 (mips_cp0_names_sb1, mips_abi_choices, mips_arch_choices)
735 (mips_processor, mips_isa, mips_gpr_names, mips_fpr_names)
736 (mips_cp0_names): New variables.
737 (print_insn_args): Use new variables to print GPR, FPR, and CP0
739 (mips_isa_type): Remove.
740 (print_insn_mips): Remove ISA and CPU setup since it is now done...
741 (_print_insn_mips): Here. Remove register setup code, and
742 call set_default_mips_dis_options and parse_mips_dis_options
744 (print_mips16_insn_arg): Use mips_gpr_names instead of mips32_names.
748 * Makefile.in: Regenerate.
752 * cgen-asm.c (cgen_parse_keyword): Added underscore to symbol character
753 check to fix false keyword trigger with names such as <keyword>_foo.
757 * Makefile.am (CGEN_CPUS): New variable.
758 (run-cgen-all): New rule.
759 * Makefile.in: Regenerate.
763 * mips-opc.c (mips_builtin_opcodes): Remove one "ror" and two
764 "dror" entries, and reorder the remaining "dror" and "ror" entries.
768 * xstormy16-asm.c (parse_immediate16): Add prototype.
772 * xstormy16-asm.c: Regenerate.
776 * ns32k-dis.c (print_insn_ns32k): Constify "d", remove register
781 * h8500-opc.h (h8500_table): Add missing initializers to quiet
783 * pj-dis.c (print_insn_pj): Adjust for pj_opc_info_t change.
784 * pj-opc.c (pj_opc_info): Add braces around union initializer.
785 * z8kgen.c: Include "libiberty.h".
786 (opt, args, toks): Fix initializer warnings.
787 (chewname): Make "name" a char **. Return mnemonic trimmed of
789 (gas): Improve emitted "DO NOT EDIT" warning. Format emitted
790 opcode_entry_type, and make "nicename" and "name" const. Make
791 z8k_table const too. Formatting. Generate idx as gas needs it.
792 * z8k-opc.h: Regenerate.
796 * m68hc11-dis.c (print_indexed_operand): Fix PC-relative address
797 for 9 and 16-bit PC-relative addressing mode.
801 * ppc-opc.c: Delete evsabs, evsnabs, evsneg, evsadd, evssub,
802 evsmul, evsdiv, evscmpgt, evsgmplt, evststgt, evtstlt, evststeq,
803 evscfui, evscfsi, evscfuf, evscfsf, evsctui, evsctuiz, evsctsi,
804 evsctsiz, evsctuf, evsctsf, evmwhssfaa, evmwhssmaa, evmwhsmfaa,
805 evmwhsmiaa, evmwhusiaa, evmwhumiaa, evmwhssfan, evmwhssian,
806 evmwhsmfan, evmwhsmian, evmwhusian, evmwhumian, evmwhgssfaa,
807 evmwhgsmfaa, evmwhgsmiaa, evmwhgumiaa, evmwhgssfan, evmwhgsmfan,
808 evmwhgsmian, evmwhgumian.
809 (mftb): Add to opcode table.
810 (mtspefscr): Change RT to RS in opcode table.
814 * ppc-opc.c: Move mbar and msync up. Change mask for mbar and
819 * ia64-opc-d.c (ia64_opcodes_d): Add "hint" instruction.
820 * ia64-opc-b.c: Add "hint.b" instruction.
821 * ia64-opc-f.c: Add "hint.f" instruction.
822 * ia64-opc-i.c: Add "hint.i" instruction.
823 * ia64-opc-m.c: Add "hint.m", "fc.i", "ld16", "st16", and
824 "cmp8xchg16" instructions.
825 * ia64-opc-x.c: Add "hint.x" instruction.
827 * ia64-opc.h (AR_CSD): New macro.
829 * ia64-ic.tbl: Update according to SDM2.1.
830 * ia64-raw.tbl: Ditto.
831 * ia64-waw.tbl: Ditto.
833 * ia64-gen.c (in_iclass): Handle "hint" like "nop".
834 (lookup_regindex): Recognize AR[FCR], AR[EFLAG], AR[CSD],
835 AR[SSD], AR[CFLG], AR[FSR], AR[FIR], and AR[FDR].
836 * ia64-asmtab.c: Regenerate.
840 * ppc-opc.c: Remove evmwlssf, evmwlssfa, evmwlsmf, evmwlsmfa,
841 evmwlssfaaw, evmwlsmfaaw, evmwlssfanw, evmwlsfanw.
845 * ppc-opc.c (PMRN): Remove.
847 (powerpc_opcodes): Change PMRN to SPR.
849 Change mftb to look like mftbl.
850 Move mftb before mftbl.
853 Change mfpmr to use PMR.
854 Change mtpmr to use PMR.
856 (insert_ev2): Fix mask and shift.
861 (extract_pmrn): Remove.
862 (insert_pmrn): Remove.
866 * ia64-opc-m.c: Add ld8.mov.
867 * ia64-asmtab.c: Regenerate.
871 * arm-dis.c (print_insn_arm): Constify "insn". Formatting.
872 (print_insn_thumb): Likewise.
873 * h8500-dis.c (print_insn_h8500): Constify "opcode".
874 * mcore-dis.c (print_insn_mcore): Constify "op". Formatting.
875 * ns32k-dis.c (print_insn_arg <case 'F'>): Use a union to avoid
876 type-punned pointer warnings.
877 <case 'L'>: Likewise. Fix error message too.
878 * pdp11-dis.c (print_reg): Warning fix.
879 * sh-dis.c (print_movxy): Constify "op" param.
880 (print_insn_ddt): Constify sh_opcode_info vars.
881 (print_insn_ppi): Likewise.
882 (print_insn_sh): Likewise.
883 * tic30-dis.c (cnvt_tmsfloat_ieee): Use a union to avoid
884 type-punned pointer warnings.
885 * w65-dis.c (print_insn_w65): Constify "op".
889 * m68hc11-dis.c (PC_REGNUM): Define.
890 (print_indexed_operand): Need an adjustment for some PC-relative
891 operand modes; print the final address of PC-relative modes.
892 (print_insn): Take into account movw/movb to adjust the PC-relative
897 *arm-dis.c, cris-dis.c, h8300-dis.c, mips-dis.c, mmix-dis.c, sh-dis.c,
898 sh64-dis.c, v850-dis.c: Replace boolean with bfd_boolean, true with
899 TRUE, false with FALSE. Simplify comparisons of bfd_boolean vars
900 with TRUE/FALSE. Formatting.
904 * xstormy16-opc.c: Regenerate.
908 * ia64-dis.c (print_insn_ia64): Correct handling of IA64_OPND_TGT64.
912 * xstormy16-desc.c: Regenerate.
913 * xstormy16-opc.c: Regenerate.
914 * xstormy16-opc.h: Regenerate.
918 * avr-dis.c: Include libiberty.h (for xmalloc).
919 (struct avr_opcodes_s): Remove 'bin_mask' field (it's
920 automatically computed in the init routine).
921 (AVR_INSN): No longer provide bin_mask field in initializer.
922 (avr_opcodes_s): Declare as const.
923 (print_insn_avr): Store the bin_mask field in a separate table
924 (allocated with xmalloc); iterate through it at the same time as
925 we iterate through the opcodes.
929 * h8300-dis.c: Include libiberty.h (for xmalloc).
930 (struct h8_instruction): New type, used to wrap h8_opcodes with a
931 length field (computed at run-time).
932 (h8_instructions): New variable.
933 (bfd_h8_disassemble_init): Allocate the storage for
934 h8_instructions. Fill h8_instructions with pointers to the
935 appropriate opcode and the correct value for the length field.
936 (bfd_h8_disassemble): Iterate through h8_instructions instead of
941 * arc-opc.c (arc_ext_opcodes): Define.
942 (arc_ext_operands): Define.
943 * i386-dis.c (Suffix3DNow): Declare as const.
944 * arm-opc.h (arm_opcodes): Declare as const.
945 (thumb_opcodes): Declare as const.
946 * h8500-opc.h (h8500_table): Declare as const.
947 (h8500_table): Use a NULL for the opcode in the terminator, so
948 that code testing (opcode->name) behaves correctly.
949 * mcore-opc.h (mcore_table): Declare as const.
950 * sh-opc.h (sh_table): Declare as const.
951 * w65-opc.h (optable): Declare as const.
952 * z8k-opc.h (z8k_table): Declare as const.
956 * tic4x-dis.c: Added support for enhanced and special insn.
957 (c4x_print_op): Added insn class 'i' and 'j'
958 (c4x_hash_opcode_special): Add to support special insn
959 (c4x_hash_opcode): Update to support the new opcode-list
960 format. Add support for the new special insns.
961 (c4x_disassemble): New opcode-list support.
965 * m88k-dis.c: Include libiberty.h (for xmalloc).
966 (HASHTAB): New type, used to build instruction hash tables.
967 Contains a pointer to an INSTAB and a pointer to the next hash
969 (instructions): Move definition from m88k.h; remove initialization
971 (hashtable): Now an aray of pointer-to-HASHTAB, not INSTAB.
972 (printop): Mark pointer to OPSPEC as const.
973 (install): Remove; fold into init_disasm.
974 (m88kdis): Update to ihashtab_initialized to 1 after calling
975 init_disasm. entry_ptr now iterates through HASHTABs, not
977 (init_disasm): Iterate through the instructions and add to
982 * tic4x-dis.c: (c4x_print_op): Add support for the new argument
983 format. Fix bug in 'N' register printer.
987 * ppc-dis.c (print_insn_powerpc): Correct condition register display.
991 * ppc-opc.c (EVUIMM_4): Change bit size to 32.
997 * Makefile.am (ia64-asmtab.c): Update to use the new '--srcdir'
998 argument to ia64-gen.
999 Regenerate dependencies for ia64-len.lo.
1000 * Makefile.in: Regenerate.
1001 * ia64-gen.c: Convert to use getopt(). Add the standard GNU
1002 options, as well as '--srcdir', which controls the directory in
1003 which ia64-gen looks for the sources it uses to generate the
1004 output table. Add a 'const' to the declaration of the final
1005 output table. Call xmalloc_set_program_name to set the program
1007 * ia64-asmtab.c: Regenerate.
1011 * ia64-gen.c: Fix comment formatting and compile time warnings.
1012 * ia64-opc-a.c: Fix compile time warnings.
1013 * ia64-opc-b.c: Likewise.
1014 * ia64-opc-d.c: Likewise.
1015 * ia64-opc-f.c: Likewise.
1016 * ia64-opc-i.c: Likewise.
1017 * ia64-opc-m.c: Likewise.
1018 * ia64-opc-x.c: Likewise.
1022 * ppc-opc.c: Change RD to RS for evmerge*.
1026 * sparc-opc.c (sparc_opcodes) <fb, fba, fbe, fbz, fbg, fbge,
1027 fbl, fble, fblg, fbn, fbne, fbnz, fbo, fbu, fbue, fbug, fbuge,
1028 fbul, fbule>: Add conditional/unconditional branch
1033 * m68hc11-dis.c (print_insn): Treat bitmask and branch operands
1042 * mips-dis.c (print_insn_arg): Handle '[', ']', 'e' and '%'.
1043 (mips_isa_type): Handle bfd_mach_mips4120, bfd_mach_mips5400
1044 and bfd_mach_mips5500.
1045 * mips-opc.c (V1): Include INSN_4111 and INSN_4120.
1046 (N411, N412, N5, N54, N55): New convenience defines.
1047 (mips_builtin_opcodes): Add vr4120, vr5400 and vr5500 opcodes.
1048 Change dmadd16 and madd16 from V1 to N411.
1052 * mips-dis.c (print_insn_mips): Always allow disassembly of
1057 * po/de.po: Updated German translation.
1061 * Makefile.am: Run "make dep-am".
1062 * Makefile.in: Regenerate.
1063 * po/POTFILES.in: Regenerate.
1067 * ppc-opc.c (CRFD, CRFS): Add PPC_OPERAND_CR flag so that cr
1068 register names are accepted.
1072 * tic4x-dis.c: Add function declarations and ATTRIBUTE_UNUSED.
1073 Convert functions to K&R format.
1077 * ppc-opc.c (MFDEC2): Include Book-E.
1078 (PPCCHLK64): New opcode mask.
1079 (evsubw, evsubiw, evmr, evnot, isellt, iselgt, iseleq, mfpid,
1080 mfcsrr0, mfcsrr1, mfdear, mfesr, mfivpr, mfusprg0, mftbl,
1081 mftbu, mfpir, mfdbsr, mfdbcr0, mfdbcr1, mfdbcr2, mfiac1,
1082 mfiac2, mfiac3, mfiac4, mfdac1, mfdac2, mfdvc1, mfdvc2, mftsr,
1083 mftcr, mfivor0, mfivor1, mfivor2, mfivor3, mfivor4, mfivor5,
1084 mfivor6, mfivor7, mfivor8, mfivor9, mfivor10, mfivor11,
1085 mfivor12, mfivor13, mfivor14, mfivor15, mfbbear, mfmcsrr0,
1086 mfmcsrr1, mfmcsr, mtpid, mtdecar, mtcsrr0, mtcsrr1, mtdear,
1087 mtesr, mtivpr, mtusprg0, mtsprg4, mtsprg5, mtsprg6, mtsprg7,
1088 mtdbsr, mtdbcr0, mtdbcr1, mtdbcr2, mtiac1, mtiac2, mtiac3,
1089 mtiac4, mtdac1, mtdac2, mtdvc1, mtdvc2, mttsr, mttcr, mtivor0,
1090 mtivor1, mtivor2, mtivor3, mtivor4, mtivor5, mtivor6, mtivor7,
1091 mtivor8, mtivor9, mtivor10, mtivor11, mtivor12, mtivor13,
1092 mtivor14, mtivor15, mtbbear, mtmcsrr0, mtmcsrr1, mtmcsr): New
1093 Book-E instructions.
1094 (evfsneg): Fix opcode value.
1095 (dcbtstlse, dcbtlse, icblce, dcblce, icbtsle): Use PPCCHLK64
1097 (mcrxr64, tlbivaxe, tlbsxe, tlbsxe.): Restrict to 64-bit
1099 (extsw): Restrict to 64-bit PPC instruction sets.
1100 (extsw.): Does not exist in 64-bit Book-E.
1101 (powerpc_macro): Remove mftbl, mftbu and mftb Book-E macros as
1102 they are no longer needed.
1106 * ppc-dis.c (powerpc_dialect): Add missing PPC_OPCODE_CLASSIC.
1110 * po/da.po: Updated Danish translation file.
1114 * ppc-opc.c (extsw, extsw.): Do not allow for the BookE32.
1118 * disassemble.c (disassembler_usage): Add invocation of
1119 print_ppc_disassembler_options.
1120 * ppc-dis.c (print_ppc_disassembler_options): New function.
1124 * ppc-opc.c: The BookE implementations of the TLBWE and TLBRE
1125 instructions do not take any arguments.
1129 * v850-opc.c: Remove redundant references to V850EA architecture.
1133 * arc-opc.c: Include bfd.h.
1134 (arc_get_opcode_mach): Subtract off base bfd_mach value.
1138 * v850-dis.c (disassemble): Remove bfd_mach_v850ea case.
1140 * mips-dis.c (_print_insn_mips): Don't use hard-coded mach constants.
1144 * configure.in: Added bfd_tic4x_arch.
1145 * configure: Regenerate.
1146 * Makefile.am: Added tic4x-dis.o target.
1147 * Makefile.in: Regenerate.
1151 * disassemble.c: Added tic4x target and c4x
1152 disassembler routine.
1153 * tic4x-dis.c: New file.
1157 * z8k-dis.c (unparse_instr): case CLASS_BA: Designate hex
1159 * z8kgen.c (opt): Fix definition of "in rd,imm16" opcode.
1160 * z8k-opc.h: Regenerated with new z8kgen.c.
1166 * ppc-dis.c (powerpc_dialect): Support `-m500', `-m500x2' and
1167 `-mefs'. Turn off AltiVec for E500 and efs.
1168 (print_insn_powerpc): Don't print an AltiVec instruction if the
1171 * ppc-opc.c (insert_pmrn, extract_pmrn, insert_ev2, extract_ev2,
1172 insert_ev4, extract_ev4, insert_ev8, extract_ev8): New functions
1173 for extracting pmrn/evld/evstd/etc operands.
1174 (CRB, CRFD, CRFS, DC, RD): New instruction fields.
1175 (CT): Make this equal to RD + 1.
1176 (PMRN): New operand.
1178 (EVUIMM, EVUIMM_2, EVUIMM_4, EVUIMM_8): New operands.
1180 (EVSEL, EVSEL_MASK): New instruction form and mask for EVSEL.
1181 (ISEL, ISEL_MASK): New instruction form and mask for ISEL.
1182 (XISEL, XISEL_MASK): New instruction form and mask for ISEL.
1183 (CTX, CTX_MASK): New instruction form and mask for context cache
1185 (UCTX, UCTX_MASK): New instruction form and mask for user context
1187 (XC, XC_MASK, XUC, XUC_MASK): New instruction forms.
1188 (CLASSIC): New define.
1189 (PPCESPE): New define.
1190 (PPCISEL, , PPCBRLK, PPCPMR, PPCCHLK, PPCRFMI): New
1191 defines for integer select, cache control, branch
1192 locking, power management, cache locking and machine check
1193 APU instructions, respectively.
1194 (efsabs, efsnabs, efsneg, efsadd, efssub, efsmul,
1195 efsdiv, efscmpgt, efscmplt, efscmpeq, efststgt, efststlt,
1196 efststeq, efscfui, efsctuiz, efscfsi, efscfuf, efscfsf,
1197 efsctui, efsctsi, efsctsiz, efsctuf, efsctsf,
1198 evaddw, evaddiw, evsubfw, evsubifw, evabs, evneg, evextsb,
1199 evextsh, evrndw, evcntlzw, evcntlsw, brinc, evand, evandc, evor,
1200 evorc, evxor, eveqv, evnand, evnor, evrlw, evrlwi, evslw, evslwi,
1201 evsrws, evsrwu, evsrwis, evsrwiu, evsplati, evsplatfi, evmergehi,
1202 evmergelo, evmergehilo, evmergelohi, evcmpgts, evcmpgtu, evcmplts,
1203 evcmpltu, evcmpeq, evsel, evldd, evlddx, evldw, evldwx, evldh,
1204 evldhx, evlwhe, evlwhex, evlwhou, evlwhoux, evlwhos, evlwhosx,
1205 evlwwsplat, evlwwsplatx, evlwhsplat, evlwhsplatx, evlhhesplat,
1206 evlhhesplatx, evlhousplat, evlhousplatx, evlhossplat, evlhossplatx,
1207 evstdd, evstddx, evstdw, evstdwx, evstdh, evstdhx, evstwwe,
1208 evstwwex, evstwwo, evstwwox, evstwhe, evstwhex, evstwho, evstwhox,
1209 evfsabs, evfsnabs, evfsneg, evfsadd, evfssub, evfsmul, evfsdiv,
1210 evfscmpgt, evfscmplt, evfscmpeq, evfststgt, evfststlt, evfststeq,
1211 evfscfui, evfsctuiz, evfscfsi, evfscfuf, evfscfsf, evfsctui,
1212 evfsctsi, evfsctsiz, evfsctuf, evfsctsf, evsabs, evsnabs, evsneg,
1213 evsadd, evssub, evsmul, evsdiv, evscmpgt, evsgmplt, evsgmpeq,
1214 evststgt, evststlt, evststeq, evscfui, evscfsi, evscfuf, evscfsf,
1215 evsctui, evsctuiz, evsctsi, evsctsiz, evsctuf, evsctsf, evmhossf,
1216 evmhossfa, evmhosmf, evmhosmfa, evmhosmi, evmhosmia, evmhoumi,
1217 evmhoumia, evmhessf, evmhessfa, evmhesmf, evmhesmfa, evmhesmi,
1218 evmhesmia, evmheumi, evmheumia, evmhossfaaw, evmhossiaaw,
1219 evmhosmfaaw, evmhosmiaaw, evmhousiaaw, evmhoumiaaw, evmhessfaaw,
1220 evmhessiaaw, evmhesmfaaw, evmhesmiaaw, evmheusiaaw, evmheumiaaw,
1221 evmhossfanw, evmhossianw, evmhosmfanw, evmhosmianw, evmhousianw,
1222 evmhoumianw, evmhessfanw, evmhessianw, evmhesmfanw, evmhesmianw,
1223 evmheusianw, evmheumianw, evmhogsmfaa, evmhogsmiaa, evmhogumiaa,
1224 evmhegsmfaa, evmhegsmiaa, evmhegumiaa, evmhogsmfan, evmhogsmian,
1225 evmhogumian, evmhegsmfan, evmhegsmian, evmhegumian, evmwhssf,
1226 evmwhssfa, evmwhssfaa, evmwhssmaa, evmwhsmfaa, evmwhsmiaa,
1227 evmwhusiaa, evmwhumiaa, evmwhssfan, evmwhssian, evmwhsmfan,
1228 evmwhsmian, evmwhusian, evmwhumian, evmwhgssfaa, evmwhgsmfaa,
1229 evmwhgsmiaa, evmwhgumiaa, evmwhgssfan, evmwhgsmfan, evmwhgsmian,
1230 evmwhgumian, evmwhsmf, evmwhsmfa, evmshsmi, evmshsmia, evmshumi,
1231 evmshumia, evmmlssf, evmmlssfa, evmwlsmf, evmwlsmfa, evmwlumi,
1232 evmwlumia, evmwlssfaaw, evmwlssiaaw, evmwlsmfaaw, evmwlsmiaaw,
1233 evmwlusiaaw, evmwlumiaaw, evmwissfanw, evmwissianw, evmwlsmfanw,
1234 evmwlsmianw, evmwlusianw, evmwlumianw, evmwssf, evmwssfa,
1235 evmwsmf, evmwsmfa, evmwsmi, evmwsmia, evmwumi, evmwumia,
1236 evmwssfaa, evmwsmfaa, evmwsmiaa, evmwumiaa, evmwssfan, evmwsmfan,
1237 evmwsmian, evmwumian, evaddssiaaw, evaddsmiaaw, evaddusiaaw,
1238 evaddumiaaw, evsubfssiaaw, evsubfsmiaaw, evsubfusiaaw,
1239 evsubfumiaaw, evmra, evdivws, evdivws): New e500x2 Core Complex
1241 (rfmci): New machine check APU instruction.
1242 (isel): New integer select APU instructino.
1243 (icbtls, icbtlse, icblc, icblce, dcbtls, dcbtlse, dcbtstls,
1244 dcbtstlse, dcblc, dcblce): New cache control APU instructions.
1245 (mtspefscr, mfspefscr): New instructions.
1246 (mfpmr, mtpmr): New performance monitor APU instructions.
1247 (savecontext): New context cache APU instructions.
1248 (bblels, bbelr): New branch locking APU instructions.
1249 (bblels, bbelr): New instructions.
1250 (mftbl, mftbu, mftb): Set as CLASSIC instructions. Add BOOKE alias.
1254 * m68hc11-opc.c: Update call operand to accept the page definition.
1255 Identify instructions that are branches and calls to generate a
1260 * m68hc11-dis.c (print_insn): Take into account 68HC12 memory
1261 banks and fix disassembling of call instruction.
1262 (print_indexed_operand): New param to tell whether
1263 it was an indirect addressing operand (for disassembling call).
1267 * po/sv.po: Updated Swedish translation.
1271 * mips-opc.c (mips_builtin_opcodes): Remove "dla" and "la" as
1272 aliases to "daddiu" and "addiu".
1276 * po/sv.po: Updated Swedish translation.
1280 * po/sv.po: Updated Swedish translation.
1281 * po/es.po: Updated Spanish translation.
1282 * po/pr_BR.po: Updated Brazilian Portuguese translation.
1283 * po/tr.po: Updated Turkish translation.
1284 * po/fr.po: Updated French translation.
1288 * po/sv.po: Updated Swedish translation.
1289 * po/es.po: Updated Spanish translation.
1290 * po/pr_BR.po: Updated Brazilian Portuguese translation.
1294 * Makefile.am: Run "make dep-am".
1295 * Makefile.in: Regenerate.
1296 * po/POTFILES.in: Regenerate.
1300 * po/fr.po: Updated French translation.
1301 * po/pr_BR.po: New Brazilian Portuguese translation.
1302 * po/id.po: Updated Indonesian translation.
1303 * configure.in (LINGUAS): Add pr_BR.
1304 * configure: Regenerate.
1311 * configure.in: Add support for ip2k.
1312 * configure: Regenerate.
1313 * Makefile.am: Add support for ip2k.
1314 * Makefile.in: Regenerate.
1315 * disassemble.c: Add support for ip2k.
1316 * ip2k-asm.c: New generated file.
1317 * ip2k-desc.c: New generated file.
1318 * ip2k-desc.h: New generated file.
1319 * ip2k-dis.c: New generated file.
1320 * ip2k-ibld.c: New generated file.
1321 * ip2k-opc.c: New generated file.
1322 * ip2k-opc.h: New generated file.
1326 * ia64-opc-b.c (bWhc): New macro.
1329 (ia64_opcodes_b): Correct patterns for indirect call
1330 instructions to use 3-bit "wh" field.
1331 * ia64-asmtab.c: Regnerate.
1335 * mips-dis.c (mips_isa_type): Add MIPS16 insn handling.
1336 * mips-opc.c (I16): New define.
1337 (mips_builtin_opcodes): Make jalx an I16 insn.
1341 * po/POTFILES.in: Add frv-*.[ch].
1342 * disassemble.c (ARCH_frv): New macro.
1343 (disassembler): Handle bfd_arch_frv.
1344 * configure.in: Support frv_bfd_arch.
1345 * Makefile.am (HFILES): Add frv-*.h.
1346 (CFILES): Add frv-*.c
1347 (ALL_MACHINES): Add frv-*.lo.
1348 (CLEANFILES): Add stamp-frv.
1349 (FRV_DEPS): New variable.
1350 (stamp-frv): New target.
1351 (frv-asm.lo): New target.
1352 (frv-desc.lo): New target.
1353 (frv-dis.lo): New target.
1354 (frv-ibld.lo): New target.
1355 (frv-opc.lo): New target.
1356 (frv-*.[ch]): New files.
1360 * Makefile.am (CGENDEPS): Remove unnecessary stamp-cgen.
1361 * Makefile.in: Regenerate.
1365 * a29k-dis.c: Replace CONST with const.
1366 * h8300-dis.c: Likewise.
1367 * m68k-dis.c: Likewise.
1368 * or32-dis.c: Likewise.
1369 * sparc-dis.c: Likewise.
1373 * configure.in: Add "sh5*-*" to list of targets which include
1375 * configure: Regenerate.
1379 * mips-opc.c: Clean up a few whitespace issues, and sort a
1380 few entries understanding that 'x' follows 'w' in the alphabet.
1385 * mips-opc.c: Add support for SB-1 MDMX subset and extensions.
1389 * Makefile.am: Run "make dep-am".
1390 * Makefile.in: Regenerate.
1391 * po/POTFILES.in: Regenerate.
1396 * mips-dis.c (print_insn_arg): Add support for 'O', 'Q', 'X', 'Y',
1397 and 'Z' formats, for MDMX.
1398 (mips_isa_type): Add MDMX instructions to the ISA
1399 bit mask for bfd_mach_mipsisa64.
1400 * mips-opc.c: Add support for MDMX instructions.
1401 (MX): New definition.
1403 * mips-dis.c: Update copyright years to include 2002.
1407 * d10v-opc.c (d10v_opcodes): `btsti' does not modify its
1412 * configure.in: Add DLX configuraton support.
1413 * configure: Regenerate.
1414 * Makefile.am: Add DLX configuraton support.
1415 * Makefile.in: Regenerate.
1416 * disassemble.c: Add DLX support.
1417 * dlx-dis.c: New file.
1421 * Makefile.am (sh-dis.lo): Don't put make commands in deps.
1422 * Makefile.in: Regenerate.
1423 * arc-dis.c: Use #include "" instead of <> for local header files.
1424 * m68k-dis.c: Likewise.
1428 * Makefile.am (sh-dis.lo): Compile with @archdefs@.
1429 * Makefile.in: regenerate.
1431 * sh-dis.c (print_insn_sh): If coff and bfd_mach_sh, use arch_sh4
1436 * mips-opc.c (mips_builtin_opcodes): Add drol, dror macros.
1440 * disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh.
1441 * sh-dis.c (LITTLE_BIT): Delete.
1442 (print_insn_sh, print_insn_shl): Deleted.
1443 (print_insn_shx): Renamed to
1444 (print_insn_sh). No longer static. Handle SHmedia instructions.
1445 Use info->endian to determine endianness.
1446 * sh64-dis.c (print_insn_sh64, print_insn_sh64l): Delete.
1447 (print_insn_sh64x): No longer static. Renamed to
1448 (print_insn_sh64). Removed pfun_compact and endian arguments.
1449 If we got an uneven address to indicate SHmedia, adjust it.
1450 Return -2 for SHcompact instructions.
1454 * acinclude.m4 (AM_INSTALL_LIBBFD): Fake to fool autotools.
1455 * configure.in: Invoke AM_INSTALL_LIBBFD.
1456 * Makefile.am (install-data-local): Move to..
1457 (install_libopcodes): .. New target.
1458 (uninstall_libopcodes): Likewise.
1459 (install-bfdlibLTLIBRARIES): Likewise.
1460 (uninstall-bfdlibLTLIBRARIES): Likewise.
1462 (bfdincludedir): New.
1463 (lib_LTLIBRARIES): Rename to bfdlib_LTLIBRARIES.
1464 * aclocal.m4: Regenerate.
1465 * configure: Regenerate.
1466 * Makefile.in: Regenerate.
1470 * fr30-asm.c: Regenerate.
1471 * fr30-desc.c: Regenerate.
1472 * fr30-dis.c: Regenerate.
1473 * m32r-asm.c: Regenerate.
1474 * m32r-desc.c: Regenerate.
1475 * m32r-dis.c: Regenerate.
1476 * openrisc-asm.c: Regenerate.
1477 * openrisc-desc.c: Regenerate.
1478 * openrisc-dis.c: Regenerate.
1479 * xstormy16-asm.c: Regenerate.
1480 * xstormy16-desc.c: Regenerate.
1481 * xstormy16-dis.c: Regenerate.
1485 * mips-dis.c (is_newabi): EABI is not a NewABI.
1489 * configure.in (shle-*-*elf*): Include sh64 support.
1490 * configure: Regenerate.
1494 * vax-dis.c (print_insn_arg): Pass the insn info to print_insn_mode.
1495 (print_insn_mode): Print some basic info about floating point values.
1499 * ppc-opc.c: Add "tlbiel" for POWER4.
1503 * cgen-dis.in: (print_insn_@arch@): Cache list of opened CPUs rather
1504 than just most-recently-opened.
1508 * ppc-opc.c: Add "tlbsx." and "tlbsxe." for booke.
1512 * z8k-dis.c (print_insn_z8k): Set disassemble_info to 2
1513 bytes_per_chunk, 6 bytes_per_line for nicer display of the hex
1515 (z8k_lookup_instr): CLASS_IGNORE case added.
1516 (output_instr): Don't print hex codes, they are already
1518 (unpack_instr): ARG_NIM4 case added. ARG_NIM8 case
1519 fixed. Support CLASS_BIT_1OR2 and CLASS_IGNORE cases.
1520 (unparse_instr): Fix base and indexed addressing disassembly:
1521 The index is inside the brackets.
1522 * z8kgen.c (gas): Add ARG_NIM4 and CLASS_IGNORE defines.
1523 (opt): Fix shift left/right arithmetic/logical byte defines:
1524 The high byte of the immediate word is ignored by the
1526 Fix n parameter of ldm opcodes: The opcode contains (n-1).
1527 (args): Fix "n" entry.
1528 (toks): Add "nim4" and "iiii" entries.
1529 * z8k-opc.h: Regenerated with new z8kgen.c.
1533 * po/id.po: New Indonesian translation.
1534 * configure.in (ALL_LIGUAS): Add id.po
1535 * configure: Regenerate.
1539 * ppc-opc.c (powerpc_opcode): Fix dssall operand list.
1543 * dep-in.sed: Cope with absolute paths.
1544 * Makefile.am (dep.sed): Subst TOPDIR.
1546 * Makefile.in: Regenerate.
1547 * ppc-opc.c: Whitespace.
1548 * s390-dis.c: Fix copyright date.
1552 * ppc-opc.c (vmaddfp): Fix operand order.
1556 * Makefile.am: Run "make dep-am".
1557 * Makefile.in: Regenerate.
1561 * ppc-opc.c: Add optional field to mtmsrd.
1562 (MTMSRD_L, XRLARB_MASK): Define.
1566 * i386-dis.c (prefix_name): Fix handling of 32bit address prefix
1568 (print_insn) Likewise.
1569 (putop): Fix handling of 'E'
1570 (OP_E, OP_OFF): handle 32bit addressing mode in 64bit.
1571 (ptr_reg): Likewise.
1575 * po/fr.po: Updated version.
1579 * mips-opc.c (M3D): Tweak comment.
1580 (mips_builtin_op): Add comment indicating that opcodes of the
1581 same name must be placed together in the table, and sort
1582 the "recip.fmt", "recip1.fmt", "recip2.fmt", "rsqrt.fmt",
1583 "rsqrt1.fmt", and "rsqrt2.fmt" opcodes by name.
1587 * Makefile.am: Tidy up sh64 rules.
1588 * Makefile.in: Regenerate.
1592 * mips-dis.c: Update copyright years.
1596 * mips-dis.c (mips_isa_type): Add MIPS3D instructions to the ISA
1597 bit masks for bfd_mach_mips_sb1 and bfd_mach_mipsisa64. Add
1598 comments for bfd_mach_mipsisa32 and bfd_mach_mipsisa64 that
1599 indicate that they should dissassemble all applicable
1600 MIPS-specified ASEs.
1601 * mips-opc.c: Add support for MIPS-3D instructions.
1602 (M3D): New definition.
1604 * mips-opc.c: Update copyright years.
1608 * mips-opc.c (mips_builtin_opcodes): Sort bc<N> opcodes by name.
1612 * mips-dis.c (is_newabi): Fix ABI decoding.
1616 * mips-dis.c (mips_isa_type): Fix formatting of bfd_mach_mipsisa32
1617 and bfd_mach_mipsisa64 cases to match the rest.
1621 * po/fr.po: Updated version.
1625 * ppc-opc.c: Add optional `L' field to tlbie.
1626 (XRTLRA_MASK): Define.
1630 * mips-opc.c (mips_builtin_opcodes): Mark "pref" as being
1633 * mips-opc.c (mips_builtin_opcodes): Add "movn.ps" and "movz.ps".
1637 * pdp11-opc.c: Fix "mark" operand type. Fix operand types
1638 for float opcodes that take float operands. Add alternate
1639 names (xxxD vs. xxxF) for float opcodes.
1640 * pdp11-dis.c (print_operand): Clean up formatting for mode 67.
1641 (print_foperand): New function to handle float opcode operands.
1642 (print_insn_pdp11): Use print_foperand to disassemble float ops.
1646 * po/de.po: Updated.
1650 * Makefile.am (install-data-local): Install dis-asm.h.
1654 * configure.in (LINGUAS): Add de.po.
1655 * configure: Regenerate.
1656 * po/de.po: New file.
1660 * ppc-dis.c (powerpc_dialect): Handle power4 option.
1661 * ppc-opc.c (insert_bdm): Correct description of "at" branch
1662 hints. Test PPC_OPCODE_POWER4 to determine branch hint flavour.
1663 (extract_bdm, insert_bdp, extract_bdp, valid_bo): Likewise.
1664 (BOFM64, BOFP64, BOTM64, BOFP64): Rename to BOFM4, BOFP4 etc.
1665 (BODNZM64, BODNZP64, BODZM64, BODZP64): Likewise.
1666 (PPCCOM32, PPCCOM64): Delete.
1667 (NOPOWER4, POWER4): Define.
1668 (powerpc_opcodes): Replace occurences of PPCCOM32 with NOPOWER4,
1669 and PPCCOM4 with POWER4 so that "at" style branch hint opcodes
1670 are enabled for power4 rather than ppc64.
1674 * ppc-opc.c (powerpc_operands): Add WS field. Use for tlbre, tlbwe.
1678 * s390-dis.c (init_disasm): Use renamed architecture defines.
1682 * ppc-opc.c (powerpc_dialect): Fix comment; BookE is not Motorola
1687 * po/tr.po: Updated translation.
1691 * alpha-opc.c (alpha_opcodes): Fix thinko in ret pseudo
1696 * alpha-opc.c (alpha_opcodes): Add simple pseudos for
1697 lda, ldah, jmp, ret.
1701 * po/da.po: Updated translation.
1705 * cgen-asm.in (parse_insn_normal): Change call from
1706 @arch@_cgen_parse_operand to cd->parse_operand, to
1707 facilitate CGEN_ASM_INIT_HOOK doing useful work.
1711 * sparc-dis.c (print_insn_sparc): Make sure 0xFFFFFFFF is not
1716 * Makefile.am: "make dep-am".
1717 * Makefile.in: Regenerate.
1718 * aclocal.m4: Regenerate.
1719 * config.in: Regenerate.
1720 * configure: Regenerate.
1724 * configure.in <bfd_sh_arc>: For sh-* and shl-*, enable sh64
1725 support only for sh-*-*elf*, shl-*-*elf*, sh-*-linux* and
1727 * configure: Regenerate.
1731 * cgen-dis.c: Add prototypes for count_decodable_bits
1732 and add_insn_to_hash_chain.
1736 * configure.in <bfd_sh_arc>: Enable sh64 support on sh-*.
1737 * configure: Rebuilt.
1741 * or32-opc.c: Fix compile time warning messages.
1742 * or32-dis.c: Fix compile time warning messages.
1746 Contribute sh64-elf.
1748 * sh64-opc.c: Regenerate.
1750 * sh64-opc.h: Rename A_RESV_Fx to A_REUSE_PREV so that its
1751 purpose is more obvious.
1752 * sh64-opc.c (shmedia_table): Ditto.
1753 * sh64-dis.c (initialize_shmedia_opcode_mask_table): Ditto.
1754 (print_insn_shmedia): Ditto.
1756 * sh64-opc.c: Adjust comments to reflect reality: replace bits
1757 3:0 with zeros (not "reserved"), replace "rrrrrr" with
1758 "gggggg" for two-operand floating point opcodes. Remove
1761 * sh64-dis.c (print_insn_shmedia) <failing read_memory_func>:
1762 Correct printing of .byte:s. Return number of printed bytes or
1764 (print_insn_sh64x) <not CRT_SH5_ISA16>: Ditto. Print as .byte:s
1765 to next four-byte-alignment if insn or data is not aligned.
1767 * sh64-dis.c: Update comments and fix comment formatting.
1768 (initialize_shmedia_opcode_mask_table) <case A_IMMM>:
1769 Abort instead of setting length to 0.
1770 (crange_qsort_cmpb, crange_qsort_cmpl, crange_bsearch_cmpb,
1771 crange_bsearch_cmpl, sh64_get_contents_type,
1772 sh64_address_in_cranges): Move to bfd/elf32-sh64.c.
1774 * sh64-opc.c: Remove #if 0:d entries for instructions not found in
1775 SH-5/ST50-023-04: fcosa.s, fsrra.s and prefo.
1777 * sh64-dis.c (print_insn_shmedia): Display MOVI/SHORI-formed
1778 address with same prefix as SHcompact.
1779 In the disassembler, use a .cranges section for linked executables.
1780 * sh64-dis.c (SAVED_MOVI_R, SAVED_MOVI_IMM): Move to head of file
1781 and update for using structure in info->private_data.
1782 (struct sh64_disassemble_info): New.
1783 (is_shmedia_p): Delete.
1784 (crange_qsort_cmpb): New function.
1785 (crange_qsort_cmpl, crange_bsearch_cmpb): New functions.
1786 (crange_bsearch_cmpl, sh64_address_in_cranges): New functions.
1787 (init_sh64_disasm_info, sh64_get_contents_type_disasm): New functions.
1788 (sh64_get_contents_type, sh64_address_is_shmedia): New functions.
1789 (print_insn_shmedia): Correct displaying of address after MOVI/SHORI
1790 pair. Display addresses for linked executables only.
1791 (print_insn_sh64x_media): Initialize info->private_data by calling
1792 init_sh64_disasm_info.
1793 (print_insn_sh64x): Ditto. Find out type of contents by calling
1794 sh64_contents_type_disasm. Display data regions using ".long" and
1795 ".byte" similar to unrecognized opcodes.
1797 * sh64-dis.c (is_shmedia_p): Check info->section and look for ISA
1798 information in section flags before considering symbols. Don't
1799 assume an info->mach setting of bfd_mach_sh5 means SHmedia code.
1800 * configure.in (bfd_sh_arch): Check presence of sh64 insns by
1801 matching $target $canon_targets instead of looking at the
1802 now-removed -DINCLUDE_SHMEDIA in $targ_cflags.
1803 * configure: Regenerate.
1805 * sh64-opc.c (shmedia_creg_table): New.
1806 * sh64-opc.h (shmedia_creg_info): New type.
1807 (shmedia_creg_table): Declare.
1808 * sh64-dis.c (creg_name): New function.
1809 (print_insn_shmedia): Use it.
1810 * disassemble.c (disassembler) [ARCH_sh, INCLUDE_SHMEDIA]: Map
1811 bfd_mach_sh5 to print_insn_sh64 if big-endian and to
1812 print_insn_sh64l if little-endian.
1813 * sh64-dis.c (print_insn_shmedia): Make r unsigned.
1814 (print_insn_sh64l): New.
1815 (print_insn_sh64x): New.
1816 (print_insn_sh64x_media): New.
1817 (print_insn_sh64): Break out code to print_insn_sh64x and
1818 print_insn_sh64x_media.
1820 * sh64-opc.h: New file
1821 * sh64-opc.c: New file
1822 * sh64-dis.c: New file
1823 * Makefile.am: Add sh64 targets.
1824 (HFILES): Add sh64-opc.h.
1825 (CFILES): Add sh64-opc.c and sh64-dis.c.
1826 (ALL_MACHINES): Add sh64 files.
1827 * Makefile.in: Regenerate.
1828 * configure.in: Add support for sh64 to bfd_sh_arch.
1829 * configure: Regenerate.
1830 * disassemble.c [ARCH_all] (INCLUDE_SHMEDIA): Define.
1831 (disassembler) [ARCH_sh, INCLUDE_SHMEDIA]: Map bfd_mach_sh5 to
1833 * sh-dis.c (print_insn_shx): Handle bfd_mach_sh5 as arch_sh4.
1834 * po/POTFILES.in: Regenerate.
1835 * po/opcodes.pot: Regenerate.
1839 * cgen-dis.in (print_insn_@arch@): Support disassemble_info.insn_sets.
1843 * sh-opc.h (sh_arg_type): Added A_DISP_PC_ABS.
1847 * Makefile.am: Run "make dep-am"
1848 * Makefile.in: Regenerate.
1852 * or32-dis.c: New file.
1853 * or32-opc.c: New file.
1854 * configure.in: Add support for or32.
1855 * configure: Regenerate.
1856 * Makefile.am: Add support for or32.
1857 * Makefile.in: Regenerate.
1858 * disassemble.c: Add support for or32.
1859 * po/POTFILES.in: Regenerate.
1860 * po/opcodes.pot: Regenerate.
1864 * configure: Regenerated.
1868 * po/fr.po: Updated version.
1872 * po/es.po: Updated version.
1876 * po/da.po: New version.
1880 * po/da.po: New file: Spanish translation.
1881 * configure.in (ALL_LINGUAS): Add da.
1882 * configure: Regenerate.
1886 * fr30-asm.c: Regenerate.
1887 * fr30-desc.c: Likewise.
1888 * fr30-desc.h: Likewise.
1889 * fr30-dis.c: Likewise.
1890 * fr30-ibld.c: Likewise.
1891 * fr30-opc.c: Likewise.
1892 * fr30-opc.h: Likewise.
1893 * m32r-asm.c: Likewise.
1894 * m32r-desc.c: Likewise.
1895 * m32r-desc.h: Likewise.
1896 * m32r-dis.c: Likewise.
1897 * m32r-ibld.c: Likewise.
1898 * m32r-opc.c: Likewise.
1899 * m32r-opc.h: Likewise.
1900 * m32r-opinst.c: Likewise.
1901 * openrisc-asm.c: Likewise.
1902 * openrisc-desc.c: Likewise.
1903 * openrisc-desc.h: Likewise.
1904 * openrisc-dis.c: Likewise.
1905 * openrisc-ibld.c: Likewise.
1906 * openrisc-opc.c: Likewise.
1907 * openrisc-opc.h: Likewise.
1908 * xstormy16-desc.c: Likewise.
1912 * alpha-dis.c (print_insn_alpha): Also mask the base opcode for
1917 * Makefile.am: Run "make dep-am".
1918 * Makefile.in: Regenerate.
1919 * po/POTFILES.in: Regenerate.
1923 * arm-opc.h (arm_opcodes): Use generic rule %5?hb instead of %h.
1924 * arm-dis.c (print_insn_arm): Don't handle 'h' case.
1928 * arm-opc.h (arm_opcodes): Add bxj instruction.
1932 * po/opcodes.pot: Regenerate.
1933 * po/fr.po: Regenerate.
1934 * po/sv.po: Regenerate.
1935 * po/tr.po: Regenerate.
1939 * po/tr.po: Import new version.
1943 * arm-opc.h (arm_opcodes): Add patterns for VFP instructions.
1944 * arm-dis.c (print_insn_arm): Support new disassembly qualifiers for
1949 * xstormy16-asm.c: Regenerate.
1950 * xstormy16-desc.c: Likewise.
1951 * xstormy16-desc.h: Likewise.
1952 * xstormy16-dis.c: Likewise.
1953 * xstormy16-opc.c: Likewise.
1954 * xstormy16-opc.h: Likewise.
1958 * po/es.po: New file: Spanish translation.
1959 * configure.in (ALL_LINGUAS): Add es.
1960 * configure: Regenerate.
1964 * hppa-dis.c (print_insn_hppa): Handle new 'c' mode completers,
1965 'X', 'M', and 'A'. No longer emit a space after 'x' or 's'.
1966 Always emit a space after 'H'.
1970 * ppc-opc.c (PPCVEC): Include PPC_OPCODE_ANY.
1974 * alpha-opc.c (unop): Encode with RB as $sp.
1978 * Makefile.am: Add support for xstormy16.
1979 * Makefile.in: Regenerate.
1980 * configure.in: Add support for xstormy16.
1981 * configure: Regenerate.
1982 * disassemble.c: Add support for xstormy16.
1983 * xstormy16-asm.c: New generated file.
1984 * xstormy16-desc.c: New generated file.
1985 * xstormy16-desc.h: New generated file.
1986 * xstormy16-dis.c: New generated file.
1987 * xstormy16-ibld.c: New generated file.
1988 * xstormy16-opc.c: New generated file.
1989 * xstormy16-opc.h: New generated file.
1993 * alpha-opc.c (alpha_opcodes): Add wh64en.
1997 * d10v-opc.c (d10v_predefined_registers): Remove warnings
1998 introduced in Nov 29's patch.
2000 * d10v-dis.c (print_operand): Apply REGISTER_MASK to `num' of
2003 * d10v-dis.c (print_operand): Disregard OPERAND_SP in register
2006 * d10v-opc.c (RSRC_NOSP): New macro.
2007 (d10v_operands): Add it.
2008 (d10v_opcodes): Use RSRC_NOSP in post-decrement "st" and "st2w".
2012 * d10v-opc.c (d10v_predefined_registers): Mark `sp' as OPERAND_SP.
2013 (RSRC_SP): New macro.
2014 (d10v_operands): Add it.
2015 (d10v_opcodes): Adjust "st" and "st2w" to use RSRC_SP.
2019 * pdp11-dis.c (print_insn_pdp11): Handle illegal instructions.
2020 Also, break out of the loop as soon as an instruction has been
2025 * ppc-opc.c (mfvrsave, mtvrsave): New instructions.
2029 * po/POTFILES.in: Regenerate.
2031 * ppc-opc.c (PPC64): Revert 2001-10-12. Do include PPC_OPCODE_PPC.
2032 (insert_bat, extract_bat, insert_bba, extract_bba,
2033 insert_bd, extract_bd, insert_bdm, extract_bdm,
2034 insert_bdp, extract_bdp, valid_bo,
2035 insert_bo, extract_bo, insert_boe, extract_boe,
2036 insert_ds, extract_ds, insert_de, extract_de,
2037 insert_des, extract_des, insert_li, extract_li,
2038 insert_mbe, extract_mbe, insert_mb6, extract_mb6,
2039 insert_nb, extract_nb, insert_nsi, extract_nsi,
2040 insert_ral, insert_ram, insert_ras,
2041 insert_rbs, extract_rbs, insert_sh6, extract_sh6,
2042 insert_spr, extract_spr, insert_tbr, extract_tbr): Add dialect param.
2043 (extract_bd, extract_bdm, extract_bdp,
2044 extract_ds, extract_des,
2045 extract_li, extract_nsi): Implement sign extension without conditional.
2046 (insert_bdm, extract_bdm,
2047 insert_bdp, extract_bdp, valid_bo): Handle 64 bit branch hints.
2048 (extract_bdm, extract_bdp): Correct 32 bit validation.
2049 (AT1_MASK, AT2_MASK): Define.
2050 (BBOAT_MASK): Define.
2051 (BBOATCB_MASK, BBOAT2CB_MASK, BBOATBI_MASK): Define.
2052 (BOFM64, BOFP64, BOTM64, BOTP64): Define.
2053 (BODNZM64, BODNZP64, BODZM64, BODZP64): Define.
2054 (PPCCOM32, PPCCOM64): Define.
2055 (powerpc_opcodes): Modify existing 32 bit insns with branch hints
2056 and add new patterns to implement 64 bit branches with hints. Move
2057 booke instructions so they match before ppc64.
2059 * ppc-dis.c (powerpc_dialect): Set PPC_OPCODE_64 in dialect for
2060 64 bit default targets, and parse "32" and "64" in options.
2062 (print_insn_powerpc): Pass dialect to operand->extract.
2066 * cgen-dis.c (count_decodable_bits): New function.
2067 (add_insn_to_hash_chain): New function.
2068 (hash_insn_array): Call add_insn_to_hash_chain.
2069 (hash_insn_list): Call add_insn_to_hash_chain.
2070 * m32r-dis.c: Regenerated.
2071 * fr30-dis.c: Regenerated.
2075 * i386-dis.c (print_insn): Use x86-64 as option.
2079 * disassemble.c (disassembler): Call print_insn_i386.
2080 * i386-dis.c (SUFFIX_ALWAYS): Define.
2081 (struct dis_private): Add orig_sizeflag.
2082 (print_insn_i386): Make it a wrapper, calling..
2083 (print_insn): ..The old body of print_insn_i386. Avoid longjmp
2084 warning without using volatile by moving orig_sizeflag to priv,
2085 and removing inbuf. Parse disassembler_options.
2086 (print_insn_i386_att, print_insn_i386_intel): Move initialisation
2088 (putop): Remove #ifdef SUFFIX_ALWAYS.
2092 * tic54x-dis.c: Use revised opcode structure. Export opcode
2094 (has_lkaddr): Don't forget about Lmem insns.
2095 * tic54x-opc.c: Add emulation trap. Parallel table now uses
2096 standard opcode templates.
2100 * i386-dis.c (grps): Change "sldt", "str", and "smsw" entries
2101 to "sldtQ", "strQ", "smswQ" respectively; all with Ev operand
2102 category instead of Ew.
2106 * m68k-opc.c: Fix definitions of wddata[bwl].
2110 * cgen-asm.c (cgen_parse_keyword): If the keyword is too big to
2111 fit in the buffer, try to match the empty keyword.
2115 * cgen-ibld.in (extract_1): Fix badly placed #if 0.
2116 * fr30-ibld.c: Regenerate.
2117 * m32r-ibld.c: Regenerate.
2118 * openrisc-ibld.c: Regenerate.
2122 * mips-dis.c (print_insn_mips): Remove spaces at end of line.
2126 * configure.in (ALL_LINGUAS): Add "fr", "sv" and "tr".
2127 * configure: Regernate.
2128 * po/fr.po: New file.
2129 * po/sv.po: New file.
2130 * po/tr.po: New file.
2134 * m68hc11-dis.c (print_insn): Fix disassembly of movb with a
2139 * Makefile.am (CFILES): Add mmix-dis.c and mmix-opc.c. Regenerate
2141 * Makefile.in: Regenerate.
2142 * mmix-dis.c, mmix-opc.c: New files.
2146 * d30v-dis.c: Fix a comment typo.
2150 * mips-opc.c (mips_builtin_opcodes): Mark "bgezall" and
2151 "bltzall" as writing GPR 31 (since they do).
2153 * mips-dis.c (print_insn_arg): Calculate info->target
2155 (print_insn_mips): Fill in instruction info.
2156 (print_mips16_insn_arg): Remove unneded variable 'val'.
2157 Removed duplicated instruction target calculations,
2158 calculate once and print that result. Use same idiom for
2159 masking the jump segment bits as is used in print_insn_arg.
2163 * ppc-opc.c (CT): Make it an optional operand.
2167 * mips-dis.c (mips_isa_type): Make the ISA used to disassemble
2168 SB-1 binaries include instructions specific to the SB-1.
2169 * mips-opc.c (SB1): New definition.
2170 (mips_builtin_opcodes): Add SB-1 extension opcodes "div.ps",
2171 "recip.ps", "rsqrt.ps", and "sqrt.ps".
2175 * ppc-opc.c (STRM): New AltiVec operand.
2176 (XDSS): New AltiVec instruction form.
2177 (mtvscr): Correct operand list.
2178 (dst, dstt, dstst, dststt, dss, dssall): AltiVec instructions.
2182 * po/POTFILES.in: Regenerate.
2186 * ppc-opc.c (MO): New macro for MO field of mbar instruction.
2187 (powerpc_opcodes): Add rfci, wrtee, wrteei, mfdcrx, mfdcr,
2188 mtdcrx, mtdcr, msync, dcba and mbar as BookE instructions.
2192 * cgen-ibld.in: Include safe-ctype.h in preference to
2194 * cgen-asm.in: Include safe-ctype.h in preference to
2195 ctype.h. Fix formatting. Use ISSPACE instead of isspace and
2196 TOLOWER instead of tolower.
2197 (@arch@_cgen_build_insn_regex): Remove duplication of syntax
2198 string elements in constructed regular expression.
2199 * fr30-asm.c: Regenerate.
2200 * fr30-desc.c: Regenerate.
2201 * fr30-ibld.c: Regenerate.
2202 * m32r-asm.c: Regenerate.
2203 * m32r-desc.c: Regenerate.
2204 * m32r-ibld.c: Regenerate.
2205 * openrisc-asm.c: Regenerate.
2206 * openrisc-desc.c: Regenerate.
2207 * openrisc-ibld.c: Regenerate.
2208 * po/opcodes.pot: Regenerate.
2212 * ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New
2213 instruction field instruction/extraction functions for new BookE
2214 DE form instructions.
2215 (CT): New macro for CT field in an X form instruction.
2216 (DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form
2218 (PPC64): Don't include PPC_OPCODE_PPC.
2219 (403): New opcode macro for PPC403 processors.
2220 (BOOKE): New opcode macro for BookE processors.
2221 (bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions.
2222 (bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise.
2223 (dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise.
2224 (stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise.
2225 (mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise.
2226 (subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise.
2227 (subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise.
2228 (addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise.
2229 (lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise.
2230 (stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise.
2231 (tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise.
2232 (lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise.
2233 (stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise.
2234 (lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise.
2236 * ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look
2237 for a disassembler option of `booke', `booke32' or `booke64' to enable
2238 BookE support in the disassembler.
2242 * cgen-dis.in (print_insn): Use min (cd->base_insn_bitsize, buflen*8)
2243 for the length when extracting the base part of the insn.
2247 * cgen-asm.in (*_cgen_build_insn_regex): Generate a case sensitive
2248 regular expression. Fix some formatting problems.
2249 * fr30-asm.c: Regenerate.
2250 * openrisc-asm.c: Regenerate.
2251 * m32r-asm.c: Regenerate.
2255 * z8k-dis.c (unparse_instr): Fixed formatting. Change disassembly
2256 of indirect register memory accesses to be same format the
2261 * sh-opc.h: Fix encoding of least significant nibble of the
2262 DSP single data transfer instructions.
2264 * sh-dis.c (print_insn_shx): Fix decoding of As opcode in DSP
2269 * cgen-asm.in: Fix compile time warning messages in generated
2271 * cgen-dis.in: The same.
2272 * cgen-ibld.in: The same.
2273 * fr30-asm.c: Regenerate.
2274 * fr30-desc.c: Regenerate.
2275 * fr30-dis.c: Regenerate.
2276 * fr30-ibld.c: Regenerate.
2277 * fr30-opc.c: Regenerate.
2278 * m32r-asm.c: Regenerate.
2279 * m32r-desc.c: Regenerate.
2280 * m32r-dis.c: Regenerate.
2281 * m32r-ibld.c: Regenerate.
2282 * m32r-opc.c: Regenerate.
2283 * m32r-opinst.c Regenerate.
2284 * openrisc-asm.c: Regenerate.
2285 * openrisc-desc.c: Regenerate.
2286 * openrisc-dis.c: Regenerate.
2287 * openrisc-ibld.c: Regenerate.
2288 * openrisc-opc.c: Regenerate.
2289 * openrisc-opc.h: Regenerate.
2290 * Makefile.in: Regenerate.
2291 * po/POTFILES.in: Regenerate.
2292 * po/opcodes.pot: Regenerate.
2296 * arm-opc.h (arm_opcodes): Add cirrus insns.
2298 * arm-dis.c (print_insn_arm): Add 'I' case.
2302 * po/POTFILES.in: Regenerate.
2303 * configure: Regenerate.
2307 * Makefile.am (Makefile): Depend on bfd/configure.in.
2309 * Makefile.in: Regenerate.
2313 * cgen-ibld.in (insert_1): Switched bfd_get_bits and bfd_set_bits
2314 calls to cgen_get_insn_value and cgen_put_insn_value calls.
2315 (extract_1): Switched bfd_get_bits call to cgen_get_insn_value call.
2319 * Makefile.am: Update dependencies with "make dep-am".
2320 * Makefile.in: Regenerate.
2324 * arc-dis.c: Formatting fixes.
2325 (my_sprintf): Define using VPARAMS, VA_OPEN, VA_FIXEDARG, VA_CLOSE.
2329 * arc-dis.c: Don't include <ctype.h>.
2330 * openrisc-desc.c: Likewise.
2331 * openrisc-ibld.c: Likewise.
2335 * fr30-opc.c: Fix compile time warning messages.
2336 * i370-opc.c: Fix compile time warning messages.
2337 * i960-dis.c: Fix compile time warning messages.
2338 * m32r-asm.c: Fix compile time warning messages.
2339 * m32r-desc.c: Fix compile time warning messages.
2340 * m32r-dis.c: Fix compile time warning messages.
2341 * m32r-ibld.c: Fix compile time warning messages.
2342 * m32r-opc.c: Fix compile time warning messages.
2343 * m32r-opinst.c: Fix compile time warning messages.
2344 * ns32k-dis.c: Fix compile time warning messages.
2345 * openrisc-asm.c: Fix compile time warning messages.
2346 * openrisc-desc.c: Fix compile time warning messages.
2347 * openrisc-dis.c: Fix compile time warning messages.
2348 * openrisc-ibld.c: Fix compile time warning messages.
2349 * openrisc-opc.c: Fix compile time warning messages.
2350 * pdp11-dis.c: Fix compile time warning messages.
2351 * tic54x-dis.c: Fix compile time warning messages.
2352 * v850-opc.c: Fix compile time warning messages.
2353 * vax-dis.c: Fix compile time warning messages.
2354 * w65-opc.h: Fix compile time warning messages.
2355 * z8k-opc.h: Fix compile time warning messages.
2356 * z8kgen.c: Fix compile time warning messages.
2360 * arm-dis.c: Fix compile time warning messages.
2361 * cgen-asm.c: Fix compile time warning messages.
2362 * cgen-dis.c: Fix compile time warning messages.
2363 * cris-dis.c: Fix compile time warning messages.
2364 * d10v-dis.c: Fix compile time warning messages.
2365 * fr30-asm.c: Fix compile time warning messages.
2366 * fr30-desc.c: Fix compile time warning messages.
2367 * fr30-dis.c: Fix compile time warning messages.
2368 * fr30-ibld.c: Fix compile time warning messages.
2372 * cgen-asm.c: Include "safe-ctype.h" instead of <ctype.h>.
2373 (cgen_parse_keyword): Use ISALNUM instead of isalnum.
2374 * cgen-opc.c: Include "safe-ctype.h" instead of <ctype.h>.
2375 (cgen_keyword_lookup_name): Use ISALPHA/TOLOWER instead of
2377 (cgen_keyword_add): Use ISALNUM instead of isalnum.
2378 (hash_keyword_name): Use TOLOWER instead of tolower.
2379 * fr30-asm.c: Include "safe-ctype.h" instead of <ctype.h>.
2380 (parse_insn_normal): Use TOLOWER/ISSPACE instead of
2382 (fr30_cgen_assemble_insn): Use ISSPACE instead of isspace.
2383 * fr30-desc.c: Don't include <ctype.h>.
2384 * fr30-ibld.c: Likewise.
2385 * ia64-gen.c: Include "safe-ctype.h" instead of <ctype.h>.
2386 (load_insn_classes, parse_resource_users, load_depfile): Use
2387 ISSPACE instead of isspace.
2388 * m32r-asm.c: Include "safe-ctype.h" instead of <ctype.h>.
2389 (parse_insn_normal): Use TOLOWER/ISSPACE instead of
2391 (m32r_cgen_assemble_insn): Use ISSPACE instead of isspace.
2392 * m32r-desc.c: Don't include <ctype.h>.
2393 * m32r-ibld.c: Likewise.
2394 * openrisc-asm.c: Include "safe-ctype.h" instead of <ctype.h>.
2395 (parse_insn_normal): Use TOLOWER/ISSPACE instead of
2397 (openrisc_cgen_assemble_insn): Use ISSPACE instead of isspace.
2401 * Makefile.am: Add rules and dependencies to create the s/390 opcode
2402 table out of s390-opc.txt automatically.
2403 * configure.in: Add BFD_CC_FOR_BUILD to allow CC_FOR_BUILD to be used.
2404 * s390-mkopc.c (dumpTable): Change output to create a complete file.
2405 * s390-opc.c: New improved opcode format macros and remove the
2406 pregenerated opcode table.
2407 * s390-opc.txt: Adapt to new improved opcode format macros.
2411 * ppc-opc.c (VXA, VXA_MASK): Fix mask bits.
2415 * i386-dis.c (grps): Don't print the implicit al/ax/eax register
2416 for opcode 0xf6 or 0xf7 forms of mul, imul, div, idiv insns.
2421 * mips-dis.c: Add support for bfd_mach_mipsisa32 and
2422 bfd_mach_mipsisa64. Remove bfd_mach_mips32, bfd_mach_mips32_4k,
2427 * tic54x-opc.c: Add default initializers to avoid warnings.
2429 * arc-opc.c: Include "sysdep.h" to get stdio.h as include file.
2430 * arc-ext.c: Likewise.
2434 * ppc-opc.c (icbt): Order correctly.
2439 * ppc-opc.c (DS): Add PPC_OPERAND_DS flag.
2441 (insert_ds): Complain if not a multiple of 4.
2443 (XSYNC_MASK): Define.
2444 (powerpc_opcodes): Add "slbmte", "lwsync", "ptesync", "slbmfev",
2445 "slbmfee". Modify "sync" to use XSYNC_MASK and LS.
2449 * h8500-opc.h: Add default initializers to h8500_table to shut up
2454 * tic54x-dis.c: Add unused attributes where needed.
2456 * z8k-dis.c (output_instr): Add unused attribute.
2458 * h8300-dis.c: Add missing prototypes.
2459 (bfd_h8_disassemble): Make static.
2461 * cris-dis.c: Add missing prototype.
2462 * h8500-dis.c: Likewise.
2463 * m68hc11-dis.c: Likewise.
2464 * pj-dis.c: Likewise.
2465 * tic54x-dis.c: Likewise.
2466 * v850-dis.c: Likewise.
2467 * vax-dis.c: Likewise.
2468 * w65-dis.c: Likewise.
2469 * z8k-dis.c: Likewise.
2471 * d10v-dis.c: Add missing prototype.
2472 (dis_long): Remove unused variable.
2473 (dis_2_short): Likewise.
2475 * sh-dis.c: Add missing prototypes.
2476 * v850-opc.c: Likewise.
2477 Add unused attributes where needed.
2479 * ns32k-dis.c: Add missing prototypes.
2480 (bit_extract_simple): Remove unused variable.
2484 * s390-opc.c: Add "low or high" and "not low or high"
2485 branch instructions for gcc 3.0.
2486 * s390-opc.txt: Likewise.
2490 * i960-dis.c: Add parameters for prototypes
2491 (ctrl): Add unused attributes.
2493 (put_abs): Likewise.
2495 * mips-dis.c: Add missing prototypes.
2496 * a29k-dis.c: Likewise.
2497 * arc-dis.c: Likewise.
2498 * ia64-opc.c: Likewise.
2500 * s390-dis.c: Add missing prototypes.
2501 (init_disasm): Remove unused attribute since the parameter is
2506 * mips-opc.c (M1): Define. Reformatted Code.
2507 (mips_builtin_opcodes): Added performance counter opcodes mfpc, mfps,
2512 * mips-opc.c: R3900s can support all branch likely INSN_MACROs where
2513 the corresponding non-likely insn is in MIPS I.
2517 * mcore-dis.c: Fix formatting.
2518 * mips-dis.c: Likewise.
2519 * pj-dis.c: Likewise.
2520 * z8k-dis.c: Likewise.
2524 * cgen-ibld.in (extract_normal): Match type of VALUE and MASK
2525 to *VALUEP. Regenerate all cgen files.
2529 * mips-dis.c (print_insn_mips): Remove OPCODE_IS_MEMBER's gp32
2531 * mips-opc.c (G6): Undefine.
2532 (mips_builtin_opcodes): Remove gp32 entry for "move". Add macro
2533 as the first "move" alternative.
2537 * configure.in: Add -Wstrict-prototypes and -Wmissing-prototypes
2539 * configure: Regenerate.
2543 * ppc-opc.c: Revert 2001-08-08.
2547 * dis-buf.c (generic_strcat_address): Add missing prototype.
2548 #if 0 the functions as it is unused.
2553 * ppc-opc.c: Include "bfd.h".
2554 (powerpc_operands): Add new field for reloc type.
2558 * mips-dis.c (print_insn_arg): Don't use software integer registers
2559 for coprocessor registers.
2560 (get_mips_isa): Removed.
2561 (is_newabi): New function, checks if NewABI is used.
2562 (_print_insn_mips): Get distinction between old ABI and new ABI right.
2566 * z8kgen.c: Fixed indentation of opt[] array. Include stdio.h to
2567 get stderr definition.
2568 (internal, gas): Removed warnings.
2569 (gas): Create a correct final entry for created array.
2570 * z8k-opc.h: Recreated with new z8kgen.
2574 * i386-dis.c: Fix formatting.
2578 * i386-dis.c: Change formatting conventions for architecture
2579 i386:intel to better match the format of various intel i386
2580 assemblers, like nasm, tasm or masm.
2584 * Makefile.am: Update dependencies with "make dep-am".
2585 * Makefile.in: Regenerate
2589 * alpha-dis.c: Fix formatting.
2590 * cris-dis.c: Likewise.
2591 * d10v-dis.c: Likewise.
2592 * d30v-dis.c: Likewise.
2593 * m10300-dis.c: Likewise.
2594 * tic54x-dis.c: Likewise.
2598 * m68k-dis.c: Fix formatting.
2599 * pj-dis.c: Likewise.
2600 * s390-dis.c: Likewise.
2601 * z8k-dis.c: Likewise.
2605 * mips-opc.c (mips_builtin_opcodes): Sort c.le.s and c.lt.s
2606 into the rest of the surrounding definitions.
2610 * i386-dis.c (grps): Print l or w suffix, and require mem modrm
2611 for lgdt, lidt, sgdt, sidt.
2615 * arm-dis.c (print_insn_arm): Use decimal for offsets in LDR/STR.
2619 * cgen-asm.in: Include "xregex.h" always to enable the libiberty
2621 (@arch@_cgen_build_insn_regex): New routine from Graydon.
2622 (@arch@_cgen_assemble_insn): Add Graydon's code to use regex
2623 to verify if it is worth parsing the insn as insn "x". Also update
2624 error message when insn is not a recognized format of the insn vs
2625 when the insn is completely unrecognized.
2629 * cgen-dis.in (print_insn): Use cgen_get_insn_value instead of
2631 * cgen-opc.c (cgen_get_insn_value, cgen_put_insn_value): Respect
2632 non-zero CGEN_CPU_DESC->insn_chunk_bitsize.
2636 * i386-dis.c (set_op): Handle 64 bit and 32 bit mode.
2637 (OP_J): Use bfd_vma for mask to work properly with 64 bits.
2638 (op_address,op_riprel): Use bfd_vma to handle 64 bits.
2642 * Makefile.am (CPUDIR): Define.
2643 (stamp-m32r): Update dependencies.
2644 (stamp-fr30): Ditto.
2645 (stamp-openrisc): Ditto.
2646 * Makefile.in: Regenerate.
2650 * ppc-opc.c: Fix encoding of 'clf' instruction.
2654 * cgen-ibld.in (insert_normal): Support CGEN_IFLD_SIGN_OPT.
2658 * cgen-asm.c (cgen_parse_keyword): Allow any first character.
2659 * cgen-opc.c (cgen_keyword_add): Ignore special first
2660 character when building nonalpha_chars field.
2664 * m88k-dis.c: Format to conform to GNU coding standards.
2668 * disassemble.c (disassembler_usage): Add unused attribute.
2672 * mips-opc.c: Move prefx to start of the table.
2676 * arc-opc.c (insert_st_syntax): Fix over-optimisation of ST
2681 * m68k-opc.c: Add wdebug instruction.
2685 * m10300-opc.c (mn10300_opcodes): Change opcode for AM33 subc.
2689 * cgen-asm.c (cgen_parse_keyword): When looking for the
2690 boundaries of a keyword, allow any special characters
2691 that are actually in one of the allowed keyword.
2692 * cgen-opc.c (cgen_keyword_add): Add any special characters
2693 to the nonalpha_chars field.
2697 * s390-opc.c: Add lgh instruction.
2698 * s390-opc.txt: Likewise.
2702 * i386-dis.c: Group function prototypes in one place.
2703 (FLOATCODE): Redefine as 1.
2704 (USE_GROUPS): Redefine as 2.
2705 (USE_PREFIX_USER_TABLE): Redefine as 3.
2706 (X86_64_SPECIAL): Define as 4.
2707 (GRP1b..GRPAMD): Move USE_GROUPS to bytecode1, index to bytecode2.
2708 (PREGRP0..PREGRP26): Similarly with USE_PREFIX_USER_TABLE.
2709 (dis386_att, dis386_intel, disx86_64_att, disx86_64_intel): Delete.
2710 (dis386): New table combining above four tables.
2711 (dis386_twobyte_att, dis386_twobyte_intel): Delete.
2712 (dis386_twobyte): New table combining above two tables.
2713 (x86_64_table): New table to handle x86_64.
2715 (float_mem_att, float_mem_intel): Delet.
2716 (float_mem): New table combining above two tables.
2717 (print_insn_i386): Modify for above.
2718 (dofloat): Likewise.
2719 (putop): Handle '{', '|' and '}' to select alternative mnemonics.
2720 Return 0 on success, 1 if no valid alternative.
2721 (putop <case 'F'>, <case 'H'>): Print nothing for intel_syntax.
2722 (putop <case 'T'>): Move to case 'U', and share case 'Q' code.
2723 (putop <case 'I'>): Move to case 'T', and share case 'P' code.
2724 (OP_REG <case rAX_reg .. rDI_reg>): Handle as for eAX_reg .. eDI_reg
2726 (OP_I <case q_mode>): Handle as for v_mode if not 64-bit mode.
2727 (OP_I64): If not 64-bit mode, call OP_I.
2728 OP_OFF64): If not 64-bit mode, call OP_OFF.
2729 (OP_ST, OP_STi, OP_SEG, OP_DIR, OP_OFF, OP_OFF64, OP_MMX): Rename
2730 'ignore'/'ignored' to 'bytemode'.
2734 * configure.in: Sort 'ta' case statement.
2735 * configure: Regenerate.
2737 * i386-dis.c (dis386_att): Add 'H' to conditional branch and
2739 (disx86_64_att): Likewise.
2740 (dis386_twobyte_att): Likewise.
2741 (print_insn_i386): Don't print branch hints as a prefix.
2742 (putop): 'H' macro prints branch hints.
2743 (get64): Kill compile warnings.
2747 * sh-opc.h (sh_table): Don't use empty initializers.
2751 * z8k-dis.c: Fix formatting.
2752 (unpack_instr): Remove unused cases in switch statement. Add
2753 safety abort() in default case.
2754 (unparse_instr): Add safety abort() in default case.
2758 * m68k-dis.c (print_insn_m68k): Fix typo.
2759 * m68k-opc.c (m68k_opcodes): Correct allowed operands for
2760 mcf (ColdFire) div, rem and moveb instructions.
2764 * i386-dis.c (cond_jump_flag, loop_jcxz_flag): Define.
2765 (cond_jump_mode, loop_jcxz_mode): Define.
2766 (dis386_att): Add cond_jump_flag and loop_jcxz_flag as
2767 appropriate, and 'F' suffix to loop insns.
2768 (disx86_64_att): Likewise.
2769 (dis386_twobyte_att): Likewise.
2770 (print_insn_i386): Don't output addr prefix for loop, jcxz insns.
2771 Output data size prefix for long conditional jumps. Output cs and
2773 (putop): Handle 'F', and mark PREFIX_ADDR used for case 'E'.
2774 (OP_J): Don't make PREFIX_DATA used.
2778 * sh-opc.h (sh_table): Complete last element entry to avoid
2783 * mips-dis.c (mips_isa_type): Add MIPS r12k support.
2787 * arc-opc.c: Whitespace changes.
2791 * cris-opc.c (cris_spec_regs): Add missing initializer field for
2796 * cgen-dis.in (extract_normal): Complete support for min<base case.
2800 * mips-dis.c (INSNLEN): Rename MAXLEN.
2801 (std_reg_names): Replace by mips32_reg_names and mips64_reg_names.
2802 (print_insn_arg): Remove $ prefix of register names.
2803 (set_mips_isa_type): Remove.
2804 (mips_isa_type): New function.
2805 (get_mips_isa): New Function.
2806 (print_insn_mips): Rename _print_insn_mips.
2807 (_print_insn_mips): New function, contains code which was
2808 duplicated in print_insn_big_mips and print_insn_little_mips.
2809 (print_insn_big_mips): Moved code to _print_insn_mips.
2810 (print_insn_little_mips): Likewise.
2811 (print_mips16_insn_arg): Remove $ prefix of register names.
2812 Print error message before abort.
2816 * ppc-opc.c (powerpc_opcodes): Fixed extended opcode field of
2817 simplified mnemonics used for setting PPC750-specific special
2822 * i386-dis.c (print_insn_i386): Always set `mod', `reg' and
2827 * arc-opc.c (arc_reg_names): Correct attribute for lp_count
2828 register to r/w. Formatting fixes throughout file.
2832 * i386-dis.c (prefix_user_table): Correct movq2dq, movdq2q, and
2834 (twobyte_has_modrm): Update table.
2835 (need_modrm): Give it file scope.
2836 (MODRM_CHECK): Define.
2837 (dofloat): Use MODRM_CHECK.
2844 * cgen-dis.in (default_print_insn): Tolerate min<base instructions
2845 even at end of a section.
2846 * cgen-ibld.in (extract_normal): Tolerate min!=base!=max instructions
2847 by ignoring precariously-unpacked insn_value in favor of raw buffer.
2851 * disassemble.c (disassembler_usage): Remove unused attribute.
2855 * m32r-dis.c, -asm.c, -ibld.c: Regenerated with disassembler fixes.
2859 * cgen-dis.in (print_insn): Remove call to read_insn. Instead,
2860 assume incoming buffer already has the base insn loaded. Handle
2861 smaller-than-base instructions for variable-length case.
2865 * i386-dis.c (Ev, Ed): Remove duplicate define.
2868 (OP_XS): New function.
2869 (dis386_twobyte_att): Correct pinsrw, pextrw, pmovmskb, and
2871 (dis386_twobyte_intel): Likewise.
2872 (prefix_user_table): Use MS for maskmovq operand.
2876 * Makefile.am: Add OpenRISC target.
2877 * Makefile.in: Regenerated.
2879 * disassemble.c (disassembler): Recognize the OpenRISC disassembly.
2881 * configure.in (bfd_openrisc_arch): Add target.
2882 * configure: Regenerated.
2884 * openrisc-asm.c: New file.
2885 * openrisc-desc.c: Likewise.
2886 * openrisc-desc.h: Likewise.
2887 * openrisc-dis.c: Likewise.
2888 * openrisc-ibld.c: Likewise.
2889 * openrisc-opc.c: Likewise.
2890 * openrisc-opc.h: Likewise.
2894 * z8k-dis.c: add names of control registers (ctrl_names);
2895 (seg_length): provides instruction length fixup for segmented
2896 mode; (unpack_instr): correctly handle ARG_DISP16, ARG_DISP12,
2897 CLASS_0DISP7, CLASS_1DISP7, CLASS_DISP8 and CLASS_PR cases;
2898 (unparse_intr): handle CLASS_PR, print addresses without '#'
2899 * z8k-opc.h: re-created with new z8kgen
2900 * z8kgen.c: merged in fixes which were in existing z8k-opc.h; new
2901 entries for ldctl/ldctlb instruction
2905 * i386-dis.c: Add ffreep instruction.
2909 * ppc-opc.c (insert_mbe): Shift mask initializer as long.
2913 * i386-dis.c (PREGRP25): Define.
2914 (dis386_twobyte_att): Use here in place of "movntq" entry.
2915 (dis386_twobyte_intel): Likewise.
2916 (prefix_user_table): Add PREGRP25 entry for "movntq" and "movntdq".
2918 (dis386_twobyte_att): Use here.
2919 (dis386_twobyte_intel): Likewise.
2920 (prefix_user_table): Add PREGRP26 entry for "punpcklqdq".
2921 (prefix_user_table <maskmovdqu>): XM operand, not MX.
2922 (prefix_user_table): Cosmetic changes to "bad" entries.
2926 * mips-opc.c: Remove extraneous whitespace.
2927 * mips-dis.c: Remove extraneous whitespace.
2931 * cgen-asm.in (@arch@_cgen_assemble_insn): Move tmp_errmsg
2932 declaration inside CGEN_VERBOSE_ASSEMBLER_ERRORS conditional.
2933 * cgen-ibld.in (put_insn_int_value): Mark cd parameter as unused
2934 to allay a compiler warning.
2938 * i386-dis.c (dis386_twobyte_att): Add entries for paddq, psubq.
2939 (dis386_twobyte_intel): Likewise.
2940 (twobyte_has_modrm): Set entry for paddq, psubq.
2944 * cgen-dis.in (print_insn_@arch@): Add support for target machine
2945 determination via CGEN_COMPUTE_MACH.
2946 * fr30-desc.c: Regenerate.
2947 * fr30-dis.c: Regenerate.
2948 * fr30-opc.h: Regenerate.
2949 * m32r-desc.c: Regenerate.
2950 * m32r-dis.c: Regenerate.
2951 * m32r-opc.h: Regenerate.
2952 * m32r-opinst.c: Regenerate.
2956 * configure.in: Remove the redundent AC_ARG_PROGRAM.
2957 * configure: Rebuild.
2961 * ia64-gen.c (fetch_insn_class): If xsect, then ignore comment and
2962 notestr if larger than xsect.
2963 (in_class): Handle format M5.
2964 * ia64-asmtab.c: Regnerate.
2968 * vax-dis.c (print_insn_vax): Only fetch two bytes if the info buffer
2969 has more than one byte left to read.
2973 * s390-opc.c: Add new opcodes. Smooth out formatting.
2974 * s390-opc.txt: Add new opcodes.
2978 * arm-dis.c (print_insn_thumb): Compute destination address
2979 of BLX(1) instruction by taking bit 1 from PC and not from bit
2984 * m68k-dis.c (print_insn_m68k): Recognize Coldfire CPUs
2985 so command line switches will work.
2989 * fr30-asm.c: Regenerate.
2990 * fr30-desc.c: Regenerate.
2991 * fr30-desc.h: Regenerate.
2992 * fr30-dis.c: Regenerate.
2993 * fr30-ibld.c: Regenerate.
2994 * fr30-opc.c: Regenerate.
2995 * fr30-opc.h: Regenerate.
2996 * m32r-asm.c: Regenerate.
2997 * m32r-desc.c: Regenerate.
2998 * m32r-desc.h: Regenerate.
2999 * m32r-dis.c: Regenerate.
3000 * m32r-ibld.c: Regenerate.
3001 * m32r-opc.c: Regenerate.
3002 * m32r-opc.h: Regenerate.
3003 * m32r-opinst.c: Regenerate.
3007 * m68k-opc.c: fix cpushl according to Motorola. Enable
3008 bunch of instructions for Coldfire 5407 and add all new.
3012 * configure.in (BFD_VERSION): Do without grep.
3013 * configure: Regenerate.
3014 * Makefile.am: Run "make dep-am".
3015 * Makefile.in: Regenerate.
3019 * ia64-opc-a.c: Add missing pseudo-ops for "cmp" and "cmp4".
3020 * ia64-asmtab.c: Regenerate.
3024 * ia64-opc-d.c (ia64_opcodes_d): Break the "add" pattern into two
3025 separate variants: one for IMM22 and the other for IMM14.
3026 * ia64-asmtab.c: Regenerate.
3030 * cgen-opc.c (cgen_get_insn_value): Add missing `return'.
3034 * Makefile.am (ia64-ic.tbl): Remove the target.
3035 (ia64-raw.tbl): Likewise.
3036 (ia64-waw.tbl): Likewise.
3037 (ia64-war.tbl): Likewise.
3038 (ia64-asmtab.c): Generate it in the source directory.
3039 * Makefile.in: Regenerated.
3043 * Makefile.am: Add PDP-11 target.
3044 * configure.in: Likewise.
3045 * disassemble.c: Likewise.
3046 * pdp11-dis.c: New file.
3047 * pdp11-opc.c: New file.
3051 * ia64-ic.tbl: Update from Intel. Add setf to fr-writers.
3052 * ia64-asmtab.c: Regenerate.
3056 * i386-dis.c (prefix_user_t): Add 'Y' to SSE ineger converison
3062 * mips-dis.c (print_insn_arg): Use top four bits of the address of
3063 the following instruction not of the jump itself for the jump
3065 (print_mips16_insn_arg): Likewise.
3069 * Makefile.am (stamp-lib): ranlib the libopcodes.a in the build
3071 * Makefile.in: Regenerate.
3075 * Makefile.am: Add linux target for S/390.
3076 * Makefile.in: Likewise.
3077 * configure.in: Likewise.
3078 * disassemble.c: Likewise.
3079 * s390-dis.c: New file.
3080 * s390-mkopc.c: New file.
3081 * s390-opc.c: New file.
3082 * s390-opc.txt: New file.
3086 * ia64-asmtab.c: Revert 2000-12-16 change.
3090 * fr30-desc.h: Regenerate with CGEN_MAX_SYNTAX_ELEMENTS.
3091 * m32r-desc.h: Regenerate.
3095 * i386-dis.c (dis386_att, grps): Use 'T' for push/pop
3096 (putop): Handle 'T', alphabetize order, fix 'I' handling in Intel syntax
3100 * hppa-dis.c (print_insn_hppa): Handle '>' and '<' arg types.
3104 * disassemble.c: Remove spurious white space.
3108 * i386-dis.c (dis386_att, disx86_64_att): Fix ret, lret and iret
3113 * configure.in: Add arc-ext.lo for bfd_arc_arch selection.
3114 * Makefile.am (C_FILES): Add arc-ext.c.
3115 (ALL_MACHINES) Add arc-ext.lo.
3116 (INCLUDES) Add opcode directory to list.
3117 New dependency entry for arc-ext.lo.
3118 * disassemble.c (disassembler): Correct call to
3119 arc_get_disassembler.
3120 * arc-opc.c: New update for ARC, including full base
3121 instructions for ARC variants.
3122 * arc-dis.h, arc-dis.c: New update for ARC, including
3123 extensibility functionality.
3124 * arc-ext.h, arc-ext.c: New files for handling extensibility.
3128 * i386-dis.c (PREGRP15 - PREGRP24): New.
3129 (dis386_twobyt): Add SSE2 instructions.
3130 (twobyte_uses_SSE_prefix: Rename from ... ; add new SSE instructions.
3131 (twobyte_uses_f3_prefix): ... this one.
3132 (grps): Add SSE instructions.
3133 (prefix_user_table): Add two new slots; add SSE2 instructions.
3134 (print_insn_i386): Rename uses_f3_prefix to uses_SSE_prefix;
3135 Handle the REPNZ and Data16 prefixes as well; do proper lookup
3136 to prefix_user_table.
3137 (OP_E): Accept mfence and lfence as well.
3138 (OP_MMX): Data16 prefix turns MMX to SSE; support REX extensions.
3139 (OP_XMM): Support REX extensions.
3145 * arm-dis.c (print_insn): Set pc to zero for instructions with
3146 a reloc associated with them.
3150 * cgen-asm.in (parse_insn_normal): Changed syn to be
3151 CGEN_SYNTAX_CHAR_TYPE. Changed all references to *syn
3152 as character to use CGEN_SYNTAX_CHAR macro and all comparisons
3153 to '\0' to use 0 instead.
3154 * cgen-dis.in (print_insn_normal): Ditto.
3155 * cgen-ibld.in (insert_insn_normal, extract_insn_normal): Ditto.
3159 * i386-dis.c: Add x86_64 support.
3160 (rex): New static variable.
3161 (REX_MODE64, REX_EXTX, REX_EXTY, REX_EXTZ): New constants.
3162 (USED_REX): New macro.
3163 (Ev, Ed, Rm, Iq, Iv64, Cm, Dm, Rm*, Ob64, Ov64): New macros.
3164 (OP_I64, OP_OFF64, OP_IMREG): New functions.
3165 (OP_REG, OP_OFF): Declare.
3166 (get64, get32, get32s): New functions.
3167 (r??_reg): New constants.
3168 (dis386_att): Change templates of instruction implicitly promoted
3169 to 64bit; change e?? to RMe?? for unwind RM byte instructions.
3171 (dis386_intel): Likewise.
3172 (dixx86_64_att): New table based on dis386_att.
3173 (dixx86_64_intel): New table based on dis386_intel.
3174 (names64, names8rex): New global variable.
3175 (names32, names16): Add extended registers.
3176 (prefix_user_t): Recognize rex prefixes.
3177 (prefix_name): Print REX prefixes nicely.
3178 (op_riprel): New global variable.
3179 (start_pc): Set type to bfd_vma.
3180 (print_insn_i386): Detect the 64bit mode and use proper table;
3181 move ckprefix after initializing the buffer; output unused rex prefixes;
3182 output information about target of RIP relative addresses.
3183 (putop): Support 'O' and 'I'. Update handling of "P', 'Q', 'R' and 'S';
3184 (print_operand_value): New function.
3185 (OP_E, OP_G, OP_REG, OP_I, OP_J, OP_DIR, OP_OFF, OP_D): Add support for
3186 REX prefix and new modes.
3187 (get64, get32s): New.
3188 (get32): Return bfd_signed_vma type.
3189 (set_op): Initialize the op_riprel.
3190 * disassemble.c (disassembler): Recognize the x86-64 disassembly.
3194 cgen-dis.in (read_insn): Use bfd_get_bits()
3198 * cgen-dis.c (hash_insn_array): Use bfd_put_bits().
3199 (hash_insn_list): Likewise
3200 * cgen-ibld.in (insert_1): Use bfd_put_bits() and bfd_get_bits().
3201 (extract_1): Use bfd_get_bits().
3202 (extract_normal): Apply sign extension to both extraction
3204 * cgen-opc.c (cgen_get_insn_value): Use bfd_get_bits()
3205 (cgen_put_insn_value): Use bfd_put_bits()
3209 * cgen-asm.in (parse_insn_normal): Print better error message for
3210 instructions with missing operands.
3214 * cgen-opc.c: Include alloca.h if HAVE_ALLOCA_H is defined.
3218 * Makefile.in: Regenerate.
3219 * aclocal.m4: Regenerate.
3220 * config.in: Regenerate.
3221 * configure.in: Add spacing.
3222 * configure: Regenerate.
3223 * ia64-asmtab.c: Regenerate.
3224 * po/opcodes.pot: Regenerate.
3228 * cgen-asm.in (@arch@_cgen_assemble_insn): Prefer printing insert-time
3229 error messages over later parse-time ones.
3233 * ia64-dis.c (print_insn_ia64): Cast away const on ia64_free_opcode
3235 * ia64-gen.c (insert_deplist): Cast sizeof result to int.
3236 (print_dependency_table): Print NULL if semantics field not set.
3237 (insert_opcode_dependencies): Mark cmp parameter as unused.
3238 (print_main_table): Use fprintf_vma to print long long fields.
3239 (main): Mark argv paramter as unused. Convert to old style definition.
3240 * ia64-opc.c (ia64_find_dependency): Cast sizeof result to int.
3241 * ia64-asmtab.c: Regnerate.
3245 * m32r-dis.c (print_insn): Prevent re-read of instruction from
3248 * fr30-dis.c: Regenerate.
3252 * configure.in: Add arc-ext.lo for bfd_arc_arch selection.
3253 * Makefile.am (C_FILES): Add arc-ext.c.
3254 (ALL_MACHINES) Add arc-ext.lo.
3255 (INCLUDES) Add opcode directory to list.
3256 New dependency entry for arc-ext.lo.
3257 * disassemble.c (disassembler): Correct call to
3258 arc_get_disassembler.
3259 * arc-opc.c: New update for ARC, including full base
3260 instructions for ARC variants.
3261 * arc-dis.h, arc-dis.c: New update for ARC, including
3262 extensibility functionality.
3263 * arc-ext.h, arc-ext.c: New files for handling extensibility.
3267 * mips-opc.c (mips_builtin_opcodes): Use the WR_HILO, RD_HILO,
3268 MOD_HILO, and MOD_LO macros.
3270 * mips-opc.c (M1, M2): Delete.
3271 (mips_builtin_opcodes): Remove all uses of M1.
3273 * mips-opc.c (mips_builtin_opcodes): Make the dmfc2 and dmtc2
3274 instructions take "G" format second operands and use the
3276 There are mfc3 and mtc3 opcodes, so add dmfc3 and dmtc3 opcodes to
3278 Delete "sel" code operands from mfc1 and mtc1.
3279 Add MIPS64 opcode changes (dclo, dclz), and "sel" code variants
3285 * mips-opc.c (mips_builtin_opcodes): Finish additions
3286 for MIPS32 support, and clean up existing entries for
3287 aesthetics, consistency with the MIPS32 ISA, and
3288 with consistency the rest of the table.
3292 * mips16-opc.c (mips16_opcodes): Add initialiser for membership
3297 mips-dis.c (print_insn_arg): Handle new 'U' and 'J' argument
3298 specifiers. Update 'B' for new constant names, and remove
3300 mips-opc.c (mips_builtin_opcodes): Place "pref" and "ssnop"
3301 near the top of the array, so they are disassembled properly.
3302 Enable "ssnop" for MIPS32. Add "break" variant with 20 bit
3303 code for MIPS32. Update "clo" and "clz" to use 'U' operand
3304 specifier. Add 'H' format specifier variants for "mfc1,"
3305 "mfc2," "mfc3," "mtc1," "mtc2," and "mtc3" for MIPS32. Update
3306 MIPS32 "sdbbp" to use 'B' operand specifier. Add MIPS32
3307 "wait" variant which uses 'J' operand specifier.
3309 * mips-dis.c (set_mips_isa_type): Update to use
3310 CPU_UNKNOWN and ISA_* constants. Add bfd_mach_mips32 case.
3311 Replace bfd_mach_mips4K with bfd_mach_mips32_4k case.
3312 * mips-opc.c (I32): New constant for instructions added in
3315 (mips_builtin_opcodes) Replace all uses of P4 with I32.
3317 * mips-dis.c (set_mips_isa_type): Add cases for
3318 bfd_mach_mips5 and bfd_mach_mips64.
3319 * mips-opc.c (I64): New definitions.
3321 * mips-dis.c (set_mips_isa_type): Add case for
3326 * sh-dis.c (print_insn_ddt): Make insn_x, insn_y unsigned.
3327 (print_insn_ppi): Make nib1, nib2, nib3 unsigned.
3328 Initialize variable dc to NULL.
3329 (print_insn_shx): Remove unused label d_reg_n.
3333 * arm-opc.h: Add new opcode formatting parameter 'B'.
3334 (arm_opcodes): Add XScale, v5, and v5te instructions.
3335 (thumb_opcodes): Add v5t instructions.
3337 * arm-dis.c (print_insn_arm): Handle new 'B' format
3339 (print_insn_thumb): Decode BLX(1) instruction.
3343 * mips-opc.c: Fix file header comment.
3347 * cris-dis.c (cris_get_disassembler): If abfd is NULL, return
3348 print_insn_cris_with_register_prefix.
3352 * sh-opc.h: The operand of `mov.w r0, (<disp>,GBR)' is IMM1, not 0.
3356 * cgen-dis.in (print_insn): All insns which can fit into insn_value
3357 must be loaded there in their entirety.
3361 * sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs.
3362 (compute_arch_mask): Add v8plusb and v9b machines.
3363 (print_insn_sparc): siam mode decoding, accept ASRs up to 25.
3364 * sparc-opc.c: Support for Cheetah instruction set.
3365 (prefetch_table): Add #invalidate.
3369 * mcore-dis.c (imsk): Change mask for OC to 0xFE00.
3373 * fr30-desc.h: Regenerate.
3374 * m32r-desc.h: Regenerate.
3375 * m32r-ibld.c: Regenerate.
3379 * ia64-ic.tbl: Update from Intel.
3380 * ia64-asmtab.c: Regenerate.
3384 * ia64-gen.c: Convert C++-style comments to C-style comments.
3385 * tic54x-dis.c: Likewise.
3389 Changes to add dollar prefix to registers for files where user symbols
3390 don't have a leading underscore. Fix formatting.
3391 * cris-dis.c (REGISTER_PREFIX_CHAR): New.
3392 (format_reg): Add parameter with_reg_prefix. All callers changed.
3393 (print_with_operands): Ditto.
3394 (print_insn_cris_generic): Renamed from print_insn_cris, add
3395 parameter with_reg_prefix.
3396 (print_insn_cris_with_register_prefix,
3397 print_insn_cris_without_register_prefix, cris_get_disassembler):
3399 * disassemble.c (disassembler) [ARCH_cris]: Call cris_get_disassembler.
3403 * ia64-opc-f.c (ia64_opcodes_f): Add fpcmp pseudo-ops for
3404 gt, ge, ngt, and nge.
3405 * ia64-asmtab.c: Regenerate.
3407 * ia64-dis.c (print_insn_ia64): Revert Aug 7 byte skip count change.
3408 * ia64-gen.c (parse_semantics): Handle IA64_DVS_STOP.
3409 (lookup_specifier): Handle "PR%, 1 to 15" and "PR%, 16 to 62".
3410 * ia64-ic.tbl, ia64-raw.tbl, ia64-war.tbl, ia64-waw.tbl: Update.
3411 * ia64-asmtab.c: Regnerate.
3415 * mips-opc.c (mips_builtin_opcodes): Support cache instruction on 4K cores.
3416 Add mfc0 and mtc0 with sub-selection values.
3417 Add clo and clz opcodes.
3418 Add msub and msubu instructions for MIPS32.
3419 Add madd/maddu aliases for mad/madu for MIPS32.
3420 Support wait, deret, eret, movn, pref for MIPS32.
3421 Support tlbp, tlbr, tlbwi, tlbwr.
3424 * mips-dis.c (print_insn_arg): Print sdbbp 'm' args.
3425 (print_insn_arg): Handle 'H' args.
3426 (set_mips_isa_type): Recognize 4K.
3427 Use CPU_* defines instead of hardcoded numbers.
3431 * d30v-opc.c (d30v_operand_t): New operand type Rb2.
3432 (d30v_format_tab): Use Rb2 for modinc and moddec.
3436 * d30v-opc.c (d30v_format_tab): Use format Ra for
3441 * configure: Rebuilt with new libtool.m4.
3445 * configure: Regenerate.
3446 * po/opcodes.pot: Regenerate.
3450 * acinclude.m4: Include libtool and gettext macros from the
3452 * aclocal.m4, configure: Rebuilt.
3456 * tic80-dis.c: Fix formatting.
3460 * w65-dis.c: Fix formatting.
3464 * ppc-opc.c: Add XTLB macro for a few PPC 4xx extended mnemonics.
3465 (powerpc_opcodes): Add table entries for PPC 405 instructions.
3466 Changed rfci, icbt, mfdcr, dccci, mtdcr, iccci from PPC to PPC403
3467 instructions. Added extended mnemonic mftbl as defined in the
3468 405GP manual for all PPCs.
3472 * ia64-dis.c (print_insn_ia64): Add failed label after ia64_free_opcode
3473 call. Change last goto to use failed instead of done.
3477 * cgen-ibld.in (cgen_put_insn_int_value): New function.
3478 (insert_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
3479 (insert_insn_normal): Use cgen_put_insn_int_value with CGEN_INT_INSN_P.
3480 (extract_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
3481 * cgen-dis.in (read_insn): New static function.
3482 (print_insn): Use read_insn to read the insn into the buffer and set
3484 (print_insn): in CGEN_INT_INSN_P, make sure that the entire insn is
3486 * fr30-asm.c: Regenerated.
3487 * fr30-desc.c: Regenerated.
3488 * fr30-desc.h: Regenerated.
3489 * fr30-dis.c: Regenerated.
3490 * fr30-ibld.c: Regenerated.
3491 * fr30-opc.c: Regenerated.
3492 * fr30-opc.h: Regenerated.
3493 * m32r-asm.c: Regenerated.
3494 * m32r-desc.c: Regenerated.
3495 * m32r-desc.h: Regenerated.
3496 * m32r-dis.c: Regenerated.
3497 * m32r-ibld.c: Regenerated.
3498 * m32r-opc.c: Regenerated.
3502 * tic30-dis.c: Fix formatting.
3506 * sh-dis.c: Fix formatting.
3510 * ppc-opc.c (powerpc_opcodes): Add rfid, mtsrd, mtsrdin, mtmsrd.
3514 * z8k-dis.c: Fix formatting.
3518 * ia64-ic.tbl (pr-readers-nobr-nomovpr): Add addl, adds. Delete
3519 break, mov-immediate, nop.
3520 * ia64-opc-f.c: Delete fpsub instructions.
3521 * ia64-opc-m.c: Add POSTINC to all instructions with postincrement
3522 address operand. Rewrite using macros to avoid long lines.
3523 * ia64-opc.h (POSTINC): Define.
3524 * ia64-asmtab.c: Regenerate.
3528 * ia64-ic.tbl: Add missing entries.
3532 * i860-dis.c (print_br_address): Change third argument from int
3537 * ia64-dis.c (print_insn_ia64): Get byte skip count correct
3538 for MLI templates. Handle IA64_OPND_TGT64.
3542 * cgen-dis.in, cgen-asm.in, cgen-ibld.in: New files.
3543 * cgen.sh: Likewise.
3547 * ia64-dis.c (print_insn_ia64): Call ia64_free_opcode at end.
3551 * avr-dis.c (avr_operand): Use PARAMS macro in declaration.
3552 Change return type from void to int. Check the combination
3553 of operands, return 1 if valid. Fix to avoid BUF overflow.
3554 Report undefined combinations of operands in COMMENT.
3555 Report internal errors to stderr. Output the adiw/sbiw
3556 constant operand in both decimal and hex.
3557 (print_insn_avr): Disassemble ldd/std with displacement of 0
3558 as ld/st. Check avr_operand () return value, handle invalid
3559 combinations of operands like unknown opcodes.
3563 * Makefile.am (CGEN, CGENDEPS, CGENDIR, CGENFLAGS): New.
3564 (run-cgen, stamp-m32r, stamp-fr30): New targets.
3565 * Makefile.in: Regenerate.
3566 * configure.in: Add --enable-cgen-maint option.
3567 * configure: Regenerate.
3571 * cgen-opc.c (cgen_hw_lookup_by_name): 'i' is now unsigned.
3572 (cgen_hw_lookup_by_num): Ditto.
3573 (cgen_operand_lookup_by_name): Ditto.
3574 (print_address): Ditto.
3575 (print_keyword): Ditto.
3576 * cgen-dis.c (hash_insn_array): Mark unused parameters with
3578 * cgen-asm.c (hash_insn_array): Mark unused parameters with
3580 (cgen_parse_keyword): Ditto.
3584 * i860-dis.c: New file.
3585 (print_insn_i860): New function.
3586 (print_br_address): New function.
3587 (sign_extend): New function.
3588 (BITWISE_OP): New macro.
3589 (I860_REG_PREFIX): New macro.
3590 (grnames, frnames, crnames): New structures.
3592 * disassemble.c (ARCH_i860): Define.
3593 (disassembler): Add check for bfd_arch_i860 to set disassemble
3594 function to print_insn_i860.
3596 * Makefile.in (CFILES): Added i860-dis.c.
3597 (ALL_MACHINES): Added i860-dis.lo.
3598 (i860-dis.lo): New dependences.
3600 * configure.in: New bits for bfd_i860_arch.
3602 * configure: Regenerated.
3606 * Makefile.am (CFILES): Add cris-dis.c and cris-opc.c.
3607 (ALL_MACHINES): Add cris-dis.lo and cris-opc.lo.
3608 (cris-dis.lo, cris-opc.lo): New rules.
3609 * Makefile.in: Rebuild.
3610 * configure.in (bfd_cris_arch): New target.
3611 * configure: Rebuild.
3612 * disassemble.c (ARCH_cris): Define.
3613 (disassembler): Support ARCH_cris.
3614 * cris-dis.c, cris-opc.c: New files.
3615 * po/POTFILES.in, po/opcodes.pot: Regenerate.
3619 * sparc-opc.c (sparc_opcodes): popc has 0 in rs1, not rs2.
3624 * ppc-opc.c (powerpc_opcodes): Correct suffix for vslw.
3629 * hppa-dis.c (fput_reg, fput_fp_reg, fput_fp_reg_r, fput_creg,
3630 fput_const, extract_3, extract_5_load, extract_5_store,
3631 extract_5r_store, extract_5R_store, extract_10U_store,
3632 extract_5Q_store, extract_11, extract_14, extract_16, extract_21,
3633 extract_12, extract_17, extract_22): Prototype.
3634 (print_insn_hppa): Rename inner block opcode -> opc to avoid
3635 shadowing outer block.
3644 * arm-dis.c (print_insn_arm): Output combinations of PSR flags.
3648 * avr-dis.c (avr_operand): Change _ () to _() around all strings
3649 marked for translation (exception from the usual coding style).
3650 (print_insn_avr): Initialize insn2 to avoid warnings.
3654 * h8300-dis.c (bfd_h8_disassemble): Improve readability.
3655 * h8500-dis.c: Fix formatting.
3659 * Makefile.am (DEP): Fix 2000-06-22. grep after running dep.sed
3660 (CLEANFILES): Add DEPA.
3661 * Makefile.in: Regenerate.
3665 * arm-dis.c (regnames): Add an additional register set to match
3666 the set used by GCC. Make it the default.
3670 * Makefile.am (DEP): grep for leading `/' in DEP1, and fail if we
3672 * Makefile.in: Regenerate.
3676 * Makefile.am: Rebuild dependency.
3677 * Makefile.in: Rebuild.
3681 * Makefile.in, configure: regenerate
3682 * disassemble.c (disassembler): Recognize ARCH_m68hc12,
3684 * m68hc11-dis.c (read_memory, print_insn, print_insn_m68hc12):
3686 * configure.in: Recognize m68hc12 and m68hc11.
3687 * m68hc11-dis.c, m68hc11-opc.c: New files for support of m68hc1x
3688 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
3689 and opcode generation for m68hc11 and m68hc12.
3693 * disassemble.c (disassembler): Refer to the PowerPC 620 using
3694 bfd_mach_ppc_620 instead of 620.
3698 * h8300-dis.c: Fix formatting.
3699 (bfd_h8_disassemble): Distinguish adds/subs, inc/dec.[wl]
3704 * avr-dis.c (avr_operand): Bugfix for jmp/call address.
3708 * avr-dis.c: completely rewritten.
3712 * h8300-dis.c: Follow the GNU coding style.
3713 (bfd_h8_disassemble) Fix a typo.
3717 * h8300-dis.c (bfd_h8_disassemble_init): Fix a typo.
3718 (bfd_h8_disassemble): Distinguish the operand size of inc/dev.[wl]
3719 correctly. Fix a typo.
3723 * opintl.h (_(String)): Explain why dgettext is used instead of
3728 * opintl.h (gettext, dgettext, dcgettext, textdomain,
3729 bindtextdomain): Replace defines with those from intl/libgettext.h
3730 to quieten gcc warnings.
3734 * Makefile.am: Update dependencies with "make dep-am"
3735 * Makefile.in: Regenerate.
3739 * m10300-dis.c (disassemble): Don't assume 32-bit longs when
3740 sign-extending operands.
3744 * d10v-opc.c (d10v_opcodes): add ALONE tag to all short branches
3749 * Makefile.am (LIBIBERTY): Define.
3753 * mips-dis.c (REGISTER_NAMES): Rename to STD_REGISTER_NAMES.
3754 (STD_REGISTER_NAMES): New name for REGISTER_NAMES.
3755 (reg_names): Rename to std_reg_names. Change it to a char **
3757 (std_reg_names): New name for reg_names.
3758 (set_mips_isa_type): Set reg_names to point to std_reg_names by
3763 * fr30-desc.h: Partially regenerated to account for changed
3764 CGEN_MAX_* -> CGEN_ACTUAL_MAX_* macros.
3765 * m32r-desc.h: Ditto.
3769 * arm-opc.h: Use upper case for flasg in MSR and MRS
3770 instructions. Allow any bit to be set in the field_mask of
3771 the MSR instruction.
3773 * arm-dis.c (print_insn_arm): Decode _x and _s bits of the
3774 field_mask of an MSR instruction.
3778 * arm-opc.h: Disassembly of thumb ldsb/ldsh
3779 instructions changed to ldrsb/ldrsh.
3783 * mips-dis.c (print_insn_arg): Don't mask top 32 bits of 64-bit
3784 target addresses for 'jal' and 'j'.
3788 * ppc-opc.c (powerpc_opcodes): Make the predicted-branch opcodes
3789 also available in common mode when powerpc syntax is being used.
3793 * m68k-dis.c (dummy_printer): Add ATTRIBUTE_UNUSED to args.
3794 (dummy_print_address): Ditto.
3798 * tic54x-opc.c: New.
3799 * tic54x-dis.c: New.
3800 * disassemble.c (disassembler): Add ARCH_tic54x.
3801 * configure.in: Added tic54x target.
3803 * Makefile.am: Add tic54x dependencies.
3804 * Makefile.in: Ditto.
3808 * ppc-opc.c (VA, VB, VC, VD, VS, SIMM, UIMM, SHB): New macros, for
3809 vector unit operands.
3810 (VX, VX_MASK, VXA, VXA_MASK, VXR, VXR_MASK): New macros, for vector
3811 unit instruction formats.
3812 (PPCVEC): New macro, mask for vector instructions.
3813 (powerpc_operands): Add table entries for above operand types.
3814 (powerpc_opcodes): Add table entries for vector instructions.
3816 * ppc-dis.c (print_insn_big_powerpc): Add PPC_OPCODE_ALTIVEC to mask.
3817 (print_insn_little_powerpc): Likewise.
3818 (print_insn_powerpc): Prepend 'v' when printing vector registers.
3822 * configure.in: Add bfd_powerpc_64_arch.
3823 * disassemble.c (disassembler): Use print_insn_big_powerpc for
3828 * fr30-desc.c (fr30_cgen_cpu_open): Initialise signed_overflow
3833 * avr-dis.c (reg_fmul_d): New. Extract destination register from
3835 (reg_fmul_r): New. Extract source register from FMUL instruction.
3836 (reg_muls_d): New. Extract destination register from MULS instruction.
3837 (reg_muls_r): New. Extract source register from MULS instruction.
3838 (reg_movw_d): New. Extract destination register from MOVW instruction.
3839 (reg_movw_r): New. Extract source register from MOVW instruction.
3840 (print_insn_avr): Handle MOVW, MULS, MULSU, FMUL, FMULS, FMULSU,
3841 EICALL, EIJMP, LPM r,Z, ELPM r,Z, SPM, ESPM instructions.
3845 * ia64-gen.c (general): Add an ordered table of primary
3846 opcode names, as well as priority fields to disassembly data
3847 structures to enforce a preferred disassembly format based on the
3848 ordering of the opcode tables.
3849 (load_insn_classes): Show a useful message if IC tables are missing.
3850 (load_depfile): Ditto.
3851 * ia64-asmtab.h (struct ia64_dis_names ): Add priority flag to
3852 distinguish preferred disassembly.
3853 * ia64-opc-f.c: Reorder some insn for preferred disassembly
3854 format. Fix incorrect flag on fma.s/fma.s.s0.
3855 * ia64-opc.c: Scan *all* disassembly matches and use the one with
3856 the highest priority.
3857 * ia64-opc-b.c: Use more abbreviations.
3858 * ia64-asmtab.c: Regenerate.
3862 * hppa-dis.c (extract_16): New function.
3863 (print_insn_hppa): Fix incorrect handling of 'fe'. Added handling of
3864 new operand types l,y,&,fe,fE,fx.
3872 * Makefile.am (HFILES): Add ia64-asmtab.h, ia64-opc.h.
3873 (CFILES): Add ia64-dis.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c,
3874 ia64-opc-i.c, ia64-opc-m.c, ia64-opc-d.c, ia64-opc.c, ia64-gen.c,
3876 (ALL_MACHINES): Add ia64-dis.lo, ia64-opc.lo.
3877 (ia64-ic.tbl, ia64-raw.tbl, ia64-waw.tbl, ia64-war.tbl, ia64-gen,
3878 ia64-gen.o, ia64-asmtab.c, ia64-dis.lo, ia64-opc.lo): New rules.
3879 * Makefile.in: Rebuild.
3880 * configure Rebuild.
3881 * configure.in (bfd_ia64_arch): New target.
3882 * disassemble.c (ARCH_ia64): Define.
3883 (disassembler): Support ARCH_ia64.
3884 * ia64-asmtab.c, ia64-asmtab.h, ia64-dis.c, ia64-gen.c ia64-ic.tbl,
3885 ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c ia64-opc-f.c, ia64-opc-i.c,
3886 ia64-opc-m.c, ia64-opc-x.c, ia64-opc.c, ia64-opc.h, ia64-raw.tbl,
3887 ia64-war.tbl, ia64-waw.tbl: New files.
3891 * m10300-dis.c (HAVE_AM30, HAVE_AM33): Define.
3892 (disassemble): Use them.
3896 * sysdep.h: Include "ansidecl.h" not <ansidecl.h>
3897 * Makefile.am: Update dependencies.
3898 * Makefile.in: Regenerate.
3902 * a29k-dis.c, alpha-dis.c, alpha-opc.c, arc-dis.c, arc-opc.c,
3903 avr-dis.c, d10v-dis.c, d10v-opc.c, d30v-dis.c, d30v-opc.c,
3904 disassemble.c, h8300-dis.c, h8500-dis.c, hppa-dis.c, i370-dis.c,
3905 i370-opc.c, i960-dis.c, m10200-dis.c, m10200-opc.c, m10300-dis.c,
3906 m10300-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c, mcore-dis.c,
3907 mips-dis.c, mips-opc.c, mips16-opc.c, pj-dis.c, pj-opc.c,
3908 ppc-dis.c, ppc-opc.c, sh-dis.c, sparc-dis.c, sparc-opc.c,
3909 tic80-dis.c, tic80-opc.c, v850-dis.c, v850-opc.c, vax-dis.c,
3910 w65-dis.c, z8k-dis.c, z8kgen.c: Include sysdep.h. Remove
3911 ansidecl.h as sysdep.h includes it.
3915 * configure.in (WARN_CFLAGS): Set to -W -Wall by default. Add
3916 --enable-build-warnings option.
3917 * Makefile.am (AM_CFLAGS, WARN_CFLAGS): Add definitions.
3918 * Makefile.in, configure: Re-generate.
3922 * sh-opc.h (sh_table): Use A_DISP_PC / PCRELIMM_8BY2 for ldre & ldrs.
3923 stc GBR,@-<REG_N> is available for arch_sh1_up.
3924 Group parallel processing insn with identical mnemonics together.
3925 Make three-operand psha / pshl come first.
3929 * sh-opc.h (sh_nibble_type): Remove DISP_8 and DISP_4.
3930 Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
3931 (sh_arg_type): Add A_PC.
3932 (sh_table): Update entries using immediates. Add repeat.
3933 * sh-dis.c (print_insn_shx): Remove DISP_8 and DISP_4.
3934 Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
3938 * po/opcodes.pot: Regenerate.
3940 * Makefile.am (MKDEP): Use gcc -MM rather than mkdep.
3941 (DEP): Quote when passing vars to sub-make. Add warning message
3943 (DEP1): Rewrite for "gcc -MM".
3944 (CLEANFILES): Add DEP2.
3945 Update dependencies.
3946 * Makefile.in: Regenerate.
3950 * avr-dis.c: Syntax cleanup.
3951 (add0fff): Print the pc relative address as a signed number.
3952 (add03f8): Likewise.
3956 * disassemble.c (disassembler_usage): Don't use a prototype. Mark
3957 the parameter ATTRIBUTE_UNUSED.
3958 * ppc-opc.c: Add ATTRIBUTE_UNUSED as needed.
3962 * m10300-opc.c: SP-based offsets are always unsigned.
3966 * arm-opc.h (thumb_opcodes): Disassemble 0xde.. to "bal"
3967 [branch always] instead of "undefined".
3971 * d30v-opc.c (d30v_format_table): Move SHORT_AR to end of list of
3972 short instructions, from end of list of long instructions.
3976 * Makefile.am (CFILES): Add avr-dis.c.
3977 (ALL_MACHINES): Add avr-dis.lo.
3981 * avr-dis.c (add0fff, add03f8): Don't use structure bitfields to
3983 (print_insn_avr): Call function via pointer in K&R compatible way.
3984 (dispLDD, regPP, reg50, reg104, reg40, reg20w, lit404, lit204,
3985 add0fff, add03f8): Convert to old style function declaration and
3987 (avrdis_opcode): Add prototype.
3991 * avr-dis.c: New file. AVR disassembler.
3992 * configure.in (bfd_avr_arch): New architecture support.
3993 * disassemble.c: Likewise.
3994 * configure: Regenerate.
3998 * sh-opc.h (sh_table): ldre and ldrs have a *signed* displacement.
4002 * d30v-dis.c (print_insn): Remove d*i hacks. Use per-operand
4003 flag to determine if operand is pc-relative.
4005 (d30v_format_table):
4006 (REL6S3): Renamed from IMM6S3.
4007 Added flag OPERAND_PCREL.
4008 (REL12S3, REL18S3, REL32): Split from IMM12S3, IMM18S3, REL32, with
4009 added flag OPERAND_PCREL.
4010 (IMM12S3U): Replaced with REL12S3.
4011 (SHORT_D2, LONG_D): Delay target is pc-relative.
4012 (SHORT_B2r, SHORT_B3r, SHORT_B3br, SHORT_D2r, LONG_Ur, LONG_2r):
4013 Split from SHORT_B2, SHORT_D2, SHORT_B3b, SHORT_D2, LONG_U, LONG_2r,
4014 using the REL* operands.
4015 (LONG_2br, LONG_Dr): Likewise, from LONG_2b, LONG_D.
4016 (SHORT_D1r, SHORT_D2Br, LONG_Dbr): Renamed from SHORT_D1, SHORT_D2B,
4017 LONG_Db, using REL* operands.
4018 (SHORT_U, SHORT_A5S): Removed stray alternatives.
4019 (d30v_opcode_table): Use new *r formats.
4023 * m32r-desc.c (m32r_cgen_cpu_open): Replace 'flags' with
4024 'signed_overflow_ok_p'.
4028 * Makefile.am (stamp-lib): Use $(LIBTOOL) --config to get the
4029 name of the libtool directory.
4030 * Makefile.in: Rebuild.
4034 * cgen-opc.c (cgen_set_signed_overflow_ok): New function.
4035 (cgen_clear_signed_overflow_ok): New function.
4036 (cgen_signed_overflow_ok_p): New function.
4040 * m32r-asm.c, m32r-desc.c, m32r-desc.h, m32r-dis.c,
4041 m32r-ibld.c, m32r-opc.h: Rebuild.
4045 * i370-dis.c, i370-opc.c: New.
4047 * disassemble.c (ARCH_i370): Define.
4048 (disassembler): Handle it.
4050 * Makefile.am: Add support for Linux/IBM 370.
4051 * configure.in: Likewise.
4053 * Makefile.in: Regenerate.
4054 * configure: Likewise.
4058 * d30v-opc.c (d30v_opcode_tab) : Added FLAG_NOT_WITH_ADDSUBppp to
4059 ST2H, STB, STH, STHH, STW and ST2H opcodes to prohibit parallel
4064 * mips-dis.c (_print_insn_mips): New arg for OPCODE_IS_MEMBER:
4066 * mips-opc.c (G6): New define.
4067 (mips_builtin_op): Add "move" definition for -gp32.
4072 * ppc-opc.c: Correct dcread--it takes 3 arguments, not 2.
4076 * dis-buf.c (buffer_read_memory): Change `length' param and all int
4081 * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions.
4082 (print_insn_ppi): Likewise.
4083 (print_insn_shx): Use info->mach to select appropriate insn set.
4084 Add support for sh-dsp. Remove FD_REG_N support.
4085 * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support.
4086 (sh_arg_type): Likewise. Remove FD_REG_N.
4087 (sh_dsp_reg_nums): New enum.
4088 (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros.
4089 (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise.
4090 (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise.
4091 (arch_sh3_dsp_up): Likewise.
4092 (sh_opcode_info): New field: arch.
4093 (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and
4094 D_REG_N. Fill in arch field. Add sh-dsp insns.
4098 * arm-dis.c: Change flavor name from atpcs-special to
4099 special-atpcs to prevent name conflict in gdb.
4100 (get_arm_regname_num_options, set_arm_regname_option,
4101 get_arm_regnames): New functions. API to access the several
4102 flavor of register names. Note: Used by gdb.
4103 (print_insn_thumb): Use the register name entry from the currently
4104 selected flavor for LR and PC.
4108 * mcore-opc.h (enum mcore_opclass): Add MULSH and OPSR
4110 (mcore_table): Add "idly4", "psrclr", "psrset", "mulsh" and
4111 "mulsh.h" instructions.
4112 * mcore-dis.c (imsk array): Add masks for MULSH and OPSR
4114 (print_insn_mcore): Add support for little endian targets.
4115 Add support for MULSH and OPSR classes.
4119 * arm-dis.c (parse_arm_diassembler_option): Rename again.
4120 Previous delat did not take.
4124 * dis-buf.c (buffer_read_memory): Use octets_per_byte field
4125 to adjust target address bounds checking and calculate the
4126 appropriate octet offset into data.
4130 * arm-dis.c: (parse_disassembler_option): Rename to
4131 parse_arm_disassembler_option and allow to be exported.
4133 * disassemble.c (disassembler_usage): New function: Print out any
4134 target specific disassembler options.
4135 Call arm_disassembler_options() if the ARM architecture is being
4138 * arm-dis.c (NUM_ELEM): Define this macro if not already
4140 (arm_regname): New struct type for ARM register names.
4141 (arm_toggle_regnames): Delete.
4142 (parse_disassembler_option): Use register name structure.
4143 (print_insn): New function: Combines duplicate code found in
4144 print_insn_big_arm and print_insn_little_arm.
4145 (print_insn_big_arm): Call print_insn.
4146 (print_insn_little_arm): Call print_insn.
4147 (print_arm_disassembler_options): Display list of supported,
4148 ARM specific disassembler options.
4152 * arm-dis.c (printf_insn_big_arm): Treat ELF symbols with the
4153 ARM_STT_16BIT flag as Thumb code symbols.
4155 * arm-dis.c (printf_insn_little_arm): Ditto.
4159 * arm-dis.c (printf_insn_thumb): Prevent double dumping
4160 of raw thumb instructions.
4164 * mcore-opc.h (mcore_table): Add "add" as an alias for "addu".
4168 * arm-dis.c (streq): New macro.
4169 (strneq): New macro.
4170 (force_thumb): ew local variable.
4171 (parse_disassembler_option): New function: Parse a single, ARM
4172 specific disassembler command line switch.
4173 (parse_disassembler_option): Call parse_disassembler_option to
4174 parse individual command line switches.
4175 (print_insn_big_arm): Check force_thumb.
4176 (print_insn_little_arm): Check force_thumb.
4178 For older changes see ChangeLog-9899
4184 version-control: never