1 /* Simulator pseudo baseclass.
3 Copyright 1997, 1998, 2003, 2007, 2008, 2009 Free Software Foundation, Inc.
5 Contributed by Cygnus Support.
7 This file is part of GDB, the GNU debugger.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 /* Simulator state pseudo baseclass.
25 Each simulator is required to have the file ``sim-main.h''. That
26 file includes ``sim-basics.h'', defines the base type ``sim_cia''
27 (the data type that contains complete current instruction address
28 information), include ``sim-base.h'':
30 #include "sim-basics.h"
31 typedef address_word sim_cia;
32 /-* If `sim_cia' is not an integral value (e.g. a struct), define
33 CIA_ADDR to return the integral value. *-/
34 /-* #define CIA_ADDR(cia) (...) *-/
37 finally, two data types `struct _sim_cpu' and `struct sim_state'
41 ... simulator specific members ...
46 sim_cpu cpu[MAX_NR_PROCESSORS];
48 #define STATE_CPU(sd,n) (&(sd)->cpu[n])
50 #define STATE_CPU(sd,n) (&(sd)->cpu[0])
52 ... simulator specific members ...
56 Note that `base' appears last. This makes `base.magic' appear last
57 in the entire struct and helps catch miscompilation errors. */
63 /* Pre-declare certain types. */
65 /* typedef <target-dependant> sim_cia; */
67 #define NULL_CIA ((sim_cia) 0)
69 /* Return the current instruction address as a number.
70 Some targets treat the current instruction address as a struct
71 (e.g. for delay slot handling). */
73 #define CIA_ADDR(cia) (cia)
75 #ifndef INVALID_INSTRUCTION_ADDRESS
76 #define INVALID_INSTRUCTION_ADDRESS ((address_word)0 - 1)
79 typedef struct _sim_cpu sim_cpu;
81 #include "sim-module.h"
83 #include "sim-trace.h"
85 #include "sim-events.h"
86 #include "sim-profile.h"
88 #include "sim-model.h"
91 #include "sim-engine.h"
92 #include "sim-watch.h"
93 #include "sim-memopt.h"
96 /* Global pointer to current state while sim_resume is running.
97 On a machine with lots of registers, it might be possible to reserve
98 one of them for current_state. However on a machine with few registers
99 current_state can't permanently live in one and indirecting through it
100 will be slower [in which case one can have sim_resume set globals from
101 current_state for faster access].
102 If CURRENT_STATE_REG is defined, it means current_state is living in
103 a global register. */
106 #ifdef CURRENT_STATE_REG
109 extern struct sim_state *current_state;
113 /* The simulator may provide different (and faster) definition. */
114 #ifndef CURRENT_STATE
115 #define CURRENT_STATE current_state
121 /* Simulator's argv[0]. */
123 #define STATE_MY_NAME(sd) ((sd)->base.my_name)
125 /* Who opened the simulator. */
126 SIM_OPEN_KIND open_kind;
127 #define STATE_OPEN_KIND(sd) ((sd)->base.open_kind)
129 /* The host callbacks. */
130 struct host_callback_struct *callback;
131 #define STATE_CALLBACK(sd) ((sd)->base.callback)
133 /* The type of simulation environment (user/operating). */
134 enum sim_environment environment;
135 #define STATE_ENVIRONMENT(sd) ((sd)->base.environment)
137 #if 0 /* FIXME: Not ready yet. */
138 /* Stuff defined in sim-config.h. */
139 struct sim_config config;
140 #define STATE_CONFIG(sd) ((sd)->base.config)
143 /* List of installed module `init' handlers. */
144 struct module_list *modules;
145 #define STATE_MODULES(sd) ((sd)->base.modules)
147 /* Supported options. */
148 struct option_list *options;
149 #define STATE_OPTIONS(sd) ((sd)->base.options)
151 /* Non-zero if -v specified. */
153 #define STATE_VERBOSE_P(sd) ((sd)->base.verbose_p)
155 /* Non cpu-specific trace data. See sim-trace.h. */
156 TRACE_DATA trace_data;
157 #define STATE_TRACE_DATA(sd) (& (sd)->base.trace_data)
159 /* If non NULL, the BFD architecture specified on the command line */
160 const struct bfd_arch_info *architecture;
161 #define STATE_ARCHITECTURE(sd) ((sd)->base.architecture)
163 /* If non NULL, the bfd target specified on the command line */
165 #define STATE_TARGET(sd) ((sd)->base.target)
167 /* In standalone simulator, this is the program's arguments passed
168 on the command line. */
170 #define STATE_PROG_ARGV(sd) ((sd)->base.prog_argv)
172 /* The program's bfd. */
173 struct bfd *prog_bfd;
174 #define STATE_PROG_BFD(sd) ((sd)->base.prog_bfd)
176 /* Symbol table for prog_bfd */
177 struct bfd_symbol **prog_syms;
178 #define STATE_PROG_SYMS(sd) ((sd)->base.prog_syms)
180 /* The program's text section. */
181 struct bfd_section *text_section;
182 /* Starting and ending text section addresses from the bfd. */
183 bfd_vma text_start, text_end;
184 #define STATE_TEXT_SECTION(sd) ((sd)->base.text_section)
185 #define STATE_TEXT_START(sd) ((sd)->base.text_start)
186 #define STATE_TEXT_END(sd) ((sd)->base.text_end)
188 /* Start address, set when the program is loaded from the bfd. */
190 #define STATE_START_ADDR(sd) ((sd)->base.start_addr)
192 /* Size of the simulator's cache, if any.
193 This is not the target's cache. It is the cache the simulator uses
194 to process instructions. */
195 unsigned int scache_size;
196 #define STATE_SCACHE_SIZE(sd) ((sd)->base.scache_size)
198 /* FIXME: Move to top level sim_state struct (as some struct)? */
199 #ifdef SIM_HAVE_FLATMEM
200 unsigned int mem_size;
201 #define STATE_MEM_SIZE(sd) ((sd)->base.mem_size)
202 unsigned int mem_base;
203 #define STATE_MEM_BASE(sd) ((sd)->base.mem_base)
204 unsigned char *memory;
205 #define STATE_MEMORY(sd) ((sd)->base.memory)
208 /* core memory bus */
209 #define STATE_CORE(sd) (&(sd)->base.core)
212 /* Record of memory sections added via the memory-options interface. */
213 #define STATE_MEMOPT(sd) ((sd)->base.memopt)
217 #define STATE_EVENTS(sd) (&(sd)->base.events)
220 /* generic halt/resume engine */
222 #define STATE_ENGINE(sd) (&(sd)->base.engine)
224 /* generic watchpoint support */
225 sim_watchpoints watchpoints;
226 #define STATE_WATCHPOINTS(sd) (&(sd)->base.watchpoints)
230 #define STATE_HW(sd) ((sd)->base.hw)
233 /* Should image loads be performed using the LMA or VMA? Older
234 simulators use the VMA while newer simulators prefer the LMA. */
236 #define STATE_LOAD_AT_LMA_P(SD) ((SD)->base.load_at_lma_p)
238 /* Marker for those wanting to do sanity checks.
239 This should remain the last member of this struct to help catch
240 miscompilation errors. */
242 #define SIM_MAGIC_NUMBER 0x4242
243 #define STATE_MAGIC(sd) ((sd)->base.magic)
246 /* Functions for allocating/freeing a sim_state. */
247 SIM_DESC sim_state_alloc PARAMS ((SIM_OPEN_KIND kind, host_callback *callback));
248 void sim_state_free PARAMS ((SIM_DESC));
250 #endif /* SIM_BASE_H */