3 * config/tc-alpha.c: Includes vms/egps.h on EVAX.
4 (s_alpha_comm): Used new EGPS macros from egps.h
5 (RGPS__V_NO_SHIFT, EGPS__V_MASK): New local macros.
6 (s_alpha_section_word): Add comments. Use new EGPS macros.
7 Adjust for modified bfd_vms_set_section_flags function.
12 * config/tc-ppc.c (ppc_elf_cons): Clear frag contents.
16 * as.c (create_obj_attrs_section): Remove unused variable addr.
17 * listing.c (listing_listing): Remove unused variable message.
18 * read.c: Remove unnecessary register type qualifiers.
19 (s_mri): Only define/use old_flag variable if MRI_MODE_CHANGE is
24 * config/tc-avr.c (mcu_types): Add support for atmega16a, atmega168a,
25 atmega164a, atmega165a, atmega169a, atmega169pa, atmega16hva2,
26 atmega324a, atmega324pa, atmega325a, atmega3250a, atmega328,
27 atmega329a, atmega329pa, atmega3290a, atmega48a, atmega644a,
28 atmega645a, atmega645p, atmega6450a, atmega6450p, atmega649a,
29 atmega649p, atmega6490a, atmega6490p, atmega64hve, atmega88a,
30 atmega88pa, attiny461a, attiny84a, m3000.
31 Remove support for atmega8m1, atmega8c1, atmega16c1, atmega4hvd,
32 atmega8hvd, attiny327, m3000f, m3000s, m3001b.
33 * doc/c-avr.texi: Same.
37 * config/tc-arm.c (make_mapping_symbol): Handle the case
38 that multiple mapping symbols have the same value 0.
42 * configure: Regenerate.
46 * po/ru.po: New Russian translation.
47 * configure.in (ALL_LINGUAS): Add ru.
48 * configure: Regenerate.
53 * input-scrub.c (input_scrub_next_buffer): Use memmove instead
54 of memcpy to copy overlap memory.
58 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c.
59 (TARGET_CPU_HFILES): Add config/tc-tic6x.h.
60 * Makefile.in: Regenerate.
61 * NEWS: Add news entry for TI C6X support.
62 * app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle
63 TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in
64 operands if TC_KEEP_OPERAND_SPACES.
65 * configure.tgt (tic6x-*-*): New.
66 * config/tc-ia64.h (TC_PREDICATE_START_CHAR,
67 TC_PREDICATE_END_CHAR): Define.
68 * config/tc-tic6x.c, config/tc-tic6x.h: New.
69 * doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi.
70 * doc/Makefile.in: Regenerate.
71 * doc/all.texi (TIC6X): Define.
72 * doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi.
73 * doc/c-tic6x.texi: New.
77 * config/tc-i386.c (lex_got): Use STRING_COMMA_LEN on gotrel.
81 * config/tc-i386.c (i386_error): Replace oprand_size_mismatch
82 with operand_size_mismatch.
83 (operand_size_match): Updated.
84 (match_template): Likewise.
88 * config/tc-i386.c (i386_error): New.
89 (_i386_insn): Replace err_msg with error.
90 (operand_size_match): Set error instead of err_msg on failure.
91 (operand_type_match): Likewise.
92 (operand_type_register_match): Likewise.
93 (VEX_check_operands): Likewise.
94 (match_template): Likewise. Use error instead of err_msg with
99 * config/tc-arm.c (make_mapping_symbol): Hanle the case
100 that two mapping symbols have the same value.
104 * doc/c-arm.texi (.setfp): Correct example.
109 * config/tc-arm.c (reloc_names): New relocation names.
110 (md_apply_fix): New case for BFD_RELOC_ARM_GOT_PREL.
111 (tc_gen_reloc): New case for BFD_RELOC_ARM_GOT_PREL.
112 * doc/c-arm.texi (ARM-Relocations): Document the new relocation.
116 * dw2gencfi.c (output_cie): Consider emitting the S augmentation in all
117 cases, and not only for .eh_frame.
119 * dw2gencfi.c (output_cie): Make it more explicit which code paths
120 belong to .eh_frame only.
124 * config/tc-v850.c (v850_insert_operand): Handle out-of-range
125 assembler constants on 64-bit hosts.
129 * bfin-defs.h, bfin-lex.l, bfin-parse.y, tc-bfin.c, tc-bfin.h:
130 Strip trailing whitespace.
134 * doc/c-bfin.texi (-mcpu): Add bf504 and bf506.
135 * config/tc-bfin.c (bfin_cpu_type): Add BFIN_CPU_BF504 and
137 (bfin_cpus[]): Add 0.0 for bf504 and bf506.
141 * doc/as.texinfo: Add Blackfin options.
142 * doc/c-bfin.texi: Document -mfdpic, -mno-fdpic and -mnopic.
143 * config/tc-bfin.c (md_show_usage): Show usage for all
144 Blackfin specific options.
149 * listing.c (listing_newline): Correct backslash quote logic.
153 * config/tc-i386.h [TE_SOLARIS] (ELF_TARGET_FORMAT): Define.
154 (ELF_TARGET_FORMAT64): Define.
158 * config/tc-arm.c (arm_cpu_option_table): Add cortex-m4.
162 * config/tc-sh.c (get_specific): Move overflow checking code to avoid
163 reading uninitialized data.
167 * config/tc-score7.c (s7_frag_check): Add ATTRIBUTE_UNUSED.
171 * configure.tgt: Fix mep cpu case.
175 * config/tc-arm.c (do_t_strexd): Remove
176 operand[1] != operand[2] contraint.
180 * config/tc-arm.c (neon_select_shape): No need to match
181 the remaining operands in the shape when one operand does
186 * config/tc-arm.c (do_neon_ld_st_interleave): Reject bad
191 * cgen.c: Whitespace fixes.
192 (weak_operand_overflow_check): Formatting fix.
196 * config/tc-i386.c (match_template): Update error messages.
200 * config/tc-i386.c (_i386_insn): Add err_msg.
201 (operand_size_match): Set err_msg on failure.
202 (operand_type_match): Likewise.
203 (operand_type_register_match): Likewise.
204 (VEX_check_operands): Likewise.
205 (match_template): Likewise. Use i.err_msg with as_bad.
209 * config/tc-mips.c (mips_fix_loongson2f, mips_fix_loongson2f_nop,
210 mips_fix_loongson2f_jump): New variables.
211 (md_longopts): Add New options -mfix-loongson2f-nop/jump,
212 -mno-fix-loongson2f-nop/jump.
213 (md_parse_option): Initialize variables via above options.
214 (options): New enums for the above options.
215 (md_begin): Initialize nop_insn from LOONGSON2F_NOP_INSN.
216 (fix_loongson2f, fix_loongson2f_nop, fix_loongson2f_jump):
218 (append_insn): call fix_loongson2f().
219 (mips_handle_align): Replace the implicit nops.
220 * config/tc-mips.h (MAX_MEM_FOR_RS_ALIGN_CODE): Modified
221 for the new mips_handle_align().
222 * doc/c-mips.texi: Document the new options.
226 * config/tc-arm.c (do_rd_rm_rn): Added warning
232 * config/tc-avr.c (md_apply_fix): Handle BFD_RELOC_8.
233 (avr_cons_fix_new): Handle fixups of a single byte.
238 * config/tc-arm.c (CPU_DEFAULT): Do not define based upon build
239 compiler's predefines.
243 * configure.tgt: Whiltespace. Sort moxie entry.
247 * config/tc-arm.c (arm_convert_symbolic_attribute): Add Tag_DIV_use.
248 * doc/c-arm.texi: Likewise.
252 * config/tc-arm.c (asm_opcode): operands type
254 (BAD_PC_ADDRESSING): New macro message.
255 (BAD_PC_WRITEBACK): Likewise.
256 (MIX_ARM_THUMB_OPERANDS): New macro.
257 (operand_parse_code): Added enum values.
258 (parse_operands): Added thumb/arm distinction,
259 plus new enum values handling.
260 (encode_arm_addr_mode_2): Validations enhanced.
261 (encode_arm_addr_mode_3): Likewise.
262 (do_rm_rd_rn): Likewise.
263 (encode_thumb32_addr_mode): Likewise.
264 (do_t_ldrex): Likewise.
265 (do_t_ldst): Likewise.
266 (do_t_strex): Likewise.
267 (md_assemble): Call parse_operands with
275 (insns): Updated insns operands.
280 * config/tc-ia64.c (enum reloc_func): Add FUNC_SLOTCOUNT_RELOC.
281 (DUMMY_RELOC_IA64_SLOTCOUNT): Added.
282 (pseudo_func): Add an entry for slotcount.
283 (md_begin): Initialize slotcount pseudo symbol.
284 (ia64_parse_name): Handle @slotcount parameter.
285 (ia64_gen_real_reloc_type): Handle slotcount.
286 (md_apply_fix): Ditto.
287 * doc/c-ia64.texi (IA-64-Relocs): Document @slotcount.
291 * config/tc-xtensa.c (istack_init): Don't call memset.
295 * config/tc-xtensa.c (cache_literal_section): Handle prefixes as
300 * config/tc-xtensa.c (xtensa_find_unaligned_loops): Rewrite.
304 * config/tc-i386.c (build_modrm_byte): Reformat.
308 * config/tc-i386.c: Update copyright.
313 * config/tc-i386.c (vec_imm4) New operand type.
315 (VEX_check_operands): New.
316 (check_reverse): Call VEX_check_operands.
317 (build_modrm_byte): Reintroduce code for 5
318 operand insns. Fix whitespace.
322 * config/tc-ppc.c (md_show_usage): Add -mpwr4, -mpwr5, -mpwr5x,
327 * config/tc-xtensa.c (RELAXED_LOOP_INSN_BYTES): New.
328 (next_frag_pre_opcode_bytes): Use RELAXED_LOOP_INSN_BYTES.
329 (xtensa_mark_zcl_first_insns): Rewrite to handle corner case.
333 * config/tc-arm.c (md_pcrel_from_section): Keep base to zero for
334 non-local branches (BFD_RELOC_THUMB_PCREL_BRANCH23,
335 BFD_RELOC_THUMB_PCREL_BLX, BFD_RELOC_ARM_PCREL_BLX,
336 BFD_RELOC_ARM_PCREL_CALL)
340 * config/tc-xtensa.c (frag_format_size): Generalize logic to
341 handle more instruction sizes and fetch widths.
342 (branch_align_power): Likewise.
343 (text_align_power): Likewise.
344 (bytes_to_stretch): Likewise.
348 * config/tc-ppc.c (md_show_usage): Mention -mtitan. Don't use tabs.
349 (ppc_mach): Handle titan.
350 * doc/c-ppc.texi: Mention -mtitan.
354 * config/tc-xtensa.c (UNREACHABLE_MAX_WIDTH): Delete and
356 (xtensa_fetch_width) ...this.
360 * Makefile.am (CPU_TYPES, OBJ_FORMATS, CPU_OBJ_VALID,
361 MULTI_CPU_TYPES, MULTI_CPU_OBJ_VALID): Remove.
362 * Makefile.in: Regenerate.
366 * config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1.
367 (i386_align_code): Rename PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1.
368 * config/tc-i386.h (processor_type): Same.
369 * doc/c-i386.texi: Change amdfam15 to bdver1.
374 * config/tc-arm.c (neon_check_type): Handle a neon_shape value of
379 * NEWS: Mention new feature.
380 * config/obj-coff.c (obj_coff_section): Accept digits and use
381 to override default section alignment power if specified.
382 * doc/as.texinfo (.section directive): Update documentation.
386 * config/tc-i386.c (avxscalar): New.
387 (OPTION_MAVXSCALAR): Likewise.
388 (build_vex_prefix): Select vector_length for scalar instructions
390 (md_longopts): Add OPTION_MAVXSCALAR.
391 (md_parse_option): Handle OPTION_MAVXSCALAR.
392 (md_show_usage): Add -mavxscalar=.
394 * doc/c-i386.texi: Document -mavxscalar=.
398 * config/tc-i386.c (build_vex_prefix): Set i.vex.bytes[0] to
403 * write.h (fix_at_start): Declare.
404 * write.c (fix_new_internal): Add at_beginning parameter.
405 Use it instead of REVERSE_SORT_RELOCS. Fix the handling of
406 seg_fix_tailP for the at_beginning/REVERSE_SORT_RELOCS case.
407 (fix_new, fix_new_exp): Update accordingly.
408 (fix_at_start): New function.
409 * config/tc-ppc.c (md_pseudo_table): Add .ref to the OBJ_XCOFF section.
410 (ppc_ref): New function, for OBJ_XCOFF.
411 (md_apply_fix): Handle BFD_RELOC_NONE for OBJ_XCOFF.
412 * config/te-i386aix.h (REVERSE_SORT_RELOCS): Remove #undef.
416 * config/te-solaris.h (DWARF2_EH_FRAME_READ_ONLY): Make read-only
417 on 64-bit Solaris/x86.
418 Include obj-format.h earlier.
422 * config/tc-s390.c (s390_elf_final_processing): New function.
423 * config/tc-s390.h (elf_tc_final_processing): New macro definition.
424 (s390_elf_final_processing): Added prototype.
430 * config/tc-arm.c (do_neon_cvt): Rename to do_neon_cvt_1. Add
431 code to handle round-to-zero for VCVT conversions.
432 (do_neon_cvt): New. Call do_neon_cvt_1.
433 (do_neon_cvtr): New. Call do_neon_cvt_1.
434 (insns): Use do_neon_cvt for VCVT insn and do_neon_cvtr for VCVTR
439 * config/tc-ia64.c (ia64_vms_note): Generate 24 bytes note headers.
443 * config/tc-i386.c (md_assemble): Before accessing the IMM field
444 check that it's not an XOP insn.
448 * config/bfin-aux.h: Remove argument names in function
450 * config/bfin-lex.l (parse_int): Fix shadowed variable name
452 * config/bfin-parse.y (value_match): Remove argument names
454 (notethat): Likewise.
459 * config/tc-arm.c (do_t_nop): Correct check for Thumb-2 NOP.
463 * config/tc-h8300.c (h8300_elf_section): New function - issue a
464 warning message if a new section is created without setting any
466 (md_pseudo_table): Intercept section creation pseudos.
467 (md_pcrel_from): Replace abort with an error message.
468 * config/obj-elf.c (obj_elf_section_name): Export this function.
469 * config/obj-elf.h (obj_elf_section_name): Prototype.
474 * listing.c (print_source): Add one to line number.
478 * Makefile.in: Regenerate.
479 * configure: Regenerate.
480 * doc/Makefile.in: Regenerate.
484 * version.c (parse_args): Change to "Copyright 2010".
488 * config/tc-i386.c (cpu_arch): Add amdfam15.
489 (i386_align_code): Add PROCESSOR_AMDFAM15 cases.
490 * config/tc-i386.h (processor_type): Add PROCESSOR_AMDFAM15.
491 * doc/c-i386.texi: Add amdfam15.
495 * config/tc-arm.c (do_neon_logic): Accept imm value
496 in the third operand too.
497 (operand_parse_code): OP_RNDQ_IMVNb renamed to
499 (parse_operands): OP_NILO case removed, applied renaming.
500 (insns): Neon shape changed for some logic instructions.
504 * config/tc-arm.c (do_neon_ldx_stx): Added
505 validation for vector load/store insns.
509 * config/tc-ppc.c (md_show_usage): Document -me500mc64.
513 * config/tc-arm.c (struct arm_it): New flag 'is_neon'.
514 (NEON_ENC_*): Macros renamed to _NEON_ENC_*.
515 (NEON_ENCODE): New macro.
516 (check_neon_suffixes): New macro.
517 (do_vfp_cond_or_thumb): Set the 'is_neon' flag.
518 (do_vfp_nsyn_opcode): Likewise.
519 (do_vfp_nsyn_nmul): Use the new 'NEON_ENCODE' macro.
520 (do_vfp_nsyn_cmp): Likewise.
521 (do_neon_shl_imm): Likewise.
522 (do_neon_qshl_imm): Likewise.
523 (neon_dyadic_misc): Likewise.
524 (do_neon_mac_maybe_scalar): Likewise.
525 (do_neon_qdmulh): Likewise.
526 (do_neon_qmovn): Likewise.
527 (do_neon_qmovun): Likewise.
528 (do_neon_movn): Likewise.
529 (neon_mac_reg_scalar_long): Likewise.
530 (do_neon_vmull): Likewise.
531 (do_neon_trn): Likewise.
532 (do_neon_ldx_stx): Likewise.
533 (neon_dp_fixup): Changed signature and set the flag.
534 (neon_three_same): Call the above with new signature.
535 (neon_two_same): Likewise.
536 (neon_imm_shift): Likewise.
537 (neon_mul_mac): Likewise.
538 (do_neon_abs_neg): Likewise.
539 (neon_mixed_length): Likewise.
540 (do_neon_ext): Likewise.
541 (do_neon_mov): Likewise.
542 (do_neon_tbl_tbx): Likewise.
543 (do_neon_logic): Likewise, and use the new 'NEON_ENCODE' macro.
544 (neon_compare): Likewise.
545 (do_neon_shll): Likewise.
546 (do_neon_cvt): Likewise.
547 (do_neon_mvn): Likewise.
548 (do_neon_dup): Likewise.
549 (md_assemble): Call check_neon_suffixes ().
551 For older changes see ChangeLog-2009
557 version-control: never