4 * m10300-opc.c: Support 6 and 7 byte am33 instructions.
9 * m10200-dis.c (print_insn_mn10200): Recognize 'break' pseudo-op.
14 * m10300-opc.c: Support for 3 byte and 4 byte extended instructions
20 * i386-dis.c: Add support for fxsave, fxrstor, sysenter and
25 * mips-dis.c (print_insn_little_mips): Previously, instruction
26 printing references the symbol table to determine whether the
27 instruction resides in a block regular instructions or mips16
28 instructions. However, when the disassembler gets used in other
29 environments where the symbol table is not present, we no longer
30 rely in the symbol table, rather, use the low bit of the
31 instructions address to guess. There should be no change for usage
32 of the disassembler in host based programse, gdb ,objdump.
33 (print_insn_big_mips): ditto.
34 (print_insn_mips): ditto
38 * m10200-dis.c (print_insn_mn10200): Don't bomb on unknown opcodes.
43 * m10300-opc.c (USP, SSP, MSP, PC, IMM4, EPSW, RN0, RM1): New
44 operands for the am33.
45 (mn10300_opcodes): Add new instructions from the am33.
47 * m10300-opc.c (mn10300_opcodes): Change opcode for "syscall".
51 * i386-dis.c (index16): Add '%' to register names. Use ','
56 * i386-dis.c: Don't print opcode suffix when we can figure out the
57 size (and gas can!) by register operands, or from the default
59 (putop): Handle 'A', 'B', 'L', 'P', 'Q', 'R' macros. Rename 'C'
61 (dis386, dis386_twobyte, grps): Use new suffix macros.
62 (dis386): Correct imul Ib to imul sIb. Change jnl to jge to be
63 consistent. Add suffix for call, jmp, lcall, ljmp, iret. Reverse
64 order of cmps operands to agree with Intel docs. Correct operand
65 of aad and aam (Ib -> sIb). Change ud2b from 0fb8 to 0fb9 to
66 agree with Intel docs.
67 (print_insn_x86): Print orphan fwait before other prefixes.
68 Return correct byte count for orphan fwait with prefixes. Don't
69 print `bound' operands in reverse order.
70 (ckprefix): Stop accumulating prefixes if we get fwait.
71 (OP_DIR): Print `$' before Ap operands of ljmp, lcall.
75 * po/Make-in (all-yes): If maintainer mode, depend on .pot file.
76 ($(PACKAGE).pot): Unconditionally depend on POTFILES.
80 Fix problems when bfd_vma is wider than long.
81 * i386-dis.c: Make op_address and start_pc unsigned.
82 (set_op): Make parameter unsigned.
83 (print_insn_x86): Cast to bfd_vma when passing a value to
85 * ns32k-dis.c (CORE_ADDR): Don't define.
86 (print_insn_ns32k): Change type of addr to bfd_vma. Use
87 bfd_scan_vma to read back address.
88 (print_insn_arg): Change type of addr to bfd_vma. Use sprintf_vma
90 * m68k-dis.c (COERCE32): Cast to bfd_signed_vma to avoid overflow.
91 (NEXTULONG): New definition.
92 (print_insn_m68k): Avoid overflow when computing third argument of
94 (print_insn_arg): Use NEXTULONG to fetch 32 bit address values.
95 Use disp instead of val to store offset values.
96 (print_indexed): Use base_disp instead of word to store base
97 displacement, to avoid overflow.
98 * m10300-dis.c (disassemble): Cast value to long when computing
99 pc-relative address, to get correct sign extension.
103 * m32r-opc.c: Regenerate.
107 * arm-opc.h (thumb_opcodes): Display 'add rx, rY, #0' insns as
112 * d30v-opc.c: Remove FALG_MUL32 attribyte from MULX2H insn.
116 * i386-dis.c: Combine aflag and dflag into sizeflag. Change OP_*
118 (OP_DSreg): Rename from OP_DSSI.
119 (OP_ESreg): Rename from OP_ESDI.
120 (Xb, Xv, Yb, Yv): Use index reg code, not b_mode or v_mode.
122 (append_seg): Rename from append_prefix.
123 (ptr_reg): New function.
124 (dis386): Add S suffix to pushf, popf, ret, lret, enter, leave.
126 (PREFIX_ADDR): Rename from PREFIX_ADR.
127 (float_reg): Add non-broken opcodes for people who don't want
132 * m68k-opc.c (tstb, tstw, tstl): Don't allow pcrel on
137 * i386-dis.c (dis386): Change 0x60 to "pushaS", 0x61 to "popaS".
141 * ppc-opc.c (powerpc_macros): Support shifts and rotates of size
142 0; produce error message for shifts of size 32 (or 64 for 64-bit
143 shifts), because the hardware doesn't support them.
148 * mips-opc.c (c.lt.s): Remove r5900 specific variant.
151 * vu0.h (sqc2): Fix opcode.
153 * mips-opc.c (rsqrt.s): Update based on r5900 ISA manual version 2.1
157 start-sanitize-vr5400
160 * mips-opc.c (macc, maccu, macchi, macchiu, msac, msacu, msachi, msachiu):
161 Change pinfo to use WR_HILO.
167 * d30v-opc.c: Add new operand: Ra3. Change SHORT_B3, SHORT_B3b,
168 LONG_2, LONG_2b formats to use this new operand.
173 * sparc-dis.c (compute_arch_mask): Added bfd_mach_sparc_sparclite_le.
177 * sparc-dis.c (print_insn_sparc): big endian instruction / little
183 * d30v-opc.c (d30v_format_table): Change definition of SHORT_B3
184 and SHORT_B3b formats to use Rb instead of Ra.
186 Add FLAG_MUL16 to MUL2XH opcode.
188 Add FLAG_ADDSUBppp to SRC and SATHp opcodes to implement extension
189 to existing 1.1.1 parallelisation prohibition procedure.
194 * cgen-asm.in (insert_normal): Handle empty fields and 64 bit hosts.
195 * cgen-dis.in (extract_normal): Likewise.
196 * m32r-asm.c,m32r-dis.c: Regenerate.
201 * dvp-opc.c (parse_dotdest): Missing dest -> xyzw.
207 * mips-opc.c (multu1): Add two operand variant for the r5900.
212 * mips-dis.c (print_mips16_insn_arg): Handle type ']' correctly
213 with a shift count of 0.
218 * mips-opc.c (mult1): Add two-operand variety of mult1 for R5900.
222 * mips-dis.c (print_insn_arg): Handle ';' opcode completer.
223 (_print_insn_mips): Likewise.
224 * vu0.h (vopmula, vopmsub): Correctly handle opcode/operand
230 * cgen-opc.c (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
231 (cgen_hw_lookup_by_num): New function.
234 * m32r-opc.c, m32r-opc.h: Regenerate, delete h-abort.
239 * m32r-asm.c: Regenerate (handle uppercase HIGH/SHIGH/LOW/SDA).
243 * sparc-dis.c (print_insn_sparc): Always fetch instructions
244 as big-endian on SPARClite.
249 * m32r-opc.c: Regenerated - SPECIAL attribute added to some
251 * m32r-opc.h: Regenerated - SPECIAL attribute added to some
258 * d30v-opc.c (pre_defined_register): Remove alias for r0.
264 * mips-opc.c (break): Added 20-bit single-operand break
265 instruction for R5900 only.
270 * po/Make-in (install-info): New target.
274 * configure.in (WIN32LIBADD): Add -lintl on cygwin32.
275 * configure: Rebuild.
279 * mips-opc.c (teq,tge,tgeu,tlt,tltu,tne): Added three-operand
280 variety of ISA2 instructions to set bottom ten bits of trap code.
284 * Makefile.am (config.status): Add explicit target so that
285 config.status depends upon bfd/configure.in.
286 * Makefile.in: Rebuild.
290 * mips-opc.c (break, sdbbp): Added two-operand variety of ISA1
291 instructions to set bottom ten bits of break code.
292 * mips-dis.c (print_insn_arg): Implement 'q' operand format used
293 for above optional argument.
295 start-sanitize-cygnus
298 * cgen.sh: s/@ARCH@/${ARCH}/ in opc.h generation.
299 * m32r-opc.h: Regenerate.
304 * makefile.vms: Run dec c with /nodebug.
308 * Makefile.in: Rebuilt.
309 * Makefile.am: Regenerated dependencies with mkdep.
311 * opintl.h (_): Define as dgettext.
313 start-sanitize-cygnus
316 * configure.in: Add support for --enable-cgen-maint.
317 * Makefile.am (M32R_DEPS): New variable.
318 (m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c): Update dependencies.
319 * aclocal.m4: Regenerate.
320 * Makefile.in: Regenerate.
321 * configure: Regenerate.
323 * Makefile.am (CGENFILES): Add minsn.scm.
328 * cgen-asm.c: Internationalised.
329 start-sanitize-cygnus
330 * cgen-asm.in: Internationalised.
331 * cgen-opc.in: Internationalised.
333 * m32r-asm.c: Internationalised.
334 * m32r-dis.c: Internationalised.
335 * m32r-opc.c: Internationalised.
337 * aclocal.m4: Regenerated.
338 * configure: Regenerated.
339 * Makefile.am (POTFILES): Remove inclusion of BFD_H.
340 * Makefile.in: Rebuild.
341 * po/POTFILES.in: Rebuilt using rule in Makefile.in.
342 * po/opcodes.pot: Rebuilt after changing POTFILES.in.
346 * configure.in: Call AC_ISC_POSIX near start. Move CY_GNU_GETTEXT
348 * aclocal.m4, configure: Rebuild with current tools.
352 * opintl.h: New file - contains internationalisation macros used
353 by source files in this directory.
354 * po/: New subdirectory - contains internationalisation files.
355 * po/Make-in: New file - Makefile constructor.
356 * po/POTFILES.in: New file - list of files in opcodes directory
357 that should be scan for internationalisation macros.
358 * po/opcodes.pot: New file - list of internationisation strings
359 found in files mentioned in po/POTFILES.in.
360 * Makefile.am: Add rule to build po/POTFILES.in. Add SUBDIRS
361 entry. Add intl directory to include paths.
362 * acconfig.h: Add ENABLE_NLS, HAVE_CATGETS, HAVE_GETEXT,
363 HAVE_STRCPY, HAVE_LC_MESSAGES
364 * configure.in: Add rule to build Makefile in po subdirectory.
365 * Makefile.in: Rebuilt.
366 * aclocal.m4: Rebuilt.
367 * config.in: Rebuilt.
368 * configure: Rebuilt.
369 * alpha-opc.c: Internationalised.
370 * arc-dis.c: Internationalised.
371 * arc-opc.c: Internationalised.
372 * arm-dis.c: Internationalised.
373 * cgen-asm.c: Internationalised.
375 * d30v-dis.c: Internationalised.
377 * dis-buf.c: Internationalised.
379 * dvp-dis.c: Internationalised.
380 * dvp-opc.c: Internationalised.
382 * h8300-dis.c: Internationalised.
383 * h8500-dis.c: Internationalised.
384 * i386-dis.c: Internationalised.
385 * m10200-dis.c: Internationalised.
386 * m10300-dis.c: Internationalised.
387 * m68k-dis.c: Internationalised.
388 * m88k-dis.c: Internationalised.
389 * mips-dis.c: Internationalised.
390 * ns32k-dis.c: Internationalised.
391 * opintl.h: Internationalised.
392 * ppc-opc.c: Internationalised.
393 * sparc-dis.c: Internationalised.
394 * v850-dis.c: Internationalised.
395 * v850-opc.c: Internationalised.
399 * cgen-asm.c (cgen_current_opcode_table): Renamed from ..._data.
400 (asm_hash_table_entries): New variable.
401 (cgen_asm_init): Free asm_hash_table_entries.
402 (hash_insn_array,hash_insn_list): New functions.
403 (build_asm_hash_table): Use them. Hash macro insns as well.
404 (cgen_asm_lookup_insn): Update.
405 * cgen_dis.c (cgen_current_opcode_table): Renamed from ..._data.
406 (dis_hash_table_entries): New variable.
407 (cgen_dis_init): Free dis_hash_table_entries.
408 (hash_insn_array,hash_insn_list): New functions.
409 (build_dis_hash_table): Use them. Hash macro insns as well.
410 (cgen_dis_lookup_insn): Update.
411 * cgen-opc.c (cgen_current_opcode_table): Renamed from ..._data.
412 (cgen_set_cpu,cgen_hw_lookup,cgen_insn_count): Update.
413 (cgen_macro_insn_count): New function.
414 * cgen-opc.in (@arch@_cgen_lookup_insn): New arg alias_p.
415 All callers updated. Sanity check result of extract fn.
416 (@arch@_cgen_get_insn_operands): Change result type to void.
417 Delete args insn_value, length. New arg fields. All callers updated.
418 (@arch@_cgen_lookup_get_insn_operands): New function.
419 * m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate.
423 * i386-dis.c (OP_DSSI): Print segment override.
428 * mips-opc.c (msub.s): Correct mask pattern for disassembly.
434 * mips-opc.c (madd.s): Correct mask pattern for disassembly.
440 * vu0.h (vlqd, vlqi): Update per revised specs.
446 * dvp-opc.c (parse_vif_unpackloc,insert_vif_unpackloc): Delete.
447 (vif_operands): Update.
448 (vif_get_unpackloc): Delete.
449 (state_vif_unpackloc{,_star_p}): Delete.
450 (dvp_opcode_init_parse): Update.
451 (vif_unpack_len_value): Avoid divide by zero.
457 * vu0.h: Specs changed for VCALLMSR bit pattern.
458 * mips-dis.c: (print_insn_arg) Matching change.
463 * arm-dis.c (print_insn_arm): Add "_all" extension to 'C'
468 * Makefile.am (libopcodes_la_LIBADD): Add @WIN32LIBADD@.
469 (libopcodes_la_LDFLAGS): Add @WIN32LDFLAGS@.
470 * configure.in: Define and substitute WIN32LDFLAGS and
472 * aclocal.m4: Rebuild with new libtool.
473 * configure, Makefile.in: Rebuild.
478 * vu0.h: Corrected bit pattern for VMAXI opcode.
483 * m32r-opc.c: Regenerate.
488 * dvp-opc.c (vif_macros): Tweak unpackloc operand.
489 (dvp_expand_macro): Implement.
490 (insert_vif_datalen): Record value with max+1 -> 0 conversion.
491 (vif_unpack_len): Perform 0 -> max+1 conversion on `wl' value.
496 * Makefile.am (stamp-lib): Check that .libs/libopcodes.a exists
497 before trying to copy it.
498 * Makefile.in: Rebuild.
502 * m32r-opc.c: Use signed immediate values for CMPUI instruction.
507 * m32r-opc.c: Fix bit patterns for SAT and SATB.
512 * ns32k-dis.c (bit_extract_simple): New function to extract bits
513 from an arbitrary valid buffer instead of fetching them on demand
515 (invalid_float): use bit_extract_simple() instead of bit_extract().
520 * m32r-opc.c: Fix SATB bit pattern. Add extra control registers.
521 * m32r-opc.h: Add extra control registers.
527 * i386-dis.c (dis386): Change 0x8c and 0x8e to movS, and change Ew
532 * Branched binutils 2.9.
537 * d30v-dis.c (print_insn_d30v): Don't use uninitialized "num" when
538 disassembling last 4 bytes of a section.
543 Fix some gcc -Wall warnings:
544 * arc-dis.c (print_insn): Add casts to avoid warnings.
545 * cgen-opc.c (cgen_keyword_lookup_name): Likewise.
546 * d10v-dis.c (dis_long, dis_2_short): Likewise.
548 * dvp-opc.c (issymchar, SKIP_BLANKS): Likewise.
549 (parse_dotdest, parse_dotdest1, u_parse_sdest): Likewise.
550 (parse_bc, parse_vfreg, parse_accdest): Likewise.
551 (parse_ffstreg, parse_vif_mode): Likewise.
553 * m10200-dis.c (disassemble): Likewise.
554 * m10300-dis.c (disassemble): Likewise.
555 * ns32k-dis.c (print_insn_ns32k): Likewise.
556 * ppc-opc.c (insert_ral, insert_ram): Likewise.
557 * cgen-dis.c (build_dis_hash_table): Remove used local variables.
558 * cgen-opc.c (cgen_keyword_search_next): Likewise.
559 * d10v-dis.c (dis_long, dis_2_short): Likewise.
561 * d30v-dis.c (print_insn_d30v, lookup_opcode): Likewise.
564 * dvp-dis.c (print_dma, print_vif, print_gif): Likewise.
565 * dvp-opc.c (parse_dest1, print_uflags): Likewise.
566 (parse_gif_nloop, dvp_opcode_init_tables): Likewise.
568 * ns32k-dis.c (bit_extract, print_insn_ns32k): Likewise.
570 * tic80-dis.c (print_one_instruction): Likewise.
572 * w65-dis.c (print_operand): Likewise.
573 * z8k-dis.c (fetch_data): Likewise.
574 * a29k-dis.c: Add return type for find_byte_func_type.
575 * arc-opc.c: Include <stdio.h>. Remove declarations of
576 insert_multshift and extract_multshift.
578 * d30v-dis.c (lookup_opcode): Parenthesize assignments in
580 (extract_value): Fully parenthesize expression.
583 * dvp-opc.c: Include <ctype.h>.
584 (print_sdest): Add default case to switch.
586 * h8500-dis.c (print_insn_h8500): Initialize local variables.
587 * h8500-opc.h (h8500_table): Fully bracket initializer.
588 * w65-opc.h (optable): Likewise.
589 * i386-dis.c (print_insn_x86): Declare aflag and flag parameters.
590 * i386-dis.c (OP_E): Initialize local variables.
591 * m10200-dis.c (print_insn_mn10200): Likewise.
592 * mips-dis.c (print_insn_mips16): Likewise.
593 * sh-dis.c (print_insn_shx): Likewise.
594 * v850-dis.c (print_insn_v850): Likewise.
595 * ns32k-dis.c (print_insn_arg): Declare.
596 (get_displacement, invalid_float): Declare.
597 (list_search, sign_extend, flip_bytes): Declare return type.
598 (get_displacement): Likewise.
599 (print_insn_arg): Likewise. Make d int. Fix sprintf format
601 (print_insn_ns32k): Make i unsigned.
602 (invalid_float): Make static. Declare type of val.
603 * tic30-dis.c (print_par_insn): Make i size_t. Don't check strlen
604 on each for iteration.
605 * tic30-dis.c (get_indirect_operand): Likewise.
606 * z8k-dis.c (print_insn_z8001): Declare return type.
607 (print_insn_z8002): Likewise.
608 (unparse_instr): Fix sprintf format strings.
612 * mips-opc.c: Add "sync.l" and "sync.p".
617 * dvp-opc.c (extract_vif_datalen): Rewrite.
618 (vif_insn_len): Perform 0->max+1 conversion for direct length.
622 * dvp-dis.c (print_insn): Print unpack address in hex.
623 * dvp-opc.c (parse_vif_mpgloc): Renamed from parse_vif_mpgloc_star.
624 Don't skip over '*', just record it.
625 (insert_vif_mpgloc): Don't update state_vif_mpgloc if '*' value.
626 (parse_vif_unpackloc): Renamed from parse_vif_unpackloc_star.
627 Don't skip over '*', just record it.
628 (insert_vif_unpackloc): Don't update state_vif_unpackloc if '*' value.
629 (vif_operands): Delete VIF_MPGLOC_STAR,VIF_UNPACKLOC_STAR entries.
630 (vif_opcodes): Likewise.
631 (state_vif_{mpg,unpack}loc_star_p): New static locals.
632 (vif_macros,vif_macro_count): New globals.
633 (vif_unpack_len_value): New arguments wl,cl. All callers updated.
634 (vif_set_{mpg,unpack}loc): Delete. All callers updated.
635 (vif_get_wl_cl): New function.
636 (dvp_opcode_init_parse): Init mpgloc,unpackloc state.
641 * m68k-dis.c (print_insn_m68k): Use info->mach to select the
642 default m68k variant to recognize.
644 * i960-dis.c (pinsn): Change type of first argument to bfd_vma.
645 (ctrl, cobr, mem, ea): Likewise.
646 (print_addr): Likewise. Remove cast.
647 (ea): Cast argument of print_addr to bfd_vma.
649 * cgen-asm.c (cgen_parse_signed_integer): Fix type of local
651 (cgen_parse_unsigned_integer): Likewise.
652 (cgen_parse_address): Likewise.
656 * i960-dis.c (ctrl): Add full braces to structure initialization.
657 (cobr, mem, reg): Likewise.
658 (ea): Correct parenthesization in expression.
660 * cgen-asm.c: Include <ctype.h>.
661 (build_asm_hash_table): Remove unused local variable i.
662 (cgen_parse_keyword): Add casts to avoid warnings.
664 * arm-dis.c (print_insn_big_arm): Only call coffsymbol for a COFF
665 symbol. Fix indentation.
666 (print_insn_little_arm): Likewise.
671 * vu0.h (cfc2, ctc2): Add variants with ".i" and ".ni"
678 * m32r-opc.c (m32r_cgen_insn_table_entries): Fix SATH bit pattern
685 * dvp-opc.c (vif_operand_datalen_special): New global.
691 * vu0.h (vcallms): Use 'O' for call target operand.
692 * mips-dis.c (print_insn_arg): Handle 'O'.
697 * configure.in: Use AM_DISABLE_SHARED.
698 * aclocal.m4, configure: Rebuild with libtool 1.2.
703 * mips-dis.c: Change '%' to '#' in r5900 support.
709 These patches are courtesy of Jonathan Walton and Tony Thompson
712 * arm-dis.c (print_insn_thumb): Ignore bottom two bits of PC
715 * arm-opc.h (thumb_opcodes): Annotate PC relative addresses with
716 both the offset and the label closest to the destination.
721 * vu0.h: New file with cop2/vu0 instructions.
722 * mips-opc.c: Include vu0.h.
723 * mips-dis.c (print_insn_arg): Handle new args 0-9, +, -, %, K, &,
725 (print_insn_mips): Do not emit a tab after an instruction if the
726 first arg is an instruction completer (&). If the next arg is an
727 escape character (%), then print the next arg verbatim.
728 * Makefile.am (mips-opc.lo): Depend on vu0.h
734 * dvp-opc.c (vif_opcodes): Add stcycl.
738 * dvp-dis.c (print_dma): Change length from 16 to 8.
743 * m32r-opc.h: Regenerate.
748 * dvp-opc.c (print_dest1): Print dest spec again.
749 (print_vfreg,print_accdest): Likewise.
750 (vif_unpack_len): Round result up to word boundary.
753 start-sanitize-vr4320
756 * mips-opc.c ("clz","dclz"): Added the 4320 versions.
760 * mips-opc.c ("macc*","mul*"): Added the 4320 versions
767 * dvp-dis.c (print_gif): Fix length calcs for gifimage.
768 (print_insn): Do mask comparison on proper opcode word.
769 Print unsigned values in hex.
770 * dvp-opc.c (u_parse_sdest): Return -1 if dest missing.
771 (parse_bc): Catch missing dest.
772 (parse_vfreg): Replace atoi call with strtol.
773 (parse_{bcftreg,ffstreg,freg,ireg,vi01,gif_prim,gif_nloop}): Likewise.
774 (parse_bcftreg,parse_ffstreg): Handle missing dest.
775 (extract_gif_eop): New function.
776 (gif_operands): Update eop entry.
777 (VGIFOP,VGIFNREGS): Fix calcs.
778 (extract_gif_prim): Set *pinvalid to 1 if prim not used.
779 (gif_regs): Add entry for unused 11 case.
780 (print_gif_regs): Print empty list instead of nothing.
781 (extract_gif_nloop): Fix value calc.
782 (print_gif_nloop): Always print value, even if 0.
783 (insert_vif_wlcl,extract_vif_wlcl): New functions.
784 (vif_operands): Use them for wl,cl fields.
785 (state_vif_wl,state_vif_cl): New static locals.
786 (parse_vif_mode): Handle numeric args.
787 (vif_unpack_len_value,vif_unpack_len): New functions.
788 (vif_insn_len): Call vif_unpack_len.
793 * m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate.
797 * cgen-asm.in: Move insertion of generated routines to top of file.
798 (insert_normal): Add prototype. Delete `shift' arg.
799 * cgen-dis.in: Move insertion of generated routines to top of file.
800 (extract_normal): Add prototype. Delete `shift' arg.
801 (print_normal): Add prototype. Call CGEN_PRINT_NORMAL if defined.
802 (print_keyword): Add prototype. Fix type of `attrs' arg.
804 start-sanitize-vr4320
807 * mips-dis.c (_print_insn_mips) : Handle bfd_mach_mips4320.
808 * mips-opc.c ("mac","dmac") : Added 4320 insns.
813 * arm-dis.c (print_insn_big_arm, print_insn_little_arm): Do not
814 assume that info->symbols is non-empty.
818 * alpha-opc.c (cvtqs) There is no such thing.
819 (cvttq): Missing most of the /*d variants.
824 * mips-opc.c (r5900/madd.s): Takes three operands, not four. Fix
826 (r5900/min.s): Incorrect opcode ....,101001 not ...110000.
827 (r5900/msub.s): Takes three operands, not four. Fix opcode.
833 * d30v-opc.c (d30v_opcode_table): Indicate which instructions are
834 delayed branches or jumps.
840 * dvp-opc.c (vif_operands): Add unpack[u] support.
841 (vif_opcodes): Ditto.
842 (*_vif_imrubits): Renamed from *_vif_imrbits.
846 * dvp-dis.c (print_insn): Handle word number.
847 Handle mips address vs vu address.
848 * dvp-opc.c (vif_operands): Use DVP_OPERAND_VU_ADDRESS.
849 (dma_operands): Use DVP_OPERAND_MIPS_ADDRESS.
850 ({insert,extract}_dma_addr): Fix word ofset.
851 ({insert,print}_gif_regs): Fix encode/decode.
856 * arm-dis.c (print_insn_{big,little}_arm): info->symbol changed
858 * mips-dis.c (print_insn_{big,little}_mips): Likewise.
859 * tic30-dis.c (print_branch): Likewise.
861 * mips-dis.c (print_insn_little_mips): Call dvp_info_mach_type.
862 * dvp-dis.c (dvp_info_mach_type): New function.
863 (print_insn_dvp): Call it.
864 (print_vif): Return length of 4 if mpg or direct insn so following
865 insns get properly disabled.
866 (print_gif): Fix word order.
867 * dvp-opc.c (vif_insn_len): New argument `pcpu'. All callers updated.
868 (gif_operands): Fix word order.
869 (gif_opcodes): Likewise.
870 ({insert,extract,print}_gif_regs): Likewise.
871 (gif_regs): Add new register number/name changes.
872 (dma_opcodes): Add dmarefe insn.
877 * arm-dis.c (print_insn_big_arm, print_insn_little_arm): Remove
878 saved_symbol code as it is no longer needed.
882 * cgen-asm.c: Include symcat.h.
883 * cgen-dis.c,cgen-opc.c,cgen-asm.in,cgen-dis.in: Ditto.
885 * m32r-asm.c,m32r-dis.c,m32r-opc.h,m32r-opc.c: Regenerate.
890 * dvp-opc.c (extra_dma_flags): Fix typos.
891 (dma_operands): Fix word numbers.
892 (dma_opcodes): Likewise.
893 ({insert,extract}_dma_flags): Likewise.
898 * mips-dis.c (print_insn_arg): Do not prefix 'P' arguments with '$'.
903 * dvp-dis.c (print_gif): Complete.
904 * dvp-opc.c (gif_operands,gif_opcodes): Complete.
905 (state_gif_{nregs,regs,nloop}): New static locals.
907 (dvp_opcode_init_{parse,print}): Init gif state locals.
908 (extract_vif_datalen,{insert,extract}_vif_imrbits): New functions.
909 (vif_insn_len): Handle `unpack'.
910 ({insert,extract}_dma_flags): Complete.
916 * mips-opc.c (mula.s): Renamed from multa.s.
921 * m32r-opc.[ch]: Regenerate.
926 * dvp-opc.c (dma_operands): Rewrite.
927 (dma_operand_{count,addr}): New globals.
928 (dma_opcodes): Rewrite. Add "dmaend" with no operands.
929 (insert_dma_addr): Insert value into insn.
930 (extract_dma_addr): Extract value from insn.
934 * dvp-dis.c (print_vu): Handle loi insns.
935 (print_insn): Likewise.
936 * dvp-opc.c (vu_lower_opcodes): Add "loi".
937 (vu_operands): Make LDEST1 a FAKE operand.
938 (parse_dest1): Allow elided argument.
939 (print_dest1): Don't print the argument.
943 * dvp-opc.c (parse_vfreg): Dest spec is optional.
944 (print_vfreg): Don't print dest spec.
945 (parse_accdest): Dest spec is optional.
946 (print_accdest): Don't print dest spec.
951 * Makefile.am (CGENFILES): Update.
952 * Makefile.in: Regenerate.
953 * cgen-asm.in (insert_normal): Result is error message now.
954 Validate value to be inserted.
955 (insert_insn_normal): Result is error message now.
956 (@arch@_cgen_assemble_insn): Update.
957 * cgen-asm.c (cgen_parse_{signed,unsigned}_integer): Delete min,max
958 arguments. Don't perform validation here.
959 * m32r-asm.c,m32r-dis.c,m32r-opc.c: Regenerate.
963 * cgen-opc.in (@arch@_cgen_get_insn_operands): Handle empty
964 operand instance list.
965 * m32r-opc.c: Regenerate.
969 * Makefile.am (AUTOMAKE_OPTIONS): Define.
970 * configure, Makefile.in, aclocal.m4: Rebuild with automake 1.2e.
974 * m10300-dis.c (print_insn_mn10300): Recognize break instruction.
978 * configure.in: Get the version number from BFD.
979 * configure: Rebuild.
982 * Makefile.am (libopcodes_la_LDFLAGS): Define.
983 * Makefile.in: Rebuild.
987 * m32r-opc.c: Regenerate.
988 * m32r-opc.h: Regenerate.
992 * cgen-opc.in (@arch@_cgen_lookup_insn): New argument alias_p.
993 Ignore ALIAS insns if asked to.
994 (@arch@_cgen_get_insn_operands): Pass 0 for alias_p, NULL for insn.
995 * m32r-opc.c: Regenerate.
998 * dvp.opc.c: Nicely format opcode tables.
999 (vu_operands): New element UFLAGS.
1000 (parse_uflags,print_uflags): New functions.
1001 (vu_upper_opcodes): Add UFLAGS to all insns.
1006 Fix rac to accept only a0:
1007 * d10v-opc.c (d10v_predefined_registers, d10v_operands, d10v_opcodes):
1008 Split OPERAND_ACC into OPERAND_ACC0 and OPERAND_ACC1.
1009 Introduce OPERAND_GPR.
1010 * d10v-dis.c (print_operand): Likewise.
1014 * cgen-opc.in: New file.
1016 * Makefile.am (CGENFILES): Add cgen-opc.in.
1017 * Makefile.in: Regenerate.
1019 * cgen-opc.c (cgen_set_cpu): Delete init of hw list `next' chain.
1020 (cgen_hw_lookup): Make result const.
1022 * cgen-dis.in (*): Use PTR instead of void *.
1023 (print_insn): Delete unused vars `i', `syntax'.
1025 * m32r-opc.h, m32r-opc.c, m32r-asm.c, m32r-dis.c: Regenerate.
1030 * dvp-opc.c (*): pke,gpuif renamed to vif,gif.
1031 (vif_opcodes): Update renamed insns.
1032 * dvp-dis.c (*): Likewise.
1037 * configure, aclocal.m4: Rebuild with new libtool.
1042 * d30v-opc.c (repeat{,i} instructions): Repeat/repeati
1043 instructions use a PC relative branch, not absolute.
1048 * configure.in: Set libtool_enable_shared rather than
1049 libtool_shared. Remove diversion hack.
1050 * configure, Makefile.in, aclocal.m4: Rebuild with new libtool.
1054 * cgen-opc.c (cgen_set_cpu): Initialize hardware table.
1055 * m32r-opc.h, m32r-opc.c, m32r-asm.c, m32r-dis.c: Regenerate.
1059 * tic30-dis.c: New file.
1060 * disassemble.c (disassembler): Add bfd_arch_tic30 case.
1061 * configure.in: Handle bfd_tic30_arch.
1062 * Makefile.am: Rebuild dependencies.
1063 (CFILES): Add tic30-dis.c
1064 (ALL_MACHINES): Add tic30-dis.lo.
1065 * configure, Makefile.in: Rebuild.
1067 start-sanitize-m32rx
1070 * m32r-opc.c, m32r-opc.h, m32r-asm.c m32r-dis.c: Newly generated
1071 versions after updates to m32r.cpu to remove mulwhi-a, mulwlo-a,
1072 macwhi-a and macwlo-a instructions.
1078 * dvp-opc.c, fixed encoding of a bunch of instructions to
1079 be consistent with the asmvu assembler (and inconsistent
1080 with the specification).
1084 * dvp-opc.c, fixed order of pkemscal/pkemscalf instructions
1085 in the opcode table. The pkemscalf instruction must come first.
1089 * dvp-opc.c, MAXIi should be VUOP6(0x1d) instead of 0x2d.
1094 * m32r-opc.h (HAVE_CPU_M32R): Define.
1099 * dvp-dis.c, dvp-opc.c: New files.
1100 * configure.in: Compile them if bfd_dvp_arch, as well as mips.
1101 * configure: Regenerate.
1102 * Makefile.am (ALL_MACHINES): Add dvp-{dis,opc}.lo.
1103 (dvp-dis.lo,dvp-opc.lo): Add rules for.
1104 (mips-dis.lo): Compile with @archdefs@.
1105 * Makefile.in: Regenerate.
1106 * disassemble.c: Define ARCH_mips ifdef ARCH_dvp.
1107 * mips-dis.c (print_insn_little_mips): Check for DVP insns.
1112 * v850-opc.c (insertion routines): If both alignment and size is
1113 wrong then report this.
1117 * mips-dis.c (_print_insn_mips): Set target_processor as appropriate.
1118 Only recognize instructions for the current target_processor.
1122 * d10v-dis.c (PC_MASK): Correct value.
1123 (print_operand): If there's a reloc, don't calculate the
1124 address because they could be in different sections.
1126 start-sanitize-cygnus
1129 * cgen.sh: Rewrite to be like simulator's version.
1130 * Makefile.am (cgen): Update call to cgen.sh.
1131 * Makefile.in: Regenerate
1136 * mips-opc.c (mips_builtin_opcodes): Move 4010's "addciu"
1137 instruction after the 4650's "mul" instruction; nobody's using the
1138 4010 these days. If object files someday indicate which processor
1139 variant they're intended for, we can do a better job at this.
1141 start-sanitize-r5900
1144 * mips-opc.c (c.lt.s): Add r5900 variant.
1150 * cgen-asm.c (build_asm_hash_table): Traverse compiled in table using
1151 table provided entry size. Use CGEN_INSN_MNEMONIC.
1152 (cgen_parse_keyword): Rewrite.
1153 * cgen-dis.c (build_dis_hash_table): Traverse compiled in table using
1154 table provided entry size. Use CGEN_INSN_MASK_BITSIZE.
1155 * cgen-opc.c: Clean up pass over `struct foo' usage.
1156 (cgen_keyword_lookup_value): Handle "" entry.
1157 (cgen_keyword_add): Likewise.
1158 start-sanitize-cygnus
1159 * Makefile.am: Add cgen support.
1160 * Makefile.in: Regenerate.
1161 * configure.in: Add cgen support.
1162 * configure: Regenerate.
1163 * aclocal.m4: Regenerate.
1164 * cgen.sh, cgen-asm.in, cgen-dis.in: New files.
1169 * mips-opc.c: Add FP_D to s.d instruction flags.
1173 * m68k-opc.c (halt, pulse): Enable them on the 68060.
1175 start-sanitize-tic80
1178 * tic80-opc.c (tic80_opcodes): Revert change that put the 32 bit
1179 PC relative offset forms before the 15 bit forms. An assembler command
1180 line option now chooses the default.
1183 start-sanitize-r5900
1186 * mips-opc.c: Add many missing r5900 instructions.
1192 * d30v-opc.c (d30v_opcode_table): Set new flags bits
1193 FLAG_{2WORD,MUL{16,32},ADDSUBppp}, in appropriate instructions.
1198 * configure: Only build libopcodes shared if --enable-shared's value
1199 was `yes', or was set to `*opcodes*'.
1200 * aclocal.m4: Likewise.
1201 * NOTE: this really needs to be fixed in libtool/libtool.m4, the
1202 original source of this bit of code. It's not clear what the best fix
1205 start-sanitize-r5900
1208 * mips-opc.c (mtpc, mfpc, mtps, mfps): Add r5900 variants.
1210 start-sanitize-tic80
1213 * tic80-opc.c (OFF_SL_PC, OFF_SL_BR): Minor formatting change.
1214 (tic80_opcodes): Reorder table entries to put the 32 bit PC relative
1215 offset forms before the 15 bit forms, to default to the long forms.
1220 * alpha-opc.c (cvttq/*u*): Remove, as that suffix is invalid.
1224 * arm-dis.c (print_insn_little_arm): Prevent examination of stored
1225 symbol if none is present.
1226 (print_insn_big_arm): Prevent examination of stored symbol if
1231 * d10v-opc.c (d10v_opcodes): Correct entry for RTE.
1235 * disassemble.c: Remove disasm_symaddr() function.
1237 * arm-dis.c: Use info->symbol instead of info->flags to determine
1238 if disassmbly should be in Thumb or Arm mode.
1242 * arm-dis.c: Add support for disassembling Thumb opcodes.
1243 (print_insn_thumb): New function.
1245 * disassemble.c (disasm_symaddr): New function.
1247 * arm-opc.h: Display nop pseudo ops alongside equivalent disassembly.
1248 (thumb_opcodes): Table of Thumb opcodes.
1252 * m68k-opc.c (btst): Change Dd@s to Dd;b.
1254 * m68k-dis.c (print_insn_arg): Recognize 'm', 'n', 'o', 'p', 'q',
1255 and 'v' as operand types.
1259 * m68k-opc.c: Add argument for lpstop. From Olivier Carmona
1261 * m68k-dis.c (print_insn_m68k): Handle special case of lpstop,
1262 which has a two word opcode with a one word argument.
1267 * d30v-opc.c (d30v_opcode_table, case cmpu): Immediate field is
1268 unsigned, not signed.
1269 (d30v_format_table): Add SHORT_CMPU cases for cmpu.
1274 * sh-dis.c (print_insn_shx): Recognize all sh4 additions.
1275 * sh-opc.h (fmov): Add @<REG_M>+,<DX_REG_N> variant for sh4.
1276 (ftrv): Slay the cut-and-paste monster.
1280 * d10v-dis.c (print_operand):
1281 Split OPERAND_FLAG into OPERAND_FFLAG and OPERAND_CFLAG.
1285 * d10v-opc.c (OPERAND_FLAG): Split into:
1286 (OPERAND_FFLAG, OPERAND_CFLAG) .
1292 * mips-opc.c: Move the INSN_MACRO ISA value to the membership
1293 field for all INSN_MACRO's.
1294 * mips16-opc.c: same
1298 * mips-opc.c (sync,cache): These are 3900 insns.
1302 sh-opc.h (sh_table): Remove ftst/nan.
1304 start-sanitize-vr5400
1307 * mips-opc.c (dror32, dror, rzu.ob): Fix bugs in encoding.
1308 (c.*.ob, mula.ob, mull.ob, muls.ob, mulsl.ob): Put 'k' version
1310 * mips-dis.c (print_insn_arg): Handle VR5400 operand types.
1316 * mips-opc.c (deret,dmult,dmultu,madd,maddu,pref,sdbbp):
1317 Add tx49 insns and configury.
1322 * mips-opc.c (ffc, ffs): Fix mask.
1327 * d30v-opc.c (pre_defined_registers): Add eit_vb, int_s, and int_m
1333 * mips-opc.c: Fix bug in mask for "not" pseudo-instruction.
1334 start-sanitize-vr5400
1335 Added VR5400 instructions.
1336 (N5): New cpu-id macro.
1338 (WR_HILO, RD_HILO, MOD_HILO): New macros.
1342 * mips-opc.c: Fix bug in mask for "not" pseudo-instruction.
1343 (WR_HILO, RD_HILO, MOD_HILO): New macros.
1347 * v850-dis.c (disassemble): Replace // with /* ... */
1351 * sparc-opc.c: Add wr & rd for v9a asr's.
1352 * sparc-dis.c (print_insn_sparc): Recognize '_' and '/' for v9a asr's.
1353 (v9a_asr_reg_names): New variable.
1358 * sparc-opc.c (v9notv9a): New insn type.
1359 (IMPDEP): Move to the end to not conflict with edge8 et al.
1364 * mips-opc.c (bnezl,beqzl): Mark these as also tx39.
1368 * mips-opc.c: Note that 'jalx' is (probably incorrectly) marked I1.
1372 * v850-dis.c (disassemble): Use new symbol_at_address_func() field
1373 of disassemble_info structure to determine if an overlay address
1374 has a matching symbol in low memory.
1376 * dis-buf.c (generic_symbol_at_address): New (dummy) function for
1377 new symbol_at_address_func field in disassemble_info structure.
1381 * v850-opc.c (extract_d22): Use signed arithmatic.
1385 * mips-opc.c: Three op mult is not an ISA insn.
1389 * mips-opc.c: Fix formatting.
1393 * i386-dis.c (OP_E): Explicitly sign extend 8 bit values, rather
1394 than assuming that char is signed. Explicitly sign extend 16 bit
1395 values, rather than assuming that short is 16 bits.
1396 (OP_sI, OP_J, OP_DIR): Likewise.
1398 start-sanitize-v850e
1401 * v850-dis.c (v850_sreg_names): Use symbolic names for higher
1407 * v850-opc.c: Fix typo in comment.
1409 * v850-dis.c (disassemble): Add test of processor type when
1410 determining opcodes.
1414 * configure.in: Use a diversion to set enable_shared before the
1415 arguments are parsed.
1416 * configure: Rebuild.
1420 * m68k-opc.c (TBL1): Use ! rather than `.
1421 * m68k-dis.c (print_insn_arg): Remove ` operand specifier.
1425 * m68k-opc.c: Correct bchg, bclr, bset, and btst on ColdFire.
1427 * m68k-opc.c: Accept tst{b,w,l} with immediate operands on cpu32.
1429 * m68k-opc.c: Correct movew of an immediate operand to %sr or %ccr
1432 * configure.in: Call AC_CHECK_TOOL before AM_PROG_LIBTOOL.
1433 * aclocal.m4: Rebuild with new libtool.
1434 * configure: Rebuild.
1436 start-sanitize-v850e
1439 * v850-opc.c ("cmov"): Order reg param r1, r2 not r2, r2.
1444 * sparc-opc.c (sparclet_cpreg_table): Add %ccsr2, %cccrr, %ccrstr.
1448 * v850-opc.c (v850_opcodes): Further rearrangements.
1453 * d30v-opc.c (rot2h, sra2h, srl2h insns): Revert last change.
1458 * v850-opc.c (v850_opcodes): Fields reordered to allow assembler
1463 * mips-opc.c: Added tx39 insns sdbbp, rfe, and deret.
1465 * mips16-opc.c: Added mips16 sdbbp.
1470 * v850-opc.c: Initialise processors field of v850_opcode structure.
1475 Merge changes from Martin Hunt:
1477 * d30v-opc.c: Change mvfacc to accept 6-bit unsigned values.
1479 * d30v-opc.c (pre_defined_registers): Add control registers from 0-63.
1480 (d30v_opcode_tabel): Add dbt, rtd, srah, and srlh instructions. Fix
1481 rot2h, sra2h, and srl2h to use new SHORT_A5S format.
1483 * d30v-dis.c (print_insn): Fix disassembly of SHORT_D2 opcodes.
1485 * d30v-dis.c (print_insn): First operand of d*i (delayed
1486 branch) instructions is relative.
1488 * d30v-opc.c (d30v_opcode_table): Change form for repeati.
1489 (d30v_operand_table): Add IMM6S3 type.
1490 (d30v_format_table): Change SHORT_D2. Add LONG_Db.
1492 * d30v-dis.c: Fix bug with ".s" and ".l" extensions
1493 and cmp instructions.
1495 * d30v-opc.c: Correct entries for repeat*, and sat*.
1496 Make IMM5 unsigned. Create IMM6U and IMM12S3U operand
1497 types. Correct several formats.
1499 * d30v-opc.c: (pre_defined_registers): Add dpsw and dpc.
1501 * d30v-opc.c (pre_defined_registers): Change control registers.
1503 * d30v-opc.c (d30v_format_table): Correct SHORT_C1 and
1504 SHORT_C2. Manual was incorrect.
1506 * d30v-dis.c (lookup_opcode): Return value now indicates
1507 if an opcode has a short and a long form. Used for deciding
1508 to append a ".s" or ".l".
1509 (print_insn): Append a ".s" to an instruction if it is
1510 the short form and ".l" if it is a long form. Do not append
1511 anything if the instruction has only one possible size.
1513 * d30v-opc.c: Change mulx2h to require an even register.
1514 New form: SHORT_A2; a SHORT_A form that needs an even
1515 register as the first operand.
1517 * d30v-dis.c (print_insn_d30v): Fix problem where the last
1518 instruction was not being disassembled if there were an odd
1519 number of instructions.
1521 * d30v-opc.c (SHORT_M2, LONG_M2): Two new forms.
1524 start-sanitize-v850e
1527 * v850-dis.c (disassemble): Improved display of register lists.
1532 * sparc-opc.c (sparc_opcodes): Fix assembler args to
1533 fzeros, fones, fsrc1, fsrc1s, fsrc2s, fnot1, fnot1s, fnot2s,
1534 fors, fnors, fands, fnands, fxors, fxnors, fornot1s, fornot2s,
1535 fandnot1s, fandnot2s.
1539 * sparc-opc.c (sparc_opcodes): Fix op3 field for fcmpq/fcmpeq.
1543 * cgen-asm.c (cgen_parse_address): New argument resultp.
1544 All callers updated.
1545 * m32r-asm.c (parse_h_hi16): Right shift numbers by 16.
1549 * mn10200-dis.c (disassemble): PC relative instructions are
1550 relative to the next instruction, not the current instruction.
1554 * v850-dis.c (disassemble): Only signed extend values that are not
1555 returned by extract functions.
1556 Remove use of V850_OPERAND_ADJUST_SHORT_MEMORY flag.
1560 * v850-opc.c: Update comments. Remove use of
1561 V850_OPERAND_ADJUST_SHORT_MEMORY. Fix several operand patterns.
1565 * v850-opc.c (MOVHI): Immediate parameter is unsigned.
1569 * configure: Rebuilt with latest devo autoconf for NT support.
1573 * v850-dis.c (disassemble): Use curly brace syntax for register
1576 * v850-opc.c (v850_opcodes[]): Add NOT_R0 flag to decect cases
1577 where r0 is being used as a destination register.
1579 start-sanitize-v850e
1582 * v850-opc.c (v850_opcodes[]): Move divh opcodes next to each other.
1587 * sh-opc.h (sh_arg_type): Add A_SGR and A_DBR.
1588 (sh_nibble_type, sh_arg_type): Add SH4 floating point extensions.
1589 (sh_table): Likewise. Add movca.l, ocbi, ocbp, ocbwb.
1590 Add insns to access SGR and DBR.
1591 * sh-dis.c (print_insn_shx): Add SH4 floating point extensions.
1595 * alpha-opc.c (alpha_opcodes): Fix hw_rei_stall mungage.
1597 start-sanitize-v850e
1600 * v850-opc.c (v850_opcodes[]): Remove use of flag field.
1601 * v850-opc.c (v850_opcodes[]): Add support for reversed short load
1606 * configure (cgen_files): Add support for v850e target.
1607 * configure.in (cgen_files): Add support for v850e target.
1611 * configure (cgen_files): Add support for v850ea target.
1612 * configure.in (cgen_files): Add support for v850ea target.
1617 * configure.in (bfd_arc_arch): Add.
1618 * configure: Rebuild.
1619 * Makefile.am (ALL_MACHINES): Add arc-dis.lo, arc-opc.lo.
1620 * Makefile.in: Rebuild.
1621 * arc-dis.c, arc-opc.c: New files.
1622 * disassemble.c (ARCH_all): Define ARCH_arc.
1623 (disassembler): Add ARC support.
1627 start-sanitize-v850e
1628 * v850-dis.c (disassemble): Add support for v850EA instructions.
1630 * v850-opc.c (insert_i5div, extract_i5div): New Functions.
1631 (v850_opcodes): Add v850EA instructions.
1633 * v850-dis.c (disassemble): Add support for v850E instructions.
1635 * v850-opc.c (insert_d5_4, extract_d5_4, insert_d16_16,
1636 extract_d16_16, insert_i9, extract_i9, insert_u9, extract_u9,
1637 insert_spe, extract_spe): New Functions.
1638 (v850_opcodes): Add v850E instructions.
1641 * v850-opc.c: Reorganised and re-layed out to improve readability
1646 * configure: Rebuild with autoconf 2.12.1.
1650 * aclocal.m4, configure: Rebuild with new automake patches.
1654 * configure.in: Set enable_shared before AM_PROG_LIBTOOL.
1655 * acinclude.m4: Just include acinclude.m4 from BFD.
1656 * aclocal.m4, configure: Rebuild.
1660 * Makefile.am: New file, based on old Makefile.in.
1661 * acconfig.h: New file.
1662 * acinclude.m4: New file.
1663 * stamp-h.in: New file.
1664 * configure.in: Call AM_INIT_AUTOMAKE and AM_PROG_LIBTOOL.
1665 Removed shared library handling; now handled by libtool. Replace
1666 AC_CONFIG_HEADER with AM_CONFIG_HEADER. Call AM_MAINTAINER_MODE,
1667 AM_CYGWIN32, and AM_EXEEXT. Replace AC_PROG_INSTALL with
1668 AM_PROG_INSTALL. Change all .o files to .lo. Remove stamp-h
1669 handling in AC_OUTPUT.
1670 * dep-in.sed: Change .o to .lo.
1671 * Makefile.in: Now built with automake.
1672 * aclocal.m4: Now built with aclocal.
1673 * config.in, configure: Rebuild.
1677 * mips-opc.c: Fix typo/thinko in "eret" instruction.
1679 start-sanitize-r5900
1682 * mips-opc.c: Fix coding of mtsa.
1687 * sparc-opc.c (sparc_opcodes): Fix spelling on fpaddX, fpsubX insns.
1689 * sparc-dis.c (sorted_opcodes): New static local.
1690 (struct opcode_hash): `opcode' is pointer to const element.
1691 (build_hash): First arg is now table of sorted pointers.
1692 (print_insn_sparc): Sort opcodes by sorting table of pointers.
1693 (compare_opcodes): Update.
1697 * cgen-opc.c: #include <ctype.h>.
1698 (hash_keyword_name): New arg `case_sensitive_p'. Callers updated.
1699 Handle case insensitive hashing.
1700 (hash_keyword_value): Change type of `value' to unsigned int.
1704 * mips-opc.c (mips_builtin_opcodes): If an insn uses single
1705 precision FP, mark it as such. Likewise for double precision
1706 FP. Mark ISA1 insns. Consolidate duplicate opcodes where
1708 start-sanitize-r5900
1709 (mips_builtin_opcodes): Remove non-existant r5900 instructions
1712 start-sanitize-r5900
1715 * mips-opc.c (mips_builtin_opcodes): Add "pinteh", "pexeh" and
1716 "pexew" as synonyms for "pintoh", "pexoh", "pexow".
1721 * ppc-opc.c (extract_nsi): make unsigned expression signed before
1723 (UNUSED): remove one level of parens, so MSVC doesn't choke on
1724 nesting depth when all the macros are expanded.
1728 * sparc-opc.c: The fcmp v9a instructions take an integer register
1729 as a destination, not a floating point register. From Christian
1734 * m68k-dis.c (print_insn_arg): Print case 7.2 using %pc@()
1735 syntax. From Roman Hodek
1738 * i386-dis.c (twobyte_has_modrm): Fix pand.
1742 * i386-dis.c (dis386_twobyte): Fix pand and pandn.
1746 * arm-dis.c: Add prototypes for arm_decode_shift and
1751 * mips-opc.c: Add r3900 insns.
1755 * sh-dis.c (print_insn_shx): Change relmask to bfd_vma. Don't
1756 print delay slot instructions on the same line. When using a PC
1757 relative load, add a comment with the value being loaded if it can
1762 * i386-dis.c (dis386[], dis386_twobyte[]): change pushl/popl
1763 to pushS/popS for segment regs and byte constant so that
1764 pushw/popw printed when in 16 bit data mode.
1766 * i386-dis.c (dis386[]): change cwtl, cltd to cWtS, cStd to
1767 print cbtw, cwtd in 16 bit data mode.
1768 * i386-dis.c (putop): extra case W to support above.
1770 * i386-dis.c (print_insn_x86): print addr32 prefix when given
1771 address size prefix in 16 bit address mode.
1775 * sh-dis.c: Reindent. Rename local variable fprintf to
1780 * m32r-opc.c (m32r_cgen_insn_table, cmpui): Undo patch of May 2.
1784 * mips-opc.c (mips_builtin_opcodes): Moved INSN_ISA field into new
1786 * mips16-opc.c (mip16_opcodes): same.
1790 * m68k-opc.c (moveb): Change $d to %d.
1794 * i386-dis.c: (dis386_twobyte): Add MMX instructions.
1795 (twobyte_has_modrm): Likewise.
1797 (OP_MMX, OP_EM, OP_MS): New static functions.
1799 * i386-dis.c: Revert patch of April 4. The output now matches
1804 * m32r-opc.c (m32r_cgen_insn_table, cmpui): Use $uimm16 instead
1809 * m32r-opc.h (CGEN_ARCH): Renamed from CGEN_CPU.
1813 * Makefile.in (install): Depend upon installdirs.
1814 (installdirs): New target.
1819 * configure.in: Use ${CONFIG_SHELL} when running $ac_config_sub.
1820 * configure: Rebuild.
1824 * cgen-*.c, m32r-*.c: #include sysdep.h instead of config.h.
1825 Delete string{,s}.h support.
1829 * cgen-asm.c (cgen_parse_operand_fn): New global.
1830 (cgen_parse_{{,un}signed_integer,address}): Update call to
1831 cgen_parse_operand_fn.
1832 (cgen_init_parse_operand): New function.
1833 * m32r-asm.c (parse_insn_normal): cgen_init_parse_operand renamed
1834 from cgen_asm_init_parse.
1835 (m32r_cgen_assemble_insn): New operand `errmsg'.
1836 Delete call to as_bad, return error message to caller.
1837 (m32r_cgen_asm_hash_keywords): #if 0 out.
1841 * m68k-dis.c (print_insn_arg) [case 'd']: Print as address register,
1843 [case 'J']: Fix typo in register name.
1847 * configure.in: Substitute SHLIB_LIBS.
1848 * configure: Rebuild.
1849 * Makefile.in (SHLIB_LIBS): New variable.
1850 ($(SHLIB)): Use $(SHLIB_LIBS).
1854 * cgen-dis.c (build_dis_hash_table): Fix xmalloc size computation.
1856 * cgen-opc.c (hash_keyword_name): Improve algorithm.
1858 * disassemble.c (disassembler): Handle m32r.
1862 * m32r-asm.c, m32r-dis.c, m32r-opc.c, m32r-opc.h: New files.
1863 * cgen-asm.c, cgen-dis.c, cgen-opc.c: New files.
1864 * Makefile.in (CFILES): Add them.
1865 (ALL_MACHINES): Add them.
1866 (dependencies): Regenerate.
1867 * configure.in (cgen_files): New variable.
1868 (bfd_m32r_arch): Add entry.
1869 * configure: Regenerate.
1873 * configure.in: Correct file names for bfd_mn10[23]00_arch.
1874 * configure: Rebuild.
1876 * Makefile.in: Rebuild dependencies.
1878 * d10v-dis.c: Include "ansidecl.h" before "opcode/d10v.h".
1880 * i386-dis.c (float_reg): Swap fsubrp and fsubp. Swap fdivrp and
1885 * Branched binutils 2.8.
1889 * m10200-dis.c: Rename from mn10200-dis.c.
1890 * m10200-opc.c: Rename from mn10200-opc.c.
1891 * m10300-dis.c: Rename from mn10300-dis.c
1892 * m10300-opc.c: Rename from mn10300-opc.c.
1893 * Makefile.in: Update accordingly.
1895 * mips16-opc.c: Add mul and dmul macros.
1899 * makefile.vms: Update CFLAGS, add clean target.
1903 * mips-opc.c: Add "wait". From Ralf Baechle
1906 * configure.in: Add stdlib.h to AC_CHECK_HEADERS list.
1907 * configure, config.in: Rebuild.
1908 * sysdep.h: Include <stdlib.h> if it exists.
1909 * sparc-dis.c: Include <stdio.h> and "sysdep.h". Don't include
1911 * Makefile.in: Rebuild dependencies.
1915 * ppc-opc.c: Add PPC 403 instructions and extended opcodes. From
1918 * mips-opc.c: Add cast when setting mips_opcodes.
1922 * v850-dis.c (disassemble): Fix sign extension problem.
1923 * v850-opc.c (extract_d*): Fix sign extension problems to make
1924 disassembly calculate branch offsets correctly.
1928 * sh-opc.h: Add bf/s and bt/s as synonyms for bf.s and bt.s.
1930 * mips-opc.c: Add dctr and dctw.
1935 * d30v-dis.c (print_insn): Change the way signed constants
1940 * Makefile.in (BFD_H): New variable.
1941 (HFILES): New variable.
1942 (CFILES): Add all C files.
1943 (.dep, .dep1, dep.sed, dep, dep-in): New targets.
1944 Delete old dependencies, and build new ones.
1945 * dep-in.sed: New file.
1949 * m68k-opc.c (m68k_opcode_aliases): Added blo and blo{s,b,w,l}.
1951 start-sanitize-coldfire
1954 * m68k-opc.c (m68k_opcodes): Provide coldfire division module
1957 end-sanitize-coldfire
1960 * mn10200-opc.c: Change "trap" to "syscall".
1961 * mn10300-opc.c: Add new "syscall" instruction.
1965 * m68k-opc.c (m68k_opcodes): Provide correct entries for mulsl and
1966 mulul insns on the coldfire.
1970 * arm-dis.c (print_insn_arm): Don't print instruction bytes.
1971 (print_insn_big_arm): Set bytes_per_chunk and display_endian.
1972 (print_insn_little_arm): Likewise.
1977 * i386-dis.c (fetch_data): Add prototype.
1978 * m68k-dis.c (fetch_data): Add prototype.
1979 (dummy_print_address): Add prototype. Make static.
1980 * ppc-opc.c (valid_bo): Add prototype.
1981 * sparc-dis.c (build_hash_table): Add prototype.
1982 (is_delayed_branch, compute_arch_mask): Add prototypes.
1983 (print_insn_sparc): Make several local variables const.
1984 (compare_opcodes): Change arguments to const PTR. Add prototype.
1985 * sparc-opc.c (arg): Change name field to be const.
1986 (lookup_name, lookup_value): Add prototypes. Change table and
1987 name parameters to be const.
1988 (sparc_encode_asi): Change name parameter to be const.
1989 (sparc_encode_membar, sparc_encode_prefetch): Likewise.
1990 (sparc_encode_sparclet_cpreg): Likewise.
1991 (sparc_decode_asi): Change return type to be const.
1992 (sparc_decode_membar, sparc_decode_prefetch): Likewise.
1993 (sparc_decode_sparclet_cpreg): Likewise.
1997 * Makefile.in ($(SHLINK)): Just use ln -s, not ln -sf, since
1998 Solaris doesn't like the combined options, and the -f is
2000 (stamp-tshlink, install): Likewise.
2004 * mn10300-opc.c (IMM16_PCREL, SD8N_PCREL, D16_SHIFT): Mark these
2009 * m68k-opc.c (m68k_opcodes): Fix last change for the mc68010.
2013 * m68k-opc.c (m68k_opcodes): Added entries for the tst insns on
2018 * m68k-opc.c (m68k_opcodes): Added swbegl pseudo-instruction.
2020 start-sanitize-tic80
2023 * tic80-dis.c (print_insn_tic80): Set info->bytes_per_line to 8.
2027 * tic80-opc.c (tic80_predefined_symbols): Define r25 properly.
2032 * m68k-dis.c (NEXTSINGLE, NEXTDOUBLE, NEXTEXTEND): Use
2033 floatformat_to_double to make portable.
2034 (print_insn_arg): Use NEXTEXTEND macro when extracting extended
2039 * mips-opc.c: Initialize mips_opcodes to mips_builtin_opcodes,
2040 and bfd_mips_num_opcodes to bfd_mips_num_builtin_opcodes.
2044 * d10v-dis.c, d10v-opc.c: Change pre_defined_registers to
2045 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
2047 start-sanitize-tic80
2050 * tic80-opc.c (LSI_SCALED): Renamed from this ...
2051 (OFF_SL_BR_SCALED): ... to this, and added the flag
2052 TIC80_OPERAND_BASEREL to the flags word.
2053 (tic80_opcodes): Replace all occurances of LSI_SCALED with
2059 * mips-opc.c: Add macros for cop0, cop1 cop2 and cop3.
2060 Change mips_opcodes from const array to a pointer,
2061 and change bfd_mips_num_opcodes from const int to int,
2062 so that we can increase the size of the mips opcodes table
2065 start-sanitize-tic80
2068 * tic80-opc.c (tic80_predefined_symbols): Revert change to
2069 store BITNUM values in the table in one's complement form
2070 to match behavior when assembler is given a raw numeric
2071 value for a BITNUM operand.
2072 * tic80-dis.c (print_operand_bitnum): Ditto.
2078 * d30v-opc.c: Removed references to FLAG_X.
2083 * Makefile.in: Add dependencies on ../bfd/bfd.h as required.
2088 * Makefile.in: Added d30v object files.
2089 * configure: (bfd_d30v_arch) Rebuilt.
2090 * configure.in: (bfd_d30v_arch) Added new case.
2091 * d30v-dis.c: New file.
2092 * d30v-opc.c: New file.
2093 * disassemble.c (disassembler) Add entry for d30v.
2096 start-sanitize-tic80
2099 * tic80-opc.c (tic80_predefined_symbols): Add symbolic
2100 representations for the floating point BITNUM values.
2104 * tic80-opc.c (tic80_predefined_symbols): Store BITNUM values
2105 in the table in one's complement form, as they appear in the
2107 (tic80_symbol_to_value): Use macros to access predefined
2109 (tic80_value_to_symbol): Ditto.
2110 (tic80_next_predefined_symbol): New function.
2111 * tic80-dis.c (print_operand_bitnum): Remove code that did
2112 one's complement for BITNUM values.
2115 start-sanitize-r5900
2118 * mips-opc.c: bug fix, can't mark insns INSN_5900 and INSN_ISA4
2123 * makefile.vms: Remove 8 bit characters. Update to latest
2128 * m68k-opc.c (m68k_opcodes): Add swbeg pseudo-instruction.
2132 * mn10200-opc.c (IMM16_PCREL): This is a signed operand.
2133 (IMM24_PCREL): Likewise.
2137 * mips-dis.c (print_mips16_insn_arg): Use memaddr - 2 as the base
2138 address for an extended PC relative instruction that is not a
2143 * m68k-dis.c (print_insn_m68k): Set bytes_per_chunk and
2146 start-sanitize-tic80
2149 * tic80-opc.c (tic80_operands): Fix typo '+' -> '|'.
2150 (tic80_opcodes): Sort entries so that long immediate forms
2151 come after short immediate forms, making it easier for
2152 assembler to select the right one for a given operand.
2157 * mips-dis.c (_print_insn_mips): Set bytes_per_chunk and
2159 (print_insn_mips16): Likewise.
2161 start-sanitize-r5900
2164 * mips-opc.c: add r5900.
2167 start-sanitize-tic80
2170 * tic80-opc.c (tic80_symbol_to_value): Changed to accept
2171 a symbol class that restricts translation to just that
2172 class (general register, condition code, etc).
2176 * tic80-opc.c (tic80_operands): Add REG_0_E, REG_22_E,
2177 and REG_DEST_E for register operands that have to be
2178 an even numbered register. Add REG_FPA for operands that
2179 are one of the floating point accumulator registers.
2180 Add TIC80_OPERAND_MASK to flags for ENDMASK operand.
2181 (tic80_opcodes): Change entries that need even numbered
2182 register operands to use the new operand table entries.
2183 Add "or" entries that are identical to "or.tt" entries.
2188 * mips16-opc.c: Add new cases of exit instruction for
2190 * mips-dis.c (print_mips16_insn_arg): Display floating point
2191 registers in operands of exit instruction. Print `$' before
2192 register names in operands of entry and exit instructions.
2194 start-sanitize-tic80
2197 * tic80-opc.c (tic80_predefined_symbols): Table of name/value
2198 pairs for all predefined symbols recognized by the assembler.
2199 Also used by the disassembling routines.
2200 (tic80_symbol_to_value): New function.
2201 (tic80_value_to_symbol): New function.
2202 * tic80-dis.c (print_operand_control_register,
2203 print_operand_condition_code, print_operand_bitnum):
2204 Remove private tables and use tic80_value_to_symbol function.
2209 * d10v-dis.c (print_operand): Change address printing
2210 to correctly handle PC wrapping. Fixes PR11490.
2214 * mn10200-opc.c (mn10200_operands): Make 8 and 16 bit pc-relative
2219 * mips-dis.c (print_insn_mips16): Set insn_info information.
2220 (print_mips16_insn_arg): Likewise.
2222 * mips-dis.c (print_insn_mips16): Better handling of an extend
2223 opcode followed by an instruction which can not be extended.
2227 * m68k-opc.c (m68k_opcodes): Changed operand specifier for the
2228 coldfire moveb instruction to not allow an address register as
2229 destination. Although the documentation does not indicate that
2230 this is invalid, experiments uncovered unexpected behavior.
2231 Added a comment explaining the situation. Thanks to Andreas
2232 Schwab for pointing this out to me.
2234 start-sanitize-tic80
2237 * tic80-opc.c (tic80_opcodes): Expand comment to note that the
2238 entries are presorted so that entries with the same mnemonic are
2239 adjacent to each other in the table. Sort the entries for each
2240 instruction so that this is true.
2245 * m68k-dis.c: Include <libiberty.h>.
2246 (print_insn_m68k): Sort the opcode table on the most significant
2247 nibble of the opcode.
2249 start-sanitize-tic80
2252 * tic80-dis.c (tic80_opcodes): Add "wrcr", "vmpy", "vrnd",
2253 "vsub", "vst", "xnor", and "xor" instructions.
2254 (V_a1): Renamed from V_a, msb of accumulator reg number.
2255 (V_a0): Add macro, lsb of accumulator reg number.
2259 * tic80-dis.c (print_insn_tic80): Broke excessively long
2260 function up into several smaller ones and arranged for
2261 the instruction printing function to be callable recursively
2262 to print vector instructions that have both a load and a
2263 math instruction packed into a single opcode.
2264 * tic80-opc.c (tic80_opcodes): Expand comment for vld opcode
2265 to explain why it comes after the other vector opcodes.
2270 * m68k-opc.c (m68k_opcodes): add b, w, or l specifier to coldfire
2271 move insns to handle immediate operands.
2275 * m68k-opc.c (m68k_opcodes): Delete duplicate entry for "cmpil".
2276 fix operand mask in the "moveml" entries for the coldfire.
2278 start-sanitize-tic80
2281 * tic80-opc.c (V_a, V_m, V_S, V_Z, V_p, OP_V, MASK_V):
2282 New macros for building vector instruction opcodes.
2283 (tic80_opcodes): Remove all uses of FMT_SI, FMT_REG, and
2284 FMT_LI, which were unused. The field is now a flags field.
2285 Remove some opcodes that are possible, but illegal, such
2286 as long immediate instructions with doubles for immediate
2287 values. Add "vadd" and "vld" instructions.
2291 * tic80-opc.c (tic80_operands): Reorder some table entries to make
2292 the order more logical. Move the shift alias instructions ("rotl",
2293 "shl", "ins", "rotr", "extu", "exts", "srl", and "sra" to be
2294 interspersed with the regular sr.x and sl.x instructions. Add
2295 and test new instruction opcodes for "sl", "sli", "sr", "sri", "st",
2296 "sub", "subu", "swcr", and "trap".
2300 * tic80-opc.c (OFF_SS_PC): Renamed from OFF_SS.
2301 (OFF_SL_PC): Renamed from OFF_SL.
2302 (OFF_SS_BR): New operand type for base relative operand.
2303 (OFF_SL_BR): New operand type for base relative operand.
2304 (REG_BASE): New operand type for base register operand.
2305 (tic80_opcodes): Add and test "fmpy", "frndm", "frndn", "frndp",
2306 "frndz", "fsqrt", "fsub", "illop0", "illopF", "ins", "jsr",
2307 "ld", "ld.u", "lmo", "or", "rdcr", "rmo", "rotl", and "rotr"
2309 * tic80-dis.c (print_insn_tic80): Print opcode name with fixed width
2310 10 char field, padded with spaces on rhs, rather than a string
2311 followed by a tab. Use renamed TIC80_OPERAND_PCREL flag bit rather
2312 than old TIC80_OPERAND_RELATIVE. Add support for new
2313 TIC80_OPERAND_BASEREL flag bit.
2317 * tic80-dis.c (print_insn_tic80): Print floating point operands
2319 * tic80-opc.c (SPFI): Add single precision floating point
2320 immediate operand type.
2321 (ROTATE): Add rotate operand type for shifts.
2322 (ENDMASK): Add for shifts.
2323 (n): Macro for the 'n' bit.
2324 (i): Macro for the 'i' bit.
2325 (PD): Macro for the 'PD' field.
2326 (P2): Macro for the 'P2' field.
2327 (P1): Macro for the 'P1' field.
2328 (tic80_opcodes): Add entries for "exts", "extu", "fadd",
2334 * mn10200-dis.c (disassemble): Mask off unwanted bits after
2335 adding in current address for pc-relative operands.
2337 start-sanitize-tic80
2340 * tic80-dis.c (R_SCALED): Add macro to test for ":s" modifier bit.
2341 (print_insn_tic80): If R_SCALED then print ":s" modifier for operand.
2342 * tic80-opc.c (REG0, REG22, REG27, SSOFF, LSOFF): Names
2343 changed to REG_0, REG_22, REG_DEST, OFF_SS, OFF_SL respectively.
2344 (SICR, LICR, REGM_SI, REGM_LI): Names changed to CR_SI, CR_LI,
2345 REG_BASE_M_SI, REG_BASE_M_LI respectively.
2346 (REG_SCALED, LSI_SCALED): New operand types.
2347 (E): New macro for 'E' bit at bit 27.
2348 (tic80_opcodes): Add and test dld, dld.u, dst, estop, and etrap
2349 opcodes, including the various size flavors (b,h,w,d) for
2350 the direct load and store instructions.
2354 * tic80-dis.c (M_SI, M_LI): Add macros to test for ":m" modifier bit
2356 * tic80-dis.c (print_insn_tic80): Change comma and paren handling.
2357 Use M_SI and M_LI macros to check for ":m" modifier for GPR operands.
2358 * tic80-opc.c (tic80_operands): Add REGM_SI and REGM_LI operands.
2359 (F, M_REG, M_LI, M_SI, SZ_REG, SZ_LI, SZ_SI, D, S): New bit-twiddlers.
2360 (MASK_LI_M, MASK_SI_M, MASK_REG_M): Remove and replace in opcode
2361 masks with "MASK_* & ~M_*" to get the M bit reset.
2362 (tic80_opcodes): Add bsr, bsr.a, cmnd, cmp, dcachec, and dcachef.
2366 * tic80-dis.c (print_insn_tic80): Print TIC80_OPERAND_RELATIVE
2367 correctly. Add support for printing TIC80_OPERAND_BITNUM and
2368 TIC80_OPERAND_CC, and TIC80_OPERAND_CR operands in symbolic
2370 * tic80-opc.c (tic80_operands): Add SSOFF, LSOFF, BITNUM,
2371 CC, SICR, and LICR table entries.
2372 (tic80_opcodes): Add and test "nop", "br", "bbo", "bbz",
2373 "bcnd", and "brcr" opcodes.
2378 * ppc-opc.c (powerpc_operands): Make comment match the
2379 actual fields (no shift field).
2380 * sparc-opc.c (sparc_opcodes): Document why this cannot be "const".
2381 start-sanitize-tic80
2382 * tic80-dis.c (print_insn_tic80): Replace abort stub with a
2383 partial implementation, work in progress.
2384 * tic80-opc.c (tic80_operands): Begin construction operands table.
2385 (tic80_opcodes): Continue populating opcodes table and start
2386 filling in the operand indices.
2387 (tic80_num_opcodes): Add this.
2392 * m68k-opc.c: Add #B case for moveq.
2396 * mn10300-dis.c (disassemble): Make sure all variables are initialized
2397 before they are used.
2401 * v850-opc.c (v850_opcodes): Put curly-braces around operands
2402 for "breakpoint" instruction.
2406 * Makefile.in (ALL_CFLAGS): Add -D_GNU_SOURCE.
2407 (dep): Use ALL_CFLAGS rather than CFLAGS.
2411 * v850-opc.c (D8_{6,7}): Set V850_OPERAND_ADJUST_SHORT_MEMORY
2416 * Makefile.in (m68k-opc.o, alpha-opc.o): Remove dis-asm.h dependency.
2417 start-sanitize-tic80
2418 (tic80-dis.o, tic80-opc.o): Add rules per comment in Makefile.in.
2423 * mips16-opc.c: Add "abs".
2425 start-sanitize-tic80
2428 * Makefile.in (ALL_MACHINES): Add tic80-dis.o and tic80-opc.o.
2429 * disassemble.c (ARCH_tic80): Define if ARCH_all is defined.
2430 (disassembler): Add bfd_arch_tic80 support to set disassemble
2431 to print_insn_tic80.
2432 * tic80-dis.c (print_insn_tic80): Add stub.
2436 * configure.in (arch in $selarchs): Add bfd_tic80_arch entry.
2437 * configure: Regenerate with autoconf.
2438 * tic80-dis.c: Add file.
2439 * tic80-opc.c: Add file.
2444 * d10v-opc.c (pre_defined_registers): Add cr[0-15], dpc, dpsw, link.
2448 * mn10200-opc.c (mn10200_operands): Add SIMM16N.
2449 (mn10200_opcodes): Use it for some logicals and btst insns.
2450 Add "break" and "trap" instructions.
2452 * mn10300-opc.c (mn10300_opcodes): Add "break" instruction.
2454 * mn10200-opc.c: Add pseudo-ops for "mov (an),am" and "mov an,(am)".
2458 * mips-dis.c (print_mips16_insn_arg): The base address of a PC
2459 relative load or add now depends upon whether the instruction is
2464 * mn10200-dis.c: Finish writing disassembler.
2465 * mn10200-opc.c (mn10200_opcodes): Fix mask for "mov imm8,dn".
2466 Fix mask for "jmp (an)".
2468 * mn10300-dis.c (disassemble, print_insn_mn10300): Corrently
2469 handle endianness issues for mn10300.
2471 * mn10200-opc.c (mn10200_opcodes): Fix operands for "movb dm,(an)".
2475 * mn10200-opc.c (mn10200_opcodes): "mov imm8,d0" is a format 2
2476 instruction. Fix opcode field for "movb (imm24),dn".
2478 * mn10200-opc.c (mn10200_operands): Fix insertion position
2483 * mn10200-opc.c: Create mn10200 opcode table.
2484 * mn10200-dis.c: Flesh out mn10200 disassembler. Not ready,
2485 but moving along nicely.
2489 * Makefile.in (ALL_MACHINES): Add mips16-opc.o.
2493 * m68k-opc.c (m68k_opcodes): Revert change to use < and >
2494 specifiers for fmovem* instructions.
2498 * mn10300-dis.c (disassemble): Remove '$' register prefixing.
2502 * mips16-opc.c: Change opcode for entry/exit to avoid conflicting
2507 * mn10300-opc.c: Add some comments explaining the various
2510 * mn10300-dis.c (disassemble): Fix minor gcc -Wall warnings.
2514 * m68k-dis.c (print_insn_arg): Handle new < and > operand
2517 * m68k-opc.c (m68k_opcodes): Simplify table by using < and >
2518 operand specifiers in fmovm* instructions.
2522 * ppc-opc.c (insert_li): Give an error if the offset has the two
2523 least significant bits set.
2527 * mips-dis.c (print_insn_mips16): Separate the instruction from
2528 the arguments with a tab, not a space.
2532 * mn10300-dis.c (disasemble): Finish conversion to '$' as
2535 * mn10300-opc.c (mn10300_opcodes): Fix mask field for
2540 * configure: Rebuild with autoconf 2.12.
2542 Add support for mips16 (16 bit MIPS implementation):
2543 * mips16-opc.c: New file.
2544 * mips-dis.c: Include "elf-bfd.h" and "elf/mips.h".
2545 (mips16_reg_names): New static array.
2546 (print_insn_big_mips): Use print_insn_mips16 in 16 bit mode or
2547 after seeing a 16 bit symbol.
2548 (print_insn_little_mips): Likewise.
2549 (print_insn_mips16): New static function.
2550 (print_mips16_insn_arg): New static function.
2551 * mips-opc.c: Add jalx instruction.
2552 * Makefile.in (mips16-opc.o): New target.
2553 * configure.in: Use mips16-opc.o for bfd_mips_arch.
2554 * configure: Rebuild.
2558 * m68k-opc.c (m68k_opcodes): Simplify table by using < and >
2559 operand specifiers in *save, *restore and movem* instructions.
2561 * m68k-opc.c (m68k_opcodes): Fix move and movem instructions for
2564 * m68k-opc.c (m68k_opcodes): The coldfire (mcf5200) can only use
2565 register operands for immediate arithmetic, not, neg, negx, and
2566 set according to condition instructions.
2568 * m68k-opc.c (m68k_opcodes): Consistantly Use "s" as the storage
2569 specifier of the effective-address operand in immediate forms of
2570 arithmetic instructions. The specifier for the immediate operand
2571 notes how and where the constant will be stored.
2575 * mn10300-opc.c (mn10300_opcodes): Remove redundant "lcc"
2578 * mn10300-dis.c (disassemble): Use '$' instead of '%' for
2581 * mn10300-dis.c (disassemble): Prefix registers with '%'.
2585 * mn10300-dis.c (disassemble): Handle register lists.
2587 * mn10300-opc.c: Fix handling of register list operand for
2588 "call", "ret", and "rets" instructions.
2590 * mn10300-dis.c (disassemble): Print PC-relative and memory
2591 addresses symbolically if possible.
2592 * mn10300-opc.c: Distinguish between absolute memory addresses,
2593 pc-relative offsets & random immediates.
2595 * mn10300-dis.c (print_insn_mn10300): Fix fetch of last byte
2597 (disassemble): Handle SPLIT and EXTENDED operands.
2601 * mn10300-dis.c: Rough cut at printing some operands.
2603 * mn10300-dis.c: Start working on disassembler support.
2604 * mn10300-opc.c (mn10300_opcodes): Fix masks on several insns.
2606 * mn10300-opc.c (mn10300_operands): Add "REGS" for a register
2608 (mn10300_opcodes): Use REGS for register list in "movm" instructions.
2612 * d10v-opc.c (d10v_opcodes): Add3 sets the carry.
2616 * mn10300-opc.c (mn10300_opcodes): Demand parens around
2617 register argument is calls and jmp instructions.
2621 * mn10300-opc.c (mn10300_opcodes): Use DN01 for putx and
2622 getx operand. Fix opcode for mulqu imm,dn.
2626 * mn10300-opc.c (mn10300_operands): Hijack "bits" field
2627 in MN10300_OPERAND_SPLIT operands for how many bits
2628 appear in the basic insn word. Add IMM32_HIGH24,
2629 IMM32_HIGH24_LOWSHIFT8, IMM8E_SHIFT8.
2630 (mn10300_opcodes): Use new operands as needed.
2632 * mn10300-opc.c (mn10300_operands): Add IMM32_LOWSHIFT8
2633 for bset, bclr, btst instructions.
2634 (mn10300_opcodes): Use new IMM32_LOWSHIFT8 as needed.
2636 * mn10300-opc.c (mn10300_operands): Remove many redundant
2637 operands. Update opcode table as appropriate.
2638 (IMM32): Add MN10300_OPERAND_SPLIT flag.
2639 (mn10300_opcodes): Fix single bit error in mov imm32,dn insn.
2643 * mn10300-opc.c (mn10300_operands): Add DN2, DM2, AN2, AM2
2644 operands (for indexed load/stores). Fix bitpos for DI
2645 operand. Add SN8N_SHIFT8, IMM8_SHIFT8, and D16_SHIFT for the
2646 few instructions that insert immediates/displacements in the
2647 middle of the instruction. Add IMM8E for 8 bit immediate in
2648 the extended part of an instruction.
2649 (mn10300_operands): Use new opcodes as appropriate.
2653 * d10v-opc.c (d10v_opcodes): Declare the trap instruction
2654 sequential so the assembler never parallelizes it with
2659 * mn10300-opc.c (mn10300_operands): Add DN01 and AN01 for
2660 a data/address register that appears in register field 0
2661 and register field 1.
2662 (mn10300_opcodes): Use DN01 and AN01 for mov/cmp imm8,DN/AN
2666 * alpha-dis.c (print_insn_alpha): Use new NOPAL mask for
2667 standard disassembly.
2669 * alpha-opc.c (alpha_operands): Rearrange flags slot.
2670 (alpha_opcodes): Add new BWX, CIX, and MAX instructions.
2671 Recategorize PALcode instructions.
2675 * v850-opc.c (v850_opcodes): Add relaxing "jbr".
2679 * mips-dis.c (_print_insn_mips): Don't print a trailing tab if
2680 there are no operand types.
2684 * v850-opc.c (D9_RELAX): Renamed from D9, all references
2686 (v850_operands): Make sure D22 immediately follows D9_RELAX.
2690 * i386-dis.c (print_insn_x86): Set info->bytes_per_line to 5.
2694 * v850-opc.c (insert_d8_6): Fix operand insertion for sld.w
2695 and sst.w instructions.
2697 * v850-opc.c (v850_opcodes): Add "jCC" instructions (aliases for
2702 * mips-dis.c (_print_insn_mips): Use a tab between the instruction
2707 * ppc-opc.c (PPCPWR2): Define.
2708 (powerpc_opcodes): Use PPCPWR2 for fsqrt, rather than duplicating
2713 * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode
2714 field for movhu instruction.
2716 * v850-dis.c (disassemble): For V850_OPERAND_SIGNED operands,
2717 cast value to "long" not "signed long" to keep hpux10
2722 * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode field
2725 * mn10300-opc.c (FMT*): Remove definitions.
2727 * mn10300-opc.c (mn10300_opcodes): Fix destination register
2728 for shift-by-register opcodes.
2730 * mn10300-opc.c (mn10300_operands): Break DN, DM, AN, AM
2731 into [AD][MN][01] for encoding the position of the register
2736 * mn10300-opc.c (mn10300_opcodes): Add "extended" instructions,
2737 "putx", "getx", "mulq", "mulqu", "sat16", "sat24", "bsch".
2741 * mn10300-opc.c (mn10300_operands): Remove "REGS" operand.
2742 Fix various typos. Add "PAREN" operand.
2743 (MEM, MEM2): Define.
2744 (mn10300_opcodes): Surround all memory addresses with "PAREN"
2745 operands. Fix several typos.
2747 * mn10300-opc.c (mn10300_opcodes): Fix typos in yesterday's
2752 * mn10300-opc.c (FMT_XX): Renumber starting at one.
2753 (mn10300_operands): Rough cut. Enough to parse "mov" instructions
2755 (mn10300_opcodes): Break opcode format out into its own field.
2756 Update many operand fields to deal with signed vs unsigned
2757 issues. Fix one or two typos in the "mov" instruction
2758 opcode, mask and/or operand fields.
2762 * m68k-opc.c (plusha): Prefer encoding for m68040up, in case
2763 m68851 wasn't reset.
2767 * mn10300-opc.c (mn10300_opcodes): Add opcode & masks for
2768 all opcodes. Very rough cut at operands for all opcodes.
2770 * mn10300-opc.c (mn10300_opcodes): Start fleshing out the
2775 * mn10200-opc.c, mn10300-opc.c: New files.
2776 * mn10200-dis.c, mn10300-dis.c: New files.
2777 * mn10x00-opc.c, mn10x00-dis.c: Deleted.
2778 * disassemble.c: Break mn10x00 support into 10200 and 10300
2780 * configure.in: Likewise.
2781 * configure: Rebuilt.
2785 * Makefile.in (MOSTLYCLEAN): Move config.log to distclean.
2789 * mn10x00-opc.c, mn10x00-dis.c: New files for Matsushita
2791 * disassemble (ARCH_mn10x00): Define.
2792 (disassembler): Handle bfd_arch_mn10x00.
2793 * configure.in: Recognize bfd_mn10x00_arch.
2794 * configure: Rebuilt.
2798 * i386-dis.c (op_rtn): Change to be a pointer. Adjust uses
2799 accordingly. Don't declare functions using op_rtn.
2803 * v850-dis.c (disassemble): Add memaddr argument. Re-arrange
2804 params to be more standard.
2805 * (disassemble): Print absolute addresses and symbolic names for
2806 branch and jump targets.
2807 * v850-opc.c (v850_operand): Add displacement flag to 9 and 22
2809 * (v850_opcodes): Add breakpoint insn.
2813 * m68k-opc.c: Move the fmovemx data register cases before the
2814 other cases, so that they get recognized before the data register
2815 does gets treated as a degenerate register list.
2819 * mips-opc.c: Add a case for "div" and "divu" with two registers
2820 and a destination of $0.
2824 * mips-dis.c (print_insn_arg): Add prototype.
2825 (_print_insn_mips): Ditto.
2829 * mips-dis.c (print_insn_arg): Print condition code registers as
2834 * sparc-opc.c (sparc_opcodes): Add setuw, setsw, setx.
2838 * v850-dis.c (disassemble): Make static. Provide prototype.
2842 * v850-opc.c (insert_d9, insert_d22): Fix boundary case
2847 * v850-dis.c (disassemble): Handle insertion of ',', '[' and
2848 ']' characters into the output stream.
2849 * v850-opc.c (v850_opcodes: Remove size field from all opcodes.
2850 Add "memop" field to all opcodes (for the disassembler).
2851 Reorder opcodes so that "nop" comes before "mov" and "jr"
2852 comes before "jarl".
2854 * v850-dis.c (print_insn_v850): Fix typo in last change.
2856 * v850-dis.c (print_insn_v850): Properly handle disassembling
2857 a two byte insn at the end of a memory region when the memory
2858 region's size is only two byte aligned.
2860 * v850-dis.c (v850_cc_names): Fix stupid thinkos.
2862 * v850-dis.c (v850_reg_names): Define.
2863 (v850_sreg_names, v850_cc_names): Likewise.
2864 (disassemble): Very rough cut at printing operands (unformatted).
2866 * v850-opc.c (BOP_MASK): Fix.
2867 (v850_opcodes): Fix mask for jarl and jr.
2869 * v850-dis.c: New file. Skeleton for disassembler support.
2870 * Makefile.in Remove v850 references, they're not needed here.
2871 * configure.in: Add v850-dis.o when building v850 toolchains.
2872 * configure: Rebuilt.
2873 * disassemble.c (disassembler): Call v850 disassembler.
2875 * v850-opc.c (insert_d8_7, extract_d8_7): New functions.
2876 (insert_d8_6, extract_d8_6): New functions.
2877 (v850_operands): Rename D7S to D7; operand for D7 is unsigned.
2878 Rename D8 to D8_7, use {insert,extract}_d8_7 routines.
2880 (IF4A, IF4B): Use "D7" instead of "D7S".
2881 (IF4C, IF4D): Use "D8_7" instead of "D8".
2882 (IF4E, IF4F): New. Use "D8_6".
2883 (v850_opcodes): Use IF4A/IF4B for sld.b/sst.b. Use IF4C/IF4D for
2884 sld.h/sst.h. Use IF4E/IF4F for sld.w/sst.w.
2886 * v850-opc.c (insert_d16_15, extract_d16_15): New functions.
2887 (v850_operands): Change D16 to D16_15, use special insert/extract
2888 routines. New new D16 that uses the generic insert/extract code.
2889 (IF7A, IF7B): Use D16_15.
2890 (IF7C, IF7D): New. Use D16.
2891 (v850_opcodes): Use IF7C and IF7D for ld.b and st.b.
2893 * v850-opc.c (insert_d9, insert_d22): Slightly improve error
2894 message. Issue an error if the branch offset is odd.
2896 * v850-opc.c: Add notes about needing special insert/extract
2897 for all the load/store insns, except "ld.b" and "st.b".
2899 * v850-opc.c (insert_d22, extract_d22): New functions.
2900 (v850_operands): Use insert_d22 and extract_d22 for
2902 (insert_d9): Fix range check.
2906 * v850-opc.c (v850_operands): Add V850_OPERAND_SIGNED flag
2907 and set bits field to D9 and D22 operands.
2911 * v850-opc.c (v850_operands): Define SR2 operand.
2912 (v850_opcodes): "ldsr" uses R1,SR2.
2914 * v850-opc.c (v850_opcodes): Fix opcode specs for
2915 sld.w, sst.b, sst.h, sst.w, and nop.
2919 * v850-opc.c (v850_opcodes): Add null opcode to mark the
2920 end of the opcode table.
2924 * d10v-opc.c (pre_defined_registers): Added register pairs,
2925 "r0-r1", "r2-r3", etc.
2929 * v850-opc.c (v850_operands): Make I16 be a signed operand.
2930 Create I16U for an unsigned 16bit mmediate operand.
2931 (v850_opcodes): Use I16U for "ori", "andi" and "xori".
2933 * v850-opc.c (v850_operands): Define EP operand.
2934 (IF4A, IF4B, IF4C, IF4D): Use EP.
2936 * v850-opc.c (v850_opcodes): Fix opcode numbers for "mov"
2937 with immediate operand, "movhi". Tweak "ldsr".
2939 * v850-opc.c (v850_opcodes): Get ld.[bhw] and st.[bhw]
2940 correct. Get sld.[bhw] and sst.[bhw] closer.
2942 * v850-opc.c (v850_operands): "not" is a two byte insn
2944 * v850-opc.c (v850_opcodes): Correct bit pattern for setf.
2946 * v850-opc.c (v850_operands): D16 inserts at offset 16!
2948 * v850-opc.c (two): Get order of words correct.
2950 * v850-opc.c (v850_operands): I16 inserts at offset 16!
2952 * v850-opc.c (v850_operands): Add "SR1" and "SR2" for system
2953 register source and destination operands.
2954 (v850_opcodes): Use SR1 and SR2 for "ldsr" and "stsr".
2956 * v850-opc.c (v850_opcodes): Fix thinko in "jmp" opcode. Fix
2957 same thinko in "trap" opcode.
2959 * v850-opc.c (v850_opcodes): Add initializer for size field
2962 * v850-opc.c (v850_operands): D6 -> DS7. References changed.
2963 Add D8 for 8-bit unsigned field in short load/store insns.
2964 (IF4A, IF4D): These both need two registers.
2965 (IF4C, IF4D): Define. Use 8-bit unsigned field.
2966 (v850_opcodes): For "sld.h", "sld.w", "sst.h", "sst.w", use
2967 IF4C & IF4D. For "trap" use I5U, not I5. Add IF1 operand
2968 for "ldsr" and "stsr".
2969 * v850-opc.c (v850_operands): 3-bit immediate for bit insns
2972 * v850-opc.c (v850_opcodes): Correct short store half (sst.h) and
2973 short store word (sst.w).
2977 * v850-opc.c (v850_operands): Added insert and extract fields,
2978 pointers to functions that handle unusual operand encodings.
2982 * v850-opc.c (v850_opcodes): Enable "trap".
2984 * v850-opc.c (v850_opcodes): Fix order of displacement
2985 and register for "set1", "clr1", "not1", and "tst1".
2989 * v850-opc.c (v850_operands): Add "B3" support.
2990 (v850_opcodes): Fix and enable "set1", "clr1", "not1"
2993 * v850-opc.c (v850_opcodes): "jmp" has only an R1 operand.
2995 * v850-opc.c: Close unterminated comment.
2999 * v850-opc.c (v850_operands): Add flags field.
3000 (v850_opcodes): add move opcodes.
3004 * Makefile.in (ALL_MACHINES): Add v850-opc.o.
3005 * configure: (bfd_v850v_arch) Add new case.
3006 * configure.in: (bfd_v850_arch) Add new case.
3007 * v850-opc.c: New file.
3011 * sparc-dis.c (print_insn_sparc): Handle little endian sparcs.
3015 * d10v-opc.c: Add additional information to the opcode
3016 table to help determinine which instructions can be done
3021 * mpw-make.sed: Update editing of include pathnames to be
3026 * arm-opc.h: Added "bx" instruction definition.
3030 * alpha-opc.c (EV4EXTHWINDEX): Field width should be 8 not 5.
3034 * d10v-opc.c (d10v_opcodes): Minor fixes to addi and bl.l.
3038 * d10v-opc.c (d10v_opcodes): Correct 'mv' unit entry to EITHER.
3042 * makefile.vms: Update for alpha-opc changes.
3046 * i386-dis.c (print_insn_i386): Actually return the correct value.
3047 (ONE, OP_ONE): #ifdef out; not used.
3051 * d10v-opc.c (d10v_opcodes): Added 2 accumulator sub instructions.
3052 Changed subi operand type to treat 0 as 16.
3056 * m68k-opc.c: Add cpushl for the mcf5200. From Ken Rose
3061 * arm-opc.h: (arm_opcodes): Added halfword and sign-extension
3062 memory transfer instructions. Add new format string entries %h and %s.
3063 * arm-dis.c: (print_insn_arm): Provide decoding of the new
3068 * d10v-opc.c (d10v_operands): Added UNUM4S; a 4-bit accumulator shift.
3069 (d10v_opcodes): Modified accumulator shift instructions to use UNUM4S.
3073 * alpha-dis.c (print_insn_alpha_osf): Remove.
3074 (print_insn_alpha_vms): Remove.
3075 (print_insn_alpha): Make globally visible. Chose the register
3076 names based on info->flavour.
3077 * disassemble.c: Always return print_insn_alpha for the alpha.
3081 * d10v-dis.c (dis_long): Handle unknown opcodes.
3085 * d10v-opc.c: Changes to support signed and unsigned numbers.
3086 All instructions with the same name that have long and short forms
3087 now end in ".l" or ".s". Divs added.
3088 * d10v-dis.c: Changes to support signed and unsigned numbers.
3092 * d10v-dis.c: Change all functions to use info->print_address_func.
3096 * m68k-opc.c (m68k_opcodes): Make opcode masks for the ColdFire
3097 move ccr/sr insns more strict so that the disassembler only
3098 selects them when the addressing mode is data register.
3101 * d10v-opc.c (pre_defined_registers): Declare.
3102 * d10v-dis.c (print_operand): Now uses pre_defined_registers
3103 to pick a better name for the registers.
3107 * sparc-opc.c: Fix opcode values for fpack16, and fpackfix. Fix
3108 operands for fexpand and fpmerge. From Christian Kuehnke
3113 * alpha-dis.c (print_insn_alpha): No longer the user-visible
3114 print routine. Take new regnames and cpumask arguments.
3115 Kill the environment variable nonsense.
3116 (print_insn_alpha_osf): New function. Do OSF/1 style regnames.
3117 (print_insn_alpha_vms): New function. Do VMS style regnames.
3118 * disassemble.c (disassembler): Test bfd flavour to pick
3119 between OSF and VMS routines. Default to OSF.
3123 * configure.in: Call AC_SUBST (INSTALL_SHLIB).
3124 * configure: Rebuild.
3125 * Makefile.in (install): Use @INSTALL_SHLIB@.
3129 * configure: (bfd_d10v_arch) Add new case.
3130 * configure.in: (bfd_d10v_arch) Add new case.
3131 * d10v-dis.c: New file.
3132 * d10v-opc.c: New file.
3133 * disassemble.c (disassembler) Add entry for d10v.
3137 * m68k-opc.c (m68k_opcodes): Fix bugs in coldfire insns relating
3138 to bcc, trapfl, subxl, and wddata discovered by Andreas Schwab.
3142 * i386-dis.c: Get rid of print_insn_i8086. Use info.mach to
3143 distinguish between variants of the instruction set.
3144 * sparc-dis.c: Get rid of print_insn_sparclite. Use info.mach to
3145 distinguish between variants of the instruction set.
3149 * i386-dis.c (print_insn_i8086): New routine to disassemble using
3150 the 8086 instruction set.
3151 * i386-dis.c: General cleanups. Make most things static. Add
3152 prototypes. Get rid of static variables aflags and dflags. Pass
3153 them as args (to almost everything).
3157 * h8300-dis.c (bfd_h8_disassemble): Handle macregs in ldmac insns.
3159 * h8300-dis.c (bfd_h8_disassemble): Handle "ldm.l" and "stm.l".
3161 * h8300-dis.c (bfd_h8_disassemble): "abs" is implicitly two
3162 if the next arg is marked with SRC_IN_DST. Gross.
3164 * h8300-dis.c (bfd_h8_disassemble): Print "exr" when
3165 we're looking for and find EXR.
3167 * h8300-dis.c (bfd_h8_disassemble): We don't have a match
3168 if we're looking for KBIT and we don't find it.
3170 * h8300-dis.c (bfd_h8_disassemble): Mask off unwanted bits
3173 * h8300-dis.c (bfd_h8_disassemble): Don't set plen for
3174 3bit immediate operands.
3178 * Released binutils 2.7.
3180 * alpha-opc.c: Add new case of "mov". From Klaus Kaempf
3185 * alpha-opc.c: Correct second case of "mov" to use OPRL.
3189 * sparc-dis.c (print_insn_sparclite): New routine to print
3190 sparclite instructions.
3194 * m68k-opc.c (m68k_opcodes): Add coldfire support.
3198 * sparc-opc.c (asi_table): Add #ASI_N, #ASI_N_L, #ASI_NUCLEUS,
3199 #ASI_NUCLEUS_LITTLE. Rename #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_L
3200 to #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_LITTLE.
3204 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir):
3205 Use autoconf-set values.
3206 (docdir, oldincludedir): Removed.
3207 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3211 * alpha-opc.c: New file.
3212 * alpha-opc.h: Remove.
3213 * alpha-dis.c: Complete rewrite to use new opcode table.
3214 * configure.in: For bfd_alpha_arch, use alpha-opc.o.
3215 * configure: Rebuild with autoconf 2.10.
3216 * Makefile.in (ALL_MACHINES): Add alpha-opc.o.
3217 (alpha-dis.o): Depend upon $(INCDIR)/opcode/alpha.h, not
3219 (alpha-opc.o): New target.
3223 * sparc-dis.c (print_insn_sparc): Remove unused local variable i.
3224 Set imm_added_to_rs1 even if the source and destination register
3227 * sparc-opc.c: Add some two operand forms of the wr instruction.
3231 * h8300-dis.c (bfd_h8_disassemble): Rename "hmode" argument
3234 * disassemble.c (disassembler): Handle H8/S.
3235 * h8300-dis.c (print_insn_h8300s): New function for H8/S.
3239 * sparc-opc.c: Add beq/teq as aliases for be/te.
3241 * ppc-opc.c: Fix fcmpo opcode. From Sergei Steshenko
3246 * makefile.vms: New file.
3248 * alpha-dis.c (print_insn_alpha): Print lda ra,lit(rz) as mov.
3252 * h8300-dis.c (bfd_h8_disassemble): Always print ABS8MEM with :8,
3257 * i386-dis.c (OP_OFF): Call append_prefix.
3261 * ppc-opc.c (instruction encoding macros): Add explicit casts to
3262 unsigned long to silence a warning from the Solaris PowerPC
3267 * sparc-opc.c (sparc_opcodes): Add ultrasparc vis extensions.
3271 * sparc-dis.c (X_IMM,X_SIMM): New macros.
3273 (print_insn_sparc): Merge cases i,I,j together. New cases X,Y.
3274 * sparc-opc.c (sparc_opcodes): Use X for 5 bit shift constants,
3275 Y for 6 bit shift constants. Rewrite entries for crdcxt, cwrcxt,
3276 cpush, cpusha, cpull sparclet insns.
3280 * sparc-dis.c (compute_arch_mask): Replace ANSI style def with K&R.
3284 * sparc-opc.c: Set F_FBR on floating point branch instructions.
3285 Set F_FLOAT on other floating point instructions.
3289 * ppc-opc.c (PPC860): Macro for 860/821 specific instructions and
3291 (powerpc_opcodes): Add 860/821 specific SPRs.
3295 * configure.in: Permit --enable-shared to specify a list of
3296 directories. Set and substitute BFD_PICLIST.
3297 * configure: Rebuild.
3298 * Makefile.in (BFD_PICLIST): Rename from BFD_LIST. Change all
3299 uses. Set to @BFD_PICLIST@.
3303 * h8300-dis.c (bfd_h8_disassemble): Use "bit" for L_3 immediates,
3304 not "abs", which may be needed for the absolute in something
3305 like btst #0,@10:8. Print L_3 immediates separately from other
3306 immediates. Change ABSMOV reference to ABS8MEM.
3310 * sparc-dis.c (opcodes_initialized): Move inside print_insn_sparc.
3311 (current_arch_mask): New static global.
3312 (compute_arch_mask): New static function.
3313 (print_insn_sparc): Delete sparc_v9_p. New static local
3314 current_mach. Resort opcode table if current_mach changes.
3315 Generalize "insn not supported" test.
3316 (compare_opcodes): Prefer supported opcodes to nonsupported ones.
3317 Delete test for v9/!v9.
3318 * sparc-opc.c (MASK_*): Use SPARC_OPCODE_ARCH_MASK.
3320 (brfc): Split into CBR and FBR for coprocessor/fp branches.
3321 (brfcx): Renamed to FBRX.
3322 (condfc): Renamed to CONDFC. Pass v6notlet to CBR (standard
3323 coprocessor mnemonics are not supported on the sparclet).
3324 (condf): Renamed to CONDF.
3325 (SLCBCC2): Delete F_ALIAS flag.
3329 * sparc-opc.c (sparc_opcodes): rd must be 0 for
3330 mov foo,{%y,%psr,%wim,%tbr}. Support mov foo,%asrX.
3334 * Makefile.in (config.status): Depend upon BFD VERSION file, so
3335 that the shared library version number is set correctly.
3339 * configure.in: Use AC_CHECK_TOOL to find ar and ranlib. From
3341 * configure: Rebuild.
3345 * z8kgen.c (internal, gas): Call xmalloc rather than unchecked
3350 * configure: Rebuild with autoconf 2.8.
3354 * sparc-dis.c (print_insn_sparc): Handle 'O' operand char like 'r'.
3355 * sparc-opc.c (sparc_opcodes): Use 'O' operand char for `neg reg'.
3359 * configure.in: Don't set SHLIB or SHLINK to an empty string,
3360 since they appear as targets in Makefile.in.
3361 * configure: Rebuild.
3365 * mpw-make.sed: Edit out shared library support bits.
3369 * sparc-opc.c (v8,v6notv9): Add MASK_SPARCLET.
3370 (sparc_opcode_archs): Add MASK_V8 to sparclet entry.
3371 (sparc_opcodes): Add sparclet insns.
3372 (sparclet_cpreg_table): New static local.
3373 (sparc_{encode,decode}_sparclet_cpreg): New functions.
3374 * sparc-dis.c (print_insn_sparc): Handle sparclet cpregs.
3378 * i386-dis.c (index16): New static variable.
3379 (putop): Print jecxz for 32 bit case, jcxz for 16 bit, not the
3381 (OP_indirE): Return result of OP_E.
3382 (OP_E): Check for 16 bit addressing mode, and disassemble
3383 correctly. Optimised 32 bit case a little. Don't print
3384 "(base,index,scale)" when sib specifies only an offset.
3388 * configure.in: Set and substitute SHLIB_DEP.
3389 * configure: Rebuild.
3390 * Makefile.in (SHLIB_DEP): New variable.
3391 (LIBIBERTY_LISTS, BFD_LIST): New variables.
3392 (stamp-piclist): Depend upon LIBIBERTY_LISTS and BFD_LIST. If
3393 COMMON_SHLIB, add them to piclist with appropriate modifications.
3394 ($(SHLIB)): Depend upon $(SHLIB_DEP). Don't check COMMON_SHLIB
3395 here: just use piclist.
3399 * sparc-dis.c (MASK_V9,V9_ONLY_P,V9_P): Define.
3400 (print_insn_sparc): Rewrite v9/not-v9 tests.
3401 (compare_opcodes): Likewise.
3402 * sparc-opc.c (MASK_<ARCH>): Define.
3403 (v6,v7,v8,sparclite,v9,v9a): Redefine.
3404 (sparclet,v6notv9): Define.
3405 (sparc_opcode_archs): Delete member `conflicts'. Add `supported'.
3406 (sparc_opcodes): Delete F_NOTV9, use v6notv9 instead.
3410 * configure.in: Call AC_PROG_CC before configure.host.
3411 * configure: Rebuild.
3413 * Makefile.in (SONAME): Remove leading ../bfd/ from $(SHLIB).
3417 * i386-dis.c (onebyte_has_modrm): New static array.
3418 (twobyte_has_modrm): New static array.
3419 (print_insn_i386): Only fetch the mod/reg/rm byte if it is needed.
3423 * Makefile.in ($(SHLINK)): Check ts against $(SHLIB), not
3428 * ppc-opc.c (PPC): Undef, so default defination on Windows NT
3433 * m68k-opc.c (m68k_opcodes): The bkpt instruction is supported on
3434 m68010up, not just m68020up | cpu32.
3436 * Makefile.in (SONAME): New variable.
3437 ($(SHLINK)): Make a link to the transformed name, as well.
3438 (stamp-tshlink): New target.
3439 (install): Skip stamp-tshlink during install.
3443 * configure.in: Call AC_ARG_PROGRAM.
3444 * configure: Rebuild.
3445 * Makefile.in (program_transform_name): New variable.
3446 (install): Transform library name before installing it.
3450 * i960-dis.c (mem): Add HX dcinva instruction.
3452 Support for building as a shared library, based on patches from
3454 * configure.in: Add AC_ARG_ENABLE for shared and commonbfdlib.
3455 New substitutions: ALLLIBS, PICFLAG, SHLIB, SHLIB_CC,
3456 SHLIB_CFLAGS, COMMON_SHLIB, SHLINK.
3457 * configure: Rebuild.
3458 * Makefile.in (ALLLIBS): New variable.
3459 (PICFLAG, SHLIB, SHLIB_CC, SHLIB_CFLAGS): New variables.
3460 (COMMON_SHLIB, SHLINK): New variables.
3461 (.c.o): If PICFLAG is set, compile twice, once PIC, once normal.
3462 (STAGESTUFF): Remove variable.
3463 (all): Depend upon $(ALLLIBS) rather than $(TARGETLIB).
3464 (stamp-piclist, piclist): New targets.
3465 ($(SHLIB), $(SHLINK)): New targets.
3466 ($(OFILES)): Depend upon stamp-picdir.
3467 (disassemble.o): Build twice if PICFLAG is set.
3468 (MOSTLYCLEAN): Add pic/*.o.
3469 (clean): Remove $(SHLIB), $(SHLINK), piclist, and stamp-piclist.
3470 (distclean): Remove pic and stamp-picdir.
3471 (install): Install shared libraries.
3472 (stamp-picdir): New target.
3476 * sparc-dis.c (print_insn_sparc): Delete DISASM_RAW_INSN support.
3477 Print unknown instruction as "unknown", rather than in hex.
3481 * dis-buf.c: Include "sysdep.h" before "dis-asm.h".
3485 * sparc-opc.c (sparc_opcode_archs): Mark v8/sparclite as conflicting.
3489 * i386-dis.c (print_insn_i386): Only fetch the mod/reg/rm byte
3490 when necessary. From Ulrich Drepper
3495 * sparc-dis.c (print_insn_sparc): NUMOPCODES replaced with
3496 sparc_num_opcodes. Update architecture enum values.
3497 * sparc-opc.c (sparc_opcode_archs): Replaces architecture_pname.
3498 (sparc_opcode_lookup_arch): New function.
3499 (sparc_num_opcodes): Renamed from bfd_sparc_num_opcodes.
3500 (sparc_opcodes): Add v9a shutdown insn.
3504 * sparc-dis.c (print_insn_sparc): Renamed from print_insn.
3505 If DISASM_RAW_INSN, print insn in hex. Handle v9a as opcode
3507 (print_insn_sparc64): Deleted.
3508 * disassemble.c (disassembler, case bfd_arch_sparc): Always use
3511 * sparc-opc.c (architecture_pname): Add v9a.
3515 * alpha-opc.h (alpha_insn_set): VAX floating point opcode was
3516 incorrectly defined as 0x16 when it should be 0x15.
3517 (FLOAT_FORMAT_MASK): function code is 11 bits, not just 7 bits!
3518 (alpha_insn_set): added cvtst and cvttq float ops. Also added
3519 excb (exception barrier) which is defined in the Alpha
3520 Architecture Handbook version 2.
3521 * alpha-dis.c (print_insn_alpha): Fixed special-case decoding for
3522 OPERATE_FORMAT_CODE type instructions. The bug caused mulq to be
3523 disassembled as or, for example.
3527 * mips-dis.c (print_insn_arg): Print cases 'i' and 'u' in hex.
3528 (_print_insn_mips): Change i from int to unsigned int.
3532 * ppc-opc.c (powerpc_opcodes): tlbi POWER opcode form different
3533 from tlbie PowerPC opcode. Add PPC603 tlbld and tlbli.
3537 * i386-dis.c: Added Pentium Pro instructions.
3541 * ppc-opc.c (fsqrt{,.}): Duplicate for PowerPC in addition to
3546 * sh-opc.h (sh_nibble_type): Added REG_B.
3547 (sh_arg_type): Added A_REG_B.
3548 (sh_table): Added pref and bank reg versions of ldc, ldc.l, stc
3550 * sh-dis.c (print_insn_shx): Added cases for REG_B and A_REG_B.
3554 * disassemble.c (disassembler): Use new bfd_big_endian macro.
3558 * Makefile.in (distclean): Remove stamp-h. From Ronald
3564 * alpha-dis.c (print_insn_alpha): fixed decoding of cpys
3569 * sh-opc.h (sh_arg_type): Added A_SSR and A_SPC.
3570 (sh_table): Added many SH3 opcodes.
3571 * sh-dis.c (print_insn_shx): Added cases for A_SSR and A_SPC.
3575 * ppc-opc.c (subfc., subfco): Mark this PPCCOM, not PPC.
3576 (subco,subco.): Mark this PPC, not PPCCOM.
3580 * configure: Rebuild with autoconf 2.7.
3584 * configure: Rebuild with autoconf 2.6.
3588 * configure.in: Sort list of architectures. Accept but do nothing
3589 for alliant, convex, pyramid, romp, and tahoe.
3593 * a29k-dis.c (print_special): Change num to unsigned int.
3597 * a29k-dis.c (print_insn): Cast insn24 to unsigned long when
3602 * configure.in: Call AC_CHECK_PROG to find and cache AR.
3603 * configure: Rebuilt.
3607 * configure.in: Add case for bfd_i860_arch.
3608 * configure: Rebuild.
3612 * m68k-opc.c (m68k_opcodes): Correct fmoveml operands.
3613 * m68k-dis.c (NEXTSINGLE): Change i to unsigned int.
3614 (NEXTDOUBLE): Likewise.
3615 (print_insn_m68k): Don't match fmoveml if there is more than one
3616 register in the list.
3617 (print_insn_arg): Handle a place of '8' for a type of 'L'.
3621 * m68k-opc.c: Use #W rather than #w.
3622 * m68k-dis.c (print_insn_arg): Handle new 'W' place.
3626 * m68k-opc.c (m68k_opcode_aliases): Add dbfw as an alias for dbf,
3627 and likewise for all the dbxx opcodes.
3631 * arc-dis.c: Include elf-bfd.h rather than libelf.h.
3635 * mips-opc.c: Added shorthand (V1) for INSN_4100 manifest. Added
3636 the VR4100 specific instructions to the mips_opcodes structure.
3640 * mpw-config.in, mpw-make.sed: Remove ugly workaround for
3641 ugly Metrowerks bug in CW6, is fixed in CW7.
3645 * ppc-opc.c (whole file): Add flags for common/any support.
3649 * Makefile.in (BISON): Remove macro.
3650 (FLAGS_TO_PASS): Remove BISON.
3656 * m68k-dis.c (print_insn_m68k): Recognize all two-word
3657 instructions that take no args by looking at the match mask.
3658 (print_insn_arg): Always print "%" before register names.
3659 [case 'c']: Use "nc" for the no-cache case, as recognized by gas.
3660 [case '_']: Don't print "@#" before address.
3661 [case 'J']: Use "%s" as format string, not register name.
3662 [case 'B']: Treat place == 'C' like 'l' and 'L'.
3666 * i386-dis.c: Describe cmpxchg8b operand, and spell the opcode
3673 * alpha-opc.h (MEMORY_FUNCTION_FORMAT_MASK): added.
3674 (alpha_insn_set): added definitions for VAX floating point
3675 instructions (Unix compilers don't generate these, but handcoded
3676 assembly might still use them).
3678 * alpha-dis.c (print_insn_alpha): added support for disassembling
3679 the miscellaneous instructions in the Alpha instruction set.
3683 * mpw-config.in: Add m68k-opc.c.o to BFD_MACHINES for m68k,
3684 no longer create sysdep.h, sed ppc-opc.c to work around a
3685 serious Metrowerks C bug.
3686 * mpw-make.in: Remove.
3687 * mpw-make.sed: New file, used by mpw-configure to edit
3688 Makefile.in into an MPW makefile.
3692 * Makefile.in (maintainer-clean): New synonym for realclean.
3696 * m68k-opc.c: Split pmove patterns which use 'P' into patterns
3697 which use '0', '1', and '2' instead. Specify the proper size for
3698 a pmove immediate operand. Correct the pmovefd patterns to be
3699 moves to a register, not from a register.
3700 * m68k-dis.c (print_insn_arg): Replace 'P' with '0', '1', '2'.
3704 * sparc-opc.c (sparc_opcodes): Mark all insns that reference
3705 %psr, %wim, %tbr as F_NOTV9.
3709 * Makefile.in (Makefile): Just rebuild Makefile when running
3711 (config.h, stamp-h): New targets.
3712 * configure.in: Call AC_CONFIG_HEADER and AC_CANONICAL_SYSTEM
3713 earlier. Don't bother to call AC_ARG_PROGRAM. Touch stamp-h when
3714 rebuilding config.h.
3715 * configure: Rebuild.
3717 * mips-opc.c: Change unaligned loads and stores with "t,A"
3718 operands to use "t,A(b)".
3722 * sh-dis.c (print_insn_shx): Add F_FR0 support.
3726 * sh-dis.c (print_insn_shx): Change loop over op->arg[n] to iterate
3727 until 3 instead of until 2.
3731 * Makefile.in (ALL_CFLAGS): Define.
3732 (.c.o, disassemble.o): Use $(ALL_CFLAGS).
3733 (MOSTLYCLEAN): Add config.log.
3734 (distclean): Don't remove config.log.
3735 * configure.in: Substitute HDEFINES.
3736 * configure: Rebuild.
3740 * sh-opc.h (sh_arg_type): Add F_FR0.
3741 (sh_table, case fmac): Add F_FR0 as first argument.
3745 * sh-opc.h (sh_opcode_info): Increase arg array size to 4.
3749 * sparc-dis.c: Remove all references to NO_V9.
3753 * aclocal.m4: Just include ../bfd/aclocal.m4.
3754 * configure: Rebuild.
3758 * sparc-dis.c (X_DISP19): Define.
3759 (print_insn, case 'G'): Use it.
3760 (print_insn, case 'L'): Sign extend displacement.
3764 * configure.in: Run ../bfd/configure.host before AC_PROG_CC.
3765 Subsitute CFLAGS and AR. Call AC_PROG_INSTALL. Don't substitute
3766 host_makefile_frag or frags.
3767 * aclocal.m4: New file.
3768 * configure: Rebuild.
3769 * Makefile.in (INSTALL): Set to @INSTALL@.
3770 (INSTALL_PROGRAM): Set to @INSTALL_PROGRAM@.
3771 (INSTALL_DATA): Set to @INSTALL_DATA@.
3773 (AR_FLAGS): Set to rc rather than qc.
3774 (CC): Define as @CC@.
3775 (CFLAGS): Set to @CFLAGS@.
3776 (@host_makefile_frag@): Remove.
3777 (config.status): Remove dependency upon @frags@.
3779 * configure.in: ../bfd/config.bfd now just sets shell variables.
3780 Use them rather than looking through target Makefile fragments.
3781 * configure: Rebuild.
3785 * sh-opc.h (ftrc): Change FPUL_N to FPUL_M.
3789 * sparc-opc.c (sparc_opcodes): Delete duplicate wr %y insn.
3790 Add clrx, iprefetch, signx, clruw, cas, casl, casx, casxl synthetic
3793 * sparc-opc.c (sparc_opcodes): Fix prefetcha insn.
3794 (lookup_{name,value}): New functions.
3795 (prefetch_table): New static local.
3796 (sparc_{encode,decode}_prefetch): New functions.
3797 * sparc-dis.c (print_insn): Handle '*' arg (prefetch function).
3801 * sh-opc.h: Add blank lines to improve readabililty of sh3e
3806 * sh-dis.c: Correct comment on first line of file.
3810 * disassemble.c (disassembler): Handle bfd_mach_sparc64.
3812 * sparc-opc.c (asi, membar): New static locals.
3813 (sparc_{encode,decode}_{asi,membar}): New functions.
3814 (sparc_opcodes, membar insn): Fix.
3815 * sparc-dis.c (print_insn): Call sparc_decode_asi.
3816 Support decoding of membar masks.
3821 * m68k-opc.c (m68k_opcode_aliases): Add br, brs, brb, brw, brl.
3825 * m68k-opc.c (m68k_opcode_aliases): Add bhib as an alias for bhis,
3826 and likewise for the other branches. Add bhs as an alias for bcc,
3827 and likewise for the size variants. Add dbhs as an alias for
3832 * sh-opc.h (FP sts instructions): Update to match reality.
3836 * m68k-dis.c: (fpcr_names): Add % before all register names.
3837 (reg_names): Likewise.
3838 (print_insn_arg): Don't explicitly print % before register names.
3839 Add % before register names in static array names. In case 'r',
3840 print data registers as `@(Dn)', not `Dn@'. When printing a
3841 memory address, don't print @# before it.
3842 (print_indexed): Change base_disp and outer_disp from int to
3843 bfd_vma. Print using MIT syntax, not mutant invalid Motorola
3844 syntax. Sign extend 8 byte displacement correctly.
3845 (print_base): Print using MIT syntax. Print zpc when appropriate.
3846 Change parameter disp from int to bfd_vma.
3848 * m68k-opc.c (m68k_opcode_aliases): Add jsrl and jsrs as aliases
3853 * sh-dis.c (print_insn_shx): Handle new operand types F_REG_N,
3854 F_REG_M, FPSCR_M, FPSCR_N, FPUL_M and FPUL_N.
3855 * sh-opc.h (sh_arg_type): Add new operand types.
3856 (sh_table): Add new opcodes from SH3E Floating Point ISA.
3860 * Makefile.in (distclean): Remove generated file config.h.
3864 * Makefile.in (distclean): Remove generated file config.h.
3868 * m68k-opc.c: New file, holding tables from include/opcode/m68k.h.
3870 * m68k-dis.c: Remove BREAK_UP_BIG_DECL stuff.
3872 (print_insn_m68k): Change d to be const. Use m68k_numopcodes
3873 rather than numopcodes. Use m68k_opcodes rather than removed
3874 opcode function. Don't check F_ALIAS.
3875 (print_insn_arg): Change first parameter to be const char *.
3876 * Makefile.in (ALL_MACHINES): Add m68k-opc.o.
3877 (m68k-opc.o): New target.
3878 * configure.in: Build m68k-opc.o for bfd_m68k_arch.
3879 * configure: Rebuild.
3883 * sparc-dis.c (HASH_SIZE, HASH_INSN): Define.
3884 (opcode_bits, opcode_hash_table): New variables.
3885 (opcodes_initialized): Renamed from opcodes_sorted.
3886 (build_hash_table): New function.
3887 (is_delayed_branch): Use hash table.
3888 (print_insn): Renamed from print_insn_sparc, made static.
3889 Build and use hash table. If !sparc64, ignore sparc64 insns,
3890 and vice-versa if sparc64.
3891 (print_insn_sparc, print_insn_sparc64): New functions.
3892 (compare_opcodes): Move sparc64 opcodes to end.
3893 Print commutative insns with constant second.
3894 * sparc-opc.c (all non-v9 insns): Use flag F_NOTV9 instead of F_ALIAS.
3898 * sh-dis.c (print_insn_shx): Remove unused local dslot. Use
3899 print_address_func for A_BDISP12 and A_BDISP8. Correct test which
3900 avoids printing a delay slot in a delay slot.
3901 * sh-opc.h (sh_table): Fully bracket last entry.
3905 * sparc-opc.c (sllx, srax, srlx): Fix disassembly.
3909 * configure.in: Get host_makefile_frag from ${srcdir}.
3911 * configure.in: Autoconfiscated. Check for string[s].h. Create
3912 config.h from config.in. Don't set up sysdep.h link.
3913 * sysdep.h: New file.
3914 * configure, config.in: New files, generated from configure.in.
3915 * Makefile.in: Updated to be processed autoconf-style.
3916 (distclean): Keep sysdep.h. Remove config.log and config.cache.
3917 (Makefile): Depend on config.status.
3918 (config.status): New rule.
3919 * configure.bat: Update Makefile substitutions.
3923 * mips-opc.c (L1): Define.
3924 (mips_opcodes): Add R4010 instructions: flushi, flushd, flushid,
3925 addciu, madd, maddu, ffc, ffs, msub, msubu, selsi, selsr, waiti,
3930 * mips-opc.c (mips_opcodes): For the move pseudo-op, prefer daddu
3931 if ISA 3 and addu otherwise, replacing or, since some MIPS chips
3932 have multiple add units but only a single logical unit.
3934 * ppc-opc.c (powerpc_operands): Change CR to use a bitsize of 3,
3935 shifted by 18, without any insertion or extraction function.
3936 (insert_cr, extract_cr): Remove.
3940 * m68k-dis.c (print_insn_arg, print_indexed): Print "%" before
3945 * mpw-config.in: Add sh and i386 configs, remove sparc config.
3946 * sh-opc.h: Add copyright.
3950 * Makefile.in (crunch-m68k): Delete extra target accidentally
3951 checked in a while ago.
3955 * sh-opc.h (sh_table): Add SH3 support.
3959 * sh-opc.h: Added bsrf and braf.
3963 * arm-opc.h (arm_opcodes): Add 64-bit multiply patterns. Delete
3964 bogus [ls]fm{ea,fd} patterns.
3966 * arm-opc.h (arm_opcodes): Correct typos in stm, ldm, std, and ldc.
3967 * arm-dis.c (print_insn_arm): Make GIVEN a parameter, don't try and
3968 initialize it from memory. Make function static.
3969 (print_insn_{big,little}_arm): New functions.
3970 * disassemble.c (disassembler, case bfd_arch_arm): Disassemble for
3971 the correct endianness.
3975 * sh-opc.h (sh_nibble_type, sh_arg_type): remove trailing , from
3980 * m68k-dis.c (opcode): Finish change made by Kung Hsu on April
3981 17th, so that it builds again using GCC as the compiler.
3985 * mips-dis.c (print_insn_little_mips): Cast return value from
3986 bfd_getl32 from bfd_vma to unsigned long, because _print_insn_mips
3987 expects an unsigned long, and that might be fewer words of
3988 argument storage (e.g., if bfd_vma is long long on a 32-bit
3990 (print_insn_big_mips): Likewise with bfd_getb32 value.
3991 (_print_insn_mips): Now static.
3995 * m68k-dis.c: Take out #define BREAK_UP_BIG_DECL kludge, because
3996 gcc memory hog problem with initializer is fixed.
4000 Merge in support for Mac MPW as a host.
4001 (Old change descriptions retained for informational value.)
4003 * mpw-config.in (archname): Compute from the config.
4004 (BFD_MACHINES, ARCHDEFS): Put into mk.tmp.
4006 * mpw-config.in (target_arch): Compute from canonical target.
4007 (m68k, mips, powerpc, sparc): Add architectures.
4008 * mpw-make.in (disassemble.c.o): Add.
4009 (ALL_CFLAGS): Remove special flags (-mc68020 -mc68881 -model far).
4011 * mpw-config.in (BFD_MACHINES): Set to a default value.
4012 * mpw-make.in (BFD_MACHINES): Remove wired-in value.
4014 * mpw-make.in (CSEARCH): Add extra-include to search path.
4016 * mpw-config.in (varargs.h): Don't create.
4017 (sysdep.h): Create using forward-include.
4018 * mpw-make.in (CSEARCH): Add include/mpw to search path.
4020 * mpw-config.in: New file, MPW version of configure.in.
4021 * mpw-make.in: New file, MPW version of Makefile.in.
4025 * alpha-dis.c (print_insn_alpha): Put empty statement after
4030 * hppa-dis.c (sign_extend): Delete, redundant with libhppa.h version.
4031 (low_sign_extend): Likewise.
4032 (get_field): Delete unused function.
4033 (set_field, deposit_14, deposit_21): Likewise.
4037 * i386-dis.c: Support for more pentium opcodes. From Guy Harris
4044 * alpha-opc.h (OSF_ASMCODE): define
4045 print pal-code names as defined in App C of the
4046 Alpha Architecture Reference Manual
4048 * alpha-dis.c: cleaned up output
4049 print stylized code forms as defined in App A.4.3 of the
4050 Alpha Architecture Reference Manual
4054 * mips-opc.c: Add new mips4 instructions. Don't set INSN_RFE for
4056 * mips-dis.c (print_insn_arg): Handle new argument types 'h', 'R',
4061 * m68k-dis.c (opcode): New function. Returns address of opcode
4062 table entry given index, even if the opcode table was split to
4063 work around gcc bugs.
4064 (print_insn_m68k): Call opcode instead of referencing m68k_opcodes
4066 (BREAK_UP_BIG_DECL): Make secondary array static and const.
4067 (reg_names): Now const.
4068 (print_insn_arg): Arrays cacheFieldName and names now const.
4069 (print_indexed): Array scales now const.
4073 * ppc-opc.c: Sort recently added instructions by minor opcode
4074 number within major opcode number.
4078 * hppa-dis.c: Include libhppa.h.
4082 * mips-opc.c: Change dli to use M_DLI, and add dla.
4086 * Makefile.in (ALL_MACHINES): Add w65-dis.o.
4090 * mips-opc.c: Add r4650 mul instruction.
4094 * mips-opc.c: Add uld and usd macros for unaligned double load and
4099 * ppc-opc.c (powerpc_opcodes): Add 403GA opcodes rfci, dccci,
4100 mfdcr, mtdcr, icbt, iccci.
4104 * i960-dis.c (struct tabent, struct sparse_tabent): Change the
4105 signed char fields to shorts, more portable.
4109 * i960-dis.c (struct tabent, struct sparse_tabent): Declare the
4110 char fields as signed chars, since they may have negative values.
4114 * i386-dis.c (dis386_twobyte): Add cpuid, From Charles Hannum
4120 * ppc-opc.c (extract_bdm): Correct parenthezisation.
4121 * ppc-dis.c (print_insn_powerpc): Print .long before unrecognized
4126 * ppc-opc.c: Changes based on patch from David Edelsohn
4128 (powerpc_operands): Add operands SPRBAT and SPRG. Split TBR out of
4131 (insert_tbr): New static function.
4132 (extract_tbr): New static function.
4133 (XFXFXM_MASK, XFXM): Define.
4134 (XSPRBAT_MASK, XSPRG_MASK): Define.
4135 (powerpc_opcodes): Add instructions to access special registers by
4136 name. Add mtcr and mftbu.
4140 * mips-opc.c (P3): Define.
4141 (mips_opcodes): Add mad and madu.
4143 Sun Jan 15 16:32:59 1995 Steve Chamberlain <sac@splat>
4145 * configure.in: Add W65 support.
4146 * disassemble.c: Likewise.
4147 * w65-opc.h, w65-dis.c: New files.
4151 * h8300-dis.c (bfd_h8_disassemble): Add support for 2 bit
4156 * mips-opc.c: Add dli as a synonym for li.
4160 * alpha-dis.c (print_insn_alpha): Handle call_pal instruction, and
4161 print something for reserved opcode values, even if it won't
4164 * mips-dis.c (_print_insn_mips): When initializing, shift right
4165 and mask, to avoid sign extension problems on the Alpha.
4167 * m68k-dis.c (print_insn_arg, case 'J'): Handle buscr and pcr
4172 * sh-opc.h (mov.l gbr): Get direction right.
4173 * sh-dis.c (print_insn_shx): New function.
4174 (print_insn_shl, print_insn_sh): Call print_insn_shx to
4175 print opcodes with right byte order.
4179 * ns32k-dis.c (struct ns32k_option): Renamed from struct option,
4180 to avoid conflicts with getopt.
4184 * hppa-dis.c (print_insn_hppa): Read the instruction using
4185 bfd_getb32, so that it works on a little endian or 64 bit host.
4186 Remove unused local variable op.
4190 * mips-opc.c: Use or instead of addu for pseudo-op move, since
4191 addu does not work correctly if -mips3.
4195 * a29k-dis.c (print_special): Add special register names defined
4196 on 29030, 29040 and 29050.
4197 (print_insn): Handle new operand type 'I'.
4201 * Makefile.in (INSTALL): Use top level install.sh script.
4205 * sparc-dis.c: Rewrite to use bitfields, rather than a union, so
4206 that it works on a little endian host.
4210 * configure.in: Use ${config_shell} when running config.bfd.
4214 * mips-opc.c (mips_opcodes): "dabs" is only available with -mips3.
4218 * a29k-dis.c (print_insn): Print the opcode.
4222 * mips-opc.c (mips_opcodes): Set WR_t for sc and scd.
4226 * hppa-dis.c (reg_names): Use r26-r23 for arg0-arg3.
4230 * mips-opc.c: Set INSN_STORE_MEMORY flag for all instructions
4231 which store a value into memory.
4235 * configure.in, Makefile.in, disassemble.c: Add support for the ARM.
4236 * arm-dis.c, arm-opc.h: New files.
4240 * Makefile.in (ns32k-dis.o): Add dependency.
4241 * ns32k-dis.c (print_insn_arg): Declare initialized local as
4242 string, not as array of chars.
4246 * sparc-dis.c (print_insn_sparc): Handle new operand type 'x'.
4248 * sparc-opc.c: Added sparclite extended FP operations, and
4249 versions of v9 impdep* instructions permitting specification of
4254 * i960-dis.c (reg_names): Now const.
4255 (struct sparse_tabent): New type, copied from array type in mem
4257 (ctrl): Local static array ctrl_tab now const.
4258 (cobr): Local static array cobr_tab now const.
4259 (mem): Local variables reg1, reg2, reg3 now point to const. Local
4260 static variable mem_tab no longer explicitly initialized. Changed
4261 mem_init to const array of struct sparse_tabent.
4262 (reg): Local static variable reg_tab no longer explicitly
4263 initialized. Changed reg_init to const array of struct
4265 (ea): Local static array scale_tab now const.
4267 * i960-dis.c (reg): Added i960JX instructions to reg_init table.
4272 * configure.bat: the disassember needs to be enabled for
4273 "objdump -d" to work in djgpp.
4277 * ns32k-dis.c: Deleted all code in "#ifdef GDB".
4278 (invalid_float): Enabled general version, doesn't require running
4279 on ns32k host. Changed to take char* argument, and test for
4280 explicitly specified sizes, instead of using sizeof() on host CPU
4282 (INVALID_FLOAT): Cast first argument.
4283 (opt_u, opt_U, opt_O, opt_C, opt_S, list_P532, list_M532,
4284 list_P032, list_M032): Now const.
4285 (optlist, list_search): Made appropriate arguments now point to
4287 (print_insn_arg): Changed static array of one-character-string
4288 pointers into a static const array of characters; fixed sprintf
4289 statement accordingly.
4293 * opcodes/ns32k-dis.c: Semi-new file. Had apparently been dropped
4294 from distribution. A ns32k-dis.c from a previous distribution has
4295 been brought up to date and supports the new interface.
4297 * disassemble.c: define ARCH_ns32k and add case bfd_arch_ns32k.
4299 * configure.in: add bfd_ns32k_arch target support.
4301 * Makefile.in: add ns32k-dis.o to ALL_MACHINES.
4302 Add ns32k-dis.c to CFILES. Add dependencies for ns32k-dis.o.
4306 * h8300-dis.c (bfd_h8_disassemble): Get 16bit branch
4311 * h8300-dis.c, mips-dis.c: Don't use true and false.
4315 * configure.in: Change --with-targets to --enable-targets.
4319 * mips-dis.c (_print_insn_mips): Build a static hash table mapping
4320 opcodes to the first instruction with that opcode, to speed
4326 * Makefile.in (mostlyclean): Fix typo (was mostyclean).
4330 * configure.bat: update to latest makefile.in
4334 * a29k-dis.c (print_insn): Print 'x' type operand in hex.
4335 * h8300-dis.c (bfd_h8_disassemble): Print 16bit rels correctly.
4336 * sh-dis.c (print_insn_sh): Don't recur endlessly if delay
4337 slot insn is in a delay slot.
4338 * z8k-opc.h: (resflg): Fix patterns.
4339 * h8500-opc.h Fix CR insn patterns.
4343 * ppc-opc.c (powerpc_opcodes): Put PowerPC versions of "cmp" and
4344 "cmpl" before POWER versions, so that gas -many uses them.
4348 * disassemble.c: New file.
4349 * Makefile.in (OFILES): Add disassemble.o.
4350 (disassemble.o): Provide dependencies; compile with $(ARCHDEFS).
4351 * configure.in: Define ARCHDEFS in Makefile. Code taken from
4352 binutils/configure.in.
4354 * m68k-dis.c (print_insn_m68k): If F_ALIAS flag is set, skip the
4355 opcode being examined.
4359 * ppc-opc.c (powerpc_operands): Added RAL, RAM and RAS.
4360 (insert_ral, insert_ram, insert_ras): New functions.
4361 (powerpc_opcodes): Use RAL for load with update, RAM for lmw, and
4362 RAS for store with update.
4366 * ppc-opc.c (powerpc_opcodes): Correct fcir. From David Edelsohn
4371 * mips-opc.c (mips_opcodes): Correct operands of "nor" with an
4376 * sparc-opc.c (sparc_opcodes): Fix "rd %fprs,%l0".
4380 * ppc-opc.c (powerpc_operands): The signedp field has been
4381 removed, so don't initialize it. Set the PPC_OPERAND_SIGNED flag
4382 instead. Add new operand SISIGNOPT.
4383 (powerpc_opcodes): For lis, liu, addis, and cau use SISIGNOPT.
4385 * ppc-dis.c (print_insn_powerpc): Check PPC_OPERAND_SIGNED rather
4390 * i386-dis.c (struct private): Renamed to dis_private. `private'
4391 is a reserved word for dynix cc.
4395 * configure.in: Change error message to refer to bfd/config.bfd
4396 rather than bfd/configure.in.
4400 * ppc-opc.c: Define POWER2 as short alias flag.
4401 (powerpc_opcodes): Add POWER/2 opcodes lfq*, stfq*, fcir[z], and
4406 * i960-dis.c (print_insn_i960): Don't read a second word for
4407 opcodes 0, 1, 2 and 3.
4411 * configure.in: Don't build m68881-ext.o for bfd_m68k_arch.
4415 * m68881-ext.c: Removed; no longer used.
4416 * Makefile.in: Changed accordingly.
4418 * m68k-dis.c (ext_format_68881): Don't declare.
4419 (print_insn_m68k): If an instruction uses place 'i', it uses at
4420 least four fixed bytes.
4421 (print_insn_arg): Don't bump p by 2 for case 'I', place 'i'. For
4422 extended float, convert to double using floatformat_to_double, not
4423 ieee_extended_to_double, and fetch the data before converting it.
4427 * mips-opc.c: It's sqrt.s, not sqrt.w. From
4432 * ppc-opc.c (powerpc_opcodes): The POWER uses bdn[l][a] where the
4433 PowerPC uses bdnz[l][a].
4437 * dis-buf.c, i386-dis.c: Include sysdep.h.
4441 * configure.in (bfd_powerpc_arch): Use ppc-dis.o and ppc-opc.o.
4443 * ppc-opc.c (powerpc_opcodes): Mark POWER instructions supported
4444 by Motorola PowerPC 601 with PPC_OPCODE_601.
4445 * ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc):
4446 Disassemble Motorola PowerPC 601 instructions as well as normal
4447 PowerPC instructions.
4451 * i960-dis.c (reg, mem): Just use a static array instead of
4456 * hppa-dis.c (print_insn_hppa): For '?' and '@' only adjust the
4457 condition name index if this is for a negated condition.
4459 * hppa-dis.c (print_insn_hppa): No space before 'H' operand.
4460 Floating point format for 'H' operand is backwards from normal
4461 case (0 == double, 1 == single). For '4', '6', '7', '9', and '8'
4462 operands (fmpyadd and fmpysub), handle bizarre register
4463 translation correctly for single precision format.
4465 * hppa-dis.c (print_insn_hppa): Do not emit a space after 'F'
4466 or 'I' operands if the next format specifier is 'M' (fcmp
4467 condition completer).
4471 * ppc-opc.c (powerpc_operands): New operand type MBE to handle a
4472 single number giving a bitmask for the MB and ME fields of an M
4473 form instruction. Change NB to accept 32, and turn it into 0;
4474 also turn 0 into 32 when disassembling. Seperated SH from NB.
4475 (insert_mbe, extract_mbe): New functions.
4476 (insert_nb, extract_nb): New functions.
4477 (SC_MASK): Mask out SA and LK bits.
4478 (powerpc_opcodes): Change "cal" to use RT, D, RA rather than RT,
4479 RA, SI. Change "liu" and "cau" to use UI rather than SI. Mark
4480 "bctr" and "bctrl" as accepted by POWER. Change "rlwimi",
4481 "rlimi", "rlwimi.", "rlimi.", "rlwinm", "rlinm", "rlwinm.",
4482 "rlinm.", "rlmi", "rlmi.", "rlwnm", "rlnm", "rlwnm.", "rlnm." to
4483 use MBE rather than MB. Add "mfmq" and "mtmq" POWER instructions.
4484 (powerpc_macros): Define table of macro definitions.
4485 (powerpc_num_macros): Define.
4487 * ppc-dis.c (print_insn_powerpc): Don't skip optional operands
4488 if PPC_OPERAND_NEXT is set.
4492 * i960-dis.c (print_insn_i960): Make buffer bfd_byte instead of
4493 char. Retrieve contents using bfd_getl32 instead of shifting.
4497 * ppc-opc.c: New file. Opcode table for PowerPC, including
4498 opcodes for POWER (RS/6000).
4499 * ppc-dis.c: New file. PowerPC and Power (RS/6000) disassembler.
4500 * Makefile.in (ALL_MACHINES): Add ppc-dis.o and ppc-opc.o.
4501 (CFILES): Add ppc-dis.c.
4502 (ppc-dis.o, ppc-opc.o): New targets.
4503 * configure.in: Build ppc-dis.o and ppc-opc.o for bfd_rs6000_arch.
4507 * hppa-dis.c (print_insn_hppa): Handle 'N' in assembler template.
4508 No space before 'u', 'f', or 'N'.
4512 * i386-dis.c (print_insn_i386): Add FIXME comment regarding reading
4513 farther than we should.
4515 * i386-dis.c (dis386): Use Yb and Yv for scasb and scasS.
4519 * sparc-dis.c m68k-dis.c alpha-dis.c a29k-dis.c: Fix comments.
4523 * i960-dis.c (print_insn_i960): Only read word2 if the instruction
4524 needs it, to prevent reading past the end of a section.
4528 * mips-opc.h: Use macro for j instruction, to support SVR4 PIC.
4529 Removed t,A case for la; always use t,A(b) case.
4534 * mips-dis.c (print_insn_arg): Handle 'k'.
4535 * mips-opc.c: Make cache use k, not t.
4539 * alpha-opc.h, alpha-dis.c (print_insn_alpha): Add
4540 FLOAT_MEMORY_FORMAT_CODE, FLOAT_BRANCH_FORMAT_CODE, correct
4541 FLOAT_FORMAT_CODE to put out floating point register names.
4545 * mips-opc.c: Use macros for jal variants, to support SVR4 PIC.
4549 * a29k-dis.c (print_insn): Use 0x%08x, not 0x%8x.
4553 * mips-opc.c (dsll, dsra, dsrl): Added '>' cases for shift counts
4554 larger than 32. Moved dsxx32 variants first for disassembler.
4558 * z8kgen.c, z8k-opc.h: Add full lda information.
4562 * hppa-dis.c (print_insn_hppa): Do not emit a space after
4563 movb instructions. Any necessary space will be emitted by
4564 the code to handle nullification completers.
4568 * mips-opc.c: Moved l.d down so that it disassembles as ldc1.
4572 * alpha-opc.h: Add ldl_l, fix typo for ldq_u.
4573 * alpha-dis.c (print_insn_alpha): Add code for PAL_FORMAT_CODE.
4577 * mips-opc.c: Correct lwu opcode value (book had it wrong).
4581 * z8k-dis.c (FETCH_DATA): get just the right amount of data.
4582 (unpack_instr): Cope with ARG_IMM4M1 type instructions.
4586 * m88k-dis.c (m88kdis): comment change. Remove space after
4588 (printop): handle new arg types DEC and XREG for m88110.
4592 * hppa-dis.c (print_insn_hppa): Handle 'z' operand
4593 type for absolute branch addresses. Delete special
4594 "ble" and "be" code in 'W' operand code.
4598 * mips-opc.c: Set hazard information correctly for branch
4599 likely instructions.
4603 * alpha-dis.c (print_insn_alpha), alpha-opc.h: Fix bugs, use
4604 info->fprintf_func for printing and info->print_address_func for
4609 * mips-opc.c: Set INSN_TRAP for tXX instructions.
4614 Corrected second case of "b" for disassembler.
4618 * mips-dis.c, m88k-dis.c: Don't include libbfd.h. Changed calls
4619 to BFD swapping routines to correspond to BFD name changes.
4623 * mips-opc.c: Change div machine instruction to be z,s,t rather
4624 than s,t. Change div macro to be d,v,t rather than d,s,t.
4625 Likewise for divu, ddiv, ddivu. Added z,s,t case for drem, dremu,
4626 rem and remu which generates only the corresponding div
4627 instruction. This is for compatibility with the MIPS assembler,
4628 which only generates the simple machine instruction when an
4629 explicit destination of $0 is used.
4630 * mips-dis.c (print_insn_arg): Handle 'z' (always register zero).
4635 WR_31 hazard for bal, bgezal, bltzal.
4639 * hppa-dis.c (print_insn_hppa): Use print function
4640 from within the disassemble_info, not fprintf_filtered.
4644 * hppa-dis.c (print_insn_hppa): Handle '|' like '>'. (From Jeff
4649 * mips-opc.c ("absu"): Removed.
4654 * mips-opc.c: Added r6000 and r4000 instructions and macros.
4655 Changed hazard information to distinguish between memory load
4656 delays and coprocessor load delays.
4660 * mips-opc.c: li.d uses "T,L", not "S,F". Added li.s.
4664 * configure.in: Don't pass cpu to config.bfd.
4668 * m88k-dis.c (m88kdis): Make class unsigned.
4672 * alpha-dis.c (print_insn_alpha): One branch format case was
4673 missing the instruction name.
4677 * Makefile.in (ALL_MACHINES): Renamed from DIS_LIBS.
4678 Add the arch-specific auxiliary files.
4679 (OFILES): Remove the arch-specific auxiliary files
4680 and use BFD_MACHINES instead of DIS_LIBS.
4681 * configure.in: Set BFD_MACHINES based on --with-targets option.
4685 * mips-opc.c: Added lwc1 E,A(b) to go with lwc1 T,A(b). Similarly
4690 * sparc-opc.c: Change CONST to const to deal with gcc
4691 -Dconst=__const -traditional.
4696 coprocessor instructions out of #if 0, and made them use new
4701 * sparc-dis.c: Include ansidecl.h before opcodes/sparc.h.
4705 * sparc-opc.c: Add F_JSR, F_UNBR, or F_CONDBR flags to each branch
4706 instruction, for use by the disassembler.
4708 * sparc-dis.c (SEX): Add sign extension macro. Replace many
4709 hand-coded sign extensions that depended on 32-bit host ints.
4710 FIXME, we still depend on big-endian host bitfield ordering.
4711 (sparc_print_insn): Set the insn_info_valid field, and the
4712 other fields that describe the instruction being printed.
4716 * sparc-opc.c (call): Accept all 6 addressing modes valid for
4717 `jmp' instead of just one of them.
4721 * hppa-dis.c: Move floating registers from reg_names to fp_reg_names.
4722 (fput_fp_reg_r): Renamed from fput_reg_r.
4723 (fput_fp_reg): New function.
4724 (print_insn_hppa): Use fput_fp_reg{,_r} where appropriate.
4726 * hppa-dis.c (print_insn_hppa, cases 'a', 'd'): Print space afterwards.
4728 * hppa-dis.c (print_insn_hppa, case 'd'): Use GET_COND not GET_FIELD.
4732 * hppa-dis.c (print_insn_hppa): Use extract_5r_store for 'r'.
4734 * hppa-dis.c (print_insn_hppa, case '>'): If next character is 'n',
4735 don't output a space.
4737 * hppa-dis.c (float_format_names): 10 is undefined, and 11 is quad.
4741 * mips-opc.c: New file, containing opcode table from
4742 ../include/opcode/mips.h.
4743 * Makefile.in: Add it.
4747 * m88k-dis.c: New file, moved in from gdb and changed to use the
4748 new dis-asm.h disassembler interface.
4749 * Makefile.in (DIS_LIBS): Added m88k-dis.o.
4750 (m88k-dis.o): New target.
4754 * mips-dis.c (print_insn_arg, _print_insn_mips): Made pointer to
4755 argument string const char * to correspond to opcode/mips.h.
4759 * mips-dis.c: Updated to account for name changes in new version
4761 * Makefile.in: Added header file dependencies.
4765 * h8300-dis.c (bfd_h8_disassemble): Correct fetching of instruction.
4769 * m68k-dis.c (NEXTWORD, NEXTLONG): Use ((x) ^ 0x8000) - 0x8000 to sign
4770 extend, rather than shifts.
4774 * Makefile.in: Undo 15 June change.
4778 * m68k-dis.c (print_insn_arg): Change return value to byte count
4780 * m68k-dis.c: Re-write to detect invalid operands before
4781 printing anything, so we can handle this the same way we
4782 handle invalid opcodes.
4786 * sh-dis.c, sh-opc.h: Understand some more opcodes.
4790 * hppa-dis.c: Include <ansidecl.h> and sysdep.h before other
4795 * sparc-dis.c: Don't declare qsort, since sysdep.h might.
4797 * configure.in: Do make sysdep.h link.
4798 * Makefile.in: Search ../include. Don't search ../bfd.
4803 * hppa-dis.c: Fix typo. 'a' and 'd' were reversed.
4804 Do not print a space before the completers specified by
4809 * mips-dis.c: No longer need to bomb out if HOST_64_BIT is
4810 defined, since gdb has been fixed.
4813 * hppa-dis.c (print_insn_hppa): Last argument to fput_reg,
4814 fput_reg_r, fput_creg, fput_const, and fputs_filtered should
4815 be a *disassemble_info, not a *FILE.
4816 * hppa-dis.c: Support 'd', '!', and 'a'.
4817 * hppa-dis.c: Support 's' to extract a 2 bit space register.
4818 * hppa-dis.c: Delete cases which are no longer needed.
4822 * m68k-dis.c (print_insn_{m68k,arg}): Add MMU codes.
4826 * h8300-dis.c: New file, removed from bfd/cpu-h8300.c, with
4831 * Makefile.in (CSEARCH): Add -I../bfd for sysdep.h and bfd.h.
4832 * configure.in: No longer need to configure to get sysdep.h.
4837 * hppa-dis.c: Support 'I', 'J', and 'K' in output
4838 templates for 1.1 FP computational instructions.
4842 * h8500-dis.c (print_insn_h8500): Address argument is type
4844 * z8k-dis.c (print_insn_z8k, print_insn_z8001, print_insn_z8002):
4847 * h8500-opc.h (addr_class_type): No comma at end of enumerator.
4848 * sh-opc.h (sh_nibble_type, sh_arg_type): Ditto.
4850 * sparc-dis.c (compare_opcodes): Move static declaration to
4855 * sparc-dis.c (print_insn_sparc): Implement 'n' argument for unimp
4856 instruction, remove unimp hack from 'l' argument.
4860 * z8k-dis.c (fetch_data): Use unsigned char to make ancient gcc's
4866 * mips-dis.c (print_insn_arg): Handle 'C' for general coprocessor
4871 * hppa-dis.c: Include dis-asm.h before sysdep.h. Changed some
4872 arrays of string pointers to 2-d arrays of chars, to save
4877 * a29k-dis.c, alpha-dis.c, i960-dis.c, sparc-dis.c, z8k-dis.c:
4878 Cast second arg to read_memory_func to "bfd_byte *", as necessary.
4882 * hppa-dis.c: New file from Utah, adapted to new disassembler
4884 * Makefile.in: Include it.
4888 * sh-dis.c, sh-opc.h: New files.
4892 * alpha-dis.c, alpha-opc.h: New files.
4896 * mips-dis.c: Sign extend 'j' and 'b' arguments, delta is a signed
4901 * sparc-dis.c: Make "ta" the default trap instruction, "t" the alias.
4905 * a29k-dis.c, sparc-dis.c, sparc-opc.c: Use CONST rather than
4910 * sparc-dis.c: Use fprintf_func a few places where I forgot,
4911 and double percent signs a few places.
4913 * a29k-dis.c, i960-dis.c: New, merged from gdb and binutils.
4915 * i386-dis.c, m68k-dis.c, mips-dis.c, sparc-dis.c:
4916 Use info->print_address_func not print_address.
4918 * dis-buf.c (generic_print_address): New function.
4922 * Makefile.in: Add sparc-dis.c.
4923 sparc-dis.c: New file, merges binutils and gdb versions as follows:
4925 Add `add' instruction to the set that get checked
4926 for a preceding `sethi' in order to print an absolute address.
4927 * (print_insn): Disassembly prefers real instructions.
4928 (is_delayed_branch): Speed up.
4929 * sparc-opcode.h: Add ALIAS bit to aliases. Fix up opcode tables.
4930 Still missing some float ops, and needs testing.
4931 * sparc-pinsn.c (print_insn): Eliminate 'set' test, subsumed by
4932 F_ALIAS. Use printf, not fprintf, when not passing a file
4934 (compare_opcodes): Check that identical instructions have
4935 identical opcodes, complain otherwise.
4938 * Include reg_names.
4940 Use dis-asm.h/read_memory_func interface.
4944 * h8500-dis.c, i386-dis.c, m68k-dis.c, z8k-dis.c (fetch_data):
4945 deliberately return non-zero to setjmp from longjmp. Otherwise
4946 this code fails to compile.
4950 * m68k-dis.c: Fix prototype for fetch_arg().
4954 * dis-buf.c: New file, for new read_memory_func interface.
4955 Makefile.in (OFILES): Include it.
4956 m68k-dis.c, i386-dis.c, h8500-dis.c, mips-dis.c, z8k-dis.c:
4957 Use new read_memory_func interface.
4961 * h8500-dis.c (print_insn_h8500): Get sign of fp offsets right.
4962 * h8500-opc.h: Fix couple of opcodes.
4964 Wed Mar 24 02:03:36 1993 david d `zoo' zuhn (zoo at poseidon.cygnus.com)
4966 * Makefile.in: add dvi & installcheck targets
4970 * Makefile.in: Update for h8500-dis.c.
4974 * h8500-dis.c, h8500-opc.h: New files
4978 * mips-dis.c, z8k-dis.c: Converted to use interface defined in
4979 ../include/dis-asm.h.
4980 * m68k-dis.c: New file (merge of ../binutils/m68k-pinsn.c
4981 and ../gdb/m68k-pinsn.c).
4982 * i386-dis.c: New file (merge of ../binutils/i386-pinsn.c
4983 and ../gdb/i386-pinsn.c).
4984 * m68881-ext.c: New file. Moved definition of
4985 ext_format ext_format_68881 from ../gdb/m68k-tdep.c.
4986 * Makefile.in: Adjust for new files.
4988 * m68k-dis.c: Recognize '9' placement code, so (say) pflush
4989 can be dis-assembled.
4993 * mips-dis.c (print_insn_arg): Now returns void.
4997 * mips-dis.c (ansidecl.h): Include for benefit of sysdep.h
4998 files that use the macros.
5002 * mips-dis.c: New file, from gdb/mips-pinsn.c.
5003 * Makefile.in (DIS_LIBS): Added mips-dis.o.
5004 (CFILES): Added mips-dis.c.
5008 * z8k-dis.c (print_insn_z8001, print_insn_z8002): new routines
5009 * z8kgen.c, z8k-opc.h: fix sizes of some shifts.
5013 * Makefile.in: Improve *clean rules.
5014 * configure.in: Allow a default host.
5016 Tue Nov 17 19:53:54 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com)
5018 * Makefile.in: also use -I$(srcdir)/../bfd, since some sysdep
5019 files include other sysdep files
5023 * z8k-dis.c z8k-opc.h z8kgen.c: checkpoint
5027 * configure.in: For host support, use ../bfd/configure.host
5028 so it stays in sync with the ../bfd/hosts database.
5030 Thu Oct 1 23:38:54 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com)
5032 * configure.in: use cpu-vendor-os triple instead of nested cases
5036 * z8k-dis.c (unparse_instr): fix bug where opcode returned was
5037 *always* the wrong one.
5041 * z8kgen.c: added copyright info
5045 * z8k-dis.c (unparse_instr): prettier tabs
5046 * z8kgen.c -> z8k-opc.h: bug fixes in tables
5048 Fri Sep 25 12:50:32 1992 Stu Grossman (grossman at cygnus.com)
5050 * configure.in: Add ncr* configuration.
5051 * z8k-dis.c (struct instr_data_s): Make instr_asmsrc char to make
5052 picayune ANSI compilers happy.
5056 * configure.in (i386): Make i386 and i486 synonymous for now.
5057 * configure.in (i[34]86-*-sysv4): Add my_host definition.
5061 * Makefile.in (install): Fix typo.
5065 * Makefile.in (make): Remove obsolete crud.
5066 (sparc-opc.o): Avoid Sun Make VPATH bug.
5070 * Makefile.in: since there are no SUBDIRS, remove rule and
5071 references of subdir_do.
5075 * Makefile.in (install): Get the library name right here too.
5076 Don't install bfd.h, since it's unrelated to this library. No
5077 subdirs to recurse into, either.
5078 (CFILES): The source file has a .c suffix, not .o.
5080 * sparc-opc.c: New file, moved from BFD.
5081 * Makefile.in (OFILES): Build it.
5085 * z8k-dis.c: fixed forward refferences of some declarations.
5089 * Makefile.in: get the name of the library right
5093 * z8k-dis.c: knows how to disassemble z8k stuff
5094 * z8k-opc.h: new file full of z8000 opcodes
5098 version-control: never