1 /* tc-mn10300.c -- Assembler code for the Matsushita 10300
2 Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
25 #include "opcode/mn10300.h"
26 #include "dwarf2dbg.h"
28 /* Structure to hold information about predefined registers. */
35 /* Generic assembler global variables which must be defined by all
38 /* Characters which always start a comment. */
39 const char comment_chars[] = "#";
41 /* Characters which start a comment at the beginning of a line. */
42 const char line_comment_chars[] = ";#";
44 /* Characters which may be used to separate multiple commands on a
46 const char line_separator_chars[] = ";";
48 /* Characters which are used to indicate an exponent in a floating
50 const char EXP_CHARS[] = "eE";
52 /* Characters which mean that a number is a floating point constant,
54 const char FLT_CHARS[] = "dD";
56 const relax_typeS md_relax_table[] = {
59 {0x7fff, -0x8000, 5, 2},
60 {0x7fffffff, -0x80000000, 7, 0},
62 /* bCC relaxing (uncommon cases) */
64 {0x7fff, -0x8000, 6, 5},
65 {0x7fffffff, -0x80000000, 8, 0},
68 {0x7fff, -0x8000, 5, 7},
69 {0x7fffffff, -0x80000000, 7, 0},
72 {0x7fff, -0x8000, 4, 9},
73 {0x7fffffff, -0x80000000, 6, 0},
77 {0x7fff, -0x8000, 3, 12},
78 {0x7fffffff, -0x80000000, 5, 0},
82 /* Local functions. */
83 static void mn10300_insert_operand PARAMS ((unsigned long *, unsigned long *,
84 const struct mn10300_operand *,
85 offsetT, char *, unsigned,
87 static unsigned long check_operand PARAMS ((unsigned long,
88 const struct mn10300_operand *,
90 static int reg_name_search PARAMS ((const struct reg_name *, int, const char *));
91 static boolean data_register_name PARAMS ((expressionS *expressionP));
92 static boolean address_register_name PARAMS ((expressionS *expressionP));
93 static boolean other_register_name PARAMS ((expressionS *expressionP));
94 static void set_arch_mach PARAMS ((int));
96 /* Set linkrelax here to avoid fixups in most sections. */
99 static int current_machine;
102 #define MAX_INSN_FIXUPS (5)
107 bfd_reloc_code_real_type reloc;
109 struct mn10300_fixup fixups[MAX_INSN_FIXUPS];
112 /* We must store the value of each register operand so that we can
113 verify that certain registers do not match. */
114 int mn10300_reg_operands[MN10300_MAX_OPERANDS];
116 const char *md_shortopts = "";
117 struct option md_longopts[] = {
118 {NULL, no_argument, NULL, 0}
120 size_t md_longopts_size = sizeof (md_longopts);
122 /* The target specific pseudo-ops which we support. */
123 const pseudo_typeS md_pseudo_table[] =
125 { "file", dwarf2_directive_file, 0 },
126 { "loc", dwarf2_directive_loc, 0 },
127 { "am30", set_arch_mach, AM30 },
128 { "am33", set_arch_mach, AM33 },
129 { "mn10300", set_arch_mach, MN103 },
133 #define HAVE_AM33 (current_machine == AM33)
134 #define HAVE_AM30 (current_machine == AM30)
136 /* Opcode hash table. */
137 static struct hash_control *mn10300_hash;
139 /* This table is sorted. Suitable for searching by a binary search. */
140 static const struct reg_name data_registers[] =
147 #define DATA_REG_NAME_CNT \
148 (sizeof (data_registers) / sizeof (struct reg_name))
150 static const struct reg_name address_registers[] =
158 #define ADDRESS_REG_NAME_CNT \
159 (sizeof (address_registers) / sizeof (struct reg_name))
161 static const struct reg_name r_registers[] =
205 #define R_REG_NAME_CNT \
206 (sizeof (r_registers) / sizeof (struct reg_name))
208 static const struct reg_name xr_registers[] =
233 #define XR_REG_NAME_CNT \
234 (sizeof (xr_registers) / sizeof (struct reg_name))
236 static const struct reg_name other_registers[] =
243 #define OTHER_REG_NAME_CNT \
244 (sizeof (other_registers) / sizeof (struct reg_name))
246 /* reg_name_search does a binary search of the given register table
247 to see if "name" is a valid regiter name. Returns the register
248 number from the array on success, or -1 on failure. */
251 reg_name_search (regs, regcount, name)
252 const struct reg_name *regs;
256 int middle, low, high;
264 middle = (low + high) / 2;
265 cmp = strcasecmp (name, regs[middle].name);
271 return regs[middle].value;
277 /* Summary of register_name().
279 * in: Input_line_pointer points to 1st char of operand.
281 * out: A expressionS.
282 * The operand may have been a register: in this case, X_op == O_register,
283 * X_add_number is set to the register number, and truth is returned.
284 * Input_line_pointer->(next non-blank) char after operand, or is in
285 * its original state.
289 r_register_name (expressionP)
290 expressionS *expressionP;
297 /* Find the spelling of the operand. */
298 start = name = input_line_pointer;
300 c = get_symbol_end ();
301 reg_number = reg_name_search (r_registers, R_REG_NAME_CNT, name);
303 /* Look to see if it's in the register table. */
306 expressionP->X_op = O_register;
307 expressionP->X_add_number = reg_number;
309 /* Make the rest nice. */
310 expressionP->X_add_symbol = NULL;
311 expressionP->X_op_symbol = NULL;
313 /* Put back the delimiting char. */
314 *input_line_pointer = c;
319 /* Reset the line as if we had not done anything. */
320 /* Put back the delimiting char. */
321 *input_line_pointer = c;
323 /* Reset input_line pointer. */
324 input_line_pointer = start;
329 /* Summary of register_name().
331 * in: Input_line_pointer points to 1st char of operand.
333 * out: A expressionS.
334 * The operand may have been a register: in this case, X_op == O_register,
335 * X_add_number is set to the register number, and truth is returned.
336 * Input_line_pointer->(next non-blank) char after operand, or is in
337 * its original state.
341 xr_register_name (expressionP)
342 expressionS *expressionP;
349 /* Find the spelling of the operand. */
350 start = name = input_line_pointer;
352 c = get_symbol_end ();
353 reg_number = reg_name_search (xr_registers, XR_REG_NAME_CNT, name);
355 /* Look to see if it's in the register table. */
358 expressionP->X_op = O_register;
359 expressionP->X_add_number = reg_number;
361 /* Make the rest nice. */
362 expressionP->X_add_symbol = NULL;
363 expressionP->X_op_symbol = NULL;
365 /* Put back the delimiting char. */
366 *input_line_pointer = c;
371 /* Reset the line as if we had not done anything. */
372 /* Put back the delimiting char. */
373 *input_line_pointer = c;
375 /* Reset input_line pointer. */
376 input_line_pointer = start;
381 /* Summary of register_name().
383 * in: Input_line_pointer points to 1st char of operand.
385 * out: A expressionS.
386 * The operand may have been a register: in this case, X_op == O_register,
387 * X_add_number is set to the register number, and truth is returned.
388 * Input_line_pointer->(next non-blank) char after operand, or is in
389 * its original state.
393 data_register_name (expressionP)
394 expressionS *expressionP;
401 /* Find the spelling of the operand. */
402 start = name = input_line_pointer;
404 c = get_symbol_end ();
405 reg_number = reg_name_search (data_registers, DATA_REG_NAME_CNT, name);
407 /* Look to see if it's in the register table. */
410 expressionP->X_op = O_register;
411 expressionP->X_add_number = reg_number;
413 /* Make the rest nice. */
414 expressionP->X_add_symbol = NULL;
415 expressionP->X_op_symbol = NULL;
417 /* Put back the delimiting char. */
418 *input_line_pointer = c;
423 /* Reset the line as if we had not done anything. */
424 /* Put back the delimiting char. */
425 *input_line_pointer = c;
427 /* Reset input_line pointer. */
428 input_line_pointer = start;
433 /* Summary of register_name().
435 * in: Input_line_pointer points to 1st char of operand.
437 * out: A expressionS.
438 * The operand may have been a register: in this case, X_op == O_register,
439 * X_add_number is set to the register number, and truth is returned.
440 * Input_line_pointer->(next non-blank) char after operand, or is in
441 * its original state.
445 address_register_name (expressionP)
446 expressionS *expressionP;
453 /* Find the spelling of the operand. */
454 start = name = input_line_pointer;
456 c = get_symbol_end ();
457 reg_number = reg_name_search (address_registers, ADDRESS_REG_NAME_CNT, name);
459 /* Look to see if it's in the register table. */
462 expressionP->X_op = O_register;
463 expressionP->X_add_number = reg_number;
465 /* Make the rest nice. */
466 expressionP->X_add_symbol = NULL;
467 expressionP->X_op_symbol = NULL;
469 /* Put back the delimiting char. */
470 *input_line_pointer = c;
475 /* Reset the line as if we had not done anything. */
476 /* Put back the delimiting char. */
477 *input_line_pointer = c;
479 /* Reset input_line pointer. */
480 input_line_pointer = start;
486 /* Summary of register_name().
488 * in: Input_line_pointer points to 1st char of operand.
490 * out: A expressionS.
491 * The operand may have been a register: in this case, X_op == O_register,
492 * X_add_number is set to the register number, and truth is returned.
493 * Input_line_pointer->(next non-blank) char after operand, or is in
494 * its original state.
498 other_register_name (expressionP)
499 expressionS *expressionP;
506 /* Find the spelling of the operand. */
507 start = name = input_line_pointer;
509 c = get_symbol_end ();
510 reg_number = reg_name_search (other_registers, OTHER_REG_NAME_CNT, name);
512 /* Look to see if it's in the register table. */
515 expressionP->X_op = O_register;
516 expressionP->X_add_number = reg_number;
518 /* Make the rest nice. */
519 expressionP->X_add_symbol = NULL;
520 expressionP->X_op_symbol = NULL;
522 /* Put back the delimiting char. */
523 *input_line_pointer = c;
528 /* Reset the line as if we had not done anything. */
529 /* Put back the delimiting char. */
530 *input_line_pointer = c;
532 /* Reset input_line pointer. */
533 input_line_pointer = start;
539 md_show_usage (stream)
542 fprintf (stream, _("MN10300 options:\n\
547 md_parse_option (c, arg)
548 int c ATTRIBUTE_UNUSED;
549 char *arg ATTRIBUTE_UNUSED;
555 md_undefined_symbol (name)
556 char *name ATTRIBUTE_UNUSED;
562 md_atof (type, litp, sizep)
568 LITTLENUM_TYPE words[4];
584 return "bad call to md_atof";
587 t = atof_ieee (input_line_pointer, type, words);
589 input_line_pointer = t;
593 for (i = prec - 1; i >= 0; i--)
595 md_number_to_chars (litp, (valueT) words[i], 2);
603 md_convert_frag (abfd, sec, fragP)
604 bfd *abfd ATTRIBUTE_UNUSED;
608 static unsigned long label_count = 0;
611 subseg_change (sec, 0);
612 if (fragP->fr_subtype == 0)
614 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
615 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
619 else if (fragP->fr_subtype == 1)
621 /* Reverse the condition of the first branch. */
622 int offset = fragP->fr_fix;
623 int opcode = fragP->fr_literal[offset] & 0xff;
660 fragP->fr_literal[offset] = opcode;
662 /* Create a fixup for the reversed conditional branch. */
663 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
664 fix_new (fragP, fragP->fr_fix + 1, 1,
665 symbol_new (buf, sec, 0, fragP->fr_next),
666 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
668 /* Now create the unconditional branch + fixup to the
670 fragP->fr_literal[offset + 2] = 0xcc;
671 fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol,
672 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
676 else if (fragP->fr_subtype == 2)
678 /* Reverse the condition of the first branch. */
679 int offset = fragP->fr_fix;
680 int opcode = fragP->fr_literal[offset] & 0xff;
717 fragP->fr_literal[offset] = opcode;
719 /* Create a fixup for the reversed conditional branch. */
720 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
721 fix_new (fragP, fragP->fr_fix + 1, 1,
722 symbol_new (buf, sec, 0, fragP->fr_next),
723 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
725 /* Now create the unconditional branch + fixup to the
727 fragP->fr_literal[offset + 2] = 0xdc;
728 fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol,
729 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
733 else if (fragP->fr_subtype == 3)
735 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
736 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
740 else if (fragP->fr_subtype == 4)
742 /* Reverse the condition of the first branch. */
743 int offset = fragP->fr_fix;
744 int opcode = fragP->fr_literal[offset + 1] & 0xff;
763 fragP->fr_literal[offset + 1] = opcode;
765 /* Create a fixup for the reversed conditional branch. */
766 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
767 fix_new (fragP, fragP->fr_fix + 2, 1,
768 symbol_new (buf, sec, 0, fragP->fr_next),
769 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
771 /* Now create the unconditional branch + fixup to the
773 fragP->fr_literal[offset + 3] = 0xcc;
774 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
775 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
779 else if (fragP->fr_subtype == 5)
781 /* Reverse the condition of the first branch. */
782 int offset = fragP->fr_fix;
783 int opcode = fragP->fr_literal[offset + 1] & 0xff;
799 fragP->fr_literal[offset + 1] = opcode;
801 /* Create a fixup for the reversed conditional branch. */
802 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
803 fix_new (fragP, fragP->fr_fix + 2, 1,
804 symbol_new (buf, sec, 0, fragP->fr_next),
805 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
807 /* Now create the unconditional branch + fixup to the
809 fragP->fr_literal[offset + 3] = 0xdc;
810 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
811 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
815 else if (fragP->fr_subtype == 6)
817 int offset = fragP->fr_fix;
818 fragP->fr_literal[offset] = 0xcd;
819 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
820 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
824 else if (fragP->fr_subtype == 7)
826 int offset = fragP->fr_fix;
827 fragP->fr_literal[offset] = 0xdd;
828 fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3];
829 fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4];
831 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
832 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
836 else if (fragP->fr_subtype == 8)
838 int offset = fragP->fr_fix;
839 fragP->fr_literal[offset] = 0xfa;
840 fragP->fr_literal[offset + 1] = 0xff;
841 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
842 fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL);
846 else if (fragP->fr_subtype == 9)
848 int offset = fragP->fr_fix;
849 fragP->fr_literal[offset] = 0xfc;
850 fragP->fr_literal[offset + 1] = 0xff;
852 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
853 fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL);
857 else if (fragP->fr_subtype == 10)
859 fragP->fr_literal[fragP->fr_fix] = 0xca;
860 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
861 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
865 else if (fragP->fr_subtype == 11)
867 int offset = fragP->fr_fix;
868 fragP->fr_literal[offset] = 0xcc;
870 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
871 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
875 else if (fragP->fr_subtype == 12)
877 int offset = fragP->fr_fix;
878 fragP->fr_literal[offset] = 0xdc;
880 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
881 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
890 md_section_align (seg, addr)
894 int align = bfd_get_section_alignment (stdoutput, seg);
895 return ((addr + (1 << align) - 1) & (-1 << align));
901 char *prev_name = "";
902 register const struct mn10300_opcode *op;
904 mn10300_hash = hash_new ();
906 /* Insert unique names into hash table. The MN10300 instruction set
907 has many identical opcode names that have different opcodes based
908 on the operands. This hash table then provides a quick index to
909 the first opcode with a particular name in the opcode table. */
911 op = mn10300_opcodes;
914 if (strcmp (prev_name, op->name))
916 prev_name = (char *) op->name;
917 hash_insert (mn10300_hash, op->name, (char *) op);
922 /* Set the default machine type. */
923 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, MN103))
924 as_warn (_("could not set architecture and machine"));
926 current_machine = MN103;
934 struct mn10300_opcode *opcode;
935 struct mn10300_opcode *next_opcode;
936 const unsigned char *opindex_ptr;
937 int next_opindex, relaxable;
938 unsigned long insn, extension, size = 0, real_size;
943 /* Get the opcode. */
944 for (s = str; *s != '\0' && !isspace (*s); s++)
949 /* Find the first opcode with the proper name. */
950 opcode = (struct mn10300_opcode *) hash_find (mn10300_hash, str);
953 as_bad (_("Unrecognized opcode: `%s'"), str);
958 while (isspace (*str))
961 input_line_pointer = str;
970 errmsg = _("Invalid opcode/operands");
972 /* Reset the array of register operands. */
973 memset (mn10300_reg_operands, -1, sizeof (mn10300_reg_operands));
979 insn = opcode->opcode;
982 /* If the instruction is not available on the current machine
983 then it can not possibly match. */
985 && !(opcode->machine == AM33 && HAVE_AM33)
986 && !(opcode->machine == AM30 && HAVE_AM30))
989 for (op_idx = 1, opindex_ptr = opcode->operands;
991 opindex_ptr++, op_idx++)
993 const struct mn10300_operand *operand;
996 if (next_opindex == 0)
998 operand = &mn10300_operands[*opindex_ptr];
1002 operand = &mn10300_operands[next_opindex];
1006 while (*str == ' ' || *str == ',')
1009 if (operand->flags & MN10300_OPERAND_RELAX)
1012 /* Gather the operand. */
1013 hold = input_line_pointer;
1014 input_line_pointer = str;
1016 if (operand->flags & MN10300_OPERAND_PAREN)
1018 if (*input_line_pointer != ')' && *input_line_pointer != '(')
1020 input_line_pointer = hold;
1024 input_line_pointer++;
1027 /* See if we can match the operands. */
1028 else if (operand->flags & MN10300_OPERAND_DREG)
1030 if (!data_register_name (&ex))
1032 input_line_pointer = hold;
1037 else if (operand->flags & MN10300_OPERAND_AREG)
1039 if (!address_register_name (&ex))
1041 input_line_pointer = hold;
1046 else if (operand->flags & MN10300_OPERAND_SP)
1048 char *start = input_line_pointer;
1049 char c = get_symbol_end ();
1051 if (strcasecmp (start, "sp") != 0)
1053 *input_line_pointer = c;
1054 input_line_pointer = hold;
1058 *input_line_pointer = c;
1061 else if (operand->flags & MN10300_OPERAND_RREG)
1063 if (!r_register_name (&ex))
1065 input_line_pointer = hold;
1070 else if (operand->flags & MN10300_OPERAND_XRREG)
1072 if (!xr_register_name (&ex))
1074 input_line_pointer = hold;
1079 else if (operand->flags & MN10300_OPERAND_USP)
1081 char *start = input_line_pointer;
1082 char c = get_symbol_end ();
1084 if (strcasecmp (start, "usp") != 0)
1086 *input_line_pointer = c;
1087 input_line_pointer = hold;
1091 *input_line_pointer = c;
1094 else if (operand->flags & MN10300_OPERAND_SSP)
1096 char *start = input_line_pointer;
1097 char c = get_symbol_end ();
1099 if (strcasecmp (start, "ssp") != 0)
1101 *input_line_pointer = c;
1102 input_line_pointer = hold;
1106 *input_line_pointer = c;
1109 else if (operand->flags & MN10300_OPERAND_MSP)
1111 char *start = input_line_pointer;
1112 char c = get_symbol_end ();
1114 if (strcasecmp (start, "msp") != 0)
1116 *input_line_pointer = c;
1117 input_line_pointer = hold;
1121 *input_line_pointer = c;
1124 else if (operand->flags & MN10300_OPERAND_PC)
1126 char *start = input_line_pointer;
1127 char c = get_symbol_end ();
1129 if (strcasecmp (start, "pc") != 0)
1131 *input_line_pointer = c;
1132 input_line_pointer = hold;
1136 *input_line_pointer = c;
1139 else if (operand->flags & MN10300_OPERAND_EPSW)
1141 char *start = input_line_pointer;
1142 char c = get_symbol_end ();
1144 if (strcasecmp (start, "epsw") != 0)
1146 *input_line_pointer = c;
1147 input_line_pointer = hold;
1151 *input_line_pointer = c;
1154 else if (operand->flags & MN10300_OPERAND_PLUS)
1156 if (*input_line_pointer != '+')
1158 input_line_pointer = hold;
1162 input_line_pointer++;
1165 else if (operand->flags & MN10300_OPERAND_PSW)
1167 char *start = input_line_pointer;
1168 char c = get_symbol_end ();
1170 if (strcasecmp (start, "psw") != 0)
1172 *input_line_pointer = c;
1173 input_line_pointer = hold;
1177 *input_line_pointer = c;
1180 else if (operand->flags & MN10300_OPERAND_MDR)
1182 char *start = input_line_pointer;
1183 char c = get_symbol_end ();
1185 if (strcasecmp (start, "mdr") != 0)
1187 *input_line_pointer = c;
1188 input_line_pointer = hold;
1192 *input_line_pointer = c;
1195 else if (operand->flags & MN10300_OPERAND_REG_LIST)
1197 unsigned int value = 0;
1198 if (*input_line_pointer != '[')
1200 input_line_pointer = hold;
1206 input_line_pointer++;
1208 /* We used to reject a null register list here; however,
1209 we accept it now so the compiler can emit "call"
1210 instructions for all calls to named functions.
1212 The linker can then fill in the appropriate bits for the
1213 register list and stack size or change the instruction
1214 into a "calls" if using "call" is not profitable. */
1215 while (*input_line_pointer != ']')
1220 if (*input_line_pointer == ',')
1221 input_line_pointer++;
1223 start = input_line_pointer;
1224 c = get_symbol_end ();
1226 if (strcasecmp (start, "d2") == 0)
1229 *input_line_pointer = c;
1231 else if (strcasecmp (start, "d3") == 0)
1234 *input_line_pointer = c;
1236 else if (strcasecmp (start, "a2") == 0)
1239 *input_line_pointer = c;
1241 else if (strcasecmp (start, "a3") == 0)
1244 *input_line_pointer = c;
1246 else if (strcasecmp (start, "other") == 0)
1249 *input_line_pointer = c;
1252 && strcasecmp (start, "exreg0") == 0)
1255 *input_line_pointer = c;
1258 && strcasecmp (start, "exreg1") == 0)
1261 *input_line_pointer = c;
1264 && strcasecmp (start, "exother") == 0)
1267 *input_line_pointer = c;
1270 && strcasecmp (start, "all") == 0)
1273 *input_line_pointer = c;
1277 input_line_pointer = hold;
1282 input_line_pointer++;
1283 mn10300_insert_operand (&insn, &extension, operand,
1284 value, (char *) NULL, 0, 0);
1288 else if (data_register_name (&ex))
1290 input_line_pointer = hold;
1294 else if (address_register_name (&ex))
1296 input_line_pointer = hold;
1300 else if (other_register_name (&ex))
1302 input_line_pointer = hold;
1306 else if (HAVE_AM33 && r_register_name (&ex))
1308 input_line_pointer = hold;
1312 else if (HAVE_AM33 && xr_register_name (&ex))
1314 input_line_pointer = hold;
1318 else if (*str == ')' || *str == '(')
1320 input_line_pointer = hold;
1332 errmsg = _("illegal operand");
1335 errmsg = _("missing operand");
1341 mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG;
1343 mask |= MN10300_OPERAND_RREG | MN10300_OPERAND_XRREG;
1344 if ((operand->flags & mask) == 0)
1346 input_line_pointer = hold;
1351 if (opcode->format == FMT_D1 || opcode->format == FMT_S1)
1353 else if (opcode->format == FMT_D2
1354 || opcode->format == FMT_D4
1355 || opcode->format == FMT_S2
1356 || opcode->format == FMT_S4
1357 || opcode->format == FMT_S6
1358 || opcode->format == FMT_D5)
1360 else if (opcode->format == FMT_D7)
1362 else if (opcode->format == FMT_D8 || opcode->format == FMT_D9)
1367 mn10300_insert_operand (&insn, &extension, operand,
1368 ex.X_add_number, (char *) NULL,
1371 /* And note the register number in the register array. */
1372 mn10300_reg_operands[op_idx - 1] = ex.X_add_number;
1377 /* If this operand can be promoted, and it doesn't
1378 fit into the allocated bitfield for this insn,
1379 then promote it (ie this opcode does not match). */
1381 & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX)
1382 && !check_operand (insn, operand, ex.X_add_number))
1384 input_line_pointer = hold;
1389 mn10300_insert_operand (&insn, &extension, operand,
1390 ex.X_add_number, (char *) NULL,
1395 /* If this operand can be promoted, then this opcode didn't
1396 match since we can't know if it needed promotion! */
1397 if (operand->flags & MN10300_OPERAND_PROMOTE)
1399 input_line_pointer = hold;
1404 /* We need to generate a fixup for this expression. */
1405 if (fc >= MAX_INSN_FIXUPS)
1406 as_fatal (_("too many fixups"));
1407 fixups[fc].exp = ex;
1408 fixups[fc].opindex = *opindex_ptr;
1409 fixups[fc].reloc = BFD_RELOC_UNUSED;
1415 str = input_line_pointer;
1416 input_line_pointer = hold;
1418 while (*str == ' ' || *str == ',')
1423 /* Make sure we used all the operands! */
1427 /* If this instruction has registers that must not match, verify
1428 that they do indeed not match. */
1429 if (opcode->no_match_operands)
1433 /* Look at each operand to see if it's marked. */
1434 for (i = 0; i < MN10300_MAX_OPERANDS; i++)
1436 if ((1 << i) & opcode->no_match_operands)
1440 /* operand I is marked. Check that it does not match any
1441 operands > I which are marked. */
1442 for (j = i + 1; j < MN10300_MAX_OPERANDS; j++)
1444 if (((1 << j) & opcode->no_match_operands)
1445 && mn10300_reg_operands[i] == mn10300_reg_operands[j])
1447 errmsg = _("Invalid register specification.");
1459 next_opcode = opcode + 1;
1460 if (!strcmp (next_opcode->name, opcode->name))
1462 opcode = next_opcode;
1466 as_bad ("%s", errmsg);
1472 while (isspace (*str))
1476 as_bad (_("junk at end of line: `%s'"), str);
1478 input_line_pointer = str;
1480 /* Determine the size of the instruction. */
1481 if (opcode->format == FMT_S0)
1484 if (opcode->format == FMT_S1 || opcode->format == FMT_D0)
1487 if (opcode->format == FMT_S2 || opcode->format == FMT_D1)
1490 if (opcode->format == FMT_D6)
1493 if (opcode->format == FMT_D7 || opcode->format == FMT_D10)
1496 if (opcode->format == FMT_D8)
1499 if (opcode->format == FMT_D9)
1502 if (opcode->format == FMT_S4)
1505 if (opcode->format == FMT_S6 || opcode->format == FMT_D5)
1508 if (opcode->format == FMT_D2)
1511 if (opcode->format == FMT_D4)
1516 if (relaxable && fc > 0)
1523 /* Handle bra specially. Basically treat it like jmp so
1524 that we automatically handle 8, 16 and 32 bit offsets
1525 correctly as well as jumps to an undefined address.
1527 It is also important to not treat it like other bCC
1528 instructions since the long forms of bra is different
1529 from other bCC instructions. */
1530 if (opcode->opcode == 0xca00)
1542 else if (size == 3 && opcode->opcode == 0xcc0000)
1544 /* bCC (uncommon cases) */
1548 f = frag_var (rs_machine_dependent, 8, 8 - size, type,
1549 fixups[0].exp.X_add_symbol,
1550 fixups[0].exp.X_add_number,
1551 (char *)fixups[0].opindex);
1553 /* This is pretty hokey. We basically just care about the
1554 opcode, so we have to write out the first word big endian.
1556 The exception is "call", which has two operands that we
1559 The first operand (the register list) happens to be in the
1560 first instruction word, and will be in the right place if
1561 we output the first word in big endian mode.
1563 The second operand (stack size) is in the extension word,
1564 and we want it to appear as the first character in the extension
1565 word (as it appears in memory). Luckily, writing the extension
1566 word in big endian format will do what we want. */
1567 number_to_chars_bigendian (f, insn, size > 4 ? 4 : size);
1570 number_to_chars_bigendian (f + 4, extension, 4);
1571 number_to_chars_bigendian (f + 8, 0, size - 8);
1574 number_to_chars_bigendian (f + 4, extension, size - 4);
1578 /* Allocate space for the instruction. */
1579 f = frag_more (size);
1581 /* Fill in bytes for the instruction. Note that opcode fields
1582 are written big-endian, 16 & 32bit immediates are written
1583 little endian. Egad. */
1584 if (opcode->format == FMT_S0
1585 || opcode->format == FMT_S1
1586 || opcode->format == FMT_D0
1587 || opcode->format == FMT_D6
1588 || opcode->format == FMT_D7
1589 || opcode->format == FMT_D10
1590 || opcode->format == FMT_D1)
1592 number_to_chars_bigendian (f, insn, size);
1594 else if (opcode->format == FMT_S2
1595 && opcode->opcode != 0xdf0000
1596 && opcode->opcode != 0xde0000)
1598 /* A format S2 instruction that is _not_ "ret" and "retf". */
1599 number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1);
1600 number_to_chars_littleendian (f + 1, insn & 0xffff, 2);
1602 else if (opcode->format == FMT_S2)
1604 /* This must be a ret or retf, which is written entirely in
1605 big-endian format. */
1606 number_to_chars_bigendian (f, insn, 3);
1608 else if (opcode->format == FMT_S4
1609 && opcode->opcode != 0xdc000000)
1611 /* This must be a format S4 "call" instruction. What a pain. */
1612 unsigned long temp = (insn >> 8) & 0xffff;
1613 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1614 number_to_chars_littleendian (f + 1, temp, 2);
1615 number_to_chars_bigendian (f + 3, insn & 0xff, 1);
1616 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
1618 else if (opcode->format == FMT_S4)
1620 /* This must be a format S4 "jmp" instruction. */
1621 unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff);
1622 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1623 number_to_chars_littleendian (f + 1, temp, 4);
1625 else if (opcode->format == FMT_S6)
1627 unsigned long temp = ((insn & 0xffffff) << 8)
1628 | ((extension >> 16) & 0xff);
1629 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1630 number_to_chars_littleendian (f + 1, temp, 4);
1631 number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1);
1632 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
1634 else if (opcode->format == FMT_D2
1635 && opcode->opcode != 0xfaf80000
1636 && opcode->opcode != 0xfaf00000
1637 && opcode->opcode != 0xfaf40000)
1639 /* A format D2 instruction where the 16bit immediate is
1640 really a single 16bit value, not two 8bit values. */
1641 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1642 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
1644 else if (opcode->format == FMT_D2)
1646 /* A format D2 instruction where the 16bit immediate
1647 is really two 8bit immediates. */
1648 number_to_chars_bigendian (f, insn, 4);
1650 else if (opcode->format == FMT_D4)
1652 unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff);
1654 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1655 number_to_chars_littleendian (f + 2, temp, 4);
1657 else if (opcode->format == FMT_D5)
1659 unsigned long temp = (((insn & 0xffff) << 16)
1660 | ((extension >> 8) & 0xffff));
1662 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1663 number_to_chars_littleendian (f + 2, temp, 4);
1664 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
1666 else if (opcode->format == FMT_D8)
1668 unsigned long temp = ((insn & 0xff) << 16) | (extension & 0xffff);
1670 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
1671 number_to_chars_bigendian (f + 3, (temp & 0xff), 1);
1672 number_to_chars_littleendian (f + 4, temp >> 8, 2);
1674 else if (opcode->format == FMT_D9)
1676 unsigned long temp = ((insn & 0xff) << 24) | (extension & 0xffffff);
1678 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
1679 number_to_chars_littleendian (f + 3, temp, 4);
1682 /* Create any fixups. */
1683 for (i = 0; i < fc; i++)
1685 const struct mn10300_operand *operand;
1687 operand = &mn10300_operands[fixups[i].opindex];
1688 if (fixups[i].reloc != BFD_RELOC_UNUSED)
1690 reloc_howto_type *reloc_howto;
1695 reloc_howto = bfd_reloc_type_lookup (stdoutput,
1701 size = bfd_get_reloc_size (reloc_howto);
1703 if (size < 1 || size > 4)
1707 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
1708 size, &fixups[i].exp,
1709 reloc_howto->pc_relative,
1714 int reloc, pcrel, reloc_size, offset;
1717 reloc = BFD_RELOC_NONE;
1718 /* How big is the reloc? Remember SPLIT relocs are
1719 implicitly 32bits. */
1720 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
1722 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
1725 reloc_size = operand->bits;
1727 /* Is the reloc pc-relative? */
1728 pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0;
1730 /* Gross. This disgusting hack is to make sure we
1731 get the right offset for the 16/32 bit reloc in
1732 "call" instructions. Basically they're a pain
1733 because the reloc isn't at the end of the instruction. */
1734 if ((size == 5 || size == 7)
1735 && (((insn >> 24) & 0xff) == 0xcd
1736 || ((insn >> 24) & 0xff) == 0xdd))
1739 /* Similarly for certain bit instructions which don't
1740 hav their 32bit reloc at the tail of the instruction. */
1742 && (((insn >> 16) & 0xffff) == 0xfe00
1743 || ((insn >> 16) & 0xffff) == 0xfe01
1744 || ((insn >> 16) & 0xffff) == 0xfe02))
1747 offset = size - reloc_size / 8;
1749 /* Choose a proper BFD relocation type. */
1752 if (reloc_size == 32)
1753 reloc = BFD_RELOC_32_PCREL;
1754 else if (reloc_size == 16)
1755 reloc = BFD_RELOC_16_PCREL;
1756 else if (reloc_size == 8)
1757 reloc = BFD_RELOC_8_PCREL;
1763 if (reloc_size == 32)
1764 reloc = BFD_RELOC_32;
1765 else if (reloc_size == 16)
1766 reloc = BFD_RELOC_16;
1767 else if (reloc_size == 8)
1768 reloc = BFD_RELOC_8;
1773 /* Convert the size of the reloc into what fix_new_exp wants. */
1774 reloc_size = reloc_size / 8;
1775 if (reloc_size == 8)
1777 else if (reloc_size == 16)
1779 else if (reloc_size == 32)
1782 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
1783 reloc_size, &fixups[i].exp, pcrel,
1784 ((bfd_reloc_code_real_type) reloc));
1787 fixP->fx_offset += offset;
1792 if (debug_type == DEBUG_DWARF2)
1793 dwarf2_generate_asm_lineno (real_size);
1796 /* If while processing a fixup, a reloc really needs to be created
1797 then it is done here. */
1800 tc_gen_reloc (seg, fixp)
1801 asection *seg ATTRIBUTE_UNUSED;
1805 reloc = (arelent *) xmalloc (sizeof (arelent));
1807 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1808 if (reloc->howto == (reloc_howto_type *) NULL)
1810 as_bad_where (fixp->fx_file, fixp->fx_line,
1811 _("reloc %d not supported by object file format"),
1812 (int) fixp->fx_r_type);
1815 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1817 if (fixp->fx_addsy && fixp->fx_subsy)
1820 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
1821 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
1823 as_bad_where (fixp->fx_file, fixp->fx_line,
1824 "Difference of symbols in different sections is not supported");
1828 reloc->sym_ptr_ptr = (asymbol **) &bfd_abs_symbol;
1829 reloc->addend = (S_GET_VALUE (fixp->fx_addsy)
1830 - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset);
1834 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1835 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1836 reloc->addend = fixp->fx_offset;
1842 md_estimate_size_before_relax (fragp, seg)
1846 if (fragp->fr_subtype == 0)
1848 if (fragp->fr_subtype == 3)
1850 if (fragp->fr_subtype == 6)
1852 if (!S_IS_DEFINED (fragp->fr_symbol)
1853 || seg != S_GET_SEGMENT (fragp->fr_symbol))
1855 fragp->fr_subtype = 7;
1861 if (fragp->fr_subtype == 8)
1863 if (!S_IS_DEFINED (fragp->fr_symbol)
1864 || seg != S_GET_SEGMENT (fragp->fr_symbol))
1866 fragp->fr_subtype = 9;
1872 if (fragp->fr_subtype == 10)
1874 if (!S_IS_DEFINED (fragp->fr_symbol)
1875 || seg != S_GET_SEGMENT (fragp->fr_symbol))
1877 fragp->fr_subtype = 12;
1887 md_pcrel_from (fixp)
1890 if (fixp->fx_addsy != (symbolS *) NULL && !S_IS_DEFINED (fixp->fx_addsy))
1892 /* The symbol is undefined. Let the linker figure it out. */
1895 return fixp->fx_frag->fr_address + fixp->fx_where;
1899 md_apply_fix3 (fixp, valuep, seg)
1904 char *fixpos = fixp->fx_where + fixp->fx_frag->fr_literal;
1908 assert (fixp->fx_r_type < BFD_RELOC_UNUSED);
1910 /* This should never happen. */
1911 if (seg->flags & SEC_ALLOC)
1914 /* The value we are passed in *valuep includes the symbol values.
1915 Since we are using BFD_ASSEMBLER, if we are doing this relocation
1916 the code in write.c is going to call bfd_install_relocation, which
1917 is also going to use the symbol value. That means that if the
1918 reloc is fully resolved we want to use *valuep since
1919 bfd_install_relocation is not being used.
1921 However, if the reloc is not fully resolved we do not want to use
1922 *valuep, and must use fx_offset instead. However, if the reloc
1923 is PC relative, we do want to use *valuep since it includes the
1924 result of md_pcrel_from. */
1925 if (fixp->fx_addsy == (symbolS *) NULL || fixp->fx_pcrel)
1928 value = fixp->fx_offset;
1931 /* If the fix is relative to a symbol which is not defined, or not
1932 in the same segment as the fix, we cannot resolve it here. */
1933 if (fixp->fx_addsy != NULL
1934 && (! S_IS_DEFINED (fixp->fx_addsy)
1935 || (S_GET_SEGMENT (fixp->fx_addsy) != seg)))
1941 switch (fixp->fx_r_type)
1955 case BFD_RELOC_VTABLE_INHERIT:
1956 case BFD_RELOC_VTABLE_ENTRY:
1960 case BFD_RELOC_NONE:
1962 as_bad_where (fixp->fx_file, fixp->fx_line,
1963 _("Bad relocation fixup type (%d)"), fixp->fx_r_type);
1966 md_number_to_chars (fixpos, value, size);
1973 /* Return nonzero if the fixup in FIXP will require a relocation,
1974 even it if appears that the fixup could be completely handled
1978 mn10300_force_relocation (fixp)
1981 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1982 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1988 /* Return zero if the fixup in fixp should be left alone and not
1992 mn10300_fix_adjustable (fixp)
1995 /* Prevent all adjustments to global symbols. */
1996 if (S_IS_EXTERN (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy))
1999 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2000 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2006 /* Insert an operand value into an instruction. */
2009 mn10300_insert_operand (insnp, extensionp, operand, val, file, line, shift)
2010 unsigned long *insnp;
2011 unsigned long *extensionp;
2012 const struct mn10300_operand *operand;
2018 /* No need to check 32bit operands for a bit. Note that
2019 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
2020 if (operand->bits != 32
2021 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
2027 bits = operand->bits;
2028 if (operand->flags & MN10300_OPERAND_24BIT)
2031 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
2033 max = (1 << (bits - 1)) - 1;
2034 min = - (1 << (bits - 1));
2038 max = (1 << bits) - 1;
2044 if (test < (offsetT) min || test > (offsetT) max)
2047 _("operand out of range (%s not between %ld and %ld)");
2050 sprint_value (buf, test);
2051 if (file == (char *) NULL)
2052 as_warn (err, buf, min, max);
2054 as_warn_where (file, line, err, buf, min, max);
2058 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
2060 *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1);
2061 *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1))
2064 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
2066 *insnp |= (val >> (24 - operand->bits)) & ((1 << operand->bits) - 1);
2067 *extensionp |= ((val & ((1 << (24 - operand->bits)) - 1))
2070 else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0)
2072 *insnp |= (((long) val & ((1 << operand->bits) - 1))
2073 << (operand->shift + shift));
2075 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
2076 *insnp |= (((long) val & ((1 << operand->bits) - 1))
2077 << (operand->shift + shift + operand->bits));
2081 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
2082 << (operand->shift + shift));
2084 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
2085 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
2086 << (operand->shift + shift + operand->bits));
2090 static unsigned long
2091 check_operand (insn, operand, val)
2092 unsigned long insn ATTRIBUTE_UNUSED;
2093 const struct mn10300_operand *operand;
2096 /* No need to check 32bit operands for a bit. Note that
2097 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
2098 if (operand->bits != 32
2099 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
2105 bits = operand->bits;
2106 if (operand->flags & MN10300_OPERAND_24BIT)
2109 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
2111 max = (1 << (bits - 1)) - 1;
2112 min = - (1 << (bits - 1));
2116 max = (1 << bits) - 1;
2122 if (test < (offsetT) min || test > (offsetT) max)
2131 set_arch_mach (mach)
2134 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, mach))
2135 as_warn (_("could not set architecture and machine"));
2137 current_machine = mach;
2143 if (debug_type == DEBUG_DWARF2)