3 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
4 and simBE when DEBUG is defined.
8 * interp.c (interrupt_event): New function. Pass exception event
9 onto exception handler.
11 * configure.in: Check for stdlib.h.
12 * configure: Regenerate.
14 * gencode.c (build_instruction): Add UNUSED attribute to tempS
16 (build_instruction): Initialize memval1.
17 (build_instruction): Add UNUSED attribute to byte, bigend,
19 (build_operands): Ditto.
21 * interp.c: Fix GCC warnings.
22 (sim_get_quit_code): Delete.
24 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
26 * configure: Re-generate.
28 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
32 * interp.c (mips_option_handler): New function parse argumes using
34 (myname): Replace with STATE_MY_NAME.
35 (sim_open): Delete check for host endianness - performed by
37 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
38 (sim_open): Move much of the initialization from here.
39 (sim_load): To here. After the image has been loaded and
41 (sim_open): Move ColdReset from here.
42 (sim_create_inferior): To here.
43 (sim_open): Make FP check less dependant on host endianness.
45 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
47 * interp.c (sim_set_callbacks): Delete.
49 * interp.c (membank, membank_base, membank_size): Replace with
50 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
51 (sim_open): Remove call to callback->init. gdb/run do this.
55 * sim-main.h (SIM_HAVE_FLATMEM): Define.
57 * interp.c (big_endian_p): Delete, replaced by
58 current_target_byte_order.
62 * interp.c (host_read_long, host_read_word, host_swap_word,
63 host_swap_long): Delete. Using common sim-endian.
64 (sim_fetch_register, sim_store_register): Use H2T.
65 (pipeline_ticks): Delete. Handled by sim-events.
67 (sim_engine_run): Update.
71 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
73 (SignalException): To here. Signal using sim_engine_halt.
74 (sim_stop_reason): Delete, moved to common.
78 * interp.c (sim_open): Add callback argument.
79 (sim_set_callbacks): Delete SIM_DESC argument.
84 * Makefile.in (SIM_OBJS): Add common modules.
86 * interp.c (sim_set_callbacks): Also set SD callback.
87 (set_endianness, xfer_*, swap_*): Delete.
88 (host_read_word, host_read_long, host_swap_word, host_swap_long):
89 Change to functions using sim-endian macros.
90 (control_c, sim_stop): Delete, use common version.
91 (simulate): Convert into.
92 (sim_engine_run): This function.
95 * interp.c (simulation): New variable - the simulator object.
96 (sim_kind): Delete global - merged into simulation.
97 (sim_load): Cleanup. Move PC assignment from here.
98 (sim_create_inferior): To here.
100 * sim-main.h: New file.
101 * interp.c (sim-main.h): Include.
105 * configure: Regenerated to track ../common/aclocal.m4 changes.
109 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
113 * gencode.c (build_instruction): DIV instructions: check
114 for division by zero and integer overflow before using
115 host's division operation.
119 * Makefile.in (SIM_OBJS): Add sim-load.o.
120 * interp.c: #include bfd.h.
121 (target_byte_order): Delete.
122 (sim_kind, myname, big_endian_p): New static locals.
123 (sim_open): Set sim_kind, myname. Move call to set_endianness to
124 after argument parsing. Recognize -E arg, set endianness accordingly.
125 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
126 load file into simulator. Set PC from bfd.
127 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
128 (set_endianness): Use big_endian_p instead of target_byte_order.
132 * interp.c (sim_size): Delete prototype - conflicts with
133 definition in remote-sim.h. Correct definition.
137 * configure: Regenerated to track ../common/aclocal.m4 changes.
142 * interp.c (sim_open): New arg `kind'.
144 * configure: Regenerated to track ../common/aclocal.m4 changes.
148 * configure: Regenerated to track ../common/aclocal.m4 changes.
152 * interp.c (sim_open): Set optind to 0 before calling getopt.
156 * configure: Regenerated to track ../common/aclocal.m4 changes.
160 * interp.c : Replace uses of pr_addr with pr_uword64
161 where the bit length is always 64 independent of SIM_ADDR.
162 (pr_uword64) : added.
166 * configure: Re-generate.
170 * configure: Regenerate to track ../common/aclocal.m4 changes.
174 * interp.c (sim_open): New SIM_DESC result. Argument is now
176 (other sim_*): New SIM_DESC argument.
181 * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
182 Change values to avoid overloading DOUBLEWORD which is tested
184 * gencode.c: reinstate "offending code".
189 * interp.c: Fix printing of addresses for non-64-bit targets.
190 (pr_addr): Add function to print address based on size.
192 * gencode.c: #ifdef out offending code until a permanent fix
193 can be added. Code is causing build errors for non-5900 mips targets.
199 * gencode.c (process_instructions): Correct test for ISA dependent
200 architecture bits in isa field of MIPS_DECODE.
205 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
210 * gencode.c (MIPS_DECODE): Correct instruction feature flags for
216 * gencode.c (build_mips16_operands): Correct computation of base
217 address for extended PC relative instruction.
222 * Makefile.in, configure, configure.in, gencode.c,
223 interp.c, support.h: add r5900.
228 * interp.c (mips16_entry): Add support for floating point cases.
229 (SignalException): Pass floating point cases to mips16_entry.
230 (ValueFPR): Don't restrict fmt_single and fmt_word to even
232 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
234 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
235 and then set the state to fmt_uninterpreted.
236 (COP_SW): Temporarily set the state to fmt_word while calling
241 * gencode.c (build_instruction): The high order may be set in the
242 comparison flags at any ISA level, not just ISA 4.
246 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
247 COMMON_{PRE,POST}_CONFIG_FRAG instead.
248 * configure.in: sinclude ../common/aclocal.m4.
249 * configure: Regenerated.
253 * configure: Rebuild after change to aclocal.m4.
257 * configure configure.in Makefile.in: Update to new configure
258 scheme which is more compatible with WinGDB builds.
259 * configure.in: Improve comment on how to run autoconf.
260 * configure: Re-run autoconf to get new ../common/aclocal.m4.
261 * Makefile.in: Use autoconf substitution to install common
266 * gencode.c (build_instruction): Use BigEndianCPU instead of
271 * interp.c (sim_monitor): Make output to stdout visible in
272 wingdb's I/O log window.
276 * support.h: Undo previous change to SIGTRAP
281 * interp.c (store_word, load_word): New static functions.
282 (mips16_entry): New static function.
283 (SignalException): Look for mips16 entry and exit instructions.
284 (simulate): Use the correct index when setting fpr_state after
285 doing a pending move.
289 * interp.c: Fix byte-swapping code throughout to work on
290 both little- and big-endian hosts.
294 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
295 with gdb/config/i386/xm-windows.h.
299 * gencode.c (build_instruction): Work around MSVC++ code gen bug
300 that messes up arithmetic shifts.
304 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
305 SIGTRAP and SIGQUIT for _WIN32.
309 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
310 force a 64 bit multiplication.
311 (build_instruction) [OR]: In mips16 mode, don't do anything if the
312 destination register is 0, since that is the default mips16 nop
317 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
318 (build_endian_shift): Don't check proc64.
319 (build_instruction): Always set memval to uword64. Cast op2 to
320 uword64 when shifting it left in memory instructions. Always use
321 the same code for stores--don't special case proc64.
323 * gencode.c (build_mips16_operands): Fix base PC value for PC
325 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
327 * interp.c (simJALDELAYSLOT): Define.
328 (JALDELAYSLOT): Define.
329 (INDELAYSLOT, INJALDELAYSLOT): Define.
330 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
334 * interp.c (sim_open): add flush_cache as a PMON routine
335 (sim_monitor): handle flush_cache by ignoring it
339 * gencode.c (build_instruction): Use !ByteSwapMem instead of
341 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
342 (BigEndianMem): Rename to ByteSwapMem and change sense.
343 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
344 BigEndianMem references to !ByteSwapMem.
345 (set_endianness): New function, with prototype.
346 (sim_open): Call set_endianness.
347 (sim_info): Use simBE instead of BigEndianMem.
348 (xfer_direct_word, xfer_direct_long, swap_direct_word,
349 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
350 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
351 ifdefs, keeping the prototype declaration.
352 (swap_word): Rewrite correctly.
353 (ColdReset): Delete references to CONFIG. Delete endianness related
354 code; moved to set_endianness.
358 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
359 * interp.c (CHECKHILO): Define away.
360 (simSIGINT): New macro.
361 (membank_size): Increase from 1MB to 2MB.
362 (control_c): New function.
363 (sim_resume): Rename parameter signal to signal_number. Add local
364 variable prev. Call signal before and after simulate.
365 (sim_stop_reason): Add simSIGINT support.
366 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
368 (sim_warning): Delete call to SignalException. Do call printf_filtered
370 (AddressTranslation): Add #ifdef DEBUG around debugging message and
371 a call to sim_warning.
375 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
380 Add support for mips16 (16 bit MIPS implementation):
381 * gencode.c (inst_type): Add mips16 instruction encoding types.
382 (GETDATASIZEINSN): Define.
383 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
384 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
386 (MIPS16_DECODE): New table, for mips16 instructions.
387 (bitmap_val): New static function.
388 (struct mips16_op): Define.
389 (mips16_op_table): New table, for mips16 operands.
390 (build_mips16_operands): New static function.
391 (process_instructions): If PC is odd, decode a mips16
392 instruction. Break out instruction handling into new
393 build_instruction function.
394 (build_instruction): New static function, broken out of
395 process_instructions. Check modifiers rather than flags for SHIFT
396 bit count and m[ft]{hi,lo} direction.
397 (usage): Pass program name to fprintf.
398 (main): Remove unused variable this_option_optind. Change
399 ``*loptarg++'' to ``loptarg++''.
400 (my_strtoul): Parenthesize && within ||.
401 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
402 (simulate): If PC is odd, fetch a 16 bit instruction, and
403 increment PC by 2 rather than 4.
404 * configure.in: Add case for mips16*-*-*.
405 * configure: Rebuild.
409 * interp.c: Allow -t to enable tracing in standalone simulator.
410 Fix garbage output in trace file and error messages.
414 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
415 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
416 * configure.in: Simplify using macros in ../common/aclocal.m4.
417 * configure: Regenerated.
418 * tconfig.in: New file.
422 * interp.c: Fix bugs in 64-bit port.
423 Use ansi function declarations for msvc compiler.
424 Initialize and test file pointer in trace code.
425 Prevent duplicate definition of LAST_EMED_REGNUM.
429 * interp.c (xfer_big_long): Prevent unwanted sign extension.
433 * interp.c (SignalException): Check for explicit terminating
435 * gencode.c: Pass instruction value through SignalException()
436 calls for Trap, Breakpoint and Syscall.
440 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
441 only used on those hosts that provide it.
442 * configure.in: Add sqrt() to list of functions to be checked for.
443 * config.in: Re-generated.
444 * configure: Re-generated.
448 * gencode.c (process_instructions): Call build_endian_shift when
449 expanding STORE RIGHT, to fix swr.
450 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
452 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
453 Fix float to int conversions to produce signed values.
457 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
458 (process_instructions): Correct handling of nor instruction.
459 Correct shift count for 32 bit shift instructions. Correct sign
460 extension for arithmetic shifts to not shift the number of bits in
461 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
462 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
464 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
465 It's OK to have a mult follow a mult. What's not OK is to have a
467 (Convert): Comment out incorrect rounding code.
471 * interp.c (sim_monitor): Improved monitor printf
472 simulation. Tidied up simulator warnings, and added "--log" option
473 for directing warning message output.
474 * gencode.c: Use sim_warning() rather than WARNING macro.
478 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
479 getopt1.o, rather than on gencode.c. Link objects together.
480 Don't link against -liberty.
481 (gencode.o, getopt.o, getopt1.o): New targets.
482 * gencode.c: Include <ctype.h> and "ansidecl.h".
483 (AND): Undefine after including "ansidecl.h".
484 (ULONG_MAX): Define if not defined.
485 (OP_*): Don't define macros; now defined in opcode/mips.h.
486 (main): Call my_strtoul rather than strtoul.
487 (my_strtoul): New static function.
491 * gencode.c (process_instructions): Generate word64 and uword64
492 instead of `long long' and `unsigned long long' data types.
493 * interp.c: #include sysdep.h to get signals, and define default
495 * (Convert): Work around for Visual-C++ compiler bug with type
497 * support.h: Make things compile under Visual-C++ by using
498 __int64 instead of `long long'. Change many refs to long long
499 into word64/uword64 typedefs.
503 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
504 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
506 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
507 (AC_PROG_INSTALL): Added.
508 (AC_PROG_CC): Moved to before configure.host call.
509 * configure: Rebuilt.
513 * configure.in: Define @SIMCONF@ depending on mips target.
514 * configure: Rebuild.
515 * Makefile.in (run): Add @SIMCONF@ to control simulator
517 * gencode.c: Change LOADDRMASK to 64bit memory model only.
518 * interp.c: Remove some debugging, provide more detailed error
519 messages, update memory accesses to use LOADDRMASK.
523 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
524 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
526 * configure: Rebuild.
527 * config.in: New file, generated by autoheader.
528 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
529 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
530 HAVE_ANINT and HAVE_AINT, as appropriate.
531 * Makefile.in (run): Use @LIBS@ rather than -lm.
532 (interp.o): Depend upon config.h.
533 (Makefile): Just rebuild Makefile.
534 (clean): Remove stamp-h.
535 (mostlyclean): Make the same as clean, not as distclean.
536 (config.h, stamp-h): New targets.
540 * interp.c (ColdReset): Fix boolean test. Make all simulator
545 * interp.c (xfer_direct_word, xfer_direct_long,
546 swap_direct_word, swap_direct_long, xfer_big_word,
547 xfer_big_long, xfer_little_word, xfer_little_long,
548 swap_word,swap_long): Added.
549 * interp.c (ColdReset): Provide function indirection to
550 host<->simulated_target transfer routines.
551 * interp.c (sim_store_register, sim_fetch_register): Updated to
552 make use of indirected transfer routines.
556 * gencode.c (process_instructions): Ensure FP ABS instruction
558 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
563 * interp.c (sim_do_command): Complain if callback structure not
568 * interp.c (Convert): Provide round-to-nearest and round-to-zero
569 support for Sun hosts.
570 * Makefile.in (gencode): Ensure the host compiler and libraries
571 used for cross-hosted build.
575 * interp.c, gencode.c: Some more (TODO) tidying.
579 * gencode.c, interp.c: Replaced explicit long long references with
580 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
581 * support.h (SET64LO, SET64HI): Macros added.
585 * configure: Regenerate with autoconf 2.7.
589 * interp.c (LoadMemory): Enclose text following #endif in /* */.
590 * support.h: Remove superfluous "1" from #if.
591 * support.h (CHECKSIM): Remove stray 'a' at end of line.
595 * interp.c (StoreFPR): Control UndefinedResult() call on
596 WARN_RESULT manifest.
600 * gencode.c: Tidied instruction decoding, and added FP instruction
603 * interp.c: Added dineroIII, and BSD profiling support. Also
604 run-time FP handling.
608 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
609 gencode.c, interp.c, support.h: created.