3 * config/tc-i386.c (lex_got): Use STRING_COMMA_LEN on gotrel.
7 * config/tc-i386.c (i386_error): Replace oprand_size_mismatch
8 with operand_size_mismatch.
9 (operand_size_match): Updated.
10 (match_template): Likewise.
14 * config/tc-i386.c (i386_error): New.
15 (_i386_insn): Replace err_msg with error.
16 (operand_size_match): Set error instead of err_msg on failure.
17 (operand_type_match): Likewise.
18 (operand_type_register_match): Likewise.
19 (VEX_check_operands): Likewise.
20 (match_template): Likewise. Use error instead of err_msg with
25 * config/tc-arm.c (make_mapping_symbol): Hanle the case
26 that two mapping symbols have the same value.
30 * doc/c-arm.texi (.setfp): Correct example.
35 * config/tc-arm.c (reloc_names): New relocation names.
36 (md_apply_fix): New case for BFD_RELOC_ARM_GOT_PREL.
37 (tc_gen_reloc): New case for BFD_RELOC_ARM_GOT_PREL.
38 * doc/c-arm.texi (ARM-Relocations): Document the new relocation.
42 * dw2gencfi.c (output_cie): Consider emitting the S augmentation in all
43 cases, and not only for .eh_frame.
45 * dw2gencfi.c (output_cie): Make it more explicit which code paths
46 belong to .eh_frame only.
50 * config/tc-v850.c (v850_insert_operand): Handle out-of-range
51 assembler constants on 64-bit hosts.
55 * bfin-defs.h, bfin-lex.l, bfin-parse.y, tc-bfin.c, tc-bfin.h:
56 Strip trailing whitespace.
60 * doc/c-bfin.texi (-mcpu): Add bf504 and bf506.
61 * config/tc-bfin.c (bfin_cpu_type): Add BFIN_CPU_BF504 and
63 (bfin_cpus[]): Add 0.0 for bf504 and bf506.
67 * doc/as.texinfo: Add Blackfin options.
68 * doc/c-bfin.texi: Document -mfdpic, -mno-fdpic and -mnopic.
69 * config/tc-bfin.c (md_show_usage): Show usage for all
70 Blackfin specific options.
75 * listing.c (listing_newline): Correct backslash quote logic.
79 * config/tc-i386.h [TE_SOLARIS] (ELF_TARGET_FORMAT): Define.
80 (ELF_TARGET_FORMAT64): Define.
84 * config/tc-arm.c (arm_cpu_option_table): Add cortex-m4.
88 * config/tc-sh.c (get_specific): Move overflow checking code to avoid
89 reading uninitialized data.
93 * config/tc-score7.c (s7_frag_check): Add ATTRIBUTE_UNUSED.
97 * configure.tgt: Fix mep cpu case.
101 * config/tc-arm.c (do_t_strexd): Remove
102 operand[1] != operand[2] contraint.
106 * config/tc-arm.c (neon_select_shape): No need to match
107 the remaining operands in the shape when one operand does
112 * config/tc-arm.c (do_neon_ld_st_interleave): Reject bad
117 * cgen.c: Whitespace fixes.
118 (weak_operand_overflow_check): Formatting fix.
122 * config/tc-i386.c (match_template): Update error messages.
126 * config/tc-i386.c (_i386_insn): Add err_msg.
127 (operand_size_match): Set err_msg on failure.
128 (operand_type_match): Likewise.
129 (operand_type_register_match): Likewise.
130 (VEX_check_operands): Likewise.
131 (match_template): Likewise. Use i.err_msg with as_bad.
135 * config/tc-mips.c (mips_fix_loongson2f, mips_fix_loongson2f_nop,
136 mips_fix_loongson2f_jump): New variables.
137 (md_longopts): Add New options -mfix-loongson2f-nop/jump,
138 -mno-fix-loongson2f-nop/jump.
139 (md_parse_option): Initialize variables via above options.
140 (options): New enums for the above options.
141 (md_begin): Initialize nop_insn from LOONGSON2F_NOP_INSN.
142 (fix_loongson2f, fix_loongson2f_nop, fix_loongson2f_jump):
144 (append_insn): call fix_loongson2f().
145 (mips_handle_align): Replace the implicit nops.
146 * config/tc-mips.h (MAX_MEM_FOR_RS_ALIGN_CODE): Modified
147 for the new mips_handle_align().
148 * doc/c-mips.texi: Document the new options.
152 * config/tc-arm.c (do_rd_rm_rn): Added warning
158 * config/tc-avr.c (md_apply_fix): Handle BFD_RELOC_8.
159 (avr_cons_fix_new): Handle fixups of a single byte.
164 * config/tc-arm.c (CPU_DEFAULT): Do not define based upon build
165 compiler's predefines.
169 * configure.tgt: Whiltespace. Sort moxie entry.
173 * config/tc-arm.c (arm_convert_symbolic_attribute): Add Tag_DIV_use.
174 * doc/c-arm.texi: Likewise.
178 * config/tc-arm.c (asm_opcode): operands type
180 (BAD_PC_ADDRESSING): New macro message.
181 (BAD_PC_WRITEBACK): Likewise.
182 (MIX_ARM_THUMB_OPERANDS): New macro.
183 (operand_parse_code): Added enum values.
184 (parse_operands): Added thumb/arm distinction,
185 plus new enum values handling.
186 (encode_arm_addr_mode_2): Validations enhanced.
187 (encode_arm_addr_mode_3): Likewise.
188 (do_rm_rd_rn): Likewise.
189 (encode_thumb32_addr_mode): Likewise.
190 (do_t_ldrex): Likewise.
191 (do_t_ldst): Likewise.
192 (do_t_strex): Likewise.
193 (md_assemble): Call parse_operands with
201 (insns): Updated insns operands.
206 * config/tc-ia64.c (enum reloc_func): Add FUNC_SLOTCOUNT_RELOC.
207 (DUMMY_RELOC_IA64_SLOTCOUNT): Added.
208 (pseudo_func): Add an entry for slotcount.
209 (md_begin): Initialize slotcount pseudo symbol.
210 (ia64_parse_name): Handle @slotcount parameter.
211 (ia64_gen_real_reloc_type): Handle slotcount.
212 (md_apply_fix): Ditto.
213 * doc/c-ia64.texi (IA-64-Relocs): Document @slotcount.
217 * config/tc-xtensa.c (istack_init): Don't call memset.
221 * config/tc-xtensa.c (cache_literal_section): Handle prefixes as
226 * config/tc-xtensa.c (xtensa_find_unaligned_loops): Rewrite.
230 * config/tc-i386.c (build_modrm_byte): Reformat.
234 * config/tc-i386.c: Update copyright.
239 * config/tc-i386.c (vec_imm4) New operand type.
241 (VEX_check_operands): New.
242 (check_reverse): Call VEX_check_operands.
243 (build_modrm_byte): Reintroduce code for 5
244 operand insns. Fix whitespace.
248 * config/tc-ppc.c (md_show_usage): Add -mpwr4, -mpwr5, -mpwr5x,
253 * config/tc-xtensa.c (RELAXED_LOOP_INSN_BYTES): New.
254 (next_frag_pre_opcode_bytes): Use RELAXED_LOOP_INSN_BYTES.
255 (xtensa_mark_zcl_first_insns): Rewrite to handle corner case.
259 * config/tc-arm.c (md_pcrel_from_section): Keep base to zero for
260 non-local branches (BFD_RELOC_THUMB_PCREL_BRANCH23,
261 BFD_RELOC_THUMB_PCREL_BLX, BFD_RELOC_ARM_PCREL_BLX,
262 BFD_RELOC_ARM_PCREL_CALL)
266 * config/tc-xtensa.c (frag_format_size): Generalize logic to
267 handle more instruction sizes and fetch widths.
268 (branch_align_power): Likewise.
269 (text_align_power): Likewise.
270 (bytes_to_stretch): Likewise.
274 * config/tc-ppc.c (md_show_usage): Mention -mtitan. Don't use tabs.
275 (ppc_mach): Handle titan.
276 * doc/c-ppc.texi: Mention -mtitan.
280 * config/tc-xtensa.c (UNREACHABLE_MAX_WIDTH): Delete and
282 (xtensa_fetch_width) ...this.
286 * Makefile.am (CPU_TYPES, OBJ_FORMATS, CPU_OBJ_VALID,
287 MULTI_CPU_TYPES, MULTI_CPU_OBJ_VALID): Remove.
288 * Makefile.in: Regenerate.
292 * config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1.
293 (i386_align_code): Rename PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1.
294 * config/tc-i386.h (processor_type): Same.
295 * doc/c-i386.texi: Change amdfam15 to bdver1.
300 * config/tc-arm.c (neon_check_type): Handle a neon_shape value of
305 * NEWS: Mention new feature.
306 * config/obj-coff.c (obj_coff_section): Accept digits and use
307 to override default section alignment power if specified.
308 * doc/as.texinfo (.section directive): Update documentation.
312 * config/tc-i386.c (avxscalar): New.
313 (OPTION_MAVXSCALAR): Likewise.
314 (build_vex_prefix): Select vector_length for scalar instructions
316 (md_longopts): Add OPTION_MAVXSCALAR.
317 (md_parse_option): Handle OPTION_MAVXSCALAR.
318 (md_show_usage): Add -mavxscalar=.
320 * doc/c-i386.texi: Document -mavxscalar=.
324 * config/tc-i386.c (build_vex_prefix): Set i.vex.bytes[0] to
329 * write.h (fix_at_start): Declare.
330 * write.c (fix_new_internal): Add at_beginning parameter.
331 Use it instead of REVERSE_SORT_RELOCS. Fix the handling of
332 seg_fix_tailP for the at_beginning/REVERSE_SORT_RELOCS case.
333 (fix_new, fix_new_exp): Update accordingly.
334 (fix_at_start): New function.
335 * config/tc-ppc.c (md_pseudo_table): Add .ref to the OBJ_XCOFF section.
336 (ppc_ref): New function, for OBJ_XCOFF.
337 (md_apply_fix): Handle BFD_RELOC_NONE for OBJ_XCOFF.
338 * config/te-i386aix.h (REVERSE_SORT_RELOCS): Remove #undef.
342 * config/te-solaris.h (DWARF2_EH_FRAME_READ_ONLY): Make read-only
343 on 64-bit Solaris/x86.
344 Include obj-format.h earlier.
348 * config/tc-s390.c (s390_elf_final_processing): New function.
349 * config/tc-s390.h (elf_tc_final_processing): New macro definition.
350 (s390_elf_final_processing): Added prototype.
356 * config/tc-arm.c (do_neon_cvt): Rename to do_neon_cvt_1. Add
357 code to handle round-to-zero for VCVT conversions.
358 (do_neon_cvt): New. Call do_neon_cvt_1.
359 (do_neon_cvtr): New. Call do_neon_cvt_1.
360 (insns): Use do_neon_cvt for VCVT insn and do_neon_cvtr for VCVTR
365 * config/tc-ia64.c (ia64_vms_note): Generate 24 bytes note headers.
369 * config/tc-i386.c (md_assemble): Before accessing the IMM field
370 check that it's not an XOP insn.
374 * config/bfin-aux.h: Remove argument names in function
376 * config/bfin-lex.l (parse_int): Fix shadowed variable name
378 * config/bfin-parse.y (value_match): Remove argument names
380 (notethat): Likewise.
385 * config/tc-arm.c (do_t_nop): Correct check for Thumb-2 NOP.
389 * config/tc-h8300.c (h8300_elf_section): New function - issue a
390 warning message if a new section is created without setting any
392 (md_pseudo_table): Intercept section creation pseudos.
393 (md_pcrel_from): Replace abort with an error message.
394 * config/obj-elf.c (obj_elf_section_name): Export this function.
395 * config/obj-elf.h (obj_elf_section_name): Prototype.
400 * listing.c (print_source): Add one to line number.
404 * Makefile.in: Regenerate.
405 * configure: Regenerate.
406 * doc/Makefile.in: Regenerate.
410 * version.c (parse_args): Change to "Copyright 2010".
414 * config/tc-i386.c (cpu_arch): Add amdfam15.
415 (i386_align_code): Add PROCESSOR_AMDFAM15 cases.
416 * config/tc-i386.h (processor_type): Add PROCESSOR_AMDFAM15.
417 * doc/c-i386.texi: Add amdfam15.
421 * config/tc-arm.c (do_neon_logic): Accept imm value
422 in the third operand too.
423 (operand_parse_code): OP_RNDQ_IMVNb renamed to
425 (parse_operands): OP_NILO case removed, applied renaming.
426 (insns): Neon shape changed for some logic instructions.
430 * config/tc-arm.c (do_neon_ldx_stx): Added
431 validation for vector load/store insns.
435 * config/tc-ppc.c (md_show_usage): Document -me500mc64.
439 * config/tc-arm.c (struct arm_it): New flag 'is_neon'.
440 (NEON_ENC_*): Macros renamed to _NEON_ENC_*.
441 (NEON_ENCODE): New macro.
442 (check_neon_suffixes): New macro.
443 (do_vfp_cond_or_thumb): Set the 'is_neon' flag.
444 (do_vfp_nsyn_opcode): Likewise.
445 (do_vfp_nsyn_nmul): Use the new 'NEON_ENCODE' macro.
446 (do_vfp_nsyn_cmp): Likewise.
447 (do_neon_shl_imm): Likewise.
448 (do_neon_qshl_imm): Likewise.
449 (neon_dyadic_misc): Likewise.
450 (do_neon_mac_maybe_scalar): Likewise.
451 (do_neon_qdmulh): Likewise.
452 (do_neon_qmovn): Likewise.
453 (do_neon_qmovun): Likewise.
454 (do_neon_movn): Likewise.
455 (neon_mac_reg_scalar_long): Likewise.
456 (do_neon_vmull): Likewise.
457 (do_neon_trn): Likewise.
458 (do_neon_ldx_stx): Likewise.
459 (neon_dp_fixup): Changed signature and set the flag.
460 (neon_three_same): Call the above with new signature.
461 (neon_two_same): Likewise.
462 (neon_imm_shift): Likewise.
463 (neon_mul_mac): Likewise.
464 (do_neon_abs_neg): Likewise.
465 (neon_mixed_length): Likewise.
466 (do_neon_ext): Likewise.
467 (do_neon_mov): Likewise.
468 (do_neon_tbl_tbx): Likewise.
469 (do_neon_logic): Likewise, and use the new 'NEON_ENCODE' macro.
470 (neon_compare): Likewise.
471 (do_neon_shll): Likewise.
472 (do_neon_cvt): Likewise.
473 (do_neon_mvn): Likewise.
474 (do_neon_dup): Likewise.
475 (md_assemble): Call check_neon_suffixes ().
477 For older changes see ChangeLog-2009
483 version-control: never