3 * NEWS: Record that support for LM32 has been added.
4 * Makefile.am: Add LM32 object files and dependencies.
5 * Makefile.in: Regenerate.
6 * configure.in: Indicate LM32 uses cgen.
7 * configure: Regenerate.
8 * configure.tgt: Add LM32 target.
9 * config/tc-lm32.c: New file.
10 * config/tc-lm32.h: New file.
11 * doc/Makefile.am: Add c-lm32.texi to CPU_DOCS.
12 * doc/Makefile.in: Regenerate.
13 * doc/all.texi: Add LM32 as CPU of interest.
14 * doc/as.texinfo: Add LM32 dependent features link.
15 * doc/c-lm32.texi: New file.
19 * config/tc-i386.c (match_template): Changed to return
20 const template *. Handle i.swap_operand for 3 operands.
21 (build_vex_prefix): Take const template *. Swap operand for
22 2-byte VEX prefix if possible.
23 (md_assemble): Updated.
24 (build_modrm_byte): Handle RegMem bit for SSE2AVX.
28 * config/tc-avr.c (mcu_types): Add attiny87, attiny327, atmega4hvd,
29 atmega8hvd, atmega16hvb, atmega32hvb, atmega64c1, atmega16m1,
30 atmega64m1, atmega32u6, atmega128rfa1, at90pwm81, at90scr100,
31 m3000f, m3000s and m3001b devices.
32 * doc/c-avr.texi: Likewise.
36 * NEWS :Remove mention of STT_IFUNC support.
37 * config/obj-elf.c (obj_elf_type): Remove STT_IFUNC support.
38 * doc/as.texinfo: Remove mention of STT_IFUNC support.
42 * config/tc-cris.c (s_cris_dtpoff): New function.
43 (md_pseudo_table): Add "dtpoffd".
47 * config/tc-i386.c (parse_insn): Optimize ".s" handling.
51 * config/tc-i386.c (_i386_insn): Add swap_operand.
52 (parse_insn): Handle ".s".
53 (match_template): Handle swap_operand.
55 * doc/c-i386.texi: Document .s suffix.
59 * config/tc-cris.c (cris_process_instruction): Handle
60 BFD_RELOC_CRIS_32_IE, in the test whether the relocation fits.
61 (get_3op_or_dip_prefix_op): Handle TLS/PIC decoration for the
62 "double indirect" addressing mode.
63 (cris_get_reloc_suffix): Add entry for :IE for BFD_RELOC_CRIS_32_IE.
64 (cris_number_to_imm, tc_gen_reloc): Handle BFD_RELOC_CRIS_32_IE.
68 * configure: Regenerate.
72 * config/tc-i386.c (build_modrm_byte): Remove an extra blank
77 * config/tc-ppc.c (parse_cpu): Remove booke64 support. Update
79 (ppc_setup_opcodes): Likewise, remove booke64 support.
80 * doc/c-ppc.texi (PowerPC-Opts): Remove -mbooke32 and -mbooke64.
81 * doc/as.texinfo (Overview): Likewise.
85 * doc/as.texinfo (Type): Reword description of STT_IFUNC type.
89 * config/obj-elf.c (obj_elf_type): Add support for STT_IFUNC type.
90 * doc/as.texinfo: Document new feature.
91 * NEWS: Mention new feature.
95 * config/tc-i386.c (i386_target_format): For coff flavour in TE_PEP
96 use "pe-i386" for 32-bit.
100 * Makefile.am (ehopt.o): Add struc-symbol.h.
101 * Makefile.in: Regenerated.
102 * ehopt.c: Include struc-symbol.h.
103 (check_eh_frame): For very small O_constant DW_CFA_advance_loc4
104 create correct DW_CFA_advance_loc. Handle O_subtract only
105 for code alignment factor 1, otherwise handle O_divide or
106 O_right_shift of O_subtract and O_constant.
107 (eh_frame_estimate_size_before_relax): Always divide by ca.
108 (eh_frame_convert_frag): Likewise.
112 * dw2gencfi.c (output_cfi_insn): Scale DW_CFA_advance_loc1,
113 DW_CFA_advance_loc2 and DW_CFA_advance_loc4 outputs.
117 * config/tc-mips.c (hilo_interlocks): Handle CPU_R14000, CPU_R16000.
118 (mips_cpu_info_table): Add r14000, r16000.
119 * doc/c-mips.texi: Add entries for 14000, 16000.
123 * config/tc-cr16.h (GLOBAL_OFFSET_TABLE_NAME): Defined
124 * config/tc-cr16.c (md_pseudo_table): Add "4byte" directive to
125 md_pseudo_table and accept @c prefix, same as long directive.
126 (cr16_cons_fix_new): Initialize rtype to BFD_RELOC_UNUSED.
127 (tc_gen_reloc): Declare a variable of type bfd_reloc_code_real_type
128 and set it for GOT related relocations.
129 (md_undefined_symbol): Defined
130 (process_label_constant): Added checks for GOT/got and cGOT/cGOT
131 prefixes with constant label and set the appropriate relocation type.
132 * doc/c-cr16.texi (cr16-operand specifiers): Add got/GOT and cgot/cGOT.
136 * config/tc-m32c.c (md_pseudo_table): Add support for .loc et al.
140 * config/tc-m32c.c (md_convert_frag): Fix ADJNZ reloc math.
144 * config/tc-xtensa.c (check_t1_t2_reads_and_writes): Call
145 xtensa_state_is_shared_or to allow multiple opcodes within a
146 single FLIX bundle to write to these special states.
150 * config/tc-cris.c (cris_number_to_imm): Apply S_SET_THREAD_LOCAL
151 on symbols in TLS relocs.
155 * doc/fdl.texi: Update to v1.3
156 * doc/as.texinfo: Change license to v1.3.
160 * config/tc-arm.c (neon_type_mask): Renumber.
161 (type_chk_of_el_type): Handle F_F16.
162 (neon_cvt_flavour): Recognize half-precision conversions.
163 (do_neon_cvt): New shapes NS_QD and
164 NS_DQ. Encode half-precision conversions.
165 (do_neon_cvtt): Encode the T bit.
166 (asm_opcode_insns): vcvt, vcvtt support.
167 (arm_option_cpu_value): Add neon-fp16 support.
171 * as.c (parse_args): Update copyright year.
175 * read.c (emit_expr): Grow frag before filling it so that
176 dot_value remains valid.
181 * config/tc-arm.c: Ensure that all uses of as_bad have a
186 * config/tc-cris.c (cris_number_to_imm): Except for
187 BFD_RELOC_NONE, always set contents. Where previously this was
188 skipped, set contents to 0.
191 * input-scrub.c (input_scrub_include_sb): Make the position
192 after the input have defined contents, a 0 character.
194 * config/tc-cris.c (cris_relax_frag): Add missing case for
195 ENCODE_RELAX (STATE_COND_BRANCH_PIC, STATE_DWORD).
198 * read.c (read_a_source_file): Rearrange evaluation order when
199 looking for '=' to avoid conditional on undefined contents of
200 input_line_pointer[1].
204 * config/tc-mips.c (COP_INSN): Change logic to always return false
209 * config/tc-mips.c (validate_mips_insn): Add case '1'.
210 (mips_ip): Add case '1' to process sync type.
214 * configure.tgt: Add m32c-*-rtems* and m32r-*-rtems*.
218 * config/tc-xtensa.c (tinsn_check_arguments): Check for multiple
219 writes to the same register.
223 * config/tc-xtensa.c (xtensa_j_opcode): New.
224 (xg_instruction_matches_option_term): Handle "FREEREG" option.
225 (xg_build_to_insn): Likewise. Update renamed tls_reloc reference.
226 (md_begin): Initialize xtensa_j_opcode.
227 (md_assemble): Update renamed tls_reloc reference. Handle "j.l".
228 (xg_assemble_vliw_tokens): Save free_reg info in the frag.
229 (tinsn_immed_from_frag): Get free_reg info back out of the frag.
230 (vinsn_to_insnbuf): Update renamed tls_reloc references.
231 Distinguish extra argument for "FREEREG" from extra TLS argument.
232 * config/tc-xtensa.h (struct xtensa_frag_type): Add free_reg field.
233 * config/xtensa-istack.h (struct tinsn_struct): Rename tls_reloc
235 * config/xtensa-relax.c (widen_spec_list): Add rules to relax "j.l".
236 (build_transition): Handle "FREEREG" operand.
237 * config/xtensa-relax.h (enum op_type): Add OP_FREEREG.
245 * config/tc-mips.c (mips_cpu_info_table): Move the MIPS64r2
246 comment so that Broadcom SB-1 cores are in the MIPS64 section.
250 * config/tc-bfin.c (gencode, allocate): Remove unnecessary cast.
251 * config/tc-ns32k.c (bit_fix_new): Likewise.
252 * config/tc-m68k.c (md_begin): Likewise.
253 * hash.c (hash_insert, hash_jam): Likewise.
254 * symbols.c (symbol_create, local_symbol_make): Likewise.
255 * frags.c (frag_alloc): Likewise.
259 * config/bfin-parse.y: Use C style comments.
260 * config/tc-bfin.c: Likewise.
261 * config/tc-m68k.c: Likewise.
262 * config/tc-mips.c: Likewise.
266 * config/tc-i386.c (processor_type): Moved to tc-i386.h.
267 (cpu_arch_tune): Make it global.
268 (cpu_arch_isa): Likewise.
269 (cpu_arch_isa_flags): Likewise.
270 (i386_align_code): Check fragP->tc_frag_data.isa,
271 fragP->tc_frag_data.isa_flags and cpu_arch_tune instead of
272 cpu_arch_isa, cpu_arch_isa_flags and cpu_arch_tune,
275 * config/tc-i386.h (processor_type): Moved from tc-i386.c.
276 (cpu_arch_tune): New.
277 (cpu_arch_isa): Likewise.
278 (cpu_arch_isa_flags): Likewise.
279 (i386_tc_frag_data): Likewise.
280 (TC_FRAG_TYPE): Likewise.
281 (TC_FRAG_INIT): Likewise.
285 * doc/as.texinfo (Pseudo Ops): Swap order of Comm and CFI menu entries.
286 (Altmacro, Comm, Loc, Loc_mark_labels, List, MRI, PopSection, Sleb128):
287 Moved into alphabetical order.
291 * doc/as.texinfo (Dot): Expand no-space-dir conditional to include
293 (Pseudo Ops): Put conditionals around Skip and Space menu entries.
294 (Line): Remove conditional declaration of Ln node and section here.
295 Put aout-bout description inside the no-line-dir conditional.
296 (Skip, Space): Use a separate conditional for each node.
300 * doc/as.texinfo (Pseudo Ops): Remove no-file-dir conditional around
301 menu entry for File; remove version-specific .file operands from menu
302 description. Replace "LNS directives" menu entry with new entries
303 for "Loc" and "Loc_mark_labels".
304 (LNS directives): Split into separate nodes for each directive.
305 (Loc): New node for .loc directive. Mention that this directive
306 is for DWARF2 and add a missing article.
307 (Loc_mark_labels): Likewise for .loc_mark_labels.
308 (File): Change this node to describe both the default version and
309 the DWARF2 version of .file. Move the no-file-dir conditional to
310 include only the default version.
314 * dw2gencfi.c (cfi_finish): Deal with md_fix_up_eh_frame.
315 * config/tc-i386.h (md_fix_up_eh_frame): Define on Solaris.
316 (i386_solaris_fix_up_eh_frame): Declare.
317 * config/tc-i386.c (i386_solaris_fix_up_eh_frame): New function.
322 * doc/as.texinfo (Dollar Local Labels): Correct description of
323 dollar local labels to show that the colon suffix is still
328 * configure.in (ALL_LINGUAS): Add "id".
329 * configure: Regenerate.
330 * po/id.po: New Indonesian translation.
334 * read.c (pseudo_set): Don't allow global register symbol only
335 if TC_GLOBAL_REGISTER_SYMBOL_OK is undefined.
336 * symbols.c (S_SET_EXTERNAL): Likewise.
338 * config/tc-mmix.h (TC_GLOBAL_REGISTER_SYMBOL_OK): Defined.
340 * doc/internals.texi: Document TC_GLOBAL_REGISTER_SYMBOL_OK.
344 * doc/as.texinfo (Local): New description of ELF .local directive.
349 * read.c (get_line_sb): Renamed to get_non_macro_line_sb.
350 (_find_end_of_line): Add extra parameter indicating if the line is
351 inside a macro. If it is then do not allow the @ character to be
352 treated as a line separator character.
353 (read_a_source): Update use of _find_end_of_line.
354 (find_end_of_line): Likewise.
355 (s_irp): Update use of get_line_sb.
357 (do_repeat): Likewise.
358 (get_line_sb): New function. Like the old version of get_line_sb
359 except that it takes an extra parameter indicating whether the
360 line is inside a macro.
361 (get_macro_line_sb): New function.
365 * config/tc-cris.c: Update all comments regarding explicit relocations
366 to, besides PIC, also imply TLS or to say "relocation specifier" or
368 (RELOC_SUFFIX_CHAR): Rename from PIC_SUFFIX_CHAR. Change all callers.
369 (cris_get_reloc_suffix): Rename from cris_get_pic_suffix. Change all
370 callers. Also handle TLS relocs.
371 (cris_get_specified_reloc_size): Rename from cris_get_pic_reloc_size.
372 Change all callers. Also handle TLS relocs.
374 (cris_process_instruction): Check for non-PIC TLS relocations and
375 adjust message when emitting error message about relocation not
377 (get_autoinc_prefix_or_indir_op): Also check for relocation suffix
379 (get_3op_or_dip_prefix_op): Ditto.
380 (cris_number_to_imm, tc_gen_reloc): Handle TLS relocs like PIC relocs.
384 * listing.c (buffer_line): Open the source file with FOPEN_RB.
385 Manually process line ends.
390 * config/tc-tic4x.c (tic4x_globl): Call S_SET_EXTERNAL as well as
396 * coffgen.c (coff_write_symbols): Check to see if a symbol's flags
397 do not match it class and if necessary update the class.
398 (null_error_handler): New function. Suppresses the generation of
400 * coff64-rs6000.c (bfd_xcoff_backend_data): Update comment.
404 * Makefile.am: Run "make dep-am".
405 * Makefile.in: Regenerate.
409 * dw2gencfi.c (output_cfi_insn): Fix typo in invocation of
410 tc_cfi_emit_pcrel_expr macro.
415 * configure: Regenerate for new libtool.
417 * Makefile.in: Ditto.
418 * doc/Makefile.in: Ditto.
423 * app.c (do_scrub_chars): Only issue warnings about tick
424 characters detected in symbol strings if hex ticks are supported.
428 * dw2gencfi.c (output_cfi_insn): Fix typo in invocation of
429 tc_cfi_emit_pcrel_expr macro.
433 * NEWS: Mention .cfi_val_encoded_addr.
437 * Makefile.am (TARG_ENV_HFILES): Add config/te-solaris.h.
438 * Makefile.in (TARG_ENV_HFILES): Likewise.
439 * configure.tgt (Solaris targets): Set em=solaris.
440 * config/te-solaris.h: New file.
444 * config/bfin-parse.y (asm_1): Fix reduce/reduce conflicts.
448 * dw2gencfi.c (DWARF2_ADDR_SIZE): Provide default.
449 (struct cfi_insn_data): Add ea member.
450 (CFI_val_encoded_addr, dot_cfi_val_encoded_addr): New.
451 (output_cfi_insn): Handle CFI_val_encoded_addr.
452 (select_cie_for_fde): Don't match CFI_val_encoded_addr.
453 * doc/as.texinfo (.cfi_val_encoded_addr): Document.
458 * listing.c (print_options): Don't call fprintf without format string.
462 * write.c (TC_FORCE_RELOCATION_SUB_LOCAL): Heed md_register_arithmetic.
463 (TC_VALIDATE_FIX_SUB): Likewise.
464 * config/tc-frv.h (TC_FORCE_RELOCATION_SUB_LOCAL): Likewise.
465 * config/tc-hppa.h (TC_FORCE_RELOCATION_SUB_LOCAL): Likewise.
466 * config/tc-mn10300.h (TC_VALIDATE_FIX_SUB): Likewise.
467 * config/tc-sh.h (TC_VALIDATE_FIX_SUB): Likewise.
468 (TC_FORCE_RELOCATION_SUB_LOCAL): Likewise.
469 * config/tc-sh64.h (TC_VALIDATE_FIX_SUB): Likewise.
470 * config/tc-xtensa.h (TC_VALIDATE_FIX_SUB): Likewise.
471 * doc/internals.texi (TC_FORCE_RELOCATION_SUB_ABS,
472 TC_FORCE_RELOCATION_SUB_LOCAL, TC_VALIDATE_FIX_SUB): Show new param.
474 * write.c (md_register_arithmetic): Define.
475 (fixup_segment): Adjust TC_FORCE_RELOCATION_SUB_ABS invocation.
476 Modify error message when registers involved.
477 (TC_FORCE_RELOCATION_SUB_ABS): Heed md_register_arithmetic.
478 * config/tc-sh.h (TC_FORCE_RELOCATION_SUB_ABS): Likewise.
482 * write.c (install_reloc): Correct EMIT_SECTION_SYMBOLS test.
486 * config/tc-frv.c (md_apply_fix): Use abs_section_sym for
487 relocs with no symbol.
488 * config/tc-mmix.c (md_assemble): Mark fake symbol on
489 BFD_RELOC_MMIX_BASE_PLUS_OFFSET as OK for use by relocs.
490 (mmix_md_end): Likewise mark mmix reg contents section symbol.
494 * config/tc-z80.c: Opcode generation of ld a,(bc) and ld a,(de) was
495 broken, as the opcode of ld a,(de) was being emitted for both.
499 * config/tc-xtensa.c (init_op_placement_info_table): Allow number of
500 operands equal to MAX_INSN_ARGS.
504 * configure.in: Call AC_SYS_LARGEFILE.
505 * config.in: Regenerate.
506 * configure: Regenerate.
510 * config/tc-ppc.c (ppc_setup_opcodes): Simplify POWER4/NOPOWER4 test.
511 Remove POWER5 and POWER6 tests.
515 * config/tc-hppa.c (hppa_regname_to_dw2regnum): Add register name to
516 number support for 32-bit targets.
520 * NEWS: Add a marker for the 2.19 features.
524 * config/tc-hppa.h (DIFF_EXPR_OK): Define for SOM target. Revise
525 comment regarding use of difference expressions.
526 (TC_FORCE_RELOCATION_SUB_LOCAL): Define to 1.
528 * dw2gencfi.c (CFI_DIFF_EXPR_OK): Define if not defined.
529 (dot_cfi_personality): Use CFI_DIFF_EXPR_OK instead of DIFF_EXPR_OK.
530 (dot_cfi_lsda, output_cie, output_fde): Likewise.
531 * config/tc-hppa.h (CFI_DIFF_EXPR_OK): Define.
535 * config/tc-mips.h (DWARF2_FDE_RELOC_SIZE): Define.
539 * config/tc-i386.c (pe_lcomm_internal): New function. Allows the
540 alignment field of the .lcomm directive to be optional.
541 (pe_lcomm): New function. Pass pe_lcomm_internal to
543 (md_pseudo_table): Implement .lcomm directive for COFF based
545 * doc/c-i386.texi (i386-Directives): New node. Used to document
546 the .lcomm directive.
550 * config/tc-hppa.h: Don't define DWARF2_EH_FRAME_READ_ONLY on Linux
555 * config/tc-avr.c (mcu_types): Add atmega16u4.
556 * doc/c-avr.texi: Likewise.
560 * config/tc-ia64.c (CR_IIB0): New.
562 (cr): Add cr.iib0 and cr.iib1.
563 (specify_resource): Handle IA64_RS_CR_IIB and CR_IIB0/CR_IIB1.
567 * config/tc-i386.c (md_assemble): Force number of displacement
568 operands to zero when processing string instruction.
569 (i386_index_check): Special-case string instruction operands. Don't
570 fudge address prefix if there already was a memory operand. Fix
571 error message to correctly reflect the addressing mode used.
572 (i386_att_operand): Fix comment.
573 (i386_intel_operand): Snapshot, clear, and restore base and index
574 reg for each operand processed. Increment count of memory operands
579 * config/tc-hppa.c (is_SB_relative): New macro.
580 (fix_new_hppa): Remove $segrel$ marker.
581 (cons_fix_new_hppa): Set reloc type R_PARISC_SEGREL32 if expression is
583 * config/tc-hppa.h (tc_frob_symbol): Check for $segrel$.
587 * config/tc-i386.c (check_string): Use register_prefix for error
589 (process_operands): Likewise.
593 * c-arm.texi: Add tutorial on ARM unwinding pseudo ops.
597 * config/bfin-parse.y (check_macfunc_option): Fix instruction
599 (asm_1): Check mode for 16-bit multiply instructions.
603 * configure.in: Update a number of obsolete autoconf macros.
604 * configure: Regenerate.
605 * aclocal.m4: Regenerate.
609 * config/tc-mcore.c (md_assemble): Increase length of name array
610 to include terminating NUL.
614 * config/bfin-lex.l (NUMBER): Protect special `.'.
618 * symbols.c (symbol_clone): Ensure clones are not external.
622 * config/tc-hppa.c (md_begin): Set BSF_KEEP for "dummy_symbol".
626 * dw2gencfi.c (DWARF2_FDE_RELOC_SIZE): New.
627 (output_cie, output_fde): Use it.
628 (DWARF2_EH_FRAME_READ_ONLY): New.
629 (cfi_finish): Use it.
631 * config/tc-hppa.h (DWARF2_FDE_RELOC_SIZE): Set to 8 for 64-bit.
632 (DWARF2_CIE_DATA_ALIGNMENT): Change sign.
633 (DWARF2_EH_FRAME_READ_ONLY): New.
634 * config/tc-hppa.c (tc_gen_reloc): Generate pc-relative relocations
635 from the results of DIFF_EXPR_OK manipulation.
639 * config/xtensa-istack.h (MAX_INSN_ARGS): Increase to 64.
643 * config/tc-xtensa.c (O_tlsfunc, O_tlsarg, O_tlscall): Define.
644 (O_tpoff, O_dtpoff): Define.
645 (suffix_relocs): Add entries for TLS suffixes.
646 (xtensa_elf_cons): Check for invalid use of TLS relocations.
647 (map_operator_to_reloc): Add is_literal parameter and use it to
648 control translating TLS instruction relocations to the corresponding
650 (xg_valid_literal_expression): Allow TLS operators.
651 (xg_build_to_insn): Copy TLS operators from pseudo-instruction
652 operands to generated literals.
653 (xg_assemble_literal): Handle TLS operators. Update call to
654 map_operator_to_reloc.
655 (md_assemble): Handle CALLXn.TLS pseudo-instruction.
656 (md_apply_fix): Handle TLS relocations.
657 (emit_single_op): Handle TLS operators.
658 (convert_frag_immed): Update call to map_operator_to_reloc.
659 (vinsn_to_insnbuf): Emit relocations for TLS-related instructions.
660 * config/xtensa-istack.h (tinsn_struct): Add tls_reloc field.
661 * config/xtensa-relax.c (append_literal_op): Add src_op parameter
662 to initialize the op_data field of the BuildOp.
663 (build_transition): Use it here to record the source operand
664 corresponding to a generated literal.
665 * config/xtensa-relax.h (build_op): Comment op_data use for literals.
669 AVX Programming Reference (August, 2008)
670 * config/tc-i386.c (CPU_FLAGS_AES_MATCH): New.
671 (CPU_FLAGS_AVX_MATCH): Likewise.
672 (CPU_FLAGS_32BIT_MATCH): Updated.
673 (cpu_flags_match): Likewise.
678 * write.c (install_reloc): Check that reloc symbols have been
680 (set_symtab): Mark symbols with BSF_KEEP.
684 * config/tc-i386.c (i386_align_code): Fix a comment typo.
689 * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
690 * Makefile.in: Regenerate.
691 * aclocal.m4: Regenerate.
692 * config.in: Regenerate.
693 * configure: Regenerate.
694 * doc/Makefile.in: Regenerate.
698 * config/tc-tic4x.c (tic4x_operands_parse): Make static.
702 * doc/as.texinfo (Align): Document the PowerPC behaviour.
706 * as.c, as.h, ecoff.c, hash.c, macro.c, symbols.c, config/obj-evax.c,
707 config/obj-som.c, config/tc-alpha.c, config/tc-arm.c, config/tc-bfin.c,
708 config/tc-bfin.h, config/tc-crx.c, config/tc-frv.c, config/tc-frv.h,
709 config/tc-hppa.h, config/tc-i386.c, config/tc-i860.c, config/tc-i960.h,
710 config/tc-ia64.c, config/tc-ia64.h, config/tc-m32c.c, config/tc-m32c.h,
711 config/tc-m68k.c, config/tc-maxq.c, config/tc-s390.c, config/tc-s390.h,
712 config/tc-sparc.c, config/tc-sparc.h, config/tc-spu.c, config/tc-spu.h,
713 config/tc-tic4x.c, config/tc-tic4x.h, config/tc-tic54x.c,
714 config/tc-tic54x.h, config/tc-vax.c, doc/internals.texi: Banish PARAMS
715 and PTR. Convert to ISO C. Delete unnecessary forward declarations.
719 * config/tc-arm.c (s_unreq): Adjust hash_delete call.
720 * config/tc-ia64.c (dot_rot): Likewise.
725 * hash.c: Expand PTR to void *.
726 (hash_delete): Add "freeme" parameter. Call obstack_free.
727 * hash.h: Expand PTR to void *.
728 (hash_delete): Update prototype.
729 * macro.c (macro_expand_body): hash_delete LOCALs from formal_hash.
730 * config/tc-tic54x.c (tic54x_remove_local_label): Update hash_delete
732 (subsym_substitute): Likewise.
733 * doc/internals.texi (hash_delete): Update.
737 * config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51
738 architectures. Reorganize list to put mcu types in correct
739 architectures and to order list same as in GCC. Use new ISA
740 definitions in include/opcode/avr.h.
741 * doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture
742 descriptions. Reorganize descriptions to put mcu types in correct
743 architectures and to order lists same as in GCC.
748 * config/tc-mips.c (OPTION_CALL_NONPIC): New macro.
749 (OPTION_NON_SHARED, OPTION_XGOT, OPTION_MABI, OPTION_32)
750 (OPTION_N32, OPTION_64, OPTION_MDEBUG, OPTION_NO_MDEBUG)
751 (OPTION_PDR, OPTION_NO_PDR, OPTION_MVXWORKS_PIC): Bump by 1.
752 (md_longopts): Add -call_nonpic.
753 (md_parse_option): Handle OPTION_CALL_NONPIC.
754 (md_show_usage): Add -call_nonpic.
758 * config/tc-xtensa.c (exclude_section_from_property_tables): New.
759 (xtensa_create_property_segments): Use it.
760 (xtensa_create_xproperty_segments): Likewise.
764 * doc/internals.texi (DWARF2_FORMAT): Update for 2008-08-04 change.
768 * config/tc-mips.c (mips16_reloc_p, got16_reloc_p, hi16_reloc_p)
769 (lo16_reloc_p): New functions.
770 (reloc_needs_lo_p): Use hi16_reloc_p and got16_reloc_p to
771 generalize relocation checks.
772 (matching_lo_reloc): New function.
773 (fixup_has_matching_lo_p): Use it.
774 (mips16_mark_labels): Don't clobber a symbol's visibility.
775 (append_insn): Use hi16_reloc_p and lo16_reloc_p.
776 (mips16_ip): Handle BFD_RELOC_MIPS16_GOT16 and BFD_RELOC_MIPS16_CALL16.
777 (md_apply_fix): Likewise.
778 (mips16_percent_op): Add %got and %call16.
779 (mips_frob_file): Use got16_reloc_p to generalize relocation checks.
780 Use matching_lo_reloc.
781 (mips_force_relocation): Use hi16_reloc_p and lo16_reloc_p to
782 generalize relocation checks.
783 (mips_fix_adjustable): Use lo16_reloc_p to generalize relocation
788 * NEWS: Mention these changes.
790 * config/tc-h8300.h (H_TICK_HEX): Define.
791 * config/tc-h8300.c (OPTION_H_TICK_HEX): New.
792 (md_longopts): Add "-h-tick-hex".
793 (md_parse_option): Support it.
794 * doc/c-h8300.texi (H8/300 Options): Document it.
795 * doc/as.texinfo (Overview): Likewise.
797 * config/tc-sh.h (H_TICK_HEX): Define.
798 * config/tc-sh.c (OPTION_H_TICK_HEX): New.
799 (md_longopts): Add "-h-tick-hex".
800 (md_parse_option): Support it.
801 * doc/c-sh.texi (SH Options): Document it.
802 * doc/c-sh64.texi (SH64 Options): Document it.
803 * doc/as.texinfo (Overview): Likewise.
808 * dwarf2dbg.c (dwarf2_directive_file): Disable gas generated
809 debug info if we see compiler generated debug info.
810 (dwarf2_directive_loc): Likewise. Remove redundant debug_type test.
814 * dwarf2dbg.c: Remove superfluous forward function declarations.
815 (DWARF2_FORMAT): Add section arg.
816 (out_header): New function, split out from..
817 (out_debug_line): ..here.
818 (out_debug_aranges): Use out_header.
819 (out_debug_abbrev): Add info_seg and line_seg args. Use
820 DW_FORM_data8 (for DW_AT_stmt_list) if line_seg is 64-bit.
821 (out_debug_info): Use out_header. Output 8 byte DW_AT_stmt_list
822 if line_seg is 64-bit.
823 (dwarf2_finish): Adjust out_debug_abbrev call.
824 * config/tc-mips.h (DWARF2_FORMAT, mips_dwarf2_format): Add sec arg.
825 * config/tc-mips.c (mips_dwarf2_format): Likewise.
829 * Makefile.am (POTFILES.in): Set LC_ALL=C.
830 * Makefile.in: Regenerate.
831 * po/POTFILES.in: Regenerate.
835 * config/tc-ppc.c (parse_cpu): Rename altivec_or_spe to retain_flags.
836 Handle -mvsx and -mpower7.
837 (md_show_usage): Document -mpower7 and -mvsx.
838 * doc/as.texinfo (Target PowerPC): Document -mvsx.
839 * doc/c-ppc.texi (PowerPC-Opts): Document -mvsx and -mpower7.
843 * config/tc-ppc.c (parse_cpu) <power6>: Accept Altivec instructions.
848 * config/tc-ppc.c (parse_cpu): Separate handling of -m403/405.
849 (md_show_usage): Likewise.
853 * messages.c, symbols.c, write.c: Silence gcc warnings.
857 * config/tc-i386.c (operand_type_check): Warning fix.
861 * doc/as.texinfo: Add description of single-precision attribute.
865 * config/bfin-parse.y (asm_1): Error if plain symbol is used
866 as load/store offset.
870 * config/tc-mips.c (mips_ip): Reset s to argsStart.
874 * config/tc-bfin.c (bfin_gen_loop): Remove loop symbol.
878 * config/tc-h8300.c (fix_operand_size): Use the default size
879 specified by the .lbranch/.sbranch pseudos.
883 * config/tc-m32c.h (H_TICK_HEX): Define.
884 * config/tc-m32c.c (OPTION_H_TICK_HEX): Define.
885 (md_longopts): Add support for it.
886 (md_parse_option): Likewise.
887 * doc/as.texinfo (Overview): Add new m32c options.
888 * doc/c-m32c.texi (M32C-Modifiers): Likewise
890 * as.h: (enable_h_tick_hex): New.
891 * app.c (enable_h_tick_hex): New.
893 (do_scrub_begin): Mark 'H' and 'h' as special if enable_h_tick_hex.
894 (do_scrub_chars): If enable_h_tick_hex and 'h', check for H'00
895 style hex constants and convert the input stream to 0x00 style.
896 (do_scrub_chars): If a 'X style character constant is found after
897 a symbol character (like you're or X'00), warn the user.
901 * config/tc-mips.c (mips16_mark_labels): Use ELF_ST_SET_MIPS16.
902 (mips_fix_adjustable): Likewise.
903 (mips_frob_file_after_relocs): Likewise.
907 * config/tc-m68k.c (m68k_set_cpu, m68k_set_arch): Don't complain
908 about overriding an earlier setting.
912 * config/tc-mips.c (NO_ISA_COP): New macro.
913 (COP_INSN): New macro.
914 (is_opcode_valid): Use them.
915 (macro) <ld_st>: Use them. Don't accept coprocessor load store
916 insns based on the ISA if CPU is NO_ISA_COP.
917 <copz>: Likewise for coprocessor operations.
921 * config/tc-arm.c (arm_fix_adjustable): Don't adjust MOVW/MOVT
926 * configure.tgt: Add bfin-*-rtems*.
930 * config/tc-spu.c (md_apply_fix): Handle fully resolved
931 BFD_RELOC_32_PCREL, BFD_RELOC_SPU_HI16 and BFD_RELOC_SPU_LO16.
935 * config/tc-ppc.c (parse_cpu): Handle -m464.
936 (md_show_usage): Likewise.
940 Add support for ATtiny13A.
941 * config/tc-avr.c (mcu_types): Add attiny13a.
942 * doc/c-avr.texi: Likewise.
947 * write.c (relax_segment <rs_org>): Include current stretch
948 value when calculating whether .org is backwards.
952 * configure: Regenerate.
956 * app.c (do_scrub_chars): Do not UNGET an EOF value.
961 * config/tc-mmix.c (s_loc): Assume "negative" addresses belong to
962 text_section. Do the "stepping backwards" test for text_section
963 using unsigned operands.
967 * config/tc-ppc.c (ppc_cpu): Use ppc_cpu_t typedef.
968 (ppc_insert_operand): Likewise.
969 (ppc_machine): Likewise.
970 * config/tc-ppc.h: #include "opcode/ppc.h"
971 (struct _ppc_fix_extra <ppc_cpu>): Use ppc_cpu_t typedef.
972 (ppc_cpu): Update extern decl.
976 * config/tc-mips.c (validate_mips_insn): Handle field descriptors
977 +x, +X, +p, +P, +s, +S.
980 * config/tc-mips.c (validate_mips_insn): Handle field descriptor +Q.
982 (macro_build): Likewise.
983 (CPU_HAS_SEQ): New macro.
984 (macro2) <M_SEQ_I, M_SNE_I>: Use it. Emit seq/sne and seqi/snei.
988 * config/tc-avr.c (mcu_types): Remove support for ATmega32HVB device.
989 * doc/c-avr.texi: Likewise.
993 * app.c (do_scrub_chars): Do not UNGET an EOF value.
997 * config/tc-i386.c (set_sse_check): New.
998 (md_pseudo_table): Add "sse_check".
1002 * config/tc-arm.c (do_t_rbit): Populate both rm fields.
1007 * config/tc-avr.c (avr_ldi_expression): Do not warn about unknown
1012 * config/tc-mips.c (mips_cpu_info_table): Move records for
1013 ST Loongson-2E/2F processors to a better place.
1018 * config/tc-i386.c (match_template): Report ambiguous operand
1019 size, not invalid suffix when there is no match in Intel
1024 * config/tc-arm.c (parse_cond): Covert to lowercase before matching.
1028 * config/tc-arm.c (arm_cpus): Add Faraday ARMv4 and ARMv5TE
1029 compatible cores: fa526, fa626, fa626te, fa726te.
1030 * doc/c-arm.texi (ARM Opts): Add -mcpu={fa526, fa626, fa626te,
1035 * Makefile.am: Run "make dep-am".
1036 * Makefile.in: Regenerate.
1037 * doc/Makefile.in: Regenerate.
1038 * po/POTFILES.in: Regenerate.
1042 * config/tc-mips.c (mips_frob_file): Don't match MIPS16 relocs
1043 with non-MIPS16 relocs.
1047 * config/tc-mips.c (md_begin): Use strncmp to compare TARGET_OS, in
1048 case that some characters append at the end of the name.
1049 (mips_ip): Likewise.
1050 (s_change_sec): Likewise.
1051 (md_section_align): Likewise.
1055 * config/tc-xtensa.c (xtensa_create_property_segments): Use
1056 xtensa_make_property_section instead of xtensa_get_property_section.
1057 (xtensa_create_xproperty_segments): Likewise.
1061 * NEWS: Mention XSAVE, EPT and MOVBE.
1063 * config/tc-i386.c (cpu_arch): Add .movbe and .ept.
1064 (md_show_usage): Add .movbe and .ept.
1066 * doc/c-i386.texi: Add movbe and ept to -march=. Document
1071 * config/tc-sparc.c (v9a_asr_table): Fix order of softint entries.
1075 * config/tc-mips.c (file_mips_soft_float, file_mips_single_float):
1077 (OPTION_ELF_BASE): Make room for new option macros.
1078 (OPTION_SOFT_FLOAT, OPTION_HARD_FLOAT, OPTION_SINGLE_FLOAT,
1079 OPTION_DOUBLE_FLOAT): New option macros.
1080 (md_longopts): Add msoft-float, mhard-float, msingle-float and
1082 (md_parse_option): Handle OPTION_SINGLE_FLOAT,
1083 OPTION_DOUBLE_FLOAT, OPTION_SOFT_FLOAT and OPTION_HARD_FLOAT.
1084 (md_show_usage): Add -msoft-float, -mhard-float, -msingle-float
1086 (struct mips_set_options): New fields soft_float and single_float.
1087 (mips_opts): Initialized them. Add comment for each field
1089 (mips_after_parse_args): Set them based on file_mips_soft_float
1090 and file_mips_single_float.
1091 (s_mipsset): Add support for `.set softfloat', `.set hardfloat',
1092 `.set singlefloat' and `.set doublefloat'.
1093 (is_opcode_valid): New function to invoke OPCODE_IS_MEMBER.
1094 Handle single-float and soft-float instructions here.
1095 (macro_build, mips_ip): Use it instead of OPCODE_IS_MEMBER.
1096 (is_opcode_valid_16): New function.
1097 (mips16_ip): Use it instead of OPCODE_IS_MEMBER.
1098 (macro) <M_LDC1_AB, M_SDC1_AB, M_L_DOB, M_L_DAB, M_S_DAB,
1099 M_S_DOB>: Remove special-casing of r4650.
1100 * doc/c-mips.texi (-march=): Add Octeon.
1101 (MIPS Opts): Document -msoft-float and -mhard-float. Document
1102 -msingle-float and -mdouble-float.
1103 (MIPS floating-point): New section. Document `.set softfloat' and
1104 `.set hardfloat'. Document `.set singlefloat' and `.set
1109 * config/tc-sparc.c: Accept 'softint_clear' and 'softint_set'
1112 * doc/c-sparc.texi: Consistently refer to architecture 'versions',
1113 rather than occaisionally 'levels'. Consistently refer to Sun's
1114 UNIX variant as SunOS, every version of Solaris is also SunOS.
1115 Document new 'softint_clear' and 'softint_set' aliases. Clarify
1116 which architecture versions support '%dcr', '%cq', and '%gl'. Add
1117 section on 32-bit/64-bit opcode translations.
1121 * Makefile.am (OBJ_FORMAT_CFILES): Add config/obj-fdpicelf.c.
1122 (OBJ_FORMAT_HFILES): Add config/obj-fdpicelf.h.
1123 (obj-fdpicelf.o): Define.
1124 * Makefile.in: Regenerate.
1125 * configure.tgt: Set bfd_gas to yes when fmt is fdpicelf.
1127 (bfin-*-linux-uclibc): New; set fmt to fdpicelf and em to linux.
1128 (bfin-*-uclinux*): New; set fmt to elf and em to linux.
1129 * config/obj-fdpicelf.c: New.
1130 * config/obj-fdpicelf.h: Likewise.
1131 * config/tc-bfin.c (bfin_flags, bfin_pic_flag): Set default based on
1132 the OBJ_FDPIC_ELF define.
1133 (OPTION_NOPIC): Define.
1134 (md_longopts): Add mnopic and mno-fdpic.
1135 (md_parse_option): Handle OPTION_NOPIC.
1139 * aclocal.m4: Regenerate.
1140 * configure: Regenerate.
1144 * config/tc-sparc.c (v9a_asr_table): Add missing
1145 'stick' and 'stick_cmpr', and document ordering rules
1147 (tc_gen_reloc): Accept BFD_RELOC_SPARC_PC22 and
1148 BFD_RELOC_SPARC_PC10.
1149 * doc/c-sparc.texi: New section on Sparc constants.
1150 Add documentation for %stick and %stick_cmpr.
1154 * config/obj-elf.c (obj_elf_section_type): Add prototype
1155 before obj_elf_section_word and add 'warn' arg.
1156 (obj_elf_section_word): Add type pointer arg, and if no #SECTION
1157 is matched, try checking for #SECTION_TYPE.
1158 (obj_elf_section): Adjust for new args.
1159 (obj_elf_type_name): New function.
1160 (obj_elf_type): Call it, and accept STT_foo number strings
1161 in .type statements as output by SunPRO compiler.
1165 * config/tc-i386.c (md_assemble): Don't check SSE instructions
1170 * doc/c-sparc.texi: Add syntax section.
1174 * config/tc-i386.c (build_modrm_byte): Don't check FMA to swap
1175 REG and NDS for instructions with immediate operand.
1179 * config/tc-i386.c (build_modrm_byte): Swap REG and NDS for
1184 * config/tc-sparc.c (sparc_ip): Add support for gotdata mnemonics
1185 and relocation generation.
1186 (tc_gen_reloc): Likewise.
1190 * config/tc-sh.c (md_apply_fix): Make sure BFD_RELOC_SH_PCRELIMM8BY4
1191 relocations are properly aligned, and not negative.
1195 * doc/tc-arm.texi: Fix fnstart and fnend directive names.
1199 * config/tc-ppc.c (parse_cpu): Handle "e500mc". Extend "e500" to
1200 accept e500mc instructions.
1201 (md_show_usage): Document -me500mc.
1205 * listing.c (print_timestamp): Use localtime rather than
1206 localtime_r since not all build environments provide the latter.
1210 * NEWS: Mention -msse-check=[none|error|warning].
1212 * config/tc-i386.c (sse_check): New.
1213 (OPTION_MSSE_CHECK): Likewise.
1214 (md_assemble): Check SSE instructions if needed.
1215 (md_longopts): Add -msse-check.
1216 (md_parse_option): Handle OPTION_MSSE_CHECK.
1217 (md_show_usage): Show -msse-check=[none|error|warning].
1219 * doc/c-i386.texi: Document -msse-check=[none|error|warning].
1223 * listing.c: Add -ag listing flag to show general information in
1224 listings such as gas version, passed options, and time stamp.
1225 (listing_general_info): New function.
1226 (print_options): New function.
1227 (print_single_option): New function.
1228 (print_timestamp): New function.
1229 (MAX_DATELEN): Define.
1230 (listing_print): Add call to listing_general_info.
1231 * listing.h (LISTING_GENERAL): Define.
1232 (listing_print): Add new parameter.
1233 * as.c (show_usage): Print new switch.
1234 (parse_args): Parse new switch.
1235 (main): Pass command line on to listing_print.
1236 * NEWS: Mention this new feature.
1237 * doc/as.texinfo: Document the new sub-option.
1241 * dwarf2dbg.c (dwarf2_emit_insn): Simplify test before dwarf2_where
1242 call. Delete out of date comment.
1243 (dwarf2_consume_line_info): Always clear dwarf2_loc_directive_seen.
1244 (dwarf2_emit_label): Don't emit unless there has been a previous
1245 .file or we are outputting assembler generated debug.
1246 dwarf2_consume_line_info after emitting line info, not before.
1247 (out_debug_info): Simplify files_in_use test.
1251 * config/tc-i386.c (parse_real_register): Return AVX register
1252 only if AVX is enabled.
1257 * config/tc-sh64.c (shmedia_md_pcrel_from_section): Use
1258 md_pcrel_from_section for BFD_RELOC_64 and BFD_RELOC_64_PCREL.
1263 * config/tc-xtensa.c (xg_apply_fix_value): Check return code from
1264 call to decode_reloc.
1268 * NEWS: Mention XSAVE. Change CLMUL to PCLMUL.
1270 * config/tc-i386.c (cpu_arch): Add .pclmul.
1271 (md_show_usage): Replace clmul with pclmul.
1272 * doc/c-i386.texi: Likewise.
1276 * NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx.
1278 * doc/c-i386.texi: Add avx, aes, clmul and fma to -march=.
1279 Document -msse2avx, .avx, .aes, .clmul and .fma.
1281 * config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New.
1282 (vex_prefix): Likewise.
1283 (sse2avx): Likewise.
1284 (CPU_FLAGS_ARCH_MATCH): Likewise.
1285 (CPU_FLAGS_64BIT_MATCH): Likewise.
1286 (CPU_FLAGS_32BIT_MATCH): Likewise.
1287 (CPU_FLAGS_PERFECT_MATCH): Likewise.
1289 (vex_imm4): Likewise.
1290 (fits_in_imm4): Likewise.
1291 (build_vex_prefix): Likewise.
1292 (VEX_check_operands): Likewise.
1293 (bad_implicit_operand): Likewise.
1294 (OPTION_MSSE2AVX): Likewise.
1295 (T_YMMWORD): Likewise.
1296 (_i386_insn): Add vex.
1297 (cpu_arch): Add .avx, .aes, .clmul and .fma.
1298 (cpu_flags_match): Changed to take a pointer to const template.
1299 Enable encoding SSE instructions with VEX prefix for -msse2avx.
1300 (match_mem_size): Also check ymmword.
1301 (operand_type_match): Clear ymmword.
1302 (md_begin): Allow '_' in mnemonic.
1303 (type_names): Add OPERAND_TYPE_VEX_IMM4.
1304 (process_immext): Update assert.
1305 (md_assemble): Don't call process_immext if sse2avx and immext
1306 are true. Call build_vex_prefix if vex is true.
1307 (parse_insn): Updated for cpu_flags_match.
1308 (swap_operands): Handle 5 operands.
1309 (match_template): Handle 5 operands. Updated for cpu_flags_match.
1310 Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX.
1311 (process_suffix): Handle YMMWORD_MNEM_SUFFIX.
1312 (check_byte_reg): Check regymm.
1313 (process_operands): Duplicate the destination register for
1314 -msse2avx if needed.
1315 (build_modrm_byte): Updated for instructions with VEX encoding.
1316 (output_insn): Output VEX prefix if needed.
1317 (md_longopts): Add msse2avx.
1318 (md_parse_option): Handle OPTION_MSSE2AVX.
1319 (md_show_usage): Add avx, aes, clmul, fma and -msse2avx.
1320 (intel_e09): Support YMMWORD.
1321 (intel_e11): Likewise.
1322 (intel_get_token): Likewise.
1326 * config/tc-avr.c (mcu_types): Add attiny167.
1327 * doc/c-avr.texi: Likewise.
1331 * config/tc-avr.c (mcu_types): Add atmega32u4.
1332 * doc/c-avr.texi: Likewise.
1336 * config/tc-avr.c (mcu_types): Add atmega32c1.
1337 * doc/c-avr.texi: Likewise.
1341 * config/tc-arm.c (parse_neon_mov): Parse register before immediate
1342 to avoid spurious symbols.
1346 * config/tc-m68k.c (md_convert_frag_1): Replace as_fatal with
1351 * config/tc-avr.c (mcu_types): Add atmega32m1.
1352 * doc/c-avr.texi: Likewise.
1356 * config/tc-arm.c (do_neon_cvt): Move variable declarations to
1358 (do_neon_ext): Fix sign of comparison.
1363 * config/bfin-parse.y (asm_1): Check AREGS in comparison
1364 instructions. And call yyerror when comparing PREG with
1366 (check_macfunc_option): New.
1367 (check_macfuncs): Check option by calling check_macfunc_option.
1368 Fix comparison always true warnings. Both scalar instructions
1369 of vector instruction must share the same mode option. Only allow
1370 option mode at the end of the second instruction of the vector.
1371 (asm_1): Check option by calling check_macfunc_option.
1373 * config/bfin-parse.y (check_macfunc_option): Allow (IU)
1374 option for multiply and multiply-accumulate to data register
1376 (check_macfuncs): Don't check if accumulator matches the data register
1378 (assign_macfunc): Check if accumulator matches the
1379 data register in each rule that moves to the data
1382 * config/tc-bfin.c (bfin_start_line_hook): Localize the labels
1383 generated for LOOP_BEGIN and LOOP_END instructions.
1384 (bfin_gen_loop): Likewise.
1388 * config/tc-s390.c (md_parse_option): z10 option added.
1392 * aclocal.m4: Regenerate.
1393 * configure: Likewise.
1394 * Makefile.in: Likewise.
1395 * doc/Makefile.in: Likewise.
1400 * config/tc-hppa.c (is_same_frag): Delete.
1404 * config/tc-xtensa.h (xtensa_relax_statesE): Update comment for
1405 RELAX_LOOP_END_ADD_NOP.
1410 * read.c (s_mexit): Warn if attempting to exit a macro when not
1411 inside a macro definition.
1415 * Makefile.am: Run "make dep-am".
1416 * Makefile.in: Regenerate.
1417 * configure: Regenerate.
1421 * config/tc-arm.c (arm_cpu_option_table): Add cortex-a9.
1422 * doc/c-arm.texi: Add cortex-a9.
1426 * config/tc-arm.c (fpu_vfp_ext_d32): New vairable.
1427 (parse_vfp_reg_list, encode_arm_vfp_reg): Use it.
1428 (arm_option_cpu_value): Add vfpv3-d16, vfpv2 and vfpv3.
1429 (aeabi_set_public_attributes): Handle Tag_VFP_arch=VFPV3-D16.
1430 * doc/c-arm.texi: Document new ARM FPU variants.
1434 * config/tc-arm.c (md_apply_fix): Use correct offset range.
1438 * config/tc-ppc.c (ppc_setup_opcodes): Tidy. Add code to test
1439 for strict ordering of powerpc_opcodes, but disable for now.
1443 * config/tc-arm.c (arm_ext_barrier, arm_ext_msr): New.
1444 (arm_ext_v7m): Rename...
1445 (arm_ext_m): ... to this. Include v6-M.
1446 (do_t_add_sub): Allow narrow low-reg non flag setting adds.
1447 (do_t_mrs, do_t_msr, aeabi_set_public_attributes): Use arm_ext_m.
1448 (md_assemble): Allow wide msr instructions.
1449 (insns): Add classifications for v6-m instructions.
1450 (arm_cpu_option_table): Add cortex-m1.
1451 (arm_arch_option_table): Add armv6-m.
1452 (cpu_arch): Add ARM_ARCH_V6M. Fix numbering of other v6 variants.
1457 * config/tc-xtensa.c (xtensa_num_pipe_stages): New.
1458 (md_begin): Initialize it.
1459 (resources_conflict): Use it.
1463 * config/tc-xtensa.h (RELAX_XTENSA_NONE): New.
1469 * read.c (pseudo_set): Don't allow global register symbol.
1471 * symbols.c (S_SET_EXTERNAL): Don't allow register symbol
1477 * write.c (write_object_file): Don't allow symbols which were
1478 equated to register. Stop if there is an error.
1482 * config/tc-ppc.h (struct _ppc_fix_extra): New.
1484 (TC_FIX_TYPE, TC_INIT_FIX_DATA): Define.
1485 * config/tc-ppc.c (ppu_cpu): Make global.
1486 (ppc_insert_operand): Add ppu_cpu parameter.
1487 (md_assemble): Adjust for above change.
1488 (md_apply_fix): Pass tc_fix_data.ppc_cpu to ppc_insert_operand.
1492 * config/tc-arm.c (do_bx): Only test EF_ARM_EABI_VERSION on ELF
1493 targeted ARM ports, otherwise just skip generating the reloc.
1497 * doc/c-i386.texi: Update -march= and .arch.
1501 * config/tc-mn10300.c (has_known_symbol_location): New function.
1502 Do not regard weak symbols as having a known location.
1503 (md_estimate_size_before_relax): Use new function.
1504 (md_pcrel_from): Do not compute a pcrel against a weak symbol.
1508 * config/tc-i386.c (match_template): Disallow 'l' suffix when
1509 currently selected CPU has no 32-bit support.
1510 (parse_real_register): Do not return registers not available on
1511 currently selected CPU.
1515 * config/tc-i386.c (process_immext): Fix format.
1519 * config/tc-i386.c (inoutportreg): New.
1520 (process_immext): New.
1521 (md_assemble): Use it.
1522 (update_imm): Use imm16 and imm32s.
1523 (i386_att_operand): Use inoutportreg.
1527 * config/tc-i386.c (operand_type_all_zero): New.
1528 (operand_type_set): Likewise.
1529 (operand_type_equal): Likewise.
1530 (cpu_flags_all_zero): Likewise.
1531 (cpu_flags_set): Likewise.
1532 (cpu_flags_equal): Likewise.
1533 (UINTS_ALL_ZERO): Removed.
1534 (UINTS_SET): Likewise.
1535 (UINTS_CLEAR): Likewise.
1536 (UINTS_EQUAL): Likewise.
1537 (cpu_flags_match): Updated.
1538 (smallest_imm_type): Likewise.
1539 (set_cpu_arch): Likewise.
1540 (md_assemble): Likewise.
1541 (optimize_imm): Likewise.
1542 (match_template): Likewise.
1543 (process_suffix): Likewise.
1544 (update_imm): Likewise.
1545 (process_drex): Likewise.
1546 (process_operands): Likewise.
1547 (build_modrm_byte): Likewise.
1548 (i386_immediate): Likewise.
1549 (i386_displacement): Likewise.
1550 (i386_att_operand): Likewise.
1551 (parse_real_register): Likewise.
1552 (md_parse_option): Likewise.
1553 (i386_target_format): Likewise.
1558 * config/tc-arm.c (s_arm_unwind_save): Advance the input line
1559 pointer past the comma after parsing a floating point register
1565 * config/tc-avr.c (mcu_types): Change the ISA tyoe of the attiny26
1567 (avr_operand): Disallow post-increment addressing in the lpm
1568 instruction for the attiny26.
1572 * config/tc-i386.c (parse_real_register): Don't return 'FLAT'
1573 if not in Intel mode.
1574 (i386_intel_operand): Ignore segment overrides in immediate and
1576 (intel_e11): Range-check i.mem_operands before use as array
1577 index. Filter out FLAT for uses other than as segment override.
1578 (intel_get_token): Remove broken promotion of "FLAT:" to mean
1583 * config/tc-i386.c (intel_e09): Also special-case 'bound'.
1587 * config/tc-i386.c (allow_pseudo_reg): New.
1588 (parse_real_register): Check for NULL just once. Allow all
1589 register table entries when allow_pseudo_reg is non-zero.
1590 Don't allow any registers without type when allow_pseudo_reg
1592 (tc_x86_regname_to_dw2regnum): Replace with ...
1593 (tc_x86_parse_to_dw2regnum): ... this.
1594 (tc_x86_frame_initial_instructions): Adjust for above change.
1595 * config/tc-i386.h (tc_regname_to_dw2regnum): Remove.
1596 (tc_parse_to_dw2regnum): New.
1597 (tc_x86_regname_to_dw2regnum): Replace with ...
1598 (tc_x86_parse_to_dw2regnum): ... this.
1599 * dw2gencfi.c (tc_parse_to_dw2regnum): New, broken out of ...
1600 (cfi_parse_reg): ... this. Use tc_parse_to_dw2regnum. Adjust
1605 * config/tc-tic4x.c (tic4x_insn_insert): Add const qualifier to
1607 (tic4x_insn_add): Likewise.
1608 (md_begin): Drop cast that was discarding a const qualifier.
1609 * config/tc-d30v.c (get_reloc): Add const qualifier to op
1611 (build_insn): Drop cast that was discarding a const qualifier.
1615 * config/tc-i386.c (cpu_arch): Add .xsave.
1616 (md_show_usage): Add .xsave.
1618 * doc/c-i386.texi: Add xsave to -march=.
1622 * read.c (s_weakref): Don't pass unadorned NULL to concat.
1623 * config/tc-i386.c (set_cpu_arch, md_parse_option): Likewise.
1627 * config/tc-xtensa.c (relax_frag_immed): Change internal consistency
1628 checks into assertions. When relaxation produces an operation that
1629 does not fit in the current FLIX instruction, make sure that the
1630 operation is relaxed as needed to account for being placed following
1631 the current instruction.
1636 * configure: Regenerated.
1640 * config/tc-mips.c (mips_cpu_info_table): Add Octeon.
1644 * configure.tgt (xtensa*-*-*): Recognize processor variants.
1648 * read.c: (emit_expr): Correct for mingw use of printf size
1653 * doc/c-xtensa.texi (Xtensa Syntax): Clarify handling of opcodes that
1654 can only be encoded in FLIX instructions but are not specified as such.
1655 (Xtensa Automatic Alignment): Remove obsolete comment about debugging
1660 * NEWS: Mention new command line options for x86 targets.
1664 * config/tc-i386.c (md_show_usage): Replace tabs with spaces.
1668 * config/tc-avr.c (mcu_types): Change opcode set for at86rf401.
1672 * config/tc-i386.c (md_show_usage): Show more processors for
1677 * config/tc-i386.c (i386_target_format): Remove cpummx2.
1681 * config/tc-i386.c (XXX_PREFIX): Moved from tc-i386.h.
1682 (XXX_MNEM_SUFFIX): Likewise.
1683 (END_OF_INSN): Likewise.
1684 (templates): Likewise.
1685 (modrm_byte): Likewise.
1686 (rex_byte): Likewise.
1687 (DREX_XXX): Likewise.
1688 (drex_byte): Likewise.
1689 (sib_byte): Likewise.
1690 (processor_type): Likewise.
1691 (arch_entry): Likewise.
1692 (cpu_sub_arch_name): Remove const.
1693 (cpu_arch): Add .vmx and .smx.
1694 (set_cpu_arch): Append cpu_sub_arch_name.
1695 (md_parse_option): Support -march=CPU[,+EXTENSION...].
1696 (md_show_usage): Updated.
1698 * config/tc-i386.h (XXX_PREFIX): Moved to tc-i386.c.
1699 (XXX_MNEM_SUFFIX): Likewise.
1700 (END_OF_INSN): Likewise.
1701 (templates): Likewise.
1702 (modrm_byte): Likewise.
1703 (rex_byte): Likewise.
1704 (DREX_XXX): Likewise.
1705 (drex_byte): Likewise.
1706 (sib_byte): Likewise.
1707 (processor_type): Likewise.
1708 (arch_entry): Likewise.
1710 * doc/as.texinfo: Update i386 -march option.
1712 * doc/c-i386.texi: Update -march= for ISA.
1716 * config/tc-xtensa.c (xtensa_leb128): New function.
1717 (md_pseudo_table): Use it for sleb128 and uleb128.
1718 (is_leb128_expr): New internal flag.
1719 (xtensa_symbol_new_hook): Check new flag.
1723 * config/tc-avr.c (mcu_types): Change opcode set for avr3,
1724 at90usb82, at90usb162.
1725 * doc/c-avr.texi: Change architecture grouping for at90usb82,
1727 These changes support the new avr35 architecture group in gcc.
1731 * config/tc-i386.c (md_assemble): Also zap movzx and movsx
1732 suffix for AT&T syntax.
1736 * config/tc-i386.c (match_reg_size): New.
1737 (match_mem_size): Likewise.
1738 (operand_size_match): Likewise.
1739 (operand_type_match): Also clear all size fields.
1740 (match_template): Skip Intel syntax when in AT&T syntax.
1741 Call operand_size_match to check operand size.
1742 (i386_att_operand): Set the mem field to 1 for memory
1744 (i386_intel_operand): Likewise.
1749 * config/tc-i386.c (_i386_insn): Update comment.
1750 (operand_type_match): Also clear unspecified.
1751 (operand_type_register_match): Likewise.
1752 (parse_operands): Initialize unspecified.
1753 (i386_intel_operand): Likewise.
1754 (match_template): Check memory and accumulator operand size.
1755 (i386_att_operand): Clear unspecified on register operand.
1756 (intel_e11): Likewise.
1757 (intel_e09): Set operand size and clean unspecified for
1762 * read.c (s_space): Declare `repeat' as offsetT.
1766 * config/tc-i386.c (match_template): Check processor support
1771 * config/tc-i386.c (match_template): Continue if processor
1776 * config/tc-ia64.c (ia64_convert_frag): Zero-initialize room for
1777 unwind personality function address.
1781 * dwarf2dbg.c (out_sleb128): Delete.
1782 (size_fixed_inc_line_addr, emit_fixed_inc_line_addr): New.
1783 (out_fixed_inc_line_addr): Delete.
1784 (relax_inc_line_addr, dwarf2dbg_estimate_size_before_relax): Call new
1785 size_fixed_inc_line_addr if DWARF2_USE_FIXED_ADVANCE_PC is set.
1786 (dwarf2dbg_convert_frag): Likewise for emit_fixed_inc_line_addr.
1787 (process_entries): Remove calls to out_fixed_inc_line_addr. When
1788 DWARF2_USE_FIXED_ADVANCE_PC is set, call relax_inc_line_addr.
1789 * read.h (emit_expr_fix): New prototype.
1790 * read.c (emit_expr): Move code to emit_expr_fix and use it here.
1791 (emit_expr_fix): New.
1795 * config/tc-i386.c (match_template): Check register size
1796 only when size of operands can be encoded the canonical way.
1800 * config/tc-i386.c (i386_operand): Renamed to ...
1801 (i386_att_operand): This.
1802 (parse_operands): Updated.
1806 * doc/c-i386.texi: Update .att_mnemonic and .intel_mnemonic.
1808 * config/tc-i386.c (set_intel_mnemonic): Set intel_mnemonic
1810 (md_assemble): Remove Intel mode workaround.
1811 (match_template): Check support for old gcc, AT&T mnemonic
1813 (md_parse_option): Don't set intel_mnemonic to 0 for
1818 * config/tc-i386.h: Update copyright to 2008.
1822 * config/tc-ppc.c (parse_cpu): Preserve the settings of the
1823 PPC_OPCODE_ALTIVEC and PPC_OPCODE_SPE flags.
1827 * config/tc-i386.c (md_assemble): Use !intel_mnemonic instead
1832 * gas/config/tc-i386.c (cpu_arch_flags_not): Removed.
1833 (cpu_flags_not): Likewise.
1834 (cpu_flags_match): Updated to check 64bit and arch.
1835 (set_code_flag): Remove cpu_arch_flags_not.
1836 (set_16bit_gcc_code_flag): Likewise.
1837 (set_cpu_arch): Likewise.
1838 (md_begin): Likewise.
1839 (parse_insn): Call cpu_flags_match to check 64bit and arch.
1840 (match_template): Likewise.
1844 * config/tc-i386.c (process_drex): Initialize modrm_reg and
1845 modrm_regmem to 0 instead of None.
1849 * config/tc-i386.c (match_template): Use the xmmword field
1854 * config/tc-i386.c (process_suffix): Fix a typo.
1859 * config/tc-i386.c (match_template): Handle XMMWORD_MNEM_SUFFIX.
1860 Check memory size in Intel mode.
1861 (process_suffix): Handle XMMWORD_MNEM_SUFFIX.
1862 (intel_e09): Likewise.
1864 * config/tc-i386.h (XMMWORD_MNEM_SUFFIX): New.
1868 * config/tc-mips.c (mips_ip): Check operands on jalr instruction.
1870 For older changes see ChangeLog-2007
1876 version-control: never