3 * config/tc-arm.c (arm_convert_symbolic_attribute): Add Tag_DIV_use.
4 * doc/c-arm.texi: Likewise.
8 * config/tc-arm.c (asm_opcode): operands type
10 (BAD_PC_ADDRESSING): New macro message.
11 (BAD_PC_WRITEBACK): Likewise.
12 (MIX_ARM_THUMB_OPERANDS): New macro.
13 (operand_parse_code): Added enum values.
14 (parse_operands): Added thumb/arm distinction,
15 plus new enum values handling.
16 (encode_arm_addr_mode_2): Validations enhanced.
17 (encode_arm_addr_mode_3): Likewise.
18 (do_rm_rd_rn): Likewise.
19 (encode_thumb32_addr_mode): Likewise.
20 (do_t_ldrex): Likewise.
21 (do_t_ldst): Likewise.
22 (do_t_strex): Likewise.
23 (md_assemble): Call parse_operands with
31 (insns): Updated insns operands.
36 * config/tc-ia64.c (enum reloc_func): Add FUNC_SLOTCOUNT_RELOC.
37 (DUMMY_RELOC_IA64_SLOTCOUNT): Added.
38 (pseudo_func): Add an entry for slotcount.
39 (md_begin): Initialize slotcount pseudo symbol.
40 (ia64_parse_name): Handle @slotcount parameter.
41 (ia64_gen_real_reloc_type): Handle slotcount.
42 (md_apply_fix): Ditto.
43 * doc/c-ia64.texi (IA-64-Relocs): Document @slotcount.
47 * config/tc-xtensa.c (istack_init): Don't call memset.
51 * config/tc-xtensa.c (cache_literal_section): Handle prefixes as
56 * config/tc-xtensa.c (xtensa_find_unaligned_loops): Rewrite.
60 * config/tc-i386.c (build_modrm_byte): Reformat.
64 * config/tc-i386.c: Update copyright.
69 * config/tc-i386.c (vec_imm4) New operand type.
71 (VEX_check_operands): New.
72 (check_reverse): Call VEX_check_operands.
73 (build_modrm_byte): Reintroduce code for 5
74 operand insns. Fix whitespace.
78 * config/tc-ppc.c (md_show_usage): Add -mpwr4, -mpwr5, -mpwr5x,
83 * config/tc-xtensa.c (RELAXED_LOOP_INSN_BYTES): New.
84 (next_frag_pre_opcode_bytes): Use RELAXED_LOOP_INSN_BYTES.
85 (xtensa_mark_zcl_first_insns): Rewrite to handle corner case.
89 * config/tc-arm.c (md_pcrel_from_section): Keep base to zero for
90 non-local branches (BFD_RELOC_THUMB_PCREL_BRANCH23,
91 BFD_RELOC_THUMB_PCREL_BLX, BFD_RELOC_ARM_PCREL_BLX,
92 BFD_RELOC_ARM_PCREL_CALL)
96 * config/tc-xtensa.c (frag_format_size): Generalize logic to
97 handle more instruction sizes and fetch widths.
98 (branch_align_power): Likewise.
99 (text_align_power): Likewise.
100 (bytes_to_stretch): Likewise.
104 * config/tc-ppc.c (md_show_usage): Mention -mtitan. Don't use tabs.
105 (ppc_mach): Handle titan.
106 * doc/c-ppc.texi: Mention -mtitan.
110 * config/tc-xtensa.c (UNREACHABLE_MAX_WIDTH): Delete and
112 (xtensa_fetch_width) ...this.
116 * Makefile.am (CPU_TYPES, OBJ_FORMATS, CPU_OBJ_VALID,
117 MULTI_CPU_TYPES, MULTI_CPU_OBJ_VALID): Remove.
118 * Makefile.in: Regenerate.
122 * config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1.
123 (i386_align_code): Rename PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1.
124 * config/tc-i386.h (processor_type): Same.
125 * doc/c-i386.texi: Change amdfam15 to bdver1.
130 * config/tc-arm.c (neon_check_type): Handle a neon_shape value of
135 * NEWS: Mention new feature.
136 * config/obj-coff.c (obj_coff_section): Accept digits and use
137 to override default section alignment power if specified.
138 * doc/as.texinfo (.section directive): Update documentation.
142 * config/tc-i386.c (avxscalar): New.
143 (OPTION_MAVXSCALAR): Likewise.
144 (build_vex_prefix): Select vector_length for scalar instructions
146 (md_longopts): Add OPTION_MAVXSCALAR.
147 (md_parse_option): Handle OPTION_MAVXSCALAR.
148 (md_show_usage): Add -mavxscalar=.
150 * doc/c-i386.texi: Document -mavxscalar=.
154 * config/tc-i386.c (build_vex_prefix): Set i.vex.bytes[0] to
159 * write.h (fix_at_start): Declare.
160 * write.c (fix_new_internal): Add at_beginning parameter.
161 Use it instead of REVERSE_SORT_RELOCS. Fix the handling of
162 seg_fix_tailP for the at_beginning/REVERSE_SORT_RELOCS case.
163 (fix_new, fix_new_exp): Update accordingly.
164 (fix_at_start): New function.
165 * config/tc-ppc.c (md_pseudo_table): Add .ref to the OBJ_XCOFF section.
166 (ppc_ref): New function, for OBJ_XCOFF.
167 (md_apply_fix): Handle BFD_RELOC_NONE for OBJ_XCOFF.
168 * config/te-i386aix.h (REVERSE_SORT_RELOCS): Remove #undef.
172 * config/te-solaris.h (DWARF2_EH_FRAME_READ_ONLY): Make read-only
173 on 64-bit Solaris/x86.
174 Include obj-format.h earlier.
178 * config/tc-s390.c (s390_elf_final_processing): New function.
179 * config/tc-s390.h (elf_tc_final_processing): New macro definition.
180 (s390_elf_final_processing): Added prototype.
186 * config/tc-arm.c (do_neon_cvt): Rename to do_neon_cvt_1. Add
187 code to handle round-to-zero for VCVT conversions.
188 (do_neon_cvt): New. Call do_neon_cvt_1.
189 (do_neon_cvtr): New. Call do_neon_cvt_1.
190 (insns): Use do_neon_cvt for VCVT insn and do_neon_cvtr for VCVTR
195 * config/tc-ia64.c (ia64_vms_note): Generate 24 bytes note headers.
199 * config/tc-i386.c (md_assemble): Before accessing the IMM field
200 check that it's not an XOP insn.
204 * config/bfin-aux.h: Remove argument names in function
206 * config/bfin-lex.l (parse_int): Fix shadowed variable name
208 * config/bfin-parse.y (value_match): Remove argument names
210 (notethat): Likewise.
215 * config/tc-arm.c (do_t_nop): Correct check for Thumb-2 NOP.
219 * config/tc-h8300.c (h8300_elf_section): New function - issue a
220 warning message if a new section is created without setting any
222 (md_pseudo_table): Intercept section creation pseudos.
223 (md_pcrel_from): Replace abort with an error message.
224 * config/obj-elf.c (obj_elf_section_name): Export this function.
225 * config/obj-elf.h (obj_elf_section_name): Prototype.
230 * listing.c (print_source): Add one to line number.
234 * Makefile.in: Regenerate.
235 * configure: Regenerate.
236 * doc/Makefile.in: Regenerate.
240 * version.c (parse_args): Change to "Copyright 2010".
244 * config/tc-i386.c (cpu_arch): Add amdfam15.
245 (i386_align_code): Add PROCESSOR_AMDFAM15 cases.
246 * config/tc-i386.h (processor_type): Add PROCESSOR_AMDFAM15.
247 * doc/c-i386.texi: Add amdfam15.
251 * config/tc-arm.c (do_neon_logic): Accept imm value
252 in the third operand too.
253 (operand_parse_code): OP_RNDQ_IMVNb renamed to
255 (parse_operands): OP_NILO case removed, applied renaming.
256 (insns): Neon shape changed for some logic instructions.
260 * config/tc-arm.c (do_neon_ldx_stx): Added
261 validation for vector load/store insns.
265 * config/tc-ppc.c (md_show_usage): Document -me500mc64.
269 * config/tc-arm.c (struct arm_it): New flag 'is_neon'.
270 (NEON_ENC_*): Macros renamed to _NEON_ENC_*.
271 (NEON_ENCODE): New macro.
272 (check_neon_suffixes): New macro.
273 (do_vfp_cond_or_thumb): Set the 'is_neon' flag.
274 (do_vfp_nsyn_opcode): Likewise.
275 (do_vfp_nsyn_nmul): Use the new 'NEON_ENCODE' macro.
276 (do_vfp_nsyn_cmp): Likewise.
277 (do_neon_shl_imm): Likewise.
278 (do_neon_qshl_imm): Likewise.
279 (neon_dyadic_misc): Likewise.
280 (do_neon_mac_maybe_scalar): Likewise.
281 (do_neon_qdmulh): Likewise.
282 (do_neon_qmovn): Likewise.
283 (do_neon_qmovun): Likewise.
284 (do_neon_movn): Likewise.
285 (neon_mac_reg_scalar_long): Likewise.
286 (do_neon_vmull): Likewise.
287 (do_neon_trn): Likewise.
288 (do_neon_ldx_stx): Likewise.
289 (neon_dp_fixup): Changed signature and set the flag.
290 (neon_three_same): Call the above with new signature.
291 (neon_two_same): Likewise.
292 (neon_imm_shift): Likewise.
293 (neon_mul_mac): Likewise.
294 (do_neon_abs_neg): Likewise.
295 (neon_mixed_length): Likewise.
296 (do_neon_ext): Likewise.
297 (do_neon_mov): Likewise.
298 (do_neon_tbl_tbx): Likewise.
299 (do_neon_logic): Likewise, and use the new 'NEON_ENCODE' macro.
300 (neon_compare): Likewise.
301 (do_neon_shll): Likewise.
302 (do_neon_cvt): Likewise.
303 (do_neon_mvn): Likewise.
304 (do_neon_dup): Likewise.
305 (md_assemble): Call check_neon_suffixes ().
307 For older changes see ChangeLog-2009
313 version-control: never