3 * po/Make-in (install-info): New target.
7 * configure.in (WIN32LIBADD): Add -lintl on cygwin32.
12 * mips-opc.c (teq,tge,tgeu,tlt,tltu,tne): Added three-operand
13 variety of ISA2 instructions to set bottom ten bits of trap code.
17 * Makefile.am (config.status): Add explicit target so that
18 config.status depends upon bfd/configure.in.
19 * Makefile.in: Rebuild.
23 * mips-opc.c (break, sdbbp): Added two-operand variety of ISA1
24 instructions to set bottom ten bits of break code.
25 * mips-dis.c (print_insn_arg): Implement 'q' operand format used
26 for above optional argument.
31 * cgen.sh: s/@ARCH@/${ARCH}/ in opc.h generation.
32 * m32r-opc.h: Regenerate.
37 * makefile.vms: Run dec c with /nodebug.
41 * Makefile.in: Rebuilt.
42 * Makefile.am: Regenerated dependencies with mkdep.
44 * opintl.h (_): Define as dgettext.
49 * configure.in: Add support for --enable-cgen-maint.
50 * Makefile.am (M32R_DEPS): New variable.
51 (m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c): Update dependencies.
52 * aclocal.m4: Regenerate.
53 * Makefile.in: Regenerate.
54 * configure: Regenerate.
56 * Makefile.am (CGENFILES): Add minsn.scm.
61 * cgen-asm.c: Internationalised.
63 * cgen-asm.in: Internationalised.
64 * cgen-opc.in: Internationalised.
66 * m32r-asm.c: Internationalised.
67 * m32r-dis.c: Internationalised.
68 * m32r-opc.c: Internationalised.
70 * aclocal.m4: Regenerated.
71 * configure: Regenerated.
72 * Makefile.am (POTFILES): Remove inclusion of BFD_H.
73 * Makefile.in: Rebuild.
74 * po/POTFILES.in: Rebuilt using rule in Makefile.in.
75 * po/opcodes.pot: Rebuilt after changing POTFILES.in.
79 * configure.in: Call AC_ISC_POSIX near start. Move CY_GNU_GETTEXT
81 * aclocal.m4, configure: Rebuild with current tools.
85 * opintl.h: New file - contains internationalisation macros used
86 by source files in this directory.
87 * po/: New subdirectory - contains internationalisation files.
88 * po/Make-in: New file - Makefile constructor.
89 * po/POTFILES.in: New file - list of files in opcodes directory
90 that should be scan for internationalisation macros.
91 * po/opcodes.pot: New file - list of internationisation strings
92 found in files mentioned in po/POTFILES.in.
93 * Makefile.am: Add rule to build po/POTFILES.in. Add SUBDIRS
94 entry. Add intl directory to include paths.
95 * acconfig.h: Add ENABLE_NLS, HAVE_CATGETS, HAVE_GETEXT,
96 HAVE_STRCPY, HAVE_LC_MESSAGES
97 * configure.in: Add rule to build Makefile in po subdirectory.
98 * Makefile.in: Rebuilt.
99 * aclocal.m4: Rebuilt.
100 * config.in: Rebuilt.
101 * configure: Rebuilt.
102 * alpha-opc.c: Internationalised.
103 * arc-dis.c: Internationalised.
104 * arc-opc.c: Internationalised.
105 * arm-dis.c: Internationalised.
106 * cgen-asm.c: Internationalised.
108 * d30v-dis.c: Internationalised.
110 * dis-buf.c: Internationalised.
112 * dvp-dis.c: Internationalised.
113 * dvp-opc.c: Internationalised.
114 * dvp-opc.c: Internationalised.
116 * h8300-dis.c: Internationalised.
117 * h8500-dis.c: Internationalised.
118 * i386-dis.c: Internationalised.
119 * m10200-dis.c: Internationalised.
120 * m10300-dis.c: Internationalised.
121 * m68k-dis.c: Internationalised.
122 * m88k-dis.c: Internationalised.
123 * mips-dis.c: Internationalised.
124 * ns32k-dis.c: Internationalised.
125 * opintl.h: Internationalised.
126 * ppc-opc.c: Internationalised.
127 * sparc-dis.c: Internationalised.
128 * v850-dis.c: Internationalised.
129 * v850-opc.c: Internationalised.
133 * cgen-asm.c (cgen_current_opcode_table): Renamed from ..._data.
134 (asm_hash_table_entries): New variable.
135 (cgen_asm_init): Free asm_hash_table_entries.
136 (hash_insn_array,hash_insn_list): New functions.
137 (build_asm_hash_table): Use them. Hash macro insns as well.
138 (cgen_asm_lookup_insn): Update.
139 * cgen_dis.c (cgen_current_opcode_table): Renamed from ..._data.
140 (dis_hash_table_entries): New variable.
141 (cgen_dis_init): Free dis_hash_table_entries.
142 (hash_insn_array,hash_insn_list): New functions.
143 (build_dis_hash_table): Use them. Hash macro insns as well.
144 (cgen_dis_lookup_insn): Update.
145 * cgen-opc.c (cgen_current_opcode_table): Renamed from ..._data.
146 (cgen_set_cpu,cgen_hw_lookup,cgen_insn_count): Update.
147 (cgen_macro_insn_count): New function.
148 * cgen-opc.in (@arch@_cgen_lookup_insn): New arg alias_p.
149 All callers updated. Sanity check result of extract fn.
150 (@arch@_cgen_get_insn_operands): Change result type to void.
151 Delete args insn_value, length. New arg fields. All callers updated.
152 (@arch@_cgen_lookup_get_insn_operands): New function.
153 * m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate.
157 * i386-dis.c (OP_DSSI): Print segment override.
162 * mips-opc.c (msub.s): Correct mask pattern for disassembly.
168 * mips-opc.c (madd.s): Correct mask pattern for disassembly.
174 * vu0.h (vlqd, vlqi): Update per revised specs.
180 * dvp-opc.c (parse_vif_unpackloc,insert_vif_unpackloc): Delete.
181 (vif_operands): Update.
182 (vif_get_unpackloc): Delete.
183 (state_vif_unpackloc{,_star_p}): Delete.
184 (dvp_opcode_init_parse): Update.
185 (vif_unpack_len_value): Avoid divide by zero.
191 * vu0.h: Specs changed for VCALLMSR bit pattern.
192 * mips-dis.c: (print_insn_arg) Matching change.
197 * arm-dis.c (print_insn_arm): Add "_all" extension to 'C'
202 * Makefile.am (libopcodes_la_LIBADD): Add @WIN32LIBADD@.
203 (libopcodes_la_LDFLAGS): Add @WIN32LDFLAGS@.
204 * configure.in: Define and substitute WIN32LDFLAGS and
206 * aclocal.m4: Rebuild with new libtool.
207 * configure, Makefile.in: Rebuild.
212 * vu0.h: Corrected bit pattern for VMAXI opcode.
217 * m32r-opc.c: Regenerate.
222 * dvp-opc.c (vif_macros): Tweak unpackloc operand.
223 (dvp_expand_macro): Implement.
224 (insert_vif_datalen): Record value with max+1 -> 0 conversion.
225 (vif_unpack_len): Perform 0 -> max+1 conversion on `wl' value.
230 * Makefile.am (stamp-lib): Check that .libs/libopcodes.a exists
231 before trying to copy it.
232 * Makefile.in: Rebuild.
236 * m32r-opc.c: Use signed immediate values for CMPUI instruction.
241 * m32r-opc.c: Fix bit patterns for SAT and SATB.
246 * ns32k-dis.c (bit_extract_simple): New function to extract bits
247 from an arbitrary valid buffer instead of fetching them on demand
249 (invalid_float): use bit_extract_simple() instead of bit_extract().
254 * m32r-opc.c: Fix SATB bit pattern. Add extra control registers.
255 * m32r-opc.h: Add extra control registers.
261 * i386-dis.c (dis386): Change 0x8c and 0x8e to movS, and change Ew
266 * Branched binutils 2.9.
271 * d30v-dis.c (print_insn_d30v): Don't use uninitialized "num" when
272 disassembling last 4 bytes of a section.
277 Fix some gcc -Wall warnings:
278 * arc-dis.c (print_insn): Add casts to avoid warnings.
279 * cgen-opc.c (cgen_keyword_lookup_name): Likewise.
280 * d10v-dis.c (dis_long, dis_2_short): Likewise.
282 * dvp-opc.c (issymchar, SKIP_BLANKS): Likewise.
283 (parse_dotdest, parse_dotdest1, u_parse_sdest): Likewise.
284 (parse_bc, parse_vfreg, parse_accdest): Likewise.
285 (parse_ffstreg, parse_vif_mode): Likewise.
287 * m10200-dis.c (disassemble): Likewise.
288 * m10300-dis.c (disassemble): Likewise.
289 * ns32k-dis.c (print_insn_ns32k): Likewise.
290 * ppc-opc.c (insert_ral, insert_ram): Likewise.
291 * cgen-dis.c (build_dis_hash_table): Remove used local variables.
292 * cgen-opc.c (cgen_keyword_search_next): Likewise.
293 * d10v-dis.c (dis_long, dis_2_short): Likewise.
295 * d30v-dis.c (print_insn_d30v, lookup_opcode): Likewise.
298 * dvp-dis.c (print_dma, print_vif, print_gif): Likewise.
299 * dvp-opc.c (parse_dest1, print_uflags): Likewise.
300 (parse_gif_nloop, dvp_opcode_init_tables): Likewise.
302 * ns32k-dis.c (bit_extract, print_insn_ns32k): Likewise.
304 * tic80-dis.c (print_one_instruction): Likewise.
306 * w65-dis.c (print_operand): Likewise.
307 * z8k-dis.c (fetch_data): Likewise.
308 * a29k-dis.c: Add return type for find_byte_func_type.
309 * arc-opc.c: Include <stdio.h>. Remove declarations of
310 insert_multshift and extract_multshift.
312 * d30v-dis.c (lookup_opcode): Parenthesize assignments in
314 (extract_value): Fully parenthesize expression.
317 * dvp-opc.c: Include <ctype.h>.
318 (print_sdest): Add default case to switch.
320 * h8500-dis.c (print_insn_h8500): Initialize local variables.
321 * h8500-opc.h (h8500_table): Fully bracket initializer.
322 * w65-opc.h (optable): Likewise.
323 * i386-dis.c (print_insn_x86): Declare aflag and flag parameters.
324 * i386-dis.c (OP_E): Initialize local variables.
325 * m10200-dis.c (print_insn_mn10200): Likewise.
326 * mips-dis.c (print_insn_mips16): Likewise.
327 * sh-dis.c (print_insn_shx): Likewise.
328 * v850-dis.c (print_insn_v850): Likewise.
329 * ns32k-dis.c (print_insn_arg): Declare.
330 (get_displacement, invalid_float): Declare.
331 (list_search, sign_extend, flip_bytes): Declare return type.
332 (get_displacement): Likewise.
333 (print_insn_arg): Likewise. Make d int. Fix sprintf format
335 (print_insn_ns32k): Make i unsigned.
336 (invalid_float): Make static. Declare type of val.
337 * tic30-dis.c (print_par_insn): Make i size_t. Don't check strlen
338 on each for iteration.
339 * tic30-dis.c (get_indirect_operand): Likewise.
340 * z8k-dis.c (print_insn_z8001): Declare return type.
341 (print_insn_z8002): Likewise.
342 (unparse_instr): Fix sprintf format strings.
346 * mips-opc.c: Add "sync.l" and "sync.p".
351 * dvp-opc.c (extract_vif_datalen): Rewrite.
352 (vif_insn_len): Perform 0->max+1 conversion for direct length.
356 * dvp-dis.c (print_insn): Print unpack address in hex.
357 * dvp-opc.c (parse_vif_mpgloc): Renamed from parse_vif_mpgloc_star.
358 Don't skip over '*', just record it.
359 (insert_vif_mpgloc): Don't update state_vif_mpgloc if '*' value.
360 (parse_vif_unpackloc): Renamed from parse_vif_unpackloc_star.
361 Don't skip over '*', just record it.
362 (insert_vif_unpackloc): Don't update state_vif_unpackloc if '*' value.
363 (vif_operands): Delete VIF_MPGLOC_STAR,VIF_UNPACKLOC_STAR entries.
364 (vif_opcodes): Likewise.
365 (state_vif_{mpg,unpack}loc_star_p): New static locals.
366 (vif_macros,vif_macro_count): New globals.
367 (vif_unpack_len_value): New arguments wl,cl. All callers updated.
368 (vif_set_{mpg,unpack}loc): Delete. All callers updated.
369 (vif_get_wl_cl): New function.
370 (dvp_opcode_init_parse): Init mpgloc,unpackloc state.
375 * m68k-dis.c (print_insn_m68k): Use info->mach to select the
376 default m68k variant to recognize.
378 * i960-dis.c (pinsn): Change type of first argument to bfd_vma.
379 (ctrl, cobr, mem, ea): Likewise.
380 (print_addr): Likewise. Remove cast.
381 (ea): Cast argument of print_addr to bfd_vma.
383 * cgen-asm.c (cgen_parse_signed_integer): Fix type of local
385 (cgen_parse_unsigned_integer): Likewise.
386 (cgen_parse_address): Likewise.
390 * i960-dis.c (ctrl): Add full braces to structure initialization.
391 (cobr, mem, reg): Likewise.
392 (ea): Correct parenthesization in expression.
394 * cgen-asm.c: Include <ctype.h>.
395 (build_asm_hash_table): Remove unused local variable i.
396 (cgen_parse_keyword): Add casts to avoid warnings.
398 * arm-dis.c (print_insn_big_arm): Only call coffsymbol for a COFF
399 symbol. Fix indentation.
400 (print_insn_little_arm): Likewise.
405 * vu0.h (cfc2, ctc2): Add variants with ".i" and ".ni"
412 * m32r-opc.c (m32r_cgen_insn_table_entries): Fix SATH bit pattern
419 * dvp-opc.c (vif_operand_datalen_special): New global.
425 * vu0.h (vcallms): Use 'O' for call target operand.
426 * mips-dis.c (print_insn_arg): Handle 'O'.
431 * configure.in: Use AM_DISABLE_SHARED.
432 * aclocal.m4, configure: Rebuild with libtool 1.2.
437 * mips-dis.c: Change '%' to '#' to avoid conflict with vr5400
444 These patches are courtesy of Jonathan Walton and Tony Thompson
447 * arm-dis.c (print_insn_thumb): Ignore bottom two bits of PC
450 * arm-opc.h (thumb_opcodes): Annotate PC relative addresses with
451 both the offset and the label closest to the destination.
456 * vu0.h: New file with cop2/vu0 instructions.
457 * mips-opc.c: Include vu0.h.
458 * mips-dis.c (print_insn_arg): Handle new args 0-9, +, -, %, K, &,
460 (print_insn_mips): Do not emit a tab after an instruction if the
461 first arg is an instruction completer (&). If the next arg is an
462 escape character (%), then print the next arg verbatim.
463 * Makefile.am (mips-opc.lo): Depend on vu0.h
469 * dvp-opc.c (vif_opcodes): Add stcycl.
473 * dvp-dis.c (print_dma): Change length from 16 to 8.
478 * m32r-opc.h: Regenerate.
483 * dvp-opc.c (print_dest1): Print dest spec again.
484 (print_vfreg,print_accdest): Likewise.
485 (vif_unpack_len): Round result up to word boundary.
488 start-sanitize-vr4320
491 * mips-opc.c ("clz","dclz"): Added the 4320 versions.
495 * mips-opc.c ("macc*","mul*"): Added the 4320 versions
502 * dvp-dis.c (print_gif): Fix length calcs for gifimage.
503 (print_insn): Do mask comparison on proper opcode word.
504 Print unsigned values in hex.
505 * dvp-opc.c (u_parse_sdest): Return -1 if dest missing.
506 (parse_bc): Catch missing dest.
507 (parse_vfreg): Replace atoi call with strtol.
508 (parse_{bcftreg,ffstreg,freg,ireg,vi01,gif_prim,gif_nloop}): Likewise.
509 (parse_bcftreg,parse_ffstreg): Handle missing dest.
510 (extract_gif_eop): New function.
511 (gif_operands): Update eop entry.
512 (VGIFOP,VGIFNREGS): Fix calcs.
513 (extract_gif_prim): Set *pinvalid to 1 if prim not used.
514 (gif_regs): Add entry for unused 11 case.
515 (print_gif_regs): Print empty list instead of nothing.
516 (extract_gif_nloop): Fix value calc.
517 (print_gif_nloop): Always print value, even if 0.
518 (insert_vif_wlcl,extract_vif_wlcl): New functions.
519 (vif_operands): Use them for wl,cl fields.
520 (state_vif_wl,state_vif_cl): New static locals.
521 (parse_vif_mode): Handle numeric args.
522 (vif_unpack_len_value,vif_unpack_len): New functions.
523 (vif_insn_len): Call vif_unpack_len.
528 * m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate.
532 * cgen-asm.in: Move insertion of generated routines to top of file.
533 (insert_normal): Add prototype. Delete `shift' arg.
534 * cgen-dis.in: Move insertion of generated routines to top of file.
535 (extract_normal): Add prototype. Delete `shift' arg.
536 (print_normal): Add prototype. Call CGEN_PRINT_NORMAL if defined.
537 (print_keyword): Add prototype. Fix type of `attrs' arg.
539 start-sanitize-vr4320
542 * mips-dis.c (_print_insn_mips) : Handle bfd_mach_mips4320.
543 * mips-opc.c ("mac","dmac") : Added 4320 insns.
548 * arm-dis.c (print_insn_big_arm, print_insn_little_arm): Do not
549 assume that info->symbols is non-empty.
553 * alpha-opc.c (cvtqs) There is no such thing.
554 (cvttq): Missing most of the /*d variants.
559 * mips-opc.c (r5900/madd.s): Takes three operands, not four. Fix
561 (r5900/min.s): Incorrect opcode ....,101001 not ...110000.
562 (r5900/msub.s): Takes three operands, not four. Fix opcode.
568 * d30v-opc.c (d30v_opcode_table): Indicate which instructions are
569 delayed branches or jumps.
575 * dvp-opc.c (vif_operands): Add unpack[u] support.
576 (vif_opcodes): Ditto.
577 (*_vif_imrubits): Renamed from *_vif_imrbits.
581 * dvp-dis.c (print_insn): Handle word number.
582 Handle mips address vs vu address.
583 * dvp-opc.c (vif_operands): Use DVP_OPERAND_VU_ADDRESS.
584 (dma_operands): Use DVP_OPERAND_MIPS_ADDRESS.
585 ({insert,extract}_dma_addr): Fix word ofset.
586 ({insert,print}_gif_regs): Fix encode/decode.
591 * arm-dis.c (print_insn_{big,little}_arm): info->symbol changed
593 * mips-dis.c (print_insn_{big,little}_mips): Likewise.
594 * tic30-dis.c (print_branch): Likewise.
596 * mips-dis.c (print_insn_little_mips): Call dvp_info_mach_type.
597 * dvp-dis.c (dvp_info_mach_type): New function.
598 (print_insn_dvp): Call it.
599 (print_vif): Return length of 4 if mpg or direct insn so following
600 insns get properly disabled.
601 (print_gif): Fix word order.
602 * dvp-opc.c (vif_insn_len): New argument `pcpu'. All callers updated.
603 (gif_operands): Fix word order.
604 (gif_opcodes): Likewise.
605 ({insert,extract,print}_gif_regs): Likewise.
606 (gif_regs): Add new register number/name changes.
607 (dma_opcodes): Add dmarefe insn.
612 * arm-dis.c (print_insn_big_arm, print_insn_little_arm): Remove
613 saved_symbol code as it is no longer needed.
617 * cgen-asm.c: Include symcat.h.
618 * cgen-dis.c,cgen-opc.c,cgen-asm.in,cgen-dis.in: Ditto.
620 * m32r-asm.c,m32r-dis.c,m32r-opc.h,m32r-opc.c: Regenerate.
625 * dvp-opc.c (extra_dma_flags): Fix typos.
626 (dma_operands): Fix word numbers.
627 (dma_opcodes): Likewise.
628 ({insert,extract}_dma_flags): Likewise.
633 * mips-dis.c (print_insn_arg): Do not prefix 'P' arguments with '$'.
638 * dvp-dis.c (print_gif): Complete.
639 * dvp-opc.c (gif_operands,gif_opcodes): Complete.
640 (state_gif_{nregs,regs,nloop}): New static locals.
642 (dvp_opcode_init_{parse,print}): Init gif state locals.
643 (extract_vif_datalen,{insert,extract}_vif_imrbits): New functions.
644 (vif_insn_len): Handle `unpack'.
645 ({insert,extract}_dma_flags): Complete.
651 * mips-opc.c (mula.s): Renamed from multa.s.
656 * m32r-opc.[ch]: Regenerate.
661 * dvp-opc.c (dma_operands): Rewrite.
662 (dma_operand_{count,addr}): New globals.
663 (dma_opcodes): Rewrite. Add "dmaend" with no operands.
664 (insert_dma_addr): Insert value into insn.
665 (extract_dma_addr): Extract value from insn.
669 * dvp-dis.c (print_vu): Handle loi insns.
670 (print_insn): Likewise.
671 * dvp-opc.c (vu_lower_opcodes): Add "loi".
672 (vu_operands): Make LDEST1 a FAKE operand.
673 (parse_dest1): Allow elided argument.
674 (print_dest1): Don't print the argument.
678 * dvp-opc.c (parse_vfreg): Dest spec is optional.
679 (print_vfreg): Don't print dest spec.
680 (parse_accdest): Dest spec is optional.
681 (print_accdest): Don't print dest spec.
686 * Makefile.am (CGENFILES): Update.
687 * Makefile.in: Regenerate.
688 * cgen-asm.in (insert_normal): Result is error message now.
689 Validate value to be inserted.
690 (insert_insn_normal): Result is error message now.
691 (@arch@_cgen_assemble_insn): Update.
692 * cgen-asm.c (cgen_parse_{signed,unsigned}_integer): Delete min,max
693 arguments. Don't perform validation here.
694 * m32r-asm.c,m32r-dis.c,m32r-opc.c: Regenerate.
698 * cgen-opc.in (@arch@_cgen_get_insn_operands): Handle empty
699 operand instance list.
700 * m32r-opc.c: Regenerate.
704 * Makefile.am (AUTOMAKE_OPTIONS): Define.
705 * configure, Makefile.in, aclocal.m4: Rebuild with automake 1.2e.
709 * m10300-dis.c (print_insn_mn10300): Recognize break instruction.
713 * configure.in: Get the version number from BFD.
714 * configure: Rebuild.
717 * Makefile.am (libopcodes_la_LDFLAGS): Define.
718 * Makefile.in: Rebuild.
722 * m32r-opc.c: Regenerate.
723 * m32r-opc.h: Regenerate.
727 * cgen-opc.in (@arch@_cgen_lookup_insn): New argument alias_p.
728 Ignore ALIAS insns if asked to.
729 (@arch@_cgen_get_insn_operands): Pass 0 for alias_p, NULL for insn.
730 * m32r-opc.c: Regenerate.
733 * dvp.opc.c: Nicely format opcode tables.
734 (vu_operands): New element UFLAGS.
735 (parse_uflags,print_uflags): New functions.
736 (vu_upper_opcodes): Add UFLAGS to all insns.
741 Fix rac to accept only a0:
742 * d10v-opc.c (d10v_predefined_registers, d10v_operands, d10v_opcodes):
743 Split OPERAND_ACC into OPERAND_ACC0 and OPERAND_ACC1.
744 Introduce OPERAND_GPR.
745 * d10v-dis.c (print_operand): Likewise.
749 * cgen-opc.in: New file.
751 * Makefile.am (CGENFILES): Add cgen-opc.in.
752 * Makefile.in: Regenerate.
754 * cgen-opc.c (cgen_set_cpu): Delete init of hw list `next' chain.
755 (cgen_hw_lookup): Make result const.
757 * cgen-dis.in (*): Use PTR instead of void *.
758 (print_insn): Delete unused vars `i', `syntax'.
760 * m32r-opc.h, m32r-opc.c, m32r-asm.c, m32r-dis.c: Regenerate.
765 * dvp-opc.c (*): pke,gpuif renamed to vif,gif.
766 (vif_opcodes): Update renamed insns.
767 * dvp-dis.c (*): Likewise.
772 * configure, aclocal.m4: Rebuild with new libtool.
777 * d30v-opc.c (repeat{,i} instructions): Repeat/repeati
778 instructions use a PC relative branch, not absolute.
783 * configure.in: Set libtool_enable_shared rather than
784 libtool_shared. Remove diversion hack.
785 * configure, Makefile.in, aclocal.m4: Rebuild with new libtool.
789 * cgen-opc.c (cgen_set_cpu): Initialize hardware table.
790 * m32r-opc.h, m32r-opc.c, m32r-asm.c, m32r-dis.c: Regenerate.
794 * tic30-dis.c: New file.
795 * disassemble.c (disassembler): Add bfd_arch_tic30 case.
796 * configure.in: Handle bfd_tic30_arch.
797 * Makefile.am: Rebuild dependencies.
798 (CFILES): Add tic30-dis.c
799 (ALL_MACHINES): Add tic30-dis.lo.
800 * configure, Makefile.in: Rebuild.
805 * m32r-opc.c, m32r-opc.h, m32r-asm.c m32r-dis.c: Newly generated
806 versions after updates to m32r.cpu to remove mulwhi-a, mulwlo-a,
807 macwhi-a and macwlo-a instructions.
813 * dvp-opc.c, fixed encoding of a bunch of instructions to
814 be consistent with the asmvu assembler (and inconsistent
815 with the specification).
819 * dvp-opc.c, fixed order of pkemscal/pkemscalf instructions
820 in the opcode table. The pkemscalf instruction must come first.
824 * dvp-opc.c, MAXIi should be VUOP6(0x1d) instead of 0x2d.
829 * m32r-opc.h (HAVE_CPU_M32R): Define.
834 * dvp-dis.c, dvp-opc.c: New files.
835 * configure.in: Compile them if bfd_dvp_arch, as well as mips.
836 * configure: Regenerate.
837 * Makefile.am (ALL_MACHINES): Add dvp-{dis,opc}.lo.
838 (dvp-dis.lo,dvp-opc.lo): Add rules for.
839 (mips-dis.lo): Compile with @archdefs@.
840 * Makefile.in: Regenerate.
841 * disassemble.c: Define ARCH_mips ifdef ARCH_dvp.
842 * mips-dis.c (print_insn_little_mips): Check for DVP insns.
847 * v850-opc.c (insertion routines): If both alignment and size is
848 wrong then report this.
852 * mips-dis.c (_print_insn_mips): Set target_processor as appropriate.
853 Only recognize instructions for the current target_processor.
857 * d10v-dis.c (PC_MASK): Correct value.
858 (print_operand): If there's a reloc, don't calculate the
859 address because they could be in different sections.
861 start-sanitize-cygnus
864 * cgen.sh: Rewrite to be like simulator's version.
865 * Makefile.am (cgen): Update call to cgen.sh.
866 * Makefile.in: Regenerate
871 * mips-opc.c (mips_builtin_opcodes): Move 4010's "addciu"
872 instruction after the 4650's "mul" instruction; nobody's using the
873 4010 these days. If object files someday indicate which processor
874 variant they're intended for, we can do a better job at this.
879 * mips-opc.c (c.lt.s): Add r5900 variant.
885 * cgen-asm.c (build_asm_hash_table): Traverse compiled in table using
886 table provided entry size. Use CGEN_INSN_MNEMONIC.
887 (cgen_parse_keyword): Rewrite.
888 * cgen-dis.c (build_dis_hash_table): Traverse compiled in table using
889 table provided entry size. Use CGEN_INSN_MASK_BITSIZE.
890 * cgen-opc.c: Clean up pass over `struct foo' usage.
891 (cgen_keyword_lookup_value): Handle "" entry.
892 (cgen_keyword_add): Likewise.
893 start-sanitize-cygnus
894 * Makefile.am: Add cgen support.
895 * Makefile.in: Regenerate.
896 * configure.in: Add cgen support.
897 * configure: Regenerate.
898 * aclocal.m4: Regenerate.
899 * cgen.sh, cgen-asm.in, cgen-dis.in: New files.
904 * mips-opc.c: Add FP_D to s.d instruction flags.
908 * m68k-opc.c (halt, pulse): Enable them on the 68060.
913 * tic80-opc.c (tic80_opcodes): Revert change that put the 32 bit
914 PC relative offset forms before the 15 bit forms. An assembler command
915 line option now chooses the default.
921 * mips-opc.c: Add many missing r5900 instructions.
927 * d30v-opc.c (d30v_opcode_table): Set new flags bits
928 FLAG_{2WORD,MUL{16,32},ADDSUBppp}, in appropriate instructions.
933 * configure: Only build libopcodes shared if --enable-shared's value
934 was `yes', or was set to `*opcodes*'.
935 * aclocal.m4: Likewise.
936 * NOTE: this really needs to be fixed in libtool/libtool.m4, the
937 original source of this bit of code. It's not clear what the best fix
943 * mips-opc.c (mtpc, mfpc, mtps, mfps): Add r5900 variants.
948 * tic80-opc.c (OFF_SL_PC, OFF_SL_BR): Minor formatting change.
949 (tic80_opcodes): Reorder table entries to put the 32 bit PC relative
950 offset forms before the 15 bit forms, to default to the long forms.
955 * alpha-opc.c (cvttq/*u*): Remove, as that suffix is invalid.
959 * arm-dis.c (print_insn_little_arm): Prevent examination of stored
960 symbol if none is present.
961 (print_insn_big_arm): Prevent examination of stored symbol if
966 * d10v-opc.c (d10v_opcodes): Correct entry for RTE.
970 * disassemble.c: Remove disasm_symaddr() function.
972 * arm-dis.c: Use info->symbol instead of info->flags to determine
973 if disassmbly should be in Thumb or Arm mode.
977 * arm-dis.c: Add support for disassembling Thumb opcodes.
978 (print_insn_thumb): New function.
980 * disassemble.c (disasm_symaddr): New function.
982 * arm-opc.h: Display nop pseudo ops alongside equivalent disassembly.
983 (thumb_opcodes): Table of Thumb opcodes.
987 * m68k-opc.c (btst): Change Dd@s to Dd;b.
989 * m68k-dis.c (print_insn_arg): Recognize 'm', 'n', 'o', 'p', 'q',
990 and 'v' as operand types.
994 * m68k-opc.c: Add argument for lpstop. From Olivier Carmona
996 * m68k-dis.c (print_insn_m68k): Handle special case of lpstop,
997 which has a two word opcode with a one word argument.
1002 * d30v-opc.c (d30v_opcode_table, case cmpu): Immediate field is
1003 unsigned, not signed.
1004 (d30v_format_table): Add SHORT_CMPU cases for cmpu.
1009 * sh-dis.c (print_insn_shx): Recognize all sh4 additions.
1010 * sh-opc.h (fmov): Add @<REG_M>+,<DX_REG_N> variant for sh4.
1011 (ftrv): Slay the cut-and-paste monster.
1015 * d10v-dis.c (print_operand):
1016 Split OPERAND_FLAG into OPERAND_FFLAG and OPERAND_CFLAG.
1020 * d10v-opc.c (OPERAND_FLAG): Split into:
1021 (OPERAND_FFLAG, OPERAND_CFLAG) .
1027 * mips-opc.c: Move the INSN_MACRO ISA value to the membership
1028 field for all INSN_MACRO's.
1029 * mips16-opc.c: same
1033 * mips-opc.c (sync,cache): These are 3900 insns.
1037 sh-opc.h (sh_table): Remove ftst/nan.
1039 start-sanitize-vr5400
1042 * mips-opc.c (dror32, dror, rzu.ob): Fix bugs in encoding.
1043 (c.*.ob, mula.ob, mull.ob, muls.ob, mulsl.ob): Put 'k' version
1045 * mips-dis.c (print_insn_arg): Handle VR5400 operand types.
1051 * mips-opc.c (deret,dmult,dmultu,madd,maddu,pref,sdbbp):
1052 Add tx49 insns and configury.
1057 * mips-opc.c (ffc, ffs): Fix mask.
1062 * d30v-opc.c (pre_defined_registers): Add eit_vb, int_s, and int_m
1068 * mips-opc.c: Fix bug in mask for "not" pseudo-instruction.
1069 start-sanitize-vr5400
1070 Added VR5400 instructions.
1071 (N5): New cpu-id macro.
1073 (WR_HILO, RD_HILO, MOD_HILO): New macros.
1077 * mips-opc.c: Fix bug in mask for "not" pseudo-instruction.
1078 (WR_HILO, RD_HILO, MOD_HILO): New macros.
1082 * v850-dis.c (disassemble): Replace // with /* ... */
1086 * sparc-opc.c: Add wr & rd for v9a asr's.
1087 * sparc-dis.c (print_insn_sparc): Recognize '_' and '/' for v9a asr's.
1088 (v9a_asr_reg_names): New variable.
1093 * sparc-opc.c (v9notv9a): New insn type.
1094 (IMPDEP): Move to the end to not conflict with edge8 et al.
1099 * mips-opc.c (bnezl,beqzl): Mark these as also tx39.
1103 * mips-opc.c: Note that 'jalx' is (probably incorrectly) marked I1.
1107 * v850-dis.c (disassemble): Use new symbol_at_address_func() field
1108 of disassemble_info structure to determine if an overlay address
1109 has a matching symbol in low memory.
1111 * dis-buf.c (generic_symbol_at_address): New (dummy) function for
1112 new symbol_at_address_func field in disassemble_info structure.
1116 * v850-opc.c (extract_d22): Use signed arithmatic.
1120 * mips-opc.c: Three op mult is not an ISA insn.
1124 * mips-opc.c: Fix formatting.
1128 * i386-dis.c (OP_E): Explicitly sign extend 8 bit values, rather
1129 than assuming that char is signed. Explicitly sign extend 16 bit
1130 values, rather than assuming that short is 16 bits.
1131 (OP_sI, OP_J, OP_DIR): Likewise.
1133 start-sanitize-v850e
1136 * v850-dis.c (v850_sreg_names): Use symbolic names for higher
1142 * v850-opc.c: Fix typo in comment.
1144 * v850-dis.c (disassemble): Add test of processor type when
1145 determining opcodes.
1149 * configure.in: Use a diversion to set enable_shared before the
1150 arguments are parsed.
1151 * configure: Rebuild.
1155 * m68k-opc.c (TBL1): Use ! rather than `.
1156 * m68k-dis.c (print_insn_arg): Remove ` operand specifier.
1160 * m68k-opc.c: Correct bchg, bclr, bset, and btst on ColdFire.
1162 * m68k-opc.c: Accept tst{b,w,l} with immediate operands on cpu32.
1164 * m68k-opc.c: Correct movew of an immediate operand to %sr or %ccr
1167 * configure.in: Call AC_CHECK_TOOL before AM_PROG_LIBTOOL.
1168 * aclocal.m4: Rebuild with new libtool.
1169 * configure: Rebuild.
1171 start-sanitize-v850e
1174 * v850-opc.c ("cmov"): Order reg param r1, r2 not r2, r2.
1179 * sparc-opc.c (sparclet_cpreg_table): Add %ccsr2, %cccrr, %ccrstr.
1183 * v850-opc.c (v850_opcodes): Further rearrangements.
1188 * d30v-opc.c (rot2h, sra2h, srl2h insns): Revert last change.
1193 * v850-opc.c (v850_opcodes): Fields reordered to allow assembler
1198 * mips-opc.c: Added tx39 insns sdbbp, rfe, and deret.
1200 * mips16-opc.c: Added mips16 sdbbp.
1205 * v850-opc.c: Initialise processors field of v850_opcode structure.
1210 Merge changes from Martin Hunt:
1212 * d30v-opc.c: Change mvfacc to accept 6-bit unsigned values.
1214 * d30v-opc.c (pre_defined_registers): Add control registers from 0-63.
1215 (d30v_opcode_tabel): Add dbt, rtd, srah, and srlh instructions. Fix
1216 rot2h, sra2h, and srl2h to use new SHORT_A5S format.
1218 * d30v-dis.c (print_insn): Fix disassembly of SHORT_D2 opcodes.
1220 * d30v-dis.c (print_insn): First operand of d*i (delayed
1221 branch) instructions is relative.
1223 * d30v-opc.c (d30v_opcode_table): Change form for repeati.
1224 (d30v_operand_table): Add IMM6S3 type.
1225 (d30v_format_table): Change SHORT_D2. Add LONG_Db.
1227 * d30v-dis.c: Fix bug with ".s" and ".l" extensions
1228 and cmp instructions.
1230 * d30v-opc.c: Correct entries for repeat*, and sat*.
1231 Make IMM5 unsigned. Create IMM6U and IMM12S3U operand
1232 types. Correct several formats.
1234 * d30v-opc.c: (pre_defined_registers): Add dpsw and dpc.
1236 * d30v-opc.c (pre_defined_registers): Change control registers.
1238 * d30v-opc.c (d30v_format_table): Correct SHORT_C1 and
1239 SHORT_C2. Manual was incorrect.
1241 * d30v-dis.c (lookup_opcode): Return value now indicates
1242 if an opcode has a short and a long form. Used for deciding
1243 to append a ".s" or ".l".
1244 (print_insn): Append a ".s" to an instruction if it is
1245 the short form and ".l" if it is a long form. Do not append
1246 anything if the instruction has only one possible size.
1248 * d30v-opc.c: Change mulx2h to require an even register.
1249 New form: SHORT_A2; a SHORT_A form that needs an even
1250 register as the first operand.
1252 * d30v-dis.c (print_insn_d30v): Fix problem where the last
1253 instruction was not being disassembled if there were an odd
1254 number of instructions.
1256 * d30v-opc.c (SHORT_M2, LONG_M2): Two new forms.
1259 start-sanitize-v850e
1262 * v850-dis.c (disassemble): Improved display of register lists.
1267 * sparc-opc.c (sparc_opcodes): Fix assembler args to
1268 fzeros, fones, fsrc1, fsrc1s, fsrc2s, fnot1, fnot1s, fnot2s,
1269 fors, fnors, fands, fnands, fxors, fxnors, fornot1s, fornot2s,
1270 fandnot1s, fandnot2s.
1274 * sparc-opc.c (sparc_opcodes): Fix op3 field for fcmpq/fcmpeq.
1278 * cgen-asm.c (cgen_parse_address): New argument resultp.
1279 All callers updated.
1280 * m32r-asm.c (parse_h_hi16): Right shift numbers by 16.
1284 * mn10200-dis.c (disassemble): PC relative instructions are
1285 relative to the next instruction, not the current instruction.
1289 * v850-dis.c (disassemble): Only signed extend values that are not
1290 returned by extract functions.
1291 Remove use of V850_OPERAND_ADJUST_SHORT_MEMORY flag.
1295 * v850-opc.c: Update comments. Remove use of
1296 V850_OPERAND_ADJUST_SHORT_MEMORY. Fix several operand patterns.
1300 * v850-opc.c (MOVHI): Immediate parameter is unsigned.
1304 * configure: Rebuilt with latest devo autoconf for NT support.
1308 * v850-dis.c (disassemble): Use curly brace syntax for register
1311 * v850-opc.c (v850_opcodes[]): Add NOT_R0 flag to decect cases
1312 where r0 is being used as a destination register.
1314 start-sanitize-v850e
1317 * v850-opc.c (v850_opcodes[]): Move divh opcodes next to each other.
1322 * sh-opc.h (sh_arg_type): Add A_SGR and A_DBR.
1323 (sh_nibble_type, sh_arg_type): Add SH4 floating point extensions.
1324 (sh_table): Likewise. Add movca.l, ocbi, ocbp, ocbwb.
1325 Add insns to access SGR and DBR.
1326 * sh-dis.c (print_insn_shx): Add SH4 floating point extensions.
1330 * alpha-opc.c (alpha_opcodes): Fix hw_rei_stall mungage.
1332 start-sanitize-v850e
1335 * v850-opc.c (v850_opcodes[]): Remove use of flag field.
1336 * v850-opc.c (v850_opcodes[]): Add support for reversed short load
1341 * configure (cgen_files): Add support for v850e target.
1342 * configure.in (cgen_files): Add support for v850e target.
1346 * configure (cgen_files): Add support for v850ea target.
1347 * configure.in (cgen_files): Add support for v850ea target.
1352 * configure.in (bfd_arc_arch): Add.
1353 * configure: Rebuild.
1354 * Makefile.am (ALL_MACHINES): Add arc-dis.lo, arc-opc.lo.
1355 * Makefile.in: Rebuild.
1356 * arc-dis.c, arc-opc.c: New files.
1357 * disassemble.c (ARCH_all): Define ARCH_arc.
1358 (disassembler): Add ARC support.
1362 start-sanitize-v850e
1363 * v850-dis.c (disassemble): Add support for v850EA instructions.
1365 * v850-opc.c (insert_i5div, extract_i5div): New Functions.
1366 (v850_opcodes): Add v850EA instructions.
1368 * v850-dis.c (disassemble): Add support for v850E instructions.
1370 * v850-opc.c (insert_d5_4, extract_d5_4, insert_d16_16,
1371 extract_d16_16, insert_i9, extract_i9, insert_u9, extract_u9,
1372 insert_spe, extract_spe): New Functions.
1373 (v850_opcodes): Add v850E instructions.
1376 * v850-opc.c: Reorganised and re-layed out to improve readability
1381 * configure: Rebuild with autoconf 2.12.1.
1385 * aclocal.m4, configure: Rebuild with new automake patches.
1389 * configure.in: Set enable_shared before AM_PROG_LIBTOOL.
1390 * acinclude.m4: Just include acinclude.m4 from BFD.
1391 * aclocal.m4, configure: Rebuild.
1395 * Makefile.am: New file, based on old Makefile.in.
1396 * acconfig.h: New file.
1397 * acinclude.m4: New file.
1398 * stamp-h.in: New file.
1399 * configure.in: Call AM_INIT_AUTOMAKE and AM_PROG_LIBTOOL.
1400 Removed shared library handling; now handled by libtool. Replace
1401 AC_CONFIG_HEADER with AM_CONFIG_HEADER. Call AM_MAINTAINER_MODE,
1402 AM_CYGWIN32, and AM_EXEEXT. Replace AC_PROG_INSTALL with
1403 AM_PROG_INSTALL. Change all .o files to .lo. Remove stamp-h
1404 handling in AC_OUTPUT.
1405 * dep-in.sed: Change .o to .lo.
1406 * Makefile.in: Now built with automake.
1407 * aclocal.m4: Now built with aclocal.
1408 * config.in, configure: Rebuild.
1412 * mips-opc.c: Fix typo/thinko in "eret" instruction.
1414 start-sanitize-r5900
1417 * mips-opc.c: Fix coding of mtsa.
1422 * sparc-opc.c (sparc_opcodes): Fix spelling on fpaddX, fpsubX insns.
1424 * sparc-dis.c (sorted_opcodes): New static local.
1425 (struct opcode_hash): `opcode' is pointer to const element.
1426 (build_hash): First arg is now table of sorted pointers.
1427 (print_insn_sparc): Sort opcodes by sorting table of pointers.
1428 (compare_opcodes): Update.
1432 * cgen-opc.c: #include <ctype.h>.
1433 (hash_keyword_name): New arg `case_sensitive_p'. Callers updated.
1434 Handle case insensitive hashing.
1435 (hash_keyword_value): Change type of `value' to unsigned int.
1439 * mips-opc.c (mips_builtin_opcodes): If an insn uses single
1440 precision FP, mark it as such. Likewise for double precision
1441 FP. Mark ISA1 insns. Consolidate duplicate opcodes where
1443 start-sanitize-r5900
1444 (mips_builtin_opcodes): Remove non-existant r5900 instructions
1447 start-sanitize-r5900
1450 * mips-opc.c (mips_builtin_opcodes): Add "pinteh", "pexeh" and
1451 "pexew" as synonyms for "pintoh", "pexoh", "pexow".
1456 * ppc-opc.c (extract_nsi): make unsigned expression signed before
1458 (UNUSED): remove one level of parens, so MSVC doesn't choke on
1459 nesting depth when all the macros are expanded.
1463 * sparc-opc.c: The fcmp v9a instructions take an integer register
1464 as a destination, not a floating point register. From Christian
1469 * m68k-dis.c (print_insn_arg): Print case 7.2 using %pc@()
1470 syntax. From Roman Hodek
1473 * i386-dis.c (twobyte_has_modrm): Fix pand.
1477 * i386-dis.c (dis386_twobyte): Fix pand and pandn.
1481 * arm-dis.c: Add prototypes for arm_decode_shift and
1486 * mips-opc.c: Add r3900 insns.
1490 * sh-dis.c (print_insn_shx): Change relmask to bfd_vma. Don't
1491 print delay slot instructions on the same line. When using a PC
1492 relative load, add a comment with the value being loaded if it can
1497 * i386-dis.c (dis386[], dis386_twobyte[]): change pushl/popl
1498 to pushS/popS for segment regs and byte constant so that
1499 pushw/popw printed when in 16 bit data mode.
1501 * i386-dis.c (dis386[]): change cwtl, cltd to cWtS, cStd to
1502 print cbtw, cwtd in 16 bit data mode.
1503 * i386-dis.c (putop): extra case W to support above.
1505 * i386-dis.c (print_insn_x86): print addr32 prefix when given
1506 address size prefix in 16 bit address mode.
1510 * sh-dis.c: Reindent. Rename local variable fprintf to
1515 * m32r-opc.c (m32r_cgen_insn_table, cmpui): Undo patch of May 2.
1519 * mips-opc.c (mips_builtin_opcodes): Moved INSN_ISA field into new
1521 * mips16-opc.c (mip16_opcodes): same.
1525 * m68k-opc.c (moveb): Change $d to %d.
1529 * i386-dis.c: (dis386_twobyte): Add MMX instructions.
1530 (twobyte_has_modrm): Likewise.
1532 (OP_MMX, OP_EM, OP_MS): New static functions.
1534 * i386-dis.c: Revert patch of April 4. The output now matches
1539 * m32r-opc.c (m32r_cgen_insn_table, cmpui): Use $uimm16 instead
1544 * m32r-opc.h (CGEN_ARCH): Renamed from CGEN_CPU.
1548 * Makefile.in (install): Depend upon installdirs.
1549 (installdirs): New target.
1554 * configure.in: Use ${CONFIG_SHELL} when running $ac_config_sub.
1555 * configure: Rebuild.
1559 * cgen-*.c, m32r-*.c: #include sysdep.h instead of config.h.
1560 Delete string{,s}.h support.
1564 * cgen-asm.c (cgen_parse_operand_fn): New global.
1565 (cgen_parse_{{,un}signed_integer,address}): Update call to
1566 cgen_parse_operand_fn.
1567 (cgen_init_parse_operand): New function.
1568 * m32r-asm.c (parse_insn_normal): cgen_init_parse_operand renamed
1569 from cgen_asm_init_parse.
1570 (m32r_cgen_assemble_insn): New operand `errmsg'.
1571 Delete call to as_bad, return error message to caller.
1572 (m32r_cgen_asm_hash_keywords): #if 0 out.
1576 * m68k-dis.c (print_insn_arg) [case 'd']: Print as address register,
1578 [case 'J']: Fix typo in register name.
1582 * configure.in: Substitute SHLIB_LIBS.
1583 * configure: Rebuild.
1584 * Makefile.in (SHLIB_LIBS): New variable.
1585 ($(SHLIB)): Use $(SHLIB_LIBS).
1589 * cgen-dis.c (build_dis_hash_table): Fix xmalloc size computation.
1591 * cgen-opc.c (hash_keyword_name): Improve algorithm.
1593 * disassemble.c (disassembler): Handle m32r.
1597 * m32r-asm.c, m32r-dis.c, m32r-opc.c, m32r-opc.h: New files.
1598 * cgen-asm.c, cgen-dis.c, cgen-opc.c: New files.
1599 * Makefile.in (CFILES): Add them.
1600 (ALL_MACHINES): Add them.
1601 (dependencies): Regenerate.
1602 * configure.in (cgen_files): New variable.
1603 (bfd_m32r_arch): Add entry.
1604 * configure: Regenerate.
1608 * configure.in: Correct file names for bfd_mn10[23]00_arch.
1609 * configure: Rebuild.
1611 * Makefile.in: Rebuild dependencies.
1613 * d10v-dis.c: Include "ansidecl.h" before "opcode/d10v.h".
1615 * i386-dis.c (float_reg): Swap fsubrp and fsubp. Swap fdivrp and
1620 * Branched binutils 2.8.
1624 * m10200-dis.c: Rename from mn10200-dis.c.
1625 * m10200-opc.c: Rename from mn10200-opc.c.
1626 * m10300-dis.c: Rename from mn10300-dis.c
1627 * m10300-opc.c: Rename from mn10300-opc.c.
1628 * Makefile.in: Update accordingly.
1630 * mips16-opc.c: Add mul and dmul macros.
1634 * makefile.vms: Update CFLAGS, add clean target.
1638 * mips-opc.c: Add "wait". From Ralf Baechle
1641 * configure.in: Add stdlib.h to AC_CHECK_HEADERS list.
1642 * configure, config.in: Rebuild.
1643 * sysdep.h: Include <stdlib.h> if it exists.
1644 * sparc-dis.c: Include <stdio.h> and "sysdep.h". Don't include
1646 * Makefile.in: Rebuild dependencies.
1650 * ppc-opc.c: Add PPC 403 instructions and extended opcodes. From
1653 * mips-opc.c: Add cast when setting mips_opcodes.
1657 * v850-dis.c (disassemble): Fix sign extension problem.
1658 * v850-opc.c (extract_d*): Fix sign extension problems to make
1659 disassembly calculate branch offsets correctly.
1663 * sh-opc.h: Add bf/s and bt/s as synonyms for bf.s and bt.s.
1665 * mips-opc.c: Add dctr and dctw.
1670 * d30v-dis.c (print_insn): Change the way signed constants
1675 * Makefile.in (BFD_H): New variable.
1676 (HFILES): New variable.
1677 (CFILES): Add all C files.
1678 (.dep, .dep1, dep.sed, dep, dep-in): New targets.
1679 Delete old dependencies, and build new ones.
1680 * dep-in.sed: New file.
1684 * m68k-opc.c (m68k_opcode_aliases): Added blo and blo{s,b,w,l}.
1686 start-sanitize-coldfire
1689 * m68k-opc.c (m68k_opcodes): Provide coldfire division module
1692 end-sanitize-coldfire
1695 * mn10200-opc.c: Change "trap" to "syscall".
1696 * mn10300-opc.c: Add new "syscall" instruction.
1700 * m68k-opc.c (m68k_opcodes): Provide correct entries for mulsl and
1701 mulul insns on the coldfire.
1705 * arm-dis.c (print_insn_arm): Don't print instruction bytes.
1706 (print_insn_big_arm): Set bytes_per_chunk and display_endian.
1707 (print_insn_little_arm): Likewise.
1712 * i386-dis.c (fetch_data): Add prototype.
1713 * m68k-dis.c (fetch_data): Add prototype.
1714 (dummy_print_address): Add prototype. Make static.
1715 * ppc-opc.c (valid_bo): Add prototype.
1716 * sparc-dis.c (build_hash_table): Add prototype.
1717 (is_delayed_branch, compute_arch_mask): Add prototypes.
1718 (print_insn_sparc): Make several local variables const.
1719 (compare_opcodes): Change arguments to const PTR. Add prototype.
1720 * sparc-opc.c (arg): Change name field to be const.
1721 (lookup_name, lookup_value): Add prototypes. Change table and
1722 name parameters to be const.
1723 (sparc_encode_asi): Change name parameter to be const.
1724 (sparc_encode_membar, sparc_encode_prefetch): Likewise.
1725 (sparc_encode_sparclet_cpreg): Likewise.
1726 (sparc_decode_asi): Change return type to be const.
1727 (sparc_decode_membar, sparc_decode_prefetch): Likewise.
1728 (sparc_decode_sparclet_cpreg): Likewise.
1732 * Makefile.in ($(SHLINK)): Just use ln -s, not ln -sf, since
1733 Solaris doesn't like the combined options, and the -f is
1735 (stamp-tshlink, install): Likewise.
1739 * mn10300-opc.c (IMM16_PCREL, SD8N_PCREL, D16_SHIFT): Mark these
1744 * m68k-opc.c (m68k_opcodes): Fix last change for the mc68010.
1748 * m68k-opc.c (m68k_opcodes): Added entries for the tst insns on
1753 * m68k-opc.c (m68k_opcodes): Added swbegl pseudo-instruction.
1755 start-sanitize-tic80
1758 * tic80-dis.c (print_insn_tic80): Set info->bytes_per_line to 8.
1762 * tic80-opc.c (tic80_predefined_symbols): Define r25 properly.
1767 * m68k-dis.c (NEXTSINGLE, NEXTDOUBLE, NEXTEXTEND): Use
1768 floatformat_to_double to make portable.
1769 (print_insn_arg): Use NEXTEXTEND macro when extracting extended
1774 * mips-opc.c: Initialize mips_opcodes to mips_builtin_opcodes,
1775 and bfd_mips_num_opcodes to bfd_mips_num_builtin_opcodes.
1779 * d10v-dis.c, d10v-opc.c: Change pre_defined_registers to
1780 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1782 start-sanitize-tic80
1785 * tic80-opc.c (LSI_SCALED): Renamed from this ...
1786 (OFF_SL_BR_SCALED): ... to this, and added the flag
1787 TIC80_OPERAND_BASEREL to the flags word.
1788 (tic80_opcodes): Replace all occurances of LSI_SCALED with
1794 * mips-opc.c: Add macros for cop0, cop1 cop2 and cop3.
1795 Change mips_opcodes from const array to a pointer,
1796 and change bfd_mips_num_opcodes from const int to int,
1797 so that we can increase the size of the mips opcodes table
1800 start-sanitize-tic80
1803 * tic80-opc.c (tic80_predefined_symbols): Revert change to
1804 store BITNUM values in the table in one's complement form
1805 to match behavior when assembler is given a raw numeric
1806 value for a BITNUM operand.
1807 * tic80-dis.c (print_operand_bitnum): Ditto.
1813 * d30v-opc.c: Removed references to FLAG_X.
1818 * Makefile.in: Add dependencies on ../bfd/bfd.h as required.
1823 * Makefile.in: Added d30v object files.
1824 * configure: (bfd_d30v_arch) Rebuilt.
1825 * configure.in: (bfd_d30v_arch) Added new case.
1826 * d30v-dis.c: New file.
1827 * d30v-opc.c: New file.
1828 * disassemble.c (disassembler) Add entry for d30v.
1831 start-sanitize-tic80
1834 * tic80-opc.c (tic80_predefined_symbols): Add symbolic
1835 representations for the floating point BITNUM values.
1839 * tic80-opc.c (tic80_predefined_symbols): Store BITNUM values
1840 in the table in one's complement form, as they appear in the
1842 (tic80_symbol_to_value): Use macros to access predefined
1844 (tic80_value_to_symbol): Ditto.
1845 (tic80_next_predefined_symbol): New function.
1846 * tic80-dis.c (print_operand_bitnum): Remove code that did
1847 one's complement for BITNUM values.
1850 start-sanitize-r5900
1853 * mips-opc.c: bug fix, can't mark insns INSN_5900 and INSN_ISA4
1858 * makefile.vms: Remove 8 bit characters. Update to latest
1863 * m68k-opc.c (m68k_opcodes): Add swbeg pseudo-instruction.
1867 * mn10200-opc.c (IMM16_PCREL): This is a signed operand.
1868 (IMM24_PCREL): Likewise.
1872 * mips-dis.c (print_mips16_insn_arg): Use memaddr - 2 as the base
1873 address for an extended PC relative instruction that is not a
1878 * m68k-dis.c (print_insn_m68k): Set bytes_per_chunk and
1881 start-sanitize-tic80
1884 * tic80-opc.c (tic80_operands): Fix typo '+' -> '|'.
1885 (tic80_opcodes): Sort entries so that long immediate forms
1886 come after short immediate forms, making it easier for
1887 assembler to select the right one for a given operand.
1892 * mips-dis.c (_print_insn_mips): Set bytes_per_chunk and
1894 (print_insn_mips16): Likewise.
1896 start-sanitize-r5900
1899 * mips-opc.c: add r5900.
1902 start-sanitize-tic80
1905 * tic80-opc.c (tic80_symbol_to_value): Changed to accept
1906 a symbol class that restricts translation to just that
1907 class (general register, condition code, etc).
1911 * tic80-opc.c (tic80_operands): Add REG_0_E, REG_22_E,
1912 and REG_DEST_E for register operands that have to be
1913 an even numbered register. Add REG_FPA for operands that
1914 are one of the floating point accumulator registers.
1915 Add TIC80_OPERAND_MASK to flags for ENDMASK operand.
1916 (tic80_opcodes): Change entries that need even numbered
1917 register operands to use the new operand table entries.
1918 Add "or" entries that are identical to "or.tt" entries.
1923 * mips16-opc.c: Add new cases of exit instruction for
1925 * mips-dis.c (print_mips16_insn_arg): Display floating point
1926 registers in operands of exit instruction. Print `$' before
1927 register names in operands of entry and exit instructions.
1929 start-sanitize-tic80
1932 * tic80-opc.c (tic80_predefined_symbols): Table of name/value
1933 pairs for all predefined symbols recognized by the assembler.
1934 Also used by the disassembling routines.
1935 (tic80_symbol_to_value): New function.
1936 (tic80_value_to_symbol): New function.
1937 * tic80-dis.c (print_operand_control_register,
1938 print_operand_condition_code, print_operand_bitnum):
1939 Remove private tables and use tic80_value_to_symbol function.
1944 * d10v-dis.c (print_operand): Change address printing
1945 to correctly handle PC wrapping. Fixes PR11490.
1949 * mn10200-opc.c (mn10200_operands): Make 8 and 16 bit pc-relative
1954 * mips-dis.c (print_insn_mips16): Set insn_info information.
1955 (print_mips16_insn_arg): Likewise.
1957 * mips-dis.c (print_insn_mips16): Better handling of an extend
1958 opcode followed by an instruction which can not be extended.
1962 * m68k-opc.c (m68k_opcodes): Changed operand specifier for the
1963 coldfire moveb instruction to not allow an address register as
1964 destination. Although the documentation does not indicate that
1965 this is invalid, experiments uncovered unexpected behavior.
1966 Added a comment explaining the situation. Thanks to Andreas
1967 Schwab for pointing this out to me.
1969 start-sanitize-tic80
1972 * tic80-opc.c (tic80_opcodes): Expand comment to note that the
1973 entries are presorted so that entries with the same mnemonic are
1974 adjacent to each other in the table. Sort the entries for each
1975 instruction so that this is true.
1980 * m68k-dis.c: Include <libiberty.h>.
1981 (print_insn_m68k): Sort the opcode table on the most significant
1982 nibble of the opcode.
1984 start-sanitize-tic80
1987 * tic80-dis.c (tic80_opcodes): Add "wrcr", "vmpy", "vrnd",
1988 "vsub", "vst", "xnor", and "xor" instructions.
1989 (V_a1): Renamed from V_a, msb of accumulator reg number.
1990 (V_a0): Add macro, lsb of accumulator reg number.
1994 * tic80-dis.c (print_insn_tic80): Broke excessively long
1995 function up into several smaller ones and arranged for
1996 the instruction printing function to be callable recursively
1997 to print vector instructions that have both a load and a
1998 math instruction packed into a single opcode.
1999 * tic80-opc.c (tic80_opcodes): Expand comment for vld opcode
2000 to explain why it comes after the other vector opcodes.
2005 * m68k-opc.c (m68k_opcodes): add b, w, or l specifier to coldfire
2006 move insns to handle immediate operands.
2010 * m68k-opc.c (m68k_opcodes): Delete duplicate entry for "cmpil".
2011 fix operand mask in the "moveml" entries for the coldfire.
2013 start-sanitize-tic80
2016 * tic80-opc.c (V_a, V_m, V_S, V_Z, V_p, OP_V, MASK_V):
2017 New macros for building vector instruction opcodes.
2018 (tic80_opcodes): Remove all uses of FMT_SI, FMT_REG, and
2019 FMT_LI, which were unused. The field is now a flags field.
2020 Remove some opcodes that are possible, but illegal, such
2021 as long immediate instructions with doubles for immediate
2022 values. Add "vadd" and "vld" instructions.
2026 * tic80-opc.c (tic80_operands): Reorder some table entries to make
2027 the order more logical. Move the shift alias instructions ("rotl",
2028 "shl", "ins", "rotr", "extu", "exts", "srl", and "sra" to be
2029 interspersed with the regular sr.x and sl.x instructions. Add
2030 and test new instruction opcodes for "sl", "sli", "sr", "sri", "st",
2031 "sub", "subu", "swcr", and "trap".
2035 * tic80-opc.c (OFF_SS_PC): Renamed from OFF_SS.
2036 (OFF_SL_PC): Renamed from OFF_SL.
2037 (OFF_SS_BR): New operand type for base relative operand.
2038 (OFF_SL_BR): New operand type for base relative operand.
2039 (REG_BASE): New operand type for base register operand.
2040 (tic80_opcodes): Add and test "fmpy", "frndm", "frndn", "frndp",
2041 "frndz", "fsqrt", "fsub", "illop0", "illopF", "ins", "jsr",
2042 "ld", "ld.u", "lmo", "or", "rdcr", "rmo", "rotl", and "rotr"
2044 * tic80-dis.c (print_insn_tic80): Print opcode name with fixed width
2045 10 char field, padded with spaces on rhs, rather than a string
2046 followed by a tab. Use renamed TIC80_OPERAND_PCREL flag bit rather
2047 than old TIC80_OPERAND_RELATIVE. Add support for new
2048 TIC80_OPERAND_BASEREL flag bit.
2052 * tic80-dis.c (print_insn_tic80): Print floating point operands
2054 * tic80-opc.c (SPFI): Add single precision floating point
2055 immediate operand type.
2056 (ROTATE): Add rotate operand type for shifts.
2057 (ENDMASK): Add for shifts.
2058 (n): Macro for the 'n' bit.
2059 (i): Macro for the 'i' bit.
2060 (PD): Macro for the 'PD' field.
2061 (P2): Macro for the 'P2' field.
2062 (P1): Macro for the 'P1' field.
2063 (tic80_opcodes): Add entries for "exts", "extu", "fadd",
2069 * mn10200-dis.c (disassemble): Mask off unwanted bits after
2070 adding in current address for pc-relative operands.
2072 start-sanitize-tic80
2075 * tic80-dis.c (R_SCALED): Add macro to test for ":s" modifier bit.
2076 (print_insn_tic80): If R_SCALED then print ":s" modifier for operand.
2077 * tic80-opc.c (REG0, REG22, REG27, SSOFF, LSOFF): Names
2078 changed to REG_0, REG_22, REG_DEST, OFF_SS, OFF_SL respectively.
2079 (SICR, LICR, REGM_SI, REGM_LI): Names changed to CR_SI, CR_LI,
2080 REG_BASE_M_SI, REG_BASE_M_LI respectively.
2081 (REG_SCALED, LSI_SCALED): New operand types.
2082 (E): New macro for 'E' bit at bit 27.
2083 (tic80_opcodes): Add and test dld, dld.u, dst, estop, and etrap
2084 opcodes, including the various size flavors (b,h,w,d) for
2085 the direct load and store instructions.
2089 * tic80-dis.c (M_SI, M_LI): Add macros to test for ":m" modifier bit
2091 * tic80-dis.c (print_insn_tic80): Change comma and paren handling.
2092 Use M_SI and M_LI macros to check for ":m" modifier for GPR operands.
2093 * tic80-opc.c (tic80_operands): Add REGM_SI and REGM_LI operands.
2094 (F, M_REG, M_LI, M_SI, SZ_REG, SZ_LI, SZ_SI, D, S): New bit-twiddlers.
2095 (MASK_LI_M, MASK_SI_M, MASK_REG_M): Remove and replace in opcode
2096 masks with "MASK_* & ~M_*" to get the M bit reset.
2097 (tic80_opcodes): Add bsr, bsr.a, cmnd, cmp, dcachec, and dcachef.
2101 * tic80-dis.c (print_insn_tic80): Print TIC80_OPERAND_RELATIVE
2102 correctly. Add support for printing TIC80_OPERAND_BITNUM and
2103 TIC80_OPERAND_CC, and TIC80_OPERAND_CR operands in symbolic
2105 * tic80-opc.c (tic80_operands): Add SSOFF, LSOFF, BITNUM,
2106 CC, SICR, and LICR table entries.
2107 (tic80_opcodes): Add and test "nop", "br", "bbo", "bbz",
2108 "bcnd", and "brcr" opcodes.
2113 * ppc-opc.c (powerpc_operands): Make comment match the
2114 actual fields (no shift field).
2115 * sparc-opc.c (sparc_opcodes): Document why this cannot be "const".
2116 start-sanitize-tic80
2117 * tic80-dis.c (print_insn_tic80): Replace abort stub with a
2118 partial implementation, work in progress.
2119 * tic80-opc.c (tic80_operands): Begin construction operands table.
2120 (tic80_opcodes): Continue populating opcodes table and start
2121 filling in the operand indices.
2122 (tic80_num_opcodes): Add this.
2127 * m68k-opc.c: Add #B case for moveq.
2131 * mn10300-dis.c (disassemble): Make sure all variables are initialized
2132 before they are used.
2136 * v850-opc.c (v850_opcodes): Put curly-braces around operands
2137 for "breakpoint" instruction.
2141 * Makefile.in (ALL_CFLAGS): Add -D_GNU_SOURCE.
2142 (dep): Use ALL_CFLAGS rather than CFLAGS.
2146 * v850-opc.c (D8_{6,7}): Set V850_OPERAND_ADJUST_SHORT_MEMORY
2151 * Makefile.in (m68k-opc.o, alpha-opc.o): Remove dis-asm.h dependency.
2152 start-sanitize-tic80
2153 (tic80-dis.o, tic80-opc.o): Add rules per comment in Makefile.in.
2158 * mips16-opc.c: Add "abs".
2160 start-sanitize-tic80
2163 * Makefile.in (ALL_MACHINES): Add tic80-dis.o and tic80-opc.o.
2164 * disassemble.c (ARCH_tic80): Define if ARCH_all is defined.
2165 (disassembler): Add bfd_arch_tic80 support to set disassemble
2166 to print_insn_tic80.
2167 * tic80-dis.c (print_insn_tic80): Add stub.
2171 * configure.in (arch in $selarchs): Add bfd_tic80_arch entry.
2172 * configure: Regenerate with autoconf.
2173 * tic80-dis.c: Add file.
2174 * tic80-opc.c: Add file.
2179 * d10v-opc.c (pre_defined_registers): Add cr[0-15], dpc, dpsw, link.
2183 * mn10200-opc.c (mn10200_operands): Add SIMM16N.
2184 (mn10200_opcodes): Use it for some logicals and btst insns.
2185 Add "break" and "trap" instructions.
2187 * mn10300-opc.c (mn10300_opcodes): Add "break" instruction.
2189 * mn10200-opc.c: Add pseudo-ops for "mov (an),am" and "mov an,(am)".
2193 * mips-dis.c (print_mips16_insn_arg): The base address of a PC
2194 relative load or add now depends upon whether the instruction is
2199 * mn10200-dis.c: Finish writing disassembler.
2200 * mn10200-opc.c (mn10200_opcodes): Fix mask for "mov imm8,dn".
2201 Fix mask for "jmp (an)".
2203 * mn10300-dis.c (disassemble, print_insn_mn10300): Corrently
2204 handle endianness issues for mn10300.
2206 * mn10200-opc.c (mn10200_opcodes): Fix operands for "movb dm,(an)".
2210 * mn10200-opc.c (mn10200_opcodes): "mov imm8,d0" is a format 2
2211 instruction. Fix opcode field for "movb (imm24),dn".
2213 * mn10200-opc.c (mn10200_operands): Fix insertion position
2218 * mn10200-opc.c: Create mn10200 opcode table.
2219 * mn10200-dis.c: Flesh out mn10200 disassembler. Not ready,
2220 but moving along nicely.
2224 * Makefile.in (ALL_MACHINES): Add mips16-opc.o.
2228 * m68k-opc.c (m68k_opcodes): Revert change to use < and >
2229 specifiers for fmovem* instructions.
2233 * mn10300-dis.c (disassemble): Remove '$' register prefixing.
2237 * mips16-opc.c: Change opcode for entry/exit to avoid conflicting
2242 * mn10300-opc.c: Add some comments explaining the various
2245 * mn10300-dis.c (disassemble): Fix minor gcc -Wall warnings.
2249 * m68k-dis.c (print_insn_arg): Handle new < and > operand
2252 * m68k-opc.c (m68k_opcodes): Simplify table by using < and >
2253 operand specifiers in fmovm* instructions.
2257 * ppc-opc.c (insert_li): Give an error if the offset has the two
2258 least significant bits set.
2262 * mips-dis.c (print_insn_mips16): Separate the instruction from
2263 the arguments with a tab, not a space.
2267 * mn10300-dis.c (disasemble): Finish conversion to '$' as
2270 * mn10300-opc.c (mn10300_opcodes): Fix mask field for
2275 * configure: Rebuild with autoconf 2.12.
2277 Add support for mips16 (16 bit MIPS implementation):
2278 * mips16-opc.c: New file.
2279 * mips-dis.c: Include "elf-bfd.h" and "elf/mips.h".
2280 (mips16_reg_names): New static array.
2281 (print_insn_big_mips): Use print_insn_mips16 in 16 bit mode or
2282 after seeing a 16 bit symbol.
2283 (print_insn_little_mips): Likewise.
2284 (print_insn_mips16): New static function.
2285 (print_mips16_insn_arg): New static function.
2286 * mips-opc.c: Add jalx instruction.
2287 * Makefile.in (mips16-opc.o): New target.
2288 * configure.in: Use mips16-opc.o for bfd_mips_arch.
2289 * configure: Rebuild.
2293 * m68k-opc.c (m68k_opcodes): Simplify table by using < and >
2294 operand specifiers in *save, *restore and movem* instructions.
2296 * m68k-opc.c (m68k_opcodes): Fix move and movem instructions for
2299 * m68k-opc.c (m68k_opcodes): The coldfire (mcf5200) can only use
2300 register operands for immediate arithmetic, not, neg, negx, and
2301 set according to condition instructions.
2303 * m68k-opc.c (m68k_opcodes): Consistantly Use "s" as the storage
2304 specifier of the effective-address operand in immediate forms of
2305 arithmetic instructions. The specifier for the immediate operand
2306 notes how and where the constant will be stored.
2310 * mn10300-opc.c (mn10300_opcodes): Remove redundant "lcc"
2313 * mn10300-dis.c (disassemble): Use '$' instead of '%' for
2316 * mn10300-dis.c (disassemble): Prefix registers with '%'.
2320 * mn10300-dis.c (disassemble): Handle register lists.
2322 * mn10300-opc.c: Fix handling of register list operand for
2323 "call", "ret", and "rets" instructions.
2325 * mn10300-dis.c (disassemble): Print PC-relative and memory
2326 addresses symbolically if possible.
2327 * mn10300-opc.c: Distinguish between absolute memory addresses,
2328 pc-relative offsets & random immediates.
2330 * mn10300-dis.c (print_insn_mn10300): Fix fetch of last byte
2332 (disassemble): Handle SPLIT and EXTENDED operands.
2336 * mn10300-dis.c: Rough cut at printing some operands.
2338 * mn10300-dis.c: Start working on disassembler support.
2339 * mn10300-opc.c (mn10300_opcodes): Fix masks on several insns.
2341 * mn10300-opc.c (mn10300_operands): Add "REGS" for a register
2343 (mn10300_opcodes): Use REGS for register list in "movm" instructions.
2347 * d10v-opc.c (d10v_opcodes): Add3 sets the carry.
2351 * mn10300-opc.c (mn10300_opcodes): Demand parens around
2352 register argument is calls and jmp instructions.
2356 * mn10300-opc.c (mn10300_opcodes): Use DN01 for putx and
2357 getx operand. Fix opcode for mulqu imm,dn.
2361 * mn10300-opc.c (mn10300_operands): Hijack "bits" field
2362 in MN10300_OPERAND_SPLIT operands for how many bits
2363 appear in the basic insn word. Add IMM32_HIGH24,
2364 IMM32_HIGH24_LOWSHIFT8, IMM8E_SHIFT8.
2365 (mn10300_opcodes): Use new operands as needed.
2367 * mn10300-opc.c (mn10300_operands): Add IMM32_LOWSHIFT8
2368 for bset, bclr, btst instructions.
2369 (mn10300_opcodes): Use new IMM32_LOWSHIFT8 as needed.
2371 * mn10300-opc.c (mn10300_operands): Remove many redundant
2372 operands. Update opcode table as appropriate.
2373 (IMM32): Add MN10300_OPERAND_SPLIT flag.
2374 (mn10300_opcodes): Fix single bit error in mov imm32,dn insn.
2378 * mn10300-opc.c (mn10300_operands): Add DN2, DM2, AN2, AM2
2379 operands (for indexed load/stores). Fix bitpos for DI
2380 operand. Add SN8N_SHIFT8, IMM8_SHIFT8, and D16_SHIFT for the
2381 few instructions that insert immediates/displacements in the
2382 middle of the instruction. Add IMM8E for 8 bit immediate in
2383 the extended part of an instruction.
2384 (mn10300_operands): Use new opcodes as appropriate.
2388 * d10v-opc.c (d10v_opcodes): Declare the trap instruction
2389 sequential so the assembler never parallelizes it with
2394 * mn10300-opc.c (mn10300_operands): Add DN01 and AN01 for
2395 a data/address register that appears in register field 0
2396 and register field 1.
2397 (mn10300_opcodes): Use DN01 and AN01 for mov/cmp imm8,DN/AN
2401 * alpha-dis.c (print_insn_alpha): Use new NOPAL mask for
2402 standard disassembly.
2404 * alpha-opc.c (alpha_operands): Rearrange flags slot.
2405 (alpha_opcodes): Add new BWX, CIX, and MAX instructions.
2406 Recategorize PALcode instructions.
2410 * v850-opc.c (v850_opcodes): Add relaxing "jbr".
2414 * mips-dis.c (_print_insn_mips): Don't print a trailing tab if
2415 there are no operand types.
2419 * v850-opc.c (D9_RELAX): Renamed from D9, all references
2421 (v850_operands): Make sure D22 immediately follows D9_RELAX.
2425 * i386-dis.c (print_insn_x86): Set info->bytes_per_line to 5.
2429 * v850-opc.c (insert_d8_6): Fix operand insertion for sld.w
2430 and sst.w instructions.
2432 * v850-opc.c (v850_opcodes): Add "jCC" instructions (aliases for
2437 * mips-dis.c (_print_insn_mips): Use a tab between the instruction
2442 * ppc-opc.c (PPCPWR2): Define.
2443 (powerpc_opcodes): Use PPCPWR2 for fsqrt, rather than duplicating
2448 * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode
2449 field for movhu instruction.
2451 * v850-dis.c (disassemble): For V850_OPERAND_SIGNED operands,
2452 cast value to "long" not "signed long" to keep hpux10
2457 * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode field
2460 * mn10300-opc.c (FMT*): Remove definitions.
2462 * mn10300-opc.c (mn10300_opcodes): Fix destination register
2463 for shift-by-register opcodes.
2465 * mn10300-opc.c (mn10300_operands): Break DN, DM, AN, AM
2466 into [AD][MN][01] for encoding the position of the register
2471 * mn10300-opc.c (mn10300_opcodes): Add "extended" instructions,
2472 "putx", "getx", "mulq", "mulqu", "sat16", "sat24", "bsch".
2476 * mn10300-opc.c (mn10300_operands): Remove "REGS" operand.
2477 Fix various typos. Add "PAREN" operand.
2478 (MEM, MEM2): Define.
2479 (mn10300_opcodes): Surround all memory addresses with "PAREN"
2480 operands. Fix several typos.
2482 * mn10300-opc.c (mn10300_opcodes): Fix typos in yesterday's
2487 * mn10300-opc.c (FMT_XX): Renumber starting at one.
2488 (mn10300_operands): Rough cut. Enough to parse "mov" instructions
2490 (mn10300_opcodes): Break opcode format out into its own field.
2491 Update many operand fields to deal with signed vs unsigned
2492 issues. Fix one or two typos in the "mov" instruction
2493 opcode, mask and/or operand fields.
2497 * m68k-opc.c (plusha): Prefer encoding for m68040up, in case
2498 m68851 wasn't reset.
2502 * mn10300-opc.c (mn10300_opcodes): Add opcode & masks for
2503 all opcodes. Very rough cut at operands for all opcodes.
2505 * mn10300-opc.c (mn10300_opcodes): Start fleshing out the
2510 * mn10200-opc.c, mn10300-opc.c: New files.
2511 * mn10200-dis.c, mn10300-dis.c: New files.
2512 * mn10x00-opc.c, mn10x00-dis.c: Deleted.
2513 * disassemble.c: Break mn10x00 support into 10200 and 10300
2515 * configure.in: Likewise.
2516 * configure: Rebuilt.
2520 * Makefile.in (MOSTLYCLEAN): Move config.log to distclean.
2524 * mn10x00-opc.c, mn10x00-dis.c: New files for Matsushita
2526 * disassemble (ARCH_mn10x00): Define.
2527 (disassembler): Handle bfd_arch_mn10x00.
2528 * configure.in: Recognize bfd_mn10x00_arch.
2529 * configure: Rebuilt.
2533 * i386-dis.c (op_rtn): Change to be a pointer. Adjust uses
2534 accordingly. Don't declare functions using op_rtn.
2538 * v850-dis.c (disassemble): Add memaddr argument. Re-arrange
2539 params to be more standard.
2540 * (disassemble): Print absolute addresses and symbolic names for
2541 branch and jump targets.
2542 * v850-opc.c (v850_operand): Add displacement flag to 9 and 22
2544 * (v850_opcodes): Add breakpoint insn.
2548 * m68k-opc.c: Move the fmovemx data register cases before the
2549 other cases, so that they get recognized before the data register
2550 does gets treated as a degenerate register list.
2554 * mips-opc.c: Add a case for "div" and "divu" with two registers
2555 and a destination of $0.
2559 * mips-dis.c (print_insn_arg): Add prototype.
2560 (_print_insn_mips): Ditto.
2564 * mips-dis.c (print_insn_arg): Print condition code registers as
2569 * sparc-opc.c (sparc_opcodes): Add setuw, setsw, setx.
2573 * v850-dis.c (disassemble): Make static. Provide prototype.
2577 * v850-opc.c (insert_d9, insert_d22): Fix boundary case
2582 * v850-dis.c (disassemble): Handle insertion of ',', '[' and
2583 ']' characters into the output stream.
2584 * v850-opc.c (v850_opcodes: Remove size field from all opcodes.
2585 Add "memop" field to all opcodes (for the disassembler).
2586 Reorder opcodes so that "nop" comes before "mov" and "jr"
2587 comes before "jarl".
2589 * v850-dis.c (print_insn_v850): Fix typo in last change.
2591 * v850-dis.c (print_insn_v850): Properly handle disassembling
2592 a two byte insn at the end of a memory region when the memory
2593 region's size is only two byte aligned.
2595 * v850-dis.c (v850_cc_names): Fix stupid thinkos.
2597 * v850-dis.c (v850_reg_names): Define.
2598 (v850_sreg_names, v850_cc_names): Likewise.
2599 (disassemble): Very rough cut at printing operands (unformatted).
2601 * v850-opc.c (BOP_MASK): Fix.
2602 (v850_opcodes): Fix mask for jarl and jr.
2604 * v850-dis.c: New file. Skeleton for disassembler support.
2605 * Makefile.in Remove v850 references, they're not needed here.
2606 * configure.in: Add v850-dis.o when building v850 toolchains.
2607 * configure: Rebuilt.
2608 * disassemble.c (disassembler): Call v850 disassembler.
2610 * v850-opc.c (insert_d8_7, extract_d8_7): New functions.
2611 (insert_d8_6, extract_d8_6): New functions.
2612 (v850_operands): Rename D7S to D7; operand for D7 is unsigned.
2613 Rename D8 to D8_7, use {insert,extract}_d8_7 routines.
2615 (IF4A, IF4B): Use "D7" instead of "D7S".
2616 (IF4C, IF4D): Use "D8_7" instead of "D8".
2617 (IF4E, IF4F): New. Use "D8_6".
2618 (v850_opcodes): Use IF4A/IF4B for sld.b/sst.b. Use IF4C/IF4D for
2619 sld.h/sst.h. Use IF4E/IF4F for sld.w/sst.w.
2621 * v850-opc.c (insert_d16_15, extract_d16_15): New functions.
2622 (v850_operands): Change D16 to D16_15, use special insert/extract
2623 routines. New new D16 that uses the generic insert/extract code.
2624 (IF7A, IF7B): Use D16_15.
2625 (IF7C, IF7D): New. Use D16.
2626 (v850_opcodes): Use IF7C and IF7D for ld.b and st.b.
2628 * v850-opc.c (insert_d9, insert_d22): Slightly improve error
2629 message. Issue an error if the branch offset is odd.
2631 * v850-opc.c: Add notes about needing special insert/extract
2632 for all the load/store insns, except "ld.b" and "st.b".
2634 * v850-opc.c (insert_d22, extract_d22): New functions.
2635 (v850_operands): Use insert_d22 and extract_d22 for
2637 (insert_d9): Fix range check.
2641 * v850-opc.c (v850_operands): Add V850_OPERAND_SIGNED flag
2642 and set bits field to D9 and D22 operands.
2646 * v850-opc.c (v850_operands): Define SR2 operand.
2647 (v850_opcodes): "ldsr" uses R1,SR2.
2649 * v850-opc.c (v850_opcodes): Fix opcode specs for
2650 sld.w, sst.b, sst.h, sst.w, and nop.
2654 * v850-opc.c (v850_opcodes): Add null opcode to mark the
2655 end of the opcode table.
2659 * d10v-opc.c (pre_defined_registers): Added register pairs,
2660 "r0-r1", "r2-r3", etc.
2664 * v850-opc.c (v850_operands): Make I16 be a signed operand.
2665 Create I16U for an unsigned 16bit mmediate operand.
2666 (v850_opcodes): Use I16U for "ori", "andi" and "xori".
2668 * v850-opc.c (v850_operands): Define EP operand.
2669 (IF4A, IF4B, IF4C, IF4D): Use EP.
2671 * v850-opc.c (v850_opcodes): Fix opcode numbers for "mov"
2672 with immediate operand, "movhi". Tweak "ldsr".
2674 * v850-opc.c (v850_opcodes): Get ld.[bhw] and st.[bhw]
2675 correct. Get sld.[bhw] and sst.[bhw] closer.
2677 * v850-opc.c (v850_operands): "not" is a two byte insn
2679 * v850-opc.c (v850_opcodes): Correct bit pattern for setf.
2681 * v850-opc.c (v850_operands): D16 inserts at offset 16!
2683 * v850-opc.c (two): Get order of words correct.
2685 * v850-opc.c (v850_operands): I16 inserts at offset 16!
2687 * v850-opc.c (v850_operands): Add "SR1" and "SR2" for system
2688 register source and destination operands.
2689 (v850_opcodes): Use SR1 and SR2 for "ldsr" and "stsr".
2691 * v850-opc.c (v850_opcodes): Fix thinko in "jmp" opcode. Fix
2692 same thinko in "trap" opcode.
2694 * v850-opc.c (v850_opcodes): Add initializer for size field
2697 * v850-opc.c (v850_operands): D6 -> DS7. References changed.
2698 Add D8 for 8-bit unsigned field in short load/store insns.
2699 (IF4A, IF4D): These both need two registers.
2700 (IF4C, IF4D): Define. Use 8-bit unsigned field.
2701 (v850_opcodes): For "sld.h", "sld.w", "sst.h", "sst.w", use
2702 IF4C & IF4D. For "trap" use I5U, not I5. Add IF1 operand
2703 for "ldsr" and "stsr".
2704 * v850-opc.c (v850_operands): 3-bit immediate for bit insns
2707 * v850-opc.c (v850_opcodes): Correct short store half (sst.h) and
2708 short store word (sst.w).
2712 * v850-opc.c (v850_operands): Added insert and extract fields,
2713 pointers to functions that handle unusual operand encodings.
2717 * v850-opc.c (v850_opcodes): Enable "trap".
2719 * v850-opc.c (v850_opcodes): Fix order of displacement
2720 and register for "set1", "clr1", "not1", and "tst1".
2724 * v850-opc.c (v850_operands): Add "B3" support.
2725 (v850_opcodes): Fix and enable "set1", "clr1", "not1"
2728 * v850-opc.c (v850_opcodes): "jmp" has only an R1 operand.
2730 * v850-opc.c: Close unterminated comment.
2734 * v850-opc.c (v850_operands): Add flags field.
2735 (v850_opcodes): add move opcodes.
2739 * Makefile.in (ALL_MACHINES): Add v850-opc.o.
2740 * configure: (bfd_v850v_arch) Add new case.
2741 * configure.in: (bfd_v850_arch) Add new case.
2742 * v850-opc.c: New file.
2746 * sparc-dis.c (print_insn_sparc): Handle little endian sparcs.
2750 * d10v-opc.c: Add additional information to the opcode
2751 table to help determinine which instructions can be done
2756 * mpw-make.sed: Update editing of include pathnames to be
2761 * arm-opc.h: Added "bx" instruction definition.
2765 * alpha-opc.c (EV4EXTHWINDEX): Field width should be 8 not 5.
2769 * d10v-opc.c (d10v_opcodes): Minor fixes to addi and bl.l.
2773 * d10v-opc.c (d10v_opcodes): Correct 'mv' unit entry to EITHER.
2777 * makefile.vms: Update for alpha-opc changes.
2781 * i386-dis.c (print_insn_i386): Actually return the correct value.
2782 (ONE, OP_ONE): #ifdef out; not used.
2786 * d10v-opc.c (d10v_opcodes): Added 2 accumulator sub instructions.
2787 Changed subi operand type to treat 0 as 16.
2791 * m68k-opc.c: Add cpushl for the mcf5200. From Ken Rose
2796 * arm-opc.h: (arm_opcodes): Added halfword and sign-extension
2797 memory transfer instructions. Add new format string entries %h and %s.
2798 * arm-dis.c: (print_insn_arm): Provide decoding of the new
2803 * d10v-opc.c (d10v_operands): Added UNUM4S; a 4-bit accumulator shift.
2804 (d10v_opcodes): Modified accumulator shift instructions to use UNUM4S.
2808 * alpha-dis.c (print_insn_alpha_osf): Remove.
2809 (print_insn_alpha_vms): Remove.
2810 (print_insn_alpha): Make globally visible. Chose the register
2811 names based on info->flavour.
2812 * disassemble.c: Always return print_insn_alpha for the alpha.
2816 * d10v-dis.c (dis_long): Handle unknown opcodes.
2820 * d10v-opc.c: Changes to support signed and unsigned numbers.
2821 All instructions with the same name that have long and short forms
2822 now end in ".l" or ".s". Divs added.
2823 * d10v-dis.c: Changes to support signed and unsigned numbers.
2827 * d10v-dis.c: Change all functions to use info->print_address_func.
2831 * m68k-opc.c (m68k_opcodes): Make opcode masks for the ColdFire
2832 move ccr/sr insns more strict so that the disassembler only
2833 selects them when the addressing mode is data register.
2836 * d10v-opc.c (pre_defined_registers): Declare.
2837 * d10v-dis.c (print_operand): Now uses pre_defined_registers
2838 to pick a better name for the registers.
2842 * sparc-opc.c: Fix opcode values for fpack16, and fpackfix. Fix
2843 operands for fexpand and fpmerge. From Christian Kuehnke
2848 * alpha-dis.c (print_insn_alpha): No longer the user-visible
2849 print routine. Take new regnames and cpumask arguments.
2850 Kill the environment variable nonsense.
2851 (print_insn_alpha_osf): New function. Do OSF/1 style regnames.
2852 (print_insn_alpha_vms): New function. Do VMS style regnames.
2853 * disassemble.c (disassembler): Test bfd flavour to pick
2854 between OSF and VMS routines. Default to OSF.
2858 * configure.in: Call AC_SUBST (INSTALL_SHLIB).
2859 * configure: Rebuild.
2860 * Makefile.in (install): Use @INSTALL_SHLIB@.
2864 * configure: (bfd_d10v_arch) Add new case.
2865 * configure.in: (bfd_d10v_arch) Add new case.
2866 * d10v-dis.c: New file.
2867 * d10v-opc.c: New file.
2868 * disassemble.c (disassembler) Add entry for d10v.
2872 * m68k-opc.c (m68k_opcodes): Fix bugs in coldfire insns relating
2873 to bcc, trapfl, subxl, and wddata discovered by Andreas Schwab.
2877 * i386-dis.c: Get rid of print_insn_i8086. Use info.mach to
2878 distinguish between variants of the instruction set.
2879 * sparc-dis.c: Get rid of print_insn_sparclite. Use info.mach to
2880 distinguish between variants of the instruction set.
2884 * i386-dis.c (print_insn_i8086): New routine to disassemble using
2885 the 8086 instruction set.
2886 * i386-dis.c: General cleanups. Make most things static. Add
2887 prototypes. Get rid of static variables aflags and dflags. Pass
2888 them as args (to almost everything).
2892 * h8300-dis.c (bfd_h8_disassemble): Handle macregs in ldmac insns.
2894 * h8300-dis.c (bfd_h8_disassemble): Handle "ldm.l" and "stm.l".
2896 * h8300-dis.c (bfd_h8_disassemble): "abs" is implicitly two
2897 if the next arg is marked with SRC_IN_DST. Gross.
2899 * h8300-dis.c (bfd_h8_disassemble): Print "exr" when
2900 we're looking for and find EXR.
2902 * h8300-dis.c (bfd_h8_disassemble): We don't have a match
2903 if we're looking for KBIT and we don't find it.
2905 * h8300-dis.c (bfd_h8_disassemble): Mask off unwanted bits
2908 * h8300-dis.c (bfd_h8_disassemble): Don't set plen for
2909 3bit immediate operands.
2913 * Released binutils 2.7.
2915 * alpha-opc.c: Add new case of "mov". From Klaus Kaempf
2920 * alpha-opc.c: Correct second case of "mov" to use OPRL.
2924 * sparc-dis.c (print_insn_sparclite): New routine to print
2925 sparclite instructions.
2929 * m68k-opc.c (m68k_opcodes): Add coldfire support.
2933 * sparc-opc.c (asi_table): Add #ASI_N, #ASI_N_L, #ASI_NUCLEUS,
2934 #ASI_NUCLEUS_LITTLE. Rename #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_L
2935 to #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_LITTLE.
2939 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir):
2940 Use autoconf-set values.
2941 (docdir, oldincludedir): Removed.
2942 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
2946 * alpha-opc.c: New file.
2947 * alpha-opc.h: Remove.
2948 * alpha-dis.c: Complete rewrite to use new opcode table.
2949 * configure.in: For bfd_alpha_arch, use alpha-opc.o.
2950 * configure: Rebuild with autoconf 2.10.
2951 * Makefile.in (ALL_MACHINES): Add alpha-opc.o.
2952 (alpha-dis.o): Depend upon $(INCDIR)/opcode/alpha.h, not
2954 (alpha-opc.o): New target.
2958 * sparc-dis.c (print_insn_sparc): Remove unused local variable i.
2959 Set imm_added_to_rs1 even if the source and destination register
2962 * sparc-opc.c: Add some two operand forms of the wr instruction.
2966 * h8300-dis.c (bfd_h8_disassemble): Rename "hmode" argument
2969 * disassemble.c (disassembler): Handle H8/S.
2970 * h8300-dis.c (print_insn_h8300s): New function for H8/S.
2974 * sparc-opc.c: Add beq/teq as aliases for be/te.
2976 * ppc-opc.c: Fix fcmpo opcode. From Sergei Steshenko
2981 * makefile.vms: New file.
2983 * alpha-dis.c (print_insn_alpha): Print lda ra,lit(rz) as mov.
2987 * h8300-dis.c (bfd_h8_disassemble): Always print ABS8MEM with :8,
2992 * i386-dis.c (OP_OFF): Call append_prefix.
2996 * ppc-opc.c (instruction encoding macros): Add explicit casts to
2997 unsigned long to silence a warning from the Solaris PowerPC
3002 * sparc-opc.c (sparc_opcodes): Add ultrasparc vis extensions.
3006 * sparc-dis.c (X_IMM,X_SIMM): New macros.
3008 (print_insn_sparc): Merge cases i,I,j together. New cases X,Y.
3009 * sparc-opc.c (sparc_opcodes): Use X for 5 bit shift constants,
3010 Y for 6 bit shift constants. Rewrite entries for crdcxt, cwrcxt,
3011 cpush, cpusha, cpull sparclet insns.
3015 * sparc-dis.c (compute_arch_mask): Replace ANSI style def with K&R.
3019 * sparc-opc.c: Set F_FBR on floating point branch instructions.
3020 Set F_FLOAT on other floating point instructions.
3024 * ppc-opc.c (PPC860): Macro for 860/821 specific instructions and
3026 (powerpc_opcodes): Add 860/821 specific SPRs.
3030 * configure.in: Permit --enable-shared to specify a list of
3031 directories. Set and substitute BFD_PICLIST.
3032 * configure: Rebuild.
3033 * Makefile.in (BFD_PICLIST): Rename from BFD_LIST. Change all
3034 uses. Set to @BFD_PICLIST@.
3038 * h8300-dis.c (bfd_h8_disassemble): Use "bit" for L_3 immediates,
3039 not "abs", which may be needed for the absolute in something
3040 like btst #0,@10:8. Print L_3 immediates separately from other
3041 immediates. Change ABSMOV reference to ABS8MEM.
3045 * sparc-dis.c (opcodes_initialized): Move inside print_insn_sparc.
3046 (current_arch_mask): New static global.
3047 (compute_arch_mask): New static function.
3048 (print_insn_sparc): Delete sparc_v9_p. New static local
3049 current_mach. Resort opcode table if current_mach changes.
3050 Generalize "insn not supported" test.
3051 (compare_opcodes): Prefer supported opcodes to nonsupported ones.
3052 Delete test for v9/!v9.
3053 * sparc-opc.c (MASK_*): Use SPARC_OPCODE_ARCH_MASK.
3055 (brfc): Split into CBR and FBR for coprocessor/fp branches.
3056 (brfcx): Renamed to FBRX.
3057 (condfc): Renamed to CONDFC. Pass v6notlet to CBR (standard
3058 coprocessor mnemonics are not supported on the sparclet).
3059 (condf): Renamed to CONDF.
3060 (SLCBCC2): Delete F_ALIAS flag.
3064 * sparc-opc.c (sparc_opcodes): rd must be 0 for
3065 mov foo,{%y,%psr,%wim,%tbr}. Support mov foo,%asrX.
3069 * Makefile.in (config.status): Depend upon BFD VERSION file, so
3070 that the shared library version number is set correctly.
3074 * configure.in: Use AC_CHECK_TOOL to find ar and ranlib. From
3076 * configure: Rebuild.
3080 * z8kgen.c (internal, gas): Call xmalloc rather than unchecked
3085 * configure: Rebuild with autoconf 2.8.
3089 * sparc-dis.c (print_insn_sparc): Handle 'O' operand char like 'r'.
3090 * sparc-opc.c (sparc_opcodes): Use 'O' operand char for `neg reg'.
3094 * configure.in: Don't set SHLIB or SHLINK to an empty string,
3095 since they appear as targets in Makefile.in.
3096 * configure: Rebuild.
3100 * mpw-make.sed: Edit out shared library support bits.
3104 * sparc-opc.c (v8,v6notv9): Add MASK_SPARCLET.
3105 (sparc_opcode_archs): Add MASK_V8 to sparclet entry.
3106 (sparc_opcodes): Add sparclet insns.
3107 (sparclet_cpreg_table): New static local.
3108 (sparc_{encode,decode}_sparclet_cpreg): New functions.
3109 * sparc-dis.c (print_insn_sparc): Handle sparclet cpregs.
3113 * i386-dis.c (index16): New static variable.
3114 (putop): Print jecxz for 32 bit case, jcxz for 16 bit, not the
3116 (OP_indirE): Return result of OP_E.
3117 (OP_E): Check for 16 bit addressing mode, and disassemble
3118 correctly. Optimised 32 bit case a little. Don't print
3119 "(base,index,scale)" when sib specifies only an offset.
3123 * configure.in: Set and substitute SHLIB_DEP.
3124 * configure: Rebuild.
3125 * Makefile.in (SHLIB_DEP): New variable.
3126 (LIBIBERTY_LISTS, BFD_LIST): New variables.
3127 (stamp-piclist): Depend upon LIBIBERTY_LISTS and BFD_LIST. If
3128 COMMON_SHLIB, add them to piclist with appropriate modifications.
3129 ($(SHLIB)): Depend upon $(SHLIB_DEP). Don't check COMMON_SHLIB
3130 here: just use piclist.
3134 * sparc-dis.c (MASK_V9,V9_ONLY_P,V9_P): Define.
3135 (print_insn_sparc): Rewrite v9/not-v9 tests.
3136 (compare_opcodes): Likewise.
3137 * sparc-opc.c (MASK_<ARCH>): Define.
3138 (v6,v7,v8,sparclite,v9,v9a): Redefine.
3139 (sparclet,v6notv9): Define.
3140 (sparc_opcode_archs): Delete member `conflicts'. Add `supported'.
3141 (sparc_opcodes): Delete F_NOTV9, use v6notv9 instead.
3145 * configure.in: Call AC_PROG_CC before configure.host.
3146 * configure: Rebuild.
3148 * Makefile.in (SONAME): Remove leading ../bfd/ from $(SHLIB).
3152 * i386-dis.c (onebyte_has_modrm): New static array.
3153 (twobyte_has_modrm): New static array.
3154 (print_insn_i386): Only fetch the mod/reg/rm byte if it is needed.
3158 * Makefile.in ($(SHLINK)): Check ts against $(SHLIB), not
3163 * ppc-opc.c (PPC): Undef, so default defination on Windows NT
3168 * m68k-opc.c (m68k_opcodes): The bkpt instruction is supported on
3169 m68010up, not just m68020up | cpu32.
3171 * Makefile.in (SONAME): New variable.
3172 ($(SHLINK)): Make a link to the transformed name, as well.
3173 (stamp-tshlink): New target.
3174 (install): Skip stamp-tshlink during install.
3178 * configure.in: Call AC_ARG_PROGRAM.
3179 * configure: Rebuild.
3180 * Makefile.in (program_transform_name): New variable.
3181 (install): Transform library name before installing it.
3185 * i960-dis.c (mem): Add HX dcinva instruction.
3187 Support for building as a shared library, based on patches from
3189 * configure.in: Add AC_ARG_ENABLE for shared and commonbfdlib.
3190 New substitutions: ALLLIBS, PICFLAG, SHLIB, SHLIB_CC,
3191 SHLIB_CFLAGS, COMMON_SHLIB, SHLINK.
3192 * configure: Rebuild.
3193 * Makefile.in (ALLLIBS): New variable.
3194 (PICFLAG, SHLIB, SHLIB_CC, SHLIB_CFLAGS): New variables.
3195 (COMMON_SHLIB, SHLINK): New variables.
3196 (.c.o): If PICFLAG is set, compile twice, once PIC, once normal.
3197 (STAGESTUFF): Remove variable.
3198 (all): Depend upon $(ALLLIBS) rather than $(TARGETLIB).
3199 (stamp-piclist, piclist): New targets.
3200 ($(SHLIB), $(SHLINK)): New targets.
3201 ($(OFILES)): Depend upon stamp-picdir.
3202 (disassemble.o): Build twice if PICFLAG is set.
3203 (MOSTLYCLEAN): Add pic/*.o.
3204 (clean): Remove $(SHLIB), $(SHLINK), piclist, and stamp-piclist.
3205 (distclean): Remove pic and stamp-picdir.
3206 (install): Install shared libraries.
3207 (stamp-picdir): New target.
3211 * sparc-dis.c (print_insn_sparc): Delete DISASM_RAW_INSN support.
3212 Print unknown instruction as "unknown", rather than in hex.
3216 * dis-buf.c: Include "sysdep.h" before "dis-asm.h".
3220 * sparc-opc.c (sparc_opcode_archs): Mark v8/sparclite as conflicting.
3224 * i386-dis.c (print_insn_i386): Only fetch the mod/reg/rm byte
3225 when necessary. From Ulrich Drepper
3230 * sparc-dis.c (print_insn_sparc): NUMOPCODES replaced with
3231 sparc_num_opcodes. Update architecture enum values.
3232 * sparc-opc.c (sparc_opcode_archs): Replaces architecture_pname.
3233 (sparc_opcode_lookup_arch): New function.
3234 (sparc_num_opcodes): Renamed from bfd_sparc_num_opcodes.
3235 (sparc_opcodes): Add v9a shutdown insn.
3239 * sparc-dis.c (print_insn_sparc): Renamed from print_insn.
3240 If DISASM_RAW_INSN, print insn in hex. Handle v9a as opcode
3242 (print_insn_sparc64): Deleted.
3243 * disassemble.c (disassembler, case bfd_arch_sparc): Always use
3246 * sparc-opc.c (architecture_pname): Add v9a.
3250 * alpha-opc.h (alpha_insn_set): VAX floating point opcode was
3251 incorrectly defined as 0x16 when it should be 0x15.
3252 (FLOAT_FORMAT_MASK): function code is 11 bits, not just 7 bits!
3253 (alpha_insn_set): added cvtst and cvttq float ops. Also added
3254 excb (exception barrier) which is defined in the Alpha
3255 Architecture Handbook version 2.
3256 * alpha-dis.c (print_insn_alpha): Fixed special-case decoding for
3257 OPERATE_FORMAT_CODE type instructions. The bug caused mulq to be
3258 disassembled as or, for example.
3262 * mips-dis.c (print_insn_arg): Print cases 'i' and 'u' in hex.
3263 (_print_insn_mips): Change i from int to unsigned int.
3267 * ppc-opc.c (powerpc_opcodes): tlbi POWER opcode form different
3268 from tlbie PowerPC opcode. Add PPC603 tlbld and tlbli.
3272 * i386-dis.c: Added Pentium Pro instructions.
3276 * ppc-opc.c (fsqrt{,.}): Duplicate for PowerPC in addition to
3281 * sh-opc.h (sh_nibble_type): Added REG_B.
3282 (sh_arg_type): Added A_REG_B.
3283 (sh_table): Added pref and bank reg versions of ldc, ldc.l, stc
3285 * sh-dis.c (print_insn_shx): Added cases for REG_B and A_REG_B.
3289 * disassemble.c (disassembler): Use new bfd_big_endian macro.
3293 * Makefile.in (distclean): Remove stamp-h. From Ronald
3299 * alpha-dis.c (print_insn_alpha): fixed decoding of cpys
3304 * sh-opc.h (sh_arg_type): Added A_SSR and A_SPC.
3305 (sh_table): Added many SH3 opcodes.
3306 * sh-dis.c (print_insn_shx): Added cases for A_SSR and A_SPC.
3310 * ppc-opc.c (subfc., subfco): Mark this PPCCOM, not PPC.
3311 (subco,subco.): Mark this PPC, not PPCCOM.
3315 * configure: Rebuild with autoconf 2.7.
3319 * configure: Rebuild with autoconf 2.6.
3323 * configure.in: Sort list of architectures. Accept but do nothing
3324 for alliant, convex, pyramid, romp, and tahoe.
3328 * a29k-dis.c (print_special): Change num to unsigned int.
3332 * a29k-dis.c (print_insn): Cast insn24 to unsigned long when
3337 * configure.in: Call AC_CHECK_PROG to find and cache AR.
3338 * configure: Rebuilt.
3342 * configure.in: Add case for bfd_i860_arch.
3343 * configure: Rebuild.
3347 * m68k-opc.c (m68k_opcodes): Correct fmoveml operands.
3348 * m68k-dis.c (NEXTSINGLE): Change i to unsigned int.
3349 (NEXTDOUBLE): Likewise.
3350 (print_insn_m68k): Don't match fmoveml if there is more than one
3351 register in the list.
3352 (print_insn_arg): Handle a place of '8' for a type of 'L'.
3356 * m68k-opc.c: Use #W rather than #w.
3357 * m68k-dis.c (print_insn_arg): Handle new 'W' place.
3361 * m68k-opc.c (m68k_opcode_aliases): Add dbfw as an alias for dbf,
3362 and likewise for all the dbxx opcodes.
3366 * arc-dis.c: Include elf-bfd.h rather than libelf.h.
3370 * mips-opc.c: Added shorthand (V1) for INSN_4100 manifest. Added
3371 the VR4100 specific instructions to the mips_opcodes structure.
3375 * mpw-config.in, mpw-make.sed: Remove ugly workaround for
3376 ugly Metrowerks bug in CW6, is fixed in CW7.
3380 * ppc-opc.c (whole file): Add flags for common/any support.
3384 * Makefile.in (BISON): Remove macro.
3385 (FLAGS_TO_PASS): Remove BISON.
3391 * m68k-dis.c (print_insn_m68k): Recognize all two-word
3392 instructions that take no args by looking at the match mask.
3393 (print_insn_arg): Always print "%" before register names.
3394 [case 'c']: Use "nc" for the no-cache case, as recognized by gas.
3395 [case '_']: Don't print "@#" before address.
3396 [case 'J']: Use "%s" as format string, not register name.
3397 [case 'B']: Treat place == 'C' like 'l' and 'L'.
3401 * i386-dis.c: Describe cmpxchg8b operand, and spell the opcode
3408 * alpha-opc.h (MEMORY_FUNCTION_FORMAT_MASK): added.
3409 (alpha_insn_set): added definitions for VAX floating point
3410 instructions (Unix compilers don't generate these, but handcoded
3411 assembly might still use them).
3413 * alpha-dis.c (print_insn_alpha): added support for disassembling
3414 the miscellaneous instructions in the Alpha instruction set.
3418 * mpw-config.in: Add m68k-opc.c.o to BFD_MACHINES for m68k,
3419 no longer create sysdep.h, sed ppc-opc.c to work around a
3420 serious Metrowerks C bug.
3421 * mpw-make.in: Remove.
3422 * mpw-make.sed: New file, used by mpw-configure to edit
3423 Makefile.in into an MPW makefile.
3427 * Makefile.in (maintainer-clean): New synonym for realclean.
3431 * m68k-opc.c: Split pmove patterns which use 'P' into patterns
3432 which use '0', '1', and '2' instead. Specify the proper size for
3433 a pmove immediate operand. Correct the pmovefd patterns to be
3434 moves to a register, not from a register.
3435 * m68k-dis.c (print_insn_arg): Replace 'P' with '0', '1', '2'.
3439 * sparc-opc.c (sparc_opcodes): Mark all insns that reference
3440 %psr, %wim, %tbr as F_NOTV9.
3444 * Makefile.in (Makefile): Just rebuild Makefile when running
3446 (config.h, stamp-h): New targets.
3447 * configure.in: Call AC_CONFIG_HEADER and AC_CANONICAL_SYSTEM
3448 earlier. Don't bother to call AC_ARG_PROGRAM. Touch stamp-h when
3449 rebuilding config.h.
3450 * configure: Rebuild.
3452 * mips-opc.c: Change unaligned loads and stores with "t,A"
3453 operands to use "t,A(b)".
3457 * sh-dis.c (print_insn_shx): Add F_FR0 support.
3461 * sh-dis.c (print_insn_shx): Change loop over op->arg[n] to iterate
3462 until 3 instead of until 2.
3466 * Makefile.in (ALL_CFLAGS): Define.
3467 (.c.o, disassemble.o): Use $(ALL_CFLAGS).
3468 (MOSTLYCLEAN): Add config.log.
3469 (distclean): Don't remove config.log.
3470 * configure.in: Substitute HDEFINES.
3471 * configure: Rebuild.
3475 * sh-opc.h (sh_arg_type): Add F_FR0.
3476 (sh_table, case fmac): Add F_FR0 as first argument.
3480 * sh-opc.h (sh_opcode_info): Increase arg array size to 4.
3484 * sparc-dis.c: Remove all references to NO_V9.
3488 * aclocal.m4: Just include ../bfd/aclocal.m4.
3489 * configure: Rebuild.
3493 * sparc-dis.c (X_DISP19): Define.
3494 (print_insn, case 'G'): Use it.
3495 (print_insn, case 'L'): Sign extend displacement.
3499 * configure.in: Run ../bfd/configure.host before AC_PROG_CC.
3500 Subsitute CFLAGS and AR. Call AC_PROG_INSTALL. Don't substitute
3501 host_makefile_frag or frags.
3502 * aclocal.m4: New file.
3503 * configure: Rebuild.
3504 * Makefile.in (INSTALL): Set to @INSTALL@.
3505 (INSTALL_PROGRAM): Set to @INSTALL_PROGRAM@.
3506 (INSTALL_DATA): Set to @INSTALL_DATA@.
3508 (AR_FLAGS): Set to rc rather than qc.
3509 (CC): Define as @CC@.
3510 (CFLAGS): Set to @CFLAGS@.
3511 (@host_makefile_frag@): Remove.
3512 (config.status): Remove dependency upon @frags@.
3514 * configure.in: ../bfd/config.bfd now just sets shell variables.
3515 Use them rather than looking through target Makefile fragments.
3516 * configure: Rebuild.
3520 * sh-opc.h (ftrc): Change FPUL_N to FPUL_M.
3524 * sparc-opc.c (sparc_opcodes): Delete duplicate wr %y insn.
3525 Add clrx, iprefetch, signx, clruw, cas, casl, casx, casxl synthetic
3528 * sparc-opc.c (sparc_opcodes): Fix prefetcha insn.
3529 (lookup_{name,value}): New functions.
3530 (prefetch_table): New static local.
3531 (sparc_{encode,decode}_prefetch): New functions.
3532 * sparc-dis.c (print_insn): Handle '*' arg (prefetch function).
3536 * sh-opc.h: Add blank lines to improve readabililty of sh3e
3541 * sh-dis.c: Correct comment on first line of file.
3545 * disassemble.c (disassembler): Handle bfd_mach_sparc64.
3547 * sparc-opc.c (asi, membar): New static locals.
3548 (sparc_{encode,decode}_{asi,membar}): New functions.
3549 (sparc_opcodes, membar insn): Fix.
3550 * sparc-dis.c (print_insn): Call sparc_decode_asi.
3551 Support decoding of membar masks.
3556 * m68k-opc.c (m68k_opcode_aliases): Add br, brs, brb, brw, brl.
3560 * m68k-opc.c (m68k_opcode_aliases): Add bhib as an alias for bhis,
3561 and likewise for the other branches. Add bhs as an alias for bcc,
3562 and likewise for the size variants. Add dbhs as an alias for
3567 * sh-opc.h (FP sts instructions): Update to match reality.
3571 * m68k-dis.c: (fpcr_names): Add % before all register names.
3572 (reg_names): Likewise.
3573 (print_insn_arg): Don't explicitly print % before register names.
3574 Add % before register names in static array names. In case 'r',
3575 print data registers as `@(Dn)', not `Dn@'. When printing a
3576 memory address, don't print @# before it.
3577 (print_indexed): Change base_disp and outer_disp from int to
3578 bfd_vma. Print using MIT syntax, not mutant invalid Motorola
3579 syntax. Sign extend 8 byte displacement correctly.
3580 (print_base): Print using MIT syntax. Print zpc when appropriate.
3581 Change parameter disp from int to bfd_vma.
3583 * m68k-opc.c (m68k_opcode_aliases): Add jsrl and jsrs as aliases
3588 * sh-dis.c (print_insn_shx): Handle new operand types F_REG_N,
3589 F_REG_M, FPSCR_M, FPSCR_N, FPUL_M and FPUL_N.
3590 * sh-opc.h (sh_arg_type): Add new operand types.
3591 (sh_table): Add new opcodes from SH3E Floating Point ISA.
3595 * Makefile.in (distclean): Remove generated file config.h.
3599 * Makefile.in (distclean): Remove generated file config.h.
3603 * m68k-opc.c: New file, holding tables from include/opcode/m68k.h.
3605 * m68k-dis.c: Remove BREAK_UP_BIG_DECL stuff.
3607 (print_insn_m68k): Change d to be const. Use m68k_numopcodes
3608 rather than numopcodes. Use m68k_opcodes rather than removed
3609 opcode function. Don't check F_ALIAS.
3610 (print_insn_arg): Change first parameter to be const char *.
3611 * Makefile.in (ALL_MACHINES): Add m68k-opc.o.
3612 (m68k-opc.o): New target.
3613 * configure.in: Build m68k-opc.o for bfd_m68k_arch.
3614 * configure: Rebuild.
3618 * sparc-dis.c (HASH_SIZE, HASH_INSN): Define.
3619 (opcode_bits, opcode_hash_table): New variables.
3620 (opcodes_initialized): Renamed from opcodes_sorted.
3621 (build_hash_table): New function.
3622 (is_delayed_branch): Use hash table.
3623 (print_insn): Renamed from print_insn_sparc, made static.
3624 Build and use hash table. If !sparc64, ignore sparc64 insns,
3625 and vice-versa if sparc64.
3626 (print_insn_sparc, print_insn_sparc64): New functions.
3627 (compare_opcodes): Move sparc64 opcodes to end.
3628 Print commutative insns with constant second.
3629 * sparc-opc.c (all non-v9 insns): Use flag F_NOTV9 instead of F_ALIAS.
3633 * sh-dis.c (print_insn_shx): Remove unused local dslot. Use
3634 print_address_func for A_BDISP12 and A_BDISP8. Correct test which
3635 avoids printing a delay slot in a delay slot.
3636 * sh-opc.h (sh_table): Fully bracket last entry.
3640 * sparc-opc.c (sllx, srax, srlx): Fix disassembly.
3644 * configure.in: Get host_makefile_frag from ${srcdir}.
3646 * configure.in: Autoconfiscated. Check for string[s].h. Create
3647 config.h from config.in. Don't set up sysdep.h link.
3648 * sysdep.h: New file.
3649 * configure, config.in: New files, generated from configure.in.
3650 * Makefile.in: Updated to be processed autoconf-style.
3651 (distclean): Keep sysdep.h. Remove config.log and config.cache.
3652 (Makefile): Depend on config.status.
3653 (config.status): New rule.
3654 * configure.bat: Update Makefile substitutions.
3658 * mips-opc.c (L1): Define.
3659 (mips_opcodes): Add R4010 instructions: flushi, flushd, flushid,
3660 addciu, madd, maddu, ffc, ffs, msub, msubu, selsi, selsr, waiti,
3665 * mips-opc.c (mips_opcodes): For the move pseudo-op, prefer daddu
3666 if ISA 3 and addu otherwise, replacing or, since some MIPS chips
3667 have multiple add units but only a single logical unit.
3669 * ppc-opc.c (powerpc_operands): Change CR to use a bitsize of 3,
3670 shifted by 18, without any insertion or extraction function.
3671 (insert_cr, extract_cr): Remove.
3675 * m68k-dis.c (print_insn_arg, print_indexed): Print "%" before
3680 * mpw-config.in: Add sh and i386 configs, remove sparc config.
3681 * sh-opc.h: Add copyright.
3685 * Makefile.in (crunch-m68k): Delete extra target accidentally
3686 checked in a while ago.
3690 * sh-opc.h (sh_table): Add SH3 support.
3694 * sh-opc.h: Added bsrf and braf.
3698 * arm-opc.h (arm_opcodes): Add 64-bit multiply patterns. Delete
3699 bogus [ls]fm{ea,fd} patterns.
3701 * arm-opc.h (arm_opcodes): Correct typos in stm, ldm, std, and ldc.
3702 * arm-dis.c (print_insn_arm): Make GIVEN a parameter, don't try and
3703 initialize it from memory. Make function static.
3704 (print_insn_{big,little}_arm): New functions.
3705 * disassemble.c (disassembler, case bfd_arch_arm): Disassemble for
3706 the correct endianness.
3710 * sh-opc.h (sh_nibble_type, sh_arg_type): remove trailing , from
3715 * m68k-dis.c (opcode): Finish change made by Kung Hsu on April
3716 17th, so that it builds again using GCC as the compiler.
3720 * mips-dis.c (print_insn_little_mips): Cast return value from
3721 bfd_getl32 from bfd_vma to unsigned long, because _print_insn_mips
3722 expects an unsigned long, and that might be fewer words of
3723 argument storage (e.g., if bfd_vma is long long on a 32-bit
3725 (print_insn_big_mips): Likewise with bfd_getb32 value.
3726 (_print_insn_mips): Now static.
3730 * m68k-dis.c: Take out #define BREAK_UP_BIG_DECL kludge, because
3731 gcc memory hog problem with initializer is fixed.
3735 Merge in support for Mac MPW as a host.
3736 (Old change descriptions retained for informational value.)
3738 * mpw-config.in (archname): Compute from the config.
3739 (BFD_MACHINES, ARCHDEFS): Put into mk.tmp.
3741 * mpw-config.in (target_arch): Compute from canonical target.
3742 (m68k, mips, powerpc, sparc): Add architectures.
3743 * mpw-make.in (disassemble.c.o): Add.
3744 (ALL_CFLAGS): Remove special flags (-mc68020 -mc68881 -model far).
3746 * mpw-config.in (BFD_MACHINES): Set to a default value.
3747 * mpw-make.in (BFD_MACHINES): Remove wired-in value.
3749 * mpw-make.in (CSEARCH): Add extra-include to search path.
3751 * mpw-config.in (varargs.h): Don't create.
3752 (sysdep.h): Create using forward-include.
3753 * mpw-make.in (CSEARCH): Add include/mpw to search path.
3755 * mpw-config.in: New file, MPW version of configure.in.
3756 * mpw-make.in: New file, MPW version of Makefile.in.
3760 * alpha-dis.c (print_insn_alpha): Put empty statement after
3765 * hppa-dis.c (sign_extend): Delete, redundant with libhppa.h version.
3766 (low_sign_extend): Likewise.
3767 (get_field): Delete unused function.
3768 (set_field, deposit_14, deposit_21): Likewise.
3772 * i386-dis.c: Support for more pentium opcodes. From Guy Harris
3779 * alpha-opc.h (OSF_ASMCODE): define
3780 print pal-code names as defined in App C of the
3781 Alpha Architecture Reference Manual
3783 * alpha-dis.c: cleaned up output
3784 print stylized code forms as defined in App A.4.3 of the
3785 Alpha Architecture Reference Manual
3789 * mips-opc.c: Add new mips4 instructions. Don't set INSN_RFE for
3791 * mips-dis.c (print_insn_arg): Handle new argument types 'h', 'R',
3796 * m68k-dis.c (opcode): New function. Returns address of opcode
3797 table entry given index, even if the opcode table was split to
3798 work around gcc bugs.
3799 (print_insn_m68k): Call opcode instead of referencing m68k_opcodes
3801 (BREAK_UP_BIG_DECL): Make secondary array static and const.
3802 (reg_names): Now const.
3803 (print_insn_arg): Arrays cacheFieldName and names now const.
3804 (print_indexed): Array scales now const.
3808 * ppc-opc.c: Sort recently added instructions by minor opcode
3809 number within major opcode number.
3813 * hppa-dis.c: Include libhppa.h.
3817 * mips-opc.c: Change dli to use M_DLI, and add dla.
3821 * Makefile.in (ALL_MACHINES): Add w65-dis.o.
3825 * mips-opc.c: Add r4650 mul instruction.
3829 * mips-opc.c: Add uld and usd macros for unaligned double load and
3834 * ppc-opc.c (powerpc_opcodes): Add 403GA opcodes rfci, dccci,
3835 mfdcr, mtdcr, icbt, iccci.
3839 * i960-dis.c (struct tabent, struct sparse_tabent): Change the
3840 signed char fields to shorts, more portable.
3844 * i960-dis.c (struct tabent, struct sparse_tabent): Declare the
3845 char fields as signed chars, since they may have negative values.
3849 * i386-dis.c (dis386_twobyte): Add cpuid, From Charles Hannum
3855 * ppc-opc.c (extract_bdm): Correct parenthezisation.
3856 * ppc-dis.c (print_insn_powerpc): Print .long before unrecognized
3861 * ppc-opc.c: Changes based on patch from David Edelsohn
3863 (powerpc_operands): Add operands SPRBAT and SPRG. Split TBR out of
3866 (insert_tbr): New static function.
3867 (extract_tbr): New static function.
3868 (XFXFXM_MASK, XFXM): Define.
3869 (XSPRBAT_MASK, XSPRG_MASK): Define.
3870 (powerpc_opcodes): Add instructions to access special registers by
3871 name. Add mtcr and mftbu.
3875 * mips-opc.c (P3): Define.
3876 (mips_opcodes): Add mad and madu.
3878 Sun Jan 15 16:32:59 1995 Steve Chamberlain <sac@splat>
3880 * configure.in: Add W65 support.
3881 * disassemble.c: Likewise.
3882 * w65-opc.h, w65-dis.c: New files.
3886 * h8300-dis.c (bfd_h8_disassemble): Add support for 2 bit
3891 * mips-opc.c: Add dli as a synonym for li.
3895 * alpha-dis.c (print_insn_alpha): Handle call_pal instruction, and
3896 print something for reserved opcode values, even if it won't
3899 * mips-dis.c (_print_insn_mips): When initializing, shift right
3900 and mask, to avoid sign extension problems on the Alpha.
3902 * m68k-dis.c (print_insn_arg, case 'J'): Handle buscr and pcr
3907 * sh-opc.h (mov.l gbr): Get direction right.
3908 * sh-dis.c (print_insn_shx): New function.
3909 (print_insn_shl, print_insn_sh): Call print_insn_shx to
3910 print opcodes with right byte order.
3914 * ns32k-dis.c (struct ns32k_option): Renamed from struct option,
3915 to avoid conflicts with getopt.
3919 * hppa-dis.c (print_insn_hppa): Read the instruction using
3920 bfd_getb32, so that it works on a little endian or 64 bit host.
3921 Remove unused local variable op.
3925 * mips-opc.c: Use or instead of addu for pseudo-op move, since
3926 addu does not work correctly if -mips3.
3930 * a29k-dis.c (print_special): Add special register names defined
3931 on 29030, 29040 and 29050.
3932 (print_insn): Handle new operand type 'I'.
3936 * Makefile.in (INSTALL): Use top level install.sh script.
3940 * sparc-dis.c: Rewrite to use bitfields, rather than a union, so
3941 that it works on a little endian host.
3945 * configure.in: Use ${config_shell} when running config.bfd.
3949 * mips-opc.c (mips_opcodes): "dabs" is only available with -mips3.
3953 * a29k-dis.c (print_insn): Print the opcode.
3957 * mips-opc.c (mips_opcodes): Set WR_t for sc and scd.
3961 * hppa-dis.c (reg_names): Use r26-r23 for arg0-arg3.
3965 * mips-opc.c: Set INSN_STORE_MEMORY flag for all instructions
3966 which store a value into memory.
3970 * configure.in, Makefile.in, disassemble.c: Add support for the ARM.
3971 * arm-dis.c, arm-opc.h: New files.
3975 * Makefile.in (ns32k-dis.o): Add dependency.
3976 * ns32k-dis.c (print_insn_arg): Declare initialized local as
3977 string, not as array of chars.
3981 * sparc-dis.c (print_insn_sparc): Handle new operand type 'x'.
3983 * sparc-opc.c: Added sparclite extended FP operations, and
3984 versions of v9 impdep* instructions permitting specification of
3989 * i960-dis.c (reg_names): Now const.
3990 (struct sparse_tabent): New type, copied from array type in mem
3992 (ctrl): Local static array ctrl_tab now const.
3993 (cobr): Local static array cobr_tab now const.
3994 (mem): Local variables reg1, reg2, reg3 now point to const. Local
3995 static variable mem_tab no longer explicitly initialized. Changed
3996 mem_init to const array of struct sparse_tabent.
3997 (reg): Local static variable reg_tab no longer explicitly
3998 initialized. Changed reg_init to const array of struct
4000 (ea): Local static array scale_tab now const.
4002 * i960-dis.c (reg): Added i960JX instructions to reg_init table.
4007 * configure.bat: the disassember needs to be enabled for
4008 "objdump -d" to work in djgpp.
4012 * ns32k-dis.c: Deleted all code in "#ifdef GDB".
4013 (invalid_float): Enabled general version, doesn't require running
4014 on ns32k host. Changed to take char* argument, and test for
4015 explicitly specified sizes, instead of using sizeof() on host CPU
4017 (INVALID_FLOAT): Cast first argument.
4018 (opt_u, opt_U, opt_O, opt_C, opt_S, list_P532, list_M532,
4019 list_P032, list_M032): Now const.
4020 (optlist, list_search): Made appropriate arguments now point to
4022 (print_insn_arg): Changed static array of one-character-string
4023 pointers into a static const array of characters; fixed sprintf
4024 statement accordingly.
4028 * opcodes/ns32k-dis.c: Semi-new file. Had apparently been dropped
4029 from distribution. A ns32k-dis.c from a previous distribution has
4030 been brought up to date and supports the new interface.
4032 * disassemble.c: define ARCH_ns32k and add case bfd_arch_ns32k.
4034 * configure.in: add bfd_ns32k_arch target support.
4036 * Makefile.in: add ns32k-dis.o to ALL_MACHINES.
4037 Add ns32k-dis.c to CFILES. Add dependencies for ns32k-dis.o.
4041 * h8300-dis.c (bfd_h8_disassemble): Get 16bit branch
4046 * h8300-dis.c, mips-dis.c: Don't use true and false.
4050 * configure.in: Change --with-targets to --enable-targets.
4054 * mips-dis.c (_print_insn_mips): Build a static hash table mapping
4055 opcodes to the first instruction with that opcode, to speed
4061 * Makefile.in (mostlyclean): Fix typo (was mostyclean).
4065 * configure.bat: update to latest makefile.in
4069 * a29k-dis.c (print_insn): Print 'x' type operand in hex.
4070 * h8300-dis.c (bfd_h8_disassemble): Print 16bit rels correctly.
4071 * sh-dis.c (print_insn_sh): Don't recur endlessly if delay
4072 slot insn is in a delay slot.
4073 * z8k-opc.h: (resflg): Fix patterns.
4074 * h8500-opc.h Fix CR insn patterns.
4078 * ppc-opc.c (powerpc_opcodes): Put PowerPC versions of "cmp" and
4079 "cmpl" before POWER versions, so that gas -many uses them.
4083 * disassemble.c: New file.
4084 * Makefile.in (OFILES): Add disassemble.o.
4085 (disassemble.o): Provide dependencies; compile with $(ARCHDEFS).
4086 * configure.in: Define ARCHDEFS in Makefile. Code taken from
4087 binutils/configure.in.
4089 * m68k-dis.c (print_insn_m68k): If F_ALIAS flag is set, skip the
4090 opcode being examined.
4094 * ppc-opc.c (powerpc_operands): Added RAL, RAM and RAS.
4095 (insert_ral, insert_ram, insert_ras): New functions.
4096 (powerpc_opcodes): Use RAL for load with update, RAM for lmw, and
4097 RAS for store with update.
4101 * ppc-opc.c (powerpc_opcodes): Correct fcir. From David Edelsohn
4106 * mips-opc.c (mips_opcodes): Correct operands of "nor" with an
4111 * sparc-opc.c (sparc_opcodes): Fix "rd %fprs,%l0".
4115 * ppc-opc.c (powerpc_operands): The signedp field has been
4116 removed, so don't initialize it. Set the PPC_OPERAND_SIGNED flag
4117 instead. Add new operand SISIGNOPT.
4118 (powerpc_opcodes): For lis, liu, addis, and cau use SISIGNOPT.
4120 * ppc-dis.c (print_insn_powerpc): Check PPC_OPERAND_SIGNED rather
4125 * i386-dis.c (struct private): Renamed to dis_private. `private'
4126 is a reserved word for dynix cc.
4130 * configure.in: Change error message to refer to bfd/config.bfd
4131 rather than bfd/configure.in.
4135 * ppc-opc.c: Define POWER2 as short alias flag.
4136 (powerpc_opcodes): Add POWER/2 opcodes lfq*, stfq*, fcir[z], and
4141 * i960-dis.c (print_insn_i960): Don't read a second word for
4142 opcodes 0, 1, 2 and 3.
4146 * configure.in: Don't build m68881-ext.o for bfd_m68k_arch.
4150 * m68881-ext.c: Removed; no longer used.
4151 * Makefile.in: Changed accordingly.
4153 * m68k-dis.c (ext_format_68881): Don't declare.
4154 (print_insn_m68k): If an instruction uses place 'i', it uses at
4155 least four fixed bytes.
4156 (print_insn_arg): Don't bump p by 2 for case 'I', place 'i'. For
4157 extended float, convert to double using floatformat_to_double, not
4158 ieee_extended_to_double, and fetch the data before converting it.
4162 * mips-opc.c: It's sqrt.s, not sqrt.w. From
4167 * ppc-opc.c (powerpc_opcodes): The POWER uses bdn[l][a] where the
4168 PowerPC uses bdnz[l][a].
4172 * dis-buf.c, i386-dis.c: Include sysdep.h.
4176 * configure.in (bfd_powerpc_arch): Use ppc-dis.o and ppc-opc.o.
4178 * ppc-opc.c (powerpc_opcodes): Mark POWER instructions supported
4179 by Motorola PowerPC 601 with PPC_OPCODE_601.
4180 * ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc):
4181 Disassemble Motorola PowerPC 601 instructions as well as normal
4182 PowerPC instructions.
4186 * i960-dis.c (reg, mem): Just use a static array instead of
4191 * hppa-dis.c (print_insn_hppa): For '?' and '@' only adjust the
4192 condition name index if this is for a negated condition.
4194 * hppa-dis.c (print_insn_hppa): No space before 'H' operand.
4195 Floating point format for 'H' operand is backwards from normal
4196 case (0 == double, 1 == single). For '4', '6', '7', '9', and '8'
4197 operands (fmpyadd and fmpysub), handle bizarre register
4198 translation correctly for single precision format.
4200 * hppa-dis.c (print_insn_hppa): Do not emit a space after 'F'
4201 or 'I' operands if the next format specifier is 'M' (fcmp
4202 condition completer).
4206 * ppc-opc.c (powerpc_operands): New operand type MBE to handle a
4207 single number giving a bitmask for the MB and ME fields of an M
4208 form instruction. Change NB to accept 32, and turn it into 0;
4209 also turn 0 into 32 when disassembling. Seperated SH from NB.
4210 (insert_mbe, extract_mbe): New functions.
4211 (insert_nb, extract_nb): New functions.
4212 (SC_MASK): Mask out SA and LK bits.
4213 (powerpc_opcodes): Change "cal" to use RT, D, RA rather than RT,
4214 RA, SI. Change "liu" and "cau" to use UI rather than SI. Mark
4215 "bctr" and "bctrl" as accepted by POWER. Change "rlwimi",
4216 "rlimi", "rlwimi.", "rlimi.", "rlwinm", "rlinm", "rlwinm.",
4217 "rlinm.", "rlmi", "rlmi.", "rlwnm", "rlnm", "rlwnm.", "rlnm." to
4218 use MBE rather than MB. Add "mfmq" and "mtmq" POWER instructions.
4219 (powerpc_macros): Define table of macro definitions.
4220 (powerpc_num_macros): Define.
4222 * ppc-dis.c (print_insn_powerpc): Don't skip optional operands
4223 if PPC_OPERAND_NEXT is set.
4227 * i960-dis.c (print_insn_i960): Make buffer bfd_byte instead of
4228 char. Retrieve contents using bfd_getl32 instead of shifting.
4232 * ppc-opc.c: New file. Opcode table for PowerPC, including
4233 opcodes for POWER (RS/6000).
4234 * ppc-dis.c: New file. PowerPC and Power (RS/6000) disassembler.
4235 * Makefile.in (ALL_MACHINES): Add ppc-dis.o and ppc-opc.o.
4236 (CFILES): Add ppc-dis.c.
4237 (ppc-dis.o, ppc-opc.o): New targets.
4238 * configure.in: Build ppc-dis.o and ppc-opc.o for bfd_rs6000_arch.
4242 * hppa-dis.c (print_insn_hppa): Handle 'N' in assembler template.
4243 No space before 'u', 'f', or 'N'.
4247 * i386-dis.c (print_insn_i386): Add FIXME comment regarding reading
4248 farther than we should.
4250 * i386-dis.c (dis386): Use Yb and Yv for scasb and scasS.
4254 * sparc-dis.c m68k-dis.c alpha-dis.c a29k-dis.c: Fix comments.
4258 * i960-dis.c (print_insn_i960): Only read word2 if the instruction
4259 needs it, to prevent reading past the end of a section.
4263 * mips-opc.h: Use macro for j instruction, to support SVR4 PIC.
4264 Removed t,A case for la; always use t,A(b) case.
4269 * mips-dis.c (print_insn_arg): Handle 'k'.
4270 * mips-opc.c: Make cache use k, not t.
4274 * alpha-opc.h, alpha-dis.c (print_insn_alpha): Add
4275 FLOAT_MEMORY_FORMAT_CODE, FLOAT_BRANCH_FORMAT_CODE, correct
4276 FLOAT_FORMAT_CODE to put out floating point register names.
4280 * mips-opc.c: Use macros for jal variants, to support SVR4 PIC.
4284 * a29k-dis.c (print_insn): Use 0x%08x, not 0x%8x.
4288 * mips-opc.c (dsll, dsra, dsrl): Added '>' cases for shift counts
4289 larger than 32. Moved dsxx32 variants first for disassembler.
4293 * z8kgen.c, z8k-opc.h: Add full lda information.
4297 * hppa-dis.c (print_insn_hppa): Do not emit a space after
4298 movb instructions. Any necessary space will be emitted by
4299 the code to handle nullification completers.
4303 * mips-opc.c: Moved l.d down so that it disassembles as ldc1.
4307 * alpha-opc.h: Add ldl_l, fix typo for ldq_u.
4308 * alpha-dis.c (print_insn_alpha): Add code for PAL_FORMAT_CODE.
4312 * mips-opc.c: Correct lwu opcode value (book had it wrong).
4316 * z8k-dis.c (FETCH_DATA): get just the right amount of data.
4317 (unpack_instr): Cope with ARG_IMM4M1 type instructions.
4321 * m88k-dis.c (m88kdis): comment change. Remove space after
4323 (printop): handle new arg types DEC and XREG for m88110.
4327 * hppa-dis.c (print_insn_hppa): Handle 'z' operand
4328 type for absolute branch addresses. Delete special
4329 "ble" and "be" code in 'W' operand code.
4333 * mips-opc.c: Set hazard information correctly for branch
4334 likely instructions.
4338 * alpha-dis.c (print_insn_alpha), alpha-opc.h: Fix bugs, use
4339 info->fprintf_func for printing and info->print_address_func for
4344 * mips-opc.c: Set INSN_TRAP for tXX instructions.
4349 Corrected second case of "b" for disassembler.
4353 * mips-dis.c, m88k-dis.c: Don't include libbfd.h. Changed calls
4354 to BFD swapping routines to correspond to BFD name changes.
4358 * mips-opc.c: Change div machine instruction to be z,s,t rather
4359 than s,t. Change div macro to be d,v,t rather than d,s,t.
4360 Likewise for divu, ddiv, ddivu. Added z,s,t case for drem, dremu,
4361 rem and remu which generates only the corresponding div
4362 instruction. This is for compatibility with the MIPS assembler,
4363 which only generates the simple machine instruction when an
4364 explicit destination of $0 is used.
4365 * mips-dis.c (print_insn_arg): Handle 'z' (always register zero).
4370 WR_31 hazard for bal, bgezal, bltzal.
4374 * hppa-dis.c (print_insn_hppa): Use print function
4375 from within the disassemble_info, not fprintf_filtered.
4379 * hppa-dis.c (print_insn_hppa): Handle '|' like '>'. (From Jeff
4384 * mips-opc.c ("absu"): Removed.
4389 * mips-opc.c: Added r6000 and r4000 instructions and macros.
4390 Changed hazard information to distinguish between memory load
4391 delays and coprocessor load delays.
4395 * mips-opc.c: li.d uses "T,L", not "S,F". Added li.s.
4399 * configure.in: Don't pass cpu to config.bfd.
4403 * m88k-dis.c (m88kdis): Make class unsigned.
4407 * alpha-dis.c (print_insn_alpha): One branch format case was
4408 missing the instruction name.
4412 * Makefile.in (ALL_MACHINES): Renamed from DIS_LIBS.
4413 Add the arch-specific auxiliary files.
4414 (OFILES): Remove the arch-specific auxiliary files
4415 and use BFD_MACHINES instead of DIS_LIBS.
4416 * configure.in: Set BFD_MACHINES based on --with-targets option.
4420 * mips-opc.c: Added lwc1 E,A(b) to go with lwc1 T,A(b). Similarly
4425 * sparc-opc.c: Change CONST to const to deal with gcc
4426 -Dconst=__const -traditional.
4431 coprocessor instructions out of #if 0, and made them use new
4436 * sparc-dis.c: Include ansidecl.h before opcodes/sparc.h.
4440 * sparc-opc.c: Add F_JSR, F_UNBR, or F_CONDBR flags to each branch
4441 instruction, for use by the disassembler.
4443 * sparc-dis.c (SEX): Add sign extension macro. Replace many
4444 hand-coded sign extensions that depended on 32-bit host ints.
4445 FIXME, we still depend on big-endian host bitfield ordering.
4446 (sparc_print_insn): Set the insn_info_valid field, and the
4447 other fields that describe the instruction being printed.
4451 * sparc-opc.c (call): Accept all 6 addressing modes valid for
4452 `jmp' instead of just one of them.
4456 * hppa-dis.c: Move floating registers from reg_names to fp_reg_names.
4457 (fput_fp_reg_r): Renamed from fput_reg_r.
4458 (fput_fp_reg): New function.
4459 (print_insn_hppa): Use fput_fp_reg{,_r} where appropriate.
4461 * hppa-dis.c (print_insn_hppa, cases 'a', 'd'): Print space afterwards.
4463 * hppa-dis.c (print_insn_hppa, case 'd'): Use GET_COND not GET_FIELD.
4467 * hppa-dis.c (print_insn_hppa): Use extract_5r_store for 'r'.
4469 * hppa-dis.c (print_insn_hppa, case '>'): If next character is 'n',
4470 don't output a space.
4472 * hppa-dis.c (float_format_names): 10 is undefined, and 11 is quad.
4476 * mips-opc.c: New file, containing opcode table from
4477 ../include/opcode/mips.h.
4478 * Makefile.in: Add it.
4482 * m88k-dis.c: New file, moved in from gdb and changed to use the
4483 new dis-asm.h disassembler interface.
4484 * Makefile.in (DIS_LIBS): Added m88k-dis.o.
4485 (m88k-dis.o): New target.
4489 * mips-dis.c (print_insn_arg, _print_insn_mips): Made pointer to
4490 argument string const char * to correspond to opcode/mips.h.
4494 * mips-dis.c: Updated to account for name changes in new version
4496 * Makefile.in: Added header file dependencies.
4500 * h8300-dis.c (bfd_h8_disassemble): Correct fetching of instruction.
4504 * m68k-dis.c (NEXTWORD, NEXTLONG): Use ((x) ^ 0x8000) - 0x8000 to sign
4505 extend, rather than shifts.
4509 * Makefile.in: Undo 15 June change.
4513 * m68k-dis.c (print_insn_arg): Change return value to byte count
4515 * m68k-dis.c: Re-write to detect invalid operands before
4516 printing anything, so we can handle this the same way we
4517 handle invalid opcodes.
4521 * sh-dis.c, sh-opc.h: Understand some more opcodes.
4525 * hppa-dis.c: Include <ansidecl.h> and sysdep.h before other
4530 * sparc-dis.c: Don't declare qsort, since sysdep.h might.
4532 * configure.in: Do make sysdep.h link.
4533 * Makefile.in: Search ../include. Don't search ../bfd.
4538 * hppa-dis.c: Fix typo. 'a' and 'd' were reversed.
4539 Do not print a space before the completers specified by
4544 * mips-dis.c: No longer need to bomb out if HOST_64_BIT is
4545 defined, since gdb has been fixed.
4548 * hppa-dis.c (print_insn_hppa): Last argument to fput_reg,
4549 fput_reg_r, fput_creg, fput_const, and fputs_filtered should
4550 be a *disassemble_info, not a *FILE.
4551 * hppa-dis.c: Support 'd', '!', and 'a'.
4552 * hppa-dis.c: Support 's' to extract a 2 bit space register.
4553 * hppa-dis.c: Delete cases which are no longer needed.
4557 * m68k-dis.c (print_insn_{m68k,arg}): Add MMU codes.
4561 * h8300-dis.c: New file, removed from bfd/cpu-h8300.c, with
4566 * Makefile.in (CSEARCH): Add -I../bfd for sysdep.h and bfd.h.
4567 * configure.in: No longer need to configure to get sysdep.h.
4572 * hppa-dis.c: Support 'I', 'J', and 'K' in output
4573 templates for 1.1 FP computational instructions.
4577 * h8500-dis.c (print_insn_h8500): Address argument is type
4579 * z8k-dis.c (print_insn_z8k, print_insn_z8001, print_insn_z8002):
4582 * h8500-opc.h (addr_class_type): No comma at end of enumerator.
4583 * sh-opc.h (sh_nibble_type, sh_arg_type): Ditto.
4585 * sparc-dis.c (compare_opcodes): Move static declaration to
4590 * sparc-dis.c (print_insn_sparc): Implement 'n' argument for unimp
4591 instruction, remove unimp hack from 'l' argument.
4595 * z8k-dis.c (fetch_data): Use unsigned char to make ancient gcc's
4601 * mips-dis.c (print_insn_arg): Handle 'C' for general coprocessor
4606 * hppa-dis.c: Include dis-asm.h before sysdep.h. Changed some
4607 arrays of string pointers to 2-d arrays of chars, to save
4612 * a29k-dis.c, alpha-dis.c, i960-dis.c, sparc-dis.c, z8k-dis.c:
4613 Cast second arg to read_memory_func to "bfd_byte *", as necessary.
4617 * hppa-dis.c: New file from Utah, adapted to new disassembler
4619 * Makefile.in: Include it.
4623 * sh-dis.c, sh-opc.h: New files.
4627 * alpha-dis.c, alpha-opc.h: New files.
4631 * mips-dis.c: Sign extend 'j' and 'b' arguments, delta is a signed
4636 * sparc-dis.c: Make "ta" the default trap instruction, "t" the alias.
4640 * a29k-dis.c, sparc-dis.c, sparc-opc.c: Use CONST rather than
4645 * sparc-dis.c: Use fprintf_func a few places where I forgot,
4646 and double percent signs a few places.
4648 * a29k-dis.c, i960-dis.c: New, merged from gdb and binutils.
4650 * i386-dis.c, m68k-dis.c, mips-dis.c, sparc-dis.c:
4651 Use info->print_address_func not print_address.
4653 * dis-buf.c (generic_print_address): New function.
4657 * Makefile.in: Add sparc-dis.c.
4658 sparc-dis.c: New file, merges binutils and gdb versions as follows:
4660 Add `add' instruction to the set that get checked
4661 for a preceding `sethi' in order to print an absolute address.
4662 * (print_insn): Disassembly prefers real instructions.
4663 (is_delayed_branch): Speed up.
4664 * sparc-opcode.h: Add ALIAS bit to aliases. Fix up opcode tables.
4665 Still missing some float ops, and needs testing.
4666 * sparc-pinsn.c (print_insn): Eliminate 'set' test, subsumed by
4667 F_ALIAS. Use printf, not fprintf, when not passing a file
4669 (compare_opcodes): Check that identical instructions have
4670 identical opcodes, complain otherwise.
4673 * Include reg_names.
4675 Use dis-asm.h/read_memory_func interface.
4679 * h8500-dis.c, i386-dis.c, m68k-dis.c, z8k-dis.c (fetch_data):
4680 deliberately return non-zero to setjmp from longjmp. Otherwise
4681 this code fails to compile.
4685 * m68k-dis.c: Fix prototype for fetch_arg().
4689 * dis-buf.c: New file, for new read_memory_func interface.
4690 Makefile.in (OFILES): Include it.
4691 m68k-dis.c, i386-dis.c, h8500-dis.c, mips-dis.c, z8k-dis.c:
4692 Use new read_memory_func interface.
4696 * h8500-dis.c (print_insn_h8500): Get sign of fp offsets right.
4697 * h8500-opc.h: Fix couple of opcodes.
4699 Wed Mar 24 02:03:36 1993 david d `zoo' zuhn (zoo at poseidon.cygnus.com)
4701 * Makefile.in: add dvi & installcheck targets
4705 * Makefile.in: Update for h8500-dis.c.
4709 * h8500-dis.c, h8500-opc.h: New files
4713 * mips-dis.c, z8k-dis.c: Converted to use interface defined in
4714 ../include/dis-asm.h.
4715 * m68k-dis.c: New file (merge of ../binutils/m68k-pinsn.c
4716 and ../gdb/m68k-pinsn.c).
4717 * i386-dis.c: New file (merge of ../binutils/i386-pinsn.c
4718 and ../gdb/i386-pinsn.c).
4719 * m68881-ext.c: New file. Moved definition of
4720 ext_format ext_format_68881 from ../gdb/m68k-tdep.c.
4721 * Makefile.in: Adjust for new files.
4723 * m68k-dis.c: Recognize '9' placement code, so (say) pflush
4724 can be dis-assembled.
4728 * mips-dis.c (print_insn_arg): Now returns void.
4732 * mips-dis.c (ansidecl.h): Include for benefit of sysdep.h
4733 files that use the macros.
4737 * mips-dis.c: New file, from gdb/mips-pinsn.c.
4738 * Makefile.in (DIS_LIBS): Added mips-dis.o.
4739 (CFILES): Added mips-dis.c.
4743 * z8k-dis.c (print_insn_z8001, print_insn_z8002): new routines
4744 * z8kgen.c, z8k-opc.h: fix sizes of some shifts.
4748 * Makefile.in: Improve *clean rules.
4749 * configure.in: Allow a default host.
4751 Tue Nov 17 19:53:54 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com)
4753 * Makefile.in: also use -I$(srcdir)/../bfd, since some sysdep
4754 files include other sysdep files
4758 * z8k-dis.c z8k-opc.h z8kgen.c: checkpoint
4762 * configure.in: For host support, use ../bfd/configure.host
4763 so it stays in sync with the ../bfd/hosts database.
4765 Thu Oct 1 23:38:54 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com)
4767 * configure.in: use cpu-vendor-os triple instead of nested cases
4771 * z8k-dis.c (unparse_instr): fix bug where opcode returned was
4772 *always* the wrong one.
4776 * z8kgen.c: added copyright info
4780 * z8k-dis.c (unparse_instr): prettier tabs
4781 * z8kgen.c -> z8k-opc.h: bug fixes in tables
4783 Fri Sep 25 12:50:32 1992 Stu Grossman (grossman at cygnus.com)
4785 * configure.in: Add ncr* configuration.
4786 * z8k-dis.c (struct instr_data_s): Make instr_asmsrc char to make
4787 picayune ANSI compilers happy.
4791 * configure.in (i386): Make i386 and i486 synonymous for now.
4792 * configure.in (i[34]86-*-sysv4): Add my_host definition.
4796 * Makefile.in (install): Fix typo.
4800 * Makefile.in (make): Remove obsolete crud.
4801 (sparc-opc.o): Avoid Sun Make VPATH bug.
4805 * Makefile.in: since there are no SUBDIRS, remove rule and
4806 references of subdir_do.
4810 * Makefile.in (install): Get the library name right here too.
4811 Don't install bfd.h, since it's unrelated to this library. No
4812 subdirs to recurse into, either.
4813 (CFILES): The source file has a .c suffix, not .o.
4815 * sparc-opc.c: New file, moved from BFD.
4816 * Makefile.in (OFILES): Build it.
4820 * z8k-dis.c: fixed forward refferences of some declarations.
4824 * Makefile.in: get the name of the library right
4828 * z8k-dis.c: knows how to disassemble z8k stuff
4829 * z8k-opc.h: new file full of z8000 opcodes
4833 version-control: never