4 * m10300-opc.c: Support 4 byte DSP instructions.
9 * mips-dis.c (_print_insn_mips): Fix argument interchange typo.
14 * m10300-opc.c: Support 6 and 7 byte am33 instructions.
19 * m10200-dis.c (print_insn_mn10200): Recognize 'break' pseudo-op.
24 * m10300-opc.c: Support for 3 byte and 4 byte extended instructions
30 * i386-dis.c: Add support for fxsave, fxrstor, sysenter and
35 * mips-dis.c (print_insn_little_mips): Previously, instruction
36 printing references the symbol table to determine whether the
37 instruction resides in a block regular instructions or mips16
38 instructions. However, when the disassembler gets used in other
39 environments where the symbol table is not present, we no longer
40 rely in the symbol table, rather, use the low bit of the
41 instructions address to guess. There should be no change for usage
42 of the disassembler in host based programse, gdb ,objdump.
43 (print_insn_big_mips): ditto.
44 (print_insn_mips): ditto
48 * m10200-dis.c (print_insn_mn10200): Don't bomb on unknown opcodes.
53 * m10300-opc.c (USP, SSP, MSP, PC, IMM4, EPSW, RN0, RM1): New
54 operands for the am33.
55 (mn10300_opcodes): Add new instructions from the am33.
57 * m10300-opc.c (mn10300_opcodes): Change opcode for "syscall".
61 * i386-dis.c (index16): Add '%' to register names. Use ','
66 * i386-dis.c: Don't print opcode suffix when we can figure out the
67 size (and gas can!) by register operands, or from the default
69 (putop): Handle 'A', 'B', 'L', 'P', 'Q', 'R' macros. Rename 'C'
71 (dis386, dis386_twobyte, grps): Use new suffix macros.
72 (dis386): Correct imul Ib to imul sIb. Change jnl to jge to be
73 consistent. Add suffix for call, jmp, lcall, ljmp, iret. Reverse
74 order of cmps operands to agree with Intel docs. Correct operand
75 of aad and aam (Ib -> sIb). Change ud2b from 0fb8 to 0fb9 to
76 agree with Intel docs.
77 (print_insn_x86): Print orphan fwait before other prefixes.
78 Return correct byte count for orphan fwait with prefixes. Don't
79 print `bound' operands in reverse order.
80 (ckprefix): Stop accumulating prefixes if we get fwait.
81 (OP_DIR): Print `$' before Ap operands of ljmp, lcall.
85 * po/Make-in (all-yes): If maintainer mode, depend on .pot file.
86 ($(PACKAGE).pot): Unconditionally depend on POTFILES.
90 Fix problems when bfd_vma is wider than long.
91 * i386-dis.c: Make op_address and start_pc unsigned.
92 (set_op): Make parameter unsigned.
93 (print_insn_x86): Cast to bfd_vma when passing a value to
95 * ns32k-dis.c (CORE_ADDR): Don't define.
96 (print_insn_ns32k): Change type of addr to bfd_vma. Use
97 bfd_scan_vma to read back address.
98 (print_insn_arg): Change type of addr to bfd_vma. Use sprintf_vma
100 * m68k-dis.c (COERCE32): Cast to bfd_signed_vma to avoid overflow.
101 (NEXTULONG): New definition.
102 (print_insn_m68k): Avoid overflow when computing third argument of
104 (print_insn_arg): Use NEXTULONG to fetch 32 bit address values.
105 Use disp instead of val to store offset values.
106 (print_indexed): Use base_disp instead of word to store base
107 displacement, to avoid overflow.
108 * m10300-dis.c (disassemble): Cast value to long when computing
109 pc-relative address, to get correct sign extension.
113 * m32r-opc.c: Regenerate.
117 * arm-opc.h (thumb_opcodes): Display 'add rx, rY, #0' insns as
122 * d30v-opc.c: Remove FALG_MUL32 attribyte from MULX2H insn.
126 * i386-dis.c: Combine aflag and dflag into sizeflag. Change OP_*
128 (OP_DSreg): Rename from OP_DSSI.
129 (OP_ESreg): Rename from OP_ESDI.
130 (Xb, Xv, Yb, Yv): Use index reg code, not b_mode or v_mode.
132 (append_seg): Rename from append_prefix.
133 (ptr_reg): New function.
134 (dis386): Add S suffix to pushf, popf, ret, lret, enter, leave.
136 (PREFIX_ADDR): Rename from PREFIX_ADR.
137 (float_reg): Add non-broken opcodes for people who don't want
142 * m68k-opc.c (tstb, tstw, tstl): Don't allow pcrel on
147 * i386-dis.c (dis386): Change 0x60 to "pushaS", 0x61 to "popaS".
151 * ppc-opc.c (powerpc_macros): Support shifts and rotates of size
152 0; produce error message for shifts of size 32 (or 64 for 64-bit
153 shifts), because the hardware doesn't support them.
158 * mips-opc.c (c.lt.s): Remove r5900 specific variant.
161 * vu0.h (sqc2): Fix opcode.
163 * mips-opc.c (rsqrt.s): Update based on r5900 ISA manual version 2.1
167 start-sanitize-vr5400
170 * mips-opc.c (macc, maccu, macchi, macchiu, msac, msacu, msachi, msachiu):
171 Change pinfo to use WR_HILO.
177 * d30v-opc.c: Add new operand: Ra3. Change SHORT_B3, SHORT_B3b,
178 LONG_2, LONG_2b formats to use this new operand.
183 * sparc-dis.c (compute_arch_mask): Added bfd_mach_sparc_sparclite_le.
187 * sparc-dis.c (print_insn_sparc): big endian instruction / little
193 * d30v-opc.c (d30v_format_table): Change definition of SHORT_B3
194 and SHORT_B3b formats to use Rb instead of Ra.
196 Add FLAG_MUL16 to MUL2XH opcode.
198 Add FLAG_ADDSUBppp to SRC and SATHp opcodes to implement extension
199 to existing 1.1.1 parallelisation prohibition procedure.
204 * cgen-asm.in (insert_normal): Handle empty fields and 64 bit hosts.
205 * cgen-dis.in (extract_normal): Likewise.
206 * m32r-asm.c,m32r-dis.c: Regenerate.
211 * dvp-opc.c (parse_dotdest): Missing dest -> xyzw.
217 * mips-opc.c (multu1): Add two operand variant for the r5900.
222 * mips-dis.c (print_mips16_insn_arg): Handle type ']' correctly
223 with a shift count of 0.
228 * mips-opc.c (mult1): Add two-operand variety of mult1 for R5900.
232 * mips-dis.c (print_insn_arg): Handle ';' opcode completer.
233 (_print_insn_mips): Likewise.
234 * vu0.h (vopmula, vopmsub): Correctly handle opcode/operand
240 * cgen-opc.c (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
241 (cgen_hw_lookup_by_num): New function.
244 * m32r-opc.c, m32r-opc.h: Regenerate, delete h-abort.
249 * m32r-asm.c: Regenerate (handle uppercase HIGH/SHIGH/LOW/SDA).
253 * sparc-dis.c (print_insn_sparc): Always fetch instructions
254 as big-endian on SPARClite.
259 * m32r-opc.c: Regenerated - SPECIAL attribute added to some
261 * m32r-opc.h: Regenerated - SPECIAL attribute added to some
268 * d30v-opc.c (pre_defined_register): Remove alias for r0.
274 * mips-opc.c (break): Added 20-bit single-operand break
275 instruction for R5900 only.
280 * po/Make-in (install-info): New target.
284 * configure.in (WIN32LIBADD): Add -lintl on cygwin32.
285 * configure: Rebuild.
289 * mips-opc.c (teq,tge,tgeu,tlt,tltu,tne): Added three-operand
290 variety of ISA2 instructions to set bottom ten bits of trap code.
294 * Makefile.am (config.status): Add explicit target so that
295 config.status depends upon bfd/configure.in.
296 * Makefile.in: Rebuild.
300 * mips-opc.c (break, sdbbp): Added two-operand variety of ISA1
301 instructions to set bottom ten bits of break code.
302 * mips-dis.c (print_insn_arg): Implement 'q' operand format used
303 for above optional argument.
305 start-sanitize-cygnus
308 * cgen.sh: s/@ARCH@/${ARCH}/ in opc.h generation.
309 * m32r-opc.h: Regenerate.
314 * makefile.vms: Run dec c with /nodebug.
318 * Makefile.in: Rebuilt.
319 * Makefile.am: Regenerated dependencies with mkdep.
321 * opintl.h (_): Define as dgettext.
323 start-sanitize-cygnus
326 * configure.in: Add support for --enable-cgen-maint.
327 * Makefile.am (M32R_DEPS): New variable.
328 (m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c): Update dependencies.
329 * aclocal.m4: Regenerate.
330 * Makefile.in: Regenerate.
331 * configure: Regenerate.
333 * Makefile.am (CGENFILES): Add minsn.scm.
338 * cgen-asm.c: Internationalised.
339 start-sanitize-cygnus
340 * cgen-asm.in: Internationalised.
341 * cgen-opc.in: Internationalised.
343 * m32r-asm.c: Internationalised.
344 * m32r-dis.c: Internationalised.
345 * m32r-opc.c: Internationalised.
347 * aclocal.m4: Regenerated.
348 * configure: Regenerated.
349 * Makefile.am (POTFILES): Remove inclusion of BFD_H.
350 * Makefile.in: Rebuild.
351 * po/POTFILES.in: Rebuilt using rule in Makefile.in.
352 * po/opcodes.pot: Rebuilt after changing POTFILES.in.
356 * configure.in: Call AC_ISC_POSIX near start. Move CY_GNU_GETTEXT
358 * aclocal.m4, configure: Rebuild with current tools.
362 * opintl.h: New file - contains internationalisation macros used
363 by source files in this directory.
364 * po/: New subdirectory - contains internationalisation files.
365 * po/Make-in: New file - Makefile constructor.
366 * po/POTFILES.in: New file - list of files in opcodes directory
367 that should be scan for internationalisation macros.
368 * po/opcodes.pot: New file - list of internationisation strings
369 found in files mentioned in po/POTFILES.in.
370 * Makefile.am: Add rule to build po/POTFILES.in. Add SUBDIRS
371 entry. Add intl directory to include paths.
372 * acconfig.h: Add ENABLE_NLS, HAVE_CATGETS, HAVE_GETEXT,
373 HAVE_STRCPY, HAVE_LC_MESSAGES
374 * configure.in: Add rule to build Makefile in po subdirectory.
375 * Makefile.in: Rebuilt.
376 * aclocal.m4: Rebuilt.
377 * config.in: Rebuilt.
378 * configure: Rebuilt.
379 * alpha-opc.c: Internationalised.
380 * arc-dis.c: Internationalised.
381 * arc-opc.c: Internationalised.
382 * arm-dis.c: Internationalised.
383 * cgen-asm.c: Internationalised.
385 * d30v-dis.c: Internationalised.
387 * dis-buf.c: Internationalised.
389 * dvp-dis.c: Internationalised.
390 * dvp-opc.c: Internationalised.
392 * h8300-dis.c: Internationalised.
393 * h8500-dis.c: Internationalised.
394 * i386-dis.c: Internationalised.
395 * m10200-dis.c: Internationalised.
396 * m10300-dis.c: Internationalised.
397 * m68k-dis.c: Internationalised.
398 * m88k-dis.c: Internationalised.
399 * mips-dis.c: Internationalised.
400 * ns32k-dis.c: Internationalised.
401 * opintl.h: Internationalised.
402 * ppc-opc.c: Internationalised.
403 * sparc-dis.c: Internationalised.
404 * v850-dis.c: Internationalised.
405 * v850-opc.c: Internationalised.
409 * cgen-asm.c (cgen_current_opcode_table): Renamed from ..._data.
410 (asm_hash_table_entries): New variable.
411 (cgen_asm_init): Free asm_hash_table_entries.
412 (hash_insn_array,hash_insn_list): New functions.
413 (build_asm_hash_table): Use them. Hash macro insns as well.
414 (cgen_asm_lookup_insn): Update.
415 * cgen_dis.c (cgen_current_opcode_table): Renamed from ..._data.
416 (dis_hash_table_entries): New variable.
417 (cgen_dis_init): Free dis_hash_table_entries.
418 (hash_insn_array,hash_insn_list): New functions.
419 (build_dis_hash_table): Use them. Hash macro insns as well.
420 (cgen_dis_lookup_insn): Update.
421 * cgen-opc.c (cgen_current_opcode_table): Renamed from ..._data.
422 (cgen_set_cpu,cgen_hw_lookup,cgen_insn_count): Update.
423 (cgen_macro_insn_count): New function.
424 * cgen-opc.in (@arch@_cgen_lookup_insn): New arg alias_p.
425 All callers updated. Sanity check result of extract fn.
426 (@arch@_cgen_get_insn_operands): Change result type to void.
427 Delete args insn_value, length. New arg fields. All callers updated.
428 (@arch@_cgen_lookup_get_insn_operands): New function.
429 * m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate.
433 * i386-dis.c (OP_DSSI): Print segment override.
438 * mips-opc.c (msub.s): Correct mask pattern for disassembly.
444 * mips-opc.c (madd.s): Correct mask pattern for disassembly.
450 * vu0.h (vlqd, vlqi): Update per revised specs.
456 * dvp-opc.c (parse_vif_unpackloc,insert_vif_unpackloc): Delete.
457 (vif_operands): Update.
458 (vif_get_unpackloc): Delete.
459 (state_vif_unpackloc{,_star_p}): Delete.
460 (dvp_opcode_init_parse): Update.
461 (vif_unpack_len_value): Avoid divide by zero.
467 * vu0.h: Specs changed for VCALLMSR bit pattern.
468 * mips-dis.c: (print_insn_arg) Matching change.
473 * arm-dis.c (print_insn_arm): Add "_all" extension to 'C'
478 * Makefile.am (libopcodes_la_LIBADD): Add @WIN32LIBADD@.
479 (libopcodes_la_LDFLAGS): Add @WIN32LDFLAGS@.
480 * configure.in: Define and substitute WIN32LDFLAGS and
482 * aclocal.m4: Rebuild with new libtool.
483 * configure, Makefile.in: Rebuild.
488 * vu0.h: Corrected bit pattern for VMAXI opcode.
493 * m32r-opc.c: Regenerate.
498 * dvp-opc.c (vif_macros): Tweak unpackloc operand.
499 (dvp_expand_macro): Implement.
500 (insert_vif_datalen): Record value with max+1 -> 0 conversion.
501 (vif_unpack_len): Perform 0 -> max+1 conversion on `wl' value.
506 * Makefile.am (stamp-lib): Check that .libs/libopcodes.a exists
507 before trying to copy it.
508 * Makefile.in: Rebuild.
512 * m32r-opc.c: Use signed immediate values for CMPUI instruction.
517 * m32r-opc.c: Fix bit patterns for SAT and SATB.
522 * ns32k-dis.c (bit_extract_simple): New function to extract bits
523 from an arbitrary valid buffer instead of fetching them on demand
525 (invalid_float): use bit_extract_simple() instead of bit_extract().
530 * m32r-opc.c: Fix SATB bit pattern. Add extra control registers.
531 * m32r-opc.h: Add extra control registers.
537 * i386-dis.c (dis386): Change 0x8c and 0x8e to movS, and change Ew
542 * Branched binutils 2.9.
547 * d30v-dis.c (print_insn_d30v): Don't use uninitialized "num" when
548 disassembling last 4 bytes of a section.
553 Fix some gcc -Wall warnings:
554 * arc-dis.c (print_insn): Add casts to avoid warnings.
555 * cgen-opc.c (cgen_keyword_lookup_name): Likewise.
556 * d10v-dis.c (dis_long, dis_2_short): Likewise.
558 * dvp-opc.c (issymchar, SKIP_BLANKS): Likewise.
559 (parse_dotdest, parse_dotdest1, u_parse_sdest): Likewise.
560 (parse_bc, parse_vfreg, parse_accdest): Likewise.
561 (parse_ffstreg, parse_vif_mode): Likewise.
563 * m10200-dis.c (disassemble): Likewise.
564 * m10300-dis.c (disassemble): Likewise.
565 * ns32k-dis.c (print_insn_ns32k): Likewise.
566 * ppc-opc.c (insert_ral, insert_ram): Likewise.
567 * cgen-dis.c (build_dis_hash_table): Remove used local variables.
568 * cgen-opc.c (cgen_keyword_search_next): Likewise.
569 * d10v-dis.c (dis_long, dis_2_short): Likewise.
571 * d30v-dis.c (print_insn_d30v, lookup_opcode): Likewise.
574 * dvp-dis.c (print_dma, print_vif, print_gif): Likewise.
575 * dvp-opc.c (parse_dest1, print_uflags): Likewise.
576 (parse_gif_nloop, dvp_opcode_init_tables): Likewise.
578 * ns32k-dis.c (bit_extract, print_insn_ns32k): Likewise.
580 * tic80-dis.c (print_one_instruction): Likewise.
582 * w65-dis.c (print_operand): Likewise.
583 * z8k-dis.c (fetch_data): Likewise.
584 * a29k-dis.c: Add return type for find_byte_func_type.
585 * arc-opc.c: Include <stdio.h>. Remove declarations of
586 insert_multshift and extract_multshift.
588 * d30v-dis.c (lookup_opcode): Parenthesize assignments in
590 (extract_value): Fully parenthesize expression.
593 * dvp-opc.c: Include <ctype.h>.
594 (print_sdest): Add default case to switch.
596 * h8500-dis.c (print_insn_h8500): Initialize local variables.
597 * h8500-opc.h (h8500_table): Fully bracket initializer.
598 * w65-opc.h (optable): Likewise.
599 * i386-dis.c (print_insn_x86): Declare aflag and flag parameters.
600 * i386-dis.c (OP_E): Initialize local variables.
601 * m10200-dis.c (print_insn_mn10200): Likewise.
602 * mips-dis.c (print_insn_mips16): Likewise.
603 * sh-dis.c (print_insn_shx): Likewise.
604 * v850-dis.c (print_insn_v850): Likewise.
605 * ns32k-dis.c (print_insn_arg): Declare.
606 (get_displacement, invalid_float): Declare.
607 (list_search, sign_extend, flip_bytes): Declare return type.
608 (get_displacement): Likewise.
609 (print_insn_arg): Likewise. Make d int. Fix sprintf format
611 (print_insn_ns32k): Make i unsigned.
612 (invalid_float): Make static. Declare type of val.
613 * tic30-dis.c (print_par_insn): Make i size_t. Don't check strlen
614 on each for iteration.
615 * tic30-dis.c (get_indirect_operand): Likewise.
616 * z8k-dis.c (print_insn_z8001): Declare return type.
617 (print_insn_z8002): Likewise.
618 (unparse_instr): Fix sprintf format strings.
622 * mips-opc.c: Add "sync.l" and "sync.p".
627 * dvp-opc.c (extract_vif_datalen): Rewrite.
628 (vif_insn_len): Perform 0->max+1 conversion for direct length.
632 * dvp-dis.c (print_insn): Print unpack address in hex.
633 * dvp-opc.c (parse_vif_mpgloc): Renamed from parse_vif_mpgloc_star.
634 Don't skip over '*', just record it.
635 (insert_vif_mpgloc): Don't update state_vif_mpgloc if '*' value.
636 (parse_vif_unpackloc): Renamed from parse_vif_unpackloc_star.
637 Don't skip over '*', just record it.
638 (insert_vif_unpackloc): Don't update state_vif_unpackloc if '*' value.
639 (vif_operands): Delete VIF_MPGLOC_STAR,VIF_UNPACKLOC_STAR entries.
640 (vif_opcodes): Likewise.
641 (state_vif_{mpg,unpack}loc_star_p): New static locals.
642 (vif_macros,vif_macro_count): New globals.
643 (vif_unpack_len_value): New arguments wl,cl. All callers updated.
644 (vif_set_{mpg,unpack}loc): Delete. All callers updated.
645 (vif_get_wl_cl): New function.
646 (dvp_opcode_init_parse): Init mpgloc,unpackloc state.
651 * m68k-dis.c (print_insn_m68k): Use info->mach to select the
652 default m68k variant to recognize.
654 * i960-dis.c (pinsn): Change type of first argument to bfd_vma.
655 (ctrl, cobr, mem, ea): Likewise.
656 (print_addr): Likewise. Remove cast.
657 (ea): Cast argument of print_addr to bfd_vma.
659 * cgen-asm.c (cgen_parse_signed_integer): Fix type of local
661 (cgen_parse_unsigned_integer): Likewise.
662 (cgen_parse_address): Likewise.
666 * i960-dis.c (ctrl): Add full braces to structure initialization.
667 (cobr, mem, reg): Likewise.
668 (ea): Correct parenthesization in expression.
670 * cgen-asm.c: Include <ctype.h>.
671 (build_asm_hash_table): Remove unused local variable i.
672 (cgen_parse_keyword): Add casts to avoid warnings.
674 * arm-dis.c (print_insn_big_arm): Only call coffsymbol for a COFF
675 symbol. Fix indentation.
676 (print_insn_little_arm): Likewise.
681 * vu0.h (cfc2, ctc2): Add variants with ".i" and ".ni"
688 * m32r-opc.c (m32r_cgen_insn_table_entries): Fix SATH bit pattern
695 * dvp-opc.c (vif_operand_datalen_special): New global.
701 * vu0.h (vcallms): Use 'O' for call target operand.
702 * mips-dis.c (print_insn_arg): Handle 'O'.
707 * configure.in: Use AM_DISABLE_SHARED.
708 * aclocal.m4, configure: Rebuild with libtool 1.2.
713 * mips-dis.c: Change '%' to '#' in r5900 support.
719 These patches are courtesy of Jonathan Walton and Tony Thompson
722 * arm-dis.c (print_insn_thumb): Ignore bottom two bits of PC
725 * arm-opc.h (thumb_opcodes): Annotate PC relative addresses with
726 both the offset and the label closest to the destination.
731 * vu0.h: New file with cop2/vu0 instructions.
732 * mips-opc.c: Include vu0.h.
733 * mips-dis.c (print_insn_arg): Handle new args 0-9, +, -, %, K, &,
735 (print_insn_mips): Do not emit a tab after an instruction if the
736 first arg is an instruction completer (&). If the next arg is an
737 escape character (%), then print the next arg verbatim.
738 * Makefile.am (mips-opc.lo): Depend on vu0.h
744 * dvp-opc.c (vif_opcodes): Add stcycl.
748 * dvp-dis.c (print_dma): Change length from 16 to 8.
753 * m32r-opc.h: Regenerate.
758 * dvp-opc.c (print_dest1): Print dest spec again.
759 (print_vfreg,print_accdest): Likewise.
760 (vif_unpack_len): Round result up to word boundary.
763 start-sanitize-vr4320
766 * mips-opc.c ("clz","dclz"): Added the 4320 versions.
770 * mips-opc.c ("macc*","mul*"): Added the 4320 versions
777 * dvp-dis.c (print_gif): Fix length calcs for gifimage.
778 (print_insn): Do mask comparison on proper opcode word.
779 Print unsigned values in hex.
780 * dvp-opc.c (u_parse_sdest): Return -1 if dest missing.
781 (parse_bc): Catch missing dest.
782 (parse_vfreg): Replace atoi call with strtol.
783 (parse_{bcftreg,ffstreg,freg,ireg,vi01,gif_prim,gif_nloop}): Likewise.
784 (parse_bcftreg,parse_ffstreg): Handle missing dest.
785 (extract_gif_eop): New function.
786 (gif_operands): Update eop entry.
787 (VGIFOP,VGIFNREGS): Fix calcs.
788 (extract_gif_prim): Set *pinvalid to 1 if prim not used.
789 (gif_regs): Add entry for unused 11 case.
790 (print_gif_regs): Print empty list instead of nothing.
791 (extract_gif_nloop): Fix value calc.
792 (print_gif_nloop): Always print value, even if 0.
793 (insert_vif_wlcl,extract_vif_wlcl): New functions.
794 (vif_operands): Use them for wl,cl fields.
795 (state_vif_wl,state_vif_cl): New static locals.
796 (parse_vif_mode): Handle numeric args.
797 (vif_unpack_len_value,vif_unpack_len): New functions.
798 (vif_insn_len): Call vif_unpack_len.
803 * m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate.
807 * cgen-asm.in: Move insertion of generated routines to top of file.
808 (insert_normal): Add prototype. Delete `shift' arg.
809 * cgen-dis.in: Move insertion of generated routines to top of file.
810 (extract_normal): Add prototype. Delete `shift' arg.
811 (print_normal): Add prototype. Call CGEN_PRINT_NORMAL if defined.
812 (print_keyword): Add prototype. Fix type of `attrs' arg.
814 start-sanitize-vr4320
817 * mips-dis.c (_print_insn_mips) : Handle bfd_mach_mips4320.
818 * mips-opc.c ("mac","dmac") : Added 4320 insns.
823 * arm-dis.c (print_insn_big_arm, print_insn_little_arm): Do not
824 assume that info->symbols is non-empty.
828 * alpha-opc.c (cvtqs) There is no such thing.
829 (cvttq): Missing most of the /*d variants.
834 * mips-opc.c (r5900/madd.s): Takes three operands, not four. Fix
836 (r5900/min.s): Incorrect opcode ....,101001 not ...110000.
837 (r5900/msub.s): Takes three operands, not four. Fix opcode.
843 * d30v-opc.c (d30v_opcode_table): Indicate which instructions are
844 delayed branches or jumps.
850 * dvp-opc.c (vif_operands): Add unpack[u] support.
851 (vif_opcodes): Ditto.
852 (*_vif_imrubits): Renamed from *_vif_imrbits.
856 * dvp-dis.c (print_insn): Handle word number.
857 Handle mips address vs vu address.
858 * dvp-opc.c (vif_operands): Use DVP_OPERAND_VU_ADDRESS.
859 (dma_operands): Use DVP_OPERAND_MIPS_ADDRESS.
860 ({insert,extract}_dma_addr): Fix word ofset.
861 ({insert,print}_gif_regs): Fix encode/decode.
866 * arm-dis.c (print_insn_{big,little}_arm): info->symbol changed
868 * mips-dis.c (print_insn_{big,little}_mips): Likewise.
869 * tic30-dis.c (print_branch): Likewise.
871 * mips-dis.c (print_insn_little_mips): Call dvp_info_mach_type.
872 * dvp-dis.c (dvp_info_mach_type): New function.
873 (print_insn_dvp): Call it.
874 (print_vif): Return length of 4 if mpg or direct insn so following
875 insns get properly disabled.
876 (print_gif): Fix word order.
877 * dvp-opc.c (vif_insn_len): New argument `pcpu'. All callers updated.
878 (gif_operands): Fix word order.
879 (gif_opcodes): Likewise.
880 ({insert,extract,print}_gif_regs): Likewise.
881 (gif_regs): Add new register number/name changes.
882 (dma_opcodes): Add dmarefe insn.
887 * arm-dis.c (print_insn_big_arm, print_insn_little_arm): Remove
888 saved_symbol code as it is no longer needed.
892 * cgen-asm.c: Include symcat.h.
893 * cgen-dis.c,cgen-opc.c,cgen-asm.in,cgen-dis.in: Ditto.
895 * m32r-asm.c,m32r-dis.c,m32r-opc.h,m32r-opc.c: Regenerate.
900 * dvp-opc.c (extra_dma_flags): Fix typos.
901 (dma_operands): Fix word numbers.
902 (dma_opcodes): Likewise.
903 ({insert,extract}_dma_flags): Likewise.
908 * mips-dis.c (print_insn_arg): Do not prefix 'P' arguments with '$'.
913 * dvp-dis.c (print_gif): Complete.
914 * dvp-opc.c (gif_operands,gif_opcodes): Complete.
915 (state_gif_{nregs,regs,nloop}): New static locals.
917 (dvp_opcode_init_{parse,print}): Init gif state locals.
918 (extract_vif_datalen,{insert,extract}_vif_imrbits): New functions.
919 (vif_insn_len): Handle `unpack'.
920 ({insert,extract}_dma_flags): Complete.
926 * mips-opc.c (mula.s): Renamed from multa.s.
931 * m32r-opc.[ch]: Regenerate.
936 * dvp-opc.c (dma_operands): Rewrite.
937 (dma_operand_{count,addr}): New globals.
938 (dma_opcodes): Rewrite. Add "dmaend" with no operands.
939 (insert_dma_addr): Insert value into insn.
940 (extract_dma_addr): Extract value from insn.
944 * dvp-dis.c (print_vu): Handle loi insns.
945 (print_insn): Likewise.
946 * dvp-opc.c (vu_lower_opcodes): Add "loi".
947 (vu_operands): Make LDEST1 a FAKE operand.
948 (parse_dest1): Allow elided argument.
949 (print_dest1): Don't print the argument.
953 * dvp-opc.c (parse_vfreg): Dest spec is optional.
954 (print_vfreg): Don't print dest spec.
955 (parse_accdest): Dest spec is optional.
956 (print_accdest): Don't print dest spec.
961 * Makefile.am (CGENFILES): Update.
962 * Makefile.in: Regenerate.
963 * cgen-asm.in (insert_normal): Result is error message now.
964 Validate value to be inserted.
965 (insert_insn_normal): Result is error message now.
966 (@arch@_cgen_assemble_insn): Update.
967 * cgen-asm.c (cgen_parse_{signed,unsigned}_integer): Delete min,max
968 arguments. Don't perform validation here.
969 * m32r-asm.c,m32r-dis.c,m32r-opc.c: Regenerate.
973 * cgen-opc.in (@arch@_cgen_get_insn_operands): Handle empty
974 operand instance list.
975 * m32r-opc.c: Regenerate.
979 * Makefile.am (AUTOMAKE_OPTIONS): Define.
980 * configure, Makefile.in, aclocal.m4: Rebuild with automake 1.2e.
984 * m10300-dis.c (print_insn_mn10300): Recognize break instruction.
988 * configure.in: Get the version number from BFD.
989 * configure: Rebuild.
992 * Makefile.am (libopcodes_la_LDFLAGS): Define.
993 * Makefile.in: Rebuild.
997 * m32r-opc.c: Regenerate.
998 * m32r-opc.h: Regenerate.
1002 * cgen-opc.in (@arch@_cgen_lookup_insn): New argument alias_p.
1003 Ignore ALIAS insns if asked to.
1004 (@arch@_cgen_get_insn_operands): Pass 0 for alias_p, NULL for insn.
1005 * m32r-opc.c: Regenerate.
1008 * dvp.opc.c: Nicely format opcode tables.
1009 (vu_operands): New element UFLAGS.
1010 (parse_uflags,print_uflags): New functions.
1011 (vu_upper_opcodes): Add UFLAGS to all insns.
1016 Fix rac to accept only a0:
1017 * d10v-opc.c (d10v_predefined_registers, d10v_operands, d10v_opcodes):
1018 Split OPERAND_ACC into OPERAND_ACC0 and OPERAND_ACC1.
1019 Introduce OPERAND_GPR.
1020 * d10v-dis.c (print_operand): Likewise.
1024 * cgen-opc.in: New file.
1026 * Makefile.am (CGENFILES): Add cgen-opc.in.
1027 * Makefile.in: Regenerate.
1029 * cgen-opc.c (cgen_set_cpu): Delete init of hw list `next' chain.
1030 (cgen_hw_lookup): Make result const.
1032 * cgen-dis.in (*): Use PTR instead of void *.
1033 (print_insn): Delete unused vars `i', `syntax'.
1035 * m32r-opc.h, m32r-opc.c, m32r-asm.c, m32r-dis.c: Regenerate.
1040 * dvp-opc.c (*): pke,gpuif renamed to vif,gif.
1041 (vif_opcodes): Update renamed insns.
1042 * dvp-dis.c (*): Likewise.
1047 * configure, aclocal.m4: Rebuild with new libtool.
1052 * d30v-opc.c (repeat{,i} instructions): Repeat/repeati
1053 instructions use a PC relative branch, not absolute.
1058 * configure.in: Set libtool_enable_shared rather than
1059 libtool_shared. Remove diversion hack.
1060 * configure, Makefile.in, aclocal.m4: Rebuild with new libtool.
1064 * cgen-opc.c (cgen_set_cpu): Initialize hardware table.
1065 * m32r-opc.h, m32r-opc.c, m32r-asm.c, m32r-dis.c: Regenerate.
1069 * tic30-dis.c: New file.
1070 * disassemble.c (disassembler): Add bfd_arch_tic30 case.
1071 * configure.in: Handle bfd_tic30_arch.
1072 * Makefile.am: Rebuild dependencies.
1073 (CFILES): Add tic30-dis.c
1074 (ALL_MACHINES): Add tic30-dis.lo.
1075 * configure, Makefile.in: Rebuild.
1077 start-sanitize-m32rx
1080 * m32r-opc.c, m32r-opc.h, m32r-asm.c m32r-dis.c: Newly generated
1081 versions after updates to m32r.cpu to remove mulwhi-a, mulwlo-a,
1082 macwhi-a and macwlo-a instructions.
1088 * dvp-opc.c, fixed encoding of a bunch of instructions to
1089 be consistent with the asmvu assembler (and inconsistent
1090 with the specification).
1094 * dvp-opc.c, fixed order of pkemscal/pkemscalf instructions
1095 in the opcode table. The pkemscalf instruction must come first.
1099 * dvp-opc.c, MAXIi should be VUOP6(0x1d) instead of 0x2d.
1104 * m32r-opc.h (HAVE_CPU_M32R): Define.
1109 * dvp-dis.c, dvp-opc.c: New files.
1110 * configure.in: Compile them if bfd_dvp_arch, as well as mips.
1111 * configure: Regenerate.
1112 * Makefile.am (ALL_MACHINES): Add dvp-{dis,opc}.lo.
1113 (dvp-dis.lo,dvp-opc.lo): Add rules for.
1114 (mips-dis.lo): Compile with @archdefs@.
1115 * Makefile.in: Regenerate.
1116 * disassemble.c: Define ARCH_mips ifdef ARCH_dvp.
1117 * mips-dis.c (print_insn_little_mips): Check for DVP insns.
1122 * v850-opc.c (insertion routines): If both alignment and size is
1123 wrong then report this.
1127 * mips-dis.c (_print_insn_mips): Set target_processor as appropriate.
1128 Only recognize instructions for the current target_processor.
1132 * d10v-dis.c (PC_MASK): Correct value.
1133 (print_operand): If there's a reloc, don't calculate the
1134 address because they could be in different sections.
1136 start-sanitize-cygnus
1139 * cgen.sh: Rewrite to be like simulator's version.
1140 * Makefile.am (cgen): Update call to cgen.sh.
1141 * Makefile.in: Regenerate
1146 * mips-opc.c (mips_builtin_opcodes): Move 4010's "addciu"
1147 instruction after the 4650's "mul" instruction; nobody's using the
1148 4010 these days. If object files someday indicate which processor
1149 variant they're intended for, we can do a better job at this.
1151 start-sanitize-r5900
1154 * mips-opc.c (c.lt.s): Add r5900 variant.
1160 * cgen-asm.c (build_asm_hash_table): Traverse compiled in table using
1161 table provided entry size. Use CGEN_INSN_MNEMONIC.
1162 (cgen_parse_keyword): Rewrite.
1163 * cgen-dis.c (build_dis_hash_table): Traverse compiled in table using
1164 table provided entry size. Use CGEN_INSN_MASK_BITSIZE.
1165 * cgen-opc.c: Clean up pass over `struct foo' usage.
1166 (cgen_keyword_lookup_value): Handle "" entry.
1167 (cgen_keyword_add): Likewise.
1168 start-sanitize-cygnus
1169 * Makefile.am: Add cgen support.
1170 * Makefile.in: Regenerate.
1171 * configure.in: Add cgen support.
1172 * configure: Regenerate.
1173 * aclocal.m4: Regenerate.
1174 * cgen.sh, cgen-asm.in, cgen-dis.in: New files.
1179 * mips-opc.c: Add FP_D to s.d instruction flags.
1183 * m68k-opc.c (halt, pulse): Enable them on the 68060.
1185 start-sanitize-tic80
1188 * tic80-opc.c (tic80_opcodes): Revert change that put the 32 bit
1189 PC relative offset forms before the 15 bit forms. An assembler command
1190 line option now chooses the default.
1193 start-sanitize-r5900
1196 * mips-opc.c: Add many missing r5900 instructions.
1202 * d30v-opc.c (d30v_opcode_table): Set new flags bits
1203 FLAG_{2WORD,MUL{16,32},ADDSUBppp}, in appropriate instructions.
1208 * configure: Only build libopcodes shared if --enable-shared's value
1209 was `yes', or was set to `*opcodes*'.
1210 * aclocal.m4: Likewise.
1211 * NOTE: this really needs to be fixed in libtool/libtool.m4, the
1212 original source of this bit of code. It's not clear what the best fix
1215 start-sanitize-r5900
1218 * mips-opc.c (mtpc, mfpc, mtps, mfps): Add r5900 variants.
1220 start-sanitize-tic80
1223 * tic80-opc.c (OFF_SL_PC, OFF_SL_BR): Minor formatting change.
1224 (tic80_opcodes): Reorder table entries to put the 32 bit PC relative
1225 offset forms before the 15 bit forms, to default to the long forms.
1230 * alpha-opc.c (cvttq/*u*): Remove, as that suffix is invalid.
1234 * arm-dis.c (print_insn_little_arm): Prevent examination of stored
1235 symbol if none is present.
1236 (print_insn_big_arm): Prevent examination of stored symbol if
1241 * d10v-opc.c (d10v_opcodes): Correct entry for RTE.
1245 * disassemble.c: Remove disasm_symaddr() function.
1247 * arm-dis.c: Use info->symbol instead of info->flags to determine
1248 if disassmbly should be in Thumb or Arm mode.
1252 * arm-dis.c: Add support for disassembling Thumb opcodes.
1253 (print_insn_thumb): New function.
1255 * disassemble.c (disasm_symaddr): New function.
1257 * arm-opc.h: Display nop pseudo ops alongside equivalent disassembly.
1258 (thumb_opcodes): Table of Thumb opcodes.
1262 * m68k-opc.c (btst): Change Dd@s to Dd;b.
1264 * m68k-dis.c (print_insn_arg): Recognize 'm', 'n', 'o', 'p', 'q',
1265 and 'v' as operand types.
1269 * m68k-opc.c: Add argument for lpstop. From Olivier Carmona
1271 * m68k-dis.c (print_insn_m68k): Handle special case of lpstop,
1272 which has a two word opcode with a one word argument.
1277 * d30v-opc.c (d30v_opcode_table, case cmpu): Immediate field is
1278 unsigned, not signed.
1279 (d30v_format_table): Add SHORT_CMPU cases for cmpu.
1284 * sh-dis.c (print_insn_shx): Recognize all sh4 additions.
1285 * sh-opc.h (fmov): Add @<REG_M>+,<DX_REG_N> variant for sh4.
1286 (ftrv): Slay the cut-and-paste monster.
1290 * d10v-dis.c (print_operand):
1291 Split OPERAND_FLAG into OPERAND_FFLAG and OPERAND_CFLAG.
1295 * d10v-opc.c (OPERAND_FLAG): Split into:
1296 (OPERAND_FFLAG, OPERAND_CFLAG) .
1302 * mips-opc.c: Move the INSN_MACRO ISA value to the membership
1303 field for all INSN_MACRO's.
1304 * mips16-opc.c: same
1308 * mips-opc.c (sync,cache): These are 3900 insns.
1312 sh-opc.h (sh_table): Remove ftst/nan.
1314 start-sanitize-vr5400
1317 * mips-opc.c (dror32, dror, rzu.ob): Fix bugs in encoding.
1318 (c.*.ob, mula.ob, mull.ob, muls.ob, mulsl.ob): Put 'k' version
1320 * mips-dis.c (print_insn_arg): Handle VR5400 operand types.
1326 * mips-opc.c (deret,dmult,dmultu,madd,maddu,pref,sdbbp):
1327 Add tx49 insns and configury.
1332 * mips-opc.c (ffc, ffs): Fix mask.
1337 * d30v-opc.c (pre_defined_registers): Add eit_vb, int_s, and int_m
1343 * mips-opc.c: Fix bug in mask for "not" pseudo-instruction.
1344 start-sanitize-vr5400
1345 Added VR5400 instructions.
1346 (N5): New cpu-id macro.
1348 (WR_HILO, RD_HILO, MOD_HILO): New macros.
1352 * mips-opc.c: Fix bug in mask for "not" pseudo-instruction.
1353 (WR_HILO, RD_HILO, MOD_HILO): New macros.
1357 * v850-dis.c (disassemble): Replace // with /* ... */
1361 * sparc-opc.c: Add wr & rd for v9a asr's.
1362 * sparc-dis.c (print_insn_sparc): Recognize '_' and '/' for v9a asr's.
1363 (v9a_asr_reg_names): New variable.
1368 * sparc-opc.c (v9notv9a): New insn type.
1369 (IMPDEP): Move to the end to not conflict with edge8 et al.
1374 * mips-opc.c (bnezl,beqzl): Mark these as also tx39.
1378 * mips-opc.c: Note that 'jalx' is (probably incorrectly) marked I1.
1382 * v850-dis.c (disassemble): Use new symbol_at_address_func() field
1383 of disassemble_info structure to determine if an overlay address
1384 has a matching symbol in low memory.
1386 * dis-buf.c (generic_symbol_at_address): New (dummy) function for
1387 new symbol_at_address_func field in disassemble_info structure.
1391 * v850-opc.c (extract_d22): Use signed arithmatic.
1395 * mips-opc.c: Three op mult is not an ISA insn.
1399 * mips-opc.c: Fix formatting.
1403 * i386-dis.c (OP_E): Explicitly sign extend 8 bit values, rather
1404 than assuming that char is signed. Explicitly sign extend 16 bit
1405 values, rather than assuming that short is 16 bits.
1406 (OP_sI, OP_J, OP_DIR): Likewise.
1408 start-sanitize-v850e
1411 * v850-dis.c (v850_sreg_names): Use symbolic names for higher
1417 * v850-opc.c: Fix typo in comment.
1419 * v850-dis.c (disassemble): Add test of processor type when
1420 determining opcodes.
1424 * configure.in: Use a diversion to set enable_shared before the
1425 arguments are parsed.
1426 * configure: Rebuild.
1430 * m68k-opc.c (TBL1): Use ! rather than `.
1431 * m68k-dis.c (print_insn_arg): Remove ` operand specifier.
1435 * m68k-opc.c: Correct bchg, bclr, bset, and btst on ColdFire.
1437 * m68k-opc.c: Accept tst{b,w,l} with immediate operands on cpu32.
1439 * m68k-opc.c: Correct movew of an immediate operand to %sr or %ccr
1442 * configure.in: Call AC_CHECK_TOOL before AM_PROG_LIBTOOL.
1443 * aclocal.m4: Rebuild with new libtool.
1444 * configure: Rebuild.
1446 start-sanitize-v850e
1449 * v850-opc.c ("cmov"): Order reg param r1, r2 not r2, r2.
1454 * sparc-opc.c (sparclet_cpreg_table): Add %ccsr2, %cccrr, %ccrstr.
1458 * v850-opc.c (v850_opcodes): Further rearrangements.
1463 * d30v-opc.c (rot2h, sra2h, srl2h insns): Revert last change.
1468 * v850-opc.c (v850_opcodes): Fields reordered to allow assembler
1473 * mips-opc.c: Added tx39 insns sdbbp, rfe, and deret.
1475 * mips16-opc.c: Added mips16 sdbbp.
1480 * v850-opc.c: Initialise processors field of v850_opcode structure.
1485 Merge changes from Martin Hunt:
1487 * d30v-opc.c: Change mvfacc to accept 6-bit unsigned values.
1489 * d30v-opc.c (pre_defined_registers): Add control registers from 0-63.
1490 (d30v_opcode_tabel): Add dbt, rtd, srah, and srlh instructions. Fix
1491 rot2h, sra2h, and srl2h to use new SHORT_A5S format.
1493 * d30v-dis.c (print_insn): Fix disassembly of SHORT_D2 opcodes.
1495 * d30v-dis.c (print_insn): First operand of d*i (delayed
1496 branch) instructions is relative.
1498 * d30v-opc.c (d30v_opcode_table): Change form for repeati.
1499 (d30v_operand_table): Add IMM6S3 type.
1500 (d30v_format_table): Change SHORT_D2. Add LONG_Db.
1502 * d30v-dis.c: Fix bug with ".s" and ".l" extensions
1503 and cmp instructions.
1505 * d30v-opc.c: Correct entries for repeat*, and sat*.
1506 Make IMM5 unsigned. Create IMM6U and IMM12S3U operand
1507 types. Correct several formats.
1509 * d30v-opc.c: (pre_defined_registers): Add dpsw and dpc.
1511 * d30v-opc.c (pre_defined_registers): Change control registers.
1513 * d30v-opc.c (d30v_format_table): Correct SHORT_C1 and
1514 SHORT_C2. Manual was incorrect.
1516 * d30v-dis.c (lookup_opcode): Return value now indicates
1517 if an opcode has a short and a long form. Used for deciding
1518 to append a ".s" or ".l".
1519 (print_insn): Append a ".s" to an instruction if it is
1520 the short form and ".l" if it is a long form. Do not append
1521 anything if the instruction has only one possible size.
1523 * d30v-opc.c: Change mulx2h to require an even register.
1524 New form: SHORT_A2; a SHORT_A form that needs an even
1525 register as the first operand.
1527 * d30v-dis.c (print_insn_d30v): Fix problem where the last
1528 instruction was not being disassembled if there were an odd
1529 number of instructions.
1531 * d30v-opc.c (SHORT_M2, LONG_M2): Two new forms.
1534 start-sanitize-v850e
1537 * v850-dis.c (disassemble): Improved display of register lists.
1542 * sparc-opc.c (sparc_opcodes): Fix assembler args to
1543 fzeros, fones, fsrc1, fsrc1s, fsrc2s, fnot1, fnot1s, fnot2s,
1544 fors, fnors, fands, fnands, fxors, fxnors, fornot1s, fornot2s,
1545 fandnot1s, fandnot2s.
1549 * sparc-opc.c (sparc_opcodes): Fix op3 field for fcmpq/fcmpeq.
1553 * cgen-asm.c (cgen_parse_address): New argument resultp.
1554 All callers updated.
1555 * m32r-asm.c (parse_h_hi16): Right shift numbers by 16.
1559 * mn10200-dis.c (disassemble): PC relative instructions are
1560 relative to the next instruction, not the current instruction.
1564 * v850-dis.c (disassemble): Only signed extend values that are not
1565 returned by extract functions.
1566 Remove use of V850_OPERAND_ADJUST_SHORT_MEMORY flag.
1570 * v850-opc.c: Update comments. Remove use of
1571 V850_OPERAND_ADJUST_SHORT_MEMORY. Fix several operand patterns.
1575 * v850-opc.c (MOVHI): Immediate parameter is unsigned.
1579 * configure: Rebuilt with latest devo autoconf for NT support.
1583 * v850-dis.c (disassemble): Use curly brace syntax for register
1586 * v850-opc.c (v850_opcodes[]): Add NOT_R0 flag to decect cases
1587 where r0 is being used as a destination register.
1589 start-sanitize-v850e
1592 * v850-opc.c (v850_opcodes[]): Move divh opcodes next to each other.
1597 * sh-opc.h (sh_arg_type): Add A_SGR and A_DBR.
1598 (sh_nibble_type, sh_arg_type): Add SH4 floating point extensions.
1599 (sh_table): Likewise. Add movca.l, ocbi, ocbp, ocbwb.
1600 Add insns to access SGR and DBR.
1601 * sh-dis.c (print_insn_shx): Add SH4 floating point extensions.
1605 * alpha-opc.c (alpha_opcodes): Fix hw_rei_stall mungage.
1607 start-sanitize-v850e
1610 * v850-opc.c (v850_opcodes[]): Remove use of flag field.
1611 * v850-opc.c (v850_opcodes[]): Add support for reversed short load
1616 * configure (cgen_files): Add support for v850e target.
1617 * configure.in (cgen_files): Add support for v850e target.
1621 * configure (cgen_files): Add support for v850ea target.
1622 * configure.in (cgen_files): Add support for v850ea target.
1627 * configure.in (bfd_arc_arch): Add.
1628 * configure: Rebuild.
1629 * Makefile.am (ALL_MACHINES): Add arc-dis.lo, arc-opc.lo.
1630 * Makefile.in: Rebuild.
1631 * arc-dis.c, arc-opc.c: New files.
1632 * disassemble.c (ARCH_all): Define ARCH_arc.
1633 (disassembler): Add ARC support.
1637 start-sanitize-v850e
1638 * v850-dis.c (disassemble): Add support for v850EA instructions.
1640 * v850-opc.c (insert_i5div, extract_i5div): New Functions.
1641 (v850_opcodes): Add v850EA instructions.
1643 * v850-dis.c (disassemble): Add support for v850E instructions.
1645 * v850-opc.c (insert_d5_4, extract_d5_4, insert_d16_16,
1646 extract_d16_16, insert_i9, extract_i9, insert_u9, extract_u9,
1647 insert_spe, extract_spe): New Functions.
1648 (v850_opcodes): Add v850E instructions.
1651 * v850-opc.c: Reorganised and re-layed out to improve readability
1656 * configure: Rebuild with autoconf 2.12.1.
1660 * aclocal.m4, configure: Rebuild with new automake patches.
1664 * configure.in: Set enable_shared before AM_PROG_LIBTOOL.
1665 * acinclude.m4: Just include acinclude.m4 from BFD.
1666 * aclocal.m4, configure: Rebuild.
1670 * Makefile.am: New file, based on old Makefile.in.
1671 * acconfig.h: New file.
1672 * acinclude.m4: New file.
1673 * stamp-h.in: New file.
1674 * configure.in: Call AM_INIT_AUTOMAKE and AM_PROG_LIBTOOL.
1675 Removed shared library handling; now handled by libtool. Replace
1676 AC_CONFIG_HEADER with AM_CONFIG_HEADER. Call AM_MAINTAINER_MODE,
1677 AM_CYGWIN32, and AM_EXEEXT. Replace AC_PROG_INSTALL with
1678 AM_PROG_INSTALL. Change all .o files to .lo. Remove stamp-h
1679 handling in AC_OUTPUT.
1680 * dep-in.sed: Change .o to .lo.
1681 * Makefile.in: Now built with automake.
1682 * aclocal.m4: Now built with aclocal.
1683 * config.in, configure: Rebuild.
1687 * mips-opc.c: Fix typo/thinko in "eret" instruction.
1689 start-sanitize-r5900
1692 * mips-opc.c: Fix coding of mtsa.
1697 * sparc-opc.c (sparc_opcodes): Fix spelling on fpaddX, fpsubX insns.
1699 * sparc-dis.c (sorted_opcodes): New static local.
1700 (struct opcode_hash): `opcode' is pointer to const element.
1701 (build_hash): First arg is now table of sorted pointers.
1702 (print_insn_sparc): Sort opcodes by sorting table of pointers.
1703 (compare_opcodes): Update.
1707 * cgen-opc.c: #include <ctype.h>.
1708 (hash_keyword_name): New arg `case_sensitive_p'. Callers updated.
1709 Handle case insensitive hashing.
1710 (hash_keyword_value): Change type of `value' to unsigned int.
1714 * mips-opc.c (mips_builtin_opcodes): If an insn uses single
1715 precision FP, mark it as such. Likewise for double precision
1716 FP. Mark ISA1 insns. Consolidate duplicate opcodes where
1718 start-sanitize-r5900
1719 (mips_builtin_opcodes): Remove non-existant r5900 instructions
1722 start-sanitize-r5900
1725 * mips-opc.c (mips_builtin_opcodes): Add "pinteh", "pexeh" and
1726 "pexew" as synonyms for "pintoh", "pexoh", "pexow".
1731 * ppc-opc.c (extract_nsi): make unsigned expression signed before
1733 (UNUSED): remove one level of parens, so MSVC doesn't choke on
1734 nesting depth when all the macros are expanded.
1738 * sparc-opc.c: The fcmp v9a instructions take an integer register
1739 as a destination, not a floating point register. From Christian
1744 * m68k-dis.c (print_insn_arg): Print case 7.2 using %pc@()
1745 syntax. From Roman Hodek
1748 * i386-dis.c (twobyte_has_modrm): Fix pand.
1752 * i386-dis.c (dis386_twobyte): Fix pand and pandn.
1756 * arm-dis.c: Add prototypes for arm_decode_shift and
1761 * mips-opc.c: Add r3900 insns.
1765 * sh-dis.c (print_insn_shx): Change relmask to bfd_vma. Don't
1766 print delay slot instructions on the same line. When using a PC
1767 relative load, add a comment with the value being loaded if it can
1772 * i386-dis.c (dis386[], dis386_twobyte[]): change pushl/popl
1773 to pushS/popS for segment regs and byte constant so that
1774 pushw/popw printed when in 16 bit data mode.
1776 * i386-dis.c (dis386[]): change cwtl, cltd to cWtS, cStd to
1777 print cbtw, cwtd in 16 bit data mode.
1778 * i386-dis.c (putop): extra case W to support above.
1780 * i386-dis.c (print_insn_x86): print addr32 prefix when given
1781 address size prefix in 16 bit address mode.
1785 * sh-dis.c: Reindent. Rename local variable fprintf to
1790 * m32r-opc.c (m32r_cgen_insn_table, cmpui): Undo patch of May 2.
1794 * mips-opc.c (mips_builtin_opcodes): Moved INSN_ISA field into new
1796 * mips16-opc.c (mip16_opcodes): same.
1800 * m68k-opc.c (moveb): Change $d to %d.
1804 * i386-dis.c: (dis386_twobyte): Add MMX instructions.
1805 (twobyte_has_modrm): Likewise.
1807 (OP_MMX, OP_EM, OP_MS): New static functions.
1809 * i386-dis.c: Revert patch of April 4. The output now matches
1814 * m32r-opc.c (m32r_cgen_insn_table, cmpui): Use $uimm16 instead
1819 * m32r-opc.h (CGEN_ARCH): Renamed from CGEN_CPU.
1823 * Makefile.in (install): Depend upon installdirs.
1824 (installdirs): New target.
1829 * configure.in: Use ${CONFIG_SHELL} when running $ac_config_sub.
1830 * configure: Rebuild.
1834 * cgen-*.c, m32r-*.c: #include sysdep.h instead of config.h.
1835 Delete string{,s}.h support.
1839 * cgen-asm.c (cgen_parse_operand_fn): New global.
1840 (cgen_parse_{{,un}signed_integer,address}): Update call to
1841 cgen_parse_operand_fn.
1842 (cgen_init_parse_operand): New function.
1843 * m32r-asm.c (parse_insn_normal): cgen_init_parse_operand renamed
1844 from cgen_asm_init_parse.
1845 (m32r_cgen_assemble_insn): New operand `errmsg'.
1846 Delete call to as_bad, return error message to caller.
1847 (m32r_cgen_asm_hash_keywords): #if 0 out.
1851 * m68k-dis.c (print_insn_arg) [case 'd']: Print as address register,
1853 [case 'J']: Fix typo in register name.
1857 * configure.in: Substitute SHLIB_LIBS.
1858 * configure: Rebuild.
1859 * Makefile.in (SHLIB_LIBS): New variable.
1860 ($(SHLIB)): Use $(SHLIB_LIBS).
1864 * cgen-dis.c (build_dis_hash_table): Fix xmalloc size computation.
1866 * cgen-opc.c (hash_keyword_name): Improve algorithm.
1868 * disassemble.c (disassembler): Handle m32r.
1872 * m32r-asm.c, m32r-dis.c, m32r-opc.c, m32r-opc.h: New files.
1873 * cgen-asm.c, cgen-dis.c, cgen-opc.c: New files.
1874 * Makefile.in (CFILES): Add them.
1875 (ALL_MACHINES): Add them.
1876 (dependencies): Regenerate.
1877 * configure.in (cgen_files): New variable.
1878 (bfd_m32r_arch): Add entry.
1879 * configure: Regenerate.
1883 * configure.in: Correct file names for bfd_mn10[23]00_arch.
1884 * configure: Rebuild.
1886 * Makefile.in: Rebuild dependencies.
1888 * d10v-dis.c: Include "ansidecl.h" before "opcode/d10v.h".
1890 * i386-dis.c (float_reg): Swap fsubrp and fsubp. Swap fdivrp and
1895 * Branched binutils 2.8.
1899 * m10200-dis.c: Rename from mn10200-dis.c.
1900 * m10200-opc.c: Rename from mn10200-opc.c.
1901 * m10300-dis.c: Rename from mn10300-dis.c
1902 * m10300-opc.c: Rename from mn10300-opc.c.
1903 * Makefile.in: Update accordingly.
1905 * mips16-opc.c: Add mul and dmul macros.
1909 * makefile.vms: Update CFLAGS, add clean target.
1913 * mips-opc.c: Add "wait". From Ralf Baechle
1916 * configure.in: Add stdlib.h to AC_CHECK_HEADERS list.
1917 * configure, config.in: Rebuild.
1918 * sysdep.h: Include <stdlib.h> if it exists.
1919 * sparc-dis.c: Include <stdio.h> and "sysdep.h". Don't include
1921 * Makefile.in: Rebuild dependencies.
1925 * ppc-opc.c: Add PPC 403 instructions and extended opcodes. From
1928 * mips-opc.c: Add cast when setting mips_opcodes.
1932 * v850-dis.c (disassemble): Fix sign extension problem.
1933 * v850-opc.c (extract_d*): Fix sign extension problems to make
1934 disassembly calculate branch offsets correctly.
1938 * sh-opc.h: Add bf/s and bt/s as synonyms for bf.s and bt.s.
1940 * mips-opc.c: Add dctr and dctw.
1945 * d30v-dis.c (print_insn): Change the way signed constants
1950 * Makefile.in (BFD_H): New variable.
1951 (HFILES): New variable.
1952 (CFILES): Add all C files.
1953 (.dep, .dep1, dep.sed, dep, dep-in): New targets.
1954 Delete old dependencies, and build new ones.
1955 * dep-in.sed: New file.
1959 * m68k-opc.c (m68k_opcode_aliases): Added blo and blo{s,b,w,l}.
1961 start-sanitize-coldfire
1964 * m68k-opc.c (m68k_opcodes): Provide coldfire division module
1967 end-sanitize-coldfire
1970 * mn10200-opc.c: Change "trap" to "syscall".
1971 * mn10300-opc.c: Add new "syscall" instruction.
1975 * m68k-opc.c (m68k_opcodes): Provide correct entries for mulsl and
1976 mulul insns on the coldfire.
1980 * arm-dis.c (print_insn_arm): Don't print instruction bytes.
1981 (print_insn_big_arm): Set bytes_per_chunk and display_endian.
1982 (print_insn_little_arm): Likewise.
1987 * i386-dis.c (fetch_data): Add prototype.
1988 * m68k-dis.c (fetch_data): Add prototype.
1989 (dummy_print_address): Add prototype. Make static.
1990 * ppc-opc.c (valid_bo): Add prototype.
1991 * sparc-dis.c (build_hash_table): Add prototype.
1992 (is_delayed_branch, compute_arch_mask): Add prototypes.
1993 (print_insn_sparc): Make several local variables const.
1994 (compare_opcodes): Change arguments to const PTR. Add prototype.
1995 * sparc-opc.c (arg): Change name field to be const.
1996 (lookup_name, lookup_value): Add prototypes. Change table and
1997 name parameters to be const.
1998 (sparc_encode_asi): Change name parameter to be const.
1999 (sparc_encode_membar, sparc_encode_prefetch): Likewise.
2000 (sparc_encode_sparclet_cpreg): Likewise.
2001 (sparc_decode_asi): Change return type to be const.
2002 (sparc_decode_membar, sparc_decode_prefetch): Likewise.
2003 (sparc_decode_sparclet_cpreg): Likewise.
2007 * Makefile.in ($(SHLINK)): Just use ln -s, not ln -sf, since
2008 Solaris doesn't like the combined options, and the -f is
2010 (stamp-tshlink, install): Likewise.
2014 * mn10300-opc.c (IMM16_PCREL, SD8N_PCREL, D16_SHIFT): Mark these
2019 * m68k-opc.c (m68k_opcodes): Fix last change for the mc68010.
2023 * m68k-opc.c (m68k_opcodes): Added entries for the tst insns on
2028 * m68k-opc.c (m68k_opcodes): Added swbegl pseudo-instruction.
2030 start-sanitize-tic80
2033 * tic80-dis.c (print_insn_tic80): Set info->bytes_per_line to 8.
2037 * tic80-opc.c (tic80_predefined_symbols): Define r25 properly.
2042 * m68k-dis.c (NEXTSINGLE, NEXTDOUBLE, NEXTEXTEND): Use
2043 floatformat_to_double to make portable.
2044 (print_insn_arg): Use NEXTEXTEND macro when extracting extended
2049 * mips-opc.c: Initialize mips_opcodes to mips_builtin_opcodes,
2050 and bfd_mips_num_opcodes to bfd_mips_num_builtin_opcodes.
2054 * d10v-dis.c, d10v-opc.c: Change pre_defined_registers to
2055 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
2057 start-sanitize-tic80
2060 * tic80-opc.c (LSI_SCALED): Renamed from this ...
2061 (OFF_SL_BR_SCALED): ... to this, and added the flag
2062 TIC80_OPERAND_BASEREL to the flags word.
2063 (tic80_opcodes): Replace all occurances of LSI_SCALED with
2069 * mips-opc.c: Add macros for cop0, cop1 cop2 and cop3.
2070 Change mips_opcodes from const array to a pointer,
2071 and change bfd_mips_num_opcodes from const int to int,
2072 so that we can increase the size of the mips opcodes table
2075 start-sanitize-tic80
2078 * tic80-opc.c (tic80_predefined_symbols): Revert change to
2079 store BITNUM values in the table in one's complement form
2080 to match behavior when assembler is given a raw numeric
2081 value for a BITNUM operand.
2082 * tic80-dis.c (print_operand_bitnum): Ditto.
2088 * d30v-opc.c: Removed references to FLAG_X.
2093 * Makefile.in: Add dependencies on ../bfd/bfd.h as required.
2098 * Makefile.in: Added d30v object files.
2099 * configure: (bfd_d30v_arch) Rebuilt.
2100 * configure.in: (bfd_d30v_arch) Added new case.
2101 * d30v-dis.c: New file.
2102 * d30v-opc.c: New file.
2103 * disassemble.c (disassembler) Add entry for d30v.
2106 start-sanitize-tic80
2109 * tic80-opc.c (tic80_predefined_symbols): Add symbolic
2110 representations for the floating point BITNUM values.
2114 * tic80-opc.c (tic80_predefined_symbols): Store BITNUM values
2115 in the table in one's complement form, as they appear in the
2117 (tic80_symbol_to_value): Use macros to access predefined
2119 (tic80_value_to_symbol): Ditto.
2120 (tic80_next_predefined_symbol): New function.
2121 * tic80-dis.c (print_operand_bitnum): Remove code that did
2122 one's complement for BITNUM values.
2125 start-sanitize-r5900
2128 * mips-opc.c: bug fix, can't mark insns INSN_5900 and INSN_ISA4
2133 * makefile.vms: Remove 8 bit characters. Update to latest
2138 * m68k-opc.c (m68k_opcodes): Add swbeg pseudo-instruction.
2142 * mn10200-opc.c (IMM16_PCREL): This is a signed operand.
2143 (IMM24_PCREL): Likewise.
2147 * mips-dis.c (print_mips16_insn_arg): Use memaddr - 2 as the base
2148 address for an extended PC relative instruction that is not a
2153 * m68k-dis.c (print_insn_m68k): Set bytes_per_chunk and
2156 start-sanitize-tic80
2159 * tic80-opc.c (tic80_operands): Fix typo '+' -> '|'.
2160 (tic80_opcodes): Sort entries so that long immediate forms
2161 come after short immediate forms, making it easier for
2162 assembler to select the right one for a given operand.
2167 * mips-dis.c (_print_insn_mips): Set bytes_per_chunk and
2169 (print_insn_mips16): Likewise.
2171 start-sanitize-r5900
2174 * mips-opc.c: add r5900.
2177 start-sanitize-tic80
2180 * tic80-opc.c (tic80_symbol_to_value): Changed to accept
2181 a symbol class that restricts translation to just that
2182 class (general register, condition code, etc).
2186 * tic80-opc.c (tic80_operands): Add REG_0_E, REG_22_E,
2187 and REG_DEST_E for register operands that have to be
2188 an even numbered register. Add REG_FPA for operands that
2189 are one of the floating point accumulator registers.
2190 Add TIC80_OPERAND_MASK to flags for ENDMASK operand.
2191 (tic80_opcodes): Change entries that need even numbered
2192 register operands to use the new operand table entries.
2193 Add "or" entries that are identical to "or.tt" entries.
2198 * mips16-opc.c: Add new cases of exit instruction for
2200 * mips-dis.c (print_mips16_insn_arg): Display floating point
2201 registers in operands of exit instruction. Print `$' before
2202 register names in operands of entry and exit instructions.
2204 start-sanitize-tic80
2207 * tic80-opc.c (tic80_predefined_symbols): Table of name/value
2208 pairs for all predefined symbols recognized by the assembler.
2209 Also used by the disassembling routines.
2210 (tic80_symbol_to_value): New function.
2211 (tic80_value_to_symbol): New function.
2212 * tic80-dis.c (print_operand_control_register,
2213 print_operand_condition_code, print_operand_bitnum):
2214 Remove private tables and use tic80_value_to_symbol function.
2219 * d10v-dis.c (print_operand): Change address printing
2220 to correctly handle PC wrapping. Fixes PR11490.
2224 * mn10200-opc.c (mn10200_operands): Make 8 and 16 bit pc-relative
2229 * mips-dis.c (print_insn_mips16): Set insn_info information.
2230 (print_mips16_insn_arg): Likewise.
2232 * mips-dis.c (print_insn_mips16): Better handling of an extend
2233 opcode followed by an instruction which can not be extended.
2237 * m68k-opc.c (m68k_opcodes): Changed operand specifier for the
2238 coldfire moveb instruction to not allow an address register as
2239 destination. Although the documentation does not indicate that
2240 this is invalid, experiments uncovered unexpected behavior.
2241 Added a comment explaining the situation. Thanks to Andreas
2242 Schwab for pointing this out to me.
2244 start-sanitize-tic80
2247 * tic80-opc.c (tic80_opcodes): Expand comment to note that the
2248 entries are presorted so that entries with the same mnemonic are
2249 adjacent to each other in the table. Sort the entries for each
2250 instruction so that this is true.
2255 * m68k-dis.c: Include <libiberty.h>.
2256 (print_insn_m68k): Sort the opcode table on the most significant
2257 nibble of the opcode.
2259 start-sanitize-tic80
2262 * tic80-dis.c (tic80_opcodes): Add "wrcr", "vmpy", "vrnd",
2263 "vsub", "vst", "xnor", and "xor" instructions.
2264 (V_a1): Renamed from V_a, msb of accumulator reg number.
2265 (V_a0): Add macro, lsb of accumulator reg number.
2269 * tic80-dis.c (print_insn_tic80): Broke excessively long
2270 function up into several smaller ones and arranged for
2271 the instruction printing function to be callable recursively
2272 to print vector instructions that have both a load and a
2273 math instruction packed into a single opcode.
2274 * tic80-opc.c (tic80_opcodes): Expand comment for vld opcode
2275 to explain why it comes after the other vector opcodes.
2280 * m68k-opc.c (m68k_opcodes): add b, w, or l specifier to coldfire
2281 move insns to handle immediate operands.
2285 * m68k-opc.c (m68k_opcodes): Delete duplicate entry for "cmpil".
2286 fix operand mask in the "moveml" entries for the coldfire.
2288 start-sanitize-tic80
2291 * tic80-opc.c (V_a, V_m, V_S, V_Z, V_p, OP_V, MASK_V):
2292 New macros for building vector instruction opcodes.
2293 (tic80_opcodes): Remove all uses of FMT_SI, FMT_REG, and
2294 FMT_LI, which were unused. The field is now a flags field.
2295 Remove some opcodes that are possible, but illegal, such
2296 as long immediate instructions with doubles for immediate
2297 values. Add "vadd" and "vld" instructions.
2301 * tic80-opc.c (tic80_operands): Reorder some table entries to make
2302 the order more logical. Move the shift alias instructions ("rotl",
2303 "shl", "ins", "rotr", "extu", "exts", "srl", and "sra" to be
2304 interspersed with the regular sr.x and sl.x instructions. Add
2305 and test new instruction opcodes for "sl", "sli", "sr", "sri", "st",
2306 "sub", "subu", "swcr", and "trap".
2310 * tic80-opc.c (OFF_SS_PC): Renamed from OFF_SS.
2311 (OFF_SL_PC): Renamed from OFF_SL.
2312 (OFF_SS_BR): New operand type for base relative operand.
2313 (OFF_SL_BR): New operand type for base relative operand.
2314 (REG_BASE): New operand type for base register operand.
2315 (tic80_opcodes): Add and test "fmpy", "frndm", "frndn", "frndp",
2316 "frndz", "fsqrt", "fsub", "illop0", "illopF", "ins", "jsr",
2317 "ld", "ld.u", "lmo", "or", "rdcr", "rmo", "rotl", and "rotr"
2319 * tic80-dis.c (print_insn_tic80): Print opcode name with fixed width
2320 10 char field, padded with spaces on rhs, rather than a string
2321 followed by a tab. Use renamed TIC80_OPERAND_PCREL flag bit rather
2322 than old TIC80_OPERAND_RELATIVE. Add support for new
2323 TIC80_OPERAND_BASEREL flag bit.
2327 * tic80-dis.c (print_insn_tic80): Print floating point operands
2329 * tic80-opc.c (SPFI): Add single precision floating point
2330 immediate operand type.
2331 (ROTATE): Add rotate operand type for shifts.
2332 (ENDMASK): Add for shifts.
2333 (n): Macro for the 'n' bit.
2334 (i): Macro for the 'i' bit.
2335 (PD): Macro for the 'PD' field.
2336 (P2): Macro for the 'P2' field.
2337 (P1): Macro for the 'P1' field.
2338 (tic80_opcodes): Add entries for "exts", "extu", "fadd",
2344 * mn10200-dis.c (disassemble): Mask off unwanted bits after
2345 adding in current address for pc-relative operands.
2347 start-sanitize-tic80
2350 * tic80-dis.c (R_SCALED): Add macro to test for ":s" modifier bit.
2351 (print_insn_tic80): If R_SCALED then print ":s" modifier for operand.
2352 * tic80-opc.c (REG0, REG22, REG27, SSOFF, LSOFF): Names
2353 changed to REG_0, REG_22, REG_DEST, OFF_SS, OFF_SL respectively.
2354 (SICR, LICR, REGM_SI, REGM_LI): Names changed to CR_SI, CR_LI,
2355 REG_BASE_M_SI, REG_BASE_M_LI respectively.
2356 (REG_SCALED, LSI_SCALED): New operand types.
2357 (E): New macro for 'E' bit at bit 27.
2358 (tic80_opcodes): Add and test dld, dld.u, dst, estop, and etrap
2359 opcodes, including the various size flavors (b,h,w,d) for
2360 the direct load and store instructions.
2364 * tic80-dis.c (M_SI, M_LI): Add macros to test for ":m" modifier bit
2366 * tic80-dis.c (print_insn_tic80): Change comma and paren handling.
2367 Use M_SI and M_LI macros to check for ":m" modifier for GPR operands.
2368 * tic80-opc.c (tic80_operands): Add REGM_SI and REGM_LI operands.
2369 (F, M_REG, M_LI, M_SI, SZ_REG, SZ_LI, SZ_SI, D, S): New bit-twiddlers.
2370 (MASK_LI_M, MASK_SI_M, MASK_REG_M): Remove and replace in opcode
2371 masks with "MASK_* & ~M_*" to get the M bit reset.
2372 (tic80_opcodes): Add bsr, bsr.a, cmnd, cmp, dcachec, and dcachef.
2376 * tic80-dis.c (print_insn_tic80): Print TIC80_OPERAND_RELATIVE
2377 correctly. Add support for printing TIC80_OPERAND_BITNUM and
2378 TIC80_OPERAND_CC, and TIC80_OPERAND_CR operands in symbolic
2380 * tic80-opc.c (tic80_operands): Add SSOFF, LSOFF, BITNUM,
2381 CC, SICR, and LICR table entries.
2382 (tic80_opcodes): Add and test "nop", "br", "bbo", "bbz",
2383 "bcnd", and "brcr" opcodes.
2388 * ppc-opc.c (powerpc_operands): Make comment match the
2389 actual fields (no shift field).
2390 * sparc-opc.c (sparc_opcodes): Document why this cannot be "const".
2391 start-sanitize-tic80
2392 * tic80-dis.c (print_insn_tic80): Replace abort stub with a
2393 partial implementation, work in progress.
2394 * tic80-opc.c (tic80_operands): Begin construction operands table.
2395 (tic80_opcodes): Continue populating opcodes table and start
2396 filling in the operand indices.
2397 (tic80_num_opcodes): Add this.
2402 * m68k-opc.c: Add #B case for moveq.
2406 * mn10300-dis.c (disassemble): Make sure all variables are initialized
2407 before they are used.
2411 * v850-opc.c (v850_opcodes): Put curly-braces around operands
2412 for "breakpoint" instruction.
2416 * Makefile.in (ALL_CFLAGS): Add -D_GNU_SOURCE.
2417 (dep): Use ALL_CFLAGS rather than CFLAGS.
2421 * v850-opc.c (D8_{6,7}): Set V850_OPERAND_ADJUST_SHORT_MEMORY
2426 * Makefile.in (m68k-opc.o, alpha-opc.o): Remove dis-asm.h dependency.
2427 start-sanitize-tic80
2428 (tic80-dis.o, tic80-opc.o): Add rules per comment in Makefile.in.
2433 * mips16-opc.c: Add "abs".
2435 start-sanitize-tic80
2438 * Makefile.in (ALL_MACHINES): Add tic80-dis.o and tic80-opc.o.
2439 * disassemble.c (ARCH_tic80): Define if ARCH_all is defined.
2440 (disassembler): Add bfd_arch_tic80 support to set disassemble
2441 to print_insn_tic80.
2442 * tic80-dis.c (print_insn_tic80): Add stub.
2446 * configure.in (arch in $selarchs): Add bfd_tic80_arch entry.
2447 * configure: Regenerate with autoconf.
2448 * tic80-dis.c: Add file.
2449 * tic80-opc.c: Add file.
2454 * d10v-opc.c (pre_defined_registers): Add cr[0-15], dpc, dpsw, link.
2458 * mn10200-opc.c (mn10200_operands): Add SIMM16N.
2459 (mn10200_opcodes): Use it for some logicals and btst insns.
2460 Add "break" and "trap" instructions.
2462 * mn10300-opc.c (mn10300_opcodes): Add "break" instruction.
2464 * mn10200-opc.c: Add pseudo-ops for "mov (an),am" and "mov an,(am)".
2468 * mips-dis.c (print_mips16_insn_arg): The base address of a PC
2469 relative load or add now depends upon whether the instruction is
2474 * mn10200-dis.c: Finish writing disassembler.
2475 * mn10200-opc.c (mn10200_opcodes): Fix mask for "mov imm8,dn".
2476 Fix mask for "jmp (an)".
2478 * mn10300-dis.c (disassemble, print_insn_mn10300): Corrently
2479 handle endianness issues for mn10300.
2481 * mn10200-opc.c (mn10200_opcodes): Fix operands for "movb dm,(an)".
2485 * mn10200-opc.c (mn10200_opcodes): "mov imm8,d0" is a format 2
2486 instruction. Fix opcode field for "movb (imm24),dn".
2488 * mn10200-opc.c (mn10200_operands): Fix insertion position
2493 * mn10200-opc.c: Create mn10200 opcode table.
2494 * mn10200-dis.c: Flesh out mn10200 disassembler. Not ready,
2495 but moving along nicely.
2499 * Makefile.in (ALL_MACHINES): Add mips16-opc.o.
2503 * m68k-opc.c (m68k_opcodes): Revert change to use < and >
2504 specifiers for fmovem* instructions.
2508 * mn10300-dis.c (disassemble): Remove '$' register prefixing.
2512 * mips16-opc.c: Change opcode for entry/exit to avoid conflicting
2517 * mn10300-opc.c: Add some comments explaining the various
2520 * mn10300-dis.c (disassemble): Fix minor gcc -Wall warnings.
2524 * m68k-dis.c (print_insn_arg): Handle new < and > operand
2527 * m68k-opc.c (m68k_opcodes): Simplify table by using < and >
2528 operand specifiers in fmovm* instructions.
2532 * ppc-opc.c (insert_li): Give an error if the offset has the two
2533 least significant bits set.
2537 * mips-dis.c (print_insn_mips16): Separate the instruction from
2538 the arguments with a tab, not a space.
2542 * mn10300-dis.c (disasemble): Finish conversion to '$' as
2545 * mn10300-opc.c (mn10300_opcodes): Fix mask field for
2550 * configure: Rebuild with autoconf 2.12.
2552 Add support for mips16 (16 bit MIPS implementation):
2553 * mips16-opc.c: New file.
2554 * mips-dis.c: Include "elf-bfd.h" and "elf/mips.h".
2555 (mips16_reg_names): New static array.
2556 (print_insn_big_mips): Use print_insn_mips16 in 16 bit mode or
2557 after seeing a 16 bit symbol.
2558 (print_insn_little_mips): Likewise.
2559 (print_insn_mips16): New static function.
2560 (print_mips16_insn_arg): New static function.
2561 * mips-opc.c: Add jalx instruction.
2562 * Makefile.in (mips16-opc.o): New target.
2563 * configure.in: Use mips16-opc.o for bfd_mips_arch.
2564 * configure: Rebuild.
2568 * m68k-opc.c (m68k_opcodes): Simplify table by using < and >
2569 operand specifiers in *save, *restore and movem* instructions.
2571 * m68k-opc.c (m68k_opcodes): Fix move and movem instructions for
2574 * m68k-opc.c (m68k_opcodes): The coldfire (mcf5200) can only use
2575 register operands for immediate arithmetic, not, neg, negx, and
2576 set according to condition instructions.
2578 * m68k-opc.c (m68k_opcodes): Consistantly Use "s" as the storage
2579 specifier of the effective-address operand in immediate forms of
2580 arithmetic instructions. The specifier for the immediate operand
2581 notes how and where the constant will be stored.
2585 * mn10300-opc.c (mn10300_opcodes): Remove redundant "lcc"
2588 * mn10300-dis.c (disassemble): Use '$' instead of '%' for
2591 * mn10300-dis.c (disassemble): Prefix registers with '%'.
2595 * mn10300-dis.c (disassemble): Handle register lists.
2597 * mn10300-opc.c: Fix handling of register list operand for
2598 "call", "ret", and "rets" instructions.
2600 * mn10300-dis.c (disassemble): Print PC-relative and memory
2601 addresses symbolically if possible.
2602 * mn10300-opc.c: Distinguish between absolute memory addresses,
2603 pc-relative offsets & random immediates.
2605 * mn10300-dis.c (print_insn_mn10300): Fix fetch of last byte
2607 (disassemble): Handle SPLIT and EXTENDED operands.
2611 * mn10300-dis.c: Rough cut at printing some operands.
2613 * mn10300-dis.c: Start working on disassembler support.
2614 * mn10300-opc.c (mn10300_opcodes): Fix masks on several insns.
2616 * mn10300-opc.c (mn10300_operands): Add "REGS" for a register
2618 (mn10300_opcodes): Use REGS for register list in "movm" instructions.
2622 * d10v-opc.c (d10v_opcodes): Add3 sets the carry.
2626 * mn10300-opc.c (mn10300_opcodes): Demand parens around
2627 register argument is calls and jmp instructions.
2631 * mn10300-opc.c (mn10300_opcodes): Use DN01 for putx and
2632 getx operand. Fix opcode for mulqu imm,dn.
2636 * mn10300-opc.c (mn10300_operands): Hijack "bits" field
2637 in MN10300_OPERAND_SPLIT operands for how many bits
2638 appear in the basic insn word. Add IMM32_HIGH24,
2639 IMM32_HIGH24_LOWSHIFT8, IMM8E_SHIFT8.
2640 (mn10300_opcodes): Use new operands as needed.
2642 * mn10300-opc.c (mn10300_operands): Add IMM32_LOWSHIFT8
2643 for bset, bclr, btst instructions.
2644 (mn10300_opcodes): Use new IMM32_LOWSHIFT8 as needed.
2646 * mn10300-opc.c (mn10300_operands): Remove many redundant
2647 operands. Update opcode table as appropriate.
2648 (IMM32): Add MN10300_OPERAND_SPLIT flag.
2649 (mn10300_opcodes): Fix single bit error in mov imm32,dn insn.
2653 * mn10300-opc.c (mn10300_operands): Add DN2, DM2, AN2, AM2
2654 operands (for indexed load/stores). Fix bitpos for DI
2655 operand. Add SN8N_SHIFT8, IMM8_SHIFT8, and D16_SHIFT for the
2656 few instructions that insert immediates/displacements in the
2657 middle of the instruction. Add IMM8E for 8 bit immediate in
2658 the extended part of an instruction.
2659 (mn10300_operands): Use new opcodes as appropriate.
2663 * d10v-opc.c (d10v_opcodes): Declare the trap instruction
2664 sequential so the assembler never parallelizes it with
2669 * mn10300-opc.c (mn10300_operands): Add DN01 and AN01 for
2670 a data/address register that appears in register field 0
2671 and register field 1.
2672 (mn10300_opcodes): Use DN01 and AN01 for mov/cmp imm8,DN/AN
2676 * alpha-dis.c (print_insn_alpha): Use new NOPAL mask for
2677 standard disassembly.
2679 * alpha-opc.c (alpha_operands): Rearrange flags slot.
2680 (alpha_opcodes): Add new BWX, CIX, and MAX instructions.
2681 Recategorize PALcode instructions.
2685 * v850-opc.c (v850_opcodes): Add relaxing "jbr".
2689 * mips-dis.c (_print_insn_mips): Don't print a trailing tab if
2690 there are no operand types.
2694 * v850-opc.c (D9_RELAX): Renamed from D9, all references
2696 (v850_operands): Make sure D22 immediately follows D9_RELAX.
2700 * i386-dis.c (print_insn_x86): Set info->bytes_per_line to 5.
2704 * v850-opc.c (insert_d8_6): Fix operand insertion for sld.w
2705 and sst.w instructions.
2707 * v850-opc.c (v850_opcodes): Add "jCC" instructions (aliases for
2712 * mips-dis.c (_print_insn_mips): Use a tab between the instruction
2717 * ppc-opc.c (PPCPWR2): Define.
2718 (powerpc_opcodes): Use PPCPWR2 for fsqrt, rather than duplicating
2723 * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode
2724 field for movhu instruction.
2726 * v850-dis.c (disassemble): For V850_OPERAND_SIGNED operands,
2727 cast value to "long" not "signed long" to keep hpux10
2732 * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode field
2735 * mn10300-opc.c (FMT*): Remove definitions.
2737 * mn10300-opc.c (mn10300_opcodes): Fix destination register
2738 for shift-by-register opcodes.
2740 * mn10300-opc.c (mn10300_operands): Break DN, DM, AN, AM
2741 into [AD][MN][01] for encoding the position of the register
2746 * mn10300-opc.c (mn10300_opcodes): Add "extended" instructions,
2747 "putx", "getx", "mulq", "mulqu", "sat16", "sat24", "bsch".
2751 * mn10300-opc.c (mn10300_operands): Remove "REGS" operand.
2752 Fix various typos. Add "PAREN" operand.
2753 (MEM, MEM2): Define.
2754 (mn10300_opcodes): Surround all memory addresses with "PAREN"
2755 operands. Fix several typos.
2757 * mn10300-opc.c (mn10300_opcodes): Fix typos in yesterday's
2762 * mn10300-opc.c (FMT_XX): Renumber starting at one.
2763 (mn10300_operands): Rough cut. Enough to parse "mov" instructions
2765 (mn10300_opcodes): Break opcode format out into its own field.
2766 Update many operand fields to deal with signed vs unsigned
2767 issues. Fix one or two typos in the "mov" instruction
2768 opcode, mask and/or operand fields.
2772 * m68k-opc.c (plusha): Prefer encoding for m68040up, in case
2773 m68851 wasn't reset.
2777 * mn10300-opc.c (mn10300_opcodes): Add opcode & masks for
2778 all opcodes. Very rough cut at operands for all opcodes.
2780 * mn10300-opc.c (mn10300_opcodes): Start fleshing out the
2785 * mn10200-opc.c, mn10300-opc.c: New files.
2786 * mn10200-dis.c, mn10300-dis.c: New files.
2787 * mn10x00-opc.c, mn10x00-dis.c: Deleted.
2788 * disassemble.c: Break mn10x00 support into 10200 and 10300
2790 * configure.in: Likewise.
2791 * configure: Rebuilt.
2795 * Makefile.in (MOSTLYCLEAN): Move config.log to distclean.
2799 * mn10x00-opc.c, mn10x00-dis.c: New files for Matsushita
2801 * disassemble (ARCH_mn10x00): Define.
2802 (disassembler): Handle bfd_arch_mn10x00.
2803 * configure.in: Recognize bfd_mn10x00_arch.
2804 * configure: Rebuilt.
2808 * i386-dis.c (op_rtn): Change to be a pointer. Adjust uses
2809 accordingly. Don't declare functions using op_rtn.
2813 * v850-dis.c (disassemble): Add memaddr argument. Re-arrange
2814 params to be more standard.
2815 * (disassemble): Print absolute addresses and symbolic names for
2816 branch and jump targets.
2817 * v850-opc.c (v850_operand): Add displacement flag to 9 and 22
2819 * (v850_opcodes): Add breakpoint insn.
2823 * m68k-opc.c: Move the fmovemx data register cases before the
2824 other cases, so that they get recognized before the data register
2825 does gets treated as a degenerate register list.
2829 * mips-opc.c: Add a case for "div" and "divu" with two registers
2830 and a destination of $0.
2834 * mips-dis.c (print_insn_arg): Add prototype.
2835 (_print_insn_mips): Ditto.
2839 * mips-dis.c (print_insn_arg): Print condition code registers as
2844 * sparc-opc.c (sparc_opcodes): Add setuw, setsw, setx.
2848 * v850-dis.c (disassemble): Make static. Provide prototype.
2852 * v850-opc.c (insert_d9, insert_d22): Fix boundary case
2857 * v850-dis.c (disassemble): Handle insertion of ',', '[' and
2858 ']' characters into the output stream.
2859 * v850-opc.c (v850_opcodes: Remove size field from all opcodes.
2860 Add "memop" field to all opcodes (for the disassembler).
2861 Reorder opcodes so that "nop" comes before "mov" and "jr"
2862 comes before "jarl".
2864 * v850-dis.c (print_insn_v850): Fix typo in last change.
2866 * v850-dis.c (print_insn_v850): Properly handle disassembling
2867 a two byte insn at the end of a memory region when the memory
2868 region's size is only two byte aligned.
2870 * v850-dis.c (v850_cc_names): Fix stupid thinkos.
2872 * v850-dis.c (v850_reg_names): Define.
2873 (v850_sreg_names, v850_cc_names): Likewise.
2874 (disassemble): Very rough cut at printing operands (unformatted).
2876 * v850-opc.c (BOP_MASK): Fix.
2877 (v850_opcodes): Fix mask for jarl and jr.
2879 * v850-dis.c: New file. Skeleton for disassembler support.
2880 * Makefile.in Remove v850 references, they're not needed here.
2881 * configure.in: Add v850-dis.o when building v850 toolchains.
2882 * configure: Rebuilt.
2883 * disassemble.c (disassembler): Call v850 disassembler.
2885 * v850-opc.c (insert_d8_7, extract_d8_7): New functions.
2886 (insert_d8_6, extract_d8_6): New functions.
2887 (v850_operands): Rename D7S to D7; operand for D7 is unsigned.
2888 Rename D8 to D8_7, use {insert,extract}_d8_7 routines.
2890 (IF4A, IF4B): Use "D7" instead of "D7S".
2891 (IF4C, IF4D): Use "D8_7" instead of "D8".
2892 (IF4E, IF4F): New. Use "D8_6".
2893 (v850_opcodes): Use IF4A/IF4B for sld.b/sst.b. Use IF4C/IF4D for
2894 sld.h/sst.h. Use IF4E/IF4F for sld.w/sst.w.
2896 * v850-opc.c (insert_d16_15, extract_d16_15): New functions.
2897 (v850_operands): Change D16 to D16_15, use special insert/extract
2898 routines. New new D16 that uses the generic insert/extract code.
2899 (IF7A, IF7B): Use D16_15.
2900 (IF7C, IF7D): New. Use D16.
2901 (v850_opcodes): Use IF7C and IF7D for ld.b and st.b.
2903 * v850-opc.c (insert_d9, insert_d22): Slightly improve error
2904 message. Issue an error if the branch offset is odd.
2906 * v850-opc.c: Add notes about needing special insert/extract
2907 for all the load/store insns, except "ld.b" and "st.b".
2909 * v850-opc.c (insert_d22, extract_d22): New functions.
2910 (v850_operands): Use insert_d22 and extract_d22 for
2912 (insert_d9): Fix range check.
2916 * v850-opc.c (v850_operands): Add V850_OPERAND_SIGNED flag
2917 and set bits field to D9 and D22 operands.
2921 * v850-opc.c (v850_operands): Define SR2 operand.
2922 (v850_opcodes): "ldsr" uses R1,SR2.
2924 * v850-opc.c (v850_opcodes): Fix opcode specs for
2925 sld.w, sst.b, sst.h, sst.w, and nop.
2929 * v850-opc.c (v850_opcodes): Add null opcode to mark the
2930 end of the opcode table.
2934 * d10v-opc.c (pre_defined_registers): Added register pairs,
2935 "r0-r1", "r2-r3", etc.
2939 * v850-opc.c (v850_operands): Make I16 be a signed operand.
2940 Create I16U for an unsigned 16bit mmediate operand.
2941 (v850_opcodes): Use I16U for "ori", "andi" and "xori".
2943 * v850-opc.c (v850_operands): Define EP operand.
2944 (IF4A, IF4B, IF4C, IF4D): Use EP.
2946 * v850-opc.c (v850_opcodes): Fix opcode numbers for "mov"
2947 with immediate operand, "movhi". Tweak "ldsr".
2949 * v850-opc.c (v850_opcodes): Get ld.[bhw] and st.[bhw]
2950 correct. Get sld.[bhw] and sst.[bhw] closer.
2952 * v850-opc.c (v850_operands): "not" is a two byte insn
2954 * v850-opc.c (v850_opcodes): Correct bit pattern for setf.
2956 * v850-opc.c (v850_operands): D16 inserts at offset 16!
2958 * v850-opc.c (two): Get order of words correct.
2960 * v850-opc.c (v850_operands): I16 inserts at offset 16!
2962 * v850-opc.c (v850_operands): Add "SR1" and "SR2" for system
2963 register source and destination operands.
2964 (v850_opcodes): Use SR1 and SR2 for "ldsr" and "stsr".
2966 * v850-opc.c (v850_opcodes): Fix thinko in "jmp" opcode. Fix
2967 same thinko in "trap" opcode.
2969 * v850-opc.c (v850_opcodes): Add initializer for size field
2972 * v850-opc.c (v850_operands): D6 -> DS7. References changed.
2973 Add D8 for 8-bit unsigned field in short load/store insns.
2974 (IF4A, IF4D): These both need two registers.
2975 (IF4C, IF4D): Define. Use 8-bit unsigned field.
2976 (v850_opcodes): For "sld.h", "sld.w", "sst.h", "sst.w", use
2977 IF4C & IF4D. For "trap" use I5U, not I5. Add IF1 operand
2978 for "ldsr" and "stsr".
2979 * v850-opc.c (v850_operands): 3-bit immediate for bit insns
2982 * v850-opc.c (v850_opcodes): Correct short store half (sst.h) and
2983 short store word (sst.w).
2987 * v850-opc.c (v850_operands): Added insert and extract fields,
2988 pointers to functions that handle unusual operand encodings.
2992 * v850-opc.c (v850_opcodes): Enable "trap".
2994 * v850-opc.c (v850_opcodes): Fix order of displacement
2995 and register for "set1", "clr1", "not1", and "tst1".
2999 * v850-opc.c (v850_operands): Add "B3" support.
3000 (v850_opcodes): Fix and enable "set1", "clr1", "not1"
3003 * v850-opc.c (v850_opcodes): "jmp" has only an R1 operand.
3005 * v850-opc.c: Close unterminated comment.
3009 * v850-opc.c (v850_operands): Add flags field.
3010 (v850_opcodes): add move opcodes.
3014 * Makefile.in (ALL_MACHINES): Add v850-opc.o.
3015 * configure: (bfd_v850v_arch) Add new case.
3016 * configure.in: (bfd_v850_arch) Add new case.
3017 * v850-opc.c: New file.
3021 * sparc-dis.c (print_insn_sparc): Handle little endian sparcs.
3025 * d10v-opc.c: Add additional information to the opcode
3026 table to help determinine which instructions can be done
3031 * mpw-make.sed: Update editing of include pathnames to be
3036 * arm-opc.h: Added "bx" instruction definition.
3040 * alpha-opc.c (EV4EXTHWINDEX): Field width should be 8 not 5.
3044 * d10v-opc.c (d10v_opcodes): Minor fixes to addi and bl.l.
3048 * d10v-opc.c (d10v_opcodes): Correct 'mv' unit entry to EITHER.
3052 * makefile.vms: Update for alpha-opc changes.
3056 * i386-dis.c (print_insn_i386): Actually return the correct value.
3057 (ONE, OP_ONE): #ifdef out; not used.
3061 * d10v-opc.c (d10v_opcodes): Added 2 accumulator sub instructions.
3062 Changed subi operand type to treat 0 as 16.
3066 * m68k-opc.c: Add cpushl for the mcf5200. From Ken Rose
3071 * arm-opc.h: (arm_opcodes): Added halfword and sign-extension
3072 memory transfer instructions. Add new format string entries %h and %s.
3073 * arm-dis.c: (print_insn_arm): Provide decoding of the new
3078 * d10v-opc.c (d10v_operands): Added UNUM4S; a 4-bit accumulator shift.
3079 (d10v_opcodes): Modified accumulator shift instructions to use UNUM4S.
3083 * alpha-dis.c (print_insn_alpha_osf): Remove.
3084 (print_insn_alpha_vms): Remove.
3085 (print_insn_alpha): Make globally visible. Chose the register
3086 names based on info->flavour.
3087 * disassemble.c: Always return print_insn_alpha for the alpha.
3091 * d10v-dis.c (dis_long): Handle unknown opcodes.
3095 * d10v-opc.c: Changes to support signed and unsigned numbers.
3096 All instructions with the same name that have long and short forms
3097 now end in ".l" or ".s". Divs added.
3098 * d10v-dis.c: Changes to support signed and unsigned numbers.
3102 * d10v-dis.c: Change all functions to use info->print_address_func.
3106 * m68k-opc.c (m68k_opcodes): Make opcode masks for the ColdFire
3107 move ccr/sr insns more strict so that the disassembler only
3108 selects them when the addressing mode is data register.
3111 * d10v-opc.c (pre_defined_registers): Declare.
3112 * d10v-dis.c (print_operand): Now uses pre_defined_registers
3113 to pick a better name for the registers.
3117 * sparc-opc.c: Fix opcode values for fpack16, and fpackfix. Fix
3118 operands for fexpand and fpmerge. From Christian Kuehnke
3123 * alpha-dis.c (print_insn_alpha): No longer the user-visible
3124 print routine. Take new regnames and cpumask arguments.
3125 Kill the environment variable nonsense.
3126 (print_insn_alpha_osf): New function. Do OSF/1 style regnames.
3127 (print_insn_alpha_vms): New function. Do VMS style regnames.
3128 * disassemble.c (disassembler): Test bfd flavour to pick
3129 between OSF and VMS routines. Default to OSF.
3133 * configure.in: Call AC_SUBST (INSTALL_SHLIB).
3134 * configure: Rebuild.
3135 * Makefile.in (install): Use @INSTALL_SHLIB@.
3139 * configure: (bfd_d10v_arch) Add new case.
3140 * configure.in: (bfd_d10v_arch) Add new case.
3141 * d10v-dis.c: New file.
3142 * d10v-opc.c: New file.
3143 * disassemble.c (disassembler) Add entry for d10v.
3147 * m68k-opc.c (m68k_opcodes): Fix bugs in coldfire insns relating
3148 to bcc, trapfl, subxl, and wddata discovered by Andreas Schwab.
3152 * i386-dis.c: Get rid of print_insn_i8086. Use info.mach to
3153 distinguish between variants of the instruction set.
3154 * sparc-dis.c: Get rid of print_insn_sparclite. Use info.mach to
3155 distinguish between variants of the instruction set.
3159 * i386-dis.c (print_insn_i8086): New routine to disassemble using
3160 the 8086 instruction set.
3161 * i386-dis.c: General cleanups. Make most things static. Add
3162 prototypes. Get rid of static variables aflags and dflags. Pass
3163 them as args (to almost everything).
3167 * h8300-dis.c (bfd_h8_disassemble): Handle macregs in ldmac insns.
3169 * h8300-dis.c (bfd_h8_disassemble): Handle "ldm.l" and "stm.l".
3171 * h8300-dis.c (bfd_h8_disassemble): "abs" is implicitly two
3172 if the next arg is marked with SRC_IN_DST. Gross.
3174 * h8300-dis.c (bfd_h8_disassemble): Print "exr" when
3175 we're looking for and find EXR.
3177 * h8300-dis.c (bfd_h8_disassemble): We don't have a match
3178 if we're looking for KBIT and we don't find it.
3180 * h8300-dis.c (bfd_h8_disassemble): Mask off unwanted bits
3183 * h8300-dis.c (bfd_h8_disassemble): Don't set plen for
3184 3bit immediate operands.
3188 * Released binutils 2.7.
3190 * alpha-opc.c: Add new case of "mov". From Klaus Kaempf
3195 * alpha-opc.c: Correct second case of "mov" to use OPRL.
3199 * sparc-dis.c (print_insn_sparclite): New routine to print
3200 sparclite instructions.
3204 * m68k-opc.c (m68k_opcodes): Add coldfire support.
3208 * sparc-opc.c (asi_table): Add #ASI_N, #ASI_N_L, #ASI_NUCLEUS,
3209 #ASI_NUCLEUS_LITTLE. Rename #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_L
3210 to #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_LITTLE.
3214 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir):
3215 Use autoconf-set values.
3216 (docdir, oldincludedir): Removed.
3217 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3221 * alpha-opc.c: New file.
3222 * alpha-opc.h: Remove.
3223 * alpha-dis.c: Complete rewrite to use new opcode table.
3224 * configure.in: For bfd_alpha_arch, use alpha-opc.o.
3225 * configure: Rebuild with autoconf 2.10.
3226 * Makefile.in (ALL_MACHINES): Add alpha-opc.o.
3227 (alpha-dis.o): Depend upon $(INCDIR)/opcode/alpha.h, not
3229 (alpha-opc.o): New target.
3233 * sparc-dis.c (print_insn_sparc): Remove unused local variable i.
3234 Set imm_added_to_rs1 even if the source and destination register
3237 * sparc-opc.c: Add some two operand forms of the wr instruction.
3241 * h8300-dis.c (bfd_h8_disassemble): Rename "hmode" argument
3244 * disassemble.c (disassembler): Handle H8/S.
3245 * h8300-dis.c (print_insn_h8300s): New function for H8/S.
3249 * sparc-opc.c: Add beq/teq as aliases for be/te.
3251 * ppc-opc.c: Fix fcmpo opcode. From Sergei Steshenko
3256 * makefile.vms: New file.
3258 * alpha-dis.c (print_insn_alpha): Print lda ra,lit(rz) as mov.
3262 * h8300-dis.c (bfd_h8_disassemble): Always print ABS8MEM with :8,
3267 * i386-dis.c (OP_OFF): Call append_prefix.
3271 * ppc-opc.c (instruction encoding macros): Add explicit casts to
3272 unsigned long to silence a warning from the Solaris PowerPC
3277 * sparc-opc.c (sparc_opcodes): Add ultrasparc vis extensions.
3281 * sparc-dis.c (X_IMM,X_SIMM): New macros.
3283 (print_insn_sparc): Merge cases i,I,j together. New cases X,Y.
3284 * sparc-opc.c (sparc_opcodes): Use X for 5 bit shift constants,
3285 Y for 6 bit shift constants. Rewrite entries for crdcxt, cwrcxt,
3286 cpush, cpusha, cpull sparclet insns.
3290 * sparc-dis.c (compute_arch_mask): Replace ANSI style def with K&R.
3294 * sparc-opc.c: Set F_FBR on floating point branch instructions.
3295 Set F_FLOAT on other floating point instructions.
3299 * ppc-opc.c (PPC860): Macro for 860/821 specific instructions and
3301 (powerpc_opcodes): Add 860/821 specific SPRs.
3305 * configure.in: Permit --enable-shared to specify a list of
3306 directories. Set and substitute BFD_PICLIST.
3307 * configure: Rebuild.
3308 * Makefile.in (BFD_PICLIST): Rename from BFD_LIST. Change all
3309 uses. Set to @BFD_PICLIST@.
3313 * h8300-dis.c (bfd_h8_disassemble): Use "bit" for L_3 immediates,
3314 not "abs", which may be needed for the absolute in something
3315 like btst #0,@10:8. Print L_3 immediates separately from other
3316 immediates. Change ABSMOV reference to ABS8MEM.
3320 * sparc-dis.c (opcodes_initialized): Move inside print_insn_sparc.
3321 (current_arch_mask): New static global.
3322 (compute_arch_mask): New static function.
3323 (print_insn_sparc): Delete sparc_v9_p. New static local
3324 current_mach. Resort opcode table if current_mach changes.
3325 Generalize "insn not supported" test.
3326 (compare_opcodes): Prefer supported opcodes to nonsupported ones.
3327 Delete test for v9/!v9.
3328 * sparc-opc.c (MASK_*): Use SPARC_OPCODE_ARCH_MASK.
3330 (brfc): Split into CBR and FBR for coprocessor/fp branches.
3331 (brfcx): Renamed to FBRX.
3332 (condfc): Renamed to CONDFC. Pass v6notlet to CBR (standard
3333 coprocessor mnemonics are not supported on the sparclet).
3334 (condf): Renamed to CONDF.
3335 (SLCBCC2): Delete F_ALIAS flag.
3339 * sparc-opc.c (sparc_opcodes): rd must be 0 for
3340 mov foo,{%y,%psr,%wim,%tbr}. Support mov foo,%asrX.
3344 * Makefile.in (config.status): Depend upon BFD VERSION file, so
3345 that the shared library version number is set correctly.
3349 * configure.in: Use AC_CHECK_TOOL to find ar and ranlib. From
3351 * configure: Rebuild.
3355 * z8kgen.c (internal, gas): Call xmalloc rather than unchecked
3360 * configure: Rebuild with autoconf 2.8.
3364 * sparc-dis.c (print_insn_sparc): Handle 'O' operand char like 'r'.
3365 * sparc-opc.c (sparc_opcodes): Use 'O' operand char for `neg reg'.
3369 * configure.in: Don't set SHLIB or SHLINK to an empty string,
3370 since they appear as targets in Makefile.in.
3371 * configure: Rebuild.
3375 * mpw-make.sed: Edit out shared library support bits.
3379 * sparc-opc.c (v8,v6notv9): Add MASK_SPARCLET.
3380 (sparc_opcode_archs): Add MASK_V8 to sparclet entry.
3381 (sparc_opcodes): Add sparclet insns.
3382 (sparclet_cpreg_table): New static local.
3383 (sparc_{encode,decode}_sparclet_cpreg): New functions.
3384 * sparc-dis.c (print_insn_sparc): Handle sparclet cpregs.
3388 * i386-dis.c (index16): New static variable.
3389 (putop): Print jecxz for 32 bit case, jcxz for 16 bit, not the
3391 (OP_indirE): Return result of OP_E.
3392 (OP_E): Check for 16 bit addressing mode, and disassemble
3393 correctly. Optimised 32 bit case a little. Don't print
3394 "(base,index,scale)" when sib specifies only an offset.
3398 * configure.in: Set and substitute SHLIB_DEP.
3399 * configure: Rebuild.
3400 * Makefile.in (SHLIB_DEP): New variable.
3401 (LIBIBERTY_LISTS, BFD_LIST): New variables.
3402 (stamp-piclist): Depend upon LIBIBERTY_LISTS and BFD_LIST. If
3403 COMMON_SHLIB, add them to piclist with appropriate modifications.
3404 ($(SHLIB)): Depend upon $(SHLIB_DEP). Don't check COMMON_SHLIB
3405 here: just use piclist.
3409 * sparc-dis.c (MASK_V9,V9_ONLY_P,V9_P): Define.
3410 (print_insn_sparc): Rewrite v9/not-v9 tests.
3411 (compare_opcodes): Likewise.
3412 * sparc-opc.c (MASK_<ARCH>): Define.
3413 (v6,v7,v8,sparclite,v9,v9a): Redefine.
3414 (sparclet,v6notv9): Define.
3415 (sparc_opcode_archs): Delete member `conflicts'. Add `supported'.
3416 (sparc_opcodes): Delete F_NOTV9, use v6notv9 instead.
3420 * configure.in: Call AC_PROG_CC before configure.host.
3421 * configure: Rebuild.
3423 * Makefile.in (SONAME): Remove leading ../bfd/ from $(SHLIB).
3427 * i386-dis.c (onebyte_has_modrm): New static array.
3428 (twobyte_has_modrm): New static array.
3429 (print_insn_i386): Only fetch the mod/reg/rm byte if it is needed.
3433 * Makefile.in ($(SHLINK)): Check ts against $(SHLIB), not
3438 * ppc-opc.c (PPC): Undef, so default defination on Windows NT
3443 * m68k-opc.c (m68k_opcodes): The bkpt instruction is supported on
3444 m68010up, not just m68020up | cpu32.
3446 * Makefile.in (SONAME): New variable.
3447 ($(SHLINK)): Make a link to the transformed name, as well.
3448 (stamp-tshlink): New target.
3449 (install): Skip stamp-tshlink during install.
3453 * configure.in: Call AC_ARG_PROGRAM.
3454 * configure: Rebuild.
3455 * Makefile.in (program_transform_name): New variable.
3456 (install): Transform library name before installing it.
3460 * i960-dis.c (mem): Add HX dcinva instruction.
3462 Support for building as a shared library, based on patches from
3464 * configure.in: Add AC_ARG_ENABLE for shared and commonbfdlib.
3465 New substitutions: ALLLIBS, PICFLAG, SHLIB, SHLIB_CC,
3466 SHLIB_CFLAGS, COMMON_SHLIB, SHLINK.
3467 * configure: Rebuild.
3468 * Makefile.in (ALLLIBS): New variable.
3469 (PICFLAG, SHLIB, SHLIB_CC, SHLIB_CFLAGS): New variables.
3470 (COMMON_SHLIB, SHLINK): New variables.
3471 (.c.o): If PICFLAG is set, compile twice, once PIC, once normal.
3472 (STAGESTUFF): Remove variable.
3473 (all): Depend upon $(ALLLIBS) rather than $(TARGETLIB).
3474 (stamp-piclist, piclist): New targets.
3475 ($(SHLIB), $(SHLINK)): New targets.
3476 ($(OFILES)): Depend upon stamp-picdir.
3477 (disassemble.o): Build twice if PICFLAG is set.
3478 (MOSTLYCLEAN): Add pic/*.o.
3479 (clean): Remove $(SHLIB), $(SHLINK), piclist, and stamp-piclist.
3480 (distclean): Remove pic and stamp-picdir.
3481 (install): Install shared libraries.
3482 (stamp-picdir): New target.
3486 * sparc-dis.c (print_insn_sparc): Delete DISASM_RAW_INSN support.
3487 Print unknown instruction as "unknown", rather than in hex.
3491 * dis-buf.c: Include "sysdep.h" before "dis-asm.h".
3495 * sparc-opc.c (sparc_opcode_archs): Mark v8/sparclite as conflicting.
3499 * i386-dis.c (print_insn_i386): Only fetch the mod/reg/rm byte
3500 when necessary. From Ulrich Drepper
3505 * sparc-dis.c (print_insn_sparc): NUMOPCODES replaced with
3506 sparc_num_opcodes. Update architecture enum values.
3507 * sparc-opc.c (sparc_opcode_archs): Replaces architecture_pname.
3508 (sparc_opcode_lookup_arch): New function.
3509 (sparc_num_opcodes): Renamed from bfd_sparc_num_opcodes.
3510 (sparc_opcodes): Add v9a shutdown insn.
3514 * sparc-dis.c (print_insn_sparc): Renamed from print_insn.
3515 If DISASM_RAW_INSN, print insn in hex. Handle v9a as opcode
3517 (print_insn_sparc64): Deleted.
3518 * disassemble.c (disassembler, case bfd_arch_sparc): Always use
3521 * sparc-opc.c (architecture_pname): Add v9a.
3525 * alpha-opc.h (alpha_insn_set): VAX floating point opcode was
3526 incorrectly defined as 0x16 when it should be 0x15.
3527 (FLOAT_FORMAT_MASK): function code is 11 bits, not just 7 bits!
3528 (alpha_insn_set): added cvtst and cvttq float ops. Also added
3529 excb (exception barrier) which is defined in the Alpha
3530 Architecture Handbook version 2.
3531 * alpha-dis.c (print_insn_alpha): Fixed special-case decoding for
3532 OPERATE_FORMAT_CODE type instructions. The bug caused mulq to be
3533 disassembled as or, for example.
3537 * mips-dis.c (print_insn_arg): Print cases 'i' and 'u' in hex.
3538 (_print_insn_mips): Change i from int to unsigned int.
3542 * ppc-opc.c (powerpc_opcodes): tlbi POWER opcode form different
3543 from tlbie PowerPC opcode. Add PPC603 tlbld and tlbli.
3547 * i386-dis.c: Added Pentium Pro instructions.
3551 * ppc-opc.c (fsqrt{,.}): Duplicate for PowerPC in addition to
3556 * sh-opc.h (sh_nibble_type): Added REG_B.
3557 (sh_arg_type): Added A_REG_B.
3558 (sh_table): Added pref and bank reg versions of ldc, ldc.l, stc
3560 * sh-dis.c (print_insn_shx): Added cases for REG_B and A_REG_B.
3564 * disassemble.c (disassembler): Use new bfd_big_endian macro.
3568 * Makefile.in (distclean): Remove stamp-h. From Ronald
3574 * alpha-dis.c (print_insn_alpha): fixed decoding of cpys
3579 * sh-opc.h (sh_arg_type): Added A_SSR and A_SPC.
3580 (sh_table): Added many SH3 opcodes.
3581 * sh-dis.c (print_insn_shx): Added cases for A_SSR and A_SPC.
3585 * ppc-opc.c (subfc., subfco): Mark this PPCCOM, not PPC.
3586 (subco,subco.): Mark this PPC, not PPCCOM.
3590 * configure: Rebuild with autoconf 2.7.
3594 * configure: Rebuild with autoconf 2.6.
3598 * configure.in: Sort list of architectures. Accept but do nothing
3599 for alliant, convex, pyramid, romp, and tahoe.
3603 * a29k-dis.c (print_special): Change num to unsigned int.
3607 * a29k-dis.c (print_insn): Cast insn24 to unsigned long when
3612 * configure.in: Call AC_CHECK_PROG to find and cache AR.
3613 * configure: Rebuilt.
3617 * configure.in: Add case for bfd_i860_arch.
3618 * configure: Rebuild.
3622 * m68k-opc.c (m68k_opcodes): Correct fmoveml operands.
3623 * m68k-dis.c (NEXTSINGLE): Change i to unsigned int.
3624 (NEXTDOUBLE): Likewise.
3625 (print_insn_m68k): Don't match fmoveml if there is more than one
3626 register in the list.
3627 (print_insn_arg): Handle a place of '8' for a type of 'L'.
3631 * m68k-opc.c: Use #W rather than #w.
3632 * m68k-dis.c (print_insn_arg): Handle new 'W' place.
3636 * m68k-opc.c (m68k_opcode_aliases): Add dbfw as an alias for dbf,
3637 and likewise for all the dbxx opcodes.
3641 * arc-dis.c: Include elf-bfd.h rather than libelf.h.
3645 * mips-opc.c: Added shorthand (V1) for INSN_4100 manifest. Added
3646 the VR4100 specific instructions to the mips_opcodes structure.
3650 * mpw-config.in, mpw-make.sed: Remove ugly workaround for
3651 ugly Metrowerks bug in CW6, is fixed in CW7.
3655 * ppc-opc.c (whole file): Add flags for common/any support.
3659 * Makefile.in (BISON): Remove macro.
3660 (FLAGS_TO_PASS): Remove BISON.
3666 * m68k-dis.c (print_insn_m68k): Recognize all two-word
3667 instructions that take no args by looking at the match mask.
3668 (print_insn_arg): Always print "%" before register names.
3669 [case 'c']: Use "nc" for the no-cache case, as recognized by gas.
3670 [case '_']: Don't print "@#" before address.
3671 [case 'J']: Use "%s" as format string, not register name.
3672 [case 'B']: Treat place == 'C' like 'l' and 'L'.
3676 * i386-dis.c: Describe cmpxchg8b operand, and spell the opcode
3683 * alpha-opc.h (MEMORY_FUNCTION_FORMAT_MASK): added.
3684 (alpha_insn_set): added definitions for VAX floating point
3685 instructions (Unix compilers don't generate these, but handcoded
3686 assembly might still use them).
3688 * alpha-dis.c (print_insn_alpha): added support for disassembling
3689 the miscellaneous instructions in the Alpha instruction set.
3693 * mpw-config.in: Add m68k-opc.c.o to BFD_MACHINES for m68k,
3694 no longer create sysdep.h, sed ppc-opc.c to work around a
3695 serious Metrowerks C bug.
3696 * mpw-make.in: Remove.
3697 * mpw-make.sed: New file, used by mpw-configure to edit
3698 Makefile.in into an MPW makefile.
3702 * Makefile.in (maintainer-clean): New synonym for realclean.
3706 * m68k-opc.c: Split pmove patterns which use 'P' into patterns
3707 which use '0', '1', and '2' instead. Specify the proper size for
3708 a pmove immediate operand. Correct the pmovefd patterns to be
3709 moves to a register, not from a register.
3710 * m68k-dis.c (print_insn_arg): Replace 'P' with '0', '1', '2'.
3714 * sparc-opc.c (sparc_opcodes): Mark all insns that reference
3715 %psr, %wim, %tbr as F_NOTV9.
3719 * Makefile.in (Makefile): Just rebuild Makefile when running
3721 (config.h, stamp-h): New targets.
3722 * configure.in: Call AC_CONFIG_HEADER and AC_CANONICAL_SYSTEM
3723 earlier. Don't bother to call AC_ARG_PROGRAM. Touch stamp-h when
3724 rebuilding config.h.
3725 * configure: Rebuild.
3727 * mips-opc.c: Change unaligned loads and stores with "t,A"
3728 operands to use "t,A(b)".
3732 * sh-dis.c (print_insn_shx): Add F_FR0 support.
3736 * sh-dis.c (print_insn_shx): Change loop over op->arg[n] to iterate
3737 until 3 instead of until 2.
3741 * Makefile.in (ALL_CFLAGS): Define.
3742 (.c.o, disassemble.o): Use $(ALL_CFLAGS).
3743 (MOSTLYCLEAN): Add config.log.
3744 (distclean): Don't remove config.log.
3745 * configure.in: Substitute HDEFINES.
3746 * configure: Rebuild.
3750 * sh-opc.h (sh_arg_type): Add F_FR0.
3751 (sh_table, case fmac): Add F_FR0 as first argument.
3755 * sh-opc.h (sh_opcode_info): Increase arg array size to 4.
3759 * sparc-dis.c: Remove all references to NO_V9.
3763 * aclocal.m4: Just include ../bfd/aclocal.m4.
3764 * configure: Rebuild.
3768 * sparc-dis.c (X_DISP19): Define.
3769 (print_insn, case 'G'): Use it.
3770 (print_insn, case 'L'): Sign extend displacement.
3774 * configure.in: Run ../bfd/configure.host before AC_PROG_CC.
3775 Subsitute CFLAGS and AR. Call AC_PROG_INSTALL. Don't substitute
3776 host_makefile_frag or frags.
3777 * aclocal.m4: New file.
3778 * configure: Rebuild.
3779 * Makefile.in (INSTALL): Set to @INSTALL@.
3780 (INSTALL_PROGRAM): Set to @INSTALL_PROGRAM@.
3781 (INSTALL_DATA): Set to @INSTALL_DATA@.
3783 (AR_FLAGS): Set to rc rather than qc.
3784 (CC): Define as @CC@.
3785 (CFLAGS): Set to @CFLAGS@.
3786 (@host_makefile_frag@): Remove.
3787 (config.status): Remove dependency upon @frags@.
3789 * configure.in: ../bfd/config.bfd now just sets shell variables.
3790 Use them rather than looking through target Makefile fragments.
3791 * configure: Rebuild.
3795 * sh-opc.h (ftrc): Change FPUL_N to FPUL_M.
3799 * sparc-opc.c (sparc_opcodes): Delete duplicate wr %y insn.
3800 Add clrx, iprefetch, signx, clruw, cas, casl, casx, casxl synthetic
3803 * sparc-opc.c (sparc_opcodes): Fix prefetcha insn.
3804 (lookup_{name,value}): New functions.
3805 (prefetch_table): New static local.
3806 (sparc_{encode,decode}_prefetch): New functions.
3807 * sparc-dis.c (print_insn): Handle '*' arg (prefetch function).
3811 * sh-opc.h: Add blank lines to improve readabililty of sh3e
3816 * sh-dis.c: Correct comment on first line of file.
3820 * disassemble.c (disassembler): Handle bfd_mach_sparc64.
3822 * sparc-opc.c (asi, membar): New static locals.
3823 (sparc_{encode,decode}_{asi,membar}): New functions.
3824 (sparc_opcodes, membar insn): Fix.
3825 * sparc-dis.c (print_insn): Call sparc_decode_asi.
3826 Support decoding of membar masks.
3831 * m68k-opc.c (m68k_opcode_aliases): Add br, brs, brb, brw, brl.
3835 * m68k-opc.c (m68k_opcode_aliases): Add bhib as an alias for bhis,
3836 and likewise for the other branches. Add bhs as an alias for bcc,
3837 and likewise for the size variants. Add dbhs as an alias for
3842 * sh-opc.h (FP sts instructions): Update to match reality.
3846 * m68k-dis.c: (fpcr_names): Add % before all register names.
3847 (reg_names): Likewise.
3848 (print_insn_arg): Don't explicitly print % before register names.
3849 Add % before register names in static array names. In case 'r',
3850 print data registers as `@(Dn)', not `Dn@'. When printing a
3851 memory address, don't print @# before it.
3852 (print_indexed): Change base_disp and outer_disp from int to
3853 bfd_vma. Print using MIT syntax, not mutant invalid Motorola
3854 syntax. Sign extend 8 byte displacement correctly.
3855 (print_base): Print using MIT syntax. Print zpc when appropriate.
3856 Change parameter disp from int to bfd_vma.
3858 * m68k-opc.c (m68k_opcode_aliases): Add jsrl and jsrs as aliases
3863 * sh-dis.c (print_insn_shx): Handle new operand types F_REG_N,
3864 F_REG_M, FPSCR_M, FPSCR_N, FPUL_M and FPUL_N.
3865 * sh-opc.h (sh_arg_type): Add new operand types.
3866 (sh_table): Add new opcodes from SH3E Floating Point ISA.
3870 * Makefile.in (distclean): Remove generated file config.h.
3874 * Makefile.in (distclean): Remove generated file config.h.
3878 * m68k-opc.c: New file, holding tables from include/opcode/m68k.h.
3880 * m68k-dis.c: Remove BREAK_UP_BIG_DECL stuff.
3882 (print_insn_m68k): Change d to be const. Use m68k_numopcodes
3883 rather than numopcodes. Use m68k_opcodes rather than removed
3884 opcode function. Don't check F_ALIAS.
3885 (print_insn_arg): Change first parameter to be const char *.
3886 * Makefile.in (ALL_MACHINES): Add m68k-opc.o.
3887 (m68k-opc.o): New target.
3888 * configure.in: Build m68k-opc.o for bfd_m68k_arch.
3889 * configure: Rebuild.
3893 * sparc-dis.c (HASH_SIZE, HASH_INSN): Define.
3894 (opcode_bits, opcode_hash_table): New variables.
3895 (opcodes_initialized): Renamed from opcodes_sorted.
3896 (build_hash_table): New function.
3897 (is_delayed_branch): Use hash table.
3898 (print_insn): Renamed from print_insn_sparc, made static.
3899 Build and use hash table. If !sparc64, ignore sparc64 insns,
3900 and vice-versa if sparc64.
3901 (print_insn_sparc, print_insn_sparc64): New functions.
3902 (compare_opcodes): Move sparc64 opcodes to end.
3903 Print commutative insns with constant second.
3904 * sparc-opc.c (all non-v9 insns): Use flag F_NOTV9 instead of F_ALIAS.
3908 * sh-dis.c (print_insn_shx): Remove unused local dslot. Use
3909 print_address_func for A_BDISP12 and A_BDISP8. Correct test which
3910 avoids printing a delay slot in a delay slot.
3911 * sh-opc.h (sh_table): Fully bracket last entry.
3915 * sparc-opc.c (sllx, srax, srlx): Fix disassembly.
3919 * configure.in: Get host_makefile_frag from ${srcdir}.
3921 * configure.in: Autoconfiscated. Check for string[s].h. Create
3922 config.h from config.in. Don't set up sysdep.h link.
3923 * sysdep.h: New file.
3924 * configure, config.in: New files, generated from configure.in.
3925 * Makefile.in: Updated to be processed autoconf-style.
3926 (distclean): Keep sysdep.h. Remove config.log and config.cache.
3927 (Makefile): Depend on config.status.
3928 (config.status): New rule.
3929 * configure.bat: Update Makefile substitutions.
3933 * mips-opc.c (L1): Define.
3934 (mips_opcodes): Add R4010 instructions: flushi, flushd, flushid,
3935 addciu, madd, maddu, ffc, ffs, msub, msubu, selsi, selsr, waiti,
3940 * mips-opc.c (mips_opcodes): For the move pseudo-op, prefer daddu
3941 if ISA 3 and addu otherwise, replacing or, since some MIPS chips
3942 have multiple add units but only a single logical unit.
3944 * ppc-opc.c (powerpc_operands): Change CR to use a bitsize of 3,
3945 shifted by 18, without any insertion or extraction function.
3946 (insert_cr, extract_cr): Remove.
3950 * m68k-dis.c (print_insn_arg, print_indexed): Print "%" before
3955 * mpw-config.in: Add sh and i386 configs, remove sparc config.
3956 * sh-opc.h: Add copyright.
3960 * Makefile.in (crunch-m68k): Delete extra target accidentally
3961 checked in a while ago.
3965 * sh-opc.h (sh_table): Add SH3 support.
3969 * sh-opc.h: Added bsrf and braf.
3973 * arm-opc.h (arm_opcodes): Add 64-bit multiply patterns. Delete
3974 bogus [ls]fm{ea,fd} patterns.
3976 * arm-opc.h (arm_opcodes): Correct typos in stm, ldm, std, and ldc.
3977 * arm-dis.c (print_insn_arm): Make GIVEN a parameter, don't try and
3978 initialize it from memory. Make function static.
3979 (print_insn_{big,little}_arm): New functions.
3980 * disassemble.c (disassembler, case bfd_arch_arm): Disassemble for
3981 the correct endianness.
3985 * sh-opc.h (sh_nibble_type, sh_arg_type): remove trailing , from
3990 * m68k-dis.c (opcode): Finish change made by Kung Hsu on April
3991 17th, so that it builds again using GCC as the compiler.
3995 * mips-dis.c (print_insn_little_mips): Cast return value from
3996 bfd_getl32 from bfd_vma to unsigned long, because _print_insn_mips
3997 expects an unsigned long, and that might be fewer words of
3998 argument storage (e.g., if bfd_vma is long long on a 32-bit
4000 (print_insn_big_mips): Likewise with bfd_getb32 value.
4001 (_print_insn_mips): Now static.
4005 * m68k-dis.c: Take out #define BREAK_UP_BIG_DECL kludge, because
4006 gcc memory hog problem with initializer is fixed.
4010 Merge in support for Mac MPW as a host.
4011 (Old change descriptions retained for informational value.)
4013 * mpw-config.in (archname): Compute from the config.
4014 (BFD_MACHINES, ARCHDEFS): Put into mk.tmp.
4016 * mpw-config.in (target_arch): Compute from canonical target.
4017 (m68k, mips, powerpc, sparc): Add architectures.
4018 * mpw-make.in (disassemble.c.o): Add.
4019 (ALL_CFLAGS): Remove special flags (-mc68020 -mc68881 -model far).
4021 * mpw-config.in (BFD_MACHINES): Set to a default value.
4022 * mpw-make.in (BFD_MACHINES): Remove wired-in value.
4024 * mpw-make.in (CSEARCH): Add extra-include to search path.
4026 * mpw-config.in (varargs.h): Don't create.
4027 (sysdep.h): Create using forward-include.
4028 * mpw-make.in (CSEARCH): Add include/mpw to search path.
4030 * mpw-config.in: New file, MPW version of configure.in.
4031 * mpw-make.in: New file, MPW version of Makefile.in.
4035 * alpha-dis.c (print_insn_alpha): Put empty statement after
4040 * hppa-dis.c (sign_extend): Delete, redundant with libhppa.h version.
4041 (low_sign_extend): Likewise.
4042 (get_field): Delete unused function.
4043 (set_field, deposit_14, deposit_21): Likewise.
4047 * i386-dis.c: Support for more pentium opcodes. From Guy Harris
4054 * alpha-opc.h (OSF_ASMCODE): define
4055 print pal-code names as defined in App C of the
4056 Alpha Architecture Reference Manual
4058 * alpha-dis.c: cleaned up output
4059 print stylized code forms as defined in App A.4.3 of the
4060 Alpha Architecture Reference Manual
4064 * mips-opc.c: Add new mips4 instructions. Don't set INSN_RFE for
4066 * mips-dis.c (print_insn_arg): Handle new argument types 'h', 'R',
4071 * m68k-dis.c (opcode): New function. Returns address of opcode
4072 table entry given index, even if the opcode table was split to
4073 work around gcc bugs.
4074 (print_insn_m68k): Call opcode instead of referencing m68k_opcodes
4076 (BREAK_UP_BIG_DECL): Make secondary array static and const.
4077 (reg_names): Now const.
4078 (print_insn_arg): Arrays cacheFieldName and names now const.
4079 (print_indexed): Array scales now const.
4083 * ppc-opc.c: Sort recently added instructions by minor opcode
4084 number within major opcode number.
4088 * hppa-dis.c: Include libhppa.h.
4092 * mips-opc.c: Change dli to use M_DLI, and add dla.
4096 * Makefile.in (ALL_MACHINES): Add w65-dis.o.
4100 * mips-opc.c: Add r4650 mul instruction.
4104 * mips-opc.c: Add uld and usd macros for unaligned double load and
4109 * ppc-opc.c (powerpc_opcodes): Add 403GA opcodes rfci, dccci,
4110 mfdcr, mtdcr, icbt, iccci.
4114 * i960-dis.c (struct tabent, struct sparse_tabent): Change the
4115 signed char fields to shorts, more portable.
4119 * i960-dis.c (struct tabent, struct sparse_tabent): Declare the
4120 char fields as signed chars, since they may have negative values.
4124 * i386-dis.c (dis386_twobyte): Add cpuid, From Charles Hannum
4130 * ppc-opc.c (extract_bdm): Correct parenthezisation.
4131 * ppc-dis.c (print_insn_powerpc): Print .long before unrecognized
4136 * ppc-opc.c: Changes based on patch from David Edelsohn
4138 (powerpc_operands): Add operands SPRBAT and SPRG. Split TBR out of
4141 (insert_tbr): New static function.
4142 (extract_tbr): New static function.
4143 (XFXFXM_MASK, XFXM): Define.
4144 (XSPRBAT_MASK, XSPRG_MASK): Define.
4145 (powerpc_opcodes): Add instructions to access special registers by
4146 name. Add mtcr and mftbu.
4150 * mips-opc.c (P3): Define.
4151 (mips_opcodes): Add mad and madu.
4153 Sun Jan 15 16:32:59 1995 Steve Chamberlain <sac@splat>
4155 * configure.in: Add W65 support.
4156 * disassemble.c: Likewise.
4157 * w65-opc.h, w65-dis.c: New files.
4161 * h8300-dis.c (bfd_h8_disassemble): Add support for 2 bit
4166 * mips-opc.c: Add dli as a synonym for li.
4170 * alpha-dis.c (print_insn_alpha): Handle call_pal instruction, and
4171 print something for reserved opcode values, even if it won't
4174 * mips-dis.c (_print_insn_mips): When initializing, shift right
4175 and mask, to avoid sign extension problems on the Alpha.
4177 * m68k-dis.c (print_insn_arg, case 'J'): Handle buscr and pcr
4182 * sh-opc.h (mov.l gbr): Get direction right.
4183 * sh-dis.c (print_insn_shx): New function.
4184 (print_insn_shl, print_insn_sh): Call print_insn_shx to
4185 print opcodes with right byte order.
4189 * ns32k-dis.c (struct ns32k_option): Renamed from struct option,
4190 to avoid conflicts with getopt.
4194 * hppa-dis.c (print_insn_hppa): Read the instruction using
4195 bfd_getb32, so that it works on a little endian or 64 bit host.
4196 Remove unused local variable op.
4200 * mips-opc.c: Use or instead of addu for pseudo-op move, since
4201 addu does not work correctly if -mips3.
4205 * a29k-dis.c (print_special): Add special register names defined
4206 on 29030, 29040 and 29050.
4207 (print_insn): Handle new operand type 'I'.
4211 * Makefile.in (INSTALL): Use top level install.sh script.
4215 * sparc-dis.c: Rewrite to use bitfields, rather than a union, so
4216 that it works on a little endian host.
4220 * configure.in: Use ${config_shell} when running config.bfd.
4224 * mips-opc.c (mips_opcodes): "dabs" is only available with -mips3.
4228 * a29k-dis.c (print_insn): Print the opcode.
4232 * mips-opc.c (mips_opcodes): Set WR_t for sc and scd.
4236 * hppa-dis.c (reg_names): Use r26-r23 for arg0-arg3.
4240 * mips-opc.c: Set INSN_STORE_MEMORY flag for all instructions
4241 which store a value into memory.
4245 * configure.in, Makefile.in, disassemble.c: Add support for the ARM.
4246 * arm-dis.c, arm-opc.h: New files.
4250 * Makefile.in (ns32k-dis.o): Add dependency.
4251 * ns32k-dis.c (print_insn_arg): Declare initialized local as
4252 string, not as array of chars.
4256 * sparc-dis.c (print_insn_sparc): Handle new operand type 'x'.
4258 * sparc-opc.c: Added sparclite extended FP operations, and
4259 versions of v9 impdep* instructions permitting specification of
4264 * i960-dis.c (reg_names): Now const.
4265 (struct sparse_tabent): New type, copied from array type in mem
4267 (ctrl): Local static array ctrl_tab now const.
4268 (cobr): Local static array cobr_tab now const.
4269 (mem): Local variables reg1, reg2, reg3 now point to const. Local
4270 static variable mem_tab no longer explicitly initialized. Changed
4271 mem_init to const array of struct sparse_tabent.
4272 (reg): Local static variable reg_tab no longer explicitly
4273 initialized. Changed reg_init to const array of struct
4275 (ea): Local static array scale_tab now const.
4277 * i960-dis.c (reg): Added i960JX instructions to reg_init table.
4282 * configure.bat: the disassember needs to be enabled for
4283 "objdump -d" to work in djgpp.
4287 * ns32k-dis.c: Deleted all code in "#ifdef GDB".
4288 (invalid_float): Enabled general version, doesn't require running
4289 on ns32k host. Changed to take char* argument, and test for
4290 explicitly specified sizes, instead of using sizeof() on host CPU
4292 (INVALID_FLOAT): Cast first argument.
4293 (opt_u, opt_U, opt_O, opt_C, opt_S, list_P532, list_M532,
4294 list_P032, list_M032): Now const.
4295 (optlist, list_search): Made appropriate arguments now point to
4297 (print_insn_arg): Changed static array of one-character-string
4298 pointers into a static const array of characters; fixed sprintf
4299 statement accordingly.
4303 * opcodes/ns32k-dis.c: Semi-new file. Had apparently been dropped
4304 from distribution. A ns32k-dis.c from a previous distribution has
4305 been brought up to date and supports the new interface.
4307 * disassemble.c: define ARCH_ns32k and add case bfd_arch_ns32k.
4309 * configure.in: add bfd_ns32k_arch target support.
4311 * Makefile.in: add ns32k-dis.o to ALL_MACHINES.
4312 Add ns32k-dis.c to CFILES. Add dependencies for ns32k-dis.o.
4316 * h8300-dis.c (bfd_h8_disassemble): Get 16bit branch
4321 * h8300-dis.c, mips-dis.c: Don't use true and false.
4325 * configure.in: Change --with-targets to --enable-targets.
4329 * mips-dis.c (_print_insn_mips): Build a static hash table mapping
4330 opcodes to the first instruction with that opcode, to speed
4336 * Makefile.in (mostlyclean): Fix typo (was mostyclean).
4340 * configure.bat: update to latest makefile.in
4344 * a29k-dis.c (print_insn): Print 'x' type operand in hex.
4345 * h8300-dis.c (bfd_h8_disassemble): Print 16bit rels correctly.
4346 * sh-dis.c (print_insn_sh): Don't recur endlessly if delay
4347 slot insn is in a delay slot.
4348 * z8k-opc.h: (resflg): Fix patterns.
4349 * h8500-opc.h Fix CR insn patterns.
4353 * ppc-opc.c (powerpc_opcodes): Put PowerPC versions of "cmp" and
4354 "cmpl" before POWER versions, so that gas -many uses them.
4358 * disassemble.c: New file.
4359 * Makefile.in (OFILES): Add disassemble.o.
4360 (disassemble.o): Provide dependencies; compile with $(ARCHDEFS).
4361 * configure.in: Define ARCHDEFS in Makefile. Code taken from
4362 binutils/configure.in.
4364 * m68k-dis.c (print_insn_m68k): If F_ALIAS flag is set, skip the
4365 opcode being examined.
4369 * ppc-opc.c (powerpc_operands): Added RAL, RAM and RAS.
4370 (insert_ral, insert_ram, insert_ras): New functions.
4371 (powerpc_opcodes): Use RAL for load with update, RAM for lmw, and
4372 RAS for store with update.
4376 * ppc-opc.c (powerpc_opcodes): Correct fcir. From David Edelsohn
4381 * mips-opc.c (mips_opcodes): Correct operands of "nor" with an
4386 * sparc-opc.c (sparc_opcodes): Fix "rd %fprs,%l0".
4390 * ppc-opc.c (powerpc_operands): The signedp field has been
4391 removed, so don't initialize it. Set the PPC_OPERAND_SIGNED flag
4392 instead. Add new operand SISIGNOPT.
4393 (powerpc_opcodes): For lis, liu, addis, and cau use SISIGNOPT.
4395 * ppc-dis.c (print_insn_powerpc): Check PPC_OPERAND_SIGNED rather
4400 * i386-dis.c (struct private): Renamed to dis_private. `private'
4401 is a reserved word for dynix cc.
4405 * configure.in: Change error message to refer to bfd/config.bfd
4406 rather than bfd/configure.in.
4410 * ppc-opc.c: Define POWER2 as short alias flag.
4411 (powerpc_opcodes): Add POWER/2 opcodes lfq*, stfq*, fcir[z], and
4416 * i960-dis.c (print_insn_i960): Don't read a second word for
4417 opcodes 0, 1, 2 and 3.
4421 * configure.in: Don't build m68881-ext.o for bfd_m68k_arch.
4425 * m68881-ext.c: Removed; no longer used.
4426 * Makefile.in: Changed accordingly.
4428 * m68k-dis.c (ext_format_68881): Don't declare.
4429 (print_insn_m68k): If an instruction uses place 'i', it uses at
4430 least four fixed bytes.
4431 (print_insn_arg): Don't bump p by 2 for case 'I', place 'i'. For
4432 extended float, convert to double using floatformat_to_double, not
4433 ieee_extended_to_double, and fetch the data before converting it.
4437 * mips-opc.c: It's sqrt.s, not sqrt.w. From
4442 * ppc-opc.c (powerpc_opcodes): The POWER uses bdn[l][a] where the
4443 PowerPC uses bdnz[l][a].
4447 * dis-buf.c, i386-dis.c: Include sysdep.h.
4451 * configure.in (bfd_powerpc_arch): Use ppc-dis.o and ppc-opc.o.
4453 * ppc-opc.c (powerpc_opcodes): Mark POWER instructions supported
4454 by Motorola PowerPC 601 with PPC_OPCODE_601.
4455 * ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc):
4456 Disassemble Motorola PowerPC 601 instructions as well as normal
4457 PowerPC instructions.
4461 * i960-dis.c (reg, mem): Just use a static array instead of
4466 * hppa-dis.c (print_insn_hppa): For '?' and '@' only adjust the
4467 condition name index if this is for a negated condition.
4469 * hppa-dis.c (print_insn_hppa): No space before 'H' operand.
4470 Floating point format for 'H' operand is backwards from normal
4471 case (0 == double, 1 == single). For '4', '6', '7', '9', and '8'
4472 operands (fmpyadd and fmpysub), handle bizarre register
4473 translation correctly for single precision format.
4475 * hppa-dis.c (print_insn_hppa): Do not emit a space after 'F'
4476 or 'I' operands if the next format specifier is 'M' (fcmp
4477 condition completer).
4481 * ppc-opc.c (powerpc_operands): New operand type MBE to handle a
4482 single number giving a bitmask for the MB and ME fields of an M
4483 form instruction. Change NB to accept 32, and turn it into 0;
4484 also turn 0 into 32 when disassembling. Seperated SH from NB.
4485 (insert_mbe, extract_mbe): New functions.
4486 (insert_nb, extract_nb): New functions.
4487 (SC_MASK): Mask out SA and LK bits.
4488 (powerpc_opcodes): Change "cal" to use RT, D, RA rather than RT,
4489 RA, SI. Change "liu" and "cau" to use UI rather than SI. Mark
4490 "bctr" and "bctrl" as accepted by POWER. Change "rlwimi",
4491 "rlimi", "rlwimi.", "rlimi.", "rlwinm", "rlinm", "rlwinm.",
4492 "rlinm.", "rlmi", "rlmi.", "rlwnm", "rlnm", "rlwnm.", "rlnm." to
4493 use MBE rather than MB. Add "mfmq" and "mtmq" POWER instructions.
4494 (powerpc_macros): Define table of macro definitions.
4495 (powerpc_num_macros): Define.
4497 * ppc-dis.c (print_insn_powerpc): Don't skip optional operands
4498 if PPC_OPERAND_NEXT is set.
4502 * i960-dis.c (print_insn_i960): Make buffer bfd_byte instead of
4503 char. Retrieve contents using bfd_getl32 instead of shifting.
4507 * ppc-opc.c: New file. Opcode table for PowerPC, including
4508 opcodes for POWER (RS/6000).
4509 * ppc-dis.c: New file. PowerPC and Power (RS/6000) disassembler.
4510 * Makefile.in (ALL_MACHINES): Add ppc-dis.o and ppc-opc.o.
4511 (CFILES): Add ppc-dis.c.
4512 (ppc-dis.o, ppc-opc.o): New targets.
4513 * configure.in: Build ppc-dis.o and ppc-opc.o for bfd_rs6000_arch.
4517 * hppa-dis.c (print_insn_hppa): Handle 'N' in assembler template.
4518 No space before 'u', 'f', or 'N'.
4522 * i386-dis.c (print_insn_i386): Add FIXME comment regarding reading
4523 farther than we should.
4525 * i386-dis.c (dis386): Use Yb and Yv for scasb and scasS.
4529 * sparc-dis.c m68k-dis.c alpha-dis.c a29k-dis.c: Fix comments.
4533 * i960-dis.c (print_insn_i960): Only read word2 if the instruction
4534 needs it, to prevent reading past the end of a section.
4538 * mips-opc.h: Use macro for j instruction, to support SVR4 PIC.
4539 Removed t,A case for la; always use t,A(b) case.
4544 * mips-dis.c (print_insn_arg): Handle 'k'.
4545 * mips-opc.c: Make cache use k, not t.
4549 * alpha-opc.h, alpha-dis.c (print_insn_alpha): Add
4550 FLOAT_MEMORY_FORMAT_CODE, FLOAT_BRANCH_FORMAT_CODE, correct
4551 FLOAT_FORMAT_CODE to put out floating point register names.
4555 * mips-opc.c: Use macros for jal variants, to support SVR4 PIC.
4559 * a29k-dis.c (print_insn): Use 0x%08x, not 0x%8x.
4563 * mips-opc.c (dsll, dsra, dsrl): Added '>' cases for shift counts
4564 larger than 32. Moved dsxx32 variants first for disassembler.
4568 * z8kgen.c, z8k-opc.h: Add full lda information.
4572 * hppa-dis.c (print_insn_hppa): Do not emit a space after
4573 movb instructions. Any necessary space will be emitted by
4574 the code to handle nullification completers.
4578 * mips-opc.c: Moved l.d down so that it disassembles as ldc1.
4582 * alpha-opc.h: Add ldl_l, fix typo for ldq_u.
4583 * alpha-dis.c (print_insn_alpha): Add code for PAL_FORMAT_CODE.
4587 * mips-opc.c: Correct lwu opcode value (book had it wrong).
4591 * z8k-dis.c (FETCH_DATA): get just the right amount of data.
4592 (unpack_instr): Cope with ARG_IMM4M1 type instructions.
4596 * m88k-dis.c (m88kdis): comment change. Remove space after
4598 (printop): handle new arg types DEC and XREG for m88110.
4602 * hppa-dis.c (print_insn_hppa): Handle 'z' operand
4603 type for absolute branch addresses. Delete special
4604 "ble" and "be" code in 'W' operand code.
4608 * mips-opc.c: Set hazard information correctly for branch
4609 likely instructions.
4613 * alpha-dis.c (print_insn_alpha), alpha-opc.h: Fix bugs, use
4614 info->fprintf_func for printing and info->print_address_func for
4619 * mips-opc.c: Set INSN_TRAP for tXX instructions.
4624 Corrected second case of "b" for disassembler.
4628 * mips-dis.c, m88k-dis.c: Don't include libbfd.h. Changed calls
4629 to BFD swapping routines to correspond to BFD name changes.
4633 * mips-opc.c: Change div machine instruction to be z,s,t rather
4634 than s,t. Change div macro to be d,v,t rather than d,s,t.
4635 Likewise for divu, ddiv, ddivu. Added z,s,t case for drem, dremu,
4636 rem and remu which generates only the corresponding div
4637 instruction. This is for compatibility with the MIPS assembler,
4638 which only generates the simple machine instruction when an
4639 explicit destination of $0 is used.
4640 * mips-dis.c (print_insn_arg): Handle 'z' (always register zero).
4645 WR_31 hazard for bal, bgezal, bltzal.
4649 * hppa-dis.c (print_insn_hppa): Use print function
4650 from within the disassemble_info, not fprintf_filtered.
4654 * hppa-dis.c (print_insn_hppa): Handle '|' like '>'. (From Jeff
4659 * mips-opc.c ("absu"): Removed.
4664 * mips-opc.c: Added r6000 and r4000 instructions and macros.
4665 Changed hazard information to distinguish between memory load
4666 delays and coprocessor load delays.
4670 * mips-opc.c: li.d uses "T,L", not "S,F". Added li.s.
4674 * configure.in: Don't pass cpu to config.bfd.
4678 * m88k-dis.c (m88kdis): Make class unsigned.
4682 * alpha-dis.c (print_insn_alpha): One branch format case was
4683 missing the instruction name.
4687 * Makefile.in (ALL_MACHINES): Renamed from DIS_LIBS.
4688 Add the arch-specific auxiliary files.
4689 (OFILES): Remove the arch-specific auxiliary files
4690 and use BFD_MACHINES instead of DIS_LIBS.
4691 * configure.in: Set BFD_MACHINES based on --with-targets option.
4695 * mips-opc.c: Added lwc1 E,A(b) to go with lwc1 T,A(b). Similarly
4700 * sparc-opc.c: Change CONST to const to deal with gcc
4701 -Dconst=__const -traditional.
4706 coprocessor instructions out of #if 0, and made them use new
4711 * sparc-dis.c: Include ansidecl.h before opcodes/sparc.h.
4715 * sparc-opc.c: Add F_JSR, F_UNBR, or F_CONDBR flags to each branch
4716 instruction, for use by the disassembler.
4718 * sparc-dis.c (SEX): Add sign extension macro. Replace many
4719 hand-coded sign extensions that depended on 32-bit host ints.
4720 FIXME, we still depend on big-endian host bitfield ordering.
4721 (sparc_print_insn): Set the insn_info_valid field, and the
4722 other fields that describe the instruction being printed.
4726 * sparc-opc.c (call): Accept all 6 addressing modes valid for
4727 `jmp' instead of just one of them.
4731 * hppa-dis.c: Move floating registers from reg_names to fp_reg_names.
4732 (fput_fp_reg_r): Renamed from fput_reg_r.
4733 (fput_fp_reg): New function.
4734 (print_insn_hppa): Use fput_fp_reg{,_r} where appropriate.
4736 * hppa-dis.c (print_insn_hppa, cases 'a', 'd'): Print space afterwards.
4738 * hppa-dis.c (print_insn_hppa, case 'd'): Use GET_COND not GET_FIELD.
4742 * hppa-dis.c (print_insn_hppa): Use extract_5r_store for 'r'.
4744 * hppa-dis.c (print_insn_hppa, case '>'): If next character is 'n',
4745 don't output a space.
4747 * hppa-dis.c (float_format_names): 10 is undefined, and 11 is quad.
4751 * mips-opc.c: New file, containing opcode table from
4752 ../include/opcode/mips.h.
4753 * Makefile.in: Add it.
4757 * m88k-dis.c: New file, moved in from gdb and changed to use the
4758 new dis-asm.h disassembler interface.
4759 * Makefile.in (DIS_LIBS): Added m88k-dis.o.
4760 (m88k-dis.o): New target.
4764 * mips-dis.c (print_insn_arg, _print_insn_mips): Made pointer to
4765 argument string const char * to correspond to opcode/mips.h.
4769 * mips-dis.c: Updated to account for name changes in new version
4771 * Makefile.in: Added header file dependencies.
4775 * h8300-dis.c (bfd_h8_disassemble): Correct fetching of instruction.
4779 * m68k-dis.c (NEXTWORD, NEXTLONG): Use ((x) ^ 0x8000) - 0x8000 to sign
4780 extend, rather than shifts.
4784 * Makefile.in: Undo 15 June change.
4788 * m68k-dis.c (print_insn_arg): Change return value to byte count
4790 * m68k-dis.c: Re-write to detect invalid operands before
4791 printing anything, so we can handle this the same way we
4792 handle invalid opcodes.
4796 * sh-dis.c, sh-opc.h: Understand some more opcodes.
4800 * hppa-dis.c: Include <ansidecl.h> and sysdep.h before other
4805 * sparc-dis.c: Don't declare qsort, since sysdep.h might.
4807 * configure.in: Do make sysdep.h link.
4808 * Makefile.in: Search ../include. Don't search ../bfd.
4813 * hppa-dis.c: Fix typo. 'a' and 'd' were reversed.
4814 Do not print a space before the completers specified by
4819 * mips-dis.c: No longer need to bomb out if HOST_64_BIT is
4820 defined, since gdb has been fixed.
4823 * hppa-dis.c (print_insn_hppa): Last argument to fput_reg,
4824 fput_reg_r, fput_creg, fput_const, and fputs_filtered should
4825 be a *disassemble_info, not a *FILE.
4826 * hppa-dis.c: Support 'd', '!', and 'a'.
4827 * hppa-dis.c: Support 's' to extract a 2 bit space register.
4828 * hppa-dis.c: Delete cases which are no longer needed.
4832 * m68k-dis.c (print_insn_{m68k,arg}): Add MMU codes.
4836 * h8300-dis.c: New file, removed from bfd/cpu-h8300.c, with
4841 * Makefile.in (CSEARCH): Add -I../bfd for sysdep.h and bfd.h.
4842 * configure.in: No longer need to configure to get sysdep.h.
4847 * hppa-dis.c: Support 'I', 'J', and 'K' in output
4848 templates for 1.1 FP computational instructions.
4852 * h8500-dis.c (print_insn_h8500): Address argument is type
4854 * z8k-dis.c (print_insn_z8k, print_insn_z8001, print_insn_z8002):
4857 * h8500-opc.h (addr_class_type): No comma at end of enumerator.
4858 * sh-opc.h (sh_nibble_type, sh_arg_type): Ditto.
4860 * sparc-dis.c (compare_opcodes): Move static declaration to
4865 * sparc-dis.c (print_insn_sparc): Implement 'n' argument for unimp
4866 instruction, remove unimp hack from 'l' argument.
4870 * z8k-dis.c (fetch_data): Use unsigned char to make ancient gcc's
4876 * mips-dis.c (print_insn_arg): Handle 'C' for general coprocessor
4881 * hppa-dis.c: Include dis-asm.h before sysdep.h. Changed some
4882 arrays of string pointers to 2-d arrays of chars, to save
4887 * a29k-dis.c, alpha-dis.c, i960-dis.c, sparc-dis.c, z8k-dis.c:
4888 Cast second arg to read_memory_func to "bfd_byte *", as necessary.
4892 * hppa-dis.c: New file from Utah, adapted to new disassembler
4894 * Makefile.in: Include it.
4898 * sh-dis.c, sh-opc.h: New files.
4902 * alpha-dis.c, alpha-opc.h: New files.
4906 * mips-dis.c: Sign extend 'j' and 'b' arguments, delta is a signed
4911 * sparc-dis.c: Make "ta" the default trap instruction, "t" the alias.
4915 * a29k-dis.c, sparc-dis.c, sparc-opc.c: Use CONST rather than
4920 * sparc-dis.c: Use fprintf_func a few places where I forgot,
4921 and double percent signs a few places.
4923 * a29k-dis.c, i960-dis.c: New, merged from gdb and binutils.
4925 * i386-dis.c, m68k-dis.c, mips-dis.c, sparc-dis.c:
4926 Use info->print_address_func not print_address.
4928 * dis-buf.c (generic_print_address): New function.
4932 * Makefile.in: Add sparc-dis.c.
4933 sparc-dis.c: New file, merges binutils and gdb versions as follows:
4935 Add `add' instruction to the set that get checked
4936 for a preceding `sethi' in order to print an absolute address.
4937 * (print_insn): Disassembly prefers real instructions.
4938 (is_delayed_branch): Speed up.
4939 * sparc-opcode.h: Add ALIAS bit to aliases. Fix up opcode tables.
4940 Still missing some float ops, and needs testing.
4941 * sparc-pinsn.c (print_insn): Eliminate 'set' test, subsumed by
4942 F_ALIAS. Use printf, not fprintf, when not passing a file
4944 (compare_opcodes): Check that identical instructions have
4945 identical opcodes, complain otherwise.
4948 * Include reg_names.
4950 Use dis-asm.h/read_memory_func interface.
4954 * h8500-dis.c, i386-dis.c, m68k-dis.c, z8k-dis.c (fetch_data):
4955 deliberately return non-zero to setjmp from longjmp. Otherwise
4956 this code fails to compile.
4960 * m68k-dis.c: Fix prototype for fetch_arg().
4964 * dis-buf.c: New file, for new read_memory_func interface.
4965 Makefile.in (OFILES): Include it.
4966 m68k-dis.c, i386-dis.c, h8500-dis.c, mips-dis.c, z8k-dis.c:
4967 Use new read_memory_func interface.
4971 * h8500-dis.c (print_insn_h8500): Get sign of fp offsets right.
4972 * h8500-opc.h: Fix couple of opcodes.
4974 Wed Mar 24 02:03:36 1993 david d `zoo' zuhn (zoo at poseidon.cygnus.com)
4976 * Makefile.in: add dvi & installcheck targets
4980 * Makefile.in: Update for h8500-dis.c.
4984 * h8500-dis.c, h8500-opc.h: New files
4988 * mips-dis.c, z8k-dis.c: Converted to use interface defined in
4989 ../include/dis-asm.h.
4990 * m68k-dis.c: New file (merge of ../binutils/m68k-pinsn.c
4991 and ../gdb/m68k-pinsn.c).
4992 * i386-dis.c: New file (merge of ../binutils/i386-pinsn.c
4993 and ../gdb/i386-pinsn.c).
4994 * m68881-ext.c: New file. Moved definition of
4995 ext_format ext_format_68881 from ../gdb/m68k-tdep.c.
4996 * Makefile.in: Adjust for new files.
4998 * m68k-dis.c: Recognize '9' placement code, so (say) pflush
4999 can be dis-assembled.
5003 * mips-dis.c (print_insn_arg): Now returns void.
5007 * mips-dis.c (ansidecl.h): Include for benefit of sysdep.h
5008 files that use the macros.
5012 * mips-dis.c: New file, from gdb/mips-pinsn.c.
5013 * Makefile.in (DIS_LIBS): Added mips-dis.o.
5014 (CFILES): Added mips-dis.c.
5018 * z8k-dis.c (print_insn_z8001, print_insn_z8002): new routines
5019 * z8kgen.c, z8k-opc.h: fix sizes of some shifts.
5023 * Makefile.in: Improve *clean rules.
5024 * configure.in: Allow a default host.
5026 Tue Nov 17 19:53:54 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com)
5028 * Makefile.in: also use -I$(srcdir)/../bfd, since some sysdep
5029 files include other sysdep files
5033 * z8k-dis.c z8k-opc.h z8kgen.c: checkpoint
5037 * configure.in: For host support, use ../bfd/configure.host
5038 so it stays in sync with the ../bfd/hosts database.
5040 Thu Oct 1 23:38:54 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com)
5042 * configure.in: use cpu-vendor-os triple instead of nested cases
5046 * z8k-dis.c (unparse_instr): fix bug where opcode returned was
5047 *always* the wrong one.
5051 * z8kgen.c: added copyright info
5055 * z8k-dis.c (unparse_instr): prettier tabs
5056 * z8kgen.c -> z8k-opc.h: bug fixes in tables
5058 Fri Sep 25 12:50:32 1992 Stu Grossman (grossman at cygnus.com)
5060 * configure.in: Add ncr* configuration.
5061 * z8k-dis.c (struct instr_data_s): Make instr_asmsrc char to make
5062 picayune ANSI compilers happy.
5066 * configure.in (i386): Make i386 and i486 synonymous for now.
5067 * configure.in (i[34]86-*-sysv4): Add my_host definition.
5071 * Makefile.in (install): Fix typo.
5075 * Makefile.in (make): Remove obsolete crud.
5076 (sparc-opc.o): Avoid Sun Make VPATH bug.
5080 * Makefile.in: since there are no SUBDIRS, remove rule and
5081 references of subdir_do.
5085 * Makefile.in (install): Get the library name right here too.
5086 Don't install bfd.h, since it's unrelated to this library. No
5087 subdirs to recurse into, either.
5088 (CFILES): The source file has a .c suffix, not .o.
5090 * sparc-opc.c: New file, moved from BFD.
5091 * Makefile.in (OFILES): Build it.
5095 * z8k-dis.c: fixed forward refferences of some declarations.
5099 * Makefile.in: get the name of the library right
5103 * z8k-dis.c: knows how to disassemble z8k stuff
5104 * z8k-opc.h: new file full of z8000 opcodes
5108 version-control: never