4 * tic80-opc.c (tic80_symbol_to_value): Changed to accept
5 a symbol class that restricts translation to just that
6 class (general register, condition code, etc).
10 * tic80-opc.c (tic80_operands): Add REG_0_E, REG_22_E,
11 and REG_DEST_E for register operands that have to be
12 an even numbered register. Add REG_FPA for operands that
13 are one of the floating point accumulator registers.
14 Add TIC80_OPERAND_MASK to flags for ENDMASK operand.
15 (tic80_opcodes): Change entries that need even numbered
16 register operands to use the new operand table entries.
17 Add "or" entries that are identical to "or.tt" entries.
22 * mips16-opc.c: Add new cases of exit instruction for
24 * mips-dis.c (print_mips16_insn_arg): Display floating point
25 registers in operands of exit instruction. Print `$' before
26 register names in operands of entry and exit instructions.
31 * tic80-opc.c (tic80_predefined_symbols): Table of name/value
32 pairs for all predefined symbols recognized by the assembler.
33 Also used by the disassembling routines.
34 (tic80_symbol_to_value): New function.
35 (tic80_value_to_symbol): New function.
36 * tic80-dis.c (print_operand_control_register,
37 print_operand_condition_code, print_operand_bitnum):
38 Remove private tables and use tic80_value_to_symbol function.
44 * d10v-dis.c (print_operand): Change address printing
45 to correctly handle PC wrapping. Fixes PR11490.
50 * mn10200-opc.c (mn10200_operands): Make 8 and 16 bit pc-relative
55 * mips-dis.c (print_insn_mips16): Set insn_info information.
56 (print_mips16_insn_arg): Likewise.
58 * mips-dis.c (print_insn_mips16): Better handling of an extend
59 opcode followed by an instruction which can not be extended.
63 * m68k-opc.c (m68k_opcodes): Changed operand specifier for the
64 coldfire moveb instruction to not allow an address register as
65 destination. Although the documentation does not indicate that
66 this is invalid, experiments uncovered unexpected behavior.
67 Added a comment explaining the situation. Thanks to Andreas
68 Schwab for pointing this out to me.
73 * tic80-opc.c (tic80_opcodes): Expand comment to note that the
74 entries are presorted so that entries with the same mnemonic are
75 adjacent to each other in the table. Sort the entries for each
76 instruction so that this is true.
81 * m68k-dis.c: Include <libiberty.h>.
82 (print_insn_m68k): Sort the opcode table on the most significant
88 * tic80-dis.c (tic80_opcodes): Add "wrcr", "vmpy", "vrnd",
89 "vsub", "vst", "xnor", and "xor" instructions.
90 (V_a1): Renamed from V_a, msb of accumulator reg number.
91 (V_a0): Add macro, lsb of accumulator reg number.
95 * tic80-dis.c (print_insn_tic80): Broke excessively long
96 function up into several smaller ones and arranged for
97 the instruction printing function to be callable recursively
98 to print vector instructions that have both a load and a
99 math instruction packed into a single opcode.
100 * tic80-opc.c (tic80_opcodes): Expand comment for vld opcode
101 to explain why it comes after the other vector opcodes.
106 * m68k-opc.c (m68k_opcodes): add b, w, or l specifier to coldfire
107 move insns to handle immediate operands.
111 * m68k-opc.c (m68k_opcodes): Delete duplicate entry for "cmpil".
112 fix operand mask in the "moveml" entries for the coldfire.
117 * tic80-opc.c (V_a, V_m, V_S, V_Z, V_p, OP_V, MASK_V):
118 New macros for building vector instruction opcodes.
119 (tic80_opcodes): Remove all uses of FMT_SI, FMT_REG, and
120 FMT_LI, which were unused. The field is now a flags field.
121 Remove some opcodes that are possible, but illegal, such
122 as long immediate instructions with doubles for immediate
123 values. Add "vadd" and "vld" instructions.
127 * tic80-opc.c (tic80_operands): Reorder some table entries to make
128 the order more logical. Move the shift alias instructions ("rotl",
129 "shl", "ins", "rotr", "extu", "exts", "srl", and "sra" to be
130 interspersed with the regular sr.x and sl.x instructions. Add
131 and test new instruction opcodes for "sl", "sli", "sr", "sri", "st",
132 "sub", "subu", "swcr", and "trap".
136 * tic80-opc.c (OFF_SS_PC): Renamed from OFF_SS.
137 (OFF_SL_PC): Renamed from OFF_SL.
138 (OFF_SS_BR): New operand type for base relative operand.
139 (OFF_SL_BR): New operand type for base relative operand.
140 (REG_BASE): New operand type for base register operand.
141 (tic80_opcodes): Add and test "fmpy", "frndm", "frndn", "frndp",
142 "frndz", "fsqrt", "fsub", "illop0", "illopF", "ins", "jsr",
143 "ld", "ld.u", "lmo", "or", "rdcr", "rmo", "rotl", and "rotr"
145 * tic80-dis.c (print_insn_tic80): Print opcode name with fixed width
146 10 char field, padded with spaces on rhs, rather than a string
147 followed by a tab. Use renamed TIC80_OPERAND_PCREL flag bit rather
148 than old TIC80_OPERAND_RELATIVE. Add support for new
149 TIC80_OPERAND_BASEREL flag bit.
153 * tic80-dis.c (print_insn_tic80): Print floating point operands
155 * tic80-opc.c (SPFI): Add single precision floating point
156 immediate operand type.
157 (ROTATE): Add rotate operand type for shifts.
158 (ENDMASK): Add for shifts.
159 (n): Macro for the 'n' bit.
160 (i): Macro for the 'i' bit.
161 (PD): Macro for the 'PD' field.
162 (P2): Macro for the 'P2' field.
163 (P1): Macro for the 'P1' field.
164 (tic80_opcodes): Add entries for "exts", "extu", "fadd",
170 * mn10200-dis.c (disassemble): Mask off unwanted bits after
171 adding in current address for pc-relative operands.
176 * tic80-dis.c (R_SCALED): Add macro to test for ":s" modifier bit.
177 (print_insn_tic80): If R_SCALED then print ":s" modifier for operand.
178 * tic80-opc.c (REG0, REG22, REG27, SSOFF, LSOFF): Names
179 changed to REG_0, REG_22, REG_DEST, OFF_SS, OFF_SL respectively.
180 (SICR, LICR, REGM_SI, REGM_LI): Names changed to CR_SI, CR_LI,
181 REG_BASE_M_SI, REG_BASE_M_LI respectively.
182 (REG_SCALED, LSI_SCALED): New operand types.
183 (E): New macro for 'E' bit at bit 27.
184 (tic80_opcodes): Add and test dld, dld.u, dst, estop, and etrap
185 opcodes, including the various size flavors (b,h,w,d) for
186 the direct load and store instructions.
190 * tic80-dis.c (M_SI, M_LI): Add macros to test for ":m" modifier bit
192 * tic80-dis.c (print_insn_tic80): Change comma and paren handling.
193 Use M_SI and M_LI macros to check for ":m" modifier for GPR operands.
194 * tic80-opc.c (tic80_operands): Add REGM_SI and REGM_LI operands.
195 (F, M_REG, M_LI, M_SI, SZ_REG, SZ_LI, SZ_SI, D, S): New bit-twiddlers.
196 (MASK_LI_M, MASK_SI_M, MASK_REG_M): Remove and replace in opcode
197 masks with "MASK_* & ~M_*" to get the M bit reset.
198 (tic80_opcodes): Add bsr, bsr.a, cmnd, cmp, dcachec, and dcachef.
202 * tic80-dis.c (print_insn_tic80): Print TIC80_OPERAND_RELATIVE
203 correctly. Add support for printing TIC80_OPERAND_BITNUM and
204 TIC80_OPERAND_CC, and TIC80_OPERAND_CR operands in symbolic
206 * tic80-opc.c (tic80_operands): Add SSOFF, LSOFF, BITNUM,
207 CC, SICR, and LICR table entries.
208 (tic80_opcodes): Add and test "nop", "br", "bbo", "bbz",
209 "bcnd", and "brcr" opcodes.
214 * ppc-opc.c (powerpc_operands): Make comment match the
215 actual fields (no shift field).
216 * sparc-opc.c (sparc_opcodes): Document why this cannot be "const".
218 * tic80-dis.c (print_insn_tic80): Replace abort stub with a
219 partial implementation, work in progress.
220 * tic80-opc.c (tic80_operands): Begin construction operands table.
221 (tic80_opcodes): Continue populating opcodes table and start
222 filling in the operand indices.
223 (tic80_num_opcodes): Add this.
228 * m68k-opc.c: Add #B case for moveq.
232 * mn10300-dis.c (disassemble): Make sure all variables are initialized
233 before they are used.
238 * v850-opc.c (v850_opcodes): Put curly-braces around operands
239 for "breakpoint" instruction.
244 * Makefile.in (ALL_CFLAGS): Add -D_GNU_SOURCE.
245 (dep): Use ALL_CFLAGS rather than CFLAGS.
250 * v850-opc.c (D8_{6,7}): Set V850_OPERAND_ADJUST_SHORT_MEMORY
256 * Makefile.in (m68k-opc.o, alpha-opc.o): Remove dis-asm.h dependency.
258 (tic80-dis.o, tic80-opc.o): Add rules per comment in Makefile.in.
263 * mips16-opc.c: Add "abs".
268 * Makefile.in (ALL_MACHINES): Add tic80-dis.o and tic80-opc.o.
269 * disassemble.c (ARCH_tic80): Define if ARCH_all is defined.
270 (disassembler): Add bfd_arch_tic80 support to set disassemble
272 * tic80-dis.c (print_insn_tic80): Add stub.
276 * configure.in (arch in $selarchs): Add bfd_tic80_arch entry.
277 * configure: Regenerate with autoconf.
278 * tic80-dis.c: Add file.
279 * tic80-opc.c: Add file.
285 * d10v-opc.c (pre_defined_registers): Add cr[0-15], dpc, dpsw, link.
290 * mn10200-opc.c (mn10200_operands): Add SIMM16N.
291 (mn10200_opcodes): Use it for some logicals and btst insns.
292 Add "break" and "trap" instructions.
294 * mn10300-opc.c (mn10300_opcodes): Add "break" instruction.
296 * mn10200-opc.c: Add pseudo-ops for "mov (an),am" and "mov an,(am)".
300 * mips-dis.c (print_mips16_insn_arg): The base address of a PC
301 relative load or add now depends upon whether the instruction is
306 * mn10200-dis.c: Finish writing disassembler.
307 * mn10200-opc.c (mn10200_opcodes): Fix mask for "mov imm8,dn".
308 Fix mask for "jmp (an)".
310 * mn10300-dis.c (disassemble, print_insn_mn10300): Corrently
311 handle endianness issues for mn10300.
313 * mn10200-opc.c (mn10200_opcodes): Fix operands for "movb dm,(an)".
317 * mn10200-opc.c (mn10200_opcodes): "mov imm8,d0" is a format 2
318 instruction. Fix opcode field for "movb (imm24),dn".
320 * mn10200-opc.c (mn10200_operands): Fix insertion position
325 * mn10200-opc.c: Create mn10200 opcode table.
326 * mn10200-dis.c: Flesh out mn10200 disassembler. Not ready,
327 but moving along nicely.
331 * Makefile.in (ALL_MACHINES): Add mips16-opc.o.
335 * m68k-opc.c (m68k_opcodes): Revert change to use < and >
336 specifiers for fmovem* instructions.
340 * mn10300-dis.c (disassemble): Remove '$' register prefixing.
344 * mips16-opc.c: Change opcode for entry/exit to avoid conflicting
349 * mn10300-opc.c: Add some comments explaining the various
352 * mn10300-dis.c (disassemble): Fix minor gcc -Wall warnings.
356 * m68k-dis.c (print_insn_arg): Handle new < and > operand
359 * m68k-opc.c (m68k_opcodes): Simplify table by using < and >
360 operand specifiers in fmovm* instructions.
364 * ppc-opc.c (insert_li): Give an error if the offset has the two
365 least significant bits set.
369 * mips-dis.c (print_insn_mips16): Separate the instruction from
370 the arguments with a tab, not a space.
374 * mn10300-dis.c (disasemble): Finish conversion to '$' as
377 * mn10300-opc.c (mn10300_opcodes): Fix mask field for
382 * configure: Rebuild with autoconf 2.12.
384 Add support for mips16 (16 bit MIPS implementation):
385 * mips16-opc.c: New file.
386 * mips-dis.c: Include "elf-bfd.h" and "elf/mips.h".
387 (mips16_reg_names): New static array.
388 (print_insn_big_mips): Use print_insn_mips16 in 16 bit mode or
389 after seeing a 16 bit symbol.
390 (print_insn_little_mips): Likewise.
391 (print_insn_mips16): New static function.
392 (print_mips16_insn_arg): New static function.
393 * mips-opc.c: Add jalx instruction.
394 * Makefile.in (mips16-opc.o): New target.
395 * configure.in: Use mips16-opc.o for bfd_mips_arch.
396 * configure: Rebuild.
400 * m68k-opc.c (m68k_opcodes): Simplify table by using < and >
401 operand specifiers in *save, *restore and movem* instructions.
403 * m68k-opc.c (m68k_opcodes): Fix move and movem instructions for
406 * m68k-opc.c (m68k_opcodes): The coldfire (mcf5200) can only use
407 register operands for immediate arithmetic, not, neg, negx, and
408 set according to condition instructions.
410 * m68k-opc.c (m68k_opcodes): Consistantly Use "s" as the storage
411 specifier of the effective-address operand in immediate forms of
412 arithmetic instructions. The specifier for the immediate operand
413 notes how and where the constant will be stored.
417 * mn10300-opc.c (mn10300_opcodes): Remove redundant "lcc"
420 * mn10300-dis.c (disassemble): Use '$' instead of '%' for
423 * mn10300-dis.c (disassemble): Prefix registers with '%'.
427 * mn10300-dis.c (disassemble): Handle register lists.
429 * mn10300-opc.c: Fix handling of register list operand for
430 "call", "ret", and "rets" instructions.
432 * mn10300-dis.c (disassemble): Print PC-relative and memory
433 addresses symbolically if possible.
434 * mn10300-opc.c: Distinguish between absolute memory addresses,
435 pc-relative offsets & random immediates.
437 * mn10300-dis.c (print_insn_mn10300): Fix fetch of last byte
439 (disassemble): Handle SPLIT and EXTENDED operands.
443 * mn10300-dis.c: Rough cut at printing some operands.
445 * mn10300-dis.c: Start working on disassembler support.
446 * mn10300-opc.c (mn10300_opcodes): Fix masks on several insns.
448 * mn10300-opc.c (mn10300_operands): Add "REGS" for a register
450 (mn10300_opcodes): Use REGS for register list in "movm" instructions.
455 * d10v-opc.c (d10v_opcodes): Add3 sets the carry.
460 * mn10300-opc.c (mn10300_opcodes): Demand parens around
461 register argument is calls and jmp instructions.
465 * mn10300-opc.c (mn10300_opcodes): Use DN01 for putx and
466 getx operand. Fix opcode for mulqu imm,dn.
470 * mn10300-opc.c (mn10300_operands): Hijack "bits" field
471 in MN10300_OPERAND_SPLIT operands for how many bits
472 appear in the basic insn word. Add IMM32_HIGH24,
473 IMM32_HIGH24_LOWSHIFT8, IMM8E_SHIFT8.
474 (mn10300_opcodes): Use new operands as needed.
476 * mn10300-opc.c (mn10300_operands): Add IMM32_LOWSHIFT8
477 for bset, bclr, btst instructions.
478 (mn10300_opcodes): Use new IMM32_LOWSHIFT8 as needed.
480 * mn10300-opc.c (mn10300_operands): Remove many redundant
481 operands. Update opcode table as appropriate.
482 (IMM32): Add MN10300_OPERAND_SPLIT flag.
483 (mn10300_opcodes): Fix single bit error in mov imm32,dn insn.
487 * mn10300-opc.c (mn10300_operands): Add DN2, DM2, AN2, AM2
488 operands (for indexed load/stores). Fix bitpos for DI
489 operand. Add SN8N_SHIFT8, IMM8_SHIFT8, and D16_SHIFT for the
490 few instructions that insert immediates/displacements in the
491 middle of the instruction. Add IMM8E for 8 bit immediate in
492 the extended part of an instruction.
493 (mn10300_operands): Use new opcodes as appropriate.
498 * d10v-opc.c (d10v_opcodes): Declare the trap instruction
499 sequential so the assembler never parallelizes it with
505 * mn10300-opc.c (mn10300_operands): Add DN01 and AN01 for
506 a data/address register that appears in register field 0
507 and register field 1.
508 (mn10300_opcodes): Use DN01 and AN01 for mov/cmp imm8,DN/AN
512 * alpha-dis.c (print_insn_alpha): Use new NOPAL mask for
513 standard disassembly.
515 * alpha-opc.c (alpha_operands): Rearrange flags slot.
516 (alpha_opcodes): Add new BWX, CIX, and MAX instructions.
517 Recategorize PALcode instructions.
522 * v850-opc.c (v850_opcodes): Add relaxing "jbr".
527 * mips-dis.c (_print_insn_mips): Don't print a trailing tab if
528 there are no operand types.
533 * v850-opc.c (D9_RELAX): Renamed from D9, all references
535 (v850_operands): Make sure D22 immediately follows D9_RELAX.
540 * i386-dis.c (print_insn_x86): Set info->bytes_per_line to 5.
545 * v850-opc.c (insert_d8_6): Fix operand insertion for sld.w
546 and sst.w instructions.
548 * v850-opc.c (v850_opcodes): Add "jCC" instructions (aliases for
554 * mips-dis.c (_print_insn_mips): Use a tab between the instruction
559 * ppc-opc.c (PPCPWR2): Define.
560 (powerpc_opcodes): Use PPCPWR2 for fsqrt, rather than duplicating
565 * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode
566 field for movhu instruction.
569 * v850-dis.c (disassemble): For V850_OPERAND_SIGNED operands,
570 cast value to "long" not "signed long" to keep hpux10
576 * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode field
579 * mn10300-opc.c (FMT*): Remove definitions.
581 * mn10300-opc.c (mn10300_opcodes): Fix destination register
582 for shift-by-register opcodes.
584 * mn10300-opc.c (mn10300_operands): Break DN, DM, AN, AM
585 into [AD][MN][01] for encoding the position of the register
590 * mn10300-opc.c (mn10300_opcodes): Add "extended" instructions,
591 "putx", "getx", "mulq", "mulqu", "sat16", "sat24", "bsch".
595 * mn10300-opc.c (mn10300_operands): Remove "REGS" operand.
596 Fix various typos. Add "PAREN" operand.
598 (mn10300_opcodes): Surround all memory addresses with "PAREN"
599 operands. Fix several typos.
601 * mn10300-opc.c (mn10300_opcodes): Fix typos in yesterday's
606 * mn10300-opc.c (FMT_XX): Renumber starting at one.
607 (mn10300_operands): Rough cut. Enough to parse "mov" instructions
609 (mn10300_opcodes): Break opcode format out into its own field.
610 Update many operand fields to deal with signed vs unsigned
611 issues. Fix one or two typos in the "mov" instruction
612 opcode, mask and/or operand fields.
616 * m68k-opc.c (plusha): Prefer encoding for m68040up, in case
621 * mn10300-opc.c (mn10300_opcodes): Add opcode & masks for
622 all opcodes. Very rough cut at operands for all opcodes.
624 * mn10300-opc.c (mn10300_opcodes): Start fleshing out the
629 * mn10200-opc.c, mn10300-opc.c: New files.
630 * mn10200-dis.c, mn10300-dis.c: New files.
631 * mn10x00-opc.c, mn10x00-dis.c: Deleted.
632 * disassemble.c: Break mn10x00 support into 10200 and 10300
634 * configure.in: Likewise.
635 * configure: Rebuilt.
639 * Makefile.in (MOSTLYCLEAN): Move config.log to distclean.
643 * mn10x00-opc.c, mn10x00-dis.c: New files for Matsushita
645 * disassemble (ARCH_mn10x00): Define.
646 (disassembler): Handle bfd_arch_mn10x00.
647 * configure.in: Recognize bfd_mn10x00_arch.
648 * configure: Rebuilt.
652 * i386-dis.c (op_rtn): Change to be a pointer. Adjust uses
653 accordingly. Don't declare functions using op_rtn.
658 * v850-dis.c (disassemble): Add memaddr argument. Re-arrange
659 params to be more standard.
660 * (disassemble): Print absolute addresses and symbolic names for
661 branch and jump targets.
662 * v850-opc.c (v850_operand): Add displacement flag to 9 and 22
664 * (v850_opcodes): Add breakpoint insn.
669 * m68k-opc.c: Move the fmovemx data register cases before the
670 other cases, so that they get recognized before the data register
671 does gets treated as a degenerate register list.
675 * mips-opc.c: Add a case for "div" and "divu" with two registers
676 and a destination of $0.
680 * mips-dis.c (print_insn_arg): Add prototype.
681 (_print_insn_mips): Ditto.
685 * mips-dis.c (print_insn_arg): Print condition code registers as
690 * sparc-opc.c (sparc_opcodes): Add setuw, setsw, setx.
695 * v850-dis.c (disassemble): Make static. Provide prototype.
699 * v850-opc.c (insert_d9, insert_d22): Fix boundary case
704 * v850-dis.c (disassemble): Handle insertion of ',', '[' and
705 ']' characters into the output stream.
706 * v850-opc.c (v850_opcodes: Remove size field from all opcodes.
707 Add "memop" field to all opcodes (for the disassembler).
708 Reorder opcodes so that "nop" comes before "mov" and "jr"
711 * v850-dis.c (print_insn_v850): Fix typo in last change.
713 * v850-dis.c (print_insn_v850): Properly handle disassembling
714 a two byte insn at the end of a memory region when the memory
715 region's size is only two byte aligned.
717 * v850-dis.c (v850_cc_names): Fix stupid thinkos.
719 * v850-dis.c (v850_reg_names): Define.
720 (v850_sreg_names, v850_cc_names): Likewise.
721 (disassemble): Very rough cut at printing operands (unformatted).
723 * v850-opc.c (BOP_MASK): Fix.
724 (v850_opcodes): Fix mask for jarl and jr.
726 * v850-dis.c: New file. Skeleton for disassembler support.
727 * Makefile.in Remove v850 references, they're not needed here
728 and they weren't being sanitized away.
729 * configure.in: Add v850-dis.o when building v850 toolchains.
730 * configure: Rebuilt.
731 * disassemble.c (disassembler): Call v850 disassembler.
733 * v850-opc.c (insert_d8_7, extract_d8_7): New functions.
734 (insert_d8_6, extract_d8_6): New functions.
735 (v850_operands): Rename D7S to D7; operand for D7 is unsigned.
736 Rename D8 to D8_7, use {insert,extract}_d8_7 routines.
738 (IF4A, IF4B): Use "D7" instead of "D7S".
739 (IF4C, IF4D): Use "D8_7" instead of "D8".
740 (IF4E, IF4F): New. Use "D8_6".
741 (v850_opcodes): Use IF4A/IF4B for sld.b/sst.b. Use IF4C/IF4D for
742 sld.h/sst.h. Use IF4E/IF4F for sld.w/sst.w.
744 * v850-opc.c (insert_d16_15, extract_d16_15): New functions.
745 (v850_operands): Change D16 to D16_15, use special insert/extract
746 routines. New new D16 that uses the generic insert/extract code.
747 (IF7A, IF7B): Use D16_15.
748 (IF7C, IF7D): New. Use D16.
749 (v850_opcodes): Use IF7C and IF7D for ld.b and st.b.
751 * v850-opc.c (insert_d9, insert_d22): Slightly improve error
752 message. Issue an error if the branch offset is odd.
754 * v850-opc.c: Add notes about needing special insert/extract
755 for all the load/store insns, except "ld.b" and "st.b".
757 * v850-opc.c (insert_d22, extract_d22): New functions.
758 (v850_operands): Use insert_d22 and extract_d22 for
760 (insert_d9): Fix range check.
764 * v850-opc.c (v850_operands): Add V850_OPERAND_SIGNED flag
765 and set bits field to D9 and D22 operands.
769 * v850-opc.c (v850_operands): Define SR2 operand.
770 (v850_opcodes): "ldsr" uses R1,SR2.
772 * v850-opc.c (v850_opcodes): Fix opcode specs for
773 sld.w, sst.b, sst.h, sst.w, and nop.
777 * v850-opc.c (v850_opcodes): Add null opcode to mark the
778 end of the opcode table.
784 * d10v-opc.c (pre_defined_registers): Added register pairs,
785 "r0-r1", "r2-r3", etc.
791 * v850-opc.c (v850_operands): Make I16 be a signed operand.
792 Create I16U for an unsigned 16bit mmediate operand.
793 (v850_opcodes): Use I16U for "ori", "andi" and "xori".
795 * v850-opc.c (v850_operands): Define EP operand.
796 (IF4A, IF4B, IF4C, IF4D): Use EP.
798 * v850-opc.c (v850_opcodes): Fix opcode numbers for "mov"
799 with immediate operand, "movhi". Tweak "ldsr".
801 * v850-opc.c (v850_opcodes): Get ld.[bhw] and st.[bhw]
802 correct. Get sld.[bhw] and sst.[bhw] closer.
804 * v850-opc.c (v850_operands): "not" is a two byte insn
806 * v850-opc.c (v850_opcodes): Correct bit pattern for setf.
808 * v850-opc.c (v850_operands): D16 inserts at offset 16!
810 * v850-opc.c (two): Get order of words correct.
812 * v850-opc.c (v850_operands): I16 inserts at offset 16!
814 * v850-opc.c (v850_operands): Add "SR1" and "SR2" for system
815 register source and destination operands.
816 (v850_opcodes): Use SR1 and SR2 for "ldsr" and "stsr".
818 * v850-opc.c (v850_opcodes): Fix thinko in "jmp" opcode. Fix
819 same thinko in "trap" opcode.
821 * v850-opc.c (v850_opcodes): Add initializer for size field
824 * v850-opc.c (v850_operands): D6 -> DS7. References changed.
825 Add D8 for 8-bit unsigned field in short load/store insns.
826 (IF4A, IF4D): These both need two registers.
827 (IF4C, IF4D): Define. Use 8-bit unsigned field.
828 (v850_opcodes): For "sld.h", "sld.w", "sst.h", "sst.w", use
829 IF4C & IF4D. For "trap" use I5U, not I5. Add IF1 operand
830 for "ldsr" and "stsr".
831 * v850-opc.c (v850_operands): 3-bit immediate for bit insns
834 * v850-opc.c (v850_opcodes): Correct short store half (sst.h) and
835 short store word (sst.w).
839 * v850-opc.c (v850_operands): Added insert and extract fields,
840 pointers to functions that handle unusual operand encodings.
844 * v850-opc.c (v850_opcodes): Enable "trap".
846 * v850-opc.c (v850_opcodes): Fix order of displacement
847 and register for "set1", "clr1", "not1", and "tst1".
851 * v850-opc.c (v850_operands): Add "B3" support.
852 (v850_opcodes): Fix and enable "set1", "clr1", "not1"
855 * v850-opc.c (v850_opcodes): "jmp" has only an R1 operand.
857 * v850-opc.c: Close unterminated comment.
861 * v850-opc.c (v850_operands): Add flags field.
862 (v850_opcodes): add move opcodes.
866 * Makefile.in (ALL_MACHINES): Add v850-opc.o.
867 * configure: (bfd_v850v_arch) Add new case.
868 * configure.in: (bfd_v850_arch) Add new case.
869 * v850-opc.c: New file.
874 * sparc-dis.c (print_insn_sparc): Handle little endian sparcs.
879 * d10v-opc.c: Add additional information to the opcode
880 table to help determinine which instructions can be done
886 * mpw-make.sed: Update editing of include pathnames to be
891 * arm-opc.h: Added "bx" instruction definition.
895 * alpha-opc.c (EV4EXTHWINDEX): Field width should be 8 not 5.
900 * d10v-opc.c (d10v_opcodes): Minor fixes to addi and bl.l.
904 * d10v-opc.c (d10v_opcodes): Correct 'mv' unit entry to EITHER.
909 * makefile.vms: Update for alpha-opc changes.
913 * i386-dis.c (print_insn_i386): Actually return the correct value.
914 (ONE, OP_ONE): #ifdef out; not used.
919 * d10v-opc.c (d10v_opcodes): Added 2 accumulator sub instructions.
920 Changed subi operand type to treat 0 as 16.
925 * m68k-opc.c: Add cpushl for the mcf5200. From Ken Rose
930 * arm-opc.h: (arm_opcodes): Added halfword and sign-extension
931 memory transfer instructions. Add new format string entries %h and %s.
932 * arm-dis.c: (print_insn_arm): Provide decoding of the new
938 * d10v-opc.c (d10v_operands): Added UNUM4S; a 4-bit accumulator shift.
939 (d10v_opcodes): Modified accumulator shift instructions to use UNUM4S.
944 * alpha-dis.c (print_insn_alpha_osf): Remove.
945 (print_insn_alpha_vms): Remove.
946 (print_insn_alpha): Make globally visible. Chose the register
947 names based on info->flavour.
948 * disassemble.c: Always return print_insn_alpha for the alpha.
953 * d10v-dis.c (dis_long): Handle unknown opcodes.
957 * d10v-opc.c: Changes to support signed and unsigned numbers.
958 All instructions with the same name that have long and short forms
959 now end in ".l" or ".s". Divs added.
960 * d10v-dis.c: Changes to support signed and unsigned numbers.
964 * d10v-dis.c: Change all functions to use info->print_address_func.
969 * m68k-opc.c (m68k_opcodes): Make opcode masks for the ColdFire
970 move ccr/sr insns more strict so that the disassembler only
971 selects them when the addressing mode is data register.
975 * d10v-opc.c (pre_defined_registers): Declare.
976 * d10v-dis.c (print_operand): Now uses pre_defined_registers
977 to pick a better name for the registers.
982 * sparc-opc.c: Fix opcode values for fpack16, and fpackfix. Fix
983 operands for fexpand and fpmerge. From Christian Kuehnke
988 * alpha-dis.c (print_insn_alpha): No longer the user-visible
989 print routine. Take new regnames and cpumask arguments.
990 Kill the environment variable nonsense.
991 (print_insn_alpha_osf): New function. Do OSF/1 style regnames.
992 (print_insn_alpha_vms): New function. Do VMS style regnames.
993 * disassemble.c (disassembler): Test bfd flavour to pick
994 between OSF and VMS routines. Default to OSF.
998 * configure.in: Call AC_SUBST (INSTALL_SHLIB).
999 * configure: Rebuild.
1000 * Makefile.in (install): Use @INSTALL_SHLIB@.
1005 * configure: (bfd_d10v_arch) Add new case.
1006 * configure.in: (bfd_d10v_arch) Add new case.
1007 * d10v-dis.c: New file.
1008 * d10v-opc.c: New file.
1009 * disassemble.c (disassembler) Add entry for d10v.
1014 * m68k-opc.c (m68k_opcodes): Fix bugs in coldfire insns relating
1015 to bcc, trapfl, subxl, and wddata discovered by Andreas Schwab.
1019 * i386-dis.c: Get rid of print_insn_i8086. Use info.mach to
1020 distinguish between variants of the instruction set.
1021 * sparc-dis.c: Get rid of print_insn_sparclite. Use info.mach to
1022 distinguish between variants of the instruction set.
1026 * i386-dis.c (print_insn_i8086): New routine to disassemble using
1027 the 8086 instruction set.
1028 * i386-dis.c: General cleanups. Make most things static. Add
1029 prototypes. Get rid of static variables aflags and dflags. Pass
1030 them as args (to almost everything).
1034 * h8300-dis.c (bfd_h8_disassemble): Handle macregs in ldmac insns.
1036 * h8300-dis.c (bfd_h8_disassemble): Handle "ldm.l" and "stm.l".
1038 * h8300-dis.c (bfd_h8_disassemble): "abs" is implicitly two
1039 if the next arg is marked with SRC_IN_DST. Gross.
1041 * h8300-dis.c (bfd_h8_disassemble): Print "exr" when
1042 we're looking for and find EXR.
1044 * h8300-dis.c (bfd_h8_disassemble): We don't have a match
1045 if we're looking for KBIT and we don't find it.
1047 * h8300-dis.c (bfd_h8_disassemble): Mask off unwanted bits
1050 * h8300-dis.c (bfd_h8_disassemble): Don't set plen for
1051 3bit immediate operands.
1055 * Released binutils 2.7.
1057 * alpha-opc.c: Add new case of "mov". From Klaus Kaempf
1062 * alpha-opc.c: Correct second case of "mov" to use OPRL.
1066 * sparc-dis.c (print_insn_sparclite): New routine to print
1067 sparclite instructions.
1071 * m68k-opc.c (m68k_opcodes): Add coldfire support.
1075 * sparc-opc.c (asi_table): Add #ASI_N, #ASI_N_L, #ASI_NUCLEUS,
1076 #ASI_NUCLEUS_LITTLE. Rename #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_L
1077 to #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_LITTLE.
1081 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir):
1082 Use autoconf-set values.
1083 (docdir, oldincludedir): Removed.
1084 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1088 * alpha-opc.c: New file.
1089 * alpha-opc.h: Remove.
1090 * alpha-dis.c: Complete rewrite to use new opcode table.
1091 * configure.in: For bfd_alpha_arch, use alpha-opc.o.
1092 * configure: Rebuild with autoconf 2.10.
1093 * Makefile.in (ALL_MACHINES): Add alpha-opc.o.
1094 (alpha-dis.o): Depend upon $(INCDIR)/opcode/alpha.h, not
1096 (alpha-opc.o): New target.
1100 * sparc-dis.c (print_insn_sparc): Remove unused local variable i.
1101 Set imm_added_to_rs1 even if the source and destination register
1104 * sparc-opc.c: Add some two operand forms of the wr instruction.
1108 * h8300-dis.c (bfd_h8_disassemble): Rename "hmode" argument
1111 * disassemble.c (disassembler): Handle H8/S.
1112 * h8300-dis.c (print_insn_h8300s): New function for H8/S.
1116 * sparc-opc.c: Add beq/teq as aliases for be/te.
1118 * ppc-opc.c: Fix fcmpo opcode. From Sergei Steshenko
1123 * makefile.vms: New file.
1125 * alpha-dis.c (print_insn_alpha): Print lda ra,lit(rz) as mov.
1129 * h8300-dis.c (bfd_h8_disassemble): Always print ABS8MEM with :8,
1134 * i386-dis.c (OP_OFF): Call append_prefix.
1138 * ppc-opc.c (instruction encoding macros): Add explicit casts to
1139 unsigned long to silence a warning from the Solaris PowerPC
1144 * sparc-opc.c (sparc_opcodes): Add ultrasparc vis extensions.
1148 * sparc-dis.c (X_IMM,X_SIMM): New macros.
1150 (print_insn_sparc): Merge cases i,I,j together. New cases X,Y.
1151 * sparc-opc.c (sparc_opcodes): Use X for 5 bit shift constants,
1152 Y for 6 bit shift constants. Rewrite entries for crdcxt, cwrcxt,
1153 cpush, cpusha, cpull sparclet insns.
1157 * sparc-dis.c (compute_arch_mask): Replace ANSI style def with K&R.
1161 * sparc-opc.c: Set F_FBR on floating point branch instructions.
1162 Set F_FLOAT on other floating point instructions.
1166 * ppc-opc.c (PPC860): Macro for 860/821 specific instructions and
1168 (powerpc_opcodes): Add 860/821 specific SPRs.
1172 * configure.in: Permit --enable-shared to specify a list of
1173 directories. Set and substitute BFD_PICLIST.
1174 * configure: Rebuild.
1175 * Makefile.in (BFD_PICLIST): Rename from BFD_LIST. Change all
1176 uses. Set to @BFD_PICLIST@.
1180 * h8300-dis.c (bfd_h8_disassemble): Use "bit" for L_3 immediates,
1181 not "abs", which may be needed for the absolute in something
1182 like btst #0,@10:8. Print L_3 immediates separately from other
1183 immediates. Change ABSMOV reference to ABS8MEM.
1187 * sparc-dis.c (opcodes_initialized): Move inside print_insn_sparc.
1188 (current_arch_mask): New static global.
1189 (compute_arch_mask): New static function.
1190 (print_insn_sparc): Delete sparc_v9_p. New static local
1191 current_mach. Resort opcode table if current_mach changes.
1192 Generalize "insn not supported" test.
1193 (compare_opcodes): Prefer supported opcodes to nonsupported ones.
1194 Delete test for v9/!v9.
1195 * sparc-opc.c (MASK_*): Use SPARC_OPCODE_ARCH_MASK.
1197 (brfc): Split into CBR and FBR for coprocessor/fp branches.
1198 (brfcx): Renamed to FBRX.
1199 (condfc): Renamed to CONDFC. Pass v6notlet to CBR (standard
1200 coprocessor mnemonics are not supported on the sparclet).
1201 (condf): Renamed to CONDF.
1202 (SLCBCC2): Delete F_ALIAS flag.
1206 * sparc-opc.c (sparc_opcodes): rd must be 0 for
1207 mov foo,{%y,%psr,%wim,%tbr}. Support mov foo,%asrX.
1211 * Makefile.in (config.status): Depend upon BFD VERSION file, so
1212 that the shared library version number is set correctly.
1216 * configure.in: Use AC_CHECK_TOOL to find ar and ranlib. From
1218 * configure: Rebuild.
1222 * z8kgen.c (internal, gas): Call xmalloc rather than unchecked
1227 * configure: Rebuild with autoconf 2.8.
1231 * sparc-dis.c (print_insn_sparc): Handle 'O' operand char like 'r'.
1232 * sparc-opc.c (sparc_opcodes): Use 'O' operand char for `neg reg'.
1236 * configure.in: Don't set SHLIB or SHLINK to an empty string,
1237 since they appear as targets in Makefile.in.
1238 * configure: Rebuild.
1242 * mpw-make.sed: Edit out shared library support bits.
1246 * sparc-opc.c (v8,v6notv9): Add MASK_SPARCLET.
1247 (sparc_opcode_archs): Add MASK_V8 to sparclet entry.
1248 (sparc_opcodes): Add sparclet insns.
1249 (sparclet_cpreg_table): New static local.
1250 (sparc_{encode,decode}_sparclet_cpreg): New functions.
1251 * sparc-dis.c (print_insn_sparc): Handle sparclet cpregs.
1255 * i386-dis.c (index16): New static variable.
1256 (putop): Print jecxz for 32 bit case, jcxz for 16 bit, not the
1258 (OP_indirE): Return result of OP_E.
1259 (OP_E): Check for 16 bit addressing mode, and disassemble
1260 correctly. Optimised 32 bit case a little. Don't print
1261 "(base,index,scale)" when sib specifies only an offset.
1265 * configure.in: Set and substitute SHLIB_DEP.
1266 * configure: Rebuild.
1267 * Makefile.in (SHLIB_DEP): New variable.
1268 (LIBIBERTY_LISTS, BFD_LIST): New variables.
1269 (stamp-piclist): Depend upon LIBIBERTY_LISTS and BFD_LIST. If
1270 COMMON_SHLIB, add them to piclist with appropriate modifications.
1271 ($(SHLIB)): Depend upon $(SHLIB_DEP). Don't check COMMON_SHLIB
1272 here: just use piclist.
1276 * sparc-dis.c (MASK_V9,V9_ONLY_P,V9_P): Define.
1277 (print_insn_sparc): Rewrite v9/not-v9 tests.
1278 (compare_opcodes): Likewise.
1279 * sparc-opc.c (MASK_<ARCH>): Define.
1280 (v6,v7,v8,sparclite,v9,v9a): Redefine.
1281 (sparclet,v6notv9): Define.
1282 (sparc_opcode_archs): Delete member `conflicts'. Add `supported'.
1283 (sparc_opcodes): Delete F_NOTV9, use v6notv9 instead.
1287 * configure.in: Call AC_PROG_CC before configure.host.
1288 * configure: Rebuild.
1290 * Makefile.in (SONAME): Remove leading ../bfd/ from $(SHLIB).
1294 * i386-dis.c (onebyte_has_modrm): New static array.
1295 (twobyte_has_modrm): New static array.
1296 (print_insn_i386): Only fetch the mod/reg/rm byte if it is needed.
1300 * Makefile.in ($(SHLINK)): Check ts against $(SHLIB), not
1305 * ppc-opc.c (PPC): Undef, so default defination on Windows NT
1310 * m68k-opc.c (m68k_opcodes): The bkpt instruction is supported on
1311 m68010up, not just m68020up | cpu32.
1313 * Makefile.in (SONAME): New variable.
1314 ($(SHLINK)): Make a link to the transformed name, as well.
1315 (stamp-tshlink): New target.
1316 (install): Skip stamp-tshlink during install.
1320 * configure.in: Call AC_ARG_PROGRAM.
1321 * configure: Rebuild.
1322 * Makefile.in (program_transform_name): New variable.
1323 (install): Transform library name before installing it.
1327 * i960-dis.c (mem): Add HX dcinva instruction.
1329 Support for building as a shared library, based on patches from
1331 * configure.in: Add AC_ARG_ENABLE for shared and commonbfdlib.
1332 New substitutions: ALLLIBS, PICFLAG, SHLIB, SHLIB_CC,
1333 SHLIB_CFLAGS, COMMON_SHLIB, SHLINK.
1334 * configure: Rebuild.
1335 * Makefile.in (ALLLIBS): New variable.
1336 (PICFLAG, SHLIB, SHLIB_CC, SHLIB_CFLAGS): New variables.
1337 (COMMON_SHLIB, SHLINK): New variables.
1338 (.c.o): If PICFLAG is set, compile twice, once PIC, once normal.
1339 (STAGESTUFF): Remove variable.
1340 (all): Depend upon $(ALLLIBS) rather than $(TARGETLIB).
1341 (stamp-piclist, piclist): New targets.
1342 ($(SHLIB), $(SHLINK)): New targets.
1343 ($(OFILES)): Depend upon stamp-picdir.
1344 (disassemble.o): Build twice if PICFLAG is set.
1345 (MOSTLYCLEAN): Add pic/*.o.
1346 (clean): Remove $(SHLIB), $(SHLINK), piclist, and stamp-piclist.
1347 (distclean): Remove pic and stamp-picdir.
1348 (install): Install shared libraries.
1349 (stamp-picdir): New target.
1353 * sparc-dis.c (print_insn_sparc): Delete DISASM_RAW_INSN support.
1354 Print unknown instruction as "unknown", rather than in hex.
1358 * dis-buf.c: Include "sysdep.h" before "dis-asm.h".
1362 * sparc-opc.c (sparc_opcode_archs): Mark v8/sparclite as conflicting.
1366 * i386-dis.c (print_insn_i386): Only fetch the mod/reg/rm byte
1367 when necessary. From Ulrich Drepper
1372 * sparc-dis.c (print_insn_sparc): NUMOPCODES replaced with
1373 sparc_num_opcodes. Update architecture enum values.
1374 * sparc-opc.c (sparc_opcode_archs): Replaces architecture_pname.
1375 (sparc_opcode_lookup_arch): New function.
1376 (sparc_num_opcodes): Renamed from bfd_sparc_num_opcodes.
1377 (sparc_opcodes): Add v9a shutdown insn.
1381 * sparc-dis.c (print_insn_sparc): Renamed from print_insn.
1382 If DISASM_RAW_INSN, print insn in hex. Handle v9a as opcode
1384 (print_insn_sparc64): Deleted.
1385 * disassemble.c (disassembler, case bfd_arch_sparc): Always use
1388 * sparc-opc.c (architecture_pname): Add v9a.
1392 * alpha-opc.h (alpha_insn_set): VAX floating point opcode was
1393 incorrectly defined as 0x16 when it should be 0x15.
1394 (FLOAT_FORMAT_MASK): function code is 11 bits, not just 7 bits!
1395 (alpha_insn_set): added cvtst and cvttq float ops. Also added
1396 excb (exception barrier) which is defined in the Alpha
1397 Architecture Handbook version 2.
1398 * alpha-dis.c (print_insn_alpha): Fixed special-case decoding for
1399 OPERATE_FORMAT_CODE type instructions. The bug caused mulq to be
1400 disassembled as or, for example.
1404 * mips-dis.c (print_insn_arg): Print cases 'i' and 'u' in hex.
1405 (_print_insn_mips): Change i from int to unsigned int.
1409 * ppc-opc.c (powerpc_opcodes): tlbi POWER opcode form different
1410 from tlbie PowerPC opcode. Add PPC603 tlbld and tlbli.
1414 * i386-dis.c: Added Pentium Pro instructions.
1418 * ppc-opc.c (fsqrt{,.}): Duplicate for PowerPC in addition to
1423 * sh-opc.h (sh_nibble_type): Added REG_B.
1424 (sh_arg_type): Added A_REG_B.
1425 (sh_table): Added pref and bank reg versions of ldc, ldc.l, stc
1427 * sh-dis.c (print_insn_shx): Added cases for REG_B and A_REG_B.
1431 * disassemble.c (disassembler): Use new bfd_big_endian macro.
1435 * Makefile.in (distclean): Remove stamp-h. From Ronald
1441 * alpha-dis.c (print_insn_alpha): fixed decoding of cpys
1446 * sh-opc.h (sh_arg_type): Added A_SSR and A_SPC.
1447 (sh_table): Added many SH3 opcodes.
1448 * sh-dis.c (print_insn_shx): Added cases for A_SSR and A_SPC.
1452 * ppc-opc.c (subfc., subfco): Mark this PPCCOM, not PPC.
1453 (subco,subco.): Mark this PPC, not PPCCOM.
1457 * configure: Rebuild with autoconf 2.7.
1461 * configure: Rebuild with autoconf 2.6.
1465 * configure.in: Sort list of architectures. Accept but do nothing
1466 for alliant, convex, pyramid, romp, and tahoe.
1470 * a29k-dis.c (print_special): Change num to unsigned int.
1474 * a29k-dis.c (print_insn): Cast insn24 to unsigned long when
1479 * configure.in: Call AC_CHECK_PROG to find and cache AR.
1480 * configure: Rebuilt.
1484 * configure.in: Add case for bfd_i860_arch.
1485 * configure: Rebuild.
1489 * m68k-opc.c (m68k_opcodes): Correct fmoveml operands.
1490 * m68k-dis.c (NEXTSINGLE): Change i to unsigned int.
1491 (NEXTDOUBLE): Likewise.
1492 (print_insn_m68k): Don't match fmoveml if there is more than one
1493 register in the list.
1494 (print_insn_arg): Handle a place of '8' for a type of 'L'.
1498 * m68k-opc.c: Use #W rather than #w.
1499 * m68k-dis.c (print_insn_arg): Handle new 'W' place.
1503 * m68k-opc.c (m68k_opcode_aliases): Add dbfw as an alias for dbf,
1504 and likewise for all the dbxx opcodes.
1508 * arc-dis.c: Include elf-bfd.h rather than libelf.h.
1512 * mips-opc.c: Added shorthand (V1) for INSN_4100 manifest. Added
1513 the VR4100 specific instructions to the mips_opcodes structure.
1517 * mpw-config.in, mpw-make.sed: Remove ugly workaround for
1518 ugly Metrowerks bug in CW6, is fixed in CW7.
1522 * ppc-opc.c (whole file): Add flags for common/any support.
1526 * Makefile.in (BISON): Remove macro.
1527 (FLAGS_TO_PASS): Remove BISON.
1533 * m68k-dis.c (print_insn_m68k): Recognize all two-word
1534 instructions that take no args by looking at the match mask.
1535 (print_insn_arg): Always print "%" before register names.
1536 [case 'c']: Use "nc" for the no-cache case, as recognized by gas.
1537 [case '_']: Don't print "@#" before address.
1538 [case 'J']: Use "%s" as format string, not register name.
1539 [case 'B']: Treat place == 'C' like 'l' and 'L'.
1543 * i386-dis.c: Describe cmpxchg8b operand, and spell the opcode
1550 * alpha-opc.h (MEMORY_FUNCTION_FORMAT_MASK): added.
1551 (alpha_insn_set): added definitions for VAX floating point
1552 instructions (Unix compilers don't generate these, but handcoded
1553 assembly might still use them).
1555 * alpha-dis.c (print_insn_alpha): added support for disassembling
1556 the miscellaneous instructions in the Alpha instruction set.
1560 * mpw-config.in: Add m68k-opc.c.o to BFD_MACHINES for m68k,
1561 no longer create sysdep.h, sed ppc-opc.c to work around a
1562 serious Metrowerks C bug.
1563 * mpw-make.in: Remove.
1564 * mpw-make.sed: New file, used by mpw-configure to edit
1565 Makefile.in into an MPW makefile.
1569 * Makefile.in (maintainer-clean): New synonym for realclean.
1573 * m68k-opc.c: Split pmove patterns which use 'P' into patterns
1574 which use '0', '1', and '2' instead. Specify the proper size for
1575 a pmove immediate operand. Correct the pmovefd patterns to be
1576 moves to a register, not from a register.
1577 * m68k-dis.c (print_insn_arg): Replace 'P' with '0', '1', '2'.
1581 * sparc-opc.c (sparc_opcodes): Mark all insns that reference
1582 %psr, %wim, %tbr as F_NOTV9.
1586 * Makefile.in (Makefile): Just rebuild Makefile when running
1588 (config.h, stamp-h): New targets.
1589 * configure.in: Call AC_CONFIG_HEADER and AC_CANONICAL_SYSTEM
1590 earlier. Don't bother to call AC_ARG_PROGRAM. Touch stamp-h when
1591 rebuilding config.h.
1592 * configure: Rebuild.
1594 * mips-opc.c: Change unaligned loads and stores with "t,A"
1595 operands to use "t,A(b)".
1599 * sh-dis.c (print_insn_shx): Add F_FR0 support.
1603 * sh-dis.c (print_insn_shx): Change loop over op->arg[n] to iterate
1604 until 3 instead of until 2.
1608 * Makefile.in (ALL_CFLAGS): Define.
1609 (.c.o, disassemble.o): Use $(ALL_CFLAGS).
1610 (MOSTLYCLEAN): Add config.log.
1611 (distclean): Don't remove config.log.
1612 * configure.in: Substitute HDEFINES.
1613 * configure: Rebuild.
1617 * sh-opc.h (sh_arg_type): Add F_FR0.
1618 (sh_table, case fmac): Add F_FR0 as first argument.
1622 * sh-opc.h (sh_opcode_info): Increase arg array size to 4.
1626 * sparc-dis.c: Remove all references to NO_V9.
1630 * aclocal.m4: Just include ../bfd/aclocal.m4.
1631 * configure: Rebuild.
1635 * sparc-dis.c (X_DISP19): Define.
1636 (print_insn, case 'G'): Use it.
1637 (print_insn, case 'L'): Sign extend displacement.
1641 * configure.in: Run ../bfd/configure.host before AC_PROG_CC.
1642 Subsitute CFLAGS and AR. Call AC_PROG_INSTALL. Don't substitute
1643 host_makefile_frag or frags.
1644 * aclocal.m4: New file.
1645 * configure: Rebuild.
1646 * Makefile.in (INSTALL): Set to @INSTALL@.
1647 (INSTALL_PROGRAM): Set to @INSTALL_PROGRAM@.
1648 (INSTALL_DATA): Set to @INSTALL_DATA@.
1650 (AR_FLAGS): Set to rc rather than qc.
1651 (CC): Define as @CC@.
1652 (CFLAGS): Set to @CFLAGS@.
1653 (@host_makefile_frag@): Remove.
1654 (config.status): Remove dependency upon @frags@.
1656 * configure.in: ../bfd/config.bfd now just sets shell variables.
1657 Use them rather than looking through target Makefile fragments.
1658 * configure: Rebuild.
1662 * sh-opc.h (ftrc): Change FPUL_N to FPUL_M.
1666 * sparc-opc.c (sparc_opcodes): Delete duplicate wr %y insn.
1667 Add clrx, iprefetch, signx, clruw, cas, casl, casx, casxl synthetic
1670 * sparc-opc.c (sparc_opcodes): Fix prefetcha insn.
1671 (lookup_{name,value}): New functions.
1672 (prefetch_table): New static local.
1673 (sparc_{encode,decode}_prefetch): New functions.
1674 * sparc-dis.c (print_insn): Handle '*' arg (prefetch function).
1678 * sh-opc.h: Add blank lines to improve readabililty of sh3e
1683 * sh-dis.c: Correct comment on first line of file.
1687 * disassemble.c (disassembler): Handle bfd_mach_sparc64.
1689 * sparc-opc.c (asi, membar): New static locals.
1690 (sparc_{encode,decode}_{asi,membar}): New functions.
1691 (sparc_opcodes, membar insn): Fix.
1692 * sparc-dis.c (print_insn): Call sparc_decode_asi.
1693 Support decoding of membar masks.
1698 * m68k-opc.c (m68k_opcode_aliases): Add br, brs, brb, brw, brl.
1702 * m68k-opc.c (m68k_opcode_aliases): Add bhib as an alias for bhis,
1703 and likewise for the other branches. Add bhs as an alias for bcc,
1704 and likewise for the size variants. Add dbhs as an alias for
1709 * sh-opc.h (FP sts instructions): Update to match reality.
1713 * m68k-dis.c: (fpcr_names): Add % before all register names.
1714 (reg_names): Likewise.
1715 (print_insn_arg): Don't explicitly print % before register names.
1716 Add % before register names in static array names. In case 'r',
1717 print data registers as `@(Dn)', not `Dn@'. When printing a
1718 memory address, don't print @# before it.
1719 (print_indexed): Change base_disp and outer_disp from int to
1720 bfd_vma. Print using MIT syntax, not mutant invalid Motorola
1721 syntax. Sign extend 8 byte displacement correctly.
1722 (print_base): Print using MIT syntax. Print zpc when appropriate.
1723 Change parameter disp from int to bfd_vma.
1725 * m68k-opc.c (m68k_opcode_aliases): Add jsrl and jsrs as aliases
1730 * sh-dis.c (print_insn_shx): Handle new operand types F_REG_N,
1731 F_REG_M, FPSCR_M, FPSCR_N, FPUL_M and FPUL_N.
1732 * sh-opc.h (sh_arg_type): Add new operand types.
1733 (sh_table): Add new opcodes from SH3E Floating Point ISA.
1737 * Makefile.in (distclean): Remove generated file config.h.
1741 * Makefile.in (distclean): Remove generated file config.h.
1745 * m68k-opc.c: New file, holding tables from include/opcode/m68k.h.
1747 * m68k-dis.c: Remove BREAK_UP_BIG_DECL stuff.
1749 (print_insn_m68k): Change d to be const. Use m68k_numopcodes
1750 rather than numopcodes. Use m68k_opcodes rather than removed
1751 opcode function. Don't check F_ALIAS.
1752 (print_insn_arg): Change first parameter to be const char *.
1753 * Makefile.in (ALL_MACHINES): Add m68k-opc.o.
1754 (m68k-opc.o): New target.
1755 * configure.in: Build m68k-opc.o for bfd_m68k_arch.
1756 * configure: Rebuild.
1760 * sparc-dis.c (HASH_SIZE, HASH_INSN): Define.
1761 (opcode_bits, opcode_hash_table): New variables.
1762 (opcodes_initialized): Renamed from opcodes_sorted.
1763 (build_hash_table): New function.
1764 (is_delayed_branch): Use hash table.
1765 (print_insn): Renamed from print_insn_sparc, made static.
1766 Build and use hash table. If !sparc64, ignore sparc64 insns,
1767 and vice-versa if sparc64.
1768 (print_insn_sparc, print_insn_sparc64): New functions.
1769 (compare_opcodes): Move sparc64 opcodes to end.
1770 Print commutative insns with constant second.
1771 * sparc-opc.c (all non-v9 insns): Use flag F_NOTV9 instead of F_ALIAS.
1775 * sh-dis.c (print_insn_shx): Remove unused local dslot. Use
1776 print_address_func for A_BDISP12 and A_BDISP8. Correct test which
1777 avoids printing a delay slot in a delay slot.
1778 * sh-opc.h (sh_table): Fully bracket last entry.
1782 * sparc-opc.c (sllx, srax, srlx): Fix disassembly.
1786 * configure.in: Get host_makefile_frag from ${srcdir}.
1788 * configure.in: Autoconfiscated. Check for string[s].h. Create
1789 config.h from config.in. Don't set up sysdep.h link.
1790 * sysdep.h: New file.
1791 * configure, config.in: New files, generated from configure.in.
1792 * Makefile.in: Updated to be processed autoconf-style.
1793 (distclean): Keep sysdep.h. Remove config.log and config.cache.
1794 (Makefile): Depend on config.status.
1795 (config.status): New rule.
1796 * configure.bat: Update Makefile substitutions.
1800 * mips-opc.c (L1): Define.
1801 (mips_opcodes): Add R4010 instructions: flushi, flushd, flushid,
1802 addciu, madd, maddu, ffc, ffs, msub, msubu, selsi, selsr, waiti,
1807 * mips-opc.c (mips_opcodes): For the move pseudo-op, prefer daddu
1808 if ISA 3 and addu otherwise, replacing or, since some MIPS chips
1809 have multiple add units but only a single logical unit.
1811 * ppc-opc.c (powerpc_operands): Change CR to use a bitsize of 3,
1812 shifted by 18, without any insertion or extraction function.
1813 (insert_cr, extract_cr): Remove.
1818 * Makefile.in (ALL_MACHINES): Add arc-dis.o and arc-opc.o.
1823 * m68k-dis.c (print_insn_arg, print_indexed): Print "%" before
1828 * mpw-config.in: Add sh and i386 configs, remove sparc config.
1829 * sh-opc.h: Add copyright.
1833 * Makefile.in (crunch-m68k): Delete extra target accidentally
1834 checked in a while ago.
1838 * sh-opc.h (sh_table): Add SH3 support.
1842 * sh-opc.h: Added bsrf and braf.
1846 * arm-opc.h (arm_opcodes): Add 64-bit multiply patterns. Delete
1847 bogus [ls]fm{ea,fd} patterns.
1849 * arm-opc.h (arm_opcodes): Correct typos in stm, ldm, std, and ldc.
1850 * arm-dis.c (print_insn_arm): Make GIVEN a parameter, don't try and
1851 initialize it from memory. Make function static.
1852 (print_insn_{big,little}_arm): New functions.
1853 * disassemble.c (disassembler, case bfd_arch_arm): Disassemble for
1854 the correct endianness.
1859 * arc-opc.c (arc_opcodes): Add ARC_OPCODE_CONDITIONAL_BRANCH flag.
1860 (arc_suffixes): Use ARC_DELAY_{NONE,NORMAL,JUMP}.
1865 * sh-opc.h (sh_nibble_type, sh_arg_type): remove trailing , from
1870 * m68k-dis.c (opcode): Finish change made by Kung Hsu on April
1871 17th, so that it builds again using GCC as the compiler.
1875 * mips-dis.c (print_insn_little_mips): Cast return value from
1876 bfd_getl32 from bfd_vma to unsigned long, because _print_insn_mips
1877 expects an unsigned long, and that might be fewer words of
1878 argument storage (e.g., if bfd_vma is long long on a 32-bit
1880 (print_insn_big_mips): Likewise with bfd_getb32 value.
1881 (_print_insn_mips): Now static.
1885 * m68k-dis.c: Take out #define BREAK_UP_BIG_DECL kludge, because
1886 gcc memory hog problem with initializer is fixed.
1891 * arc-opc.c (NULL): Define.
1892 (arc_operands, insn fields u,s): Delete.
1893 (arc_operands, insn fields a,b,c): Mark as signed.
1894 (arc_opcodes): No longer const, links computed at run-time.
1895 (arc_opcodes, mac/mul insns): Breakout suffixes as we don't handle
1896 suffixes that affect the insn code.
1897 (arc_opcodes): Resort table to macros are first.
1898 (arc_opcodes, ld [b,c] entry): Add %Q to prevent shimms.
1899 (arc_opcodes, st [b] entry): Likewise.
1900 (arc_opcodes, st [b,d] entry): Fix mask, value.
1901 (arc_reg_names): Add entries for r29, r30, r31, r60.
1902 (opcode_map, icode_map): New static globals.
1903 (arc_opcode_init_tables): Initialize them.
1904 (arc_opcode_lookup_asm, arc_opcode_lookup_dis): New functions.
1905 (insert_shimmoffset): Signal error if register present.
1907 * arc-dis.c (print_insn): Call arc_opcode_lookup_dis.
1912 Merge in support for Mac MPW as a host.
1913 (Old change descriptions retained for informational value.)
1915 * mpw-config.in (archname): Compute from the config.
1916 (BFD_MACHINES, ARCHDEFS): Put into mk.tmp.
1918 * mpw-config.in (target_arch): Compute from canonical target.
1919 (m68k, mips, powerpc, sparc): Add architectures.
1920 * mpw-make.in (disassemble.c.o): Add.
1921 (ALL_CFLAGS): Remove special flags (-mc68020 -mc68881 -model far).
1923 * mpw-config.in (BFD_MACHINES): Set to a default value.
1924 * mpw-make.in (BFD_MACHINES): Remove wired-in value.
1926 * mpw-make.in (CSEARCH): Add extra-include to search path.
1928 * mpw-config.in (varargs.h): Don't create.
1929 (sysdep.h): Create using forward-include.
1930 * mpw-make.in (CSEARCH): Add include/mpw to search path.
1932 * mpw-config.in: New file, MPW version of configure.in.
1933 * mpw-make.in: New file, MPW version of Makefile.in.
1938 * arc-dis.c (print_insn): New parameter `big_p'. Callers updated.
1939 Call arc_get_opcode_mach to map bfd mach number to opcode value.
1940 (print_insn_*): Pass bfd mach number, not opcode version.
1941 * arc-opc.c (arc_get_opcode_mach): New function.
1946 * alpha-dis.c (print_insn_alpha): Put empty statement after
1951 * hppa-dis.c (sign_extend): Delete, redundant with libhppa.h version.
1952 (low_sign_extend): Likewise.
1953 (get_field): Delete unused function.
1954 (set_field, deposit_14, deposit_21): Likewise.
1958 * i386-dis.c: Support for more pentium opcodes. From Guy Harris
1965 * alpha-opc.h (OSF_ASMCODE): define
1966 print pal-code names as defined in App C of the
1967 Alpha Architecture Reference Manual
1969 * alpha-dis.c: cleaned up output
1970 print stylized code forms as defined in App A.4.3 of the
1971 Alpha Architecture Reference Manual
1975 * mips-opc.c: Add new mips4 instructions. Don't set INSN_RFE for
1977 * mips-dis.c (print_insn_arg): Handle new argument types 'h', 'R',
1982 * m68k-dis.c (opcode): New function. Returns address of opcode
1983 table entry given index, even if the opcode table was split to
1984 work around gcc bugs.
1985 (print_insn_m68k): Call opcode instead of referencing m68k_opcodes
1987 (BREAK_UP_BIG_DECL): Make secondary array static and const.
1988 (reg_names): Now const.
1989 (print_insn_arg): Arrays cacheFieldName and names now const.
1990 (print_indexed): Array scales now const.
1995 * arc-dis.c (print_insn_arc_base): Split into big and little fns.
1996 (print_insn_arc_{host,graphics,audio}): Likewise.
1997 (print_insn): Add prototype.
1998 (arc_get_disassembler): New arg `big_p'. Return little or big
1999 print fn accordingly.
2000 * arc-opc.c (arc_opcode_init_tables): Init arc_operand_map once.
2001 (arc_opcode_supported): Use ARC_OPCODE_CPU to ignore byte order.
2002 (arc_opval_supported): Likewise.
2003 * disassemble.c (disassembler): Pass big endian flag to
2004 arc_get_disassembler.
2009 * ppc-opc.c: Sort recently added instructions by minor opcode
2010 number within major opcode number.
2014 * hppa-dis.c: Include libhppa.h.
2018 * mips-opc.c: Change dli to use M_DLI, and add dla.
2022 * Makefile.in (ALL_MACHINES): Add w65-dis.o.
2027 * arc-dis.c (arc_get_disassembler): Change argument to int,
2028 one of bfd_mach_arc_xxx. All callers updated.
2033 * mips-opc.c: Add r4650 mul instruction.
2037 * mips-opc.c: Add uld and usd macros for unaligned double load and
2042 * ppc-opc.c (powerpc_opcodes): Add 403GA opcodes rfci, dccci,
2043 mfdcr, mtdcr, icbt, iccci.
2048 * arc-dis.c (print_insn): Handle ARC_OPERAND_ADDRESS.
2049 * arc-opc.c (arc_operands): New operand 'J' for jump addresses.
2050 ('L' operand): Mark as ARC_OPERAND_ADDRESS.
2051 (arc_opcodes, j insn): Use 'J' operand type, not 'L'.
2052 (arc_opcodes, ld/st insns): Fix address writeback operand letter.
2053 (insert_absaddr): New function.
2057 * arc-dis.c (print_insn_arc): Rename to print_insn and make static.
2058 New argument `cpu', pass it to arc_opcode_init_tables.
2059 Document byte order dependencies. Ignore unsupported insns.
2060 (arc_get_disassembler): New function.
2061 (print_insn_arc_base, print_insn_arc_host, print_insn_arc_graphics,
2062 print_insn_arc_audio): New functions.
2063 * arc-opc.c (MULTSHIFT operand): Delete.
2064 (UNSIGNED, SATURATION): New operands.
2065 (mac, mul, mul64, mulu64): New insns.
2066 (ext. asl, asr, lsr, ror): Only available on host and graphics cpus.
2067 (padc, padd, pmov, pand, psbc, psub, swap): New insns.
2068 (host,graphics,audio extended and auxiliary regs): Define.
2069 (ss, sc, mh, ml): New suffixes.
2070 (arc_opcode_supported, arc_opval_supported): New functions.
2071 (insert_multshift, extract_multshift): Deleted.
2072 * disassemble.c (disassembler, case bfd_arch_arc): Call
2073 arc_get_disassembler to get disassembler routine.
2078 * i960-dis.c (struct tabent, struct sparse_tabent): Change the
2079 signed char fields to shorts, more portable.
2083 * i960-dis.c (struct tabent, struct sparse_tabent): Declare the
2084 char fields as signed chars, since they may have negative values.
2088 * i386-dis.c (dis386_twobyte): Add cpuid, From Charles Hannum
2094 * ppc-opc.c (extract_bdm): Correct parenthezisation.
2095 * ppc-dis.c (print_insn_powerpc): Print .long before unrecognized
2100 * ppc-opc.c: Changes based on patch from David Edelsohn
2102 (powerpc_operands): Add operands SPRBAT and SPRG. Split TBR out of
2105 (insert_tbr): New static function.
2106 (extract_tbr): New static function.
2107 (XFXFXM_MASK, XFXM): Define.
2108 (XSPRBAT_MASK, XSPRG_MASK): Define.
2109 (powerpc_opcodes): Add instructions to access special registers by
2110 name. Add mtcr and mftbu.
2114 * mips-opc.c (P3): Define.
2115 (mips_opcodes): Add mad and madu.
2117 Sun Jan 15 16:32:59 1995 Steve Chamberlain <sac@splat>
2119 * configure.in: Add W65 support.
2120 * disassemble.c: Likewise.
2121 * w65-opc.h, w65-dis.c: New files.
2125 * h8300-dis.c (bfd_h8_disassemble): Add support for 2 bit
2131 * arc-dis.c (print_insn_arc): Branch offsets are relative to delay
2133 * arc-opc.c (extract_reladdr): New function.
2134 (insert_reladdr): Store address right-shifted by 2.
2139 * mips-opc.c: Add dli as a synonym for li.
2144 * arc-opc.c (insertion fns): Pass pointer to value's table entry.
2146 (extraction fns): Insn argument now array of two words. Return pointer
2147 to value's table entry. All uses changed.
2148 (arc_opcode_lookup_suffix): Exported for arc-dis.c.
2149 (insert_multshift, extract_multshift): New fns.
2150 (arc_operands): Add support for cache bypass suffix. Add support for
2151 predefined aux regs. Modifier bits moved to flags field.
2152 (arc_opcodes): Likewise.
2153 Add mul/mulu/shift insns. Syntax of zero/sign extension insns changed.
2154 New insn rlc. Update to syntax in programmer's manual.
2155 (arc_reg_names): Fix typo in lp_count. Add predefined aux regs.
2156 (arc_suffixes): New synonyms lo,hs for cs,cc. New suffix for cache
2158 (arc_opcode_init_tables): New argument to indicate cpu type.
2159 (insert_reg): Handle predefined aux regs.
2160 (extract_reg): Likewise.
2161 (lookup_register): New fn.
2162 * arc-dis.c (arc_condition_codes): Deleted.
2163 (print_insn_arc): Handle insns with 32 bit immediate constants better.
2164 Clean up modifier handling. Handle predefined aux regs.
2169 * alpha-dis.c (print_insn_alpha): Handle call_pal instruction, and
2170 print something for reserved opcode values, even if it won't
2173 * mips-dis.c (_print_insn_mips): When initializing, shift right
2174 and mask, to avoid sign extension problems on the Alpha.
2176 * m68k-dis.c (print_insn_arg, case 'J'): Handle buscr and pcr
2182 * configure.in: Add ARC support.
2183 * disassemble.c: Likewise.
2184 * arc-dis.c, arc-opc.c: New files.
2189 * sh-opc.h (mov.l gbr): Get direction right.
2190 * sh-dis.c (print_insn_shx): New function.
2191 (print_insn_shl, print_insn_sh): Call print_insn_shx to
2192 print opcodes with right byte order.
2196 * ns32k-dis.c (struct ns32k_option): Renamed from struct option,
2197 to avoid conflicts with getopt.
2201 * hppa-dis.c (print_insn_hppa): Read the instruction using
2202 bfd_getb32, so that it works on a little endian or 64 bit host.
2203 Remove unused local variable op.
2207 * mips-opc.c: Use or instead of addu for pseudo-op move, since
2208 addu does not work correctly if -mips3.
2212 * a29k-dis.c (print_special): Add special register names defined
2213 on 29030, 29040 and 29050.
2214 (print_insn): Handle new operand type 'I'.
2218 * Makefile.in (INSTALL): Use top level install.sh script.
2222 * sparc-dis.c: Rewrite to use bitfields, rather than a union, so
2223 that it works on a little endian host.
2227 * configure.in: Use ${config_shell} when running config.bfd.
2231 * mips-opc.c (mips_opcodes): "dabs" is only available with -mips3.
2235 * a29k-dis.c (print_insn): Print the opcode.
2239 * mips-opc.c (mips_opcodes): Set WR_t for sc and scd.
2243 * hppa-dis.c (reg_names): Use r26-r23 for arg0-arg3.
2247 * mips-opc.c: Set INSN_STORE_MEMORY flag for all instructions
2248 which store a value into memory.
2252 * configure.in, Makefile.in, disassemble.c: Add support for the ARM.
2253 * arm-dis.c, arm-opc.h: New files.
2257 * Makefile.in (ns32k-dis.o): Add dependency.
2258 * ns32k-dis.c (print_insn_arg): Declare initialized local as
2259 string, not as array of chars.
2263 * sparc-dis.c (print_insn_sparc): Handle new operand type 'x'.
2265 * sparc-opc.c: Added sparclite extended FP operations, and
2266 versions of v9 impdep* instructions permitting specification of
2271 * i960-dis.c (reg_names): Now const.
2272 (struct sparse_tabent): New type, copied from array type in mem
2274 (ctrl): Local static array ctrl_tab now const.
2275 (cobr): Local static array cobr_tab now const.
2276 (mem): Local variables reg1, reg2, reg3 now point to const. Local
2277 static variable mem_tab no longer explicitly initialized. Changed
2278 mem_init to const array of struct sparse_tabent.
2279 (reg): Local static variable reg_tab no longer explicitly
2280 initialized. Changed reg_init to const array of struct
2282 (ea): Local static array scale_tab now const.
2284 * i960-dis.c (reg): Added i960JX instructions to reg_init table.
2289 * configure.bat: the disassember needs to be enabled for
2290 "objdump -d" to work in djgpp.
2294 * ns32k-dis.c: Deleted all code in "#ifdef GDB".
2295 (invalid_float): Enabled general version, doesn't require running
2296 on ns32k host. Changed to take char* argument, and test for
2297 explicitly specified sizes, instead of using sizeof() on host CPU
2299 (INVALID_FLOAT): Cast first argument.
2300 (opt_u, opt_U, opt_O, opt_C, opt_S, list_P532, list_M532,
2301 list_P032, list_M032): Now const.
2302 (optlist, list_search): Made appropriate arguments now point to
2304 (print_insn_arg): Changed static array of one-character-string
2305 pointers into a static const array of characters; fixed sprintf
2306 statement accordingly.
2310 * opcodes/ns32k-dis.c: Semi-new file. Had apparently been dropped
2311 from distribution. A ns32k-dis.c from a previous distribution has
2312 been brought up to date and supports the new interface.
2314 * disassemble.c: define ARCH_ns32k and add case bfd_arch_ns32k.
2316 * configure.in: add bfd_ns32k_arch target support.
2318 * Makefile.in: add ns32k-dis.o to ALL_MACHINES.
2319 Add ns32k-dis.c to CFILES. Add dependencies for ns32k-dis.o.
2323 * h8300-dis.c (bfd_h8_disassemble): Get 16bit branch
2328 * h8300-dis.c, mips-dis.c: Don't use true and false.
2332 * configure.in: Change --with-targets to --enable-targets.
2336 * mips-dis.c (_print_insn_mips): Build a static hash table mapping
2337 opcodes to the first instruction with that opcode, to speed
2343 * Makefile.in (mostlyclean): Fix typo (was mostyclean).
2347 * configure.bat: update to latest makefile.in
2351 * a29k-dis.c (print_insn): Print 'x' type operand in hex.
2352 * h8300-dis.c (bfd_h8_disassemble): Print 16bit rels correctly.
2353 * sh-dis.c (print_insn_sh): Don't recur endlessly if delay
2354 slot insn is in a delay slot.
2355 * z8k-opc.h: (resflg): Fix patterns.
2356 * h8500-opc.h Fix CR insn patterns.
2360 * ppc-opc.c (powerpc_opcodes): Put PowerPC versions of "cmp" and
2361 "cmpl" before POWER versions, so that gas -many uses them.
2365 * disassemble.c: New file.
2366 * Makefile.in (OFILES): Add disassemble.o.
2367 (disassemble.o): Provide dependencies; compile with $(ARCHDEFS).
2368 * configure.in: Define ARCHDEFS in Makefile. Code taken from
2369 binutils/configure.in.
2371 * m68k-dis.c (print_insn_m68k): If F_ALIAS flag is set, skip the
2372 opcode being examined.
2376 * ppc-opc.c (powerpc_operands): Added RAL, RAM and RAS.
2377 (insert_ral, insert_ram, insert_ras): New functions.
2378 (powerpc_opcodes): Use RAL for load with update, RAM for lmw, and
2379 RAS for store with update.
2383 * ppc-opc.c (powerpc_opcodes): Correct fcir. From David Edelsohn
2388 * mips-opc.c (mips_opcodes): Correct operands of "nor" with an
2393 * sparc-opc.c (sparc_opcodes): Fix "rd %fprs,%l0".
2397 * ppc-opc.c (powerpc_operands): The signedp field has been
2398 removed, so don't initialize it. Set the PPC_OPERAND_SIGNED flag
2399 instead. Add new operand SISIGNOPT.
2400 (powerpc_opcodes): For lis, liu, addis, and cau use SISIGNOPT.
2402 * ppc-dis.c (print_insn_powerpc): Check PPC_OPERAND_SIGNED rather
2407 * i386-dis.c (struct private): Renamed to dis_private. `private'
2408 is a reserved word for dynix cc.
2412 * configure.in: Change error message to refer to bfd/config.bfd
2413 rather than bfd/configure.in.
2417 * ppc-opc.c: Define POWER2 as short alias flag.
2418 (powerpc_opcodes): Add POWER/2 opcodes lfq*, stfq*, fcir[z], and
2423 * i960-dis.c (print_insn_i960): Don't read a second word for
2424 opcodes 0, 1, 2 and 3.
2428 * configure.in: Don't build m68881-ext.o for bfd_m68k_arch.
2432 * m68881-ext.c: Removed; no longer used.
2433 * Makefile.in: Changed accordingly.
2435 * m68k-dis.c (ext_format_68881): Don't declare.
2436 (print_insn_m68k): If an instruction uses place 'i', it uses at
2437 least four fixed bytes.
2438 (print_insn_arg): Don't bump p by 2 for case 'I', place 'i'. For
2439 extended float, convert to double using floatformat_to_double, not
2440 ieee_extended_to_double, and fetch the data before converting it.
2444 * mips-opc.c: It's sqrt.s, not sqrt.w. From
2449 * ppc-opc.c (powerpc_opcodes): The POWER uses bdn[l][a] where the
2450 PowerPC uses bdnz[l][a].
2454 * dis-buf.c, i386-dis.c: Include sysdep.h.
2458 * configure.in (bfd_powerpc_arch): Use ppc-dis.o and ppc-opc.o.
2460 * ppc-opc.c (powerpc_opcodes): Mark POWER instructions supported
2461 by Motorola PowerPC 601 with PPC_OPCODE_601.
2462 * ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc):
2463 Disassemble Motorola PowerPC 601 instructions as well as normal
2464 PowerPC instructions.
2468 * i960-dis.c (reg, mem): Just use a static array instead of
2473 * hppa-dis.c (print_insn_hppa): For '?' and '@' only adjust the
2474 condition name index if this is for a negated condition.
2476 * hppa-dis.c (print_insn_hppa): No space before 'H' operand.
2477 Floating point format for 'H' operand is backwards from normal
2478 case (0 == double, 1 == single). For '4', '6', '7', '9', and '8'
2479 operands (fmpyadd and fmpysub), handle bizarre register
2480 translation correctly for single precision format.
2482 * hppa-dis.c (print_insn_hppa): Do not emit a space after 'F'
2483 or 'I' operands if the next format specifier is 'M' (fcmp
2484 condition completer).
2488 * ppc-opc.c (powerpc_operands): New operand type MBE to handle a
2489 single number giving a bitmask for the MB and ME fields of an M
2490 form instruction. Change NB to accept 32, and turn it into 0;
2491 also turn 0 into 32 when disassembling. Seperated SH from NB.
2492 (insert_mbe, extract_mbe): New functions.
2493 (insert_nb, extract_nb): New functions.
2494 (SC_MASK): Mask out SA and LK bits.
2495 (powerpc_opcodes): Change "cal" to use RT, D, RA rather than RT,
2496 RA, SI. Change "liu" and "cau" to use UI rather than SI. Mark
2497 "bctr" and "bctrl" as accepted by POWER. Change "rlwimi",
2498 "rlimi", "rlwimi.", "rlimi.", "rlwinm", "rlinm", "rlwinm.",
2499 "rlinm.", "rlmi", "rlmi.", "rlwnm", "rlnm", "rlwnm.", "rlnm." to
2500 use MBE rather than MB. Add "mfmq" and "mtmq" POWER instructions.
2501 (powerpc_macros): Define table of macro definitions.
2502 (powerpc_num_macros): Define.
2504 * ppc-dis.c (print_insn_powerpc): Don't skip optional operands
2505 if PPC_OPERAND_NEXT is set.
2509 * i960-dis.c (print_insn_i960): Make buffer bfd_byte instead of
2510 char. Retrieve contents using bfd_getl32 instead of shifting.
2514 * ppc-opc.c: New file. Opcode table for PowerPC, including
2515 opcodes for POWER (RS/6000).
2516 * ppc-dis.c: New file. PowerPC and Power (RS/6000) disassembler.
2517 * Makefile.in (ALL_MACHINES): Add ppc-dis.o and ppc-opc.o.
2518 (CFILES): Add ppc-dis.c.
2519 (ppc-dis.o, ppc-opc.o): New targets.
2520 * configure.in: Build ppc-dis.o and ppc-opc.o for bfd_rs6000_arch.
2524 * hppa-dis.c (print_insn_hppa): Handle 'N' in assembler template.
2525 No space before 'u', 'f', or 'N'.
2529 * i386-dis.c (print_insn_i386): Add FIXME comment regarding reading
2530 farther than we should.
2532 * i386-dis.c (dis386): Use Yb and Yv for scasb and scasS.
2536 * sparc-dis.c m68k-dis.c alpha-dis.c a29k-dis.c: Fix comments.
2540 * i960-dis.c (print_insn_i960): Only read word2 if the instruction
2541 needs it, to prevent reading past the end of a section.
2545 * mips-opc.h: Use macro for j instruction, to support SVR4 PIC.
2546 Removed t,A case for la; always use t,A(b) case.
2551 * mips-dis.c (print_insn_arg): Handle 'k'.
2552 * mips-opc.c: Make cache use k, not t.
2556 * alpha-opc.h, alpha-dis.c (print_insn_alpha): Add
2557 FLOAT_MEMORY_FORMAT_CODE, FLOAT_BRANCH_FORMAT_CODE, correct
2558 FLOAT_FORMAT_CODE to put out floating point register names.
2562 * mips-opc.c: Use macros for jal variants, to support SVR4 PIC.
2566 * a29k-dis.c (print_insn): Use 0x%08x, not 0x%8x.
2570 * mips-opc.c (dsll, dsra, dsrl): Added '>' cases for shift counts
2571 larger than 32. Moved dsxx32 variants first for disassembler.
2575 * z8kgen.c, z8k-opc.h: Add full lda information.
2579 * hppa-dis.c (print_insn_hppa): Do not emit a space after
2580 movb instructions. Any necessary space will be emitted by
2581 the code to handle nullification completers.
2585 * mips-opc.c: Moved l.d down so that it disassembles as ldc1.
2589 * alpha-opc.h: Add ldl_l, fix typo for ldq_u.
2590 * alpha-dis.c (print_insn_alpha): Add code for PAL_FORMAT_CODE.
2594 * mips-opc.c: Correct lwu opcode value (book had it wrong).
2598 * z8k-dis.c (FETCH_DATA): get just the right amount of data.
2599 (unpack_instr): Cope with ARG_IMM4M1 type instructions.
2603 * m88k-dis.c (m88kdis): comment change. Remove space after
2605 (printop): handle new arg types DEC and XREG for m88110.
2609 * hppa-dis.c (print_insn_hppa): Handle 'z' operand
2610 type for absolute branch addresses. Delete special
2611 "ble" and "be" code in 'W' operand code.
2615 * mips-opc.c: Set hazard information correctly for branch
2616 likely instructions.
2620 * alpha-dis.c (print_insn_alpha), alpha-opc.h: Fix bugs, use
2621 info->fprintf_func for printing and info->print_address_func for
2626 * mips-opc.c: Set INSN_TRAP for tXX instructions.
2631 Corrected second case of "b" for disassembler.
2635 * mips-dis.c, m88k-dis.c: Don't include libbfd.h. Changed calls
2636 to BFD swapping routines to correspond to BFD name changes.
2640 * mips-opc.c: Change div machine instruction to be z,s,t rather
2641 than s,t. Change div macro to be d,v,t rather than d,s,t.
2642 Likewise for divu, ddiv, ddivu. Added z,s,t case for drem, dremu,
2643 rem and remu which generates only the corresponding div
2644 instruction. This is for compatibility with the MIPS assembler,
2645 which only generates the simple machine instruction when an
2646 explicit destination of $0 is used.
2647 * mips-dis.c (print_insn_arg): Handle 'z' (always register zero).
2652 WR_31 hazard for bal, bgezal, bltzal.
2656 * hppa-dis.c (print_insn_hppa): Use print function
2657 from within the disassemble_info, not fprintf_filtered.
2661 * hppa-dis.c (print_insn_hppa): Handle '|' like '>'. (From Jeff
2666 * mips-opc.c ("absu"): Removed.
2671 * mips-opc.c: Added r6000 and r4000 instructions and macros.
2672 Changed hazard information to distinguish between memory load
2673 delays and coprocessor load delays.
2677 * mips-opc.c: li.d uses "T,L", not "S,F". Added li.s.
2681 * configure.in: Don't pass cpu to config.bfd.
2685 * m88k-dis.c (m88kdis): Make class unsigned.
2689 * alpha-dis.c (print_insn_alpha): One branch format case was
2690 missing the instruction name.
2694 * Makefile.in (ALL_MACHINES): Renamed from DIS_LIBS.
2695 Add the arch-specific auxiliary files.
2696 (OFILES): Remove the arch-specific auxiliary files
2697 and use BFD_MACHINES instead of DIS_LIBS.
2698 * configure.in: Set BFD_MACHINES based on --with-targets option.
2702 * mips-opc.c: Added lwc1 E,A(b) to go with lwc1 T,A(b). Similarly
2707 * sparc-opc.c: Change CONST to const to deal with gcc
2708 -Dconst=__const -traditional.
2713 coprocessor instructions out of #if 0, and made them use new
2718 * sparc-dis.c: Include ansidecl.h before opcodes/sparc.h.
2722 * sparc-opc.c: Add F_JSR, F_UNBR, or F_CONDBR flags to each branch
2723 instruction, for use by the disassembler.
2725 * sparc-dis.c (SEX): Add sign extension macro. Replace many
2726 hand-coded sign extensions that depended on 32-bit host ints.
2727 FIXME, we still depend on big-endian host bitfield ordering.
2728 (sparc_print_insn): Set the insn_info_valid field, and the
2729 other fields that describe the instruction being printed.
2733 * sparc-opc.c (call): Accept all 6 addressing modes valid for
2734 `jmp' instead of just one of them.
2738 * hppa-dis.c: Move floating registers from reg_names to fp_reg_names.
2739 (fput_fp_reg_r): Renamed from fput_reg_r.
2740 (fput_fp_reg): New function.
2741 (print_insn_hppa): Use fput_fp_reg{,_r} where appropriate.
2743 * hppa-dis.c (print_insn_hppa, cases 'a', 'd'): Print space afterwards.
2745 * hppa-dis.c (print_insn_hppa, case 'd'): Use GET_COND not GET_FIELD.
2749 * hppa-dis.c (print_insn_hppa): Use extract_5r_store for 'r'.
2751 * hppa-dis.c (print_insn_hppa, case '>'): If next character is 'n',
2752 don't output a space.
2754 * hppa-dis.c (float_format_names): 10 is undefined, and 11 is quad.
2758 * mips-opc.c: New file, containing opcode table from
2759 ../include/opcode/mips.h.
2760 * Makefile.in: Add it.
2764 * m88k-dis.c: New file, moved in from gdb and changed to use the
2765 new dis-asm.h disassembler interface.
2766 * Makefile.in (DIS_LIBS): Added m88k-dis.o.
2767 (m88k-dis.o): New target.
2771 * mips-dis.c (print_insn_arg, _print_insn_mips): Made pointer to
2772 argument string const char * to correspond to opcode/mips.h.
2776 * mips-dis.c: Updated to account for name changes in new version
2778 * Makefile.in: Added header file dependencies.
2782 * h8300-dis.c (bfd_h8_disassemble): Correct fetching of instruction.
2786 * m68k-dis.c (NEXTWORD, NEXTLONG): Use ((x) ^ 0x8000) - 0x8000 to sign
2787 extend, rather than shifts.
2791 * Makefile.in: Undo 15 June change.
2795 * m68k-dis.c (print_insn_arg): Change return value to byte count
2797 * m68k-dis.c: Re-write to detect invalid operands before
2798 printing anything, so we can handle this the same way we
2799 handle invalid opcodes.
2803 * sh-dis.c, sh-opc.h: Understand some more opcodes.
2807 * hppa-dis.c: Include <ansidecl.h> and sysdep.h before other
2812 * sparc-dis.c: Don't declare qsort, since sysdep.h might.
2814 * configure.in: Do make sysdep.h link.
2815 * Makefile.in: Search ../include. Don't search ../bfd.
2820 * hppa-dis.c: Fix typo. 'a' and 'd' were reversed.
2821 Do not print a space before the completers specified by
2826 * mips-dis.c: No longer need to bomb out if HOST_64_BIT is
2827 defined, since gdb has been fixed.
2830 * hppa-dis.c (print_insn_hppa): Last argument to fput_reg,
2831 fput_reg_r, fput_creg, fput_const, and fputs_filtered should
2832 be a *disassemble_info, not a *FILE.
2833 * hppa-dis.c: Support 'd', '!', and 'a'.
2834 * hppa-dis.c: Support 's' to extract a 2 bit space register.
2835 * hppa-dis.c: Delete cases which are no longer needed.
2839 * m68k-dis.c (print_insn_{m68k,arg}): Add MMU codes.
2843 * h8300-dis.c: New file, removed from bfd/cpu-h8300.c, with
2848 * Makefile.in (CSEARCH): Add -I../bfd for sysdep.h and bfd.h.
2849 * configure.in: No longer need to configure to get sysdep.h.
2854 * hppa-dis.c: Support 'I', 'J', and 'K' in output
2855 templates for 1.1 FP computational instructions.
2859 * h8500-dis.c (print_insn_h8500): Address argument is type
2861 * z8k-dis.c (print_insn_z8k, print_insn_z8001, print_insn_z8002):
2864 * h8500-opc.h (addr_class_type): No comma at end of enumerator.
2865 * sh-opc.h (sh_nibble_type, sh_arg_type): Ditto.
2867 * sparc-dis.c (compare_opcodes): Move static declaration to
2872 * sparc-dis.c (print_insn_sparc): Implement 'n' argument for unimp
2873 instruction, remove unimp hack from 'l' argument.
2877 * z8k-dis.c (fetch_data): Use unsigned char to make ancient gcc's
2883 * mips-dis.c (print_insn_arg): Handle 'C' for general coprocessor
2888 * hppa-dis.c: Include dis-asm.h before sysdep.h. Changed some
2889 arrays of string pointers to 2-d arrays of chars, to save
2894 * a29k-dis.c, alpha-dis.c, i960-dis.c, sparc-dis.c, z8k-dis.c:
2895 Cast second arg to read_memory_func to "bfd_byte *", as necessary.
2899 * hppa-dis.c: New file from Utah, adapted to new disassembler
2901 * Makefile.in: Include it.
2905 * sh-dis.c, sh-opc.h: New files.
2909 * alpha-dis.c, alpha-opc.h: New files.
2913 * mips-dis.c: Sign extend 'j' and 'b' arguments, delta is a signed
2918 * sparc-dis.c: Make "ta" the default trap instruction, "t" the alias.
2922 * a29k-dis.c, sparc-dis.c, sparc-opc.c: Use CONST rather than
2927 * sparc-dis.c: Use fprintf_func a few places where I forgot,
2928 and double percent signs a few places.
2930 * a29k-dis.c, i960-dis.c: New, merged from gdb and binutils.
2932 * i386-dis.c, m68k-dis.c, mips-dis.c, sparc-dis.c:
2933 Use info->print_address_func not print_address.
2935 * dis-buf.c (generic_print_address): New function.
2939 * Makefile.in: Add sparc-dis.c.
2940 sparc-dis.c: New file, merges binutils and gdb versions as follows:
2942 Add `add' instruction to the set that get checked
2943 for a preceding `sethi' in order to print an absolute address.
2944 * (print_insn): Disassembly prefers real instructions.
2945 (is_delayed_branch): Speed up.
2946 * sparc-opcode.h: Add ALIAS bit to aliases. Fix up opcode tables.
2947 Still missing some float ops, and needs testing.
2948 * sparc-pinsn.c (print_insn): Eliminate 'set' test, subsumed by
2949 F_ALIAS. Use printf, not fprintf, when not passing a file
2951 (compare_opcodes): Check that identical instructions have
2952 identical opcodes, complain otherwise.
2955 * Include reg_names.
2957 Use dis-asm.h/read_memory_func interface.
2961 * h8500-dis.c, i386-dis.c, m68k-dis.c, z8k-dis.c (fetch_data):
2962 deliberately return non-zero to setjmp from longjmp. Otherwise
2963 this code fails to compile.
2967 * m68k-dis.c: Fix prototype for fetch_arg().
2971 * dis-buf.c: New file, for new read_memory_func interface.
2972 Makefile.in (OFILES): Include it.
2973 m68k-dis.c, i386-dis.c, h8500-dis.c, mips-dis.c, z8k-dis.c:
2974 Use new read_memory_func interface.
2978 * h8500-dis.c (print_insn_h8500): Get sign of fp offsets right.
2979 * h8500-opc.h: Fix couple of opcodes.
2981 Wed Mar 24 02:03:36 1993 david d `zoo' zuhn (zoo at poseidon.cygnus.com)
2983 * Makefile.in: add dvi & installcheck targets
2987 * Makefile.in: Update for h8500-dis.c.
2991 * h8500-dis.c, h8500-opc.h: New files
2995 * mips-dis.c, z8k-dis.c: Converted to use interface defined in
2996 ../include/dis-asm.h.
2997 * m68k-dis.c: New file (merge of ../binutils/m68k-pinsn.c
2998 and ../gdb/m68k-pinsn.c).
2999 * i386-dis.c: New file (merge of ../binutils/i386-pinsn.c
3000 and ../gdb/i386-pinsn.c).
3001 * m68881-ext.c: New file. Moved definition of
3002 ext_format ext_format_68881 from ../gdb/m68k-tdep.c.
3003 * Makefile.in: Adjust for new files.
3005 * m68k-dis.c: Recognize '9' placement code, so (say) pflush
3006 can be dis-assembled.
3010 * mips-dis.c (print_insn_arg): Now returns void.
3014 * mips-dis.c (ansidecl.h): Include for benefit of sysdep.h
3015 files that use the macros.
3019 * mips-dis.c: New file, from gdb/mips-pinsn.c.
3020 * Makefile.in (DIS_LIBS): Added mips-dis.o.
3021 (CFILES): Added mips-dis.c.
3025 * z8k-dis.c (print_insn_z8001, print_insn_z8002): new routines
3026 * z8kgen.c, z8k-opc.h: fix sizes of some shifts.
3030 * Makefile.in: Improve *clean rules.
3031 * configure.in: Allow a default host.
3033 Tue Nov 17 19:53:54 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com)
3035 * Makefile.in: also use -I$(srcdir)/../bfd, since some sysdep
3036 files include other sysdep files
3040 * z8k-dis.c z8k-opc.h z8kgen.c: checkpoint
3044 * configure.in: For host support, use ../bfd/configure.host
3045 so it stays in sync with the ../bfd/hosts database.
3047 Thu Oct 1 23:38:54 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com)
3049 * configure.in: use cpu-vendor-os triple instead of nested cases
3053 * z8k-dis.c (unparse_instr): fix bug where opcode returned was
3054 *always* the wrong one.
3058 * z8kgen.c: added copyright info
3062 * z8k-dis.c (unparse_instr): prettier tabs
3063 * z8kgen.c -> z8k-opc.h: bug fixes in tables
3065 Fri Sep 25 12:50:32 1992 Stu Grossman (grossman at cygnus.com)
3067 * configure.in: Add ncr* configuration.
3068 * z8k-dis.c (struct instr_data_s): Make instr_asmsrc char to make
3069 picayune ANSI compilers happy.
3073 * configure.in (i386): Make i386 and i486 synonymous for now.
3074 * configure.in (i[34]86-*-sysv4): Add my_host definition.
3078 * Makefile.in (install): Fix typo.
3082 * Makefile.in (make): Remove obsolete crud.
3083 (sparc-opc.o): Avoid Sun Make VPATH bug.
3087 * Makefile.in: since there are no SUBDIRS, remove rule and
3088 references of subdir_do.
3092 * Makefile.in (install): Get the library name right here too.
3093 Don't install bfd.h, since it's unrelated to this library. No
3094 subdirs to recurse into, either.
3095 (CFILES): The source file has a .c suffix, not .o.
3097 * sparc-opc.c: New file, moved from BFD.
3098 * Makefile.in (OFILES): Build it.
3102 * z8k-dis.c: fixed forward refferences of some declarations.
3106 * Makefile.in: get the name of the library right
3110 * z8k-dis.c: knows how to disassemble z8k stuff
3111 * z8k-opc.h: new file full of z8000 opcodes
3115 version-control: never