1 /* Target-machine dependent code for Motorola MCore for GDB, the GNU debugger
2 Copyright 1999, 2000, 2001 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
30 /* Functions declared and used only in this file */
32 static CORE_ADDR mcore_analyze_prologue (struct frame_info *fi, CORE_ADDR pc, int skip_prologue);
34 static struct frame_info *analyze_dummy_frame (CORE_ADDR pc, CORE_ADDR frame);
36 static int get_insn (CORE_ADDR pc);
38 /* Functions exported from this file */
40 int mcore_use_struct_convention (int gcc_p, struct type *type);
42 void _initialize_mcore (void);
44 void mcore_init_extra_frame_info (struct frame_info *fi);
46 CORE_ADDR mcore_frame_saved_pc (struct frame_info *fi);
48 CORE_ADDR mcore_find_callers_reg (struct frame_info *fi, int regnum);
50 CORE_ADDR mcore_frame_args_address (struct frame_info *fi);
52 CORE_ADDR mcore_frame_locals_address (struct frame_info *fi);
54 void mcore_virtual_frame_pointer (CORE_ADDR pc, long *reg, long *offset);
56 CORE_ADDR mcore_push_return_address (CORE_ADDR pc, CORE_ADDR sp);
58 CORE_ADDR mcore_push_arguments (int nargs, value_ptr * args, CORE_ADDR sp,
59 unsigned char struct_return, CORE_ADDR struct_addr);
61 void mcore_pop_frame (struct frame_info *fi);
63 CORE_ADDR mcore_skip_prologue (CORE_ADDR pc);
65 CORE_ADDR mcore_frame_chain (struct frame_info *fi);
67 unsigned char *mcore_breakpoint_from_pc (CORE_ADDR * bp_addr, int *bp_size);
69 int mcore_use_struct_convention (int gcc_p, struct type *type);
71 void mcore_store_return_value (struct type *type, char *valbuf);
73 CORE_ADDR mcore_extract_struct_value_address (char *regbuf);
75 void mcore_extract_return_value (struct type *type, char *regbuf, char *valbuf);
81 /* The registers of the Motorola MCore processors */
83 char *mcore_register_names[] =
84 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
85 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
86 "ar0", "ar1", "ar2", "ar3", "ar4", "ar5", "ar6", "ar7",
87 "ar8", "ar9", "ar10", "ar11", "ar12", "ar13", "ar14", "ar15",
88 "psr", "vbr", "epsr", "fpsr", "epc", "fpc", "ss0", "ss1",
89 "ss2", "ss3", "ss4", "gcr", "gsr", "cr13", "cr14", "cr15",
90 "cr16", "cr17", "cr18", "cr19", "cr20", "cr21", "cr22", "cr23",
91 "cr24", "cr25", "cr26", "cr27", "cr28", "cr29", "cr30", "cr31",
97 /* Additional info that we use for managing frames */
98 struct frame_extra_info
100 /* A generic status word */
103 /* Size of this frame */
106 /* The register that is acting as a frame pointer, if
107 it is being used. This is undefined if status
108 does not contain the flag MY_FRAME_IN_FP. */
112 /* frame_extra_info status flags */
114 /* The base of the current frame is actually in the stack pointer.
115 This happens when there is no frame pointer (MCore ABI does not
116 require a frame pointer) or when we're stopped in the prologue or
117 epilogue itself. In these cases, mcore_analyze_prologue will need
118 to update fi->frame before returning or analyzing the register
119 save instructions. */
120 #define MY_FRAME_IN_SP 0x1
122 /* The base of the current frame is in a frame pointer register.
123 This register is noted in frame_extra_info->fp_regnum.
125 Note that the existence of an FP might also indicate that the
126 function has called alloca. */
127 #define MY_FRAME_IN_FP 0x2
129 /* This flag is set to indicate that this frame is the top-most
130 frame. This tells frame chain not to bother trying to unwind
131 beyond this frame. */
132 #define NO_MORE_FRAMES 0x4
134 /* Instruction macros used for analyzing the prologue */
135 #define IS_SUBI0(x) (((x) & 0xfe0f) == 0x2400) /* subi r0,oimm5 */
136 #define IS_STM(x) (((x) & 0xfff0) == 0x0070) /* stm rf-r15,r0 */
137 #define IS_STWx0(x) (((x) & 0xf00f) == 0x9000) /* stw rz,(r0,disp) */
138 #define IS_STWxy(x) (((x) & 0xf000) == 0x9000) /* stw rx,(ry,disp) */
139 #define IS_MOVx0(x) (((x) & 0xfff0) == 0x1200) /* mov rn,r0 */
140 #define IS_LRW1(x) (((x) & 0xff00) == 0x7100) /* lrw r1,literal */
141 #define IS_MOVI1(x) (((x) & 0xf80f) == 0x6001) /* movi r1,imm7 */
142 #define IS_BGENI1(x) (((x) & 0xfe0f) == 0x3201) /* bgeni r1,imm5 */
143 #define IS_BMASKI1(x) (((x) & 0xfe0f) == 0x2C01) /* bmaski r1,imm5 */
144 #define IS_ADDI1(x) (((x) & 0xfe0f) == 0x2001) /* addi r1,oimm5 */
145 #define IS_SUBI1(x) (((x) & 0xfe0f) == 0x2401) /* subi r1,oimm5 */
146 #define IS_RSUBI1(x) (((x) & 0xfe0f) == 0x2801) /* rsubi r1,imm5 */
147 #define IS_NOT1(x) (((x) & 0xffff) == 0x01f1) /* not r1 */
148 #define IS_ROTLI1(x) (((x) & 0xfe0f) == 0x3801) /* rotli r1,imm5 */
149 #define IS_BSETI1(x) (((x) & 0xfe0f) == 0x3401) /* bseti r1,imm5 */
150 #define IS_BCLRI1(x) (((x) & 0xfe0f) == 0x3001) /* bclri r1,imm5 */
151 #define IS_IXH1(x) (((x) & 0xffff) == 0x1d11) /* ixh r1,r1 */
152 #define IS_IXW1(x) (((x) & 0xffff) == 0x1511) /* ixw r1,r1 */
153 #define IS_SUB01(x) (((x) & 0xffff) == 0x0510) /* subu r0,r1 */
154 #define IS_RTS(x) (((x) & 0xffff) == 0x00cf) /* jmp r15 */
156 #define IS_R1_ADJUSTER(x) \
157 (IS_ADDI1(x) || IS_SUBI1(x) || IS_ROTLI1(x) || IS_BSETI1(x) \
158 || IS_BCLRI1(x) || IS_RSUBI1(x) || IS_NOT1(x) \
159 || IS_IXH1(x) || IS_IXW1(x))
164 mcore_dump_insn (char *commnt, CORE_ADDR pc, int insn)
168 printf_filtered ("MCORE: %s %08x %08x ",
169 commnt, (unsigned int) pc, (unsigned int) insn);
170 (*tm_print_insn) (pc, &tm_print_insn_info);
171 printf_filtered ("\n");
174 #define mcore_insn_debug(args) { if (mcore_debug) printf_filtered args; }
175 #else /* !MCORE_DEBUG */
176 #define mcore_dump_insn(a,b,c) {}
177 #define mcore_insn_debug(args) {}
180 /* Given the address at which to insert a breakpoint (BP_ADDR),
181 what will that breakpoint be?
183 For MCore, we have a breakpoint instruction. Since all MCore
184 instructions are 16 bits, this is all we need, regardless of
185 address. bpkt = 0x0000 */
188 mcore_breakpoint_from_pc (CORE_ADDR * bp_addr, int *bp_size)
190 static char breakpoint[] =
196 /* Helper function for several routines below. This funtion simply
197 sets up a fake, aka dummy, frame (not a _call_ dummy frame) that
198 we can analyze with mcore_analyze_prologue. */
200 static struct frame_info *
201 analyze_dummy_frame (CORE_ADDR pc, CORE_ADDR frame)
203 static struct frame_info *dummy = NULL;
207 dummy = (struct frame_info *) xmalloc (sizeof (struct frame_info));
208 dummy->saved_regs = (CORE_ADDR *) xmalloc (SIZEOF_FRAME_SAVED_REGS);
210 (struct frame_extra_info *) xmalloc (sizeof (struct frame_extra_info));
216 dummy->frame = frame;
217 dummy->extra_info->status = 0;
218 dummy->extra_info->framesize = 0;
219 memset (dummy->saved_regs, '\000', SIZEOF_FRAME_SAVED_REGS);
220 mcore_analyze_prologue (dummy, 0, 0);
224 /* Function prologues on the Motorola MCore processors consist of:
226 - adjustments to the stack pointer (r1 used as scratch register)
227 - store word/multiples that use r0 as the base address
228 - making a copy of r0 into another register (a "frame" pointer)
230 Note that the MCore really doesn't have a real frame pointer.
231 Instead, the compiler may copy the SP into a register (usually
232 r8) to act as an arg pointer. For our target-dependent purposes,
233 the frame info's "frame" member will be the beginning of the
234 frame. The SP could, in fact, point below this.
236 The prologue ends when an instruction fails to meet either of
237 the first two criteria or when an FP is made. We make a special
238 exception for gcc. When compiling unoptimized code, gcc will
239 setup stack slots. We need to make sure that we skip the filling
240 of these stack slots as much as possible. This is only done
241 when SKIP_PROLOGUE is set, so that it does not mess up
244 /* Analyze the prologue of frame FI to determine where registers are saved,
245 the end of the prologue, etc. Return the address of the first line
246 of "real" code (i.e., the end of the prologue). */
249 mcore_analyze_prologue (struct frame_info *fi, CORE_ADDR pc, int skip_prologue)
251 CORE_ADDR func_addr, func_end, addr, stop;
252 CORE_ADDR stack_size;
254 int status, fp_regnum, flags;
256 int register_offsets[NUM_REGS];
259 /* If provided, use the PC in the frame to look up the
260 start of this function. */
261 pc = (fi == NULL ? pc : fi->pc);
263 /* Find the start of this function. */
264 status = find_pc_partial_function (pc, &name, &func_addr, &func_end);
266 /* If the start of this function could not be found or if the debbuger
267 is stopped at the first instruction of the prologue, do nothing. */
271 /* If the debugger is entry function, give up. */
272 if (func_addr == entry_point_address ())
275 fi->extra_info->status |= NO_MORE_FRAMES;
279 /* At the start of a function, our frame is in the stack pointer. */
280 flags = MY_FRAME_IN_SP;
282 /* Start decoding the prologue. We start by checking two special cases:
284 1. We're about to return
285 2. We're at the first insn of the prologue.
287 If we're about to return, our frame has already been deallocated.
288 If we are stopped at the first instruction of a prologue,
289 then our frame has not yet been set up. */
291 /* Get the first insn from memory (all MCore instructions are 16 bits) */
292 mcore_insn_debug (("MCORE: starting prologue decoding\n"));
293 insn = get_insn (pc);
294 mcore_dump_insn ("got 1: ", pc, insn);
296 /* Check for return. */
297 if (fi != NULL && IS_RTS (insn))
299 mcore_insn_debug (("MCORE: got jmp r15"));
300 if (fi->next == NULL)
301 fi->frame = read_sp ();
305 /* Check for first insn of prologue */
306 if (fi != NULL && fi->pc == func_addr)
308 if (fi->next == NULL)
309 fi->frame = read_sp ();
313 /* Figure out where to stop scanning */
314 stop = (fi ? fi->pc : func_end);
316 /* Don't walk off the end of the function */
317 stop = (stop > func_end ? func_end : stop);
319 /* REGISTER_OFFSETS will contain offsets, from the top of the frame
320 (NOT the frame pointer), for the various saved registers or -1
321 if the register is not saved. */
322 for (rn = 0; rn < NUM_REGS; rn++)
323 register_offsets[rn] = -1;
325 /* Analyze the prologue. Things we determine from analyzing the
327 * the size of the frame
328 * where saved registers are located (and which are saved)
330 mcore_insn_debug (("MCORE: Scanning prologue: func_addr=0x%x, stop=0x%x\n",
331 (unsigned int) func_addr, (unsigned int) stop));
334 for (addr = func_addr; addr < stop; addr += 2)
337 insn = get_insn (addr);
338 mcore_dump_insn ("got 2: ", addr, insn);
342 int offset = 1 + ((insn >> 4) & 0x1f);
343 mcore_insn_debug (("MCORE: got subi r0,%d; continuing\n", offset));
347 else if (IS_STM (insn))
349 /* Spill register(s) */
353 /* BIG WARNING! The MCore ABI does not restrict functions
354 to taking only one stack allocation. Therefore, when
355 we save a register, we record the offset of where it was
356 saved relative to the current framesize. This will
357 then give an offset from the SP upon entry to our
358 function. Remember, framesize is NOT constant until
359 we're done scanning the prologue. */
360 start_register = (insn & 0xf);
361 mcore_insn_debug (("MCORE: got stm r%d-r15,(r0)\n", start_register));
363 for (rn = start_register, offset = 0; rn <= 15; rn++, offset += 4)
365 register_offsets[rn] = framesize - offset;
366 mcore_insn_debug (("MCORE: r%d saved at 0x%x (offset %d)\n", rn,
367 register_offsets[rn], offset));
369 mcore_insn_debug (("MCORE: continuing\n"));
372 else if (IS_STWx0 (insn))
374 /* Spill register: see note for IS_STM above. */
377 rn = (insn >> 8) & 0xf;
378 imm = (insn >> 4) & 0xf;
379 register_offsets[rn] = framesize - (imm << 2);
380 mcore_insn_debug (("MCORE: r%d saved at offset 0x%x\n", rn, register_offsets[rn]));
381 mcore_insn_debug (("MCORE: continuing\n"));
384 else if (IS_MOVx0 (insn))
386 /* We have a frame pointer, so this prologue is over. Note
387 the register which is acting as the frame pointer. */
388 flags |= MY_FRAME_IN_FP;
389 flags &= ~MY_FRAME_IN_SP;
390 fp_regnum = insn & 0xf;
391 mcore_insn_debug (("MCORE: Found a frame pointer: r%d\n", fp_regnum));
393 /* If we found an FP, we're at the end of the prologue. */
394 mcore_insn_debug (("MCORE: end of prologue\n"));
398 /* If we're decoding prologue, stop here. */
402 else if (IS_STWxy (insn) && (flags & MY_FRAME_IN_FP) && ((insn & 0xf) == fp_regnum))
404 /* Special case. Skip over stack slot allocs, too. */
405 mcore_insn_debug (("MCORE: push arg onto stack.\n"));
408 else if (IS_LRW1 (insn) || IS_MOVI1 (insn)
409 || IS_BGENI1 (insn) || IS_BMASKI1 (insn))
415 mcore_insn_debug (("MCORE: looking at large frame\n"));
419 read_memory_integer ((addr + 2 + ((insn & 0xff) << 2)) & 0xfffffffc, 4);
421 else if (IS_MOVI1 (insn))
422 adjust = (insn >> 4) & 0x7f;
423 else if (IS_BGENI1 (insn))
424 adjust = 1 << ((insn >> 4) & 0x1f);
425 else /* IS_BMASKI (insn) */
426 adjust = (1 << (adjust >> 4) & 0x1f) - 1;
428 mcore_insn_debug (("MCORE: base framesize=0x%x\n", adjust));
430 /* May have zero or more insns which modify r1 */
431 mcore_insn_debug (("MCORE: looking for r1 adjusters...\n"));
433 insn2 = get_insn (addr + offset);
434 while (IS_R1_ADJUSTER (insn2))
438 imm = (insn2 >> 4) & 0x1f;
439 mcore_dump_insn ("got 3: ", addr + offset, insn);
440 if (IS_ADDI1 (insn2))
443 mcore_insn_debug (("MCORE: addi r1,%d\n", imm + 1));
445 else if (IS_SUBI1 (insn2))
448 mcore_insn_debug (("MCORE: subi r1,%d\n", imm + 1));
450 else if (IS_RSUBI1 (insn2))
452 adjust = imm - adjust;
453 mcore_insn_debug (("MCORE: rsubi r1,%d\n", imm + 1));
455 else if (IS_NOT1 (insn2))
458 mcore_insn_debug (("MCORE: not r1\n"));
460 else if (IS_ROTLI1 (insn2))
463 mcore_insn_debug (("MCORE: rotli r1,%d\n", imm + 1));
465 else if (IS_BSETI1 (insn2))
467 adjust |= (1 << imm);
468 mcore_insn_debug (("MCORE: bseti r1,%d\n", imm));
470 else if (IS_BCLRI1 (insn2))
472 adjust &= ~(1 << imm);
473 mcore_insn_debug (("MCORE: bclri r1,%d\n", imm));
475 else if (IS_IXH1 (insn2))
478 mcore_insn_debug (("MCORE: ix.h r1,r1\n"));
480 else if (IS_IXW1 (insn2))
483 mcore_insn_debug (("MCORE: ix.w r1,r1\n"));
487 insn2 = get_insn (addr + offset);
490 mcore_insn_debug (("MCORE: done looking for r1 adjusters\n"));
492 /* If the next insn adjusts the stack pointer, we keep everything;
493 if not, we scrap it and we've found the end of the prologue. */
494 if (IS_SUB01 (insn2))
498 mcore_insn_debug (("MCORE: found stack adjustment of 0x%x bytes.\n", adjust));
499 mcore_insn_debug (("MCORE: skipping to new address 0x%x\n", addr));
500 mcore_insn_debug (("MCORE: continuing\n"));
504 /* None of these instructions are prologue, so don't touch
506 mcore_insn_debug (("MCORE: no subu r1,r0, NOT altering framesize.\n"));
510 /* This is not a prologue insn, so stop here. */
511 mcore_insn_debug (("MCORE: insn is not a prologue insn -- ending scan\n"));
515 mcore_insn_debug (("MCORE: done analyzing prologue\n"));
516 mcore_insn_debug (("MCORE: prologue end = 0x%x\n", addr));
518 /* Save everything we have learned about this frame into FI. */
521 fi->extra_info->framesize = framesize;
522 fi->extra_info->fp_regnum = fp_regnum;
523 fi->extra_info->status = flags;
525 /* Fix the frame pointer. When gcc uses r8 as a frame pointer,
526 it is really an arg ptr. We adjust fi->frame to be a "real"
528 if (fi->next == NULL)
530 if (fi->extra_info->status & MY_FRAME_IN_SP)
531 fi->frame = read_sp () + framesize;
533 fi->frame = read_register (fp_regnum) + framesize;
536 /* Note where saved registers are stored. The offsets in REGISTER_OFFSETS
537 are computed relative to the top of the frame. */
538 for (rn = 0; rn < NUM_REGS; rn++)
540 if (register_offsets[rn] >= 0)
542 fi->saved_regs[rn] = fi->frame - register_offsets[rn];
543 mcore_insn_debug (("Saved register %s stored at 0x%08x, value=0x%08x\n",
544 mcore_register_names[rn], fi->saved_regs[rn],
545 read_memory_integer (fi->saved_regs[rn], 4)));
550 /* Return addr of first non-prologue insn. */
554 /* Given a GDB frame, determine the address of the calling function's frame.
555 This will be used to create a new GDB frame struct, and then
556 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. */
559 mcore_frame_chain (struct frame_info * fi)
561 struct frame_info *dummy;
562 CORE_ADDR callers_addr;
564 /* Analyze the prologue of this function. */
565 if (fi->extra_info->status == 0)
566 mcore_analyze_prologue (fi, 0, 0);
568 /* If mcore_analyze_prologue set NO_MORE_FRAMES, quit now. */
569 if (fi->extra_info->status & NO_MORE_FRAMES)
572 /* Now that we've analyzed our prologue, we can start to ask
573 for information about our caller. The easiest way to do
574 this is to analyze our caller's prologue.
576 If our caller has a frame pointer, then we need to find
577 the value of that register upon entry to our frame.
578 This value is either in fi->saved_regs[rn] if it's saved,
579 or it's still in a register.
581 If our caller does not have a frame pointer, then his frame base
582 is <our base> + -<caller's frame size>. */
583 dummy = analyze_dummy_frame (FRAME_SAVED_PC (fi), fi->frame);
585 if (dummy->extra_info->status & MY_FRAME_IN_FP)
587 int fp = dummy->extra_info->fp_regnum;
589 /* Our caller has a frame pointer. */
590 if (fi->saved_regs[fp] != 0)
592 /* The "FP" was saved on the stack. Don't forget to adjust
593 the "FP" with the framesize to get a real FP. */
594 callers_addr = read_memory_integer (fi->saved_regs[fp], REGISTER_SIZE)
595 + dummy->extra_info->framesize;
599 /* It's still in the register. Don't forget to adjust
600 the "FP" with the framesize to get a real FP. */
601 callers_addr = read_register (fp) + dummy->extra_info->framesize;
606 /* Our caller does not have a frame pointer. */
607 callers_addr = fi->frame + dummy->extra_info->framesize;
613 /* Skip the prologue of the function at PC. */
616 mcore_skip_prologue (CORE_ADDR pc)
618 CORE_ADDR func_addr, func_end;
619 struct symtab_and_line sal;
621 /* If we have line debugging information, then the end of the
622 prologue should be the first assembly instruction of the first
624 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
626 sal = find_pc_line (func_addr, 0);
627 if (sal.end && sal.end < func_end)
631 return mcore_analyze_prologue (NULL, pc, 1);
634 /* Return the address at which function arguments are offset. */
636 mcore_frame_args_address (struct frame_info * fi)
638 return fi->frame - fi->extra_info->framesize;
642 mcore_frame_locals_address (struct frame_info * fi)
644 return fi->frame - fi->extra_info->framesize;
647 /* Return the frame pointer in use at address PC. */
650 mcore_virtual_frame_pointer (CORE_ADDR pc, long *reg, long *offset)
652 struct frame_info *dummy = analyze_dummy_frame (pc, 0);
653 if (dummy->extra_info->status & MY_FRAME_IN_SP)
660 *reg = dummy->extra_info->fp_regnum;
665 /* Find the value of register REGNUM in frame FI. */
668 mcore_find_callers_reg (struct frame_info *fi, int regnum)
670 for (; fi != NULL; fi = fi->next)
672 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
673 return generic_read_register_dummy (fi->pc, fi->frame, regnum);
674 else if (fi->saved_regs[regnum] != 0)
675 return read_memory_integer (fi->saved_regs[regnum],
679 return read_register (regnum);
682 /* Find the saved pc in frame FI. */
685 mcore_frame_saved_pc (struct frame_info * fi)
688 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
689 return generic_read_register_dummy (fi->pc, fi->frame, PC_REGNUM);
691 return mcore_find_callers_reg (fi, PR_REGNUM);
694 /* INFERIOR FUNCTION CALLS */
696 /* This routine gets called when either the user uses the "return"
697 command, or the call dummy breakpoint gets hit. */
700 mcore_pop_frame (struct frame_info *fi)
704 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
705 generic_pop_dummy_frame ();
708 /* Write out the PC we saved. */
709 write_register (PC_REGNUM, FRAME_SAVED_PC (fi));
711 /* Restore any saved registers. */
712 for (rn = 0; rn < NUM_REGS; rn++)
714 if (fi->saved_regs[rn] != 0)
718 value = read_memory_unsigned_integer (fi->saved_regs[rn],
720 write_register (rn, value);
724 /* Actually cut back the stack. */
725 write_register (SP_REGNUM, FRAME_FP (fi));
728 /* Finally, throw away any cached frame information. */
729 flush_cached_frames ();
732 /* Setup arguments and PR for a call to the target. First six arguments
733 go in FIRST_ARGREG -> LAST_ARGREG, subsequent args go on to the stack.
735 * Types with lengths greater than REGISTER_SIZE may not be split
736 between registers and the stack, and they must start in an even-numbered
737 register. Subsequent args will go onto the stack.
739 * Structs may be split between registers and stack, left-aligned.
741 * If the function returns a struct which will not fit into registers (it's
742 more than eight bytes), we must allocate for that, too. Gdb will tell
743 us where this buffer is (STRUCT_ADDR), and we simply place it into
744 FIRST_ARGREG, since the MCORE treats struct returns (of less than eight
745 bytes) as hidden first arguments. */
748 mcore_push_arguments (int nargs, value_ptr * args, CORE_ADDR sp,
749 unsigned char struct_return, CORE_ADDR struct_addr)
761 stack_args = (struct stack_arg *) alloca (nargs * sizeof (struct stack_arg));
763 argreg = FIRST_ARGREG;
765 /* Align the stack. This is mostly a nop, but not always. It will be needed
766 if we call a function which has argument overflow. */
769 /* If this function returns a struct which does not fit in the
770 return registers, we must pass a buffer to the function
771 which it can use to save the return value. */
773 write_register (argreg++, struct_addr);
775 /* FIXME: what about unions? */
776 for (argnum = 0; argnum < nargs; argnum++)
778 char *val = (char *) VALUE_CONTENTS (args[argnum]);
779 int len = TYPE_LENGTH (VALUE_TYPE (args[argnum]));
780 struct type *type = VALUE_TYPE (args[argnum]);
783 mcore_insn_debug (("MCORE PUSH: argreg=%d; len=%d; %s\n",
784 argreg, len, TYPE_CODE (type) == TYPE_CODE_STRUCT ? "struct" : "not struct"));
785 /* Arguments larger than a register must start in an even
786 numbered register. */
789 if (TYPE_CODE (type) != TYPE_CODE_STRUCT && len > REGISTER_SIZE && argreg % 2)
791 mcore_insn_debug (("MCORE PUSH: %d > REGISTER_SIZE: and %s is not even\n",
792 len, mcore_register_names[argreg]));
796 if ((argreg <= LAST_ARGREG && len <= (LAST_ARGREG - argreg + 1) * REGISTER_SIZE)
797 || (TYPE_CODE (type) == TYPE_CODE_STRUCT))
799 /* Something that will fit entirely into registers (or a struct
800 which may be split between registers and stack). */
801 mcore_insn_debug (("MCORE PUSH: arg %d going into regs\n", argnum));
803 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && olen < REGISTER_SIZE)
805 /* Small structs must be right aligned within the register,
806 the most significant bits are undefined. */
807 write_register (argreg, extract_unsigned_integer (val, len));
812 while (len > 0 && argreg <= LAST_ARGREG)
814 write_register (argreg, extract_unsigned_integer (val, REGISTER_SIZE));
816 val += REGISTER_SIZE;
817 len -= REGISTER_SIZE;
820 /* Any remainder for the stack is noted below... */
822 else if (TYPE_CODE (VALUE_TYPE (args[argnum])) != TYPE_CODE_STRUCT
823 && len > REGISTER_SIZE)
825 /* All subsequent args go onto the stack. */
826 mcore_insn_debug (("MCORE PUSH: does not fit into regs, going onto stack\n"));
827 argnum = LAST_ARGREG + 1;
832 /* Note that this must be saved onto the stack */
833 mcore_insn_debug (("MCORE PUSH: adding arg %d to stack\n", argnum));
834 stack_args[nstack_args].val = val;
835 stack_args[nstack_args].len = len;
841 /* We're done with registers and stack allocation. Now do the actual
843 while (nstack_args--)
845 sp -= stack_args[nstack_args].len;
846 write_memory (sp, stack_args[nstack_args].val, stack_args[nstack_args].len);
849 /* Return adjusted stack pointer. */
853 /* Store the return address for the call dummy. For MCore, we've
854 opted to use generic call dummies, so we simply store the
855 CALL_DUMMY_ADDRESS into the PR register (r15). */
858 mcore_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
860 write_register (PR_REGNUM, CALL_DUMMY_ADDRESS ());
864 /* Setting/getting return values from functions.
866 The Motorola MCore processors use r2/r3 to return anything
867 not larger than 32 bits. Everything else goes into a caller-
868 supplied buffer, which is passed in via a hidden first
871 For gdb, this leaves us two routes, based on what
872 USE_STRUCT_CONVENTION (mcore_use_struct_convention) returns.
873 If this macro returns 1, gdb will call STORE_STRUCT_RETURN and
874 EXTRACT_STRUCT_VALUE_ADDRESS.
876 If USE_STRUCT_CONVENTION retruns 0, then gdb uses STORE_RETURN_VALUE
877 and EXTRACT_RETURN_VALUE to store/fetch the functions return value. */
879 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
880 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
881 and TYPE is the type (which is known to be struct, union or array). */
884 mcore_use_struct_convention (int gcc_p, struct type *type)
886 return (TYPE_LENGTH (type) > 8);
889 /* Where is the return value saved? For MCore, a pointer to
890 this buffer was passed as a hidden first argument, so
891 just return that address. */
894 mcore_extract_struct_value_address (char *regbuf)
896 return extract_address (regbuf + REGISTER_BYTE (FIRST_ARGREG), REGISTER_SIZE);
899 /* Given a function which returns a value of type TYPE, extract the
900 the function's return value and place the result into VALBUF.
901 REGBUF is the register contents of the target. */
904 mcore_extract_return_value (struct type *type, char *regbuf, char *valbuf)
906 /* Copy the return value (starting) in RETVAL_REGNUM to VALBUF. */
907 /* Only getting the first byte! if len = 1, we need the last byte of
908 the register, not the first. */
909 memcpy (valbuf, regbuf + REGISTER_BYTE (RETVAL_REGNUM) +
910 (TYPE_LENGTH (type) < 4 ? 4 - TYPE_LENGTH (type) : 0), TYPE_LENGTH (type));
913 /* Store the return value in VALBUF (of type TYPE) where the caller
916 Values less than 32 bits are stored in r2, right justified and
917 sign or zero extended.
919 Values between 32 and 64 bits are stored in r2 (most
920 significant word) and r3 (least significant word, left justified).
921 Note that this includes structures of less than eight bytes, too. */
924 mcore_store_return_value (struct type *type, char *valbuf)
931 value_size = TYPE_LENGTH (type);
933 /* Return value fits into registers. */
934 return_size = (value_size + REGISTER_SIZE - 1) & ~(REGISTER_SIZE - 1);
935 offset = REGISTER_BYTE (RETVAL_REGNUM) + (return_size - value_size);
936 zeros = alloca (return_size);
937 memset (zeros, 0, return_size);
939 write_register_bytes (REGISTER_BYTE (RETVAL_REGNUM), zeros, return_size);
940 write_register_bytes (offset, valbuf, value_size);
943 /* Initialize our target-dependent "stuff" for this newly created frame.
945 This includes allocating space for saved registers and analyzing
946 the prologue of this frame. */
949 mcore_init_extra_frame_info (struct frame_info *fi)
952 fi->pc = FRAME_SAVED_PC (fi->next);
954 frame_saved_regs_zalloc (fi);
956 fi->extra_info = (struct frame_extra_info *)
957 frame_obstack_alloc (sizeof (struct frame_extra_info));
958 fi->extra_info->status = 0;
959 fi->extra_info->framesize = 0;
961 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
963 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
964 by assuming it's always FP. */
965 fi->frame = generic_read_register_dummy (fi->pc, fi->frame, SP_REGNUM);
968 mcore_analyze_prologue (fi, 0, 0);
971 /* Get an insturction from memory. */
974 get_insn (CORE_ADDR pc)
977 int status = read_memory_nobpt (pc, buf, 2);
981 return extract_unsigned_integer (buf, 2);
985 _initialize_mcore_tdep (void)
987 extern int print_insn_mcore (bfd_vma, disassemble_info *);
988 tm_print_insn = print_insn_mcore;
991 add_show_from_set (add_set_cmd ("mcoredebug", no_class,
992 var_boolean, (char *) &mcore_debug,
993 "Set mcore debugging.\n", &setlist),