1 /* Print m68k instructions for objdump
2 Copyright (C) 1986, 1987, 1989, 1991 Free Software Foundation, Inc.
5 This file is part of the binutils.
7 The binutils are free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 The binutils are distributed in the hope that they will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with the binutils; see the file COPYING. If not, write to
19 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
23 Revision 1.5 1991/11/03 22:58:44 bothner
24 * Makefile.in ($(DIST_NAME).tar.Z), TODO: Various fixes.
25 * ar.c (get_pos_bfd): Fix to handling of before/after
27 * bucomm.c (fatal): MISSING_VFPRINTF is no longer an issue,
28 since libiberty contains vfprintf etc if otherwise missing.
29 * m68k-pinsn.c (print_insn_arg): Support BB/BW/BL
30 type operands, as used by branch instructions.
31 * nm.c: Delegate printing of symbols to BFD,
32 by using bfd_print_symbol to do the formatting.
34 * Revision 1.4 1991/10/16 18:56:56 bothner
35 * * Makefile.in, ar.c, bucomm.c, copy.c, cplus-dem.c, filemode.c,
36 * i960-pinsn.c, m68k-pinsn.c, nm.c, objdump.c, size.c, sparc-pinsn.c,
37 * * strip.c: Add or update Copyright notice.
38 * * TODO: Add note on 'nm -a'.
39 * * version.c: Update version number to 1.90.
40 * * Makefile.in: Fix making of documentation for dist.
42 * Revision 1.3 1991/10/11 11:22:00 gnu
43 * Include bfd.h before sysdep.h, so ansidecl and PROTO() get defined first.
45 * Revision 1.2 1991/06/14 22:54:44 steve
46 * *** empty log message ***
48 * Revision 1.1.1.1 1991/03/21 21:26:46 gumby
49 * Back from Intel with Steve
51 * Revision 1.1 1991/03/21 21:26:45 gumby
54 * Revision 1.1 1991/03/13 00:34:06 chrisb
57 * Revision 1.4 1991/03/09 04:36:34 rich
59 * sparc-pinsn.c ostrip.c objdump.c m68k-pinsn.c i960-pinsn.c
62 * Pulled sysdep.h out of bfd.h.
64 * Revision 1.3 1991/03/08 21:54:45 rich
66 * Makefile ar.c binutils.h bucomm.c copy.c cplus-dem.c getopt.c
67 * i960-pinsn.c m68k-pinsn.c nm.c objdump.c sparc-opcode.h
68 * sparc-pinsn.c strip.c
70 * Verifying Portland tree with steve's last changes. Also, some partial
73 * Revision 1.2 1991/03/08 07:46:24 sac
74 * Added -l option to disassembly - prints line numbers too.
76 * Revision 1.1 1991/02/22 16:48:02 sac
83 #include "m68k-opcode.h"
86 extern void print_address();
88 /* 68k instructions are never longer than this many bytes. */
91 /* Number of elements in the opcode table. */
92 #define NOPCODES (sizeof m68k_opcodes / sizeof m68k_opcodes[0])
94 extern char *reg_names[];
95 char *fpcr_names[] = { "", "fpiar", "fpsr", "fpiar/fpsr", "fpcr",
96 "fpiar/fpcr", "fpsr/fpcr", "fpiar-fpcr"};
98 char *reg_names[] = {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", "a0", "a1", "a2", "a3", "a4", "a5", "fp", "sp", "ps", "pc"};
99 static unsigned char *print_insn_arg ();
100 static unsigned char *print_indexed ();
101 static void print_base ();
102 static int fetch_arg ();
104 #define NEXTBYTE(p) (p += 2, ((char *)p)[-1])
106 #define NEXTWORD(p) \
107 (p += 2, ((((char *)p)[-2]) << 8) + p[-1])
109 #define NEXTLONG(p) \
110 (p += 4, (((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1])
112 #define NEXTSINGLE(p) \
113 (p += 4, *((float *)(p - 4)))
115 #define NEXTDOUBLE(p) \
116 (p += 8, *((double *)(p - 8)))
118 #define NEXTEXTEND(p) \
119 (p += 12, 0.0) /* Need a function to convert from extended to double
122 #define NEXTPACKED(p) \
123 (p += 12, 0.0) /* Need a function to convert from packed to double
124 precision. Actually, it's easier to print a
125 packed number than a double anyway, so maybe
126 there should be a special case to handle this... */
128 /* Print the m68k instruction at address MEMADDR in debugged memory,
129 on STREAM. Returns length of the instruction, in bytes. */
132 print_insn_m68k(addr, buffer, stream)
134 unsigned char *buffer;
137 register unsigned int i;
138 register unsigned char *p;
140 register unsigned int bestmask;
147 for (i = 0; i < NOPCODES; i++)
149 register unsigned int opcode = m68k_opcodes[i].opcode;
150 register unsigned int match = m68k_opcodes[i].match;
151 if (((0xff & buffer[0] & (match >> 24)) == (0xff & (opcode >> 24)))
152 && ((0xff & buffer[1] & (match >> 16)) == (0xff & (opcode >> 16)))
153 && ((0xff & buffer[2] & (match >> 8)) == (0xff & (opcode >> 8)))
154 && ((0xff & buffer[3] & match) == (0xff & opcode)))
156 /* Don't use for printout the variants of divul and divsl
157 that have the same register number in two places.
158 The more general variants will match instead. */
159 for (d = m68k_opcodes[i].args; *d; d += 2)
163 /* Don't use for printout the variants of most floating
164 point coprocessor instructions which use the same
165 register number in two places, as above. */
167 for (d = m68k_opcodes[i].args; *d; d += 2)
171 if (*d == 0 && match > bestmask)
179 /* Handle undefined instructions. */
182 fprintf (stream, "0%o", (unsigned) (buffer[0] << 8) + buffer[1]);
186 fprintf (stream, "%s", m68k_opcodes[best].name);
188 /* Point at first word of argument data,
189 and at descriptor for first argument. */
192 /* Why do this this way? -MelloN */
193 for (d = m68k_opcodes[best].args; *d; d += 2)
197 if (d[1] == 'l' && p - buffer < 6)
199 else if (p - buffer < 4 && d[1] != 'C' && d[1] != '8' )
202 if (d[1] >= '1' && d[1] <= '3' && p - buffer < 4)
204 if (d[1] >= '4' && d[1] <= '6' && p - buffer < 6)
206 if ((d[0] == 'L' || d[0] == 'l') && d[1] == 'w' && p - buffer < 4)
210 d = m68k_opcodes[best].args;
217 p = print_insn_arg (d, buffer, p, addr + p - buffer, stream);
219 if (*d && *(d - 2) != 'I' && *d != 'k')
225 static unsigned char *
226 print_insn_arg (d, buffer, p, addr, stream)
228 unsigned char *buffer;
229 register unsigned char *p;
230 bfd_vma addr; /* PC for this arg to be relative to */
234 register int place = d[1];
236 register char *regname;
237 register unsigned char *p1;
238 register double flval;
244 fprintf (stream, "ccr");
248 fprintf (stream, "sr");
252 fprintf (stream, "usp");
257 static struct { char *name; int value; } names[]
258 = {{"sfc", 0x000}, {"dfc", 0x001}, {"cacr", 0x002},
259 {"usp", 0x800}, {"vbr", 0x801}, {"caar", 0x802},
260 {"msp", 0x803}, {"isp", 0x804}};
262 val = fetch_arg (buffer, place, 12);
263 for (regno = sizeof names / sizeof names[0] - 1; regno >= 0; regno--)
264 if (names[regno].value == val)
266 fprintf (stream, names[regno].name);
270 fprintf (stream, "%d", val);
275 val = fetch_arg (buffer, place, 3);
276 if (val == 0) val = 8;
277 fprintf (stream, "#%d", val);
281 val = fetch_arg (buffer, place, 8);
284 fprintf (stream, "#%d", val);
288 val = fetch_arg (buffer, place, 4);
289 fprintf (stream, "#%d", val);
293 fprintf (stream, "%s", reg_names[fetch_arg (buffer, place, 3)]);
297 fprintf (stream, "%s",
298 reg_names[fetch_arg (buffer, place, 3) + 010]);
302 fprintf (stream, "%s", reg_names[fetch_arg (buffer, place, 4)]);
306 fprintf (stream, "fp%d", fetch_arg (buffer, place, 3));
310 val = fetch_arg (buffer, place, 6);
312 fprintf (stream, "%s", reg_names [val & 7]);
314 fprintf (stream, "%d", val);
318 fprintf (stream, "%s@+",
319 reg_names[fetch_arg (buffer, place, 3) + 8]);
323 fprintf (stream, "%s@-",
324 reg_names[fetch_arg (buffer, place, 3) + 8]);
329 fprintf (stream, "{%s}", reg_names[fetch_arg (buffer, place, 3)]);
330 else if (place == 'C')
332 val = fetch_arg (buffer, place, 7);
333 if ( val > 63 ) /* This is a signed constant. */
335 fprintf (stream, "{#%d}", val);
338 fprintf(stderr, "Invalid arg format in opcode table: \"%c%c\".",
344 p1 = buffer + (*d == '#' ? 2 : 4);
346 val = fetch_arg (buffer, place, 4);
347 else if (place == 'C')
348 val = fetch_arg (buffer, place, 7);
349 else if (place == '8')
350 val = fetch_arg (buffer, place, 3);
351 else if (place == '3')
352 val = fetch_arg (buffer, place, 8);
353 else if (place == 'b')
355 else if (place == 'w')
357 else if (place == 'l')
360 fprintf(stderr, "Invalid arg format in opcode table: \"%c%c\".",
362 fprintf (stream, "#%d", val);
368 else if (place == 'B')
370 else if (place == 'w' || place == 'W')
372 else if (place == 'l' || place == 'L')
374 else if (place == 'g')
376 val = ((char *)buffer)[1];
382 else if (place == 'c')
384 if (buffer[1] & 0x40) /* If bit six is one, long offset */
390 fprintf(stderr, "Invalid arg format in opcode table: \"%c%c\".",
392 print_address (addr + val, stream);
397 fprintf (stream, "%s@(%d)",
398 reg_names[fetch_arg (buffer, place, 3)], val);
402 fprintf (stream, "%s",
403 fpcr_names[fetch_arg (buffer, place, 3)]);
407 val = fetch_arg (buffer, 'd', 3); /* Get coprocessor ID... */
408 if (val != 1) /* Unusual coprocessor ID? */
409 fprintf (stream, "(cpid=%d) ", val);
411 p += 2; /* Skip coprocessor extended operands */
427 val = fetch_arg (buffer, 'x', 6);
428 val = ((val & 7) << 3) + ((val >> 3) & 7);
431 val = fetch_arg (buffer, 's', 6);
433 /* Get register number assuming address register. */
434 regno = (val & 7) + 8;
435 regname = reg_names[regno];
439 fprintf (stream, "%s", reg_names[val]);
443 fprintf (stream, "%s", regname);
447 fprintf (stream, "%s@", regname);
451 fprintf (stream, "%s@+", regname);
455 fprintf (stream, "%s@-", regname);
460 fprintf (stream, "%s@(%d)", regname, val);
464 p = print_indexed (regno, p, addr, stream);
472 fprintf (stream, "@#");
473 print_address (val, stream);
478 fprintf (stream, "@#");
479 print_address (val, stream);
484 print_address (addr + val, stream);
488 p = print_indexed (-1, p, addr, stream);
492 flt_p = 1; /* Assume it's a float... */
511 flval = NEXTSINGLE(p);
515 flval = NEXTDOUBLE(p);
519 flval = NEXTEXTEND(p);
523 flval = NEXTPACKED(p);
527 fprintf(stderr, "Invalid arg format in opcode table: \"%c%c\".",
530 if ( flt_p ) /* Print a float? */
531 fprintf (stream, "#%g", flval);
533 fprintf (stream, "#%d", val);
537 fprintf (stream, "<invalid address mode 0%o>", (unsigned) val);
549 /* Move the pointer ahead if this point is farther ahead
554 fputs ("#0", stream);
559 register int newval = 0;
560 for (regno = 0; regno < 16; ++regno)
561 if (val & (0x8000 >> regno))
562 newval |= 1 << regno;
567 for (regno = 0; regno < 16; ++regno)
568 if (val & (1 << regno))
574 fprintf (stream, "%s", reg_names[regno]);
576 while (val & (1 << (regno + 1)))
578 if (regno > first_regno)
579 fprintf (stream, "-%s", reg_names[regno]);
582 else if (place == '3')
586 val = fetch_arg (buffer, place, 8);
589 fputs ("#0", stream);
594 register int newval = 0;
595 for (regno = 0; regno < 8; ++regno)
596 if (val & (0x80 >> regno))
597 newval |= 1 << regno;
602 for (regno = 0; regno < 8; ++regno)
603 if (val & (1 << regno))
609 fprintf (stream, "fp%d", regno);
611 while (val & (1 << (regno + 1)))
613 if (regno > first_regno)
614 fprintf (stream, "-fp%d", regno);
622 fprintf(stderr, "Invalid arg format in opcode table: \"%c\".", *d);
625 return (unsigned char *) p;
628 /* Fetch BITS bits from a position in the instruction specified by CODE.
629 CODE is a "place to put an argument", or 'x' for a destination
630 that is a general address (mode and register).
631 BUFFER contains the instruction. */
634 fetch_arg (buffer, code, bits)
635 unsigned char *buffer;
646 case 'd': /* Destination, for register or quick. */
647 val = (buffer[0] << 8) + buffer[1];
651 case 'x': /* Destination, for general arg */
652 val = (buffer[0] << 8) + buffer[1];
657 val = (buffer[3] >> 4);
665 val = (buffer[2] << 8) + buffer[3];
670 val = (buffer[2] << 8) + buffer[3];
676 val = (buffer[2] << 8) + buffer[3];
680 val = (buffer[4] << 8) + buffer[5];
685 val = (buffer[4] << 8) + buffer[5];
690 val = (buffer[4] << 8) + buffer[5];
694 val = (buffer[2] << 8) + buffer[3];
699 val = (buffer[2] << 8) + buffer[3];
729 /* Print an indexed argument. The base register is BASEREG (-1 for pc).
730 P points to extension word, in buffer.
731 ADDR is the nominal core address of that extension word. */
733 static unsigned char *
734 print_indexed (basereg, p, addr, stream)
741 static char *scales[] = {"", "*2", "*4", "*8"};
742 register int base_disp;
743 register int outer_disp;
748 /* Generate the text for the index register.
749 Where this will be output is not yet determined. */
750 sprintf (buf, "[%s.%c%s]",
751 reg_names[(word >> 12) & 0xf],
752 (word & 0x800) ? 'l' : 'w',
753 scales[(word >> 9) & 3]);
755 /* Handle the 68000 style of indexing. */
757 if ((word & 0x100) == 0)
760 ((word & 0x80) ? word | 0xff00 : word & 0xff)
761 + ((basereg == -1) ? addr : 0),
767 /* Handle the generalized kind. */
768 /* First, compute the displacement to add to the base register. */
775 switch ((word >> 4) & 3)
778 base_disp = NEXTWORD (p);
781 base_disp = NEXTLONG (p);
786 /* Handle single-level case (not indirect) */
790 print_base (basereg, base_disp, stream);
795 /* Two level. Compute displacement to add after indirection. */
801 outer_disp = NEXTWORD (p);
804 outer_disp = NEXTLONG (p);
807 fprintf (stream, "%d(", outer_disp);
808 print_base (basereg, base_disp, stream);
810 /* If postindexed, print the closeparen before the index. */
812 fprintf (stream, ")%s", buf);
813 /* If preindexed, print the closeparen after the index. */
815 fprintf (stream, "%s)", buf);
820 /* Print a base register REGNO and displacement DISP, on STREAM.
821 REGNO = -1 for pc, -2 for none (suppressed). */
824 print_base (regno, disp, stream)
830 fprintf (stream, "%d", disp);
831 else if (regno == -1)
832 fprintf (stream, "0x%x", (unsigned) disp);
834 fprintf (stream, "%d(%s)", disp, reg_names[regno]);