3 * interp.c (xfer_mem): Change unified memory to 0x0.
7 * simops.c (OP_3E01): Fix tracing information.
8 (OP_300{0,1}): Do not propigate sign.
12 * config.in (WORDS_BIGENDIAN): Add.
13 * configure: Regenerated.
14 * d10v_sim.h: #include "config.h"
18 * gencode.c (write_opcodes): Eliminate warnings when generated
23 * interp.c (sim_open): Cast result of calloc, and make sure NULL
25 (dmem_addr): If address is illegal or in I/O space, signal a bus
27 (pc_addr): Signal bus error, not illegal instruction for bogus
32 * Makefile.in: Delete all stuff moved to ../common/Make-common.in.
33 (SIM_OBJS,SIM_EXTRA_CFLAGS,SIM_EXTRA_CLEAN): Define.
34 * configure.in: Simplify using macros in ../common/aclocal.m4.
35 Call AC_CHECK_HEADERS(unistd.h).
36 * configure: Regenerated.
37 * config.in: New file.
38 * interp.c: #include "callback.h".
39 * simops.c: #include "config.h". #include <unistd.h> if present.
43 * d10v-sim.h (simops): Add flag is_long.
44 (State): Add pc_changed. Instructions which update the PC should
45 use the JMP macro which sets this.
46 (JMP): New macro. Sets the PC and the pc_changed flag.
48 * gencode.c (write_opcodes): Add is_long field.
50 * interp.c (lookup_hash): If we blindly apply a short opcode's mask
51 to a long opcode we could get a false match. Check the opcode size.
52 (hash): Add a size field to the hash table.
53 (sim_open): Initialize size field in hash table.
54 (sim_resume): Change to logic for setting the PC. Used to increment the
55 PC if it had not been changed. This didn't allow single-instruction loops.
56 Now checks the flag State.pc_changed. Also now stops when ^C is received.
57 (dmem_addr): Fix translation of data segments to unified memory.
58 (sim_ctrl_c): New function. When ^C is received, set stop_simulator flag.
60 * simops.c: Changed all branch and jump instructions to use new JMP macro.
61 (OP_20000000): Corrected trace information to show this is a ldi.l, not
66 * interp.c (sim_fetch_register, sim_store_register): Fix bug where
67 updating the accumulators was overwriting other parts of the global
72 * interp.c (bfd.h) Don't include it here any more.
73 (text{,_start,_end}): Move here from simops.c and make extern.
74 (decode_pc): New function to return the PC as an address that the
76 (dmem_addr): Print decoded PC in error message.
79 * simops.c (bfd.h) Don't include it here any more.
80 (text{,_start,_end}): Move to simops.c.
81 (trace_input_func): Move decoding of PC, and looking up .text
84 * d10v_sim.h (bfd.h): Include it here.
85 (text{,_start,_end}): Add external declarations.
91 * interp.c (sim_size): Now allocates unified memory for imap segments
92 0,1,2, and 127. Initializes imap0 and imap1 to 0x1000. Initializes dmap to 0.
93 (sim_write): Just call xfer_mem().
94 (sim_read): Just call xfer_mem().
95 (xfer_mem): New function. Does appropriate memory mapping and copies bytes.
96 (dmem_addr): New function. Reads dmap register and translates data
97 addresses to local addresses.
98 (pc_addr): New function. Reads imap register and computes local address
99 corresponding to contents of the PC.
100 (sim_resume): Change to use pc_addr().
101 (sim_create_inferior): Change reinitialization code. Also reinitializes
103 (sim_fetch_register): Add fake registers 32,33,34 for imap0, imap1, and dmap.
104 (sim_store_register): Add fake registers 32,33,34 for imap0, imap1, and dmap.
106 * simops.c (MEMPTR): Redefine to use dmem_addr().
107 (OP_5F00): Replace references to STate.imem with dmem_addr().
109 * d10v-sim.h (State): Remove mem_min and mem_max. Add umem[128].
110 (RB,SW,RW,SLW,RLW): Redefine to use dmem_addr().
111 (IMAP0,IMAP1,DMAP,SET_IMAP,SET_IMAP1,SET_DMAP): Define.
115 * d10v_sim.h (_ins_type): Reorganize, so that we can provide
116 better statistics, like not counting NOPS as parallel
117 instructions, and printing total cycles.
118 (ins_type_counters): Make unsigned long.
119 (left_nops,right_nops): Fold into ins_type_counters.
121 * simops.c (trace_input_func): Print new instruction types.
122 Handle OP_R2R3 as input types.
123 (OP_{38000000,7000}): Correctly sign extend bytes.
124 (OP_5E00): Don't count NOPs as parallel instructions.
125 (OP_460B): Remove unused variable.
128 * interp.c (ins_type_counters): Make unsigned long.
129 (left_nops,right_nops): Delete.
130 (most functions): Add prototypes.
131 (INLINE): If GCC and optimize define as __inline__.
132 ({,lookup_}hash,get_operands): Declare as INLINE.
133 (do_parallel): Count conditional operations.
134 (add_commas): New function, to add commas every 3 digits.
135 (sim_size): Call add_commas to print numbers.
136 (sim_{open,resume}): Delete unused variables.
137 (sim_info): Provide better statistics.
138 (sim_read): Add int return type.
142 * interp.c (sim_resume): Change the way single-stepping and exceptions
143 are handled so single-stepping works again.
147 * endian.c: Optimize simulated loads/stores on x86, AIX, and big
150 * configure.in (--enable-sim-bswap): New switch to enable using
151 the BSWAP instruction on x86's.
152 * configure: Regenerate.
154 * Makefile.in ({SWAP,CONFIG}_CFLAGS): Add --enable-sim-bswap
159 * endian.c: New file. Move endian functions here from interp.c.
160 Optimize code, and make it work as either inline functions or as a
163 * interp.c: Move endian functions from here to endian.c.
165 * Makefile.in (INCLUDE): Add endian.c.
166 (run,libsim.a): Add dependency on endian.o.
167 (endian.o): Add dependency.
169 * d10v_sim.h (read/write support): Always go through the machine
170 independent endian functions. If compiling with GCC and
171 optimizing, include endian.c so the endian functions are inlined.
173 * simops.c (OP_5F00): Correct tracing of accumulators.
177 * simops.c (OP_5F00): Add support for getpid, kill system calls.
179 * interp.c (do_{2_short,parallel}): If an exception is raised,
180 don't execute the second instruction.
184 * simops.c (OP_{31000000,6601,6201,6200}): Store address in a
185 temporary in case the register is overriden when loading.
186 (OP_6200): Output type is OP_DREG for tracing.
190 * d10v_sim.h (struct _state): Add mem_{min,max} fields.
192 * interp.c (sim_size): Initialize mem_{min,max} fields.
193 (sim_write): Update mem_{min,max} fields.
194 (sim_resume): If PC is not in the minimum/maximum memory range,
196 (sim_create_inferior): Preserve mem_{min,max} fields.
200 * simops.c (OP_5F00): Add support for time() system call.
204 * simops.c (OP_{6E01,6A01,6E1F,6A00}): Print both words being
206 (OP_5F00,trace_{in,out}put_func): Add finer grain tracing for
211 * simops.c (op_types): Add OP_{CONSTANT8,R2,R3}.
212 (trace_input_func): Add support for OP_{CONSTANT8,R2,R3}.
213 (OP_{4900,24800000,4800,4A00,4B00,4D00,4C00}): Add OP_R2 and OP_R3
214 to call/subroutine returns to trace the first two arguments and
215 the return value. For small jumps, use CONSTANT8, not CONSTANT16.
219 * interp.c (sim_create_inferior): Reinitialize State every time
220 sim_create_inferior() is called.
224 * simops.c (OP_{401,2000000,601,3000000,23000000}): Get sign right
226 (OP_401): Fix tracing information.
230 * simops.c (SIZE_{PC,LINE_NUMBER}): New default sizes for output.
231 (trace_input_func): Use them.
232 (trace_input_func): Make sure there is a trailing space after the
234 (OP_6200): Fix tracing info.
236 * Makefile.in (run): Add dependencies on libbfd.a and
241 * d10v_sim.h (DEBUG_INSTRUCTION): New debug value to include line
242 numbers and function names in debug trace.
243 (DEBUG): If not defined, set to DEBUG_TRACE, DEBUG_VALUES, and
245 (SIG_D10V_{STOP,EXIT}): Values to represent the stop instruction
246 and exit system call trap being executed.
248 * interp.c (sim_stop_reason): Set exit code correctly for stop
249 instruction and exit system call trap.
251 * configure.in (--enable-sim-cflags): Remove trace case.
252 (--enable-sim-debug): New switch to set the debug values.
253 * configure: Regenerate.
255 * simops.c (trace_{input,output}_func): Rename from
256 trace_{input,output}.
257 (trace_{input,output}): Call trace_{input,output}_func if
258 d10v_debug is non-zero.
259 (SIZE_INSTRUCTION): Cut down to 8.
260 (SIZE_OPERANDS): Cut down to 18.
261 (SIZE_LOCATION): New value for size of line number, function name
263 (init_text_p,text{,_start,_end}): New static variables for
264 printing line number and function name.
265 (exec_bfd): New external that run.c sets.
266 (trace_input_func): Print line number and function name if
267 available and if desired.
268 (OP_4E09): Don't print out DBT message.
269 (OP_5FE0): Set exception field to SIG_D10V_STOP.
270 (OP_5F00): Set exception field to SIG_D10V_EXIT.
274 * interp.c (do_2_short): If the instruction encodes jump->ins,
275 don't do the second instruction if the jump succeeds.
279 * simops.c (OP_5F00): Use unknown traps to print all GPRs,
280 accumulators, PC, and F0/F1/C flags.
284 * simops.c (OP_5F00): Fix problems with system calls.
288 * simops.c (OP_5F00): Correct tracing information for trap.
292 * Makefile.in (CSEARCH): Correctly find opcodes directory.
296 * simops.c (trace_output): Properly align accumulator output.
297 (OP_3{0,2,4}00): Properly parenthesize test expression. Add error
298 if shift count is too high.
299 (OP_4E{00,02,04,20,22,40,42}): Make tests agree with book.
300 (OP_4E09): Make cpfg properly trace the input flags.
301 (op_types): Add OP_FLAG_OUTPUT.
302 (trace_{input,output}): Support OP_FLAG_OUTPUT.
303 (OP_31000000): This ld2w varient is a 16-bit memory reference, not
304 an 8-bit memory reference instruction for tracing purposes.
305 (OP_201): Addi needs to set the carry.
309 * simops.c (OP_2600, OP_2601): Changed min and max comparisons
310 to use signed register values.
314 * d10v_sim.h (DEBUG_*): Add bit flags for controlling debug
316 (_ins_type): New enumeration to specify which container an
317 instruction is in, and whether it is part of a parallel operation.
318 (_state): Add ins_type field.
319 ({,u}int{8,16,32,64}): Use limits.h to size the appropriate types.
320 (ins_type_counters): Counters for the various instruction types.
321 ({left,right}_nops): Counters for the number of nops in each
323 (d10v_debug): New variable to indicate whether debugging is turned
326 * simops.c: (all functions): Change all #ifdef DEBUG code so that
327 the input and output values can be traced, along with the
328 instruction type. Make the -t option enable tracing.
329 (all functions): Change printf calls to use the printf_filtered
330 function in the callback table.
332 * interp.c (_leftright): New enumeration to say whether 2 short
333 instructions are done left first or right first.
334 (do_{long,2_short,parallel}): Indicate in the machine state which
335 type of instruction this is. Count each of the types of
336 instructions executed.
337 (sim_size): Only print the memory sizes if DEBUG_MEMSIZE debug
339 (sim_resume): Pass left/right indication to do_2_short.
340 (all functions): Change printf calls to use the printf_filtered
341 function in the callback table.
342 (sim_trace): Turn on debug flag if DEBUG was defined, and call
344 (sim_info): Print out statistics on instructions.
345 (sim_{trace,create_inferior}): Eliminate extraneous output unless
347 (sim_open): If args == -t and DEBUG was defined, set d10v_debug.
348 Only initialize the hash table the first time sim_open is called.
350 * Makefile.in: Make objects depend on d10v_sim.h.
351 ({,SIM_}CFLAGS): Include configure dependent switches. Setting
352 CFLAGS does not override host/target defines or SIM_CFLAGS.
353 (CC_FOR_BUILD,gencode): Use CC_FOR_BUILD to compile gencode.
354 (run): By default, the math library is not needed to be linked
356 ({BFD,LIBIBERTY}_LIB): Define as variables so they can be
358 (VPATH): Don't set to anything but @srcdir@ to work with non-GNU
360 ({run,callback}.o): Provide explicit paths to their appropriate
362 (gencode{,.o},d10v-opc.o): Split compilation into creating object
363 and linking. Instead of linking in libopcodes.a, just compile
364 d10v-opc.o directly to handle canadian cross.
365 (CSEARCH): Add opcodes directory.
367 * configure.in (--enable-sim-cflags): New switch to allow user to
369 (CC_FOR_BUILD): Deal with canadian crosses.
370 * configure: Regenerate.
374 * simops.c: Include correct syscall.h for d10v, not host's.
379 * simops.c (OP_5F00): Wrap all SYS_xxx traps with #ifdef.
380 Add trap 2 to be printf and trap 3 to be putchar.
384 * Makefile.in, d10v_sim.h, interp.c, simops.c: Add support
385 for low-level system calls.
389 * Makefile.in, d10v_sim.h, interp.c: Fix byte-order problems.
393 * d10v_sim.h (SEXT32): Added.
394 * interp.c: Commented out printfs.
395 * simops.c: Fixed error in sb and st2w.
399 * Makefile.in, d10v_sim.h, interp.c, simops.c: Added remaining
400 DSP instructions. Added modulo addressing.
404 * Makefile.in, d10v_sim.h, interp.c, simops.c: Snapshot.
408 * d10v_sim.h, simops.c: Snapshot.
412 * ChangeLog, Makefile.in, configure, configure.in, d10v_sim.h,
413 gencode.c, interp.c, simops.c: Created.