4 * config/tc-ppc.c (ppc_elf_cons): Clear frag contents.
8 * as.c (create_obj_attrs_section): Remove unused variable addr.
9 * listing.c (listing_listing): Remove unused variable message.
10 * read.c: Remove unnecessary register type qualifiers.
11 (s_mri): Only define/use old_flag variable if MRI_MODE_CHANGE is
16 * config/tc-avr.c (mcu_types): Add support for atmega16a, atmega168a,
17 atmega164a, atmega165a, atmega169a, atmega169pa, atmega16hva2,
18 atmega324a, atmega324pa, atmega325a, atmega3250a, atmega328,
19 atmega329a, atmega329pa, atmega3290a, atmega48a, atmega644a,
20 atmega645a, atmega645p, atmega6450a, atmega6450p, atmega649a,
21 atmega649p, atmega6490a, atmega6490p, atmega64hve, atmega88a,
22 atmega88pa, attiny461a, attiny84a, m3000.
23 Remove support for atmega8m1, atmega8c1, atmega16c1, atmega4hvd,
24 atmega8hvd, attiny327, m3000f, m3000s, m3001b.
25 * doc/c-avr.texi: Same.
29 * config/tc-arm.c (make_mapping_symbol): Handle the case
30 that multiple mapping symbols have the same value 0.
34 * configure: Regenerate.
38 * po/ru.po: New Russian translation.
39 * configure.in (ALL_LINGUAS): Add ru.
40 * configure: Regenerate.
45 * input-scrub.c (input_scrub_next_buffer): Use memmove instead
46 of memcpy to copy overlap memory.
50 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c.
51 (TARGET_CPU_HFILES): Add config/tc-tic6x.h.
52 * Makefile.in: Regenerate.
53 * NEWS: Add news entry for TI C6X support.
54 * app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle
55 TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in
56 operands if TC_KEEP_OPERAND_SPACES.
57 * configure.tgt (tic6x-*-*): New.
58 * config/tc-ia64.h (TC_PREDICATE_START_CHAR,
59 TC_PREDICATE_END_CHAR): Define.
60 * config/tc-tic6x.c, config/tc-tic6x.h: New.
61 * doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi.
62 * doc/Makefile.in: Regenerate.
63 * doc/all.texi (TIC6X): Define.
64 * doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi.
65 * doc/c-tic6x.texi: New.
69 * config/tc-i386.c (lex_got): Use STRING_COMMA_LEN on gotrel.
73 * config/tc-i386.c (i386_error): Replace oprand_size_mismatch
74 with operand_size_mismatch.
75 (operand_size_match): Updated.
76 (match_template): Likewise.
80 * config/tc-i386.c (i386_error): New.
81 (_i386_insn): Replace err_msg with error.
82 (operand_size_match): Set error instead of err_msg on failure.
83 (operand_type_match): Likewise.
84 (operand_type_register_match): Likewise.
85 (VEX_check_operands): Likewise.
86 (match_template): Likewise. Use error instead of err_msg with
91 * config/tc-arm.c (make_mapping_symbol): Hanle the case
92 that two mapping symbols have the same value.
96 * doc/c-arm.texi (.setfp): Correct example.
101 * config/tc-arm.c (reloc_names): New relocation names.
102 (md_apply_fix): New case for BFD_RELOC_ARM_GOT_PREL.
103 (tc_gen_reloc): New case for BFD_RELOC_ARM_GOT_PREL.
104 * doc/c-arm.texi (ARM-Relocations): Document the new relocation.
108 * dw2gencfi.c (output_cie): Consider emitting the S augmentation in all
109 cases, and not only for .eh_frame.
111 * dw2gencfi.c (output_cie): Make it more explicit which code paths
112 belong to .eh_frame only.
116 * config/tc-v850.c (v850_insert_operand): Handle out-of-range
117 assembler constants on 64-bit hosts.
121 * bfin-defs.h, bfin-lex.l, bfin-parse.y, tc-bfin.c, tc-bfin.h:
122 Strip trailing whitespace.
126 * doc/c-bfin.texi (-mcpu): Add bf504 and bf506.
127 * config/tc-bfin.c (bfin_cpu_type): Add BFIN_CPU_BF504 and
129 (bfin_cpus[]): Add 0.0 for bf504 and bf506.
133 * doc/as.texinfo: Add Blackfin options.
134 * doc/c-bfin.texi: Document -mfdpic, -mno-fdpic and -mnopic.
135 * config/tc-bfin.c (md_show_usage): Show usage for all
136 Blackfin specific options.
141 * listing.c (listing_newline): Correct backslash quote logic.
145 * config/tc-i386.h [TE_SOLARIS] (ELF_TARGET_FORMAT): Define.
146 (ELF_TARGET_FORMAT64): Define.
150 * config/tc-arm.c (arm_cpu_option_table): Add cortex-m4.
154 * config/tc-sh.c (get_specific): Move overflow checking code to avoid
155 reading uninitialized data.
159 * config/tc-score7.c (s7_frag_check): Add ATTRIBUTE_UNUSED.
163 * configure.tgt: Fix mep cpu case.
167 * config/tc-arm.c (do_t_strexd): Remove
168 operand[1] != operand[2] contraint.
172 * config/tc-arm.c (neon_select_shape): No need to match
173 the remaining operands in the shape when one operand does
178 * config/tc-arm.c (do_neon_ld_st_interleave): Reject bad
183 * cgen.c: Whitespace fixes.
184 (weak_operand_overflow_check): Formatting fix.
188 * config/tc-i386.c (match_template): Update error messages.
192 * config/tc-i386.c (_i386_insn): Add err_msg.
193 (operand_size_match): Set err_msg on failure.
194 (operand_type_match): Likewise.
195 (operand_type_register_match): Likewise.
196 (VEX_check_operands): Likewise.
197 (match_template): Likewise. Use i.err_msg with as_bad.
201 * config/tc-mips.c (mips_fix_loongson2f, mips_fix_loongson2f_nop,
202 mips_fix_loongson2f_jump): New variables.
203 (md_longopts): Add New options -mfix-loongson2f-nop/jump,
204 -mno-fix-loongson2f-nop/jump.
205 (md_parse_option): Initialize variables via above options.
206 (options): New enums for the above options.
207 (md_begin): Initialize nop_insn from LOONGSON2F_NOP_INSN.
208 (fix_loongson2f, fix_loongson2f_nop, fix_loongson2f_jump):
210 (append_insn): call fix_loongson2f().
211 (mips_handle_align): Replace the implicit nops.
212 * config/tc-mips.h (MAX_MEM_FOR_RS_ALIGN_CODE): Modified
213 for the new mips_handle_align().
214 * doc/c-mips.texi: Document the new options.
218 * config/tc-arm.c (do_rd_rm_rn): Added warning
224 * config/tc-avr.c (md_apply_fix): Handle BFD_RELOC_8.
225 (avr_cons_fix_new): Handle fixups of a single byte.
230 * config/tc-arm.c (CPU_DEFAULT): Do not define based upon build
231 compiler's predefines.
235 * configure.tgt: Whiltespace. Sort moxie entry.
239 * config/tc-arm.c (arm_convert_symbolic_attribute): Add Tag_DIV_use.
240 * doc/c-arm.texi: Likewise.
244 * config/tc-arm.c (asm_opcode): operands type
246 (BAD_PC_ADDRESSING): New macro message.
247 (BAD_PC_WRITEBACK): Likewise.
248 (MIX_ARM_THUMB_OPERANDS): New macro.
249 (operand_parse_code): Added enum values.
250 (parse_operands): Added thumb/arm distinction,
251 plus new enum values handling.
252 (encode_arm_addr_mode_2): Validations enhanced.
253 (encode_arm_addr_mode_3): Likewise.
254 (do_rm_rd_rn): Likewise.
255 (encode_thumb32_addr_mode): Likewise.
256 (do_t_ldrex): Likewise.
257 (do_t_ldst): Likewise.
258 (do_t_strex): Likewise.
259 (md_assemble): Call parse_operands with
267 (insns): Updated insns operands.
272 * config/tc-ia64.c (enum reloc_func): Add FUNC_SLOTCOUNT_RELOC.
273 (DUMMY_RELOC_IA64_SLOTCOUNT): Added.
274 (pseudo_func): Add an entry for slotcount.
275 (md_begin): Initialize slotcount pseudo symbol.
276 (ia64_parse_name): Handle @slotcount parameter.
277 (ia64_gen_real_reloc_type): Handle slotcount.
278 (md_apply_fix): Ditto.
279 * doc/c-ia64.texi (IA-64-Relocs): Document @slotcount.
283 * config/tc-xtensa.c (istack_init): Don't call memset.
287 * config/tc-xtensa.c (cache_literal_section): Handle prefixes as
292 * config/tc-xtensa.c (xtensa_find_unaligned_loops): Rewrite.
296 * config/tc-i386.c (build_modrm_byte): Reformat.
300 * config/tc-i386.c: Update copyright.
305 * config/tc-i386.c (vec_imm4) New operand type.
307 (VEX_check_operands): New.
308 (check_reverse): Call VEX_check_operands.
309 (build_modrm_byte): Reintroduce code for 5
310 operand insns. Fix whitespace.
314 * config/tc-ppc.c (md_show_usage): Add -mpwr4, -mpwr5, -mpwr5x,
319 * config/tc-xtensa.c (RELAXED_LOOP_INSN_BYTES): New.
320 (next_frag_pre_opcode_bytes): Use RELAXED_LOOP_INSN_BYTES.
321 (xtensa_mark_zcl_first_insns): Rewrite to handle corner case.
325 * config/tc-arm.c (md_pcrel_from_section): Keep base to zero for
326 non-local branches (BFD_RELOC_THUMB_PCREL_BRANCH23,
327 BFD_RELOC_THUMB_PCREL_BLX, BFD_RELOC_ARM_PCREL_BLX,
328 BFD_RELOC_ARM_PCREL_CALL)
332 * config/tc-xtensa.c (frag_format_size): Generalize logic to
333 handle more instruction sizes and fetch widths.
334 (branch_align_power): Likewise.
335 (text_align_power): Likewise.
336 (bytes_to_stretch): Likewise.
340 * config/tc-ppc.c (md_show_usage): Mention -mtitan. Don't use tabs.
341 (ppc_mach): Handle titan.
342 * doc/c-ppc.texi: Mention -mtitan.
346 * config/tc-xtensa.c (UNREACHABLE_MAX_WIDTH): Delete and
348 (xtensa_fetch_width) ...this.
352 * Makefile.am (CPU_TYPES, OBJ_FORMATS, CPU_OBJ_VALID,
353 MULTI_CPU_TYPES, MULTI_CPU_OBJ_VALID): Remove.
354 * Makefile.in: Regenerate.
358 * config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1.
359 (i386_align_code): Rename PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1.
360 * config/tc-i386.h (processor_type): Same.
361 * doc/c-i386.texi: Change amdfam15 to bdver1.
366 * config/tc-arm.c (neon_check_type): Handle a neon_shape value of
371 * NEWS: Mention new feature.
372 * config/obj-coff.c (obj_coff_section): Accept digits and use
373 to override default section alignment power if specified.
374 * doc/as.texinfo (.section directive): Update documentation.
378 * config/tc-i386.c (avxscalar): New.
379 (OPTION_MAVXSCALAR): Likewise.
380 (build_vex_prefix): Select vector_length for scalar instructions
382 (md_longopts): Add OPTION_MAVXSCALAR.
383 (md_parse_option): Handle OPTION_MAVXSCALAR.
384 (md_show_usage): Add -mavxscalar=.
386 * doc/c-i386.texi: Document -mavxscalar=.
390 * config/tc-i386.c (build_vex_prefix): Set i.vex.bytes[0] to
395 * write.h (fix_at_start): Declare.
396 * write.c (fix_new_internal): Add at_beginning parameter.
397 Use it instead of REVERSE_SORT_RELOCS. Fix the handling of
398 seg_fix_tailP for the at_beginning/REVERSE_SORT_RELOCS case.
399 (fix_new, fix_new_exp): Update accordingly.
400 (fix_at_start): New function.
401 * config/tc-ppc.c (md_pseudo_table): Add .ref to the OBJ_XCOFF section.
402 (ppc_ref): New function, for OBJ_XCOFF.
403 (md_apply_fix): Handle BFD_RELOC_NONE for OBJ_XCOFF.
404 * config/te-i386aix.h (REVERSE_SORT_RELOCS): Remove #undef.
408 * config/te-solaris.h (DWARF2_EH_FRAME_READ_ONLY): Make read-only
409 on 64-bit Solaris/x86.
410 Include obj-format.h earlier.
414 * config/tc-s390.c (s390_elf_final_processing): New function.
415 * config/tc-s390.h (elf_tc_final_processing): New macro definition.
416 (s390_elf_final_processing): Added prototype.
422 * config/tc-arm.c (do_neon_cvt): Rename to do_neon_cvt_1. Add
423 code to handle round-to-zero for VCVT conversions.
424 (do_neon_cvt): New. Call do_neon_cvt_1.
425 (do_neon_cvtr): New. Call do_neon_cvt_1.
426 (insns): Use do_neon_cvt for VCVT insn and do_neon_cvtr for VCVTR
431 * config/tc-ia64.c (ia64_vms_note): Generate 24 bytes note headers.
435 * config/tc-i386.c (md_assemble): Before accessing the IMM field
436 check that it's not an XOP insn.
440 * config/bfin-aux.h: Remove argument names in function
442 * config/bfin-lex.l (parse_int): Fix shadowed variable name
444 * config/bfin-parse.y (value_match): Remove argument names
446 (notethat): Likewise.
451 * config/tc-arm.c (do_t_nop): Correct check for Thumb-2 NOP.
455 * config/tc-h8300.c (h8300_elf_section): New function - issue a
456 warning message if a new section is created without setting any
458 (md_pseudo_table): Intercept section creation pseudos.
459 (md_pcrel_from): Replace abort with an error message.
460 * config/obj-elf.c (obj_elf_section_name): Export this function.
461 * config/obj-elf.h (obj_elf_section_name): Prototype.
466 * listing.c (print_source): Add one to line number.
470 * Makefile.in: Regenerate.
471 * configure: Regenerate.
472 * doc/Makefile.in: Regenerate.
476 * version.c (parse_args): Change to "Copyright 2010".
480 * config/tc-i386.c (cpu_arch): Add amdfam15.
481 (i386_align_code): Add PROCESSOR_AMDFAM15 cases.
482 * config/tc-i386.h (processor_type): Add PROCESSOR_AMDFAM15.
483 * doc/c-i386.texi: Add amdfam15.
487 * config/tc-arm.c (do_neon_logic): Accept imm value
488 in the third operand too.
489 (operand_parse_code): OP_RNDQ_IMVNb renamed to
491 (parse_operands): OP_NILO case removed, applied renaming.
492 (insns): Neon shape changed for some logic instructions.
496 * config/tc-arm.c (do_neon_ldx_stx): Added
497 validation for vector load/store insns.
501 * config/tc-ppc.c (md_show_usage): Document -me500mc64.
505 * config/tc-arm.c (struct arm_it): New flag 'is_neon'.
506 (NEON_ENC_*): Macros renamed to _NEON_ENC_*.
507 (NEON_ENCODE): New macro.
508 (check_neon_suffixes): New macro.
509 (do_vfp_cond_or_thumb): Set the 'is_neon' flag.
510 (do_vfp_nsyn_opcode): Likewise.
511 (do_vfp_nsyn_nmul): Use the new 'NEON_ENCODE' macro.
512 (do_vfp_nsyn_cmp): Likewise.
513 (do_neon_shl_imm): Likewise.
514 (do_neon_qshl_imm): Likewise.
515 (neon_dyadic_misc): Likewise.
516 (do_neon_mac_maybe_scalar): Likewise.
517 (do_neon_qdmulh): Likewise.
518 (do_neon_qmovn): Likewise.
519 (do_neon_qmovun): Likewise.
520 (do_neon_movn): Likewise.
521 (neon_mac_reg_scalar_long): Likewise.
522 (do_neon_vmull): Likewise.
523 (do_neon_trn): Likewise.
524 (do_neon_ldx_stx): Likewise.
525 (neon_dp_fixup): Changed signature and set the flag.
526 (neon_three_same): Call the above with new signature.
527 (neon_two_same): Likewise.
528 (neon_imm_shift): Likewise.
529 (neon_mul_mac): Likewise.
530 (do_neon_abs_neg): Likewise.
531 (neon_mixed_length): Likewise.
532 (do_neon_ext): Likewise.
533 (do_neon_mov): Likewise.
534 (do_neon_tbl_tbx): Likewise.
535 (do_neon_logic): Likewise, and use the new 'NEON_ENCODE' macro.
536 (neon_compare): Likewise.
537 (do_neon_shll): Likewise.
538 (do_neon_cvt): Likewise.
539 (do_neon_mvn): Likewise.
540 (do_neon_dup): Likewise.
541 (md_assemble): Call check_neon_suffixes ().
543 For older changes see ChangeLog-2009
549 version-control: never