1 /* Target-dependent code for the i386.
3 Copyright (C) 2001-2014 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
29 /* GDB's i386 target supports both the 32-bit Intel Architecture
30 (IA-32) and the 64-bit AMD x86-64 architecture. Internally it uses
31 a similar register layout for both.
33 - General purpose registers
35 - FPU control registers
37 - SSE control register
39 The general purpose registers for the x86-64 architecture are quite
40 different from IA-32. Therefore, gdbarch_fp0_regnum
41 determines the register number at which the FPU data registers
42 start. The number of FPU data and control registers is the same
43 for both architectures. The number of SSE registers however,
44 differs and is determined by the num_xmm_regs member of `struct
47 /* Convention for returning structures. */
51 pcc_struct_return, /* Return "short" structures in memory. */
52 reg_struct_return /* Return "short" structures in registers. */
55 /* i386 architecture specific information. */
58 /* General-purpose registers. */
59 struct regset *gregset;
60 int *gregset_reg_offset;
62 size_t sizeof_gregset;
64 /* Floating-point registers. */
65 struct regset *fpregset;
66 size_t sizeof_fpregset;
68 /* XSAVE extended state. */
69 struct regset *xstateregset;
71 /* Register number for %st(0). The register numbers for the other
72 registers follow from this one. Set this to -1 to indicate the
76 /* Number of MMX registers. */
79 /* Register number for %mm0. Set this to -1 to indicate the absence
83 /* Number of pseudo YMM registers. */
86 /* Register number for %ymm0. Set this to -1 to indicate the absence
87 of pseudo YMM register support. */
90 /* Number of byte registers. */
93 /* Register pseudo number for %al. */
96 /* Number of pseudo word registers. */
99 /* Register number for %ax. */
102 /* Number of pseudo dword registers. */
105 /* Register number for %eax. Set this to -1 to indicate the absence
106 of pseudo dword register support. */
109 /* Number of core registers. */
112 /* Number of SSE registers. */
115 /* Bits of the extended control register 0 (the XFEATURE_ENABLED_MASK
116 register), excluding the x87 bit, which are supported by this GDB. */
120 /* Offset of XCR0 in XSAVE extended state. */
121 int xsave_xcr0_offset;
123 /* Register names. */
124 const char **register_names;
126 /* Register number for %ymm0h. Set this to -1 to indicate the absence
127 of upper YMM register support. */
130 /* Upper YMM register names. Only used for tdesc_numbered_register. */
131 const char **ymmh_register_names;
133 /* Register number for %bnd0r. Set this to -1 to indicate the absence
137 /* Register number for pseudo register %bnd0. Set this to -1 to indicate the absence
141 /* Register number for %bndcfgu. Set this to -1 to indicate the absence
142 bound control registers. */
145 /* MPX register names. Only used for tdesc_numbered_register. */
146 const char **mpx_register_names;
148 /* Target description. */
149 const struct target_desc *tdesc;
151 /* Register group function. */
152 const void *register_reggroup_p;
154 /* Offset of saved PC in jmp_buf. */
157 /* Convention for returning structures. */
158 enum struct_return struct_return;
160 /* Address range where sigtramp lives. */
161 CORE_ADDR sigtramp_start;
162 CORE_ADDR sigtramp_end;
164 /* Detect sigtramp. */
165 int (*sigtramp_p) (struct frame_info *);
167 /* Get address of sigcontext for sigtramp. */
168 CORE_ADDR (*sigcontext_addr) (struct frame_info *);
170 /* Offset of registers in `struct sigcontext'. */
174 /* Offset of saved PC and SP in `struct sigcontext'. Usage of these
175 is deprecated, please use `sc_reg_offset' instead. */
179 /* ISA-specific data types. */
180 struct type *i386_mmx_type;
181 struct type *i386_ymm_type;
182 struct type *i387_ext_type;
183 struct type *i386_bnd_type;
185 /* Process record/replay target. */
186 /* The map for registers because the AMD64's registers order
187 in GDB is not same as I386 instructions. */
188 const int *record_regmap;
189 /* Parse intx80 args. */
190 int (*i386_intx80_record) (struct regcache *regcache);
191 /* Parse sysenter args. */
192 int (*i386_sysenter_record) (struct regcache *regcache);
193 /* Parse syscall args. */
194 int (*i386_syscall_record) (struct regcache *regcache);
197 /* Floating-point registers. */
199 /* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit
200 (at most) in the FPU, but are zero-extended to 32 bits in GDB's
203 /* Return non-zero if REGNUM matches the FP register and the FP
204 register set is active. */
205 extern int i386_fp_regnum_p (struct gdbarch *, int);
206 extern int i386_fpc_regnum_p (struct gdbarch *, int);
208 /* Register numbers of various important registers. */
212 I386_EAX_REGNUM, /* %eax */
213 I386_ECX_REGNUM, /* %ecx */
214 I386_EDX_REGNUM, /* %edx */
215 I386_EBX_REGNUM, /* %ebx */
216 I386_ESP_REGNUM, /* %esp */
217 I386_EBP_REGNUM, /* %ebp */
218 I386_ESI_REGNUM, /* %esi */
219 I386_EDI_REGNUM, /* %edi */
220 I386_EIP_REGNUM, /* %eip */
221 I386_EFLAGS_REGNUM, /* %eflags */
222 I386_CS_REGNUM, /* %cs */
223 I386_SS_REGNUM, /* %ss */
224 I386_DS_REGNUM, /* %ds */
225 I386_ES_REGNUM, /* %es */
226 I386_FS_REGNUM, /* %fs */
227 I386_GS_REGNUM, /* %gs */
228 I386_ST0_REGNUM, /* %st(0) */
229 I386_MXCSR_REGNUM = 40, /* %mxcsr */
230 I386_YMM0H_REGNUM, /* %ymm0h */
231 I386_YMM7H_REGNUM = I386_YMM0H_REGNUM + 7,
233 I386_BND3R_REGNUM = I386_BND0R_REGNUM + 3,
235 I386_BNDSTATUS_REGNUM
238 /* Register numbers of RECORD_REGMAP. */
240 enum record_i386_regnum
242 X86_RECORD_REAX_REGNUM,
243 X86_RECORD_RECX_REGNUM,
244 X86_RECORD_REDX_REGNUM,
245 X86_RECORD_REBX_REGNUM,
246 X86_RECORD_RESP_REGNUM,
247 X86_RECORD_REBP_REGNUM,
248 X86_RECORD_RESI_REGNUM,
249 X86_RECORD_REDI_REGNUM,
250 X86_RECORD_R8_REGNUM,
251 X86_RECORD_R9_REGNUM,
252 X86_RECORD_R10_REGNUM,
253 X86_RECORD_R11_REGNUM,
254 X86_RECORD_R12_REGNUM,
255 X86_RECORD_R13_REGNUM,
256 X86_RECORD_R14_REGNUM,
257 X86_RECORD_R15_REGNUM,
258 X86_RECORD_REIP_REGNUM,
259 X86_RECORD_EFLAGS_REGNUM,
260 X86_RECORD_CS_REGNUM,
261 X86_RECORD_SS_REGNUM,
262 X86_RECORD_DS_REGNUM,
263 X86_RECORD_ES_REGNUM,
264 X86_RECORD_FS_REGNUM,
265 X86_RECORD_GS_REGNUM,
268 #define I386_NUM_GREGS 16
269 #define I386_NUM_XREGS 9
271 #define I386_SSE_NUM_REGS (I386_MXCSR_REGNUM + 1)
272 #define I386_AVX_NUM_REGS (I386_YMM7H_REGNUM + 1)
273 #define I386_MPX_NUM_REGS (I386_BNDSTATUS_REGNUM + 1)
275 /* Size of the largest register. */
276 #define I386_MAX_REGISTER_SIZE 16
278 /* Types for i386-specific registers. */
279 extern struct type *i387_ext_type (struct gdbarch *gdbarch);
281 /* Checks of different pseudo-registers. */
282 extern int i386_byte_regnum_p (struct gdbarch *gdbarch, int regnum);
283 extern int i386_word_regnum_p (struct gdbarch *gdbarch, int regnum);
284 extern int i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum);
285 extern int i386_xmm_regnum_p (struct gdbarch *gdbarch, int regnum);
286 extern int i386_ymm_regnum_p (struct gdbarch *gdbarch, int regnum);
287 extern int i386_bnd_regnum_p (struct gdbarch *gdbarch, int regnum);
289 extern const char *i386_pseudo_register_name (struct gdbarch *gdbarch,
291 extern struct type *i386_pseudo_register_type (struct gdbarch *gdbarch,
294 extern void i386_pseudo_register_read_into_value (struct gdbarch *gdbarch,
295 struct regcache *regcache,
297 struct value *result);
299 extern void i386_pseudo_register_write (struct gdbarch *gdbarch,
300 struct regcache *regcache,
301 int regnum, const gdb_byte *buf);
303 /* Segment selectors. */
304 #define I386_SEL_RPL 0x0003 /* Requester's Privilege Level mask. */
305 #define I386_SEL_UPL 0x0003 /* User Privilige Level. */
306 #define I386_SEL_KPL 0x0000 /* Kernel Privilige Level. */
308 /* The length of the longest i386 instruction (according to
309 include/asm-i386/kprobes.h in Linux 2.6. */
310 #define I386_MAX_INSN_LEN (16)
312 /* Functions exported from i386-tdep.c. */
313 extern CORE_ADDR i386_pe_skip_trampoline_code (struct frame_info *frame,
314 CORE_ADDR pc, char *name);
315 extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch,
318 /* Return whether the THIS_FRAME corresponds to a sigtramp routine. */
319 extern int i386_sigtramp_p (struct frame_info *this_frame);
321 /* Return non-zero if REGNUM is a member of the specified group. */
322 extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
323 struct reggroup *group);
325 /* Supply register REGNUM from the general-purpose register set REGSET
326 to register cache REGCACHE. If REGNUM is -1, do this for all
327 registers in REGSET. */
328 extern void i386_supply_gregset (const struct regset *regset,
329 struct regcache *regcache, int regnum,
330 const void *gregs, size_t len);
332 /* Collect register REGNUM from the register cache REGCACHE and store
333 it in the buffer specified by GREGS and LEN as described by the
334 general-purpose register set REGSET. If REGNUM is -1, do this for
335 all registers in REGSET. */
336 extern void i386_collect_gregset (const struct regset *regset,
337 const struct regcache *regcache,
338 int regnum, void *gregs, size_t len);
340 /* Return the appropriate register set for the core section identified
341 by SECT_NAME and SECT_SIZE. */
342 extern const struct regset *
343 i386_regset_from_core_section (struct gdbarch *gdbarch,
344 const char *sect_name, size_t sect_size);
347 extern struct displaced_step_closure *i386_displaced_step_copy_insn
348 (struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to,
349 struct regcache *regs);
350 extern void i386_displaced_step_fixup (struct gdbarch *gdbarch,
351 struct displaced_step_closure *closure,
352 CORE_ADDR from, CORE_ADDR to,
353 struct regcache *regs);
355 /* Initialize a basic ELF architecture variant. */
356 extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);
358 /* Initialize a SVR4 architecture variant. */
359 extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);
361 extern int i386_process_record (struct gdbarch *gdbarch,
362 struct regcache *regcache, CORE_ADDR addr);
366 /* Functions and variables exported from i386bsd-tdep.c. */
368 extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
369 extern CORE_ADDR i386fbsd_sigtramp_start_addr;
370 extern CORE_ADDR i386fbsd_sigtramp_end_addr;
371 extern CORE_ADDR i386obsd_sigtramp_start_addr;
372 extern CORE_ADDR i386obsd_sigtramp_end_addr;
373 extern int i386fbsd4_sc_reg_offset[];
374 extern int i386fbsd_sc_reg_offset[];
375 extern int i386nbsd_sc_reg_offset[];
376 extern int i386obsd_sc_reg_offset[];
377 extern int i386bsd_sc_reg_offset[];
379 /* SystemTap related functions. */
381 extern int i386_stap_is_single_operand (struct gdbarch *gdbarch,
384 extern int i386_stap_parse_special_token (struct gdbarch *gdbarch,
385 struct stap_parse_info *p);
387 #endif /* i386-tdep.h */