3 * riscv-opc.c (riscv_opcodes): Add sext.[bh] and zext.[bhw].
7 * disassemble.h (riscv_get_disassembler): Declare.
8 * disassemble.c (disassembler): Changed to riscv_get_disassembler.
9 * riscv-dis.c (riscv_get_disassembler): Check the elf privileged spec
10 attributes before calling print_insn_riscv.
11 (parse_riscv_dis_option): Same as the assembler, the priority of elf
12 attributes are higher than the options. If we find the privileged
13 attributes, but the -Mpriv-spec= is different, then output error/warning
14 and still use the elf attributes set.
18 * riscv-opc.c (riscv_opcodes): Control fence.i and csr instructions by
23 * s390-opc.txt: Add risbgz and risbgnz.
24 * s390-opc.c (U6_26): New operand type.
25 (INSTR_RIE_RRUUU2, MASK_RIE_RRUUU2): New instruction format and
30 * s390-opc.txt: Add extended mnemonics.
34 * riscv-opc.c (riscv_ext_version_table): Remove the p, v, n
39 * riscv-opc.c (riscv_ext_version_table): Add zifencei.
43 * i386-dis.c (print_insn): Set active_seg_prefix for branch hint insns
44 to not dump branch hint prefixes 0x2E and 0x3E as unused prefixes.
48 * aarch64-tbl.h (FLAGM): Handle for FLAGM feature.
49 (struct aarch64_opcode): Move FLAGM instructions from V8_4_INSN to
51 (AARCH64_FEATURE_FLAGMANIP): Update comment for FEAT_FlagM2.
55 * i386-dis.c (ckprefix): Do not assign active_seg_prefix in
56 64-bit addressing mode.
57 (NOTRACK_Fixup): Test prefixes for PREFIX_DS, instead of
62 * aarch64-tbl.h: Enable -march=armv8.6-a+ls64.
66 * pru-opc.c: Add opcode description for LMBD (left-most bit
71 * aarch64-opc.c: Add ACCDATA_EL1 system register
75 * aarch64-opc.c (aarch64_print_operand): Support operand AARCH64_OPND_Rt_LS64
77 * aarch64-tbl.h (struct aarch64_opcode): Update _LS64_INSN instructions with
79 * aarch64-asm-2.c: Regenerated.
80 * aarch64-dis-2.c: Regenerated.
81 * aarch64-opc-2.c: Regenerated.
85 * aarch64-tbl.h (PAC): Handle for PAC feature.
86 (PAC_INSN): New PAC instruction.
87 (struct aarch64_opcode): Move PAC instructions from V8_3_INSN to
92 * aarch64-opc.c: Add RAS 1.1 new system registers: ERXPFGCTL_EL1,
93 ERXPFGCDN_EL1, ERXMISC2_EL1, ERXMISC3_EL1 and ERXPFGF_EL1.
97 * aarch64-tbl.h (QL_X2NIL): New qualifier for 64-byte stores.
98 (LS64): Handler with +ls64 feature flags.
99 (_LS64_INSN): New instruction group macro.
100 (struct aarch64_opcode): Add LS64 instructions.
101 * aarch64-asm-2.c: Regenerated.
102 * aarch64-dis-2.c: Regenerated.
103 * aarch64-opc-2.c: Regenerated.
107 * aarch65-tbl.h (struct aarch64_opcode): New instruction WFIT.
108 * aarch64-asm-2.c: Regenerated.
109 * aarch64-dis-2.c: Regenerated.
110 * aarch64-opc-2.c: Regenerated.
114 * aarch64-opc.c (aarch64_print_operand): CSR PDEC operand print-out.
115 * aarch64-tbl.h (CSRE): New CSRE feature handler.
116 (_CSRE_INSN): New CSRE instruction type.
117 (struct aarch64_opcode): New 'csre' entry for a CSRE CLI feature.
118 * aarch64-asm-2.c: Regenerated.
119 * aarch64-dis-2.c: Regenerated.
120 * aarch64-opc-2.c: Regenerated.
124 * aarch64-tbl.h (struct aarch64_opcode): Add new WFET instruction encoding
125 and operand description.
126 * aarch64-asm-2.c: Regenerated.
127 * aarch64-dis-2.c: Regenerated.
128 * aarch64-opc-2.c: Regenerated.
132 * csky-opc.h (csky_v2_opcodes): Change plsl.u16 to plsl.16.
136 * csky-dis.c (csky_output_operand): Add handler for
137 OPRND_TYPE_IMM5b_VSH and OPRND_TYPE_VREG_WITH_INDEX.
138 * csky-opc.h (OPRND_TYPE_VREG_WITH_INDEX): New enum.
139 (OPRND_TYPE_IMM5b_VSH): New enum. (csky_v2_opcodes): Fix and add
140 some instructions for VDSPV1.
144 * i386-dis.c: Change "XV" to print "{vex}" pseudo prefix.
148 * aarch64-asm.c (aarch64_ins_barrier_dsb_nxs): New inserter.
149 * aarch64-asm.h (AARCH64_DECL_OPD_INSERTER): New inserter
151 * aarch64-dis.c (aarch64_ext_barrier_dsb_nxs): New extractor.
152 * aarch64-dis.h (AARCH64_DECL_OPD_EXTRACTOR): New extractor
154 * aarch64-opc.c (aarch64_print_operand): New options table
155 aarch64_barrier_dsb_nxs_options.
156 * aarch64-opc.h (enum aarch64_field_kind): New field name FLD_CRm_dsb_nxs.
157 * aarch64-tbl.h (struct aarch64_opcode): Define DSB nXS barrier
158 Armv8.7-a instruction.
159 * aarch64-asm-2.c: Regenerated.
160 * aarch64-dis-2.c: Regenerated.
161 * aarch64-opc-2.c: Regenerated.
165 * po/es.po: Remove the duplicated entry.
169 * po/es.po: Fix printf format.
173 * i386-dis.c (rm_table): Add tlbsync, snp, invlpgb.
174 * i386-gen.c (cpu_flag_init): Add new CPU_INVLPGB_FLAGS,
175 CPU_TLBSYNC_FLAGS, and CPU_SNP_FLAGS.
176 Add CPU_ZNVER3_FLAGS.
177 (cpu_flags): Add CpuINVLPGB, CpuTLBSYNC, CpuSNP.
178 * i386-opc.h: Add CpuINVLPGB, CpuTLBSYNC, CpuSNP.
179 * i386-opc.tbl: Add invlpgb, tlbsync, psmash, pvalidate,
180 rmpupdate, rmpadjust.
181 * i386-init.h: Re-generated.
182 * i386-tbl.h: Re-generated.
186 * i386-opc.tbl: Rename CpuVEX_PREFIX to PseudoVexPrefix
187 and move it from cpu_flags to opcode_modifiers.
188 Use VexW0 and VexVVVV in the AVX-VNNI instructions.
189 * i386-gen.c: Likewise.
190 * i386-opc.h: Likewise.
191 * i386-opc.h: Likewise.
192 * i386-init.h: Regenerated.
193 * i386-tbl.h: Likewise.
197 * aarch64-tbl.h (ARMV8_7): New macro.
202 * i386-dis.c (PREFIX_VEX_0F3850): New.
203 (PREFIX_VEX_0F3851): Likewise.
204 (PREFIX_VEX_0F3852): Likewise.
205 (PREFIX_VEX_0F3853): Likewise.
206 (VEX_W_0F3850_P_2): Likewise.
207 (VEX_W_0F3851_P_2): Likewise.
208 (VEX_W_0F3852_P_2): Likewise.
209 (VEX_W_0F3853_P_2): Likewise.
210 (prefix_table): Add PREFIX_VEX_0F3850, PREFIX_VEX_0F3851,
211 PREFIX_VEX_0F3852 and PREFIX_VEX_0F3853.
212 (vex_table): Add VEX_W_0F3850_P_2, VEX_W_0F3851_P_2,
213 VEX_W_0F3852_P_2 and VEX_W_0F3853_P_2.
214 (putop): Add support for "XV" to print "{vex3}" pseudo prefix.
215 * i386-gen.c (cpu_flag_init): Clear the CpuAVX_VNNI bit in
216 CPU_UNKNOWN_FLAGS. Add CPU_AVX_VNNI_FLAGS and
217 CPU_ANY_AVX_VNNI_FLAGS.
218 (cpu_flags): Add CpuAVX_VNNI and CpuVEX_PREFIX.
219 * i386-opc.h (CpuAVX_VNNI): New.
220 (CpuVEX_PREFIX): Likewise.
221 (i386_cpu_flags): Add cpuavx_vnni and cpuvex_prefix.
222 * i386-opc.tbl: Add Intel AVX VNNI instructions.
223 * i386-init.h: Regenerated.
224 * i386-tbl.h: Likewise.
229 * i386-dis.c (PREFIX_0F3A0F): New.
230 (MOD_0F3A0F_PREFIX_1): Likewise.
231 (REG_0F3A0F_PREFIX_1_MOD_3): Likewise.
232 (RM_0F3A0F_P_1_MOD_3_REG_0): Likewise.
233 (prefix_table): Add PREFIX_0F3A0F.
234 (mod_table): Add MOD_0F3A0F_PREFIX_1.
235 (reg_table): Add REG_0F3A0F_PREFIX_1_MOD_3.
236 (rm_table): Add RM_0F3A0F_P_1_MOD_3_REG_0.
237 * i386-gen.c (cpu_flag_init): Add HRESET_FLAGS,
238 CPU_ANY_HRESET_FLAGS.
239 (cpu_flags): Add CpuHRESET.
240 (output_i386_opcode): Allow 4 byte base_opcode.
241 * i386-opc.h (enum): Add CpuHRESET.
242 (i386_cpu_flags): Add cpuhreset.
243 * i386-opc.tbl: Add Intel HRESET instruction.
244 * i386-init.h: Regenerate.
245 * i386-tbl.h: Likewise.
249 * i386-dis.c (enum): Add
250 PREFIX_MOD_3_0F01_REG_5_RM_4,
251 PREFIX_MOD_3_0F01_REG_5_RM_5,
252 PREFIX_MOD_3_0F01_REG_5_RM_6,
253 PREFIX_MOD_3_0F01_REG_5_RM_7,
254 X86_64_0F01_REG_5_MOD_3_RM_4_PREFIX_1,
255 X86_64_0F01_REG_5_MOD_3_RM_5_PREFIX_1,
256 X86_64_0F01_REG_5_MOD_3_RM_6_PREFIX_1,
257 X86_64_0F01_REG_5_MOD_3_RM_7_PREFIX_1,
258 X86_64_0FC7_REG_6_MOD_3_PREFIX_1.
259 (prefix_table): New instructions (see prefixes above).
261 * i386-gen.c (cpu_flag_init): Add CPU_UINTR_FLAGS,
263 (cpu_flags): Add CpuUINTR.
264 * i386-opc.h (enum): Add CpuUINTR.
265 (i386_cpu_flags): Add cpuuintr.
266 * i386-opc.tbl: Add UINTR insns.
267 * i386-init.h: Regenerate.
268 * i386-tbl.h: Likewise.
272 * i386-gen.c (process_i386_opcode_modifier): Return 1 for
273 non-VEX/EVEX/prefix encoding.
274 (output_i386_opcode): Fail if non-VEX/EVEX/prefix base_opcode
276 * i386-opc.tbl: Replace the prefix byte in non-VEX/EVEX
277 base_opcode with PREFIX_0X66, PREFIX_0XF2 or PREFIX_0XF3.
278 * i386-tbl.h: Regenerated.
282 * i386-gen.c (opcode_modifiers): Replace VexOpcode with
284 * i386-opc.h (VexOpcode): Renamed to ...
285 (OpcodePrefix): This.
287 (PREFIX_0X66): Likewise.
288 (PREFIX_0XF2): Likewise.
289 (PREFIX_0XF3): Likewise.
290 * i386-opc.tbl (Prefix_0X66): New.
291 (Prefix_0XF2): Likewise.
292 (Prefix_0XF3): Likewise.
293 Replace VexOpcode= with OpcodePrefix=. Use Prefix_0X66 on xorpd.
294 Use Prefix_0XF3 on cvtdq2pd. Use Prefix_0XF2 on cvtpd2dq.
295 * i386-tbl.h: Regenerated.
299 * aarch64-opc.c: Add BRBE system registers.
303 * aarch64-opc.c: New CSRE system registers defined.
307 * cgen-asm.c: Fix spelling mistakes.
308 * cgen-dis.c: Fix spelling mistakes.
309 * tic30-dis.c: Fix spelling mistakes.
314 * i386-dis.c (putop): Always display suffix for %LQ in 64bit.
319 * i386-dis.c (print_insn): Clear modrm if not needed.
320 (putop): Check need_modrm for modrm.mod != 3. Don't check
321 need_modrm for modrm.mod == 3.
325 * aarch64-opc.c: Added ETMv4 system registers TRCACATRn, TRCACVRn,
326 TRCAUTHSTATUS, TRCAUXCTLR, TRCBBCTLR, TRCCCCTLR, TRCCIDCCTLR0, TRCCIDCCTLR1,
327 TRCCIDCVRn, TRCCIDR0, TRCCIDR1, TRCCIDR2, TRCCIDR3, TRCCLAIMCLR, TRCCLAIMSET,
328 TRCCNTCTLRn, TRCCNTRLDVRn, TRCCNTVRn, TRCCONFIGR, TRCDEVAFF0, TRCDEVAFF1,
329 TRCDEVARCH, TRCDEVID, TRCDEVTYPE, TRCDVCMRn, TRCDVCVRn, TRCEVENTCTL0R,
330 TRCEVENTCTL1R, TRCEXTINSELR, TRCIDR0, TRCIDR1, TRCIDR2, TRCIDR3, TRCIDR4,
331 TRCIDR5, TRCIDR6, TRCIDR7, TRCIDR8, TRCIDR9, TRCIDR10, TRCIDR11, TRCIDR12,
332 TRCIDR13, TRCIMSPEC0, TRCIMSPECn, TRCITCTRL, TRCLAR WOTRCLSR, TRCOSLAR
333 WOTRCOSLSR, TRCPDCR, TRCPDSR, TRCPIDR0, TRCPIDR1, TRCPIDR2, TRCPIDR3,
334 TRCPIDR4, TRCPIDR[5,6,7], TRCPRGCTLR, TRCP,CSELR, TRCQCTLR, TRCRSCTLRn,
335 TRCSEQEVRn, TRCSEQRSTEVR, TRCSEQSTR, TRCSSCCRn, TRCSSCSRn, TRCSSPCICRn,
336 TRCSTALLCTLR, TRCSTATR, TRCSYNCPR, TRCTRACEIDR, TRCTSCTLR, TRCVDARCCTLR,
337 TRCVDCTLR, TRCVDSACCTLR, TRCVICTLR, TRCVIIECTLR, TRCVIPCSSCTLR, TRCVISSCTLR,
338 TRCVMIDCCTLR0, TRCVMIDCCTLR1 and TRCVMIDCVRn.
342 * aarch64-opc.c: Add ETE system registers TRCEXTINSELR<0-3> and TRCRSR.
346 * aarch64-opc.c: Add TRBE system registers TRBIDR_EL1 , TRBBASER_EL1 ,
347 TRBLIMITR_EL1 , TRBMAR_EL1 , TRBPTR_EL1, TRBSR_EL1 and TRBTRG_EL1.
351 * csky-opc.h: Formatting.
352 (GENERAL_REG_BANK): Correct spelling. Update use throughout file.
353 (get_register_name): Mask arch with CSKY_ARCH_MASK for shift,
355 (get_register_number): Likewise.
356 * csky-dis.c (get_gr_name, get_cr_name): Don't mask mach_flag.
361 * i386-dis.c (enum): Put MOD_VEX_0F38* together.
365 * csky-dis.c (csky_output_operand): Enclose body of if in curly
370 * i386-dis.c (enum): Add PREFIX_0F01_REG_1_RM_5,
371 PREFIX_0F01_REG_1_RM_6, PREFIX_0F01_REG_1_RM_7,
372 X86_64_0F01_REG_1_RM_5_P_2, X86_64_0F01_REG_1_RM_6_P_2,
373 X86_64_0F01_REG_1_RM_7_P_2.
374 (prefix_table): Likewise.
375 (x86_64_table): Likewise.
376 (rm_table): Likewise.
377 * i386-gen.c (cpu_flag_init): Add CPU_TDX_FLAGS
378 and CPU_ANY_TDX_FLAGS.
379 (cpu_flags): Add CpuTDX.
380 * i386-opc.h (enum): Add CpuTDX.
381 (i386_cpu_flags): Add cputdx.
382 * i386-opc.tbl: Add TDX insns.
383 * i386-init.h: Regenerate.
384 * i386-tbl.h: Likewise.
388 * csky-dis.c (using_abi): New.
389 (parse_csky_dis_options): New function.
390 (get_gr_name): New function.
391 (get_cr_name): New function.
392 (csky_output_operand): Use get_gr_name and get_cr_name to
393 disassemble and add handle of OPRND_TYPE_IMM5b_LS.
394 (print_insn_csky): Parse disassembler options.
395 * csky-opc.h (OPRND_TYPE_IMM5b_LS): New enum.
396 (GENARAL_REG_BANK): Define.
397 (REG_SUPPORT_ALL): Define.
398 (REG_SUPPORT_ALL): New.
400 (REG_SUPPORT_A): Define.
401 (REG_SUPPORT_B): Define.
402 (REG_SUPPORT_C): Define.
403 (REG_SUPPORT_D): Define.
404 (REG_SUPPORT_E): Define.
405 (csky_abiv1_general_regs): New.
406 (csky_abiv1_control_regs): New.
407 (csky_abiv2_general_regs): New.
408 (csky_abiv2_control_regs): New.
409 (get_register_name): New function.
410 (get_register_number): New function.
411 (csky_get_general_reg_name): New function.
412 (csky_get_general_regno): New function.
413 (csky_get_control_reg_name): New function.
414 (csky_get_control_regno): New function.
415 (csky_v2_opcodes): Prefer two oprerans format for bclri and
416 bseti, strengthen the operands legality check of addc, zext
421 * i386-dis.c (enum): Add REG_0F38D8_PREFIX_1,
422 MOD_0F38FA_PREFIX_1, MOD_0F38FB_PREFIX_1,
423 MOD_0F38DC_PREFIX_1, MOD_0F38DD_PREFIX_1,
424 MOD_0F38DE_PREFIX_1, MOD_0F38DF_PREFIX_1,
425 PREFIX_0F38D8, PREFIX_0F38FA, PREFIX_0F38FB.
426 (reg_table): New instructions (see prefixes above).
427 (prefix_table): Likewise.
428 (three_byte_table): Likewise.
429 (mod_table): Likewise
430 * i386-gen.c (cpu_flag_init): Add CPU_KL_FLAGS, CPU_WIDE_KL_FLAGS,
431 CPU_ANY_KL_FLAGS and CPU_ANY_WIDE_KL_FLAGS.
432 (cpu_flags): Likewise.
433 (operand_type_init): Likewise.
434 * i386-opc.h (enum): Add CpuKL and CpuWide_KL.
435 (i386_cpu_flags): Add cpukl and cpuwide_kl.
436 * i386-opc.tbl: Add KL and WIDE_KL insns.
437 * i386-init.h: Regenerate.
438 * i386-tbl.h: Likewise.
442 * rx-dis.c (flag_names): Add missing comma.
443 (register_names, flag_names, double_register_names),
444 (double_register_high_names, double_register_low_names),
445 (double_control_register_names, double_condition_names): Remove
450 * bpf-desc.c: Regenerate.
451 * bpf-desc.h: Likewise.
452 * bpf-opc.c: Likewise.
453 * bpf-opc.h: Likewise.
457 * csky-dis.c (csky_get_disassembler): Don't return NULL when there
462 * ppc-dis.c (ppc_symbol_is_valid): Adjust elf_symbol_from invocation.
466 * ppc-dis.c (ppc_symbol_is_valid): New function. Returns false
467 for hidden, local, no-type symbols.
468 (disassemble_init_powerpc): Point the symbol_is_valid field in the
469 info structure at the new function.
473 * csky-opc.h (csky_v2_opcodes): Add L2Cache instructions.
474 * testsuite/gas/csky/cskyv2_ck860.d : Adjust to icache.iva
479 * csky-dis.c (csky_output_operand): Coerce the immediate values to
480 long before printing.
484 * csky-dis.c (csky_output_operand): Don't sprintf str to itself.
488 * csky-opc.h (csky_v2_opcodes): Change mvtc and mulsw's
493 * csky-dis.c (csky_output_operand): Add handlers for
494 OPRND_TYPE_HFLOAT_FMOVI, OPRND_TYPE_SFLOAT_FMOVI and
495 OPRND_TYPE_DFLOAT_FMOVI. Refine OPRND_TYPE_FREGLIST_DASH
496 to support FPUV3 instructions.
497 * csky-opc.h (enum operand_type): New enum OPRND_TYPE_IMM9b,
498 OPRND_TYPE_HFLOAT_FMOVI, OPRND_TYPE_SFLOAT_FMOVI and
499 OPRND_TYPE_DFLOAT_FMOVI.
500 (OPRND_MASK_4_5, OPRND_MASK_6, OPRND_MASK_6_7, OPRND_MASK_6_8,
501 OPRND_MASK_7, OPRND_MASK_7_8, OPRND_MASK_17_24,
502 OPRND_MASK_20, OPRND_MASK_20_21, OPRND_MASK_20_22,
503 OPRND_MASK_20_23, OPRND_MASK_20_24, OPRND_MASK_20_25,
504 OPRND_MASK_0_3or5_8, OPRND_MASK_0_3or6_7, OPRND_MASK_0_3or25,
505 OPRND_MASK_0_4or21_24, OPRND_MASK_5or20_21,
506 OPRND_MASK_5or20_22, OPRND_MASK_5or20_23, OPRND_MASK_5or20_24,
507 OPRND_MASK_5or20_25, OPRND_MASK_8_9or21_25,
508 OPRND_MASK_8_9or16_25, OPRND_MASK_4_6or20, OPRND_MASK_5_7or20,
509 OPRND_MASK_4_5or20or25, OPRND_MASK_4_6or20or25,
510 OPRND_MASK_4_7or20or25, OPRND_MASK_6_9or17_24,
511 OPRND_MASK_6_7or20, OPRND_MASK_6or20, OPRND_MASK_7or20,
512 OPRND_MASK_5or8_9or16_25, OPRND_MASK_5or8_9or20_25): Define.
513 (csky_v2_opcodes): Add FPUV3 instructions.
517 * aarch64-dis.c (print_operands): Pass CPU features to
518 aarch64_print_operand().
519 * aarch64-opc.c (aarch64_print_operand): Use CPU features to determine
520 preferred disassembly of system registers.
521 (SR_RNG): Refactor to use new SR_FEAT2 macro.
527 (SR_EXPAND_ELx): New.
528 (SR_EXPAND_EL12): New.
529 (aarch64_sys_regs): Specify which registers are only on
530 A-profile, add R-profile system registers.
534 (aarch64_sys_ins_reg_supported_p): Reject EL3 registers for
539 * aarch64-tbl.h (aarch64_feature_v8_r): New.
542 (aarch64_opcode_table): Add dfb.
543 * aarch64-opc-2.c: Regenerate.
544 * aarch64-asm-2.c: Regenerate.
545 * aarch64-dis-2.c: Regenerate.
549 * aarch64-dis.c (arch_variant): New.
550 (determine_disassembling_preference): Disassemble according to
552 (select_aarch64_variant): New.
553 (print_insn_aarch64): Set feature set.
557 * v850-opc.c (insert_i5div1, insert_i5div2, insert_i5div3),
558 (insert_d5_4, insert_d8_6, insert_d8_7, insert_v8, insert_d9),
559 (insert_u16_loop, insert_d16_15, insert_d16_16, insert_d17_16),
560 (insert_d22, insert_d23, insert_d23_align1, insert_i9, insert_u9),
561 (insert_spe, insert_r4, insert_POS, insert_WIDTH, insert_SELID),
562 (insert_VECTOR8, insert_VECTOR5, insert_CACHEOP, insert_PREFOP),
563 (nsert_IMM10U, insert_SRSEL1, insert_SRSEL2): Use unsigned long
564 for value parameter and update code to suit.
565 (extract_d9, extract_d16_15, extract_d16_16, extract_d17_16),
566 (extract_d22, extract_d23, extract_i9): Use unsigned long variables.
570 * i386-dis.c (OP_E_memory): Don't cast to signed type when
572 (get32, get32s): Use unsigned types in shift expressions.
576 * csky-dis.c (print_insn_csky): Use unsigned type for "given".
580 * crx-dis.c: Whitespace.
581 (print_arg): Use unsigned type for longdisp and mask variables,
582 and for left shift constant.
586 * cgen-ibld.in (insert_normal, extract_normal): Use 1UL in left shift.
587 * bpf-ibld.c: Regenerate.
588 * epiphany-ibld.c: Regenerate.
589 * fr30-ibld.c: Regenerate.
590 * frv-ibld.c: Regenerate.
591 * ip2k-ibld.c: Regenerate.
592 * iq2000-ibld.c: Regenerate.
593 * lm32-ibld.c: Regenerate.
594 * m32c-ibld.c: Regenerate.
595 * m32r-ibld.c: Regenerate.
596 * mep-ibld.c: Regenerate.
597 * mt-ibld.c: Regenerate.
598 * or1k-ibld.c: Regenerate.
599 * xc16x-ibld.c: Regenerate.
600 * xstormy16-ibld.c: Regenerate.
604 * bfin-dis.c (MASKBITS): Use SIGNBIT.
608 * csky-opc.h (csky_v2_opcodes): Move divul and divsl
609 to CSKYV2_ISA_3E3R3 instruction set.
613 * csky-opc.h (csky_v2_opcodes): Fix Encode of mulsws.
617 * mep-ibld.c: Regenerate.
621 * csky-dis.c (csky_output_operand): Assign dis_info.value for
626 * cr16-dis.c: Formatting.
627 (parameter): Delete struct typedef. Use dwordU instead
629 (make_argument <arg_idxr>): Simplify detection of cbitb, sbitb
631 (make_argument <arg_cr>): Extract 20-bit field not 16-bit.
636 * csky-opc.h (MAX_OPRND_NUM): Define to 5.
637 (union csky_operand): Use MAX_OPRND_NUM to size oprnds array.
643 * cgen-ibld.in (insert_1): Use 1UL in forming mask.
644 (extract_normal): Likewise.
645 (insert_normal): Likewise, and move past zero length test.
646 (put_insn_int_value): Handle mask for zero length, use 1UL.
647 * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
648 * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
649 * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
650 * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
654 * csky-dis.c (CSKY_DEFAULT_ISA): Define.
655 (csky_dis_info): Add member isa.
656 (csky_find_inst_info): Skip instructions that do not belong to
658 (csky_get_disassembler): Get infomation from attribute section.
659 (print_insn_csky): Set defualt ISA flag.
660 * csky.h (CSKY_ISA_VDSP_2): Rename from CSKY_ISA_VDSP_V2.
661 * csky-opc.h (struct csky_opcode): Change isa_flag16 and
662 isa_flag32'type to unsigned 64 bits.
666 * disassemble.c (enum epbf_isa_attr): Add ISA_XBPFBE, ISA_EBPFMAX.
670 * bpf-desc.c: Regenerate.
671 * bpf-desc.h: Likewise.
672 * bpf-opc.c: Likewise.
673 * bpf-opc.h: Likewise.
674 * disassemble.c (disassemble_init_for_target): Set bits for xBPF
675 ISA when appropriate.
680 * vax-dis.c (parse_disassembler_options): Always add at least one
681 to entry_addr_total_slots.
685 * csky-dis.c (csky_find_inst_info): Skip CK860's instructions
686 in other CPUs to speed up disassembling.
687 * csky-opc.h (csky_v2_opcodes): Add CK860's instructions,
688 Change plsli.u16 to plsli.16, change sync's operand format.
692 * csky-opc.h (csky_v2_opcodes): Add instruction bnezad.
696 * aarch64-dis.c (get_sym_code_type): Return FALSE for non-ELF
701 * csky-opc.h (csky_v2_opcodes): Add two operands form for bloop.
705 * ppc-opc.c (powerpc_opcodes): Replace OBF with BF for vcmpsq,
710 * ppc-opc.c (powerpc_opcodes) <xvcvbf16sp>: Rename from this...
711 <xvcvbf16spn>: ...to this.
715 * aarch64-opc.c (aarch64_sys_regs): Add MPAM registers.
719 * po/sr.po: Updated Serbian translation.
723 * ppc-opc.c (powerpc_opcodes): Move cctpl, cctpm and cctph.
727 * aarch64-opc.c (aarch64_print_operand):
728 (aarch64_sys_reg_deprecated_p): Functions paramaters changed.
729 (aarch64_sys_reg_supported_p): Function removed.
730 (aarch64_sys_ins_reg_supported_p): Functions paramaters changed.
731 (aarch64_sys_ins_reg_supported_p): Merged aarch64_sys_reg_supported_p
736 * ppc-opc.c (powerpc_opcodes): Add many mtspr and mfspr extended
741 * ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru.
742 Enable icbt for power5, miso for power8.
746 * ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over
747 mtvsrd, and similarly for mfvsrd.
752 * z8kgen.c (opt): Fix "sout imm16,rs" and "soutb imm16,rbs"
753 opcodes (special "out" to absolute address).
754 * z8k-opc.h: Regenerate.
759 * i386-opc.h (Prefix_Disp8): New.
760 (Prefix_Disp16): Likewise.
761 (Prefix_Disp32): Likewise.
762 (Prefix_Load): Likewise.
763 (Prefix_Store): Likewise.
764 (Prefix_VEX): Likewise.
765 (Prefix_VEX3): Likewise.
766 (Prefix_EVEX): Likewise.
767 (Prefix_REX): Likewise.
768 (Prefix_NoOptimize): Likewise.
769 * i386-opc.tbl: Use Prefix_XXX on pseudo prefixes. Add {disp16}.
770 * i386-tbl.h: Regenerated.
774 * s390-mkopc.c (insertExpandedMnemonic): Handle unreachable
775 default case with abort() instead of printing an error message and
776 continuing, to avoid a maybe-uninitialized warning.
780 * po/de.po: Updated German translation.
784 * i386-dis.c (OP_E_memory): Revert previous change.
789 * i386-dis.c (OP_E_memory): Don't display eiz with no scale
790 without base nor index registers.
794 * i386-dis.c (putop): Move 'V' and 'W' handling.
798 * i386-dis.c (dis386): Adjust 'V' description. Use P-based
799 construct for push/pop of register.
800 (putop): Honor cond when handling 'P'. Drop handling of plain
805 * i386-dis.c (dis386): Adjust 'P', 'T', 'U', and '@'
806 description. Drop '&' description. Use P for push of immediate,
807 pushf/popf, enter, and leave. Use %LP for lret/retf.
808 (dis386_twobyte): Use P for push/pop of fs/gs.
809 (reg_table): Use P for push/pop. Use @ for near call/jmp.
810 (x86_64_table): Use P for far call/jmp.
811 (putop): Drop handling of 'U' and '&'. Move and adjust handling
812 of '@'. Adjust handling of 'P' and 'T'. Drop case_P and case_Q
814 (OP_J): Drop marking of REX_W as used for v_mode (ISA-dependent)
815 and dqw_mode (unconditional).
820 * i386-dis.c (OP_E_memory): Without base nor index registers,
821 32-bit displacement to 64 bits.
825 * arc-dis.c (print_insn_arc): Detect and emit a warning when a
826 faulty double register pair is detected.
830 * i386-dis.c (OP_D): Print dr<N> instead of db<N> in Intel mode.
834 * i386-dis.c (OP_R, Rm): Delete.
835 (MOD_0F24, MOD_0F26): Rename to ...
836 (X86_64_0F24, X86_64_0F26): ... respectively.
837 (dis386): Update 'L' and 'Z' comments.
838 (dis386_twobyte): Replace Rm by Em. Change opcode 0F24 and 0F26
840 (mod_table): Move opcode 0F24 and 0F26 entries ...
841 (x86_64_table): ... here.
842 (putop): Drop handling of 'L'. Set modrm.mod to 3 for 'Z'. Move
847 * i386-dis.c (Rd, Rdq, MaskR): Delete.
848 (MOD_EVEX_0F3828_P_1, MOD_EVEX_0F382A_P_1_W_1,
849 MOD_EVEX_0F3838_P_1, MOD_EVEX_0F383A_P_1_W_0,
850 MOD_EVEX_0F387A_W_0, MOD_EVEX_0F387B_W_0,
851 MOD_EVEX_0F387C): New enumerators.
852 (reg_table): Use Edq for rdssp.
853 (prefix_table): Use Edq for incssp.
854 (mod_table): Use Rm for move to/from %tr. Use MaskE for kand*,
855 kandn*, knot*, kor*, kxnor*, kxor*, kadd*, kunpck*, kortest*,
856 ktest*, and kshift*. Use Edq / MaskE for kmov*.
857 * i386-dis-evex.h: Reference mod_table[] for opcode 0F387C.
858 * i386-dis-evex-mod.h: New entries for opcodes 0F3828, 0F382A,
859 0F3838, 0F383A, 0F387A, 0F387B, and 0F387C.
860 * i386-dis-evex-prefix.h: Reference mod_table[] for opcodes
861 0F3828_P_1 and 0F3838_P_1.
862 * i386-dis-evex-w.h: Reference mod_table[] for opcodes
863 0F382A_P_1, 0F383A_P_1, 0F387A, and 0F387B.
867 * i386-dis.c (PREFIX_0F01_REG_7_MOD_3_RM_3,
868 PREFIX_0FAE_REG_5_MOD_0, PREFIX_0FC3_MOD_0, PREFIX_0F38C8,
869 PREFIX_0F38C9, PREFIX_0F38CA, PREFIX_0F38CB, PREFIX_0F38CC,
870 PREFIX_0F38CD, PREFIX_0F38F9, PREFIX_0F3ACC, PREFIX_VEX_0F77,
871 PREFIX_VEX_0F38F2, PREFIX_VEX_0F38F3_REG_1,
872 PREFIX_VEX_0F38F3_REG_2, PREFIX_VEX_0F38F3_REG_3): Delete.
873 (MOD_0F38F9_PREFIX_0, VEX_LEN_0F77_P_0, VEX_LEN_0F38F2_P_0,
874 VEX_LEN_0F38F3_R_1_P_0, VEX_LEN_0F38F3_R_2_P_0,
875 VEX_LEN_0F38F3_R_3_P_0): Rename to ...
876 (MOD_0F38F9, VEX_LEN_0F77, VEX_LEN_0F38F2, VEX_LEN_0F38F3_R_1,
877 VEX_LEN_0F38F3_R_2, VEX_LEN_0F38F3_R_3): ... these respectively.
878 (reg_table, prefix_table, three_byte_table, vex_table,
879 vex_len_table, mod_table, rm_table): Replace / remove respective
881 (intel_operand_size, OP_E_register, OP_G): Avoid undue setting
882 of PREFIX_DATA in used_prefixes.
886 * i386-dis.c (MOD_VEX_0F3A30_L_0_W_0, MOD_VEX_0F3A30_L_0_W_1,
887 MOD_VEX_0F3A31_L_0_W_0, MOD_VEX_0F3A31_L_0_W_1,
888 MOD_VEX_0F3A32_L_0_W_0, MOD_VEX_0F3A32_L_0_W_1,
889 MOD_VEX_0F3A33_L_0_W_0, MOD_VEX_0F3A33_L_0_W_1): Replace by ...
890 (MOD_VEX_0F3A30_L_0, MOD_VEX_0F3A31_L_0,
891 MOD_VEX_0F3A32_L_0, MOD_VEX_0F3A33_L_0): ... these.
892 (VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
893 VEX_W_0F3A33_L_0): Delete.
894 (dis386): Adjust "BW" description.
895 (vex_len_table): Refer to mod_table[] for opcodes 0F3A30,
896 0F3A31, 0F3A32, and 0F3A33.
897 (vex_w_table): Delete opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
899 (mod_table): Replace opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
904 * i386-dis.c (PREFIX_0F6C, PREFIX_0F6D, PREFIX_0F73_REG_3,
905 PREFIX_0F73_REG_7, PREFIX_0F3810, PREFIX_0F3814, PREFIX_0F3815,
906 PREFIX_0F3817, PREFIX_0F3820, PREFIX_0F3821, PREFIX_0F3822,
907 PREFIX_0F3823, PREFIX_0F3824, PREFIX_0F3825, PREFIX_0F3828,
908 PREFIX_0F3829, PREFIX_0F382A, PREFIX_0F382B, PREFIX_0F3830,
909 PREFIX_0F3831, PREFIX_0F3832, PREFIX_0F3833, PREFIX_0F3834,
910 PREFIX_0F3835, PREFIX_0F3837, PREFIX_0F3838, PREFIX_0F3839,
911 PREFIX_0F383A, PREFIX_0F383B, PREFIX_0F383C, PREFIX_0F383D,
912 PREFIX_0F383E, PREFIX_0F383F, PREFIX_0F3840, PREFIX_0F3841,
913 PREFIX_0F3880, PREFIX_0F3881, PREFIX_0F3882, PREFIX_0F38CF,
914 PREFIX_0F38DB, PREFIX_0F38DC, PREFIX_0F38DD, PREFIX_0F38DE,
915 PREFIX_0F38DF, PREFIX_0F38F5, PREFIX_0F3A08, PREFIX_0F3A09,
916 PREFIX_0F3A0A, PREFIX_0F3A0B, PREFIX_0F3A0C, PREFIX_0F3A0D,
917 PREFIX_0F3A0E, PREFIX_0F3A14, PREFIX_0F3A15, PREFIX_0F3A16,
918 PREFIX_0F3A17, PREFIX_0F3A20, PREFIX_0F3A21, PREFIX_0F3A22,
919 PREFIX_0F3A40, PREFIX_0F3A41, PREFIX_0F3A42, PREFIX_0F3A44,
920 PREFIX_0F3A60, PREFIX_0F3A61, PREFIX_0F3A62, PREFIX_0F3A63,
921 PREFIX_0F3ACE, PREFIX_0F3ACF, PREFIX_0F3ADF, PREFIX_VEX_0F60,
922 PREFIX_VEX_0F61, PREFIX_VEX_0F62, PREFIX_VEX_0F63,
923 PREFIX_VEX_0F64, PREFIX_VEX_0F65, PREFIX_VEX_0F66,
924 PREFIX_VEX_0F67, PREFIX_VEX_0F68, PREFIX_VEX_0F69,
925 PREFIX_VEX_0F6A, PREFIX_VEX_0F6B, PREFIX_VEX_0F6C,
926 PREFIX_VEX_0F6D, PREFIX_VEX_0F6E, PREFIX_VEX_0F71_REG_2,
927 PREFIX_VEX_0F71_REG_4, PREFIX_VEX_0F71_REG_6,
928 PREFIX_VEX_0F72_REG_2, PREFIX_VEX_0F72_REG_4,
929 PREFIX_VEX_0F72_REG_6, PREFIX_VEX_0F73_REG_2,
930 PREFIX_VEX_0F73_REG_3, PREFIX_VEX_0F73_REG_6,
931 PREFIX_VEX_0F73_REG_7, PREFIX_VEX_0F74,
932 PREFIX_VEX_0F75, PREFIX_VEX_0F76, PREFIX_VEX_0FC4,
933 PREFIX_VEX_0FC5, PREFIX_VEX_0FD1, PREFIX_VEX_0FD2,
934 PREFIX_VEX_0FD3, PREFIX_VEX_0FD4, PREFIX_VEX_0FD5,
935 PREFIX_VEX_0FD6, PREFIX_VEX_0FD7, PREFIX_VEX_0FD8,
936 PREFIX_VEX_0FD9, PREFIX_VEX_0FDA, PREFIX_VEX_0FDB,
937 PREFIX_VEX_0FDC, PREFIX_VEX_0FDD, PREFIX_VEX_0FDE,
938 PREFIX_VEX_0FDF, PREFIX_VEX_0FE0, PREFIX_VEX_0FE1,
939 PREFIX_VEX_0FE2, PREFIX_VEX_0FE3, PREFIX_VEX_0FE4,
940 PREFIX_VEX_0FE5, PREFIX_VEX_0FE7, PREFIX_VEX_0FE8,
941 PREFIX_VEX_0FE9, PREFIX_VEX_0FEA, PREFIX_VEX_0FEB,
942 PREFIX_VEX_0FEC, PREFIX_VEX_0FED, PREFIX_VEX_0FEE,
943 PREFIX_VEX_0FEF, PREFIX_VEX_0FF1, PREFIX_VEX_0FF2,
944 PREFIX_VEX_0FF3, PREFIX_VEX_0FF4, PREFIX_VEX_0FF5,
945 PREFIX_VEX_0FF6, PREFIX_VEX_0FF7, PREFIX_VEX_0FF8,
946 PREFIX_VEX_0FF9, PREFIX_VEX_0FFA, PREFIX_VEX_0FFB,
947 PREFIX_VEX_0FFC, PREFIX_VEX_0FFD, PREFIX_VEX_0FFE,
948 PREFIX_VEX_0F3800, PREFIX_VEX_0F3801, PREFIX_VEX_0F3802,
949 PREFIX_VEX_0F3803, PREFIX_VEX_0F3804, PREFIX_VEX_0F3805,
950 PREFIX_VEX_0F3806, PREFIX_VEX_0F3807, PREFIX_VEX_0F3808,
951 PREFIX_VEX_0F3809, PREFIX_VEX_0F380A, PREFIX_VEX_0F380B,
952 PREFIX_VEX_0F380C, PREFIX_VEX_0F380D, PREFIX_VEX_0F380E,
953 PREFIX_VEX_0F380F, PREFIX_VEX_0F3813, PREFIX_VEX_0F3816,
954 PREFIX_VEX_0F3817, PREFIX_VEX_0F3818, PREFIX_VEX_0F3819,
955 PREFIX_VEX_0F381A, PREFIX_VEX_0F381C, PREFIX_VEX_0F381D,
956 PREFIX_VEX_0F381E, PREFIX_VEX_0F3820, PREFIX_VEX_0F3821,
957 PREFIX_VEX_0F3822, PREFIX_VEX_0F3823, PREFIX_VEX_0F3824,
958 PREFIX_VEX_0F3825, PREFIX_VEX_0F3828, PREFIX_VEX_0F3829,
959 PREFIX_VEX_0F382A, PREFIX_VEX_0F382B, PREFIX_VEX_0F382C,
960 PREFIX_VEX_0F382D, PREFIX_VEX_0F382E, PREFIX_VEX_0F382F,
961 PREFIX_VEX_0F3830, PREFIX_VEX_0F3831, PREFIX_VEX_0F3832,
962 PREFIX_VEX_0F3833, PREFIX_VEX_0F3834, PREFIX_VEX_0F3835,
963 PREFIX_VEX_0F3836, PREFIX_VEX_0F3837, PREFIX_VEX_0F3838,
964 PREFIX_VEX_0F3839, PREFIX_VEX_0F383A, PREFIX_VEX_0F383B,
965 PREFIX_VEX_0F383C, PREFIX_VEX_0F383D, PREFIX_VEX_0F383E,
966 PREFIX_VEX_0F383F, PREFIX_VEX_0F3840, PREFIX_VEX_0F3841,
967 PREFIX_VEX_0F3845, PREFIX_VEX_0F3846, PREFIX_VEX_0F3847,
968 PREFIX_VEX_0F3858, PREFIX_VEX_0F3859, PREFIX_VEX_0F385A,
969 PREFIX_VEX_0F3878, PREFIX_VEX_0F3879, PREFIX_VEX_0F388C,
970 PREFIX_VEX_0F388E, PREFIX_VEX_0F3890, PREFIX_VEX_0F3891,
971 PREFIX_VEX_0F3892, PREFIX_VEX_0F3893, PREFIX_VEX_0F3896,
972 PREFIX_VEX_0F3897, PREFIX_VEX_0F3898, PREFIX_VEX_0F3899,
973 PREFIX_VEX_0F389A, PREFIX_VEX_0F389B, PREFIX_VEX_0F389C,
974 PREFIX_VEX_0F389D, PREFIX_VEX_0F389E, PREFIX_VEX_0F389F,
975 PREFIX_VEX_0F38A6, PREFIX_VEX_0F38A7, PREFIX_VEX_0F38A8,
976 PREFIX_VEX_0F38A9, PREFIX_VEX_0F38AA, PREFIX_VEX_0F38AB,
977 PREFIX_VEX_0F38AC, PREFIX_VEX_0F38AD, PREFIX_VEX_0F38AE,
978 PREFIX_VEX_0F38AF, PREFIX_VEX_0F38B6, PREFIX_VEX_0F38B7,
979 PREFIX_VEX_0F38B8, PREFIX_VEX_0F38B9, PREFIX_VEX_0F38BA,
980 PREFIX_VEX_0F38BB, PREFIX_VEX_0F38BC, PREFIX_VEX_0F38BD,
981 PREFIX_VEX_0F38BE, PREFIX_VEX_0F38BF, PREFIX_VEX_0F38CF,
982 PREFIX_VEX_0F38DB, PREFIX_VEX_0F38DC, PREFIX_VEX_0F38DD,
983 PREFIX_VEX_0F38DE, PREFIX_VEX_0F38DF, PREFIX_VEX_0F3A00,
984 PREFIX_VEX_0F3A01, PREFIX_VEX_0F3A02, PREFIX_VEX_0F3A04,
985 PREFIX_VEX_0F3A05, PREFIX_VEX_0F3A06, PREFIX_VEX_0F3A08,
986 PREFIX_VEX_0F3A09, PREFIX_VEX_0F3A0A, PREFIX_VEX_0F3A0B,
987 PREFIX_VEX_0F3A0C, PREFIX_VEX_0F3A0D, PREFIX_VEX_0F3A0E,
988 PREFIX_VEX_0F3A0F, PREFIX_VEX_0F3A14, PREFIX_VEX_0F3A15,
989 PREFIX_VEX_0F3A16, PREFIX_VEX_0F3A17, PREFIX_VEX_0F3A18,
990 PREFIX_VEX_0F3A19, PREFIX_VEX_0F3A1D, PREFIX_VEX_0F3A20,
991 PREFIX_VEX_0F3A21, PREFIX_VEX_0F3A22, PREFIX_VEX_0F3A30,
992 PREFIX_VEX_0F3A31, PREFIX_VEX_0F3A32, PREFIX_VEX_0F3A33,
993 PREFIX_VEX_0F3A38, PREFIX_VEX_0F3A39, PREFIX_VEX_0F3A40,
994 PREFIX_VEX_0F3A41, PREFIX_VEX_0F3A42, PREFIX_VEX_0F3A44,
995 PREFIX_VEX_0F3A46, PREFIX_VEX_0F3A48, PREFIX_VEX_0F3A49,
996 PREFIX_VEX_0F3A4A, PREFIX_VEX_0F3A4B, PREFIX_VEX_0F3A4C,
997 PREFIX_VEX_0F3A5C, PREFIX_VEX_0F3A5D, PREFIX_VEX_0F3A5E,
998 PREFIX_VEX_0F3A5F, PREFIX_VEX_0F3A60, PREFIX_VEX_0F3A61,
999 PREFIX_VEX_0F3A62, PREFIX_VEX_0F3A63, PREFIX_VEX_0F3A68,
1000 PREFIX_VEX_0F3A69, PREFIX_VEX_0F3A6A, PREFIX_VEX_0F3A6B,
1001 PREFIX_VEX_0F3A6C, PREFIX_VEX_0F3A6D, PREFIX_VEX_0F3A6E,
1002 PREFIX_VEX_0F3A6F, PREFIX_VEX_0F3A78, PREFIX_VEX_0F3A79,
1003 PREFIX_VEX_0F3A7A, PREFIX_VEX_0F3A7B, PREFIX_VEX_0F3A7C,
1004 PREFIX_VEX_0F3A7D, PREFIX_VEX_0F3A7E, PREFIX_VEX_0F3A7F,
1005 PREFIX_VEX_0F3ACE, PREFIX_VEX_0F3ACF, PREFIX_VEX_0F3ADF,
1006 PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F66,
1007 PREFIX_EVEX_0F6E, PREFIX_EVEX_0F71_REG_2,
1008 PREFIX_EVEX_0F71_REG_4, PREFIX_EVEX_0F71_REG_6,
1009 PREFIX_EVEX_0F72_REG_0, PREFIX_EVEX_0F72_REG_1,
1010 PREFIX_EVEX_0F72_REG_2, PREFIX_EVEX_0F72_REG_4,
1011 PREFIX_EVEX_0F72_REG_6, PREFIX_EVEX_0F73_REG_2,
1012 PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_6,
1013 PREFIX_EVEX_0F73_REG_7, PREFIX_EVEX_0F74, PREFIX_EVEX_0F75,
1014 PREFIX_EVEX_0F76, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
1015 PREFIX_EVEX_0FD6, PREFIX_EVEX_0FDB, PREFIX_EVEX_0FDF,
1016 PREFIX_EVEX_0FE2, PREFIX_EVEX_0FE7, PREFIX_EVEX_0FEB,
1017 PREFIX_EVEX_0FEF, PREFIX_EVEX_0F380D, PREFIX_EVEX_0F3816,
1018 PREFIX_EVEX_0F3819, PREFIX_EVEX_0F381A, PREFIX_EVEX_0F381B,
1019 PREFIX_EVEX_0F381E, PREFIX_EVEX_0F381F, PREFIX_EVEX_0F382C,
1020 PREFIX_EVEX_0F382D, PREFIX_EVEX_0F3836, PREFIX_EVEX_0F3837,
1021 PREFIX_EVEX_0F383B, PREFIX_EVEX_0F383D, PREFIX_EVEX_0F383F,
1022 PREFIX_EVEX_0F3840, PREFIX_EVEX_0F3842, PREFIX_EVEX_0F3843,
1023 PREFIX_EVEX_0F3844, PREFIX_EVEX_0F3845, PREFIX_EVEX_0F3846,
1024 PREFIX_EVEX_0F3847, PREFIX_EVEX_0F384C, PREFIX_EVEX_0F384D,
1025 PREFIX_EVEX_0F384E, PREFIX_EVEX_0F384F, PREFIX_EVEX_0F3850,
1026 PREFIX_EVEX_0F3851, PREFIX_EVEX_0F3854, PREFIX_EVEX_0F3855,
1027 PREFIX_EVEX_0F3859, PREFIX_EVEX_0F385A, PREFIX_EVEX_0F385B,
1028 PREFIX_EVEX_0F3862, PREFIX_EVEX_0F3863, PREFIX_EVEX_0F3864,
1029 PREFIX_EVEX_0F3865, PREFIX_EVEX_0F3866, PREFIX_EVEX_0F3870,
1030 PREFIX_EVEX_0F3871, PREFIX_EVEX_0F3873, PREFIX_EVEX_0F3875,
1031 PREFIX_EVEX_0F3876, PREFIX_EVEX_0F3877, PREFIX_EVEX_0F387A,
1032 PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387C, PREFIX_EVEX_0F387D,
1033 PREFIX_EVEX_0F387E, PREFIX_EVEX_0F387F, PREFIX_EVEX_0F3883,
1034 PREFIX_EVEX_0F3888, PREFIX_EVEX_0F3889, PREFIX_EVEX_0F388A,
1035 PREFIX_EVEX_0F388B, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F388F,
1036 PREFIX_EVEX_0F3890, PREFIX_EVEX_0F3891, PREFIX_EVEX_0F3892,
1037 PREFIX_EVEX_0F3893, PREFIX_EVEX_0F38A0, PREFIX_EVEX_0F38A1,
1038 PREFIX_EVEX_0F38A2, PREFIX_EVEX_0F38A3, PREFIX_EVEX_0F38B4,
1039 PREFIX_EVEX_0F38B5, PREFIX_EVEX_0F38C4,
1040 PREFIX_EVEX_0F38C6_REG_1, PREFIX_EVEX_0F38C6_REG_2,
1041 PREFIX_EVEX_0F38C6_REG_5, PREFIX_EVEX_0F38C6_REG_6,
1042 PREFIX_EVEX_0F38C7_REG_1, PREFIX_EVEX_0F38C7_REG_2,
1043 PREFIX_EVEX_0F38C7_REG_5, PREFIX_EVEX_0F38C7_REG_6,
1044 PREFIX_EVEX_0F38C8, PREFIX_EVEX_0F38CA, PREFIX_EVEX_0F38CB,
1045 PREFIX_EVEX_0F38CC, PREFIX_EVEX_0F38CD, PREFIX_EVEX_0F3A00,
1046 PREFIX_EVEX_0F3A01, PREFIX_EVEX_0F3A03, PREFIX_EVEX_0F3A05,
1047 PREFIX_EVEX_0F3A08, PREFIX_EVEX_0F3A09, PREFIX_EVEX_0F3A0A,
1048 PREFIX_EVEX_0F3A0B, PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15,
1049 PREFIX_EVEX_0F3A16, PREFIX_EVEX_0F3A17, PREFIX_EVEX_0F3A18,
1050 PREFIX_EVEX_0F3A19, PREFIX_EVEX_0F3A1A, PREFIX_EVEX_0F3A1B,
1051 PREFIX_EVEX_0F3A1E, PREFIX_EVEX_0F3A1F, PREFIX_EVEX_0F3A20,
1052 PREFIX_EVEX_0F3A21, PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A23,
1053 PREFIX_EVEX_0F3A25, PREFIX_EVEX_0F3A26, PREFIX_EVEX_0F3A27,
1054 PREFIX_EVEX_0F3A38, PREFIX_EVEX_0F3A39, PREFIX_EVEX_0F3A3A,
1055 PREFIX_EVEX_0F3A3B, PREFIX_EVEX_0F3A3E, PREFIX_EVEX_0F3A3F,
1056 PREFIX_EVEX_0F3A42, PREFIX_EVEX_0F3A43, PREFIX_EVEX_0F3A50,
1057 PREFIX_EVEX_0F3A51, PREFIX_EVEX_0F3A54, PREFIX_EVEX_0F3A55,
1058 PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
1059 PREFIX_EVEX_0F3A67, PREFIX_EVEX_0F3A70, PREFIX_EVEX_0F3A71,
1060 PREFIX_EVEX_0F3A72, PREFIX_EVEX_0F3A73): Delete.
1061 (MOD_0F382A_PREFIX_2, MOD_0F38F5_PREFIX_2,
1062 MOD_VEX_0FD7_PREFIX_2, MOD_VEX_0FE7_PREFIX_2,
1063 MOD_VEX_0F381A_PREFIX_2, MOD_VEX_0F382A_PREFIX_2,
1064 MOD_VEX_0F382C_PREFIX_2, MOD_VEX_0F382D_PREFIX_2,
1065 MOD_VEX_0F382E_PREFIX_2, MOD_VEX_0F382F_PREFIX_2,
1066 MOD_VEX_0F385A_PREFIX_2, MOD_VEX_0F388C_PREFIX_2,
1067 MOD_VEX_0F388E_PREFIX_2, MOD_VEX_W_0_0F3A30_P_2_LEN_0,
1068 MOD_VEX_W_1_0F3A30_P_2_LEN_0, MOD_VEX_W_0_0F3A31_P_2_LEN_0,
1069 MOD_VEX_W_1_0F3A31_P_2_LEN_0, MOD_VEX_W_0_0F3A32_P_2_LEN_0,
1070 MOD_VEX_W_1_0F3A32_P_2_LEN_0, MOD_VEX_W_0_0F3A33_P_2_LEN_0,
1071 MOD_VEX_W_1_0F3A33_P_2_LEN_0, MOD_EVEX_0F381A_P_2_W_0,
1072 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
1073 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
1074 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0,
1075 MOD_EVEX_0F385B_P_2_W_1, VEX_LEN_0F6E_P_2,
1076 VEX_LEN_0FC4_P_2, VEX_LEN_0FC5_P_2, VEX_LEN_0FD6_P_2,
1077 VEX_LEN_0FF7_P_2, VEX_LEN_0F3816_P_2, VEX_LEN_0F3819_P_2,
1078 VEX_LEN_0F381A_P_2_M_0, VEX_LEN_0F3836_P_2,
1079 VEX_LEN_0F3841_P_2, VEX_LEN_0F385A_P_2_M_0,
1080 VEX_LEN_0F38DB_P_2, VEX_LEN_0F3A00_P_2, VEX_LEN_0F3A01_P_2,
1081 VEX_LEN_0F3A06_P_2, VEX_LEN_0F3A14_P_2, VEX_LEN_0F3A15_P_2,
1082 VEX_LEN_0F3A16_P_2, VEX_LEN_0F3A17_P_2, VEX_LEN_0F3A18_P_2,
1083 VEX_LEN_0F3A19_P_2, VEX_LEN_0F3A20_P_2, VEX_LEN_0F3A21_P_2,
1084 VEX_LEN_0F3A22_P_2, VEX_LEN_0F3A30_P_2, VEX_LEN_0F3A31_P_2,
1085 VEX_LEN_0F3A32_P_2, VEX_LEN_0F3A33_P_2, VEX_LEN_0F3A38_P_2,
1086 VEX_LEN_0F3A39_P_2, VEX_LEN_0F3A41_P_2, VEX_LEN_0F3A46_P_2,
1087 VEX_LEN_0F3A60_P_2, VEX_LEN_0F3A61_P_2, VEX_LEN_0F3A62_P_2,
1088 VEX_LEN_0F3A63_P_2, VEX_LEN_0F3ADF_P_2, EVEX_LEN_0F6E_P_2,
1089 EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2, EVEX_LEN_0FD6_P_2,
1090 EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3819_P_2_W_0,
1091 EVEX_LEN_0F3819_P_2_W_1, EVEX_LEN_0F381A_P_2_W_0_M_0,
1092 EVEX_LEN_0F381A_P_2_W_1_M_0, EVEX_LEN_0F381B_P_2_W_0_M_0,
1093 EVEX_LEN_0F381B_P_2_W_1_M_0, EVEX_LEN_0F3836_P_2,
1094 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
1095 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0,
1096 EVEX_LEN_0F38C6_REG_1_PREFIX_2, EVEX_LEN_0F38C6_REG_2_PREFIX_2,
1097 EVEX_LEN_0F38C6_REG_5_PREFIX_2, EVEX_LEN_0F38C6_REG_6_PREFIX_2,
1098 EVEX_LEN_0F38C7_R_1_P_2_W_0, EVEX_LEN_0F38C7_R_1_P_2_W_1,
1099 EVEX_LEN_0F38C7_R_2_P_2_W_0, EVEX_LEN_0F38C7_R_2_P_2_W_1,
1100 EVEX_LEN_0F38C7_R_5_P_2_W_0, EVEX_LEN_0F38C7_R_5_P_2_W_1,
1101 EVEX_LEN_0F38C7_R_6_P_2_W_0, EVEX_LEN_0F38C7_R_6_P_2_W_1,
1102 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1,
1103 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
1104 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A18_P_2_W_0,
1105 EVEX_LEN_0F3A18_P_2_W_1, EVEX_LEN_0F3A19_P_2_W_0,
1106 EVEX_LEN_0F3A19_P_2_W_1, EVEX_LEN_0F3A1A_P_2_W_0,
1107 EVEX_LEN_0F3A1A_P_2_W_1, EVEX_LEN_0F3A1B_P_2_W_0,
1108 EVEX_LEN_0F3A1B_P_2_W_1, EVEX_LEN_0F3A20_P_2,
1109 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2,
1110 EVEX_LEN_0F3A23_P_2_W_0, EVEX_LEN_0F3A23_P_2_W_1,
1111 EVEX_LEN_0F3A38_P_2_W_0, EVEX_LEN_0F3A38_P_2_W_1,
1112 EVEX_LEN_0F3A39_P_2_W_0, EVEX_LEN_0F3A39_P_2_W_1,
1113 EVEX_LEN_0F3A3A_P_2_W_0, EVEX_LEN_0F3A3A_P_2_W_1,
1114 EVEX_LEN_0F3A3B_P_2_W_0, EVEX_LEN_0F3A3B_P_2_W_1,
1115 EVEX_LEN_0F3A43_P_2_W_0, EVEX_LEN_0F3A43_P_2_W_1
1116 VEX_W_0F380C_P_2, VEX_W_0F380D_P_2, VEX_W_0F380E_P_2,
1117 VEX_W_0F380F_P_2, VEX_W_0F3813_P_2, VEX_W_0F3816_P_2,
1118 VEX_W_0F3818_P_2, VEX_W_0F3819_P_2,
1119 VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F382C_P_2_M_0,
1120 VEX_W_0F382D_P_2_M_0, VEX_W_0F382E_P_2_M_0,
1121 VEX_W_0F382F_P_2_M_0, VEX_W_0F3836_P_2,
1122 VEX_W_0F3846_P_2, VEX_W_0F3858_P_2, VEX_W_0F3859_P_2,
1123 VEX_W_0F385A_P_2_M_0_L_0, VEX_W_0F3878_P_2,
1124 VEX_W_0F3879_P_2, VEX_W_0F38CF_P_2, VEX_W_0F3A00_P_2,
1125 VEX_W_0F3A01_P_2, VEX_W_0F3A02_P_2, VEX_W_0F3A04_P_2,
1126 VEX_W_0F3A05_P_2, VEX_W_0F3A06_P_2_L_0,
1127 VEX_W_0F3A18_P_2_L_0, VEX_W_0F3A19_P_2_L_0,
1128 VEX_W_0F3A1D_P_2, VEX_W_0F3A30_P_2_LEN_0,
1129 VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A32_P_2_LEN_0,
1130 VEX_W_0F3A33_P_2_LEN_0, VEX_W_0F3A38_P_2_L_0,
1131 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0,
1132 VEX_W_0F3A4A_P_2, VEX_W_0F3A4B_P_2, VEX_W_0F3A4C_P_2,
1133 VEX_W_0F3ACE_P_2, VEX_W_0F3ACF_P_2, EVEX_W_0F66_P_2,
1134 EVEX_W_0F72_R_2_P_2, EVEX_W_0F72_R_6_P_2,
1135 EVEX_W_0F73_R_2_P_2, EVEX_W_0F73_R_6_P_2,
1136 EVEX_W_0F76_P_2, EVEX_W_0FD6_P_2, EVEX_W_0FE7_P_2,
1137 EVEX_W_0F380D_P_2, EVEX_W_0F3819_P_2,
1138 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2,
1139 EVEX_W_0F381E_P_2, EVEX_W_0F381F_P_2,
1140 EVEX_W_0F3837_P_2, EVEX_W_0F3859_P_2,
1141 EVEX_W_0F385A_P_2, EVEX_W_0F385B_P_2,
1142 EVEX_W_0F3870_P_2, EVEX_W_0F387A_P_2,
1143 EVEX_W_0F387B_P_2, EVEX_W_0F3883_P_2,
1144 EVEX_W_0F3891_P_2, EVEX_W_0F3893_P_2,
1145 EVEX_W_0F38A1_P_2, EVEX_W_0F38A3_P_2,
1146 EVEX_W_0F38C7_R_1_P_2, EVEX_W_0F38C7_R_2_P_2,
1147 EVEX_W_0F38C7_R_5_P_2, EVEX_W_0F38C7_R_6_P_2,
1148 EVEX_W_0F3A00_P_2, EVEX_W_0F3A01_P_2,
1149 EVEX_W_0F3A05_P_2, EVEX_W_0F3A08_P_2,
1150 EVEX_W_0F3A09_P_2, EVEX_W_0F3A0A_P_2,
1151 EVEX_W_0F3A0B_P_2, EVEX_W_0F3A18_P_2,
1152 EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2,
1153 EVEX_W_0F3A1B_P_2, EVEX_W_0F3A21_P_2,
1154 EVEX_W_0F3A23_P_2, EVEX_W_0F3A38_P_2,
1155 EVEX_W_0F3A39_P_2, EVEX_W_0F3A3A_P_2,
1156 EVEX_W_0F3A3B_P_2, EVEX_W_0F3A42_P_2,
1157 EVEX_W_0F3A43_P_2, EVEX_W_0F3A70_P_2,
1158 EVEX_W_0F3A72_P_2): Rename to ...
1159 (MOD_0F382A, MOD_0F38F5, MOD_VEX_0FD7, MOD_VEX_0FE7,
1160 MOD_VEX_0F381A, MOD_VEX_0F382A, MOD_VEX_0F382C, MOD_VEX_0F382D,
1161 MOD_VEX_0F382E, MOD_VEX_0F382F, MOD_VEX_0F385A, MOD_VEX_0F388C,
1162 MOD_VEX_0F388E, MOD_VEX_0F3A30_L_0_W_0,
1163 MOD_VEX_0F3A30_L_0_W_1, MOD_VEX_0F3A31_L_0_W_0,
1164 MOD_VEX_0F3A31_L_0_W_1, MOD_VEX_0F3A32_L_0_W_0,
1165 MOD_VEX_0F3A32_L_0_W_1, MOD_VEX_0F3A33_L_0_W_0,
1166 MOD_VEX_0F3A33_L_0_W_1, MOD_EVEX_0F381A_W_0,
1167 MOD_EVEX_0F381A_W_1, MOD_EVEX_0F381B_W_0, MOD_EVEX_0F381B_W_1,
1168 MOD_EVEX_0F385A_W_0, MOD_EVEX_0F385A_W_1, MOD_EVEX_0F385B_W_0,
1169 MOD_EVEX_0F385B_W_1, VEX_LEN_0F6E, VEX_LEN_0FC4, VEX_LEN_0FC5,
1170 VEX_LEN_0FD6, VEX_LEN_0FF7, VEX_LEN_0F3816, VEX_LEN_0F3819,
1171 VEX_LEN_0F381A_M_0, VEX_LEN_0F3836, VEX_LEN_0F3841,
1172 VEX_LEN_0F385A_M_0, VEX_LEN_0F38DB, VEX_LEN_0F3A00,
1173 VEX_LEN_0F3A01, VEX_LEN_0F3A06, VEX_LEN_0F3A14, VEX_LEN_0F3A15,
1174 VEX_LEN_0F3A16, VEX_LEN_0F3A17, VEX_LEN_0F3A18, VEX_LEN_0F3A19,
1175 VEX_LEN_0F3A20, VEX_LEN_0F3A21, VEX_LEN_0F3A22, VEX_LEN_0F3A30,
1176 VEX_LEN_0F3A31, VEX_LEN_0F3A32, VEX_LEN_0F3A33, VEX_LEN_0F3A38,
1177 VEX_LEN_0F3A39, VEX_LEN_0F3A41, VEX_LEN_0F3A46, VEX_LEN_0F3A60,
1178 VEX_LEN_0F3A61, VEX_LEN_0F3A62, VEX_LEN_0F3A63, VEX_LEN_0F3ADF,
1179 EVEX_LEN_0F6E, EVEX_LEN_0FC4, EVEX_LEN_0FC5, EVEX_LEN_0FD6,
1180 EVEX_LEN_0F3816, EVEX_LEN_0F3819_W_0, EVEX_LEN_0F3819_W_1,
1181 EVEX_LEN_0F381A_W_0_M_0, EVEX_LEN_0F381A_W_1_M_0,
1182 EVEX_LEN_0F381B_W_0_M_0, EVEX_LEN_0F381B_W_1_M_0,
1183 EVEX_LEN_0F3836, EVEX_LEN_0F385A_W_0_M_0,
1184 EVEX_LEN_0F385A_W_1_M_0, EVEX_LEN_0F385B_W_0_M_0,
1185 EVEX_LEN_0F385B_W_1_M_0, EVEX_LEN_0F38C6_R_1_M_0,
1186 EVEX_LEN_0F38C6_R_2_M_0, EVEX_LEN_0F38C6_R_5_M_0,
1187 EVEX_LEN_0F38C6_R_6_M_0, EVEX_LEN_0F38C7_R_1_M_0_W_0,
1188 EVEX_LEN_0F38C7_R_1_M_0_W_1, EVEX_LEN_0F38C7_R_2_M_0_W_0,
1189 EVEX_LEN_0F38C7_R_2_M_0_W_1, EVEX_LEN_0F38C7_R_5_M_0_W_0,
1190 EVEX_LEN_0F38C7_R_5_M_0_W_1, EVEX_LEN_0F38C7_R_6_M_0_W_0,
1191 EVEX_LEN_0F38C7_R_6_M_0_W_1, EVEX_LEN_0F3A00_W_1,
1192 EVEX_LEN_0F3A01_W_1, EVEX_LEN_0F3A14, EVEX_LEN_0F3A15,
1193 EVEX_LEN_0F3A16, EVEX_LEN_0F3A17, EVEX_LEN_0F3A18_W_0,
1194 EVEX_LEN_0F3A18_W_1, EVEX_LEN_0F3A19_W_0,
1195 EVEX_LEN_0F3A19_W_1, EVEX_LEN_0F3A1A_W_0,
1196 EVEX_LEN_0F3A1A_W_1, EVEX_LEN_0F3A1B_W_0,
1197 EVEX_LEN_0F3A1B_W_1, EVEX_LEN_0F3A20, EVEX_LEN_0F3A21_W_0,
1198 EVEX_LEN_0F3A22, EVEX_LEN_0F3A23_W_0, EVEX_LEN_0F3A23_W_1,
1199 EVEX_LEN_0F3A38_W_0, EVEX_LEN_0F3A38_W_1,
1200 EVEX_LEN_0F3A39_W_0, EVEX_LEN_0F3A39_W_1,
1201 EVEX_LEN_0F3A3A_W_0, EVEX_LEN_0F3A3A_W_1,
1202 EVEX_LEN_0F3A3B_W_0, EVEX_LEN_0F3A3B_W_1,
1203 EVEX_LEN_0F3A43_W_0, EVEX_LEN_0F3A43_W_1
1204 VEX_W_0F380C, VEX_W_0F380D, VEX_W_0F380E, VEX_W_0F380F,
1205 VEX_W_0F3813, VEX_W_0F3816_L_1, VEX_W_0F3818,
1206 VEX_W_0F3819_L_1, VEX_W_0F381A_M_0_L_1, VEX_W_0F382C_M_0,
1207 VEX_W_0F382D_M_0, VEX_W_0F382E_M_0, VEX_W_0F382F_M_0,
1208 VEX_W_0F3836, VEX_W_0F3846, VEX_W_0F3858, VEX_W_0F3859,
1209 VEX_W_0F385A_M_0_L_0, VEX_W_0F3878, VEX_W_0F3879,
1210 VEX_W_0F38CF, VEX_W_0F3A00_L_1, VEX_W_0F3A01_L_1,
1211 VEX_W_0F3A02, VEX_W_0F3A04, VEX_W_0F3A05, VEX_W_0F3A06_L_1,
1212 VEX_W_0F3A18_L_1, VEX_W_0F3A19_L_1, VEX_W_0F3A1D,
1213 VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
1214 VEX_W_0F3A33_L_0, VEX_W_0F3A38_L_1, VEX_W_0F3A39_L_1,
1215 VEX_W_0F3A46_L_1, VEX_W_0F3A4A, VEX_W_0F3A4B, VEX_W_0F3A4C,
1216 VEX_W_0F3ACE, VEX_W_0F3ACF, EVEX_W_0F66, EVEX_W_0F72_R_2,
1217 EVEX_W_0F72_R_6, EVEX_W_0F73_R_2, EVEX_W_0F73_R_6,
1218 EVEX_W_0F76, EVEX_W_0FD6_L_0, EVEX_W_0FE7, EVEX_W_0F380D,
1219 EVEX_W_0F3819, EVEX_W_0F381A, EVEX_W_0F381B, EVEX_W_0F381E,
1220 EVEX_W_0F381F, EVEX_W_0F3837, EVEX_W_0F3859, EVEX_W_0F385A,
1221 EVEX_W_0F385B, EVEX_W_0F3870, EVEX_W_0F387A, EVEX_W_0F387B,
1222 EVEX_W_0F3883, EVEX_W_0F3891, EVEX_W_0F3893, EVEX_W_0F38A1,
1223 EVEX_W_0F38A3, EVEX_W_0F38C7_R_1_M_0,
1224 EVEX_W_0F38C7_R_2_M_0, EVEX_W_0F38C7_R_5_M_0,
1225 EVEX_W_0F38C7_R_6_M_0, EVEX_W_0F3A00, EVEX_W_0F3A01,
1226 EVEX_W_0F3A05, EVEX_W_0F3A08, EVEX_W_0F3A09, EVEX_W_0F3A0A,
1227 EVEX_W_0F3A0B, EVEX_W_0F3A18, EVEX_W_0F3A19, EVEX_W_0F3A1A,
1228 EVEX_W_0F3A1B, EVEX_W_0F3A21, EVEX_W_0F3A23, EVEX_W_0F3A38,
1229 EVEX_W_0F3A39, EVEX_W_0F3A3A, EVEX_W_0F3A3B, EVEX_W_0F3A42,
1230 EVEX_W_0F3A43, EVEX_W_0F3A70, EVEX_W_0F3A72): ... these
1232 (dis386_twobyte, three_byte_table, vex_table, vex_len_table,
1233 vex_w_table, mod_table): Replace / remove respective entries.
1234 (print_insn): Move up dp->prefix_requirement handling. Handle
1236 * i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-mod.h,
1237 i386-dis-evex-prefix.h, i386-dis-evex-reg.h, i386-dis-evex-w.h:
1238 Replace / remove respective entries.
1242 * i386-dis.c (PREFIX_EVEX_0F2C, PREFIX_EVEX_0F2D,
1243 PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F): Delete.
1244 (prefix_table): Add EXxEVexS operand to vcvttss2si, vcvttsd2si,
1245 vcvtss2si, vcvtsd2si, vucomiss, and vucomisd table entries.
1246 Retain X macro and PREFIX_OPCODE use from tjhe EVEX table for
1248 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
1249 0F2C, 0F2D, 0F2E, and 0F2F.
1250 * i386-dis-evex-prefix.h: Delete opcode 0F2C, 0F2D, 0F2E, and
1255 * i386-dis.c (OP_VexR, VexScalarR): New.
1256 (OP_EX_Vex, OP_XMM_Vex, EXdVexScalarS, EXqVexScalarS,
1257 XMVexScalar, d_scalar_swap_mode, q_scalar_swap_mode,
1258 need_vex_reg): Delete.
1259 (prefix_table): Replace VexScalar by VexScalarR and
1260 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
1261 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
1262 (vex_len_table): Replace EXqVexScalarS by EXqS.
1263 (get_valid_dis386): Don't set need_vex_reg.
1264 (print_insn): Don't initialize need_vex_reg.
1265 (intel_operand_size, OP_E_memory): Drop d_scalar_swap_mode and
1266 q_scalar_swap_mode cases.
1267 (OP_EX): Don't check for d_scalar_swap_mode and
1269 (OP_VEX): Done check need_vex_reg.
1270 * i386-dis-evex-w.h: Replace VexScalar by VexScalarR and
1271 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
1272 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
1276 * i386-dis.c (Vex128, Vex256, vex128_mode, vex256_mode): Delete.
1277 (VEX_W_0F381A_P_2_M_0, VEX_W_0F385A_P_2_M_0, VEX_W_0F3A06_P_2,
1278 VEX_W_0F3A18_P_2, VEX_W_0F3A19_P_2, VEX_W_0F3A38_P_2,
1279 VEX_W_0F3A39_P_2, VEX_W_0F3A46_P_2): Rename to ...
1280 (VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F385A_P_2_M_0_L_0,
1281 VEX_W_0F3A06_P_2_L_0, VEX_W_0F3A18_P_2_L_0,
1282 VEX_W_0F3A19_P_2_L_0, VEX_W_0F3A38_P_2_L_0,
1283 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0): ... respectively.
1284 (vex_table): Replace Vex128 by Vex.
1285 (vex_len_table): Likewise. Adjust referenced enum names.
1286 (vex_w_table): Replace Vex128 and Vex256 by Vex. Adjust
1287 referenced enum names.
1288 (OP_VEX): Drop vex128_mode and vex256_mode cases.
1289 * i386-dis-evex-len.h (evex_len_table): Replace Vex128 by Vex.
1293 * i386-dis.c (dis386): "LW" description now applies to "DQ".
1294 (putop): Handle "DQ". Don't handle "LW" anymore.
1295 (prefix_table, mod_table): Replace %LW by %DQ.
1296 * i386-dis-evex-len.h, i386-dis-evex-prefix.h: Likewise.
1300 * i386-dis.c (OP_E_memory): Move xmm_mw_mode, xmm_mb_mode,
1301 dqd_mode, xmm_md_mode, d_mode, d_swap_mode, and
1302 d_scalar_swap_mode case handling. Move shift adjsutment into
1303 the case its applicable to.
1307 * i386-dis.c (EVEX_W_0F3862_P_2, EVEX_W_0F3863_P_2): Delete.
1308 (EXbScalar, EXwScalar): Fold to ...
1309 (EXbwUnit): ... this.
1310 (b_scalar_mode, w_scalar_mode): Fold to ...
1311 (bw_unit_mode): ... this.
1312 (intel_operand_size, OP_E_memory): Replace b_scalar_mode /
1313 w_scalar_mode handling by bw_unit_mode one.
1314 * i386-dis-evex-w.h: Move entries for opcodes 0F3862 and 0F3863
1316 * i386-dis-evex-prefix.h: ... here.
1320 * i386-dis.c (PCMPESTR_Fixup): Delete.
1321 (dis386): Adjust "LQ" description.
1322 (prefix_table): Make %LQ apply to AT&T case only for cvtsi2ss,
1323 cvtsi2sd, ptwrite, vcvtsi2ss, and vcvtsi2sd. Replace use of
1324 PCMPESTR_Fixup by !%LQ and EXx for pcmpestrm, pcmpestri,
1325 vpcmpestrm, and vpcmpestri.
1326 (putop): Honor "cond" when handling LQ.
1327 * i386-dis-evex-prefix.h: Make %LQ apply to AT&T case only for
1328 vcvtsi2ss and vcvtusi2ss.
1329 * i386-dis-evex-w.h: Make %LQ apply to AT&T case only for
1330 vcvtsi2sd and vcvtusi2sd.
1334 * i386-dis.c (VCMP_Fixup, VCMP): Delete.
1335 (simd_cmp_op): Add const.
1336 (vex_cmp_op): Move up and drop initial 8 entries. Add const.
1337 (CMP_Fixup): Handle VEX case.
1338 (prefix_table): Replace VCMP by CMP.
1339 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Likewise.
1343 * i386-dis.c (MOVBE_Fixup): Delete.
1345 (prefix_table): Use Mv for movbe entries.
1349 * i386-dis.c (CRC32_Fixup): Delete.
1350 (prefix_table): Use Eb/Ev for crc32 entries.
1354 * i386-dis.c (OP_E_register, OP_G, OP_REG, CRC32_Fixup):
1355 Conditionalize invocations of "USED_REX (0)".
1359 * i386-dis.c (eBX, eCX, eDX, eSP, eBP, eSI, eDI, DL, BL, AH,
1360 CH, DH, BH, AX, DX): Delete.
1361 (OP_IMREG): Drop handling of eBX_reg, eCX_reg, eDX_reg, eSP_reg,
1362 eBP_reg, eSI_reg, eDI_reg, dl_reg, bl_reg, ah_reg, ch_reg,
1363 dh_reg, bh_reg, ax_reg, and dx_reg. Simplify what's left.
1367 * i386-dis.c (TMM): New.
1370 (MVexSIBMEM): Likewise.
1371 (tmm_mode): Likewise.
1372 (vex_sibmem_mode): Likewise.
1373 (REG_VEX_0F3849_X86_64_P_0_W_0_M_1): Likewise.
1374 (MOD_VEX_0F3849_X86_64_P_0_W_0): Likewise.
1375 (MOD_VEX_0F3849_X86_64_P_2_W_0): Likewise.
1376 (MOD_VEX_0F3849_X86_64_P_3_W_0): Likewise.
1377 (MOD_VEX_0F384B_X86_64_P_1_W_0): Likewise.
1378 (MOD_VEX_0F384B_X86_64_P_2_W_0): Likewise.
1379 (MOD_VEX_0F384B_X86_64_P_3_W_0): Likewise.
1380 (MOD_VEX_0F385C_X86_64_P_1_W_0): Likewise.
1381 (MOD_VEX_0F385E_X86_64_P_0_W_0): Likewise.
1382 (MOD_VEX_0F385E_X86_64_P_1_W_0): Likewise.
1383 (MOD_VEX_0F385E_X86_64_P_2_W_0): Likewise.
1384 (MOD_VEX_0F385E_X86_64_P_3_W_0): Likewise.
1385 (RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0): Likewise.
1386 (PREFIX_VEX_0F3849_X86_64): Likewise.
1387 (PREFIX_VEX_0F384B_X86_64): Likewise.
1388 (PREFIX_VEX_0F385C_X86_64): Likewise.
1389 (PREFIX_VEX_0F385E_X86_64): Likewise.
1390 (X86_64_VEX_0F3849): Likewise.
1391 (X86_64_VEX_0F384B): Likewise.
1392 (X86_64_VEX_0F385C): Likewise.
1393 (X86_64_VEX_0F385E): Likewise.
1394 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0): Likewise.
1395 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0): Likewise.
1396 (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0): Likewise.
1397 (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0): Likewise.
1398 (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0): Likewise.
1399 (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0): Likewise.
1400 (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0): Likewise.
1401 (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0): Likewise.
1402 (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0): Likewise.
1403 (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0): Likewise.
1404 (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0): Likewise.
1405 (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0): Likewise.
1406 (VEX_W_0F3849_X86_64_P_0): Likewise.
1407 (VEX_W_0F3849_X86_64_P_2): Likewise.
1408 (VEX_W_0F3849_X86_64_P_3): Likewise.
1409 (VEX_W_0F384B_X86_64_P_1): Likewise.
1410 (VEX_W_0F384B_X86_64_P_2): Likewise.
1411 (VEX_W_0F384B_X86_64_P_3): Likewise.
1412 (VEX_W_0F385C_X86_64_P_1): Likewise.
1413 (VEX_W_0F385E_X86_64_P_0): Likewise.
1414 (VEX_W_0F385E_X86_64_P_1): Likewise.
1415 (VEX_W_0F385E_X86_64_P_2): Likewise.
1416 (VEX_W_0F385E_X86_64_P_3): Likewise.
1417 (names_tmm): Likewise.
1418 (att_names_tmm): Likewise.
1419 (intel_operand_size): Handle void_mode.
1420 (OP_XMM): Handle tmm_mode.
1423 * i386-gen.c (cpu_flag_init): Add entries for CpuAMX_INT8,
1424 CpuAMX_BF16 and CpuAMX_TILE.
1425 (operand_type_shorthands): Add RegTMM.
1426 (operand_type_init): Likewise.
1427 (operand_types): Add Tmmword.
1428 (cpu_flag_init): Add CPU_AMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
1429 (cpu_flags): Add CpuAMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
1430 * i386-opc.h (CpuAMX_INT8): New.
1431 (CpuAMX_BF16): Likewise.
1432 (CpuAMX_TILE): Likewise.
1434 (Tmmword): Likewise.
1435 (i386_cpu_flags): Add cpuamx_int8, cpuamx_bf16 and cpuamx_tile.
1436 (i386_opcode_modifier): Extend width of fields vexvvvv and sib.
1437 (i386_operand_type): Add tmmword.
1438 * i386-opc.tbl: Add AMX instructions.
1439 * i386-reg.tbl: Add AMX registers.
1440 * i386-init.h: Regenerated.
1441 * i386-tbl.h: Likewise.
1445 * i386-dis.c (OP_LWPCB_E, OP_LWP_E): Delete.
1446 (REG_XOP_LWPCB, REG_XOP_LWP, REG_XOP_TBM_01, REG_XOP_TBM_02):
1448 (REG_0FXOP_09_12_M_1_L_0, REG_0FXOP_0A_12_L_0,
1449 REG_0FXOP_09_01_L_0, REG_0FXOP_09_02_L_0): ... these
1451 (MOD_VEX_0FXOP_09_12, VEX_LEN_0FXOP_08_85, VEX_LEN_0FXOP_08_86,
1452 VEX_LEN_0FXOP_08_87, VEX_LEN_0FXOP_08_8E, VEX_LEN_0FXOP_08_8F,
1453 VEX_LEN_0FXOP_08_95, VEX_LEN_0FXOP_08_96, VEX_LEN_0FXOP_08_97,
1454 VEX_LEN_0FXOP_08_9E, VEX_LEN_0FXOP_08_9F, VEX_LEN_0FXOP_08_A3,
1455 VEX_LEN_0FXOP_08_A6, VEX_LEN_0FXOP_08_B6, VEX_LEN_0FXOP_08_C0,
1456 VEX_LEN_0FXOP_08_C1, VEX_LEN_0FXOP_08_C2, VEX_LEN_0FXOP_08_C3,
1457 VEX_LEN_0FXOP_09_01, VEX_LEN_0FXOP_09_02, VEX_LEN_0FXOP_09_12_M_1,
1458 VEX_LEN_0FXOP_09_90, VEX_LEN_0FXOP_09_91, VEX_LEN_0FXOP_09_92,
1459 VEX_LEN_0FXOP_09_93, VEX_LEN_0FXOP_09_94, VEX_LEN_0FXOP_09_95,
1460 VEX_LEN_0FXOP_09_96, VEX_LEN_0FXOP_09_97, VEX_LEN_0FXOP_09_98,
1461 VEX_LEN_0FXOP_09_99, VEX_LEN_0FXOP_09_9A, VEX_LEN_0FXOP_09_9B,
1462 VEX_LEN_0FXOP_09_C1, VEX_LEN_0FXOP_09_C2, VEX_LEN_0FXOP_09_C3,
1463 VEX_LEN_0FXOP_09_C6, VEX_LEN_0FXOP_09_C7, VEX_LEN_0FXOP_09_CB,
1464 VEX_LEN_0FXOP_09_D1, VEX_LEN_0FXOP_09_D2, VEX_LEN_0FXOP_09_D3,
1465 VEX_LEN_0FXOP_09_D6, VEX_LEN_0FXOP_09_D7, VEX_LEN_0FXOP_09_DB,
1466 VEX_LEN_0FXOP_09_E1, VEX_LEN_0FXOP_09_E2, VEX_LEN_0FXOP_09_E3,
1467 VEX_LEN_0FXOP_0A_12, VEX_W_0FXOP_08_85_L_0,
1468 VEX_W_0FXOP_08_86_L_0, VEX_W_0FXOP_08_87_L_0,
1469 VEX_W_0FXOP_08_8E_L_0, VEX_W_0FXOP_08_8F_L_0,
1470 VEX_W_0FXOP_08_95_L_0, VEX_W_0FXOP_08_96_L_0,
1471 VEX_W_0FXOP_08_97_L_0, VEX_W_0FXOP_08_9E_L_0,
1472 VEX_W_0FXOP_08_9F_L_0, VEX_W_0FXOP_08_A6_L_0,
1473 VEX_W_0FXOP_08_B6_L_0, VEX_W_0FXOP_08_C0_L_0,
1474 VEX_W_0FXOP_08_C1_L_0, VEX_W_0FXOP_08_C2_L_0,
1475 VEX_W_0FXOP_08_C3_L_0, VEX_W_0FXOP_08_CC_L_0,
1476 VEX_W_0FXOP_08_CD_L_0, VEX_W_0FXOP_08_CE_L_0,
1477 VEX_W_0FXOP_08_CF_L_0, VEX_W_0FXOP_08_EC_L_0,
1478 VEX_W_0FXOP_08_ED_L_0, VEX_W_0FXOP_08_EE_L_0,
1479 VEX_W_0FXOP_08_EF_L_0, VEX_W_0FXOP_09_C1_L_0,
1480 VEX_W_0FXOP_09_C2_L_0, VEX_W_0FXOP_09_C3_L_0,
1481 VEX_W_0FXOP_09_C6_L_0, VEX_W_0FXOP_09_C7_L_0,
1482 VEX_W_0FXOP_09_CB_L_0, VEX_W_0FXOP_09_D1_L_0,
1483 VEX_W_0FXOP_09_D2_L_0, VEX_W_0FXOP_09_D3_L_0,
1484 VEX_W_0FXOP_09_D6_L_0, VEX_W_0FXOP_09_D7_L_0,
1485 VEX_W_0FXOP_09_DB_L_0, VEX_W_0FXOP_09_E1_L_0,
1486 VEX_W_0FXOP_09_E2_L_0, VEX_W_0FXOP_09_E3_L_0): New enumerators.
1487 (reg_table): Re-order XOP entries. Adjust their operands.
1488 (xop_table): Replace 08_85, 08_86, 08_87, 08_8E, 08_8F, 08_95,
1489 08_96, 08_97, 08_9E, 08_9F, 08_A3, 08_A6, 08_B6, 08_C0, 08_C1,
1490 08_C2, 08_C3, 09_01, 09_02, 09_12, 09_90, 09_91, 09_92, 09_93,
1491 09_94, 09_95, 09_96, 09_97, 09_98, 09_99, 09_9A, 09_9B, 09_C1,
1492 09_C2, 09_C3, 09_C6, 09_C7, 09_CB, 09_D1, 09_D2, 09_D3, 09_D6,
1493 09_D7, 09_DB, 09_E1, 09_E2, 09_E3, and VEX_LEN_0FXOP_0A_12
1494 entries by references ...
1495 (vex_len_table): ... to resepctive new entries here. For several
1496 new and existing entries reference ...
1497 (vex_w_table): ... new entries here.
1498 (mod_table): New MOD_VEX_0FXOP_09_12 entry.
1502 * i386-dis.c (XMVexScalarI4): Define.
1503 (VEX_LEN_0F3A6A_P_2, VEX_LEN_0F3A6B_P_2, VEX_LEN_0F3A6E_P_2,
1504 VEX_LEN_0F3A6F_P_2, VEX_LEN_0F3A7A_P_2, VEX_LEN_0F3A7B_P_2,
1505 VEX_LEN_0F3A7E_P_2, VEX_LEN_0F3A7F_P_2): Delete.
1506 (vex_len_table): Move scalar FMA4 entries ...
1507 (prefix_table): ... here.
1508 (OP_REG_VexI4): Handle scalar_mode.
1509 * i386-opc.tbl: Use VexLIG for scalar FMA4 insns.
1510 * i386-tbl.h: Re-generate.
1514 * i386-dis.c (OP_Vex_2src_1, OP_Vex_2src_2, Vex_2src_1,
1515 Vex_2src_2): Delete.
1516 (OP_VexW, VexW): New.
1517 (xop_table): Use EXx for rotates by immediate. Use EXx and VexW
1518 for shifts and rotates by register.
1522 * i386-dis.c (OP_EX_VexImmW, OP_XMM_VexW, EXVexImmW, XMVexW,
1523 VEX_W_0F3A48_P_2, VEX_W_0F3A49_P_2, vex_w_done, get_vex_imm8,
1524 OP_EX_VexReg): Delete.
1525 (OP_VexI4, VexI4): New.
1526 (vex_w_table): Move vpermil2ps and vpermil2pd entries ...
1527 (prefix_table): ... here.
1528 (print_insn): Drop setting of vex_w_done.
1532 * i386-dis.c (OP_EX_VexW, EXVexW, EXdVexW, EXqVexW): Delete.
1533 (prefix_table, vex_len_table): Replace operands for FMA4 insns.
1534 (xop_table): Replace operands of 4-operand insns.
1535 (OP_REG_VexI4): Move VEX.W based operand swaping here.
1539 * arc-opc.c (insert_rbd): New function.
1542 * arc-tbl.h (vadd2, vadd4h, vmac2h, vmpy2h, vsub4h): Update
1547 * i386-dis.c (EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2,
1548 EVEX_W_0F3828_P_1, EVEX_W_0F3829_P_1, EVEX_W_0F3854_P_2,
1549 EVEX_W_0F3866_P_2, EVEX_W_0F3875_P_2, EVEX_W_0F387D_P_2,
1550 EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2, EVEX_W_0F3A3F_P_2):
1552 (putop): Handle "BW".
1553 * i386-dis-evex-w.h: Move entries for opcodes 0F3826, 0F3826,
1554 0F3828, 0F3829, 0F3854, 0F3866, 0F3875, 0F387D, 0F388D, 0F3A3E,
1556 * i386-dis-evex-prefix.h: ... here.
1560 * i386-dis.c (VEX_LEN_0FXOP_09_80, VEX_LEN_0FXOP_09_81): Delete.
1561 (VEX_LEN_0FXOP_09_82_W_0, VEX_LEN_0FXOP_09_83_W_0,
1562 VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81, VEX_W_0FXOP_09_82,
1563 VEX_W_0FXOP_09_83): New enumerators.
1564 (xop_table): Reference the above.
1565 (vex_len_table): Replace vfrczp* entries by vfrczs* ones.
1566 (vex_w_table): New VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81,
1567 VEX_W_0FXOP_09_82, and VEX_W_0FXOP_09_83 entries.
1568 (get_valid_dis386): Return bad_opcode for XOP.PP != 0.
1572 * i386-dis.c (EVEX_W_0F3838_P_1,
1573 EVEX_W_0F3839_P_1, EVEX_W_0F3840_P_2, EVEX_W_0F3855_P_2,
1574 EVEX_W_0F3868_P_3, EVEX_W_0F3871_P_2, EVEX_W_0F3873_P_2,
1575 EVEX_W_0F3A50_P_2, EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2,
1576 EVEX_W_0F3A57_P_2, EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2,
1577 EVEX_W_0F3A71_P_2, EVEX_W_0F3A73_P_2): Delete.
1578 (putop): Centralize management of last[]. Delete SAVE_LAST.
1579 * i386-dis-evex-w.h: Move entries for opcodes 0F3838, 0F3839,
1580 0F3840, 0F3855, 0F3868, 0F3871, 0F3873, 0F3A50, 0F3A51, 0F3A56,
1581 0F3A57, 0F3A66, 0F3A67, 0F3A71, and 0F3A73 ...
1582 * i386-dis-evex-prefix.h: here.
1586 * i386-dis.c (MOD_EVEX_0F381A_P_2_W_0, MOD_EVEX_0F381A_P_2_W_1,
1587 MOD_EVEX_0F381B_P_2_W_0, MOD_EVEX_0F381B_P_2_W_1,
1588 MOD_EVEX_0F385A_P_2_W_0, MOD_EVEX_0F385A_P_2_W_1,
1589 MOD_EVEX_0F385B_P_2_W_0, MOD_EVEX_0F385B_P_2_W_1): New
1591 (EVEX_LEN_0F381A_P_2_W_0, EVEX_LEN_0F381A_P_2_W_1,
1592 EVEX_LEN_0F381B_P_2_W_0, EVEX_LEN_0F381B_P_2_W_1,
1593 EVEX_LEN_0F385A_P_2_W_0, EVEX_LEN_0F385A_P_2_W_1,
1594 EVEX_LEN_0F385B_P_2_W_0, EVEX_LEN_0F385B_P_2_W_1): Rename to ...
1595 (EVEX_LEN_0F381A_P_2_W_0_M_0, EVEX_LEN_0F381A_P_2_W_1_M_0,
1596 EVEX_LEN_0F381B_P_2_W_0_M_0, EVEX_LEN_0F381B_P_2_W_1_M_0,
1597 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
1598 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0): ...
1599 these, respectively.
1600 * i386-dis-evex-len.h: Adjust comments.
1601 * i386-dis-evex-mod.h: New MOD_EVEX_0F381A_P_2_W_0,
1602 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
1603 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
1604 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0, and
1605 MOD_EVEX_0F385B_P_2_W_1 table entries.
1606 * i386-dis-evex-w.h: Reference mod_table[] for
1607 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2, EVEX_W_0F385A_P_2, and
1612 * i386-dis-evex-len.h (vbroadcastf32x8, vbroadcasti32x8,
1613 vinsertf32x8, vinsertf64x4, vextractf32x8, vextractf64x4): Use
1615 (vinserti32x8, vinserti64x4, vextracti32x8, vextracti64x4):
1616 Likewise. Mark 256-bit entries invalid.
1620 * i386-dis.c (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
1621 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
1622 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
1623 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
1624 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
1625 PREFIX_EVEX_0F382B): Delete.
1626 (EVEX_W_0F62_P_2, EVEX_W_0F6A_P_2, EVEX_W_0F6B_P_2,
1627 EVEX_W_0F6C_P_2, EVEX_W_0F6D_P_2, EVEX_W_0FD2_P_2,
1628 EVEX_W_0FD3_P_2, EVEX_W_0FD4_P_2, EVEX_W_0FF2_P_2,
1629 EVEX_W_0FF3_P_2, EVEX_W_0FF4_P_2, EVEX_W_0FFA_P_2,
1630 EVEX_W_0FFB_P_2, EVEX_W_0FFE_P_2, EVEX_W_0F382B_P_2): Rename
1632 (EVEX_W_0F62, EVEX_W_0F6A, EVEX_W_0F6B, EVEX_W_0F6C,
1633 EVEX_W_0F6D, EVEX_W_0FD2, EVEX_W_0FD3, EVEX_W_0FD4,
1634 EVEX_W_0FF2, EVEX_W_0FF3, EVEX_W_0FF4, EVEX_W_0FFA,
1635 EVEX_W_0FFB, EVEX_W_0FFE, EVEX_W_0F382B): ... these
1637 * i386-dis-evex.h (evex_table): Reference VEX_W table entries
1638 for opcodes 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4,
1639 0FF2, 0FF3, 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
1640 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
1641 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
1642 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
1643 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
1644 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
1645 PREFIX_EVEX_0F382B): Remove table entries.
1646 * i386-dis-evex-w.h: Reference VEX table entries for opcodes
1647 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4, 0FF2, 0FF3,
1648 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
1652 * i386-dis.c (EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3836_P_2,
1653 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1): New
1655 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0F3816_P_2,
1656 EVEX_LEN_0F3836_P_2, EVEX_LEN_0F3A00_P_2_W_1, and
1657 EVEX_LEN_0F3A01_P_2_W_1 table entries.
1658 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
1663 * i386-dis.c (EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2,
1664 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
1665 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
1666 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2): New enumerators.
1667 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0FC4_P_2,
1668 EVEX_LEN_0FC5_P_2, EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2,
1669 EVEX_LEN_0F3A16_P_2, EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
1670 EVEX_LEN_0F3A21_P_2_W_0, and EVEX_LEN_0F3A22_P_2 table entries.
1671 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
1676 * i386-dis.c (PREFIX_EVEX_0F3A1D, EVEX_W_0F3A1D_P_2): Delete.
1677 (VEX_W_0F3813_P_2, VEX_W_0F3A1D_P_2): New enumerators.
1678 (prefix_table): Reference VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2
1680 (vex_w_table): New VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2 table
1682 * i386-dis-evex.h (evex_table): Reference VEX table entry for
1684 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F3A1D): Delete table
1686 * i386-dis-evex-w.h (EVEX_W_0F3A1D_P_2): Likewise.
1690 * i386-dis.c (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
1691 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
1692 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
1693 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
1694 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
1695 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
1696 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
1697 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
1698 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
1699 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1700 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1701 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1702 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1703 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1704 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1705 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1706 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1707 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1708 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1709 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1710 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1711 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1712 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1713 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1714 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1715 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1716 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF,
1717 EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2, EVEX_W_0F3858_P_2,
1718 EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F3A04_P_2,
1719 EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2): Delete.
1720 (prefix_table): Add EXxEVexR to FMA table entries.
1721 (OP_Rounding): Move abort() invocation.
1722 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
1723 0F60, 0F61, 0F63, 0F67, 0F68, 0F69, 0FD1, 0FD5, 0FD8, 0FD9,
1724 0FDA, 0FDC, 0FDD, 0FDE, 0FE0, 0FE1, 0FE3, 0FE4, 0FE5, 0FE8,
1725 0FE9, 0FEA, 0FEC, 0FED, 0FEE, 0FF1, 0FF5, 0FF6, 0FF8, 0FF9,
1726 0FFC, 0FFD, 0F3800, 0F3804, 0F380B, 0F380C, 0F3818, 0F381C,
1727 0F381D, 0F383C, 0F383E, 0F3858, 0F3878, 0F3879, 0F3896, 0F3897,
1728 0F3898, 0F3899, 0F389C, 0F389D, 0F389E, 0F389F, 0F38A6, 0F38A7,
1729 0F38A8, 0F38A9, 0F38AC, 0F38AD, 0F38AE, 0F38AF, 0F38B6, 0F38B7,
1730 0F38B8, 0F38B9, 0F38BA, 0F38BB, 0F38BC, 0F38BD, 0F38BE, 0F38BF,
1731 0F38CF, 0F38DC, 0F38DD, 0F38DE, 0F38DF, 0F3A04, 0F3A0F, 0F3A44,
1733 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
1734 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
1735 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
1736 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
1737 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
1738 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
1739 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
1740 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
1741 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
1742 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1743 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1744 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1745 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1746 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1747 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1748 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1749 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1750 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1751 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1752 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1753 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1754 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1755 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1756 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1757 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1758 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1759 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF):
1760 Delete table entries.
1761 * i386-dis-evex-w.h (EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2,
1762 EVEX_W_0F3858_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2,
1763 EVEX_W_0F3A04_P_2, EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2):
1768 * i386-dis.c (EXqScalarS): Delete.
1769 (vex_len_table): Replace EXqScalarS by EXqVexScalarS.
1770 * i386-dis-evex-w.h (vmovq): Use EXqVexScalarS.
1774 * i386-dis.c (safe-ctype.h): Include.
1775 (EXdScalar, EXqScalar): Delete.
1776 (d_scalar_mode, q_scalar_mode): Delete.
1777 (prefix_table, vex_len_table): Use EXxmm_md in place of
1778 EXdScalar and EXxmm_mq in place of EXqScalar.
1779 (intel_operand_size, OP_E_memory, OP_EX): Remove uses of
1780 d_scalar_mode and q_scalar_mode.
1781 * i386-dis-evex-w.h (vmovss): Use EXxmm_md.
1782 (vmovsd): Use EXxmm_mq.
1787 * arc-dis.c: Fix spelling mistake.
1788 * po/opcodes.pot: Regenerate.
1792 * po/pt_BR.po: Updated Brazilian Portugugese translation.
1793 * po/uk.po: Updated Ukranian translation.
1797 * configure: Regenerate.
1798 * po/opcodes.pot: Regenerate.
1802 Binutils 2.35 branch created.
1806 * i386-gen.c (opcode_modifiers): Add VexSwapSources.
1807 * i386-opc.h (VexSwapSources): New.
1808 (i386_opcode_modifier): Add vexswapsources.
1809 * i386-opc.tbl: Add VexSwapSources to BMI2 and BMI instructions
1810 with two source operands swapped.
1811 * i386-tbl.h: Regenerated.
1815 * riscv-dis.c (print_insn_args, case 'E'): Updated. Let the
1816 unprivileged CSR can also be initialized.
1820 * arm-dis.c: Use C style comments.
1821 * cr16-opc.c: Likewise.
1822 * ft32-dis.c: Likewise.
1823 * moxie-opc.c: Likewise.
1824 * tic54x-dis.c: Likewise.
1825 * s12z-opc.c: Remove useless comment.
1826 * xgate-dis.c: Likewise.
1830 * i386-opc.tbl: Add a blank line.
1834 * i386-gen.c (opcode_modifiers): Replace VecSIB with SIB.
1835 (VecSIB128): Renamed to ...
1837 (VecSIB256): Renamed to ...
1839 (VecSIB512): Renamed to ...
1841 (VecSIB): Renamed to ...
1843 (i386_opcode_modifier): Replace vecsib with sib.
1844 * i386-opc.tbl (VecSIB128): New.
1845 (VecSIB256): Likewise.
1846 (VecSIB512): Likewise.
1847 Replace VecSIB=1, VecSIB=2 and VecSIB=3 with VecSIB128, VecSIB256
1848 and VecSIB512, respectively.
1852 * i386-dis.c: Adjust description of I macro.
1853 (x86_64_table): Drop use of I.
1854 (float_mem): Replace use of I.
1855 (putop): Remove handling of I. Adjust setting/clearing of "alt".
1859 * i386-dis.c: (print_insn): Avoid straight assignment to
1860 priv.orig_sizeflag when processing -M sub-options.
1864 * i386-dis.c: Adjust description of J macro.
1865 (dis386, x86_64_table, mod_table): Replace J.
1866 (putop): Remove handling of J.
1870 * i386-dis.c: (float_mem): Reduce alternatives for fstpt and fldpt.
1874 * i386-dis.c: Adjust description of "LQ" macro.
1875 (dis386_twobyte): Use LQ for sysret.
1876 (putop): Adjust handling of LQ.
1880 * riscv-opc.c: Move the structures and functions to bfd/elfxx-riscv.c.
1881 * riscv-dis.c: Include elfxx-riscv.h.
1885 * i386-dis.c (prefix_table): Revert the last vmgexit change.
1889 * i386-dis.c (prefix_table): Delete the incorrect vmgexit.
1894 * i386-dis.c (prefix_table): Replace xsuspldtrk with xsusldtrk.
1895 * i386-opc.tbl: Likewise.
1896 * i386-tbl.h: Regenerated.
1900 * riscv-opc.c (priv_specs): Remove v1.9 and PRIV_SPEC_CLASS_1P9.
1904 * aarch64-opc.c (SYSREG): New macro for describing system registers.
1905 (SR_CORE): Likewise.
1906 (SR_FEAT): Likewise.
1908 (SR_V8_1): Likewise.
1909 (SR_V8_2): Likewise.
1910 (SR_V8_3): Likewise.
1911 (SR_V8_4): Likewise.
1914 (SR_SSBS): Likewise.
1916 (SR_ID_PFR2): Likewise.
1917 (SR_PROFILE): Likewise.
1918 (SR_MEMTAG): Likewise.
1919 (SR_SCXTNUM): Likewise.
1920 (aarch64_sys_regs): Refactor to store feature information in the table.
1921 (aarch64_sys_reg_supported_p): Collapse logic for system registers
1922 that now describe their own features.
1923 (aarch64_pstatefield_supported_p): Likewise.
1927 * i386-dis.c (prefix_table): Fix a typo in comments.
1931 * i386-dis.c (rex_ignored): Delete.
1932 (ckprefix): Drop rex_ignored initialization.
1933 (get_valid_dis386): Drop setting of rex_ignored.
1934 (print_insn): Drop checking of rex_ignored. Don't record data
1935 size prefix as used with VEX-and-alike encodings.
1939 * i386-dis.c (MOD_0F12_PREFIX_2, MOD_0F16_PREFIX_2,
1940 MOD_VEX_0F12_PREFIX_2, MOD_VEX_0F16_PREFIX_2): New enumerators.
1941 (VEX_LEN_0F12_P_2, VEX_LEN_0F16_P_2): Delete.
1942 (VEX_LEN_0F12_P_2_M_0, VEX_LEN_0F16_P_2_M_0): Define.
1943 (prefix_table): Decode MOD for cases 2 of opcodes 0F12, 0F16,
1944 VEX_0F12, and VEX_0F16.
1945 (vex_len_table): Use X for vmovlp* and vmovh*s. Drop
1946 VEX_LEN_0F12_P_2 and VEX_LEN_0F16_P_2 entries.
1947 (mod_table): Use X for movlpX and movhpX. Drop PREFIX_OPCODE
1948 from movlps and movhlps. New MOD_0F12_PREFIX_2,
1949 MOD_0F16_PREFIX_2, MOD_VEX_0F12_PREFIX_2, and
1950 MOD_VEX_0F16_PREFIX_2 entries.
1954 * i386-dis.c (MOD_EVEX_0F12_PREFIX_2, MOD_EVEX_0F13,
1955 MOD_EVEX_0F16_PREFIX_2, MOD_EVEX_0F17, MOD_EVEX_0F2B): New enumerators.
1956 (PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1957 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F29,
1958 PREFIX_EVEX_0F2B, PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
1959 PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0FC6,
1960 EVEX_W_0F10_P_0, EVEX_W_0F10_P_2, EVEX_W_0F11_P_0,
1961 EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0, EVEX_W_0F12_P_2,
1962 EVEX_W_0F13_P_0, EVEX_W_0F13_P_2, EVEX_W_0F14_P_0,
1963 EVEX_W_0F14_P_2, EVEX_W_0F15_P_0, EVEX_W_0F15_P_2,
1964 EVEX_W_0F16_P_0_M_0, EVEX_W_0F16_P_2, EVEX_W_0F17_P_0,
1965 EVEX_W_0F17_P_2, EVEX_W_0F28_P_0, EVEX_W_0F28_P_2,
1966 EVEX_W_0F29_P_0, EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0,
1967 EVEX_W_0F2B_P_2, EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2,
1968 EVEX_W_0F2F_P_0, EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0,
1969 EVEX_W_0F51_P_2, EVEX_W_0F54_P_0, EVEX_W_0F54_P_2,
1970 EVEX_W_0F55_P_0, EVEX_W_0F55_P_2, EVEX_W_0F56_P_0,
1971 EVEX_W_0F56_P_2, EVEX_W_0F57_P_0, EVEX_W_0F57_P_2,
1972 EVEX_W_0F58_P_0, EVEX_W_0F58_P_2, EVEX_W_0F59_P_0,
1973 EVEX_W_0F59_P_2, EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2,
1974 EVEX_W_0F5D_P_0, EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0,
1975 EVEX_W_0F5E_P_2, EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2,
1976 EVEX_W_0FC2_P_0, EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0,
1977 EVEX_W_0FC6_P_2): Delete.
1978 (print_insn): Add EVEX.W vs embedded prefix consistency check
1979 to prefix validation.
1980 * i386-dis-evex.h (evex_table): Don't further descend for
1981 vunpcklpX, vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX,
1982 and vshufpX. Continue with MOD decoding for opcodes 0F13, 0F17,
1984 * i386-dis-evex-mod.h: Add/adjust vmovlpX/vmovhpX entries.
1985 * i386-dis-evex-prefix.h: Don't further descend for vmovupX,
1986 vucomisX, vcomisX, vsqrtpX, vaddpX, vmulpX, vsubpX, vminpX,
1987 vdivpX, vmaxpX, and vcmppX. Continue with MOD decoding for cases
1988 2 of PREFIX_EVEX_0F12, PREFIX_EVEX_0F16, and PREFIX_EVEX_0F29.
1989 Drop PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1990 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F2B,
1991 PREFIX_EVEX_0F54, PREFIX_EVEX_0F55, PREFIX_EVEX_0F56,
1992 PREFIX_EVEX_0F57, and PREFIX_EVEX_0FC6 entries.
1993 * i386-dis-evex-w.h: Drop EVEX_W_0F10_P_0, EVEX_W_0F10_P_2,
1994 EVEX_W_0F11_P_0, EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0,
1995 EVEX_W_0F12_P_2, EVEX_W_0F12_P_3, EVEX_W_0F13_P_0,
1996 EVEX_W_0F13_P_2, EVEX_W_0F14_P_0, EVEX_W_0F14_P_2,
1997 EVEX_W_0F15_P_0, EVEX_W_0F15_P_2, EVEX_W_0F16_P_0_M_0,
1998 EVEX_W_0F16_P_2, EVEX_W_0F17_P_0, EVEX_W_0F17_P_2,
1999 EVEX_W_0F28_P_0, EVEX_W_0F28_P_2, EVEX_W_0F29_P_0,
2000 EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0, EVEX_W_0F2B_P_2,
2001 EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2, EVEX_W_0F2F_P_0,
2002 EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0, EVEX_W_0F51_P_2,
2003 EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
2004 EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2,
2005 EVEX_W_0F57_P_0, EVEX_W_0F57_P_2, EVEX_W_0F58_P_0,
2006 EVEX_W_0F58_P_2, EVEX_W_0F59_P_0, EVEX_W_0F59_P_2,
2007 EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2, EVEX_W_0F5D_P_0,
2008 EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0, EVEX_W_0F5E_P_2,
2009 EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2, EVEX_W_0FC2_P_0,
2010 EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0, and EVEX_W_0FC6_P_2 entries.
2014 * i386-dis.c (vex_table): Use PREFIX_OPCODE for vunpcklpX,
2015 vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX and vshufpX.
2016 (vex_len_table) : Likewise for vmovlpX, vmovhpX, vmovntpX, and
2018 (print_insn): Drop pointless check against bad_opcode. Split
2019 prefix validation into legacy and VEX-and-alike parts.
2020 (putop): Re-work 'X' macro handling.
2024 * i386-dis.c (MOD_0F51): Rename to ...
2025 (MOD_0F50): ... this.
2029 * arm-dis.c (arm_opcodes): Add dfb.
2030 (thumb32_opcodes): Add dfb.
2034 * i386-opc.h (reg_entry): Const-qualify reg_name field.
2038 * ppc-dis.c (ppc_opts): Accept -mpwr10/-Mpwr10.
2042 * cgen-dis.c (hash_insn_array): Increase size of buf. Assert
2043 size is large enough.
2047 * disassemble.c (disassemble_init_for_target): Set endian_code for
2049 * bpf-desc.c: Regenerate.
2050 * bpf-opc.c: Likewise.
2051 * bpf-dis.c: Likewise.
2055 * cgen-opc.c (cgen_get_insn_value): Get an `endian' argument.
2056 (cgen_put_insn_value): Likewise.
2057 (cgen_lookup_insn): Pass endianness to cgen_{get,put}_insn_value.
2058 * cgen-dis.in (print_insn): Likewise.
2059 * cgen-ibld.in (insert_1): Likewise.
2060 (insert_1): Likewise.
2061 (insert_insn_normal): Likewise.
2062 (extract_1): Likewise.
2063 * bpf-dis.c: Regenerate.
2064 * bpf-ibld.c: Likewise.
2065 * bpf-ibld.c: Likewise.
2066 * cgen-dis.in: Likewise.
2067 * cgen-ibld.in: Likewise.
2068 * cgen-opc.c: Likewise.
2069 * epiphany-dis.c: Likewise.
2070 * epiphany-ibld.c: Likewise.
2071 * fr30-dis.c: Likewise.
2072 * fr30-ibld.c: Likewise.
2073 * frv-dis.c: Likewise.
2074 * frv-ibld.c: Likewise.
2075 * ip2k-dis.c: Likewise.
2076 * ip2k-ibld.c: Likewise.
2077 * iq2000-dis.c: Likewise.
2078 * iq2000-ibld.c: Likewise.
2079 * lm32-dis.c: Likewise.
2080 * lm32-ibld.c: Likewise.
2081 * m32c-dis.c: Likewise.
2082 * m32c-ibld.c: Likewise.
2083 * m32r-dis.c: Likewise.
2084 * m32r-ibld.c: Likewise.
2085 * mep-dis.c: Likewise.
2086 * mep-ibld.c: Likewise.
2087 * mt-dis.c: Likewise.
2088 * mt-ibld.c: Likewise.
2089 * or1k-dis.c: Likewise.
2090 * or1k-ibld.c: Likewise.
2091 * xc16x-dis.c: Likewise.
2092 * xc16x-ibld.c: Likewise.
2093 * xstormy16-dis.c: Likewise.
2094 * xstormy16-ibld.c: Likewise.
2098 * cgen-dis.in (cpu_desc_list): New field `insn_endian'.
2099 (print_insn_): Handle instruction endian.
2100 * bpf-dis.c: Regenerate.
2101 * bpf-desc.c: Regenerate.
2102 * epiphany-dis.c: Likewise.
2103 * epiphany-desc.c: Likewise.
2104 * fr30-dis.c: Likewise.
2105 * fr30-desc.c: Likewise.
2106 * frv-dis.c: Likewise.
2107 * frv-desc.c: Likewise.
2108 * ip2k-dis.c: Likewise.
2109 * ip2k-desc.c: Likewise.
2110 * iq2000-dis.c: Likewise.
2111 * iq2000-desc.c: Likewise.
2112 * lm32-dis.c: Likewise.
2113 * lm32-desc.c: Likewise.
2114 * m32c-dis.c: Likewise.
2115 * m32c-desc.c: Likewise.
2116 * m32r-dis.c: Likewise.
2117 * m32r-desc.c: Likewise.
2118 * mep-dis.c: Likewise.
2119 * mep-desc.c: Likewise.
2120 * mt-dis.c: Likewise.
2121 * mt-desc.c: Likewise.
2122 * or1k-dis.c: Likewise.
2123 * or1k-desc.c: Likewise.
2124 * xc16x-dis.c: Likewise.
2125 * xc16x-desc.c: Likewise.
2126 * xstormy16-dis.c: Likewise.
2127 * xstormy16-desc.c: Likewise.
2131 * po/sr.po: Updated Serbian translation.
2135 * riscv-opc.c (riscv_get_isa_spec_class): Change bfd_boolean to int.
2136 (riscv_get_priv_spec_class): Likewise.
2140 * bpf-desc.c: Regenerate.
2145 * bpf-desc.c: Regenerate.
2146 * bpf-opc.h: Likewise.
2147 * bpf-opc.c: Likewise.
2148 * bpf-dis.c: Likewise.
2152 * nios2-dis.c (nios2_print_insn_arg): Avoid shift left of negative
2157 * ns32k-dis.c (print_insn_arg): Handle d value of 'f' for
2159 (print_insn_ns32k): Revert last change.
2163 * ns32k-dis.c (print_insn_ns32k): Change the arg_bufs array to
2168 Fix extraction of signed constants in nios2 disassembler (again).
2170 * nios2-dis.c (nios2_print_insn_arg): Add explicit casts to
2171 extractions of signed fields.
2175 * s390-opc.txt: Relocate vector load/store instructions with
2176 additional alignment parameter and change architecture level
2177 constraint from z14 to z13.
2181 * arc-ext.c: Replace "if (x) free (x)" with "free (x)" throughout.
2182 * sparc-dis.c: Likewise.
2183 * tic4x-dis.c: Likewise.
2184 * xtensa-dis.c: Likewise.
2185 * bpf-desc.c: Regenerate.
2186 * epiphany-desc.c: Regenerate.
2187 * fr30-desc.c: Regenerate.
2188 * frv-desc.c: Regenerate.
2189 * ip2k-desc.c: Regenerate.
2190 * iq2000-desc.c: Regenerate.
2191 * lm32-desc.c: Regenerate.
2192 * m32c-desc.c: Regenerate.
2193 * m32r-desc.c: Regenerate.
2194 * mep-asm.c: Regenerate.
2195 * mep-desc.c: Regenerate.
2196 * mt-desc.c: Regenerate.
2197 * or1k-desc.c: Regenerate.
2198 * xc16x-desc.c: Regenerate.
2199 * xstormy16-desc.c: Regenerate.
2203 * riscv-opc.c (riscv_ext_version_table): The table used to store
2204 all information about the supported spec and the corresponding ISA
2205 versions. Currently, only Zicsr is supported to verify the
2206 correctness of Z sub extension settings. Others will be supported
2207 in the future patches.
2208 (struct isa_spec_t, isa_specs): List for all supported ISA spec
2209 classes and the corresponding strings.
2210 (riscv_get_isa_spec_class): New function. Get the corresponding ISA
2211 spec class by giving a ISA spec string.
2212 * riscv-opc.c (struct priv_spec_t): New structure.
2213 (struct priv_spec_t priv_specs): List for all supported privilege spec
2214 classes and the corresponding strings.
2215 (riscv_get_priv_spec_class): New function. Get the corresponding
2216 privilege spec class by giving a spec string.
2217 (riscv_get_priv_spec_name): New function. Get the corresponding
2218 privilege spec string by giving a CSR version class.
2219 * riscv-dis.c: Updated since DECLARE_CSR is changed.
2220 * riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR
2221 according to the chosen version. Build a hash table riscv_csr_hash to
2222 store the valid CSR for the chosen pirv verison. Dump the direct
2223 CSR address rather than it's name if it is invalid.
2224 (parse_riscv_dis_option_without_args): New function. Parse the options
2226 (parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to
2227 parse the options without arguments first, and then handle the options
2228 with arguments. Add the new option -Mpriv-spec, which has argument.
2229 * riscv-dis.c (print_riscv_disassembler_options): Add description
2230 about the new OBJDUMP option.
2234 * ppc-opc.c (insert_ls, extract_ls): Handle 3-bit L fields and new
2235 WC values on POWER10 sync, dcbf and wait instructions.
2236 (insert_pl, extract_pl): New functions.
2237 (L2OPT, LS, WC): Use insert_ls and extract_ls.
2238 (LS3): New , 3-bit L for sync.
2239 (LS3, L3OPT): New, 3-bit L for sync and dcbf.
2240 (SC2, PL): New, 2-bit SC and PL for sync and wait.
2241 (XWCPL_MASK, XL3RT_MASK, XSYNCLS_MASK): New instruction masks.
2242 (XOPL3, XWCPL, XSYNCLS): New opcode macros.
2243 (powerpc_opcodes) <dcbflp, dcbfps, dcbstps pause_short, phwsync,
2244 plwsync, stcisync, stncisync, stsync, waitrsv>: New extended mnemonics.
2245 <wait>: Enable PL operand on POWER10.
2246 <dcbf>: Enable L3OPT operand on POWER10.
2247 <sync>: Enable SC2 operand on POWER10.
2252 * or1k-asm.c: Regenerate.
2253 * or1k-desc.c: Regenerate.
2254 * or1k-desc.h: Regenerate.
2255 * or1k-dis.c: Regenerate.
2256 * or1k-ibld.c: Regenerate.
2257 * or1k-opc.c: Regenerate.
2258 * or1k-opc.h: Regenerate.
2259 * or1k-opinst.c: Regenerate.
2263 * ppc-opc (powerpc_opcodes): Add xscmpeqqp, xscmpgeqp, xscmpgtqp,
2268 * ppc-opc.c (powerpc_opcodes): Add lxvrbx, lxvrhx, lxvrwx, lxvrdx,
2269 stxvrbx, stxvrhx, stxvrwx, stxvrdx.
2273 * ppc-opc.c (powerpc_opcodes): Add xvtlsbb.
2277 * ppc-opc.c (powerpc_opcodes): Add vstribl, vstribr, vstrihl, vstrihr,
2278 vclrlb, vclrrb, vstribl., vstribr., vstrihl., vstrihr..
2282 * ppc-opc.c (powerpc_opcodes) <setbc, setbcr, setnbc, setnbcr>: New
2287 * ppc-opc.c (UIM8, P_U8XX4_MASK): Define.
2288 (powerpc_opcodes): Add vgnb, vcfuged, vpextd, vpdepd, vclzdm,
2289 vctzdm, cntlzdm, pdepd, pextd, cfuged, cnttzdm.
2290 (prefix_opcodes): Add xxeval.
2294 * ppc-opc.c (powerpc_opcodes): Add xxgenpcvbm, xxgenpcvhm,
2295 xxgenpcvwm, xxgenpcvdm.
2299 * ppc-opc.c (MP, VXVAM_MASK): Define.
2300 (VXVAPS_MASK): Use VXVA_MASK.
2301 (powerpc_opcodes): Add mtvsrbmi, vexpandbm, vexpandhm, vexpandwm,
2302 vexpanddm, vexpandqm, vextractbm, vextracthm, vextractwm,
2303 vextractdm, vextractqm, mtvsrbm, mtvsrhm, mtvsrwm, mtvsrdm, mtvsrqm,
2304 vcntmbb, vcntmbh, vcntmbw, vcntmbd.
2309 * ppc-opc.c (insert_xa6a, extract_xa6a, insert_xb6a, extract_xb6a):
2311 (powerpc_operands): Define ACC, PMSK8, PMSK4, PMSK2, XMSK, YMSK,
2312 YMSK2, XA6a, XA6ap, XB6a entries.
2313 (PMMIRR, P_X_MASK, P_XX1_MASK, P_GER_MASK): Define
2314 (P_GER2_MASK, P_GER4_MASK, P_GER8_MASK, P_GER64_MASK): Define.
2316 (powerpc_opcodes): Add xxmfacc, xxmtacc, xxsetaccz,
2317 xvi8ger4pp, xvi8ger4, xvf16ger2pp, xvf16ger2, xvf32gerpp, xvf32ger,
2318 xvi4ger8pp, xvi4ger8, xvi16ger2spp, xvi16ger2s, xvbf16ger2pp,
2319 xvbf16ger2, xvf64gerpp, xvf64ger, xvi16ger2, xvf16ger2np,
2320 xvf32gernp, xvi8ger4spp, xvi16ger2pp, xvbf16ger2np, xvf64gernp,
2321 xvf16ger2pn, xvf32gerpn, xvbf16ger2pn, xvf64gerpn, xvf16ger2nn,
2322 xvf32gernn, xvbf16ger2nn, xvf64gernn, xvcvbf16sp, xvcvspbf16.
2323 (prefix_opcodes): Add pmxvi8ger4pp, pmxvi8ger4, pmxvf16ger2pp,
2324 pmxvf16ger2, pmxvf32gerpp, pmxvf32ger, pmxvi4ger8pp, pmxvi4ger8,
2325 pmxvi16ger2spp, pmxvi16ger2s, pmxvbf16ger2pp, pmxvbf16ger2,
2326 pmxvf64gerpp, pmxvf64ger, pmxvi16ger2, pmxvf16ger2np, pmxvf32gernp,
2327 pmxvi8ger4spp, pmxvi16ger2pp, pmxvbf16ger2np, pmxvf64gernp,
2328 pmxvf16ger2pn, pmxvf32gerpn, pmxvbf16ger2pn, pmxvf64gerpn,
2329 pmxvf16ger2nn, pmxvf32gernn, pmxvbf16ger2nn, pmxvf64gernn.
2333 * ppc-opc.c (insert_imm32, extract_imm32): New functions.
2334 (insert_xts, extract_xts): New functions.
2335 (IMM32, UIM3, IX, UIM5, SH3, XTS, P8RR): Define.
2336 (P_XX4_MASK, P_UXX4_MASK, VSOP, P_VS_MASK, P_VSI_MASK): Define.
2337 (VXRC_MASK, VXSH_MASK): Define.
2338 (powerpc_opcodes): Add vinsbvlx, vsldbi, vextdubvlx, vextdubvrx,
2339 vextduhvlx, vextduhvrx, vextduwvlx, vextduwvrx, vextddvlx,
2340 vextddvrx, vinshvlx, vinswvlx, vinsw, vinsbvrx, vinshvrx,
2341 vinswvrx, vinsd, vinsblx, vsrdbi, vinshlx, vinswlx, vinsdlx,
2342 vinsbrx, vinshrx, vinswrx, vinsdrx, lxvkq.
2343 (prefix_opcodes): Add xxsplti32dx, xxspltidp, xxspltiw, xxblendvb,
2344 xxblendvh, xxblendvw, xxblendvd, xxpermx.
2348 * ppc-opc.c (powerpc_opcodes): Add vrlq, vdivuq, vmsumcud, vrlqmi,
2349 vmuloud, vcmpuq, vslq, vdivsq, vcmpsq, vrlqnm, vcmpequq, vmulosd,
2350 vsrq, vdiveuq, vcmpgtuq, vmuleud, vsraq, vdivesq, vcmpgtsq, vmulesd,
2351 vcmpequq., vextsd2q, vmoduq, vcmpgtuq., vmodsq, vcmpgtsq., xscvqpuqz,
2352 xscvuqqp, xscvqpsqz, xscvsqqp, dcffixqq, dctfixqq.
2356 * ppc-opc.c (insert_xtp, extract_xtp): New functions.
2357 (XTP, DQXP, DQXP_MASK): Define.
2358 (powerpc_opcodes): Add lxvp, stxvp, lxvpx, stxvpx.
2359 (prefix_opcodes): Add plxvp and pstxvp.
2363 * ppc-opc.c (powerpc_opcodes): Add vdivuw, vdivud, vdivsw, vmulld,
2364 vdivsd, vmulhuw, vdiveuw, vmulhud, vdiveud, vmulhsw, vdivesw,
2365 vmulhsd, vdivesd, vmoduw, vmodud, vmodsw, vmodsd.
2369 * ppc-opc.c (powerpc_opcodes) <brd, brh, brw>: New mnemonics.
2373 * ppc-opc.c (insert_l1opt, extract_l1opt): New functions.
2375 (powerpc_opcodes) <paste.>: Add L operand for cpu POWER10.
2379 * ppc-opc.c (powerpc_opcodes) <slbiag>: Add variant with L operand.
2383 * ppc-dis.c (powerpc_init_dialect): Default to "power10".
2387 * ppc-dis.c (ppc_opts): Add "power10" entry.
2388 (print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming.
2389 * ppc-opc.c (POWER10): Rename from POWERXX. Update all uses.
2393 * po/fr.po: Updated French translation.
2397 * aarch64-opc.h (enum aarch64_field_kind): Add FLD_imm16_2.
2398 * aarch64-opc.c (fields): Add entry for FLD_imm16_2.
2399 (operand_general_constraint_met_p): validate
2400 AARCH64_OPND_UNDEFINED.
2401 * aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry
2403 * aarch64-asm-2.c: Regenerated.
2404 * aarch64-dis-2.c: Regenerated.
2405 * aarch64-opc-2.c: Regenerated.
2410 * sh-opc.h: Also use unsigned 8-bit immediate values for the LDRC
2415 * po/sv.po: Updated Swedish translation.
2420 * sh-opc.h (IMM0_8): Replace with IMM0_8S and IMM0_8U. Use
2421 IMM0_8S for arithmetic insns and IMM0_8U for logical insns.
2422 * sh-dis.c (print_insn_sh): Change IMM0_8 case to IMM0_8S and add
2428 * m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of
2429 cmpi only on m68020up and cpu32.
2433 * aarch64-asm.c (aarch64_ins_none): New.
2434 * aarch64-asm.h (ins_none): New declaration.
2435 * aarch64-dis.c (aarch64_ext_none): New.
2436 * aarch64-dis.h (ext_none): New declaration.
2437 * aarch64-opc.c (aarch64_print_operand): Update case for
2438 AARCH64_OPND_BARRIER_PSB.
2439 * aarch64-tbl.h (aarch64_opcode_table): Add tsb.
2440 (AARCH64_OPERANDS): Update inserter/extracter for
2441 AARCH64_OPND_BARRIER_PSB to use new dummy functions.
2442 * aarch64-asm-2.c: Regenerated.
2443 * aarch64-dis-2.c: Regenerated.
2444 * aarch64-opc-2.c: Regenerated.
2448 * aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): Remove.
2449 (aarch64_feature_ras, RAS): Likewise.
2450 (aarch64_feature_stat_profile, STAT_PROFILE): Likewise.
2451 (aarch64_opcode_table): Update bti, xpaclri, pacia1716, pacib1716,
2452 autia1716, autib1716, esb, psb, dgh, paciaz, paciasp, pacibz, pacibsp,
2453 autiaz, autiasp, autibz, autibsp to be CORE_INSN.
2454 * aarch64-asm-2.c: Regenerated.
2455 * aarch64-dis-2.c: Regenerated.
2456 * aarch64-opc-2.c: Regenerated.
2460 * arm-dis.c (neon_opcodes): Fix VDUP instruction masks.
2461 (print_insn_neon): Support disassembly of conditional
2466 * bpf-desc.c: Regenerate.
2467 * bpf-desc.h: Likewise.
2468 * bpf-opc.c: Regenerate.
2469 * bpf-opc.h: Likewise.
2473 * i386-dis.c (enum): Add PREFIX_0F01_REG_5_MOD_3_RM_1,
2474 (prefix_table): New instructions (see prefixes above).
2475 (rm_table): Likewise
2476 * i386-gen.c (cpu_flag_init): Add CPU_TSXLDTRK_FLAGS,
2477 CPU_ANY_TSXLDTRK_FLAGS.
2478 (cpu_flags): Add CpuTSXLDTRK.
2479 * i386-opc.h (enum): Add CpuTSXLDTRK.
2480 (i386_cpu_flags): Add cputsxldtrk.
2481 * i386-opc.tbl: Add XSUSPLDTRK insns.
2482 * i386-init.h: Regenerate.
2483 * i386-tbl.h: Likewise.
2487 * i386-dis.c (prefix_table): New instructions serialize.
2488 * i386-gen.c (cpu_flag_init): Add CPU_SERIALIZE_FLAGS,
2489 CPU_ANY_SERIALIZE_FLAGS.
2490 (cpu_flags): Add CpuSERIALIZE.
2491 * i386-opc.h (enum): Add CpuSERIALIZE.
2492 (i386_cpu_flags): Add cpuserialize.
2493 * i386-opc.tbl: Add SERIALIZE insns.
2494 * i386-init.h: Regenerate.
2495 * i386-tbl.h: Likewise.
2499 * disassemble.h (opcodes_assert): Declare.
2500 (OPCODES_ASSERT): Define.
2501 * disassemble.c: Don't include assert.h. Include opintl.h.
2502 (opcodes_assert): New function.
2503 * h8300-dis.c (bfd_h8_disassemble_init): Use OPCODES_ASSERT.
2504 (bfd_h8_disassemble): Reduce size of data array. Correctly
2505 calculate maxlen. Omit insn decoding when insn length exceeds
2506 maxlen. Exit from nibble loop when looking for E, before
2507 accessing next data byte. Move processing of E outside loop.
2508 Replace tests of maxlen in loop with assertions.
2512 * arc-dis.c (find_format): Init needs_limm. Simplify use of limm.
2516 * z80-dis.c (suffix): Init mybuf.
2520 * h8300-dis.c (bfd_h8_disassemble): Limit data[] access to that
2521 successflly read from section.
2525 * arc-dis.c (find_format): Use ISO C string concatenation rather
2526 than line continuation within a string. Don't access needs_limm
2527 before testing opcode != NULL.
2531 * ns32k-dis.c (print_insn_arg): Update comment.
2532 (print_insn_ns32k): Reduce size of index_offset array, and
2533 initialize, passing -1 to print_insn_arg for args that are not
2534 an index. Don't exit arg loop early. Abort on bad arg number.
2538 * s12z-dis.c (abstract_read_memory): Don't print error on EOI.
2539 * s12z-opc.c: Formatting.
2540 (operands_f): Return an int.
2541 (opr_n_bytes_p1): Return -1 on reaching buffer memory limit.
2542 (opr_n_bytes2, bfextins_n_bytes, mul_n_bytes, bm_n_bytes),
2543 (shift_n_bytes, mov_imm_opr_n_bytes, loop_prim_n_bytes),
2544 (exg_sex_discrim): Likewise.
2545 (create_immediate_operand, create_bitfield_operand),
2546 (create_register_operand_with_size, create_register_all_operand),
2547 (create_register_all16_operand, create_simple_memory_operand),
2548 (create_memory_operand, create_memory_auto_operand): Don't
2549 segfault on malloc failure.
2550 (z_ext24_decode): Return an int status, negative on fail, zero
2552 (x_imm1, imm1_decode, trap_decode, z_opr_decode, z_opr_decode2),
2553 (imm1234, reg_s_imm, reg_s_opr, z_imm1234_8base, z_imm1234_0base),
2554 (z_tfr, z_reg, reg_xy, lea_reg_xys_opr, lea_reg_xys, rel_15_7),
2555 (decode_rel_15_7, cmp_xy, sub_d6_x_y, sub_d6_y_x),
2556 (ld_18bit_decode, mul_decode, bm_decode, bm_rel_decode),
2557 (mov_imm_opr, ld_18bit_decode, exg_sex_decode),
2558 (loop_primitive_decode, shift_decode, psh_pul_decode),
2559 (bit_field_decode): Similarly.
2560 (z_decode_signed_value, decode_signed_value): Similarly. Add arg
2561 to return value, update callers.
2562 (x_opr_decode_with_size): Check all reads, returning NULL on fail.
2563 Don't segfault on NULL operand.
2564 (decode_operation): Return OP_INVALID on first fail.
2565 (decode_s12z): Check all reads, returning -1 on fail.
2569 * metag-dis.c (print_insn_metag): Don't ignore status from
2574 * nds32-dis.c (print_insn_nds32): Remove unnecessary casts.
2575 Initialize parts of buffer not written when handling a possible
2576 2-byte insn at end of section. Don't attempt decoding of such
2577 an insn by the 4-byte machinery.
2581 * ppc-dis.c (print_insn_powerpc): Only clear needed bytes of
2582 partially filled buffer. Prevent lookup of 4-byte insns when
2583 only VLE 2-byte insns are possible due to section size. Print
2584 ".word" rather than ".long" for 2-byte leftovers.
2589 * z80-dis.c: Fix disassembling ED+A4/AC/B4/BC opcodes.
2593 * i386-dis.c (X86_64_0D): Rename to ...
2594 (X86_64_0E): ... this.
2598 * Makefile.am ($(srcdir)/i386-init.h): Also pass -P to $(CPP).
2599 * Makefile.in: Regenerated.
2603 * i386-opc.tbl (avx_irel): New. Use is for AVX512 vpcmp*
2605 * i386-tbl.h: Re-generate.
2609 * i386-opc.tbl (xop_elem, xop_irel, xop_sign): New. Use them for XOP vpcom*,
2610 vprot*, vpsha*, and vpshl*.
2611 * i386-tbl.h: Re-generate.
2615 * i386-opc.tbl (avx_frel): New. Use it for AVX/AVX512 vcmpps,
2616 vcmpss, vcmppd, and vcmpsd 3-operand pseudo-ops.
2617 * i386-tbl.h: Re-generate.
2621 * i386-gen.c (set_bitfield): Ignore zero-length field names.
2622 * i386-opc.tbl (sse_frel): New. Use it for SSE/SSE2 cmpps,
2623 cmpss, cmppd, and cmpsd 2-operand pseudo-ops.
2624 * i386-tbl.h: Re-generate.
2628 * i386-gen.c (struct template_arg, struct template_instance,
2629 struct template_param, struct template, templates,
2630 parse_template, expand_templates): New.
2631 (process_i386_opcodes): Various local variables moved to
2632 expand_templates. Call parse_template and expand_templates.
2633 * i386-opc.tbl (cc): New. Use it for Jcc, SETcc, and CMOVcc.
2634 * i386-tbl.h: Re-generate.
2638 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd, vcvtps2ph,
2639 vcvtps2qq, vcvtps2uqq, vcvttps2qq, vcvttps2uqq): Fold separate
2640 register and memory source templates. Replace VexW= by VexW*
2642 * i386-tbl.h: Re-generate.
2646 * i386-opc.tbl: Drop IgnoreSize from various SIMD insns. Replace
2647 VexW= by VexW* and VexVVVV=1 by just VexVVVV where applicable.
2648 * i386-tbl.h: Re-generate.
2652 * i386-opc.tbl (fildll, fistpll, fisttpll): Add ATTSyntax.
2653 * i386-tbl.h: Re-generate.
2657 * i386-opc.tbl (movq): Drop NoRex64 from XMM/XMM SSE2AVX variants.
2658 (movmskps, pextrw, pinsrw, pmovmskb, movmskpd, extractps,
2659 pextrb, pinsrb, roundsd): Drop NoRex64 and where applicable use
2660 VexW0 on SSE2AVX variants.
2661 (vmovq): Drop NoRex64 from XMM/XMM variants.
2662 (vextractps, vmovmskpd, vmovmskps, vpextrb, vpextrw, vpinsrb,
2663 vpinsrw, vpmovmskb, vroundsd, vpmovmskb): Drop NoRex64 and where
2664 applicable use VexW0.
2665 * i386-tbl.h: Re-generate.
2669 * i386-gen.c (opcode_modifiers): Remove Rex64 field.
2670 * i386-opc.h (Rex64): Delete.
2671 (struct i386_opcode_modifier): Remove rex64 field.
2672 * i386-opc.tbl (crc32): Drop Rex64.
2673 Replace Rex64 with Size64 everywhere else.
2674 * i386-tbl.h: Re-generate.
2678 * i386-dis.c (OP_E_memory): Exclude recording of used address
2679 prefix for "bnd" modes only in 64-bit mode. Don't decode 16-bit
2680 addressed memory operands for MPX insns.
2684 * i386-opc.tbl (movmskps, mwait, vmread, vmwrite, invept,
2685 invvpid, invpcid, rdfsbase, rdgsbase, wrfsbase, wrgsbase, adcx,
2686 adox, mwaitx, rdpid, movdiri): Add IgnoreSize.
2687 (ptwrite): Split into non-64-bit and 64-bit forms.
2688 * i386-tbl.h: Re-generate.
2692 * i386-opc.tbl (tpause, umwait): Add IgnoreSize. Add 3-operand
2694 * i386-tbl.h: Re-generate.
2698 * i386-dis.c (PREFIX_0F01_REG_3_RM_1): New.
2699 (prefix_table): Move vmmcall here. Add vmgexit.
2700 (rm_table): Replace vmmcall entry by prefix_table[] escape.
2701 * i386-gen.c (cpu_flag_init): Add CPU_SEV_ES_FLAGS entry.
2702 (cpu_flags): Add CpuSEV_ES entry.
2703 * i386-opc.h (CpuSEV_ES): New.
2704 (union i386_cpu_flags): Add cpusev_es field.
2705 * i386-opc.tbl (vmgexit): New.
2706 * i386-init.h, i386-tbl.h: Re-generate.
2710 * i386-gen.c (opcode_modifiers): Replace IgnoreSize/DefaultSize
2712 * i386-opc.h (IGNORESIZE): New.
2713 (DEFAULTSIZE): Likewise.
2714 (IgnoreSize): Removed.
2715 (DefaultSize): Likewise.
2716 (MnemonicSize): New.
2717 (i386_opcode_modifier): Replace ignoresize/defaultsize with
2719 * i386-opc.tbl (IgnoreSize): New.
2720 (DefaultSize): Likewise.
2721 * i386-tbl.h: Regenerated.
2726 * z80-dis.c: Fix disassembly of LD IY,(HL) and D (HL),IX
2732 * i386-opc.tbl: Add IgnoreSize to cvtsi2sd, cvtsi2ss, vcvtsi2sd,
2733 vcvtsi2ss, vcvtusi2sd and vcvtusi2ss for AT&T syntax.
2734 * i386-tbl.h: Regenerated.
2738 * aarch64-asm.c: Indent labels correctly.
2739 * aarch64-dis.c: Likewise.
2740 * aarch64-gen.c: Likewise.
2741 * aarch64-opc.c: Likewise.
2742 * alpha-dis.c: Likewise.
2743 * i386-dis.c: Likewise.
2744 * nds32-asm.c: Likewise.
2745 * nfp-dis.c: Likewise.
2746 * visium-dis.c: Likewise.
2750 * arc-regs.h (int_vector_base): Make it available for all ARC
2755 * riscv-dis.c (print_insn_args): Updated since the DECLARE_CSR is
2760 * riscv-opc.c (riscv_opcodes): Convert add/addi to the compressed
2761 c.mv/c.li if rs1 is zero.
2765 * i386-gen.c (cpu_flag_init): Replace CpuABM with
2766 CpuLZCNT|CpuPOPCNT. Add CpuPOPCNT to CPU_SSE4_2_FLAGS. Add
2768 (cpu_flags): Remove CpuABM. Add CpuPOPCNT.
2769 * i386-opc.h (CpuABM): Removed.
2771 (i386_cpu_flags): Remove cpuabm. Add cpupopcnt.
2772 * i386-opc.tbl: Replace CpuABM|CpuSSE4_2 with CpuPOPCNT on
2773 popcnt. Remove CpuABM from lzcnt.
2774 * i386-init.h: Regenerated.
2775 * i386-tbl.h: Likewise.
2779 * i386-opc.tbl (vcvtsi2sd, vcvtsi2ss, vcvtusi2sd, vcvtusi2ss):
2780 Fold CpuNo64 and Cpu64 templates. Use VexLIG/EVexLIG and VexW0/
2781 VexW1 instead of open-coding them.
2782 * i386-tbl.h: Re-generate.
2786 * i386-opc.tbl (AddrPrefixOpReg): Define.
2787 (monitor, invlpga, vmload, vmrun, vmsave, clzero, monitorx,
2788 umonitor, movdir64b, enqcmd, enqcmds): Fold Cpu64 and CpuNo64
2789 templates. Drop NoRex64.
2790 * i386-tbl.h: Re-generate.
2795 * i386-opc.tbl (vcvtpd2dq, vcvtpd2ps, vcvttpd2dq, vcvtpd2udq,
2796 vcvttpd2udq, vcvtqq2ps, vcvtuqq2ps): Split XMM/YMM source forms
2797 into Intel syntax instance (with Unpsecified) and AT&T one
2799 (vcvtneps2bf16): Likewise, along with folding the two so far
2801 * i386-tbl.h: Re-generate.
2805 * i386-gen.c (cpu_flag_init): Remove CPU_ANY_SSE3_FLAGS from
2806 CPU_ANY_SSE4A_FLAGS.
2810 * i386-gen.c (cpu_flag_init): Correct last change.
2814 * i386-gen.c (cpu_flag_init): Add CPU_ANY_SSE4A_FLAGS. Remove
2819 * i386-opc.tbl (movsx): Remove Intel syntax comments.
2825 * i386-opc.tbl (movsx): Fold patterns. Also allow Reg32 as
2826 destination for Cpu64-only variant.
2827 (movzx): Fold patterns.
2828 * i386-tbl.h: Re-generate.
2832 * i386-gen.c (cpu_flag_init): Move CpuSSE4a from
2833 CPU_ANY_SSE_FLAGS entry to CPU_ANY_SSE3_FLAGS one. Add
2834 CPU_ANY_SSE4_FLAGS entry.
2835 * i386-init.h: Re-generate.
2839 * i386-opc.tbl (vfpclasspd, vfpclassps): Add Intel sytax form
2840 with Unspecified, making the present one AT&T syntax only.
2841 * i386-tbl.h: Re-generate.
2845 * i386-opc.tbl (jmp): Fold CpuNo64 and Amd64 direct variants.
2846 * i386-tbl.h: Re-generate.
2851 * i386-dis.c (putop): Handle REX.W in '^' case for Intel64 mode.
2852 * i386-opc.tbl (lfs, lgs, lss, lcall, ljmp): Split into
2853 Amd64 and Intel64 templates.
2854 (call, jmp): Likewise for far indirect variants. Dro
2856 * i386-tbl.h: Re-generate.
2860 * i386-gen.c (opcode_modifiers): Remove ShortForm entry.
2861 * i386-opc.h (ShortForm): Delete.
2862 (struct i386_opcode_modifier): Remove shortform field.
2863 * i386-opc.tbl (mov, movabs, push, pop, xchg, inc, dec, fld,
2864 fst, fstp, fxch, fcom, fcomp, fucom, fucomp, fadd, faddp, fsub,
2865 fsubp, fsubr, fsubrp, fmul, fmulp, fdiv, fdivp, fdivr, fdivrp,
2866 ffreep, bswap, fcmov*, fcomi, fcomip, fucomi, fucomip, movq):
2868 * i386-tbl.h: Re-generate.
2872 * i386-opc.tbl (fcomi, fucomi, fcomip, fcompi, fucomip,
2873 fucompi): Drop ShortForm from operand-less templates.
2874 * i386-tbl.h: Re-generate.
2878 * cgen-ibld.in (extract_normal): Set *valuep on all return paths.
2879 * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
2880 * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
2881 * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
2882 * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
2886 * arm-dis.c (print_insn_cde): Define 'V' parse character.
2887 (cde_opcodes): Add VCX* instructions.
2892 * arm-dis.c (struct cdeopcode32): New.
2893 (CDE_OPCODE): New macro.
2894 (cde_opcodes): New disassembly table.
2895 (regnames): New option to table.
2896 (cde_coprocs): New global variable.
2897 (print_insn_cde): New
2898 (print_insn_thumb32): Use print_insn_cde.
2899 (parse_arm_disassembler_options): Parse coprocN args.
2904 * i386-gen.c (opcode_modifiers): Replace AMD64 and Intel64
2906 * i386-opc.h (AMD64): Removed.
2907 (Intel64): Likewose.
2909 (INTEL64): Likewise.
2910 (INTEL64ONLY): Likewise.
2911 (i386_opcode_modifier): Replace amd64 and intel64 with isa64.
2912 * i386-opc.tbl (Amd64): New.
2913 (Intel64): Likewise.
2914 (Intel64Only): Likewise.
2915 Replace AMD64 with Amd64. Update sysenter/sysenter with
2916 Cpu64 and Intel64Only. Remove AMD64 from sysenter/sysenter.
2917 * i386-tbl.h: Regenerated.
2922 * z80-dis.c: Add support for GBZ80 opcodes.
2926 * d30v-dis.c (print_insn): Make "val" and "opnum" unsigned.
2930 * m32c-ibld.c: Regenerate.
2934 * frv-ibld.c: Regenerate.
2938 * i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete.
2939 (intel_operand_size, OP_EX): Drop xmm_mdq_mode case label.
2940 (OP_E_memory): Replace xmm_mdq_mode case label by
2941 vex_scalar_w_dq_mode one.
2942 * i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar.
2946 * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete.
2947 (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode,
2948 vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments.
2949 (intel_operand_size): Drop vex_w_dq_mode case label.
2953 * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
2954 Remove C_SCAN_MOVPRFX for SVE bfcvtnt.
2958 * m32c-ibld.c: Regenerate.
2962 * bpf-opc.c: Regenerate.
2966 * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators.
2967 (dis386): Use them to replace C2/C3 table entries.
2968 (x86_64_table): Add X86_64_C2 and X86_64_C3 entries.
2969 * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64
2970 ones. Use Size64 instead of DefaultSize on Intel64 ones.
2971 * i386-tbl.h: Re-generate.
2975 * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
2977 (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
2979 * i386-tbl.h: Re-generate.
2983 * tic4x-dis.c (tic4x_dp): Make unsigned.
2989 * i386-dis.c (MOVSXD_Fixup): New function.
2990 (movsxd_mode): New enum.
2991 (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
2992 (intel_operand_size): Handle movsxd_mode.
2993 (OP_E_register): Likewise.
2995 * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
2996 register on movsxd. Add movsxd with 16-bit destination register
2997 for AMD64 and Intel64 ISAs.
2998 * i386-tbl.h: Regenerated.
3003 * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
3004 * aarch64-asm-2.c: Regenerate
3005 * aarch64-dis-2.c: Likewise.
3006 * aarch64-opc-2.c: Likewise.
3010 * i386-opc.tbl (sysret): Drop DefaultSize.
3011 * i386-tbl.h: Re-generate.
3015 * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
3017 (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
3018 * i386-tbl.h: Re-generate.
3022 * po/de.po: Updated German translation.
3023 * po/pt_BR.po: Updated Brazilian Portuguese translation.
3024 * po/uk.po: Updated Ukranian translation.
3028 * hppa-dis.c (fput_const): Remove useless cast.
3032 * arm-dis.c (print_insn_arm): Wrap 'T' value.
3036 * configure: Regenerate.
3037 * po/opcodes.pot: Regenerate.
3041 Binutils 2.34 branch created.
3045 * opintl.h: Fix spelling error (seperate).
3049 * i386-opc.tbl: Add {vex} pseudo prefix.
3050 * i386-tbl.h: Regenerated.
3055 * arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
3056 (neon_opcodes): Likewise.
3057 (select_arm_features): Make sure we enable MVE bits when selecting
3058 armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
3063 * i386-opc.tbl: Drop stale comment from XOP section.
3067 * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
3068 (extractps): Add VexWIG to SSE2AVX forms.
3069 * i386-tbl.h: Re-generate.
3073 * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
3074 Size64 from and use VexW1 on SSE2AVX forms.
3075 (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
3076 VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
3077 * i386-tbl.h: Re-generate.
3081 * tic4x-dis.c (tic4x_version): Make unsigned long.
3082 (optab, optab_special, registernames): New file scope vars.
3083 (tic4x_print_register): Set up registernames rather than
3084 malloc'd registertable.
3085 (tic4x_disassemble): Delete optable and optable_special. Use
3086 optab and optab_special instead. Throw away old optab,
3087 optab_special and registernames when info->mach changes.
3092 * z80-dis.c (suffix): Use .db instruction to generate double
3097 * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
3098 values to unsigned before shifting.
3102 * arm-dis.c (print_insn_arm): Fill in insn info fields for control
3104 (print_insn_thumb16, print_insn_thumb32): Likewise.
3105 (print_insn): Initialize the insn info.
3106 * i386-dis.c (print_insn): Initialize the insn info fields, and
3111 * arc-opc.c (C_NE): Make it required.
3115 * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
3116 reserved register name.
3120 * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
3121 (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
3125 * wasm32-dis.c (print_insn_wasm32): Localise variables. Store
3126 result of wasm_read_leb128 in a uint64_t and check that bits
3127 are not lost when copying to other locals. Use uint32_t for
3128 most locals. Use PRId64 when printing int64_t.
3132 * score-dis.c: Formatting.
3133 * score7-dis.c: Formatting.
3137 * score-dis.c (print_insn_score48): Use unsigned variables for
3138 unsigned values. Don't left shift negative values.
3139 (print_insn_score32): Likewise.
3140 * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
3144 * tic4x-dis.c (tic4x_print_register): Remove dead code.
3148 * fr30-ibld.c: Regenerate.
3152 * xgate-dis.c (print_insn): Don't left shift signed value.
3153 (ripBits): Formatting, use 1u.
3157 * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
3158 * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
3162 * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
3163 and XRREG value earlier to avoid a shift with negative exponent.
3164 * m10200-dis.c (disassemble): Similarly.
3169 * z80-dis.c (ld_ii_ii): Use correct cast.
3174 * z80-dis.c (ld_ii_ii): Use character constant when checking
3179 * i386-dis.c (SEP_Fixup): New.
3181 (dis386_twobyte): Use it for sysenter/sysexit.
3182 (enum x86_64_isa): Change amd64 enumerator to value 1.
3183 (OP_J): Compare isa64 against intel64 instead of amd64.
3184 * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
3186 * i386-tbl.h: Re-generate.
3190 * z8k-dis.c: Include libiberty.h
3191 (instr_data_s): Make max_fetched unsigned.
3192 (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
3193 Don't exceed byte_info bounds.
3194 (output_instr): Make num_bytes unsigned.
3195 (unpack_instr): Likewise for nibl_count and loop.
3196 * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
3198 * z8k-opc.h: Regenerate.
3202 * arc-tbl.h (llock): Use 'LLOCK' as class.
3204 (scond): Use 'SCOND' as class.
3206 (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
3211 * m32c-ibld.c: Regenerate.
3216 * z80-dis.c (suffix): Don't use a local struct buffer copy.
3217 Peek at next byte to prevent recursion on repeated prefix bytes.
3218 Ensure uninitialised "mybuf" is not accessed.
3219 (print_insn_z80): Don't zero n_fetch and n_used here,..
3220 (print_insn_z80_buf): ..do it here instead.
3224 * m32r-ibld.c: Regenerate.
3228 * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
3232 * crx-dis.c (match_opcode): Avoid shift left of signed value.
3236 * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
3240 * aarch64-tbl.h (aarch64_opcode_table): Use
3241 SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
3245 * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
3246 forms of SUDOT and USDOT.
3250 * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
3252 * aarch64-dis-2.c: Re-generate.
3256 * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
3258 * aarch64-dis-2.c: Re-generate.
3262 * z80-dis.c: Add support for eZ80 and Z80 instructions.
3266 Update year range in copyright notice of all files.
3268 For older changes see ChangeLog-2019
3270 Copyright (C) 2020 Free Software Foundation, Inc.
3272 Copying and distribution of this file, with or without modification,
3273 are permitted in any medium without royalty provided the copyright
3274 notice and this notice are preserved.
3280 version-control: never
projects / binutils.git / blob