1 /* 32-bit ELF support for ARM
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
3 2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
5 This file is part of BFD, the Binary File Descriptor library.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
26 #include "bfd_stdint.h"
27 #include "libiberty.h"
31 #include "elf-vxworks.h"
34 /* Return the relocation section associated with NAME. HTAB is the
35 bfd's elf32_arm_link_hash_entry. */
36 #define RELOC_SECTION(HTAB, NAME) \
37 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
39 /* Return size of a relocation entry. HTAB is the bfd's
40 elf32_arm_link_hash_entry. */
41 #define RELOC_SIZE(HTAB) \
43 ? sizeof (Elf32_External_Rel) \
44 : sizeof (Elf32_External_Rela))
46 /* Return function to swap relocations in. HTAB is the bfd's
47 elf32_arm_link_hash_entry. */
48 #define SWAP_RELOC_IN(HTAB) \
50 ? bfd_elf32_swap_reloc_in \
51 : bfd_elf32_swap_reloca_in)
53 /* Return function to swap relocations out. HTAB is the bfd's
54 elf32_arm_link_hash_entry. */
55 #define SWAP_RELOC_OUT(HTAB) \
57 ? bfd_elf32_swap_reloc_out \
58 : bfd_elf32_swap_reloca_out)
60 #define elf_info_to_howto 0
61 #define elf_info_to_howto_rel elf32_arm_info_to_howto
63 #define ARM_ELF_ABI_VERSION 0
64 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
66 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
67 struct bfd_link_info *link_info,
71 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
72 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
75 static reloc_howto_type elf32_arm_howto_table_1[] =
78 HOWTO (R_ARM_NONE, /* type */
80 0, /* size (0 = byte, 1 = short, 2 = long) */
82 FALSE, /* pc_relative */
84 complain_overflow_dont,/* complain_on_overflow */
85 bfd_elf_generic_reloc, /* special_function */
86 "R_ARM_NONE", /* name */
87 FALSE, /* partial_inplace */
90 FALSE), /* pcrel_offset */
92 HOWTO (R_ARM_PC24, /* type */
94 2, /* size (0 = byte, 1 = short, 2 = long) */
96 TRUE, /* pc_relative */
98 complain_overflow_signed,/* complain_on_overflow */
99 bfd_elf_generic_reloc, /* special_function */
100 "R_ARM_PC24", /* name */
101 FALSE, /* partial_inplace */
102 0x00ffffff, /* src_mask */
103 0x00ffffff, /* dst_mask */
104 TRUE), /* pcrel_offset */
106 /* 32 bit absolute */
107 HOWTO (R_ARM_ABS32, /* type */
109 2, /* size (0 = byte, 1 = short, 2 = long) */
111 FALSE, /* pc_relative */
113 complain_overflow_bitfield,/* complain_on_overflow */
114 bfd_elf_generic_reloc, /* special_function */
115 "R_ARM_ABS32", /* name */
116 FALSE, /* partial_inplace */
117 0xffffffff, /* src_mask */
118 0xffffffff, /* dst_mask */
119 FALSE), /* pcrel_offset */
121 /* standard 32bit pc-relative reloc */
122 HOWTO (R_ARM_REL32, /* type */
124 2, /* size (0 = byte, 1 = short, 2 = long) */
126 TRUE, /* pc_relative */
128 complain_overflow_bitfield,/* complain_on_overflow */
129 bfd_elf_generic_reloc, /* special_function */
130 "R_ARM_REL32", /* name */
131 FALSE, /* partial_inplace */
132 0xffffffff, /* src_mask */
133 0xffffffff, /* dst_mask */
134 TRUE), /* pcrel_offset */
136 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
137 HOWTO (R_ARM_LDR_PC_G0, /* type */
139 0, /* size (0 = byte, 1 = short, 2 = long) */
141 TRUE, /* pc_relative */
143 complain_overflow_dont,/* complain_on_overflow */
144 bfd_elf_generic_reloc, /* special_function */
145 "R_ARM_LDR_PC_G0", /* name */
146 FALSE, /* partial_inplace */
147 0xffffffff, /* src_mask */
148 0xffffffff, /* dst_mask */
149 TRUE), /* pcrel_offset */
151 /* 16 bit absolute */
152 HOWTO (R_ARM_ABS16, /* type */
154 1, /* size (0 = byte, 1 = short, 2 = long) */
156 FALSE, /* pc_relative */
158 complain_overflow_bitfield,/* complain_on_overflow */
159 bfd_elf_generic_reloc, /* special_function */
160 "R_ARM_ABS16", /* name */
161 FALSE, /* partial_inplace */
162 0x0000ffff, /* src_mask */
163 0x0000ffff, /* dst_mask */
164 FALSE), /* pcrel_offset */
166 /* 12 bit absolute */
167 HOWTO (R_ARM_ABS12, /* type */
169 2, /* size (0 = byte, 1 = short, 2 = long) */
171 FALSE, /* pc_relative */
173 complain_overflow_bitfield,/* complain_on_overflow */
174 bfd_elf_generic_reloc, /* special_function */
175 "R_ARM_ABS12", /* name */
176 FALSE, /* partial_inplace */
177 0x00000fff, /* src_mask */
178 0x00000fff, /* dst_mask */
179 FALSE), /* pcrel_offset */
181 HOWTO (R_ARM_THM_ABS5, /* type */
183 1, /* size (0 = byte, 1 = short, 2 = long) */
185 FALSE, /* pc_relative */
187 complain_overflow_bitfield,/* complain_on_overflow */
188 bfd_elf_generic_reloc, /* special_function */
189 "R_ARM_THM_ABS5", /* name */
190 FALSE, /* partial_inplace */
191 0x000007e0, /* src_mask */
192 0x000007e0, /* dst_mask */
193 FALSE), /* pcrel_offset */
196 HOWTO (R_ARM_ABS8, /* type */
198 0, /* size (0 = byte, 1 = short, 2 = long) */
200 FALSE, /* pc_relative */
202 complain_overflow_bitfield,/* complain_on_overflow */
203 bfd_elf_generic_reloc, /* special_function */
204 "R_ARM_ABS8", /* name */
205 FALSE, /* partial_inplace */
206 0x000000ff, /* src_mask */
207 0x000000ff, /* dst_mask */
208 FALSE), /* pcrel_offset */
210 HOWTO (R_ARM_SBREL32, /* type */
212 2, /* size (0 = byte, 1 = short, 2 = long) */
214 FALSE, /* pc_relative */
216 complain_overflow_dont,/* complain_on_overflow */
217 bfd_elf_generic_reloc, /* special_function */
218 "R_ARM_SBREL32", /* name */
219 FALSE, /* partial_inplace */
220 0xffffffff, /* src_mask */
221 0xffffffff, /* dst_mask */
222 FALSE), /* pcrel_offset */
224 HOWTO (R_ARM_THM_CALL, /* type */
226 2, /* size (0 = byte, 1 = short, 2 = long) */
228 TRUE, /* pc_relative */
230 complain_overflow_signed,/* complain_on_overflow */
231 bfd_elf_generic_reloc, /* special_function */
232 "R_ARM_THM_CALL", /* name */
233 FALSE, /* partial_inplace */
234 0x07ff2fff, /* src_mask */
235 0x07ff2fff, /* dst_mask */
236 TRUE), /* pcrel_offset */
238 HOWTO (R_ARM_THM_PC8, /* type */
240 1, /* size (0 = byte, 1 = short, 2 = long) */
242 TRUE, /* pc_relative */
244 complain_overflow_signed,/* complain_on_overflow */
245 bfd_elf_generic_reloc, /* special_function */
246 "R_ARM_THM_PC8", /* name */
247 FALSE, /* partial_inplace */
248 0x000000ff, /* src_mask */
249 0x000000ff, /* dst_mask */
250 TRUE), /* pcrel_offset */
252 HOWTO (R_ARM_BREL_ADJ, /* type */
254 1, /* size (0 = byte, 1 = short, 2 = long) */
256 FALSE, /* pc_relative */
258 complain_overflow_signed,/* complain_on_overflow */
259 bfd_elf_generic_reloc, /* special_function */
260 "R_ARM_BREL_ADJ", /* name */
261 FALSE, /* partial_inplace */
262 0xffffffff, /* src_mask */
263 0xffffffff, /* dst_mask */
264 FALSE), /* pcrel_offset */
266 HOWTO (R_ARM_TLS_DESC, /* type */
268 2, /* size (0 = byte, 1 = short, 2 = long) */
270 FALSE, /* pc_relative */
272 complain_overflow_bitfield,/* complain_on_overflow */
273 bfd_elf_generic_reloc, /* special_function */
274 "R_ARM_TLS_DESC", /* name */
275 FALSE, /* partial_inplace */
276 0xffffffff, /* src_mask */
277 0xffffffff, /* dst_mask */
278 FALSE), /* pcrel_offset */
280 HOWTO (R_ARM_THM_SWI8, /* type */
282 0, /* size (0 = byte, 1 = short, 2 = long) */
284 FALSE, /* pc_relative */
286 complain_overflow_signed,/* complain_on_overflow */
287 bfd_elf_generic_reloc, /* special_function */
288 "R_ARM_SWI8", /* name */
289 FALSE, /* partial_inplace */
290 0x00000000, /* src_mask */
291 0x00000000, /* dst_mask */
292 FALSE), /* pcrel_offset */
294 /* BLX instruction for the ARM. */
295 HOWTO (R_ARM_XPC25, /* type */
297 2, /* size (0 = byte, 1 = short, 2 = long) */
299 TRUE, /* pc_relative */
301 complain_overflow_signed,/* complain_on_overflow */
302 bfd_elf_generic_reloc, /* special_function */
303 "R_ARM_XPC25", /* name */
304 FALSE, /* partial_inplace */
305 0x00ffffff, /* src_mask */
306 0x00ffffff, /* dst_mask */
307 TRUE), /* pcrel_offset */
309 /* BLX instruction for the Thumb. */
310 HOWTO (R_ARM_THM_XPC22, /* type */
312 2, /* size (0 = byte, 1 = short, 2 = long) */
314 TRUE, /* pc_relative */
316 complain_overflow_signed,/* complain_on_overflow */
317 bfd_elf_generic_reloc, /* special_function */
318 "R_ARM_THM_XPC22", /* name */
319 FALSE, /* partial_inplace */
320 0x07ff2fff, /* src_mask */
321 0x07ff2fff, /* dst_mask */
322 TRUE), /* pcrel_offset */
324 /* Dynamic TLS relocations. */
326 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
328 2, /* size (0 = byte, 1 = short, 2 = long) */
330 FALSE, /* pc_relative */
332 complain_overflow_bitfield,/* complain_on_overflow */
333 bfd_elf_generic_reloc, /* special_function */
334 "R_ARM_TLS_DTPMOD32", /* name */
335 TRUE, /* partial_inplace */
336 0xffffffff, /* src_mask */
337 0xffffffff, /* dst_mask */
338 FALSE), /* pcrel_offset */
340 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
342 2, /* size (0 = byte, 1 = short, 2 = long) */
344 FALSE, /* pc_relative */
346 complain_overflow_bitfield,/* complain_on_overflow */
347 bfd_elf_generic_reloc, /* special_function */
348 "R_ARM_TLS_DTPOFF32", /* name */
349 TRUE, /* partial_inplace */
350 0xffffffff, /* src_mask */
351 0xffffffff, /* dst_mask */
352 FALSE), /* pcrel_offset */
354 HOWTO (R_ARM_TLS_TPOFF32, /* type */
356 2, /* size (0 = byte, 1 = short, 2 = long) */
358 FALSE, /* pc_relative */
360 complain_overflow_bitfield,/* complain_on_overflow */
361 bfd_elf_generic_reloc, /* special_function */
362 "R_ARM_TLS_TPOFF32", /* name */
363 TRUE, /* partial_inplace */
364 0xffffffff, /* src_mask */
365 0xffffffff, /* dst_mask */
366 FALSE), /* pcrel_offset */
368 /* Relocs used in ARM Linux */
370 HOWTO (R_ARM_COPY, /* type */
372 2, /* size (0 = byte, 1 = short, 2 = long) */
374 FALSE, /* pc_relative */
376 complain_overflow_bitfield,/* complain_on_overflow */
377 bfd_elf_generic_reloc, /* special_function */
378 "R_ARM_COPY", /* name */
379 TRUE, /* partial_inplace */
380 0xffffffff, /* src_mask */
381 0xffffffff, /* dst_mask */
382 FALSE), /* pcrel_offset */
384 HOWTO (R_ARM_GLOB_DAT, /* type */
386 2, /* size (0 = byte, 1 = short, 2 = long) */
388 FALSE, /* pc_relative */
390 complain_overflow_bitfield,/* complain_on_overflow */
391 bfd_elf_generic_reloc, /* special_function */
392 "R_ARM_GLOB_DAT", /* name */
393 TRUE, /* partial_inplace */
394 0xffffffff, /* src_mask */
395 0xffffffff, /* dst_mask */
396 FALSE), /* pcrel_offset */
398 HOWTO (R_ARM_JUMP_SLOT, /* type */
400 2, /* size (0 = byte, 1 = short, 2 = long) */
402 FALSE, /* pc_relative */
404 complain_overflow_bitfield,/* complain_on_overflow */
405 bfd_elf_generic_reloc, /* special_function */
406 "R_ARM_JUMP_SLOT", /* name */
407 TRUE, /* partial_inplace */
408 0xffffffff, /* src_mask */
409 0xffffffff, /* dst_mask */
410 FALSE), /* pcrel_offset */
412 HOWTO (R_ARM_RELATIVE, /* type */
414 2, /* size (0 = byte, 1 = short, 2 = long) */
416 FALSE, /* pc_relative */
418 complain_overflow_bitfield,/* complain_on_overflow */
419 bfd_elf_generic_reloc, /* special_function */
420 "R_ARM_RELATIVE", /* name */
421 TRUE, /* partial_inplace */
422 0xffffffff, /* src_mask */
423 0xffffffff, /* dst_mask */
424 FALSE), /* pcrel_offset */
426 HOWTO (R_ARM_GOTOFF32, /* type */
428 2, /* size (0 = byte, 1 = short, 2 = long) */
430 FALSE, /* pc_relative */
432 complain_overflow_bitfield,/* complain_on_overflow */
433 bfd_elf_generic_reloc, /* special_function */
434 "R_ARM_GOTOFF32", /* name */
435 TRUE, /* partial_inplace */
436 0xffffffff, /* src_mask */
437 0xffffffff, /* dst_mask */
438 FALSE), /* pcrel_offset */
440 HOWTO (R_ARM_GOTPC, /* type */
442 2, /* size (0 = byte, 1 = short, 2 = long) */
444 TRUE, /* pc_relative */
446 complain_overflow_bitfield,/* complain_on_overflow */
447 bfd_elf_generic_reloc, /* special_function */
448 "R_ARM_GOTPC", /* name */
449 TRUE, /* partial_inplace */
450 0xffffffff, /* src_mask */
451 0xffffffff, /* dst_mask */
452 TRUE), /* pcrel_offset */
454 HOWTO (R_ARM_GOT32, /* type */
456 2, /* size (0 = byte, 1 = short, 2 = long) */
458 FALSE, /* pc_relative */
460 complain_overflow_bitfield,/* complain_on_overflow */
461 bfd_elf_generic_reloc, /* special_function */
462 "R_ARM_GOT32", /* name */
463 TRUE, /* partial_inplace */
464 0xffffffff, /* src_mask */
465 0xffffffff, /* dst_mask */
466 FALSE), /* pcrel_offset */
468 HOWTO (R_ARM_PLT32, /* type */
470 2, /* size (0 = byte, 1 = short, 2 = long) */
472 TRUE, /* pc_relative */
474 complain_overflow_bitfield,/* complain_on_overflow */
475 bfd_elf_generic_reloc, /* special_function */
476 "R_ARM_PLT32", /* name */
477 FALSE, /* partial_inplace */
478 0x00ffffff, /* src_mask */
479 0x00ffffff, /* dst_mask */
480 TRUE), /* pcrel_offset */
482 HOWTO (R_ARM_CALL, /* type */
484 2, /* size (0 = byte, 1 = short, 2 = long) */
486 TRUE, /* pc_relative */
488 complain_overflow_signed,/* complain_on_overflow */
489 bfd_elf_generic_reloc, /* special_function */
490 "R_ARM_CALL", /* name */
491 FALSE, /* partial_inplace */
492 0x00ffffff, /* src_mask */
493 0x00ffffff, /* dst_mask */
494 TRUE), /* pcrel_offset */
496 HOWTO (R_ARM_JUMP24, /* type */
498 2, /* size (0 = byte, 1 = short, 2 = long) */
500 TRUE, /* pc_relative */
502 complain_overflow_signed,/* complain_on_overflow */
503 bfd_elf_generic_reloc, /* special_function */
504 "R_ARM_JUMP24", /* name */
505 FALSE, /* partial_inplace */
506 0x00ffffff, /* src_mask */
507 0x00ffffff, /* dst_mask */
508 TRUE), /* pcrel_offset */
510 HOWTO (R_ARM_THM_JUMP24, /* type */
512 2, /* size (0 = byte, 1 = short, 2 = long) */
514 TRUE, /* pc_relative */
516 complain_overflow_signed,/* complain_on_overflow */
517 bfd_elf_generic_reloc, /* special_function */
518 "R_ARM_THM_JUMP24", /* name */
519 FALSE, /* partial_inplace */
520 0x07ff2fff, /* src_mask */
521 0x07ff2fff, /* dst_mask */
522 TRUE), /* pcrel_offset */
524 HOWTO (R_ARM_BASE_ABS, /* type */
526 2, /* size (0 = byte, 1 = short, 2 = long) */
528 FALSE, /* pc_relative */
530 complain_overflow_dont,/* complain_on_overflow */
531 bfd_elf_generic_reloc, /* special_function */
532 "R_ARM_BASE_ABS", /* name */
533 FALSE, /* partial_inplace */
534 0xffffffff, /* src_mask */
535 0xffffffff, /* dst_mask */
536 FALSE), /* pcrel_offset */
538 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
540 2, /* size (0 = byte, 1 = short, 2 = long) */
542 TRUE, /* pc_relative */
544 complain_overflow_dont,/* complain_on_overflow */
545 bfd_elf_generic_reloc, /* special_function */
546 "R_ARM_ALU_PCREL_7_0", /* name */
547 FALSE, /* partial_inplace */
548 0x00000fff, /* src_mask */
549 0x00000fff, /* dst_mask */
550 TRUE), /* pcrel_offset */
552 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
554 2, /* size (0 = byte, 1 = short, 2 = long) */
556 TRUE, /* pc_relative */
558 complain_overflow_dont,/* complain_on_overflow */
559 bfd_elf_generic_reloc, /* special_function */
560 "R_ARM_ALU_PCREL_15_8",/* name */
561 FALSE, /* partial_inplace */
562 0x00000fff, /* src_mask */
563 0x00000fff, /* dst_mask */
564 TRUE), /* pcrel_offset */
566 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
568 2, /* size (0 = byte, 1 = short, 2 = long) */
570 TRUE, /* pc_relative */
572 complain_overflow_dont,/* complain_on_overflow */
573 bfd_elf_generic_reloc, /* special_function */
574 "R_ARM_ALU_PCREL_23_15",/* name */
575 FALSE, /* partial_inplace */
576 0x00000fff, /* src_mask */
577 0x00000fff, /* dst_mask */
578 TRUE), /* pcrel_offset */
580 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
582 2, /* size (0 = byte, 1 = short, 2 = long) */
584 FALSE, /* pc_relative */
586 complain_overflow_dont,/* complain_on_overflow */
587 bfd_elf_generic_reloc, /* special_function */
588 "R_ARM_LDR_SBREL_11_0",/* name */
589 FALSE, /* partial_inplace */
590 0x00000fff, /* src_mask */
591 0x00000fff, /* dst_mask */
592 FALSE), /* pcrel_offset */
594 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
596 2, /* size (0 = byte, 1 = short, 2 = long) */
598 FALSE, /* pc_relative */
600 complain_overflow_dont,/* complain_on_overflow */
601 bfd_elf_generic_reloc, /* special_function */
602 "R_ARM_ALU_SBREL_19_12",/* name */
603 FALSE, /* partial_inplace */
604 0x000ff000, /* src_mask */
605 0x000ff000, /* dst_mask */
606 FALSE), /* pcrel_offset */
608 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
610 2, /* size (0 = byte, 1 = short, 2 = long) */
612 FALSE, /* pc_relative */
614 complain_overflow_dont,/* complain_on_overflow */
615 bfd_elf_generic_reloc, /* special_function */
616 "R_ARM_ALU_SBREL_27_20",/* name */
617 FALSE, /* partial_inplace */
618 0x0ff00000, /* src_mask */
619 0x0ff00000, /* dst_mask */
620 FALSE), /* pcrel_offset */
622 HOWTO (R_ARM_TARGET1, /* type */
624 2, /* size (0 = byte, 1 = short, 2 = long) */
626 FALSE, /* pc_relative */
628 complain_overflow_dont,/* complain_on_overflow */
629 bfd_elf_generic_reloc, /* special_function */
630 "R_ARM_TARGET1", /* name */
631 FALSE, /* partial_inplace */
632 0xffffffff, /* src_mask */
633 0xffffffff, /* dst_mask */
634 FALSE), /* pcrel_offset */
636 HOWTO (R_ARM_ROSEGREL32, /* type */
638 2, /* size (0 = byte, 1 = short, 2 = long) */
640 FALSE, /* pc_relative */
642 complain_overflow_dont,/* complain_on_overflow */
643 bfd_elf_generic_reloc, /* special_function */
644 "R_ARM_ROSEGREL32", /* name */
645 FALSE, /* partial_inplace */
646 0xffffffff, /* src_mask */
647 0xffffffff, /* dst_mask */
648 FALSE), /* pcrel_offset */
650 HOWTO (R_ARM_V4BX, /* type */
652 2, /* size (0 = byte, 1 = short, 2 = long) */
654 FALSE, /* pc_relative */
656 complain_overflow_dont,/* complain_on_overflow */
657 bfd_elf_generic_reloc, /* special_function */
658 "R_ARM_V4BX", /* name */
659 FALSE, /* partial_inplace */
660 0xffffffff, /* src_mask */
661 0xffffffff, /* dst_mask */
662 FALSE), /* pcrel_offset */
664 HOWTO (R_ARM_TARGET2, /* type */
666 2, /* size (0 = byte, 1 = short, 2 = long) */
668 FALSE, /* pc_relative */
670 complain_overflow_signed,/* complain_on_overflow */
671 bfd_elf_generic_reloc, /* special_function */
672 "R_ARM_TARGET2", /* name */
673 FALSE, /* partial_inplace */
674 0xffffffff, /* src_mask */
675 0xffffffff, /* dst_mask */
676 TRUE), /* pcrel_offset */
678 HOWTO (R_ARM_PREL31, /* type */
680 2, /* size (0 = byte, 1 = short, 2 = long) */
682 TRUE, /* pc_relative */
684 complain_overflow_signed,/* complain_on_overflow */
685 bfd_elf_generic_reloc, /* special_function */
686 "R_ARM_PREL31", /* name */
687 FALSE, /* partial_inplace */
688 0x7fffffff, /* src_mask */
689 0x7fffffff, /* dst_mask */
690 TRUE), /* pcrel_offset */
692 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
694 2, /* size (0 = byte, 1 = short, 2 = long) */
696 FALSE, /* pc_relative */
698 complain_overflow_dont,/* complain_on_overflow */
699 bfd_elf_generic_reloc, /* special_function */
700 "R_ARM_MOVW_ABS_NC", /* name */
701 FALSE, /* partial_inplace */
702 0x000f0fff, /* src_mask */
703 0x000f0fff, /* dst_mask */
704 FALSE), /* pcrel_offset */
706 HOWTO (R_ARM_MOVT_ABS, /* type */
708 2, /* size (0 = byte, 1 = short, 2 = long) */
710 FALSE, /* pc_relative */
712 complain_overflow_bitfield,/* complain_on_overflow */
713 bfd_elf_generic_reloc, /* special_function */
714 "R_ARM_MOVT_ABS", /* name */
715 FALSE, /* partial_inplace */
716 0x000f0fff, /* src_mask */
717 0x000f0fff, /* dst_mask */
718 FALSE), /* pcrel_offset */
720 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
722 2, /* size (0 = byte, 1 = short, 2 = long) */
724 TRUE, /* pc_relative */
726 complain_overflow_dont,/* complain_on_overflow */
727 bfd_elf_generic_reloc, /* special_function */
728 "R_ARM_MOVW_PREL_NC", /* name */
729 FALSE, /* partial_inplace */
730 0x000f0fff, /* src_mask */
731 0x000f0fff, /* dst_mask */
732 TRUE), /* pcrel_offset */
734 HOWTO (R_ARM_MOVT_PREL, /* type */
736 2, /* size (0 = byte, 1 = short, 2 = long) */
738 TRUE, /* pc_relative */
740 complain_overflow_bitfield,/* complain_on_overflow */
741 bfd_elf_generic_reloc, /* special_function */
742 "R_ARM_MOVT_PREL", /* name */
743 FALSE, /* partial_inplace */
744 0x000f0fff, /* src_mask */
745 0x000f0fff, /* dst_mask */
746 TRUE), /* pcrel_offset */
748 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
750 2, /* size (0 = byte, 1 = short, 2 = long) */
752 FALSE, /* pc_relative */
754 complain_overflow_dont,/* complain_on_overflow */
755 bfd_elf_generic_reloc, /* special_function */
756 "R_ARM_THM_MOVW_ABS_NC",/* name */
757 FALSE, /* partial_inplace */
758 0x040f70ff, /* src_mask */
759 0x040f70ff, /* dst_mask */
760 FALSE), /* pcrel_offset */
762 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
764 2, /* size (0 = byte, 1 = short, 2 = long) */
766 FALSE, /* pc_relative */
768 complain_overflow_bitfield,/* complain_on_overflow */
769 bfd_elf_generic_reloc, /* special_function */
770 "R_ARM_THM_MOVT_ABS", /* name */
771 FALSE, /* partial_inplace */
772 0x040f70ff, /* src_mask */
773 0x040f70ff, /* dst_mask */
774 FALSE), /* pcrel_offset */
776 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
778 2, /* size (0 = byte, 1 = short, 2 = long) */
780 TRUE, /* pc_relative */
782 complain_overflow_dont,/* complain_on_overflow */
783 bfd_elf_generic_reloc, /* special_function */
784 "R_ARM_THM_MOVW_PREL_NC",/* name */
785 FALSE, /* partial_inplace */
786 0x040f70ff, /* src_mask */
787 0x040f70ff, /* dst_mask */
788 TRUE), /* pcrel_offset */
790 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
792 2, /* size (0 = byte, 1 = short, 2 = long) */
794 TRUE, /* pc_relative */
796 complain_overflow_bitfield,/* complain_on_overflow */
797 bfd_elf_generic_reloc, /* special_function */
798 "R_ARM_THM_MOVT_PREL", /* name */
799 FALSE, /* partial_inplace */
800 0x040f70ff, /* src_mask */
801 0x040f70ff, /* dst_mask */
802 TRUE), /* pcrel_offset */
804 HOWTO (R_ARM_THM_JUMP19, /* type */
806 2, /* size (0 = byte, 1 = short, 2 = long) */
808 TRUE, /* pc_relative */
810 complain_overflow_signed,/* complain_on_overflow */
811 bfd_elf_generic_reloc, /* special_function */
812 "R_ARM_THM_JUMP19", /* name */
813 FALSE, /* partial_inplace */
814 0x043f2fff, /* src_mask */
815 0x043f2fff, /* dst_mask */
816 TRUE), /* pcrel_offset */
818 HOWTO (R_ARM_THM_JUMP6, /* type */
820 1, /* size (0 = byte, 1 = short, 2 = long) */
822 TRUE, /* pc_relative */
824 complain_overflow_unsigned,/* complain_on_overflow */
825 bfd_elf_generic_reloc, /* special_function */
826 "R_ARM_THM_JUMP6", /* name */
827 FALSE, /* partial_inplace */
828 0x02f8, /* src_mask */
829 0x02f8, /* dst_mask */
830 TRUE), /* pcrel_offset */
832 /* These are declared as 13-bit signed relocations because we can
833 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
835 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
837 2, /* size (0 = byte, 1 = short, 2 = long) */
839 TRUE, /* pc_relative */
841 complain_overflow_dont,/* complain_on_overflow */
842 bfd_elf_generic_reloc, /* special_function */
843 "R_ARM_THM_ALU_PREL_11_0",/* name */
844 FALSE, /* partial_inplace */
845 0xffffffff, /* src_mask */
846 0xffffffff, /* dst_mask */
847 TRUE), /* pcrel_offset */
849 HOWTO (R_ARM_THM_PC12, /* type */
851 2, /* size (0 = byte, 1 = short, 2 = long) */
853 TRUE, /* pc_relative */
855 complain_overflow_dont,/* complain_on_overflow */
856 bfd_elf_generic_reloc, /* special_function */
857 "R_ARM_THM_PC12", /* name */
858 FALSE, /* partial_inplace */
859 0xffffffff, /* src_mask */
860 0xffffffff, /* dst_mask */
861 TRUE), /* pcrel_offset */
863 HOWTO (R_ARM_ABS32_NOI, /* type */
865 2, /* size (0 = byte, 1 = short, 2 = long) */
867 FALSE, /* pc_relative */
869 complain_overflow_dont,/* complain_on_overflow */
870 bfd_elf_generic_reloc, /* special_function */
871 "R_ARM_ABS32_NOI", /* name */
872 FALSE, /* partial_inplace */
873 0xffffffff, /* src_mask */
874 0xffffffff, /* dst_mask */
875 FALSE), /* pcrel_offset */
877 HOWTO (R_ARM_REL32_NOI, /* type */
879 2, /* size (0 = byte, 1 = short, 2 = long) */
881 TRUE, /* pc_relative */
883 complain_overflow_dont,/* complain_on_overflow */
884 bfd_elf_generic_reloc, /* special_function */
885 "R_ARM_REL32_NOI", /* name */
886 FALSE, /* partial_inplace */
887 0xffffffff, /* src_mask */
888 0xffffffff, /* dst_mask */
889 FALSE), /* pcrel_offset */
891 /* Group relocations. */
893 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
895 2, /* size (0 = byte, 1 = short, 2 = long) */
897 TRUE, /* pc_relative */
899 complain_overflow_dont,/* complain_on_overflow */
900 bfd_elf_generic_reloc, /* special_function */
901 "R_ARM_ALU_PC_G0_NC", /* name */
902 FALSE, /* partial_inplace */
903 0xffffffff, /* src_mask */
904 0xffffffff, /* dst_mask */
905 TRUE), /* pcrel_offset */
907 HOWTO (R_ARM_ALU_PC_G0, /* type */
909 2, /* size (0 = byte, 1 = short, 2 = long) */
911 TRUE, /* pc_relative */
913 complain_overflow_dont,/* complain_on_overflow */
914 bfd_elf_generic_reloc, /* special_function */
915 "R_ARM_ALU_PC_G0", /* name */
916 FALSE, /* partial_inplace */
917 0xffffffff, /* src_mask */
918 0xffffffff, /* dst_mask */
919 TRUE), /* pcrel_offset */
921 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
923 2, /* size (0 = byte, 1 = short, 2 = long) */
925 TRUE, /* pc_relative */
927 complain_overflow_dont,/* complain_on_overflow */
928 bfd_elf_generic_reloc, /* special_function */
929 "R_ARM_ALU_PC_G1_NC", /* name */
930 FALSE, /* partial_inplace */
931 0xffffffff, /* src_mask */
932 0xffffffff, /* dst_mask */
933 TRUE), /* pcrel_offset */
935 HOWTO (R_ARM_ALU_PC_G1, /* type */
937 2, /* size (0 = byte, 1 = short, 2 = long) */
939 TRUE, /* pc_relative */
941 complain_overflow_dont,/* complain_on_overflow */
942 bfd_elf_generic_reloc, /* special_function */
943 "R_ARM_ALU_PC_G1", /* name */
944 FALSE, /* partial_inplace */
945 0xffffffff, /* src_mask */
946 0xffffffff, /* dst_mask */
947 TRUE), /* pcrel_offset */
949 HOWTO (R_ARM_ALU_PC_G2, /* type */
951 2, /* size (0 = byte, 1 = short, 2 = long) */
953 TRUE, /* pc_relative */
955 complain_overflow_dont,/* complain_on_overflow */
956 bfd_elf_generic_reloc, /* special_function */
957 "R_ARM_ALU_PC_G2", /* name */
958 FALSE, /* partial_inplace */
959 0xffffffff, /* src_mask */
960 0xffffffff, /* dst_mask */
961 TRUE), /* pcrel_offset */
963 HOWTO (R_ARM_LDR_PC_G1, /* type */
965 2, /* size (0 = byte, 1 = short, 2 = long) */
967 TRUE, /* pc_relative */
969 complain_overflow_dont,/* complain_on_overflow */
970 bfd_elf_generic_reloc, /* special_function */
971 "R_ARM_LDR_PC_G1", /* name */
972 FALSE, /* partial_inplace */
973 0xffffffff, /* src_mask */
974 0xffffffff, /* dst_mask */
975 TRUE), /* pcrel_offset */
977 HOWTO (R_ARM_LDR_PC_G2, /* type */
979 2, /* size (0 = byte, 1 = short, 2 = long) */
981 TRUE, /* pc_relative */
983 complain_overflow_dont,/* complain_on_overflow */
984 bfd_elf_generic_reloc, /* special_function */
985 "R_ARM_LDR_PC_G2", /* name */
986 FALSE, /* partial_inplace */
987 0xffffffff, /* src_mask */
988 0xffffffff, /* dst_mask */
989 TRUE), /* pcrel_offset */
991 HOWTO (R_ARM_LDRS_PC_G0, /* type */
993 2, /* size (0 = byte, 1 = short, 2 = long) */
995 TRUE, /* pc_relative */
997 complain_overflow_dont,/* complain_on_overflow */
998 bfd_elf_generic_reloc, /* special_function */
999 "R_ARM_LDRS_PC_G0", /* name */
1000 FALSE, /* partial_inplace */
1001 0xffffffff, /* src_mask */
1002 0xffffffff, /* dst_mask */
1003 TRUE), /* pcrel_offset */
1005 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1007 2, /* size (0 = byte, 1 = short, 2 = long) */
1009 TRUE, /* pc_relative */
1011 complain_overflow_dont,/* complain_on_overflow */
1012 bfd_elf_generic_reloc, /* special_function */
1013 "R_ARM_LDRS_PC_G1", /* name */
1014 FALSE, /* partial_inplace */
1015 0xffffffff, /* src_mask */
1016 0xffffffff, /* dst_mask */
1017 TRUE), /* pcrel_offset */
1019 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1021 2, /* size (0 = byte, 1 = short, 2 = long) */
1023 TRUE, /* pc_relative */
1025 complain_overflow_dont,/* complain_on_overflow */
1026 bfd_elf_generic_reloc, /* special_function */
1027 "R_ARM_LDRS_PC_G2", /* name */
1028 FALSE, /* partial_inplace */
1029 0xffffffff, /* src_mask */
1030 0xffffffff, /* dst_mask */
1031 TRUE), /* pcrel_offset */
1033 HOWTO (R_ARM_LDC_PC_G0, /* type */
1035 2, /* size (0 = byte, 1 = short, 2 = long) */
1037 TRUE, /* pc_relative */
1039 complain_overflow_dont,/* complain_on_overflow */
1040 bfd_elf_generic_reloc, /* special_function */
1041 "R_ARM_LDC_PC_G0", /* name */
1042 FALSE, /* partial_inplace */
1043 0xffffffff, /* src_mask */
1044 0xffffffff, /* dst_mask */
1045 TRUE), /* pcrel_offset */
1047 HOWTO (R_ARM_LDC_PC_G1, /* type */
1049 2, /* size (0 = byte, 1 = short, 2 = long) */
1051 TRUE, /* pc_relative */
1053 complain_overflow_dont,/* complain_on_overflow */
1054 bfd_elf_generic_reloc, /* special_function */
1055 "R_ARM_LDC_PC_G1", /* name */
1056 FALSE, /* partial_inplace */
1057 0xffffffff, /* src_mask */
1058 0xffffffff, /* dst_mask */
1059 TRUE), /* pcrel_offset */
1061 HOWTO (R_ARM_LDC_PC_G2, /* type */
1063 2, /* size (0 = byte, 1 = short, 2 = long) */
1065 TRUE, /* pc_relative */
1067 complain_overflow_dont,/* complain_on_overflow */
1068 bfd_elf_generic_reloc, /* special_function */
1069 "R_ARM_LDC_PC_G2", /* name */
1070 FALSE, /* partial_inplace */
1071 0xffffffff, /* src_mask */
1072 0xffffffff, /* dst_mask */
1073 TRUE), /* pcrel_offset */
1075 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1077 2, /* size (0 = byte, 1 = short, 2 = long) */
1079 TRUE, /* pc_relative */
1081 complain_overflow_dont,/* complain_on_overflow */
1082 bfd_elf_generic_reloc, /* special_function */
1083 "R_ARM_ALU_SB_G0_NC", /* name */
1084 FALSE, /* partial_inplace */
1085 0xffffffff, /* src_mask */
1086 0xffffffff, /* dst_mask */
1087 TRUE), /* pcrel_offset */
1089 HOWTO (R_ARM_ALU_SB_G0, /* type */
1091 2, /* size (0 = byte, 1 = short, 2 = long) */
1093 TRUE, /* pc_relative */
1095 complain_overflow_dont,/* complain_on_overflow */
1096 bfd_elf_generic_reloc, /* special_function */
1097 "R_ARM_ALU_SB_G0", /* name */
1098 FALSE, /* partial_inplace */
1099 0xffffffff, /* src_mask */
1100 0xffffffff, /* dst_mask */
1101 TRUE), /* pcrel_offset */
1103 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1105 2, /* size (0 = byte, 1 = short, 2 = long) */
1107 TRUE, /* pc_relative */
1109 complain_overflow_dont,/* complain_on_overflow */
1110 bfd_elf_generic_reloc, /* special_function */
1111 "R_ARM_ALU_SB_G1_NC", /* name */
1112 FALSE, /* partial_inplace */
1113 0xffffffff, /* src_mask */
1114 0xffffffff, /* dst_mask */
1115 TRUE), /* pcrel_offset */
1117 HOWTO (R_ARM_ALU_SB_G1, /* type */
1119 2, /* size (0 = byte, 1 = short, 2 = long) */
1121 TRUE, /* pc_relative */
1123 complain_overflow_dont,/* complain_on_overflow */
1124 bfd_elf_generic_reloc, /* special_function */
1125 "R_ARM_ALU_SB_G1", /* name */
1126 FALSE, /* partial_inplace */
1127 0xffffffff, /* src_mask */
1128 0xffffffff, /* dst_mask */
1129 TRUE), /* pcrel_offset */
1131 HOWTO (R_ARM_ALU_SB_G2, /* type */
1133 2, /* size (0 = byte, 1 = short, 2 = long) */
1135 TRUE, /* pc_relative */
1137 complain_overflow_dont,/* complain_on_overflow */
1138 bfd_elf_generic_reloc, /* special_function */
1139 "R_ARM_ALU_SB_G2", /* name */
1140 FALSE, /* partial_inplace */
1141 0xffffffff, /* src_mask */
1142 0xffffffff, /* dst_mask */
1143 TRUE), /* pcrel_offset */
1145 HOWTO (R_ARM_LDR_SB_G0, /* type */
1147 2, /* size (0 = byte, 1 = short, 2 = long) */
1149 TRUE, /* pc_relative */
1151 complain_overflow_dont,/* complain_on_overflow */
1152 bfd_elf_generic_reloc, /* special_function */
1153 "R_ARM_LDR_SB_G0", /* name */
1154 FALSE, /* partial_inplace */
1155 0xffffffff, /* src_mask */
1156 0xffffffff, /* dst_mask */
1157 TRUE), /* pcrel_offset */
1159 HOWTO (R_ARM_LDR_SB_G1, /* type */
1161 2, /* size (0 = byte, 1 = short, 2 = long) */
1163 TRUE, /* pc_relative */
1165 complain_overflow_dont,/* complain_on_overflow */
1166 bfd_elf_generic_reloc, /* special_function */
1167 "R_ARM_LDR_SB_G1", /* name */
1168 FALSE, /* partial_inplace */
1169 0xffffffff, /* src_mask */
1170 0xffffffff, /* dst_mask */
1171 TRUE), /* pcrel_offset */
1173 HOWTO (R_ARM_LDR_SB_G2, /* type */
1175 2, /* size (0 = byte, 1 = short, 2 = long) */
1177 TRUE, /* pc_relative */
1179 complain_overflow_dont,/* complain_on_overflow */
1180 bfd_elf_generic_reloc, /* special_function */
1181 "R_ARM_LDR_SB_G2", /* name */
1182 FALSE, /* partial_inplace */
1183 0xffffffff, /* src_mask */
1184 0xffffffff, /* dst_mask */
1185 TRUE), /* pcrel_offset */
1187 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1189 2, /* size (0 = byte, 1 = short, 2 = long) */
1191 TRUE, /* pc_relative */
1193 complain_overflow_dont,/* complain_on_overflow */
1194 bfd_elf_generic_reloc, /* special_function */
1195 "R_ARM_LDRS_SB_G0", /* name */
1196 FALSE, /* partial_inplace */
1197 0xffffffff, /* src_mask */
1198 0xffffffff, /* dst_mask */
1199 TRUE), /* pcrel_offset */
1201 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1203 2, /* size (0 = byte, 1 = short, 2 = long) */
1205 TRUE, /* pc_relative */
1207 complain_overflow_dont,/* complain_on_overflow */
1208 bfd_elf_generic_reloc, /* special_function */
1209 "R_ARM_LDRS_SB_G1", /* name */
1210 FALSE, /* partial_inplace */
1211 0xffffffff, /* src_mask */
1212 0xffffffff, /* dst_mask */
1213 TRUE), /* pcrel_offset */
1215 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1217 2, /* size (0 = byte, 1 = short, 2 = long) */
1219 TRUE, /* pc_relative */
1221 complain_overflow_dont,/* complain_on_overflow */
1222 bfd_elf_generic_reloc, /* special_function */
1223 "R_ARM_LDRS_SB_G2", /* name */
1224 FALSE, /* partial_inplace */
1225 0xffffffff, /* src_mask */
1226 0xffffffff, /* dst_mask */
1227 TRUE), /* pcrel_offset */
1229 HOWTO (R_ARM_LDC_SB_G0, /* type */
1231 2, /* size (0 = byte, 1 = short, 2 = long) */
1233 TRUE, /* pc_relative */
1235 complain_overflow_dont,/* complain_on_overflow */
1236 bfd_elf_generic_reloc, /* special_function */
1237 "R_ARM_LDC_SB_G0", /* name */
1238 FALSE, /* partial_inplace */
1239 0xffffffff, /* src_mask */
1240 0xffffffff, /* dst_mask */
1241 TRUE), /* pcrel_offset */
1243 HOWTO (R_ARM_LDC_SB_G1, /* type */
1245 2, /* size (0 = byte, 1 = short, 2 = long) */
1247 TRUE, /* pc_relative */
1249 complain_overflow_dont,/* complain_on_overflow */
1250 bfd_elf_generic_reloc, /* special_function */
1251 "R_ARM_LDC_SB_G1", /* name */
1252 FALSE, /* partial_inplace */
1253 0xffffffff, /* src_mask */
1254 0xffffffff, /* dst_mask */
1255 TRUE), /* pcrel_offset */
1257 HOWTO (R_ARM_LDC_SB_G2, /* type */
1259 2, /* size (0 = byte, 1 = short, 2 = long) */
1261 TRUE, /* pc_relative */
1263 complain_overflow_dont,/* complain_on_overflow */
1264 bfd_elf_generic_reloc, /* special_function */
1265 "R_ARM_LDC_SB_G2", /* name */
1266 FALSE, /* partial_inplace */
1267 0xffffffff, /* src_mask */
1268 0xffffffff, /* dst_mask */
1269 TRUE), /* pcrel_offset */
1271 /* End of group relocations. */
1273 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1275 2, /* size (0 = byte, 1 = short, 2 = long) */
1277 FALSE, /* pc_relative */
1279 complain_overflow_dont,/* complain_on_overflow */
1280 bfd_elf_generic_reloc, /* special_function */
1281 "R_ARM_MOVW_BREL_NC", /* name */
1282 FALSE, /* partial_inplace */
1283 0x0000ffff, /* src_mask */
1284 0x0000ffff, /* dst_mask */
1285 FALSE), /* pcrel_offset */
1287 HOWTO (R_ARM_MOVT_BREL, /* type */
1289 2, /* size (0 = byte, 1 = short, 2 = long) */
1291 FALSE, /* pc_relative */
1293 complain_overflow_bitfield,/* complain_on_overflow */
1294 bfd_elf_generic_reloc, /* special_function */
1295 "R_ARM_MOVT_BREL", /* name */
1296 FALSE, /* partial_inplace */
1297 0x0000ffff, /* src_mask */
1298 0x0000ffff, /* dst_mask */
1299 FALSE), /* pcrel_offset */
1301 HOWTO (R_ARM_MOVW_BREL, /* type */
1303 2, /* size (0 = byte, 1 = short, 2 = long) */
1305 FALSE, /* pc_relative */
1307 complain_overflow_dont,/* complain_on_overflow */
1308 bfd_elf_generic_reloc, /* special_function */
1309 "R_ARM_MOVW_BREL", /* name */
1310 FALSE, /* partial_inplace */
1311 0x0000ffff, /* src_mask */
1312 0x0000ffff, /* dst_mask */
1313 FALSE), /* pcrel_offset */
1315 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1317 2, /* size (0 = byte, 1 = short, 2 = long) */
1319 FALSE, /* pc_relative */
1321 complain_overflow_dont,/* complain_on_overflow */
1322 bfd_elf_generic_reloc, /* special_function */
1323 "R_ARM_THM_MOVW_BREL_NC",/* name */
1324 FALSE, /* partial_inplace */
1325 0x040f70ff, /* src_mask */
1326 0x040f70ff, /* dst_mask */
1327 FALSE), /* pcrel_offset */
1329 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1331 2, /* size (0 = byte, 1 = short, 2 = long) */
1333 FALSE, /* pc_relative */
1335 complain_overflow_bitfield,/* complain_on_overflow */
1336 bfd_elf_generic_reloc, /* special_function */
1337 "R_ARM_THM_MOVT_BREL", /* name */
1338 FALSE, /* partial_inplace */
1339 0x040f70ff, /* src_mask */
1340 0x040f70ff, /* dst_mask */
1341 FALSE), /* pcrel_offset */
1343 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1345 2, /* size (0 = byte, 1 = short, 2 = long) */
1347 FALSE, /* pc_relative */
1349 complain_overflow_dont,/* complain_on_overflow */
1350 bfd_elf_generic_reloc, /* special_function */
1351 "R_ARM_THM_MOVW_BREL", /* name */
1352 FALSE, /* partial_inplace */
1353 0x040f70ff, /* src_mask */
1354 0x040f70ff, /* dst_mask */
1355 FALSE), /* pcrel_offset */
1357 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1359 2, /* size (0 = byte, 1 = short, 2 = long) */
1361 FALSE, /* pc_relative */
1363 complain_overflow_bitfield,/* complain_on_overflow */
1364 NULL, /* special_function */
1365 "R_ARM_TLS_GOTDESC", /* name */
1366 TRUE, /* partial_inplace */
1367 0xffffffff, /* src_mask */
1368 0xffffffff, /* dst_mask */
1369 FALSE), /* pcrel_offset */
1371 HOWTO (R_ARM_TLS_CALL, /* type */
1373 2, /* size (0 = byte, 1 = short, 2 = long) */
1375 FALSE, /* pc_relative */
1377 complain_overflow_dont,/* complain_on_overflow */
1378 bfd_elf_generic_reloc, /* special_function */
1379 "R_ARM_TLS_CALL", /* name */
1380 FALSE, /* partial_inplace */
1381 0x00ffffff, /* src_mask */
1382 0x00ffffff, /* dst_mask */
1383 FALSE), /* pcrel_offset */
1385 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1387 2, /* size (0 = byte, 1 = short, 2 = long) */
1389 FALSE, /* pc_relative */
1391 complain_overflow_bitfield,/* complain_on_overflow */
1392 bfd_elf_generic_reloc, /* special_function */
1393 "R_ARM_TLS_DESCSEQ", /* name */
1394 FALSE, /* partial_inplace */
1395 0x00000000, /* src_mask */
1396 0x00000000, /* dst_mask */
1397 FALSE), /* pcrel_offset */
1399 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1401 2, /* size (0 = byte, 1 = short, 2 = long) */
1403 FALSE, /* pc_relative */
1405 complain_overflow_dont,/* complain_on_overflow */
1406 bfd_elf_generic_reloc, /* special_function */
1407 "R_ARM_THM_TLS_CALL", /* name */
1408 FALSE, /* partial_inplace */
1409 0x07ff07ff, /* src_mask */
1410 0x07ff07ff, /* dst_mask */
1411 FALSE), /* pcrel_offset */
1413 HOWTO (R_ARM_PLT32_ABS, /* type */
1415 2, /* size (0 = byte, 1 = short, 2 = long) */
1417 FALSE, /* pc_relative */
1419 complain_overflow_dont,/* complain_on_overflow */
1420 bfd_elf_generic_reloc, /* special_function */
1421 "R_ARM_PLT32_ABS", /* name */
1422 FALSE, /* partial_inplace */
1423 0xffffffff, /* src_mask */
1424 0xffffffff, /* dst_mask */
1425 FALSE), /* pcrel_offset */
1427 HOWTO (R_ARM_GOT_ABS, /* type */
1429 2, /* size (0 = byte, 1 = short, 2 = long) */
1431 FALSE, /* pc_relative */
1433 complain_overflow_dont,/* complain_on_overflow */
1434 bfd_elf_generic_reloc, /* special_function */
1435 "R_ARM_GOT_ABS", /* name */
1436 FALSE, /* partial_inplace */
1437 0xffffffff, /* src_mask */
1438 0xffffffff, /* dst_mask */
1439 FALSE), /* pcrel_offset */
1441 HOWTO (R_ARM_GOT_PREL, /* type */
1443 2, /* size (0 = byte, 1 = short, 2 = long) */
1445 TRUE, /* pc_relative */
1447 complain_overflow_dont, /* complain_on_overflow */
1448 bfd_elf_generic_reloc, /* special_function */
1449 "R_ARM_GOT_PREL", /* name */
1450 FALSE, /* partial_inplace */
1451 0xffffffff, /* src_mask */
1452 0xffffffff, /* dst_mask */
1453 TRUE), /* pcrel_offset */
1455 HOWTO (R_ARM_GOT_BREL12, /* type */
1457 2, /* size (0 = byte, 1 = short, 2 = long) */
1459 FALSE, /* pc_relative */
1461 complain_overflow_bitfield,/* complain_on_overflow */
1462 bfd_elf_generic_reloc, /* special_function */
1463 "R_ARM_GOT_BREL12", /* name */
1464 FALSE, /* partial_inplace */
1465 0x00000fff, /* src_mask */
1466 0x00000fff, /* dst_mask */
1467 FALSE), /* pcrel_offset */
1469 HOWTO (R_ARM_GOTOFF12, /* type */
1471 2, /* size (0 = byte, 1 = short, 2 = long) */
1473 FALSE, /* pc_relative */
1475 complain_overflow_bitfield,/* complain_on_overflow */
1476 bfd_elf_generic_reloc, /* special_function */
1477 "R_ARM_GOTOFF12", /* name */
1478 FALSE, /* partial_inplace */
1479 0x00000fff, /* src_mask */
1480 0x00000fff, /* dst_mask */
1481 FALSE), /* pcrel_offset */
1483 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1485 /* GNU extension to record C++ vtable member usage */
1486 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1488 2, /* size (0 = byte, 1 = short, 2 = long) */
1490 FALSE, /* pc_relative */
1492 complain_overflow_dont, /* complain_on_overflow */
1493 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1494 "R_ARM_GNU_VTENTRY", /* name */
1495 FALSE, /* partial_inplace */
1498 FALSE), /* pcrel_offset */
1500 /* GNU extension to record C++ vtable hierarchy */
1501 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1503 2, /* size (0 = byte, 1 = short, 2 = long) */
1505 FALSE, /* pc_relative */
1507 complain_overflow_dont, /* complain_on_overflow */
1508 NULL, /* special_function */
1509 "R_ARM_GNU_VTINHERIT", /* name */
1510 FALSE, /* partial_inplace */
1513 FALSE), /* pcrel_offset */
1515 HOWTO (R_ARM_THM_JUMP11, /* type */
1517 1, /* size (0 = byte, 1 = short, 2 = long) */
1519 TRUE, /* pc_relative */
1521 complain_overflow_signed, /* complain_on_overflow */
1522 bfd_elf_generic_reloc, /* special_function */
1523 "R_ARM_THM_JUMP11", /* name */
1524 FALSE, /* partial_inplace */
1525 0x000007ff, /* src_mask */
1526 0x000007ff, /* dst_mask */
1527 TRUE), /* pcrel_offset */
1529 HOWTO (R_ARM_THM_JUMP8, /* type */
1531 1, /* size (0 = byte, 1 = short, 2 = long) */
1533 TRUE, /* pc_relative */
1535 complain_overflow_signed, /* complain_on_overflow */
1536 bfd_elf_generic_reloc, /* special_function */
1537 "R_ARM_THM_JUMP8", /* name */
1538 FALSE, /* partial_inplace */
1539 0x000000ff, /* src_mask */
1540 0x000000ff, /* dst_mask */
1541 TRUE), /* pcrel_offset */
1543 /* TLS relocations */
1544 HOWTO (R_ARM_TLS_GD32, /* type */
1546 2, /* size (0 = byte, 1 = short, 2 = long) */
1548 FALSE, /* pc_relative */
1550 complain_overflow_bitfield,/* complain_on_overflow */
1551 NULL, /* special_function */
1552 "R_ARM_TLS_GD32", /* name */
1553 TRUE, /* partial_inplace */
1554 0xffffffff, /* src_mask */
1555 0xffffffff, /* dst_mask */
1556 FALSE), /* pcrel_offset */
1558 HOWTO (R_ARM_TLS_LDM32, /* type */
1560 2, /* size (0 = byte, 1 = short, 2 = long) */
1562 FALSE, /* pc_relative */
1564 complain_overflow_bitfield,/* complain_on_overflow */
1565 bfd_elf_generic_reloc, /* special_function */
1566 "R_ARM_TLS_LDM32", /* name */
1567 TRUE, /* partial_inplace */
1568 0xffffffff, /* src_mask */
1569 0xffffffff, /* dst_mask */
1570 FALSE), /* pcrel_offset */
1572 HOWTO (R_ARM_TLS_LDO32, /* type */
1574 2, /* size (0 = byte, 1 = short, 2 = long) */
1576 FALSE, /* pc_relative */
1578 complain_overflow_bitfield,/* complain_on_overflow */
1579 bfd_elf_generic_reloc, /* special_function */
1580 "R_ARM_TLS_LDO32", /* name */
1581 TRUE, /* partial_inplace */
1582 0xffffffff, /* src_mask */
1583 0xffffffff, /* dst_mask */
1584 FALSE), /* pcrel_offset */
1586 HOWTO (R_ARM_TLS_IE32, /* type */
1588 2, /* size (0 = byte, 1 = short, 2 = long) */
1590 FALSE, /* pc_relative */
1592 complain_overflow_bitfield,/* complain_on_overflow */
1593 NULL, /* special_function */
1594 "R_ARM_TLS_IE32", /* name */
1595 TRUE, /* partial_inplace */
1596 0xffffffff, /* src_mask */
1597 0xffffffff, /* dst_mask */
1598 FALSE), /* pcrel_offset */
1600 HOWTO (R_ARM_TLS_LE32, /* type */
1602 2, /* size (0 = byte, 1 = short, 2 = long) */
1604 FALSE, /* pc_relative */
1606 complain_overflow_bitfield,/* complain_on_overflow */
1607 bfd_elf_generic_reloc, /* special_function */
1608 "R_ARM_TLS_LE32", /* name */
1609 TRUE, /* partial_inplace */
1610 0xffffffff, /* src_mask */
1611 0xffffffff, /* dst_mask */
1612 FALSE), /* pcrel_offset */
1614 HOWTO (R_ARM_TLS_LDO12, /* type */
1616 2, /* size (0 = byte, 1 = short, 2 = long) */
1618 FALSE, /* pc_relative */
1620 complain_overflow_bitfield,/* complain_on_overflow */
1621 bfd_elf_generic_reloc, /* special_function */
1622 "R_ARM_TLS_LDO12", /* name */
1623 FALSE, /* partial_inplace */
1624 0x00000fff, /* src_mask */
1625 0x00000fff, /* dst_mask */
1626 FALSE), /* pcrel_offset */
1628 HOWTO (R_ARM_TLS_LE12, /* type */
1630 2, /* size (0 = byte, 1 = short, 2 = long) */
1632 FALSE, /* pc_relative */
1634 complain_overflow_bitfield,/* complain_on_overflow */
1635 bfd_elf_generic_reloc, /* special_function */
1636 "R_ARM_TLS_LE12", /* name */
1637 FALSE, /* partial_inplace */
1638 0x00000fff, /* src_mask */
1639 0x00000fff, /* dst_mask */
1640 FALSE), /* pcrel_offset */
1642 HOWTO (R_ARM_TLS_IE12GP, /* type */
1644 2, /* size (0 = byte, 1 = short, 2 = long) */
1646 FALSE, /* pc_relative */
1648 complain_overflow_bitfield,/* complain_on_overflow */
1649 bfd_elf_generic_reloc, /* special_function */
1650 "R_ARM_TLS_IE12GP", /* name */
1651 FALSE, /* partial_inplace */
1652 0x00000fff, /* src_mask */
1653 0x00000fff, /* dst_mask */
1654 FALSE), /* pcrel_offset */
1656 /* 112-127 private relocations. */
1674 /* R_ARM_ME_TOO, obsolete. */
1677 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1679 1, /* size (0 = byte, 1 = short, 2 = long) */
1681 FALSE, /* pc_relative */
1683 complain_overflow_bitfield,/* complain_on_overflow */
1684 bfd_elf_generic_reloc, /* special_function */
1685 "R_ARM_THM_TLS_DESCSEQ",/* name */
1686 FALSE, /* partial_inplace */
1687 0x00000000, /* src_mask */
1688 0x00000000, /* dst_mask */
1689 FALSE), /* pcrel_offset */
1693 static reloc_howto_type elf32_arm_howto_table_2[1] =
1695 HOWTO (R_ARM_IRELATIVE, /* type */
1697 2, /* size (0 = byte, 1 = short, 2 = long) */
1699 FALSE, /* pc_relative */
1701 complain_overflow_bitfield,/* complain_on_overflow */
1702 bfd_elf_generic_reloc, /* special_function */
1703 "R_ARM_IRELATIVE", /* name */
1704 TRUE, /* partial_inplace */
1705 0xffffffff, /* src_mask */
1706 0xffffffff, /* dst_mask */
1707 FALSE) /* pcrel_offset */
1710 /* 249-255 extended, currently unused, relocations: */
1711 static reloc_howto_type elf32_arm_howto_table_3[4] =
1713 HOWTO (R_ARM_RREL32, /* type */
1715 0, /* size (0 = byte, 1 = short, 2 = long) */
1717 FALSE, /* pc_relative */
1719 complain_overflow_dont,/* complain_on_overflow */
1720 bfd_elf_generic_reloc, /* special_function */
1721 "R_ARM_RREL32", /* name */
1722 FALSE, /* partial_inplace */
1725 FALSE), /* pcrel_offset */
1727 HOWTO (R_ARM_RABS32, /* type */
1729 0, /* size (0 = byte, 1 = short, 2 = long) */
1731 FALSE, /* pc_relative */
1733 complain_overflow_dont,/* complain_on_overflow */
1734 bfd_elf_generic_reloc, /* special_function */
1735 "R_ARM_RABS32", /* name */
1736 FALSE, /* partial_inplace */
1739 FALSE), /* pcrel_offset */
1741 HOWTO (R_ARM_RPC24, /* type */
1743 0, /* size (0 = byte, 1 = short, 2 = long) */
1745 FALSE, /* pc_relative */
1747 complain_overflow_dont,/* complain_on_overflow */
1748 bfd_elf_generic_reloc, /* special_function */
1749 "R_ARM_RPC24", /* name */
1750 FALSE, /* partial_inplace */
1753 FALSE), /* pcrel_offset */
1755 HOWTO (R_ARM_RBASE, /* type */
1757 0, /* size (0 = byte, 1 = short, 2 = long) */
1759 FALSE, /* pc_relative */
1761 complain_overflow_dont,/* complain_on_overflow */
1762 bfd_elf_generic_reloc, /* special_function */
1763 "R_ARM_RBASE", /* name */
1764 FALSE, /* partial_inplace */
1767 FALSE) /* pcrel_offset */
1770 static reloc_howto_type *
1771 elf32_arm_howto_from_type (unsigned int r_type)
1773 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1774 return &elf32_arm_howto_table_1[r_type];
1776 if (r_type == R_ARM_IRELATIVE)
1777 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1779 if (r_type >= R_ARM_RREL32
1780 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1781 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1787 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1788 Elf_Internal_Rela * elf_reloc)
1790 unsigned int r_type;
1792 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1793 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1796 struct elf32_arm_reloc_map
1798 bfd_reloc_code_real_type bfd_reloc_val;
1799 unsigned char elf_reloc_val;
1802 /* All entries in this list must also be present in elf32_arm_howto_table. */
1803 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1805 {BFD_RELOC_NONE, R_ARM_NONE},
1806 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1807 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1808 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1809 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1810 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1811 {BFD_RELOC_32, R_ARM_ABS32},
1812 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1813 {BFD_RELOC_8, R_ARM_ABS8},
1814 {BFD_RELOC_16, R_ARM_ABS16},
1815 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1816 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1817 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1818 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1819 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1820 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1821 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1822 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1823 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1824 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1825 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1826 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1827 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1828 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1829 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1830 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1831 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1832 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1833 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1834 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1835 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1836 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1837 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1838 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1839 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1840 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1841 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1842 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1843 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1844 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1845 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1846 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1847 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1848 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1849 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1850 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1851 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
1852 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1853 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1854 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1855 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1856 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1857 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1858 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1859 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1860 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1861 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1862 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1863 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1864 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1865 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1866 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1867 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1868 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1869 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1870 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1871 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1872 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1873 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1874 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1875 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1876 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1877 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1878 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1879 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1880 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1881 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1882 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1883 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1884 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1885 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1886 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1887 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1888 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1889 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1890 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
1893 static reloc_howto_type *
1894 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1895 bfd_reloc_code_real_type code)
1899 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
1900 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1901 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
1906 static reloc_howto_type *
1907 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1912 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
1913 if (elf32_arm_howto_table_1[i].name != NULL
1914 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1915 return &elf32_arm_howto_table_1[i];
1917 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
1918 if (elf32_arm_howto_table_2[i].name != NULL
1919 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1920 return &elf32_arm_howto_table_2[i];
1922 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1923 if (elf32_arm_howto_table_3[i].name != NULL
1924 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1925 return &elf32_arm_howto_table_3[i];
1930 /* Support for core dump NOTE sections. */
1933 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
1938 switch (note->descsz)
1943 case 148: /* Linux/ARM 32-bit. */
1945 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1948 elf_tdata (abfd)->core_lwpid = bfd_get_32 (abfd, note->descdata + 24);
1957 /* Make a ".reg/999" section. */
1958 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1959 size, note->descpos + offset);
1963 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
1965 switch (note->descsz)
1970 case 124: /* Linux/ARM elf_prpsinfo. */
1971 elf_tdata (abfd)->core_pid
1972 = bfd_get_32 (abfd, note->descdata + 12);
1973 elf_tdata (abfd)->core_program
1974 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1975 elf_tdata (abfd)->core_command
1976 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1979 /* Note that for some reason, a spurious space is tacked
1980 onto the end of the args in some (at least one anyway)
1981 implementations, so strip it off if it exists. */
1983 char *command = elf_tdata (abfd)->core_command;
1984 int n = strlen (command);
1986 if (0 < n && command[n - 1] == ' ')
1987 command[n - 1] = '\0';
1994 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2007 va_start (ap, note_type);
2008 memset (data, 0, sizeof (data));
2009 strncpy (data + 28, va_arg (ap, const char *), 16);
2010 strncpy (data + 44, va_arg (ap, const char *), 80);
2013 return elfcore_write_note (abfd, buf, bufsiz,
2014 "CORE", note_type, data, sizeof (data));
2025 va_start (ap, note_type);
2026 memset (data, 0, sizeof (data));
2027 pid = va_arg (ap, long);
2028 bfd_put_32 (abfd, pid, data + 24);
2029 cursig = va_arg (ap, int);
2030 bfd_put_16 (abfd, cursig, data + 12);
2031 greg = va_arg (ap, const void *);
2032 memcpy (data + 72, greg, 72);
2035 return elfcore_write_note (abfd, buf, bufsiz,
2036 "CORE", note_type, data, sizeof (data));
2041 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
2042 #define TARGET_LITTLE_NAME "elf32-littlearm"
2043 #define TARGET_BIG_SYM bfd_elf32_bigarm_vec
2044 #define TARGET_BIG_NAME "elf32-bigarm"
2046 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2047 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2048 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2050 typedef unsigned long int insn32;
2051 typedef unsigned short int insn16;
2053 /* In lieu of proper flags, assume all EABIv4 or later objects are
2055 #define INTERWORK_FLAG(abfd) \
2056 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2057 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2058 || ((abfd)->flags & BFD_LINKER_CREATED))
2060 /* The linker script knows the section names for placement.
2061 The entry_names are used to do simple name mangling on the stubs.
2062 Given a function name, and its type, the stub can be found. The
2063 name can be changed. The only requirement is the %s be present. */
2064 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2065 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2067 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2068 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2070 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2071 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2073 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2074 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2076 #define STUB_ENTRY_NAME "__%s_veneer"
2078 /* The name of the dynamic interpreter. This is put in the .interp
2080 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2082 static const unsigned long tls_trampoline [] =
2084 0xe08e0000, /* add r0, lr, r0 */
2085 0xe5901004, /* ldr r1, [r0,#4] */
2086 0xe12fff11, /* bx r1 */
2089 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2091 0xe52d2004, /* push {r2} */
2092 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2093 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2094 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2095 0xe081100f, /* 2: add r1, pc */
2096 0xe12fff12, /* bx r2 */
2097 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2098 + dl_tlsdesc_lazy_resolver(GOT) */
2099 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2102 #ifdef FOUR_WORD_PLT
2104 /* The first entry in a procedure linkage table looks like
2105 this. It is set up so that any shared library function that is
2106 called before the relocation has been set up calls the dynamic
2108 static const bfd_vma elf32_arm_plt0_entry [] =
2110 0xe52de004, /* str lr, [sp, #-4]! */
2111 0xe59fe010, /* ldr lr, [pc, #16] */
2112 0xe08fe00e, /* add lr, pc, lr */
2113 0xe5bef008, /* ldr pc, [lr, #8]! */
2116 /* Subsequent entries in a procedure linkage table look like
2118 static const bfd_vma elf32_arm_plt_entry [] =
2120 0xe28fc600, /* add ip, pc, #NN */
2121 0xe28cca00, /* add ip, ip, #NN */
2122 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2123 0x00000000, /* unused */
2128 /* The first entry in a procedure linkage table looks like
2129 this. It is set up so that any shared library function that is
2130 called before the relocation has been set up calls the dynamic
2132 static const bfd_vma elf32_arm_plt0_entry [] =
2134 0xe52de004, /* str lr, [sp, #-4]! */
2135 0xe59fe004, /* ldr lr, [pc, #4] */
2136 0xe08fe00e, /* add lr, pc, lr */
2137 0xe5bef008, /* ldr pc, [lr, #8]! */
2138 0x00000000, /* &GOT[0] - . */
2141 /* Subsequent entries in a procedure linkage table look like
2143 static const bfd_vma elf32_arm_plt_entry [] =
2145 0xe28fc600, /* add ip, pc, #0xNN00000 */
2146 0xe28cca00, /* add ip, ip, #0xNN000 */
2147 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2152 /* The format of the first entry in the procedure linkage table
2153 for a VxWorks executable. */
2154 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2156 0xe52dc008, /* str ip,[sp,#-8]! */
2157 0xe59fc000, /* ldr ip,[pc] */
2158 0xe59cf008, /* ldr pc,[ip,#8] */
2159 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2162 /* The format of subsequent entries in a VxWorks executable. */
2163 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2165 0xe59fc000, /* ldr ip,[pc] */
2166 0xe59cf000, /* ldr pc,[ip] */
2167 0x00000000, /* .long @got */
2168 0xe59fc000, /* ldr ip,[pc] */
2169 0xea000000, /* b _PLT */
2170 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2173 /* The format of entries in a VxWorks shared library. */
2174 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2176 0xe59fc000, /* ldr ip,[pc] */
2177 0xe79cf009, /* ldr pc,[ip,r9] */
2178 0x00000000, /* .long @got */
2179 0xe59fc000, /* ldr ip,[pc] */
2180 0xe599f008, /* ldr pc,[r9,#8] */
2181 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2184 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2185 #define PLT_THUMB_STUB_SIZE 4
2186 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2192 /* The entries in a PLT when using a DLL-based target with multiple
2194 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2196 0xe51ff004, /* ldr pc, [pc, #-4] */
2197 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2200 /* The first entry in a procedure linkage table looks like
2201 this. It is set up so that any shared library function that is
2202 called before the relocation has been set up calls the dynamic
2204 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2207 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2208 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2209 0xe08cc00f, /* add ip, ip, pc */
2210 0xe52dc008, /* str ip, [sp, #-8]! */
2211 /* Second bundle: */
2212 0xe7dfcf1f, /* bfc ip, #30, #2 */
2213 0xe59cc000, /* ldr ip, [ip] */
2214 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2215 0xe12fff1c, /* bx ip */
2217 0xe320f000, /* nop */
2218 0xe320f000, /* nop */
2219 0xe320f000, /* nop */
2221 0xe50dc004, /* str ip, [sp, #-4] */
2222 /* Fourth bundle: */
2223 0xe7dfcf1f, /* bfc ip, #30, #2 */
2224 0xe59cc000, /* ldr ip, [ip] */
2225 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2226 0xe12fff1c, /* bx ip */
2228 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2230 /* Subsequent entries in a procedure linkage table look like this. */
2231 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2233 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2234 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2235 0xe08cc00f, /* add ip, ip, pc */
2236 0xea000000, /* b .Lplt_tail */
2239 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2240 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2241 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2242 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2243 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2244 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2254 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2255 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2256 is inserted in arm_build_one_stub(). */
2257 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2258 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2259 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2260 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2261 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2262 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2267 enum stub_insn_type type;
2268 unsigned int r_type;
2272 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2273 to reach the stub if necessary. */
2274 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2276 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2277 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2280 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2282 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2284 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2285 ARM_INSN (0xe12fff1c), /* bx ip */
2286 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2289 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2290 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2292 THUMB16_INSN (0xb401), /* push {r0} */
2293 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2294 THUMB16_INSN (0x4684), /* mov ip, r0 */
2295 THUMB16_INSN (0xbc01), /* pop {r0} */
2296 THUMB16_INSN (0x4760), /* bx ip */
2297 THUMB16_INSN (0xbf00), /* nop */
2298 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2301 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2303 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2305 THUMB16_INSN (0x4778), /* bx pc */
2306 THUMB16_INSN (0x46c0), /* nop */
2307 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2308 ARM_INSN (0xe12fff1c), /* bx ip */
2309 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2312 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2314 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2316 THUMB16_INSN (0x4778), /* bx pc */
2317 THUMB16_INSN (0x46c0), /* nop */
2318 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2319 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2322 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2323 one, when the destination is close enough. */
2324 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2326 THUMB16_INSN (0x4778), /* bx pc */
2327 THUMB16_INSN (0x46c0), /* nop */
2328 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2331 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2332 blx to reach the stub if necessary. */
2333 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2335 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2336 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2337 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2340 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2341 blx to reach the stub if necessary. We can not add into pc;
2342 it is not guaranteed to mode switch (different in ARMv6 and
2344 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2346 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2347 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2348 ARM_INSN (0xe12fff1c), /* bx ip */
2349 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2352 /* V4T ARM -> ARM long branch stub, PIC. */
2353 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2355 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2356 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2357 ARM_INSN (0xe12fff1c), /* bx ip */
2358 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2361 /* V4T Thumb -> ARM long branch stub, PIC. */
2362 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2364 THUMB16_INSN (0x4778), /* bx pc */
2365 THUMB16_INSN (0x46c0), /* nop */
2366 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2367 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2368 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2371 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2373 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2375 THUMB16_INSN (0xb401), /* push {r0} */
2376 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2377 THUMB16_INSN (0x46fc), /* mov ip, pc */
2378 THUMB16_INSN (0x4484), /* add ip, r0 */
2379 THUMB16_INSN (0xbc01), /* pop {r0} */
2380 THUMB16_INSN (0x4760), /* bx ip */
2381 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2384 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2386 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2388 THUMB16_INSN (0x4778), /* bx pc */
2389 THUMB16_INSN (0x46c0), /* nop */
2390 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2391 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2392 ARM_INSN (0xe12fff1c), /* bx ip */
2393 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2396 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2397 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2398 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2400 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2401 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2402 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2405 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2406 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2407 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2409 THUMB16_INSN (0x4778), /* bx pc */
2410 THUMB16_INSN (0x46c0), /* nop */
2411 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2412 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2413 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2416 /* Cortex-A8 erratum-workaround stubs. */
2418 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2419 can't use a conditional branch to reach this stub). */
2421 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2423 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2424 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2425 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2428 /* Stub used for b.w and bl.w instructions. */
2430 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2432 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2435 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2437 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2440 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2441 instruction (which switches to ARM mode) to point to this stub. Jump to the
2442 real destination using an ARM-mode branch. */
2444 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2446 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2449 /* For each section group there can be a specially created linker section
2450 to hold the stubs for that group. The name of the stub section is based
2451 upon the name of another section within that group with the suffix below
2454 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2455 create what appeared to be a linker stub section when it actually
2456 contained user code/data. For example, consider this fragment:
2458 const char * stubborn_problems[] = { "np" };
2460 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2463 .data.rel.local.stubborn_problems
2465 This then causes problems in arm32_arm_build_stubs() as it triggers:
2467 // Ignore non-stub sections.
2468 if (!strstr (stub_sec->name, STUB_SUFFIX))
2471 And so the section would be ignored instead of being processed. Hence
2472 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2474 #define STUB_SUFFIX ".__stub"
2476 /* One entry per long/short branch stub defined above. */
2478 DEF_STUB(long_branch_any_any) \
2479 DEF_STUB(long_branch_v4t_arm_thumb) \
2480 DEF_STUB(long_branch_thumb_only) \
2481 DEF_STUB(long_branch_v4t_thumb_thumb) \
2482 DEF_STUB(long_branch_v4t_thumb_arm) \
2483 DEF_STUB(short_branch_v4t_thumb_arm) \
2484 DEF_STUB(long_branch_any_arm_pic) \
2485 DEF_STUB(long_branch_any_thumb_pic) \
2486 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2487 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2488 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2489 DEF_STUB(long_branch_thumb_only_pic) \
2490 DEF_STUB(long_branch_any_tls_pic) \
2491 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2492 DEF_STUB(a8_veneer_b_cond) \
2493 DEF_STUB(a8_veneer_b) \
2494 DEF_STUB(a8_veneer_bl) \
2495 DEF_STUB(a8_veneer_blx)
2497 #define DEF_STUB(x) arm_stub_##x,
2498 enum elf32_arm_stub_type
2502 /* Note the first a8_veneer type */
2503 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
2509 const insn_sequence* template_sequence;
2513 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2514 static const stub_def stub_definitions[] =
2520 struct elf32_arm_stub_hash_entry
2522 /* Base hash table entry structure. */
2523 struct bfd_hash_entry root;
2525 /* The stub section. */
2528 /* Offset within stub_sec of the beginning of this stub. */
2529 bfd_vma stub_offset;
2531 /* Given the symbol's value and its section we can determine its final
2532 value when building the stubs (so the stub knows where to jump). */
2533 bfd_vma target_value;
2534 asection *target_section;
2536 /* Offset to apply to relocation referencing target_value. */
2537 bfd_vma target_addend;
2539 /* The instruction which caused this stub to be generated (only valid for
2540 Cortex-A8 erratum workaround stubs at present). */
2541 unsigned long orig_insn;
2543 /* The stub type. */
2544 enum elf32_arm_stub_type stub_type;
2545 /* Its encoding size in bytes. */
2548 const insn_sequence *stub_template;
2549 /* The size of the template (number of entries). */
2550 int stub_template_size;
2552 /* The symbol table entry, if any, that this was derived from. */
2553 struct elf32_arm_link_hash_entry *h;
2555 /* Type of branch. */
2556 enum arm_st_branch_type branch_type;
2558 /* Where this stub is being called from, or, in the case of combined
2559 stub sections, the first input section in the group. */
2562 /* The name for the local symbol at the start of this stub. The
2563 stub name in the hash table has to be unique; this does not, so
2564 it can be friendlier. */
2568 /* Used to build a map of a section. This is required for mixed-endian
2571 typedef struct elf32_elf_section_map
2576 elf32_arm_section_map;
2578 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2582 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2583 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2584 VFP11_ERRATUM_ARM_VENEER,
2585 VFP11_ERRATUM_THUMB_VENEER
2587 elf32_vfp11_erratum_type;
2589 typedef struct elf32_vfp11_erratum_list
2591 struct elf32_vfp11_erratum_list *next;
2597 struct elf32_vfp11_erratum_list *veneer;
2598 unsigned int vfp_insn;
2602 struct elf32_vfp11_erratum_list *branch;
2606 elf32_vfp11_erratum_type type;
2608 elf32_vfp11_erratum_list;
2613 INSERT_EXIDX_CANTUNWIND_AT_END
2615 arm_unwind_edit_type;
2617 /* A (sorted) list of edits to apply to an unwind table. */
2618 typedef struct arm_unwind_table_edit
2620 arm_unwind_edit_type type;
2621 /* Note: we sometimes want to insert an unwind entry corresponding to a
2622 section different from the one we're currently writing out, so record the
2623 (text) section this edit relates to here. */
2624 asection *linked_section;
2626 struct arm_unwind_table_edit *next;
2628 arm_unwind_table_edit;
2630 typedef struct _arm_elf_section_data
2632 /* Information about mapping symbols. */
2633 struct bfd_elf_section_data elf;
2634 unsigned int mapcount;
2635 unsigned int mapsize;
2636 elf32_arm_section_map *map;
2637 /* Information about CPU errata. */
2638 unsigned int erratumcount;
2639 elf32_vfp11_erratum_list *erratumlist;
2640 /* Information about unwind tables. */
2643 /* Unwind info attached to a text section. */
2646 asection *arm_exidx_sec;
2649 /* Unwind info attached to an .ARM.exidx section. */
2652 arm_unwind_table_edit *unwind_edit_list;
2653 arm_unwind_table_edit *unwind_edit_tail;
2657 _arm_elf_section_data;
2659 #define elf32_arm_section_data(sec) \
2660 ((_arm_elf_section_data *) elf_section_data (sec))
2662 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2663 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2664 so may be created multiple times: we use an array of these entries whilst
2665 relaxing which we can refresh easily, then create stubs for each potentially
2666 erratum-triggering instruction once we've settled on a solution. */
2668 struct a8_erratum_fix
2674 unsigned long orig_insn;
2676 enum elf32_arm_stub_type stub_type;
2677 enum arm_st_branch_type branch_type;
2680 /* A table of relocs applied to branches which might trigger Cortex-A8
2683 struct a8_erratum_reloc
2686 bfd_vma destination;
2687 struct elf32_arm_link_hash_entry *hash;
2688 const char *sym_name;
2689 unsigned int r_type;
2690 enum arm_st_branch_type branch_type;
2691 bfd_boolean non_a8_stub;
2694 /* The size of the thread control block. */
2697 /* ARM-specific information about a PLT entry, over and above the usual
2701 /* We reference count Thumb references to a PLT entry separately,
2702 so that we can emit the Thumb trampoline only if needed. */
2703 bfd_signed_vma thumb_refcount;
2705 /* Some references from Thumb code may be eliminated by BL->BLX
2706 conversion, so record them separately. */
2707 bfd_signed_vma maybe_thumb_refcount;
2709 /* How many of the recorded PLT accesses were from non-call relocations.
2710 This information is useful when deciding whether anything takes the
2711 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2712 non-call references to the function should resolve directly to the
2713 real runtime target. */
2714 unsigned int noncall_refcount;
2716 /* Since PLT entries have variable size if the Thumb prologue is
2717 used, we need to record the index into .got.plt instead of
2718 recomputing it from the PLT offset. */
2719 bfd_signed_vma got_offset;
2722 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2723 struct arm_local_iplt_info
2725 /* The information that is usually found in the generic ELF part of
2726 the hash table entry. */
2727 union gotplt_union root;
2729 /* The information that is usually found in the ARM-specific part of
2730 the hash table entry. */
2731 struct arm_plt_info arm;
2733 /* A list of all potential dynamic relocations against this symbol. */
2734 struct elf_dyn_relocs *dyn_relocs;
2737 struct elf_arm_obj_tdata
2739 struct elf_obj_tdata root;
2741 /* tls_type for each local got entry. */
2742 char *local_got_tls_type;
2744 /* GOTPLT entries for TLS descriptors. */
2745 bfd_vma *local_tlsdesc_gotent;
2747 /* Information for local symbols that need entries in .iplt. */
2748 struct arm_local_iplt_info **local_iplt;
2750 /* Zero to warn when linking objects with incompatible enum sizes. */
2751 int no_enum_size_warning;
2753 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2754 int no_wchar_size_warning;
2757 #define elf_arm_tdata(bfd) \
2758 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2760 #define elf32_arm_local_got_tls_type(bfd) \
2761 (elf_arm_tdata (bfd)->local_got_tls_type)
2763 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2764 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2766 #define elf32_arm_local_iplt(bfd) \
2767 (elf_arm_tdata (bfd)->local_iplt)
2769 #define is_arm_elf(bfd) \
2770 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2771 && elf_tdata (bfd) != NULL \
2772 && elf_object_id (bfd) == ARM_ELF_DATA)
2775 elf32_arm_mkobject (bfd *abfd)
2777 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2781 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2783 /* Arm ELF linker hash entry. */
2784 struct elf32_arm_link_hash_entry
2786 struct elf_link_hash_entry root;
2788 /* Track dynamic relocs copied for this symbol. */
2789 struct elf_dyn_relocs *dyn_relocs;
2791 /* ARM-specific PLT information. */
2792 struct arm_plt_info plt;
2794 #define GOT_UNKNOWN 0
2795 #define GOT_NORMAL 1
2796 #define GOT_TLS_GD 2
2797 #define GOT_TLS_IE 4
2798 #define GOT_TLS_GDESC 8
2799 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
2800 unsigned int tls_type : 8;
2802 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2803 unsigned int is_iplt : 1;
2805 unsigned int unused : 23;
2807 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2808 starting at the end of the jump table. */
2809 bfd_vma tlsdesc_got;
2811 /* The symbol marking the real symbol location for exported thumb
2812 symbols with Arm stubs. */
2813 struct elf_link_hash_entry *export_glue;
2815 /* A pointer to the most recently used stub hash entry against this
2817 struct elf32_arm_stub_hash_entry *stub_cache;
2820 /* Traverse an arm ELF linker hash table. */
2821 #define elf32_arm_link_hash_traverse(table, func, info) \
2822 (elf_link_hash_traverse \
2824 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
2827 /* Get the ARM elf linker hash table from a link_info structure. */
2828 #define elf32_arm_hash_table(info) \
2829 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2830 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
2832 #define arm_stub_hash_lookup(table, string, create, copy) \
2833 ((struct elf32_arm_stub_hash_entry *) \
2834 bfd_hash_lookup ((table), (string), (create), (copy)))
2836 /* Array to keep track of which stub sections have been created, and
2837 information on stub grouping. */
2840 /* This is the section to which stubs in the group will be
2843 /* The stub section. */
2847 #define elf32_arm_compute_jump_table_size(htab) \
2848 ((htab)->next_tls_desc_index * 4)
2850 /* ARM ELF linker hash table. */
2851 struct elf32_arm_link_hash_table
2853 /* The main hash table. */
2854 struct elf_link_hash_table root;
2856 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2857 bfd_size_type thumb_glue_size;
2859 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2860 bfd_size_type arm_glue_size;
2862 /* The size in bytes of section containing the ARMv4 BX veneers. */
2863 bfd_size_type bx_glue_size;
2865 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2866 veneer has been populated. */
2867 bfd_vma bx_glue_offset[15];
2869 /* The size in bytes of the section containing glue for VFP11 erratum
2871 bfd_size_type vfp11_erratum_glue_size;
2873 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2874 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2875 elf32_arm_write_section(). */
2876 struct a8_erratum_fix *a8_erratum_fixes;
2877 unsigned int num_a8_erratum_fixes;
2879 /* An arbitrary input BFD chosen to hold the glue sections. */
2880 bfd * bfd_of_glue_owner;
2882 /* Nonzero to output a BE8 image. */
2885 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2886 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2889 /* The relocation to use for R_ARM_TARGET2 relocations. */
2892 /* 0 = Ignore R_ARM_V4BX.
2893 1 = Convert BX to MOV PC.
2894 2 = Generate v4 interworing stubs. */
2897 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2900 /* Whether we should fix the ARM1176 BLX immediate issue. */
2903 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2906 /* What sort of code sequences we should look for which may trigger the
2907 VFP11 denorm erratum. */
2908 bfd_arm_vfp11_fix vfp11_fix;
2910 /* Global counter for the number of fixes we have emitted. */
2911 int num_vfp11_fixes;
2913 /* Nonzero to force PIC branch veneers. */
2916 /* The number of bytes in the initial entry in the PLT. */
2917 bfd_size_type plt_header_size;
2919 /* The number of bytes in the subsequent PLT etries. */
2920 bfd_size_type plt_entry_size;
2922 /* True if the target system is VxWorks. */
2925 /* True if the target system is Symbian OS. */
2928 /* True if the target system is Native Client. */
2931 /* True if the target uses REL relocations. */
2934 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
2935 bfd_vma next_tls_desc_index;
2937 /* How many R_ARM_TLS_DESC relocations were generated so far. */
2938 bfd_vma num_tls_desc;
2940 /* Short-cuts to get to dynamic linker sections. */
2944 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2947 /* The offset into splt of the PLT entry for the TLS descriptor
2948 resolver. Special values are 0, if not necessary (or not found
2949 to be necessary yet), and -1 if needed but not determined
2951 bfd_vma dt_tlsdesc_plt;
2953 /* The offset into sgot of the GOT entry used by the PLT entry
2955 bfd_vma dt_tlsdesc_got;
2957 /* Offset in .plt section of tls_arm_trampoline. */
2958 bfd_vma tls_trampoline;
2960 /* Data for R_ARM_TLS_LDM32 relocations. */
2963 bfd_signed_vma refcount;
2967 /* Small local sym cache. */
2968 struct sym_cache sym_cache;
2970 /* For convenience in allocate_dynrelocs. */
2973 /* The amount of space used by the reserved portion of the sgotplt
2974 section, plus whatever space is used by the jump slots. */
2975 bfd_vma sgotplt_jump_table_size;
2977 /* The stub hash table. */
2978 struct bfd_hash_table stub_hash_table;
2980 /* Linker stub bfd. */
2983 /* Linker call-backs. */
2984 asection * (*add_stub_section) (const char *, asection *);
2985 void (*layout_sections_again) (void);
2987 /* Array to keep track of which stub sections have been created, and
2988 information on stub grouping. */
2989 struct map_stub *stub_group;
2991 /* Number of elements in stub_group. */
2994 /* Assorted information used by elf32_arm_size_stubs. */
2995 unsigned int bfd_count;
2997 asection **input_list;
3000 /* Create an entry in an ARM ELF linker hash table. */
3002 static struct bfd_hash_entry *
3003 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3004 struct bfd_hash_table * table,
3005 const char * string)
3007 struct elf32_arm_link_hash_entry * ret =
3008 (struct elf32_arm_link_hash_entry *) entry;
3010 /* Allocate the structure if it has not already been allocated by a
3013 ret = (struct elf32_arm_link_hash_entry *)
3014 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3016 return (struct bfd_hash_entry *) ret;
3018 /* Call the allocation method of the superclass. */
3019 ret = ((struct elf32_arm_link_hash_entry *)
3020 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3024 ret->dyn_relocs = NULL;
3025 ret->tls_type = GOT_UNKNOWN;
3026 ret->tlsdesc_got = (bfd_vma) -1;
3027 ret->plt.thumb_refcount = 0;
3028 ret->plt.maybe_thumb_refcount = 0;
3029 ret->plt.noncall_refcount = 0;
3030 ret->plt.got_offset = -1;
3031 ret->is_iplt = FALSE;
3032 ret->export_glue = NULL;
3034 ret->stub_cache = NULL;
3037 return (struct bfd_hash_entry *) ret;
3040 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3044 elf32_arm_allocate_local_sym_info (bfd *abfd)
3046 if (elf_local_got_refcounts (abfd) == NULL)
3048 bfd_size_type num_syms;
3052 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3053 size = num_syms * (sizeof (bfd_signed_vma)
3054 + sizeof (struct arm_local_iplt_info *)
3057 data = bfd_zalloc (abfd, size);
3061 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3062 data += num_syms * sizeof (bfd_signed_vma);
3064 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3065 data += num_syms * sizeof (struct arm_local_iplt_info *);
3067 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3068 data += num_syms * sizeof (bfd_vma);
3070 elf32_arm_local_got_tls_type (abfd) = data;
3075 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3076 to input bfd ABFD. Create the information if it doesn't already exist.
3077 Return null if an allocation fails. */
3079 static struct arm_local_iplt_info *
3080 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3082 struct arm_local_iplt_info **ptr;
3084 if (!elf32_arm_allocate_local_sym_info (abfd))
3087 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3088 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3090 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3094 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3095 in ABFD's symbol table. If the symbol is global, H points to its
3096 hash table entry, otherwise H is null.
3098 Return true if the symbol does have PLT information. When returning
3099 true, point *ROOT_PLT at the target-independent reference count/offset
3100 union and *ARM_PLT at the ARM-specific information. */
3103 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
3104 unsigned long r_symndx, union gotplt_union **root_plt,
3105 struct arm_plt_info **arm_plt)
3107 struct arm_local_iplt_info *local_iplt;
3111 *root_plt = &h->root.plt;
3116 if (elf32_arm_local_iplt (abfd) == NULL)
3119 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3120 if (local_iplt == NULL)
3123 *root_plt = &local_iplt->root;
3124 *arm_plt = &local_iplt->arm;
3128 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3132 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3133 struct arm_plt_info *arm_plt)
3135 struct elf32_arm_link_hash_table *htab;
3137 htab = elf32_arm_hash_table (info);
3138 return (arm_plt->thumb_refcount != 0
3139 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3142 /* Return a pointer to the head of the dynamic reloc list that should
3143 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3144 ABFD's symbol table. Return null if an error occurs. */
3146 static struct elf_dyn_relocs **
3147 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3148 Elf_Internal_Sym *isym)
3150 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3152 struct arm_local_iplt_info *local_iplt;
3154 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3155 if (local_iplt == NULL)
3157 return &local_iplt->dyn_relocs;
3161 /* Track dynamic relocs needed for local syms too.
3162 We really need local syms available to do this
3167 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3171 vpp = &elf_section_data (s)->local_dynrel;
3172 return (struct elf_dyn_relocs **) vpp;
3176 /* Initialize an entry in the stub hash table. */
3178 static struct bfd_hash_entry *
3179 stub_hash_newfunc (struct bfd_hash_entry *entry,
3180 struct bfd_hash_table *table,
3183 /* Allocate the structure if it has not already been allocated by a
3187 entry = (struct bfd_hash_entry *)
3188 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3193 /* Call the allocation method of the superclass. */
3194 entry = bfd_hash_newfunc (entry, table, string);
3197 struct elf32_arm_stub_hash_entry *eh;
3199 /* Initialize the local fields. */
3200 eh = (struct elf32_arm_stub_hash_entry *) entry;
3201 eh->stub_sec = NULL;
3202 eh->stub_offset = 0;
3203 eh->target_value = 0;
3204 eh->target_section = NULL;
3205 eh->target_addend = 0;
3207 eh->stub_type = arm_stub_none;
3209 eh->stub_template = NULL;
3210 eh->stub_template_size = 0;
3213 eh->output_name = NULL;
3219 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3220 shortcuts to them in our hash table. */
3223 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3225 struct elf32_arm_link_hash_table *htab;
3227 htab = elf32_arm_hash_table (info);
3231 /* BPABI objects never have a GOT, or associated sections. */
3232 if (htab->symbian_p)
3235 if (! _bfd_elf_create_got_section (dynobj, info))
3241 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3244 create_ifunc_sections (struct bfd_link_info *info)
3246 struct elf32_arm_link_hash_table *htab;
3247 const struct elf_backend_data *bed;
3252 htab = elf32_arm_hash_table (info);
3253 dynobj = htab->root.dynobj;
3254 bed = get_elf_backend_data (dynobj);
3255 flags = bed->dynamic_sec_flags;
3257 if (htab->root.iplt == NULL)
3259 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3260 flags | SEC_READONLY | SEC_CODE);
3262 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3264 htab->root.iplt = s;
3267 if (htab->root.irelplt == NULL)
3269 s = bfd_make_section_anyway_with_flags (dynobj,
3270 RELOC_SECTION (htab, ".iplt"),
3271 flags | SEC_READONLY);
3273 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3275 htab->root.irelplt = s;
3278 if (htab->root.igotplt == NULL)
3280 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3282 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3284 htab->root.igotplt = s;
3289 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3290 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3294 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3296 struct elf32_arm_link_hash_table *htab;
3298 htab = elf32_arm_hash_table (info);
3302 if (!htab->root.sgot && !create_got_section (dynobj, info))
3305 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3308 htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
3310 htab->srelbss = bfd_get_linker_section (dynobj,
3311 RELOC_SECTION (htab, ".bss"));
3313 if (htab->vxworks_p)
3315 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3320 htab->plt_header_size = 0;
3321 htab->plt_entry_size
3322 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3326 htab->plt_header_size
3327 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3328 htab->plt_entry_size
3329 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3333 if (!htab->root.splt
3334 || !htab->root.srelplt
3336 || (!info->shared && !htab->srelbss))
3342 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3345 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3346 struct elf_link_hash_entry *dir,
3347 struct elf_link_hash_entry *ind)
3349 struct elf32_arm_link_hash_entry *edir, *eind;
3351 edir = (struct elf32_arm_link_hash_entry *) dir;
3352 eind = (struct elf32_arm_link_hash_entry *) ind;
3354 if (eind->dyn_relocs != NULL)
3356 if (edir->dyn_relocs != NULL)
3358 struct elf_dyn_relocs **pp;
3359 struct elf_dyn_relocs *p;
3361 /* Add reloc counts against the indirect sym to the direct sym
3362 list. Merge any entries against the same section. */
3363 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3365 struct elf_dyn_relocs *q;
3367 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3368 if (q->sec == p->sec)
3370 q->pc_count += p->pc_count;
3371 q->count += p->count;
3378 *pp = edir->dyn_relocs;
3381 edir->dyn_relocs = eind->dyn_relocs;
3382 eind->dyn_relocs = NULL;
3385 if (ind->root.type == bfd_link_hash_indirect)
3387 /* Copy over PLT info. */
3388 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3389 eind->plt.thumb_refcount = 0;
3390 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3391 eind->plt.maybe_thumb_refcount = 0;
3392 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3393 eind->plt.noncall_refcount = 0;
3395 /* We should only allocate a function to .iplt once the final
3396 symbol information is known. */
3397 BFD_ASSERT (!eind->is_iplt);
3399 if (dir->got.refcount <= 0)
3401 edir->tls_type = eind->tls_type;
3402 eind->tls_type = GOT_UNKNOWN;
3406 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3409 /* Create an ARM elf linker hash table. */
3411 static struct bfd_link_hash_table *
3412 elf32_arm_link_hash_table_create (bfd *abfd)
3414 struct elf32_arm_link_hash_table *ret;
3415 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3417 ret = (struct elf32_arm_link_hash_table *) bfd_malloc (amt);
3421 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3422 elf32_arm_link_hash_newfunc,
3423 sizeof (struct elf32_arm_link_hash_entry),
3430 ret->sdynbss = NULL;
3431 ret->srelbss = NULL;
3432 ret->srelplt2 = NULL;
3433 ret->dt_tlsdesc_plt = 0;
3434 ret->dt_tlsdesc_got = 0;
3435 ret->tls_trampoline = 0;
3436 ret->next_tls_desc_index = 0;
3437 ret->num_tls_desc = 0;
3438 ret->thumb_glue_size = 0;
3439 ret->arm_glue_size = 0;
3440 ret->bx_glue_size = 0;
3441 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
3442 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3443 ret->vfp11_erratum_glue_size = 0;
3444 ret->num_vfp11_fixes = 0;
3445 ret->fix_cortex_a8 = 0;
3446 ret->fix_arm1176 = 0;
3447 ret->bfd_of_glue_owner = NULL;
3448 ret->byteswap_code = 0;
3449 ret->target1_is_rel = 0;
3450 ret->target2_reloc = R_ARM_NONE;
3451 #ifdef FOUR_WORD_PLT
3452 ret->plt_header_size = 16;
3453 ret->plt_entry_size = 16;
3455 ret->plt_header_size = 20;
3456 ret->plt_entry_size = 12;
3464 ret->sym_cache.abfd = NULL;
3466 ret->tls_ldm_got.refcount = 0;
3467 ret->stub_bfd = NULL;
3468 ret->add_stub_section = NULL;
3469 ret->layout_sections_again = NULL;
3470 ret->stub_group = NULL;
3474 ret->input_list = NULL;
3476 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3477 sizeof (struct elf32_arm_stub_hash_entry)))
3483 return &ret->root.root;
3486 /* Free the derived linker hash table. */
3489 elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
3491 struct elf32_arm_link_hash_table *ret
3492 = (struct elf32_arm_link_hash_table *) hash;
3494 bfd_hash_table_free (&ret->stub_hash_table);
3495 _bfd_generic_link_hash_table_free (hash);
3498 /* Determine if we're dealing with a Thumb only architecture. */
3501 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3503 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3507 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
3510 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
3513 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3514 Tag_CPU_arch_profile);
3516 return profile == 'M';
3519 /* Determine if we're dealing with a Thumb-2 object. */
3522 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3524 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3526 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3529 /* Determine what kind of NOPs are available. */
3532 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3534 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3536 return arch == TAG_CPU_ARCH_V6T2
3537 || arch == TAG_CPU_ARCH_V6K
3538 || arch == TAG_CPU_ARCH_V7
3539 || arch == TAG_CPU_ARCH_V7E_M;
3543 arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3545 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3547 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3548 || arch == TAG_CPU_ARCH_V7E_M);
3552 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3556 case arm_stub_long_branch_thumb_only:
3557 case arm_stub_long_branch_v4t_thumb_arm:
3558 case arm_stub_short_branch_v4t_thumb_arm:
3559 case arm_stub_long_branch_v4t_thumb_arm_pic:
3560 case arm_stub_long_branch_v4t_thumb_tls_pic:
3561 case arm_stub_long_branch_thumb_only_pic:
3572 /* Determine the type of stub needed, if any, for a call. */
3574 static enum elf32_arm_stub_type
3575 arm_type_of_stub (struct bfd_link_info *info,
3576 asection *input_sec,
3577 const Elf_Internal_Rela *rel,
3578 unsigned char st_type,
3579 enum arm_st_branch_type *actual_branch_type,
3580 struct elf32_arm_link_hash_entry *hash,
3581 bfd_vma destination,
3587 bfd_signed_vma branch_offset;
3588 unsigned int r_type;
3589 struct elf32_arm_link_hash_table * globals;
3592 enum elf32_arm_stub_type stub_type = arm_stub_none;
3594 enum arm_st_branch_type branch_type = *actual_branch_type;
3595 union gotplt_union *root_plt;
3596 struct arm_plt_info *arm_plt;
3598 if (branch_type == ST_BRANCH_LONG)
3601 globals = elf32_arm_hash_table (info);
3602 if (globals == NULL)
3605 thumb_only = using_thumb_only (globals);
3607 thumb2 = using_thumb2 (globals);
3609 /* Determine where the call point is. */
3610 location = (input_sec->output_offset
3611 + input_sec->output_section->vma
3614 r_type = ELF32_R_TYPE (rel->r_info);
3616 /* For TLS call relocs, it is the caller's responsibility to provide
3617 the address of the appropriate trampoline. */
3618 if (r_type != R_ARM_TLS_CALL
3619 && r_type != R_ARM_THM_TLS_CALL
3620 && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
3621 &root_plt, &arm_plt)
3622 && root_plt->offset != (bfd_vma) -1)
3626 if (hash == NULL || hash->is_iplt)
3627 splt = globals->root.iplt;
3629 splt = globals->root.splt;
3634 /* Note when dealing with PLT entries: the main PLT stub is in
3635 ARM mode, so if the branch is in Thumb mode, another
3636 Thumb->ARM stub will be inserted later just before the ARM
3637 PLT stub. We don't take this extra distance into account
3638 here, because if a long branch stub is needed, we'll add a
3639 Thumb->Arm one and branch directly to the ARM PLT entry
3640 because it avoids spreading offset corrections in several
3643 destination = (splt->output_section->vma
3644 + splt->output_offset
3645 + root_plt->offset);
3647 branch_type = ST_BRANCH_TO_ARM;
3650 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3651 BFD_ASSERT (st_type != STT_GNU_IFUNC);
3653 branch_offset = (bfd_signed_vma)(destination - location);
3655 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3656 || r_type == R_ARM_THM_TLS_CALL)
3658 /* Handle cases where:
3659 - this call goes too far (different Thumb/Thumb2 max
3661 - it's a Thumb->Arm call and blx is not available, or it's a
3662 Thumb->Arm branch (not bl). A stub is needed in this case,
3663 but only if this call is not through a PLT entry. Indeed,
3664 PLT stubs handle mode switching already.
3667 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3668 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3670 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3671 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
3672 || (branch_type == ST_BRANCH_TO_ARM
3673 && (((r_type == R_ARM_THM_CALL
3674 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
3675 || (r_type == R_ARM_THM_JUMP24))
3678 if (branch_type == ST_BRANCH_TO_THUMB)
3680 /* Thumb to thumb. */
3683 stub_type = (info->shared | globals->pic_veneer)
3685 ? ((globals->use_blx
3686 && (r_type == R_ARM_THM_CALL))
3687 /* V5T and above. Stub starts with ARM code, so
3688 we must be able to switch mode before
3689 reaching it, which is only possible for 'bl'
3690 (ie R_ARM_THM_CALL relocation). */
3691 ? arm_stub_long_branch_any_thumb_pic
3692 /* On V4T, use Thumb code only. */
3693 : arm_stub_long_branch_v4t_thumb_thumb_pic)
3695 /* non-PIC stubs. */
3696 : ((globals->use_blx
3697 && (r_type == R_ARM_THM_CALL))
3698 /* V5T and above. */
3699 ? arm_stub_long_branch_any_any
3701 : arm_stub_long_branch_v4t_thumb_thumb);
3705 stub_type = (info->shared | globals->pic_veneer)
3707 ? arm_stub_long_branch_thumb_only_pic
3709 : arm_stub_long_branch_thumb_only;
3716 && sym_sec->owner != NULL
3717 && !INTERWORK_FLAG (sym_sec->owner))
3719 (*_bfd_error_handler)
3720 (_("%B(%s): warning: interworking not enabled.\n"
3721 " first occurrence: %B: Thumb call to ARM"),
3722 sym_sec->owner, input_bfd, name);
3726 (info->shared | globals->pic_veneer)
3728 ? (r_type == R_ARM_THM_TLS_CALL
3730 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3731 : arm_stub_long_branch_v4t_thumb_tls_pic)
3732 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3733 /* V5T PIC and above. */
3734 ? arm_stub_long_branch_any_arm_pic
3736 : arm_stub_long_branch_v4t_thumb_arm_pic))
3738 /* non-PIC stubs. */
3739 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3740 /* V5T and above. */
3741 ? arm_stub_long_branch_any_any
3743 : arm_stub_long_branch_v4t_thumb_arm);
3745 /* Handle v4t short branches. */
3746 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
3747 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3748 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
3749 stub_type = arm_stub_short_branch_v4t_thumb_arm;
3753 else if (r_type == R_ARM_CALL
3754 || r_type == R_ARM_JUMP24
3755 || r_type == R_ARM_PLT32
3756 || r_type == R_ARM_TLS_CALL)
3758 if (branch_type == ST_BRANCH_TO_THUMB)
3763 && sym_sec->owner != NULL
3764 && !INTERWORK_FLAG (sym_sec->owner))
3766 (*_bfd_error_handler)
3767 (_("%B(%s): warning: interworking not enabled.\n"
3768 " first occurrence: %B: ARM call to Thumb"),
3769 sym_sec->owner, input_bfd, name);
3772 /* We have an extra 2-bytes reach because of
3773 the mode change (bit 24 (H) of BLX encoding). */
3774 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3775 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3776 || (r_type == R_ARM_CALL && !globals->use_blx)
3777 || (r_type == R_ARM_JUMP24)
3778 || (r_type == R_ARM_PLT32))
3780 stub_type = (info->shared | globals->pic_veneer)
3782 ? ((globals->use_blx)
3783 /* V5T and above. */
3784 ? arm_stub_long_branch_any_thumb_pic
3786 : arm_stub_long_branch_v4t_arm_thumb_pic)
3788 /* non-PIC stubs. */
3789 : ((globals->use_blx)
3790 /* V5T and above. */
3791 ? arm_stub_long_branch_any_any
3793 : arm_stub_long_branch_v4t_arm_thumb);
3799 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3800 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3803 (info->shared | globals->pic_veneer)
3805 ? (r_type == R_ARM_TLS_CALL
3807 ? arm_stub_long_branch_any_tls_pic
3808 : arm_stub_long_branch_any_arm_pic)
3809 /* non-PIC stubs. */
3810 : arm_stub_long_branch_any_any;
3815 /* If a stub is needed, record the actual destination type. */
3816 if (stub_type != arm_stub_none)
3817 *actual_branch_type = branch_type;
3822 /* Build a name for an entry in the stub hash table. */
3825 elf32_arm_stub_name (const asection *input_section,
3826 const asection *sym_sec,
3827 const struct elf32_arm_link_hash_entry *hash,
3828 const Elf_Internal_Rela *rel,
3829 enum elf32_arm_stub_type stub_type)
3836 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
3837 stub_name = (char *) bfd_malloc (len);
3838 if (stub_name != NULL)
3839 sprintf (stub_name, "%08x_%s+%x_%d",
3840 input_section->id & 0xffffffff,
3841 hash->root.root.root.string,
3842 (int) rel->r_addend & 0xffffffff,
3847 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
3848 stub_name = (char *) bfd_malloc (len);
3849 if (stub_name != NULL)
3850 sprintf (stub_name, "%08x_%x:%x+%x_%d",
3851 input_section->id & 0xffffffff,
3852 sym_sec->id & 0xffffffff,
3853 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
3854 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
3855 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
3856 (int) rel->r_addend & 0xffffffff,
3863 /* Look up an entry in the stub hash. Stub entries are cached because
3864 creating the stub name takes a bit of time. */
3866 static struct elf32_arm_stub_hash_entry *
3867 elf32_arm_get_stub_entry (const asection *input_section,
3868 const asection *sym_sec,
3869 struct elf_link_hash_entry *hash,
3870 const Elf_Internal_Rela *rel,
3871 struct elf32_arm_link_hash_table *htab,
3872 enum elf32_arm_stub_type stub_type)
3874 struct elf32_arm_stub_hash_entry *stub_entry;
3875 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3876 const asection *id_sec;
3878 if ((input_section->flags & SEC_CODE) == 0)
3881 /* If this input section is part of a group of sections sharing one
3882 stub section, then use the id of the first section in the group.
3883 Stub names need to include a section id, as there may well be
3884 more than one stub used to reach say, printf, and we need to
3885 distinguish between them. */
3886 id_sec = htab->stub_group[input_section->id].link_sec;
3888 if (h != NULL && h->stub_cache != NULL
3889 && h->stub_cache->h == h
3890 && h->stub_cache->id_sec == id_sec
3891 && h->stub_cache->stub_type == stub_type)
3893 stub_entry = h->stub_cache;
3899 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
3900 if (stub_name == NULL)
3903 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3904 stub_name, FALSE, FALSE);
3906 h->stub_cache = stub_entry;
3914 /* Find or create a stub section. Returns a pointer to the stub section, and
3915 the section to which the stub section will be attached (in *LINK_SEC_P).
3916 LINK_SEC_P may be NULL. */
3919 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3920 struct elf32_arm_link_hash_table *htab)
3925 link_sec = htab->stub_group[section->id].link_sec;
3926 BFD_ASSERT (link_sec != NULL);
3927 stub_sec = htab->stub_group[section->id].stub_sec;
3929 if (stub_sec == NULL)
3931 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3932 if (stub_sec == NULL)
3938 namelen = strlen (link_sec->name);
3939 len = namelen + sizeof (STUB_SUFFIX);
3940 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
3944 memcpy (s_name, link_sec->name, namelen);
3945 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3946 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3947 if (stub_sec == NULL)
3949 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3951 htab->stub_group[section->id].stub_sec = stub_sec;
3955 *link_sec_p = link_sec;
3960 /* Add a new stub entry to the stub hash. Not all fields of the new
3961 stub entry are initialised. */
3963 static struct elf32_arm_stub_hash_entry *
3964 elf32_arm_add_stub (const char *stub_name,
3966 struct elf32_arm_link_hash_table *htab)
3970 struct elf32_arm_stub_hash_entry *stub_entry;
3972 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3973 if (stub_sec == NULL)
3976 /* Enter this entry into the linker stub hash table. */
3977 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3979 if (stub_entry == NULL)
3981 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3987 stub_entry->stub_sec = stub_sec;
3988 stub_entry->stub_offset = 0;
3989 stub_entry->id_sec = link_sec;
3994 /* Store an Arm insn into an output section not processed by
3995 elf32_arm_write_section. */
3998 put_arm_insn (struct elf32_arm_link_hash_table * htab,
3999 bfd * output_bfd, bfd_vma val, void * ptr)
4001 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4002 bfd_putl32 (val, ptr);
4004 bfd_putb32 (val, ptr);
4007 /* Store a 16-bit Thumb insn into an output section not processed by
4008 elf32_arm_write_section. */
4011 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4012 bfd * output_bfd, bfd_vma val, void * ptr)
4014 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4015 bfd_putl16 (val, ptr);
4017 bfd_putb16 (val, ptr);
4020 /* If it's possible to change R_TYPE to a more efficient access
4021 model, return the new reloc type. */
4024 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4025 struct elf_link_hash_entry *h)
4027 int is_local = (h == NULL);
4029 if (info->shared || (h && h->root.type == bfd_link_hash_undefweak))
4032 /* We do not support relaxations for Old TLS models. */
4035 case R_ARM_TLS_GOTDESC:
4036 case R_ARM_TLS_CALL:
4037 case R_ARM_THM_TLS_CALL:
4038 case R_ARM_TLS_DESCSEQ:
4039 case R_ARM_THM_TLS_DESCSEQ:
4040 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4046 static bfd_reloc_status_type elf32_arm_final_link_relocate
4047 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4048 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4049 const char *, unsigned char, enum arm_st_branch_type,
4050 struct elf_link_hash_entry *, bfd_boolean *, char **);
4053 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4057 case arm_stub_a8_veneer_b_cond:
4058 case arm_stub_a8_veneer_b:
4059 case arm_stub_a8_veneer_bl:
4062 case arm_stub_long_branch_any_any:
4063 case arm_stub_long_branch_v4t_arm_thumb:
4064 case arm_stub_long_branch_thumb_only:
4065 case arm_stub_long_branch_v4t_thumb_thumb:
4066 case arm_stub_long_branch_v4t_thumb_arm:
4067 case arm_stub_short_branch_v4t_thumb_arm:
4068 case arm_stub_long_branch_any_arm_pic:
4069 case arm_stub_long_branch_any_thumb_pic:
4070 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4071 case arm_stub_long_branch_v4t_arm_thumb_pic:
4072 case arm_stub_long_branch_v4t_thumb_arm_pic:
4073 case arm_stub_long_branch_thumb_only_pic:
4074 case arm_stub_long_branch_any_tls_pic:
4075 case arm_stub_long_branch_v4t_thumb_tls_pic:
4076 case arm_stub_a8_veneer_blx:
4080 abort (); /* Should be unreachable. */
4085 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4089 struct elf32_arm_stub_hash_entry *stub_entry;
4090 struct elf32_arm_link_hash_table *globals;
4091 struct bfd_link_info *info;
4098 const insn_sequence *template_sequence;
4100 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4101 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4104 /* Massage our args to the form they really have. */
4105 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4106 info = (struct bfd_link_info *) in_arg;
4108 globals = elf32_arm_hash_table (info);
4109 if (globals == NULL)
4112 stub_sec = stub_entry->stub_sec;
4114 if ((globals->fix_cortex_a8 < 0)
4115 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4116 /* We have to do less-strictly-aligned fixes last. */
4119 /* Make a note of the offset within the stubs for this entry. */
4120 stub_entry->stub_offset = stub_sec->size;
4121 loc = stub_sec->contents + stub_entry->stub_offset;
4123 stub_bfd = stub_sec->owner;
4125 /* This is the address of the stub destination. */
4126 sym_value = (stub_entry->target_value
4127 + stub_entry->target_section->output_offset
4128 + stub_entry->target_section->output_section->vma);
4130 template_sequence = stub_entry->stub_template;
4131 template_size = stub_entry->stub_template_size;
4134 for (i = 0; i < template_size; i++)
4136 switch (template_sequence[i].type)
4140 bfd_vma data = (bfd_vma) template_sequence[i].data;
4141 if (template_sequence[i].reloc_addend != 0)
4143 /* We've borrowed the reloc_addend field to mean we should
4144 insert a condition code into this (Thumb-1 branch)
4145 instruction. See THUMB16_BCOND_INSN. */
4146 BFD_ASSERT ((data & 0xff00) == 0xd000);
4147 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4149 bfd_put_16 (stub_bfd, data, loc + size);
4155 bfd_put_16 (stub_bfd,
4156 (template_sequence[i].data >> 16) & 0xffff,
4158 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4160 if (template_sequence[i].r_type != R_ARM_NONE)
4162 stub_reloc_idx[nrelocs] = i;
4163 stub_reloc_offset[nrelocs++] = size;
4169 bfd_put_32 (stub_bfd, template_sequence[i].data,
4171 /* Handle cases where the target is encoded within the
4173 if (template_sequence[i].r_type == R_ARM_JUMP24)
4175 stub_reloc_idx[nrelocs] = i;
4176 stub_reloc_offset[nrelocs++] = size;
4182 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
4183 stub_reloc_idx[nrelocs] = i;
4184 stub_reloc_offset[nrelocs++] = size;
4194 stub_sec->size += size;
4196 /* Stub size has already been computed in arm_size_one_stub. Check
4198 BFD_ASSERT (size == stub_entry->stub_size);
4200 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4201 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
4204 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4206 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
4208 for (i = 0; i < nrelocs; i++)
4209 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
4210 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
4211 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
4212 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
4214 Elf_Internal_Rela rel;
4215 bfd_boolean unresolved_reloc;
4216 char *error_message;
4217 enum arm_st_branch_type branch_type
4218 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22
4219 ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM);
4220 bfd_vma points_to = sym_value + stub_entry->target_addend;
4222 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4223 rel.r_info = ELF32_R_INFO (0,
4224 template_sequence[stub_reloc_idx[i]].r_type);
4225 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
4227 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4228 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4229 template should refer back to the instruction after the original
4231 points_to = sym_value;
4233 /* There may be unintended consequences if this is not true. */
4234 BFD_ASSERT (stub_entry->h == NULL);
4236 /* Note: _bfd_final_link_relocate doesn't handle these relocations
4237 properly. We should probably use this function unconditionally,
4238 rather than only for certain relocations listed in the enclosing
4239 conditional, for the sake of consistency. */
4240 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4241 (template_sequence[stub_reloc_idx[i]].r_type),
4242 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4243 points_to, info, stub_entry->target_section, "", STT_FUNC,
4244 branch_type, (struct elf_link_hash_entry *) stub_entry->h,
4245 &unresolved_reloc, &error_message);
4249 Elf_Internal_Rela rel;
4250 bfd_boolean unresolved_reloc;
4251 char *error_message;
4252 bfd_vma points_to = sym_value + stub_entry->target_addend
4253 + template_sequence[stub_reloc_idx[i]].reloc_addend;
4255 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4256 rel.r_info = ELF32_R_INFO (0,
4257 template_sequence[stub_reloc_idx[i]].r_type);
4260 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4261 (template_sequence[stub_reloc_idx[i]].r_type),
4262 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4263 points_to, info, stub_entry->target_section, "", STT_FUNC,
4264 stub_entry->branch_type,
4265 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4273 /* Calculate the template, template size and instruction size for a stub.
4274 Return value is the instruction size. */
4277 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4278 const insn_sequence **stub_template,
4279 int *stub_template_size)
4281 const insn_sequence *template_sequence = NULL;
4282 int template_size = 0, i;
4285 template_sequence = stub_definitions[stub_type].template_sequence;
4287 *stub_template = template_sequence;
4289 template_size = stub_definitions[stub_type].template_size;
4290 if (stub_template_size)
4291 *stub_template_size = template_size;
4294 for (i = 0; i < template_size; i++)
4296 switch (template_sequence[i].type)
4317 /* As above, but don't actually build the stub. Just bump offset so
4318 we know stub section sizes. */
4321 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
4322 void *in_arg ATTRIBUTE_UNUSED)
4324 struct elf32_arm_stub_hash_entry *stub_entry;
4325 const insn_sequence *template_sequence;
4326 int template_size, size;
4328 /* Massage our args to the form they really have. */
4329 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4331 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4332 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4334 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
4337 stub_entry->stub_size = size;
4338 stub_entry->stub_template = template_sequence;
4339 stub_entry->stub_template_size = template_size;
4341 size = (size + 7) & ~7;
4342 stub_entry->stub_sec->size += size;
4347 /* External entry points for sizing and building linker stubs. */
4349 /* Set up various things so that we can make a list of input sections
4350 for each output section included in the link. Returns -1 on error,
4351 0 when no stubs will be needed, and 1 on success. */
4354 elf32_arm_setup_section_lists (bfd *output_bfd,
4355 struct bfd_link_info *info)
4358 unsigned int bfd_count;
4359 int top_id, top_index;
4361 asection **input_list, **list;
4363 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4367 if (! is_elf_hash_table (htab))
4370 /* Count the number of input BFDs and find the top input section id. */
4371 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4373 input_bfd = input_bfd->link_next)
4376 for (section = input_bfd->sections;
4378 section = section->next)
4380 if (top_id < section->id)
4381 top_id = section->id;
4384 htab->bfd_count = bfd_count;
4386 amt = sizeof (struct map_stub) * (top_id + 1);
4387 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
4388 if (htab->stub_group == NULL)
4390 htab->top_id = top_id;
4392 /* We can't use output_bfd->section_count here to find the top output
4393 section index as some sections may have been removed, and
4394 _bfd_strip_section_from_output doesn't renumber the indices. */
4395 for (section = output_bfd->sections, top_index = 0;
4397 section = section->next)
4399 if (top_index < section->index)
4400 top_index = section->index;
4403 htab->top_index = top_index;
4404 amt = sizeof (asection *) * (top_index + 1);
4405 input_list = (asection **) bfd_malloc (amt);
4406 htab->input_list = input_list;
4407 if (input_list == NULL)
4410 /* For sections we aren't interested in, mark their entries with a
4411 value we can check later. */
4412 list = input_list + top_index;
4414 *list = bfd_abs_section_ptr;
4415 while (list-- != input_list);
4417 for (section = output_bfd->sections;
4419 section = section->next)
4421 if ((section->flags & SEC_CODE) != 0)
4422 input_list[section->index] = NULL;
4428 /* The linker repeatedly calls this function for each input section,
4429 in the order that input sections are linked into output sections.
4430 Build lists of input sections to determine groupings between which
4431 we may insert linker stubs. */
4434 elf32_arm_next_input_section (struct bfd_link_info *info,
4437 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4442 if (isec->output_section->index <= htab->top_index)
4444 asection **list = htab->input_list + isec->output_section->index;
4446 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
4448 /* Steal the link_sec pointer for our list. */
4449 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4450 /* This happens to make the list in reverse order,
4451 which we reverse later. */
4452 PREV_SEC (isec) = *list;
4458 /* See whether we can group stub sections together. Grouping stub
4459 sections may result in fewer stubs. More importantly, we need to
4460 put all .init* and .fini* stubs at the end of the .init or
4461 .fini output sections respectively, because glibc splits the
4462 _init and _fini functions into multiple parts. Putting a stub in
4463 the middle of a function is not a good idea. */
4466 group_sections (struct elf32_arm_link_hash_table *htab,
4467 bfd_size_type stub_group_size,
4468 bfd_boolean stubs_always_after_branch)
4470 asection **list = htab->input_list;
4474 asection *tail = *list;
4477 if (tail == bfd_abs_section_ptr)
4480 /* Reverse the list: we must avoid placing stubs at the
4481 beginning of the section because the beginning of the text
4482 section may be required for an interrupt vector in bare metal
4484 #define NEXT_SEC PREV_SEC
4486 while (tail != NULL)
4488 /* Pop from tail. */
4489 asection *item = tail;
4490 tail = PREV_SEC (item);
4493 NEXT_SEC (item) = head;
4497 while (head != NULL)
4501 bfd_vma stub_group_start = head->output_offset;
4502 bfd_vma end_of_next;
4505 while (NEXT_SEC (curr) != NULL)
4507 next = NEXT_SEC (curr);
4508 end_of_next = next->output_offset + next->size;
4509 if (end_of_next - stub_group_start >= stub_group_size)
4510 /* End of NEXT is too far from start, so stop. */
4512 /* Add NEXT to the group. */
4516 /* OK, the size from the start to the start of CURR is less
4517 than stub_group_size and thus can be handled by one stub
4518 section. (Or the head section is itself larger than
4519 stub_group_size, in which case we may be toast.)
4520 We should really be keeping track of the total size of
4521 stubs added here, as stubs contribute to the final output
4525 next = NEXT_SEC (head);
4526 /* Set up this stub group. */
4527 htab->stub_group[head->id].link_sec = curr;
4529 while (head != curr && (head = next) != NULL);
4531 /* But wait, there's more! Input sections up to stub_group_size
4532 bytes after the stub section can be handled by it too. */
4533 if (!stubs_always_after_branch)
4535 stub_group_start = curr->output_offset + curr->size;
4537 while (next != NULL)
4539 end_of_next = next->output_offset + next->size;
4540 if (end_of_next - stub_group_start >= stub_group_size)
4541 /* End of NEXT is too far from stubs, so stop. */
4543 /* Add NEXT to the stub group. */
4545 next = NEXT_SEC (head);
4546 htab->stub_group[head->id].link_sec = curr;
4552 while (list++ != htab->input_list + htab->top_index);
4554 free (htab->input_list);
4559 /* Comparison function for sorting/searching relocations relating to Cortex-A8
4563 a8_reloc_compare (const void *a, const void *b)
4565 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4566 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
4568 if (ra->from < rb->from)
4570 else if (ra->from > rb->from)
4576 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4577 const char *, char **);
4579 /* Helper function to scan code for sequences which might trigger the Cortex-A8
4580 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
4581 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
4585 cortex_a8_erratum_scan (bfd *input_bfd,
4586 struct bfd_link_info *info,
4587 struct a8_erratum_fix **a8_fixes_p,
4588 unsigned int *num_a8_fixes_p,
4589 unsigned int *a8_fix_table_size_p,
4590 struct a8_erratum_reloc *a8_relocs,
4591 unsigned int num_a8_relocs,
4592 unsigned prev_num_a8_fixes,
4593 bfd_boolean *stub_changed_p)
4596 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4597 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4598 unsigned int num_a8_fixes = *num_a8_fixes_p;
4599 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4604 for (section = input_bfd->sections;
4606 section = section->next)
4608 bfd_byte *contents = NULL;
4609 struct _arm_elf_section_data *sec_data;
4613 if (elf_section_type (section) != SHT_PROGBITS
4614 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4615 || (section->flags & SEC_EXCLUDE) != 0
4616 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
4617 || (section->output_section == bfd_abs_section_ptr))
4620 base_vma = section->output_section->vma + section->output_offset;
4622 if (elf_section_data (section)->this_hdr.contents != NULL)
4623 contents = elf_section_data (section)->this_hdr.contents;
4624 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
4627 sec_data = elf32_arm_section_data (section);
4629 for (span = 0; span < sec_data->mapcount; span++)
4631 unsigned int span_start = sec_data->map[span].vma;
4632 unsigned int span_end = (span == sec_data->mapcount - 1)
4633 ? section->size : sec_data->map[span + 1].vma;
4635 char span_type = sec_data->map[span].type;
4636 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4638 if (span_type != 't')
4641 /* Span is entirely within a single 4KB region: skip scanning. */
4642 if (((base_vma + span_start) & ~0xfff)
4643 == ((base_vma + span_end) & ~0xfff))
4646 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4648 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4649 * The branch target is in the same 4KB region as the
4650 first half of the branch.
4651 * The instruction before the branch is a 32-bit
4652 length non-branch instruction. */
4653 for (i = span_start; i < span_end;)
4655 unsigned int insn = bfd_getl16 (&contents[i]);
4656 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4657 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4659 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4664 /* Load the rest of the insn (in manual-friendly order). */
4665 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4667 /* Encoding T4: B<c>.W. */
4668 is_b = (insn & 0xf800d000) == 0xf0009000;
4669 /* Encoding T1: BL<c>.W. */
4670 is_bl = (insn & 0xf800d000) == 0xf000d000;
4671 /* Encoding T2: BLX<c>.W. */
4672 is_blx = (insn & 0xf800d000) == 0xf000c000;
4673 /* Encoding T3: B<c>.W (not permitted in IT block). */
4674 is_bcc = (insn & 0xf800d000) == 0xf0008000
4675 && (insn & 0x07f00000) != 0x03800000;
4678 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
4680 if (((base_vma + i) & 0xfff) == 0xffe
4684 && ! last_was_branch)
4686 bfd_signed_vma offset = 0;
4687 bfd_boolean force_target_arm = FALSE;
4688 bfd_boolean force_target_thumb = FALSE;
4690 enum elf32_arm_stub_type stub_type = arm_stub_none;
4691 struct a8_erratum_reloc key, *found;
4692 bfd_boolean use_plt = FALSE;
4694 key.from = base_vma + i;
4695 found = (struct a8_erratum_reloc *)
4696 bsearch (&key, a8_relocs, num_a8_relocs,
4697 sizeof (struct a8_erratum_reloc),
4702 char *error_message = NULL;
4703 struct elf_link_hash_entry *entry;
4705 /* We don't care about the error returned from this
4706 function, only if there is glue or not. */
4707 entry = find_thumb_glue (info, found->sym_name,
4711 found->non_a8_stub = TRUE;
4713 /* Keep a simpler condition, for the sake of clarity. */
4714 if (htab->root.splt != NULL && found->hash != NULL
4715 && found->hash->root.plt.offset != (bfd_vma) -1)
4718 if (found->r_type == R_ARM_THM_CALL)
4720 if (found->branch_type == ST_BRANCH_TO_ARM
4722 force_target_arm = TRUE;
4724 force_target_thumb = TRUE;
4728 /* Check if we have an offending branch instruction. */
4730 if (found && found->non_a8_stub)
4731 /* We've already made a stub for this instruction, e.g.
4732 it's a long branch or a Thumb->ARM stub. Assume that
4733 stub will suffice to work around the A8 erratum (see
4734 setting of always_after_branch above). */
4738 offset = (insn & 0x7ff) << 1;
4739 offset |= (insn & 0x3f0000) >> 4;
4740 offset |= (insn & 0x2000) ? 0x40000 : 0;
4741 offset |= (insn & 0x800) ? 0x80000 : 0;
4742 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4743 if (offset & 0x100000)
4744 offset |= ~ ((bfd_signed_vma) 0xfffff);
4745 stub_type = arm_stub_a8_veneer_b_cond;
4747 else if (is_b || is_bl || is_blx)
4749 int s = (insn & 0x4000000) != 0;
4750 int j1 = (insn & 0x2000) != 0;
4751 int j2 = (insn & 0x800) != 0;
4755 offset = (insn & 0x7ff) << 1;
4756 offset |= (insn & 0x3ff0000) >> 4;
4760 if (offset & 0x1000000)
4761 offset |= ~ ((bfd_signed_vma) 0xffffff);
4764 offset &= ~ ((bfd_signed_vma) 3);
4766 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4767 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4770 if (stub_type != arm_stub_none)
4772 bfd_vma pc_for_insn = base_vma + i + 4;
4774 /* The original instruction is a BL, but the target is
4775 an ARM instruction. If we were not making a stub,
4776 the BL would have been converted to a BLX. Use the
4777 BLX stub instead in that case. */
4778 if (htab->use_blx && force_target_arm
4779 && stub_type == arm_stub_a8_veneer_bl)
4781 stub_type = arm_stub_a8_veneer_blx;
4785 /* Conversely, if the original instruction was
4786 BLX but the target is Thumb mode, use the BL
4788 else if (force_target_thumb
4789 && stub_type == arm_stub_a8_veneer_blx)
4791 stub_type = arm_stub_a8_veneer_bl;
4797 pc_for_insn &= ~ ((bfd_vma) 3);
4799 /* If we found a relocation, use the proper destination,
4800 not the offset in the (unrelocated) instruction.
4801 Note this is always done if we switched the stub type
4805 (bfd_signed_vma) (found->destination - pc_for_insn);
4807 /* If the stub will use a Thumb-mode branch to a
4808 PLT target, redirect it to the preceding Thumb
4810 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
4811 offset -= PLT_THUMB_STUB_SIZE;
4813 target = pc_for_insn + offset;
4815 /* The BLX stub is ARM-mode code. Adjust the offset to
4816 take the different PC value (+8 instead of +4) into
4818 if (stub_type == arm_stub_a8_veneer_blx)
4821 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4823 char *stub_name = NULL;
4825 if (num_a8_fixes == a8_fix_table_size)
4827 a8_fix_table_size *= 2;
4828 a8_fixes = (struct a8_erratum_fix *)
4829 bfd_realloc (a8_fixes,
4830 sizeof (struct a8_erratum_fix)
4831 * a8_fix_table_size);
4834 if (num_a8_fixes < prev_num_a8_fixes)
4836 /* If we're doing a subsequent scan,
4837 check if we've found the same fix as
4838 before, and try and reuse the stub
4840 stub_name = a8_fixes[num_a8_fixes].stub_name;
4841 if ((a8_fixes[num_a8_fixes].section != section)
4842 || (a8_fixes[num_a8_fixes].offset != i))
4846 *stub_changed_p = TRUE;
4852 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
4853 if (stub_name != NULL)
4854 sprintf (stub_name, "%x:%x", section->id, i);
4857 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4858 a8_fixes[num_a8_fixes].section = section;
4859 a8_fixes[num_a8_fixes].offset = i;
4860 a8_fixes[num_a8_fixes].addend = offset;
4861 a8_fixes[num_a8_fixes].orig_insn = insn;
4862 a8_fixes[num_a8_fixes].stub_name = stub_name;
4863 a8_fixes[num_a8_fixes].stub_type = stub_type;
4864 a8_fixes[num_a8_fixes].branch_type =
4865 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
4872 i += insn_32bit ? 4 : 2;
4873 last_was_32bit = insn_32bit;
4874 last_was_branch = is_32bit_branch;
4878 if (elf_section_data (section)->this_hdr.contents == NULL)
4882 *a8_fixes_p = a8_fixes;
4883 *num_a8_fixes_p = num_a8_fixes;
4884 *a8_fix_table_size_p = a8_fix_table_size;
4889 /* Determine and set the size of the stub section for a final link.
4891 The basic idea here is to examine all the relocations looking for
4892 PC-relative calls to a target that is unreachable with a "bl"
4896 elf32_arm_size_stubs (bfd *output_bfd,
4898 struct bfd_link_info *info,
4899 bfd_signed_vma group_size,
4900 asection * (*add_stub_section) (const char *, asection *),
4901 void (*layout_sections_again) (void))
4903 bfd_size_type stub_group_size;
4904 bfd_boolean stubs_always_after_branch;
4905 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4906 struct a8_erratum_fix *a8_fixes = NULL;
4907 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
4908 struct a8_erratum_reloc *a8_relocs = NULL;
4909 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4914 if (htab->fix_cortex_a8)
4916 a8_fixes = (struct a8_erratum_fix *)
4917 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
4918 a8_relocs = (struct a8_erratum_reloc *)
4919 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
4922 /* Propagate mach to stub bfd, because it may not have been
4923 finalized when we created stub_bfd. */
4924 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4925 bfd_get_mach (output_bfd));
4927 /* Stash our params away. */
4928 htab->stub_bfd = stub_bfd;
4929 htab->add_stub_section = add_stub_section;
4930 htab->layout_sections_again = layout_sections_again;
4931 stubs_always_after_branch = group_size < 0;
4933 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4934 as the first half of a 32-bit branch straddling two 4K pages. This is a
4935 crude way of enforcing that. */
4936 if (htab->fix_cortex_a8)
4937 stubs_always_after_branch = 1;
4940 stub_group_size = -group_size;
4942 stub_group_size = group_size;
4944 if (stub_group_size == 1)
4946 /* Default values. */
4947 /* Thumb branch range is +-4MB has to be used as the default
4948 maximum size (a given section can contain both ARM and Thumb
4949 code, so the worst case has to be taken into account).
4951 This value is 24K less than that, which allows for 2025
4952 12-byte stubs. If we exceed that, then we will fail to link.
4953 The user will have to relink with an explicit group size
4955 stub_group_size = 4170000;
4958 group_sections (htab, stub_group_size, stubs_always_after_branch);
4960 /* If we're applying the cortex A8 fix, we need to determine the
4961 program header size now, because we cannot change it later --
4962 that could alter section placements. Notice the A8 erratum fix
4963 ends up requiring the section addresses to remain unchanged
4964 modulo the page size. That's something we cannot represent
4965 inside BFD, and we don't want to force the section alignment to
4966 be the page size. */
4967 if (htab->fix_cortex_a8)
4968 (*htab->layout_sections_again) ();
4973 unsigned int bfd_indx;
4975 bfd_boolean stub_changed = FALSE;
4976 unsigned prev_num_a8_fixes = num_a8_fixes;
4979 for (input_bfd = info->input_bfds, bfd_indx = 0;
4981 input_bfd = input_bfd->link_next, bfd_indx++)
4983 Elf_Internal_Shdr *symtab_hdr;
4985 Elf_Internal_Sym *local_syms = NULL;
4989 /* We'll need the symbol table in a second. */
4990 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4991 if (symtab_hdr->sh_info == 0)
4994 /* Walk over each section attached to the input bfd. */
4995 for (section = input_bfd->sections;
4997 section = section->next)
4999 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
5001 /* If there aren't any relocs, then there's nothing more
5003 if ((section->flags & SEC_RELOC) == 0
5004 || section->reloc_count == 0
5005 || (section->flags & SEC_CODE) == 0)
5008 /* If this section is a link-once section that will be
5009 discarded, then don't create any stubs. */
5010 if (section->output_section == NULL
5011 || section->output_section->owner != output_bfd)
5014 /* Get the relocs. */
5016 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
5017 NULL, info->keep_memory);
5018 if (internal_relocs == NULL)
5019 goto error_ret_free_local;
5021 /* Now examine each relocation. */
5022 irela = internal_relocs;
5023 irelaend = irela + section->reloc_count;
5024 for (; irela < irelaend; irela++)
5026 unsigned int r_type, r_indx;
5027 enum elf32_arm_stub_type stub_type;
5028 struct elf32_arm_stub_hash_entry *stub_entry;
5031 bfd_vma destination;
5032 struct elf32_arm_link_hash_entry *hash;
5033 const char *sym_name;
5035 const asection *id_sec;
5036 unsigned char st_type;
5037 enum arm_st_branch_type branch_type;
5038 bfd_boolean created_stub = FALSE;
5040 r_type = ELF32_R_TYPE (irela->r_info);
5041 r_indx = ELF32_R_SYM (irela->r_info);
5043 if (r_type >= (unsigned int) R_ARM_max)
5045 bfd_set_error (bfd_error_bad_value);
5046 error_ret_free_internal:
5047 if (elf_section_data (section)->relocs == NULL)
5048 free (internal_relocs);
5049 goto error_ret_free_local;
5053 if (r_indx >= symtab_hdr->sh_info)
5054 hash = elf32_arm_hash_entry
5055 (elf_sym_hashes (input_bfd)
5056 [r_indx - symtab_hdr->sh_info]);
5058 /* Only look for stubs on branch instructions, or
5059 non-relaxed TLSCALL */
5060 if ((r_type != (unsigned int) R_ARM_CALL)
5061 && (r_type != (unsigned int) R_ARM_THM_CALL)
5062 && (r_type != (unsigned int) R_ARM_JUMP24)
5063 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
5064 && (r_type != (unsigned int) R_ARM_THM_XPC22)
5065 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
5066 && (r_type != (unsigned int) R_ARM_PLT32)
5067 && !((r_type == (unsigned int) R_ARM_TLS_CALL
5068 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5069 && r_type == elf32_arm_tls_transition
5070 (info, r_type, &hash->root)
5071 && ((hash ? hash->tls_type
5072 : (elf32_arm_local_got_tls_type
5073 (input_bfd)[r_indx]))
5074 & GOT_TLS_GDESC) != 0))
5077 /* Now determine the call target, its name, value,
5084 if (r_type == (unsigned int) R_ARM_TLS_CALL
5085 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5087 /* A non-relaxed TLS call. The target is the
5088 plt-resident trampoline and nothing to do
5090 BFD_ASSERT (htab->tls_trampoline > 0);
5091 sym_sec = htab->root.splt;
5092 sym_value = htab->tls_trampoline;
5095 branch_type = ST_BRANCH_TO_ARM;
5099 /* It's a local symbol. */
5100 Elf_Internal_Sym *sym;
5102 if (local_syms == NULL)
5105 = (Elf_Internal_Sym *) symtab_hdr->contents;
5106 if (local_syms == NULL)
5108 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5109 symtab_hdr->sh_info, 0,
5111 if (local_syms == NULL)
5112 goto error_ret_free_internal;
5115 sym = local_syms + r_indx;
5116 if (sym->st_shndx == SHN_UNDEF)
5117 sym_sec = bfd_und_section_ptr;
5118 else if (sym->st_shndx == SHN_ABS)
5119 sym_sec = bfd_abs_section_ptr;
5120 else if (sym->st_shndx == SHN_COMMON)
5121 sym_sec = bfd_com_section_ptr;
5124 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
5127 /* This is an undefined symbol. It can never
5131 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5132 sym_value = sym->st_value;
5133 destination = (sym_value + irela->r_addend
5134 + sym_sec->output_offset
5135 + sym_sec->output_section->vma);
5136 st_type = ELF_ST_TYPE (sym->st_info);
5137 branch_type = ARM_SYM_BRANCH_TYPE (sym);
5139 = bfd_elf_string_from_elf_section (input_bfd,
5140 symtab_hdr->sh_link,
5145 /* It's an external symbol. */
5146 while (hash->root.root.type == bfd_link_hash_indirect
5147 || hash->root.root.type == bfd_link_hash_warning)
5148 hash = ((struct elf32_arm_link_hash_entry *)
5149 hash->root.root.u.i.link);
5151 if (hash->root.root.type == bfd_link_hash_defined
5152 || hash->root.root.type == bfd_link_hash_defweak)
5154 sym_sec = hash->root.root.u.def.section;
5155 sym_value = hash->root.root.u.def.value;
5157 struct elf32_arm_link_hash_table *globals =
5158 elf32_arm_hash_table (info);
5160 /* For a destination in a shared library,
5161 use the PLT stub as target address to
5162 decide whether a branch stub is
5165 && globals->root.splt != NULL
5167 && hash->root.plt.offset != (bfd_vma) -1)
5169 sym_sec = globals->root.splt;
5170 sym_value = hash->root.plt.offset;
5171 if (sym_sec->output_section != NULL)
5172 destination = (sym_value
5173 + sym_sec->output_offset
5174 + sym_sec->output_section->vma);
5176 else if (sym_sec->output_section != NULL)
5177 destination = (sym_value + irela->r_addend
5178 + sym_sec->output_offset
5179 + sym_sec->output_section->vma);
5181 else if ((hash->root.root.type == bfd_link_hash_undefined)
5182 || (hash->root.root.type == bfd_link_hash_undefweak))
5184 /* For a shared library, use the PLT stub as
5185 target address to decide whether a long
5186 branch stub is needed.
5187 For absolute code, they cannot be handled. */
5188 struct elf32_arm_link_hash_table *globals =
5189 elf32_arm_hash_table (info);
5192 && globals->root.splt != NULL
5194 && hash->root.plt.offset != (bfd_vma) -1)
5196 sym_sec = globals->root.splt;
5197 sym_value = hash->root.plt.offset;
5198 if (sym_sec->output_section != NULL)
5199 destination = (sym_value
5200 + sym_sec->output_offset
5201 + sym_sec->output_section->vma);
5208 bfd_set_error (bfd_error_bad_value);
5209 goto error_ret_free_internal;
5211 st_type = hash->root.type;
5212 branch_type = hash->root.target_internal;
5213 sym_name = hash->root.root.root.string;
5218 /* Determine what (if any) linker stub is needed. */
5219 stub_type = arm_type_of_stub (info, section, irela,
5220 st_type, &branch_type,
5221 hash, destination, sym_sec,
5222 input_bfd, sym_name);
5223 if (stub_type == arm_stub_none)
5226 /* Support for grouping stub sections. */
5227 id_sec = htab->stub_group[section->id].link_sec;
5229 /* Get the name of this stub. */
5230 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
5233 goto error_ret_free_internal;
5235 /* We've either created a stub for this reloc already,
5236 or we are about to. */
5237 created_stub = TRUE;
5239 stub_entry = arm_stub_hash_lookup
5240 (&htab->stub_hash_table, stub_name,
5242 if (stub_entry != NULL)
5244 /* The proper stub has already been created. */
5246 stub_entry->target_value = sym_value;
5250 stub_entry = elf32_arm_add_stub (stub_name, section,
5252 if (stub_entry == NULL)
5255 goto error_ret_free_internal;
5258 stub_entry->target_value = sym_value;
5259 stub_entry->target_section = sym_sec;
5260 stub_entry->stub_type = stub_type;
5261 stub_entry->h = hash;
5262 stub_entry->branch_type = branch_type;
5264 if (sym_name == NULL)
5265 sym_name = "unnamed";
5266 stub_entry->output_name = (char *)
5267 bfd_alloc (htab->stub_bfd,
5268 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5269 + strlen (sym_name));
5270 if (stub_entry->output_name == NULL)
5273 goto error_ret_free_internal;
5276 /* For historical reasons, use the existing names for
5277 ARM-to-Thumb and Thumb-to-ARM stubs. */
5278 if ((r_type == (unsigned int) R_ARM_THM_CALL
5279 || r_type == (unsigned int) R_ARM_THM_JUMP24)
5280 && branch_type == ST_BRANCH_TO_ARM)
5281 sprintf (stub_entry->output_name,
5282 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5283 else if ((r_type == (unsigned int) R_ARM_CALL
5284 || r_type == (unsigned int) R_ARM_JUMP24)
5285 && branch_type == ST_BRANCH_TO_THUMB)
5286 sprintf (stub_entry->output_name,
5287 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5289 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
5292 stub_changed = TRUE;
5296 /* Look for relocations which might trigger Cortex-A8
5298 if (htab->fix_cortex_a8
5299 && (r_type == (unsigned int) R_ARM_THM_JUMP24
5300 || r_type == (unsigned int) R_ARM_THM_JUMP19
5301 || r_type == (unsigned int) R_ARM_THM_CALL
5302 || r_type == (unsigned int) R_ARM_THM_XPC22))
5304 bfd_vma from = section->output_section->vma
5305 + section->output_offset
5308 if ((from & 0xfff) == 0xffe)
5310 /* Found a candidate. Note we haven't checked the
5311 destination is within 4K here: if we do so (and
5312 don't create an entry in a8_relocs) we can't tell
5313 that a branch should have been relocated when
5315 if (num_a8_relocs == a8_reloc_table_size)
5317 a8_reloc_table_size *= 2;
5318 a8_relocs = (struct a8_erratum_reloc *)
5319 bfd_realloc (a8_relocs,
5320 sizeof (struct a8_erratum_reloc)
5321 * a8_reloc_table_size);
5324 a8_relocs[num_a8_relocs].from = from;
5325 a8_relocs[num_a8_relocs].destination = destination;
5326 a8_relocs[num_a8_relocs].r_type = r_type;
5327 a8_relocs[num_a8_relocs].branch_type = branch_type;
5328 a8_relocs[num_a8_relocs].sym_name = sym_name;
5329 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
5330 a8_relocs[num_a8_relocs].hash = hash;
5337 /* We're done with the internal relocs, free them. */
5338 if (elf_section_data (section)->relocs == NULL)
5339 free (internal_relocs);
5342 if (htab->fix_cortex_a8)
5344 /* Sort relocs which might apply to Cortex-A8 erratum. */
5345 qsort (a8_relocs, num_a8_relocs,
5346 sizeof (struct a8_erratum_reloc),
5349 /* Scan for branches which might trigger Cortex-A8 erratum. */
5350 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
5351 &num_a8_fixes, &a8_fix_table_size,
5352 a8_relocs, num_a8_relocs,
5353 prev_num_a8_fixes, &stub_changed)
5355 goto error_ret_free_local;
5359 if (prev_num_a8_fixes != num_a8_fixes)
5360 stub_changed = TRUE;
5365 /* OK, we've added some stubs. Find out the new size of the
5367 for (stub_sec = htab->stub_bfd->sections;
5369 stub_sec = stub_sec->next)
5371 /* Ignore non-stub sections. */
5372 if (!strstr (stub_sec->name, STUB_SUFFIX))
5378 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
5380 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5381 if (htab->fix_cortex_a8)
5382 for (i = 0; i < num_a8_fixes; i++)
5384 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
5385 a8_fixes[i].section, htab);
5387 if (stub_sec == NULL)
5388 goto error_ret_free_local;
5391 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
5396 /* Ask the linker to do its stuff. */
5397 (*htab->layout_sections_again) ();
5400 /* Add stubs for Cortex-A8 erratum fixes now. */
5401 if (htab->fix_cortex_a8)
5403 for (i = 0; i < num_a8_fixes; i++)
5405 struct elf32_arm_stub_hash_entry *stub_entry;
5406 char *stub_name = a8_fixes[i].stub_name;
5407 asection *section = a8_fixes[i].section;
5408 unsigned int section_id = a8_fixes[i].section->id;
5409 asection *link_sec = htab->stub_group[section_id].link_sec;
5410 asection *stub_sec = htab->stub_group[section_id].stub_sec;
5411 const insn_sequence *template_sequence;
5412 int template_size, size = 0;
5414 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5416 if (stub_entry == NULL)
5418 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5424 stub_entry->stub_sec = stub_sec;
5425 stub_entry->stub_offset = 0;
5426 stub_entry->id_sec = link_sec;
5427 stub_entry->stub_type = a8_fixes[i].stub_type;
5428 stub_entry->target_section = a8_fixes[i].section;
5429 stub_entry->target_value = a8_fixes[i].offset;
5430 stub_entry->target_addend = a8_fixes[i].addend;
5431 stub_entry->orig_insn = a8_fixes[i].orig_insn;
5432 stub_entry->branch_type = a8_fixes[i].branch_type;
5434 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5438 stub_entry->stub_size = size;
5439 stub_entry->stub_template = template_sequence;
5440 stub_entry->stub_template_size = template_size;
5443 /* Stash the Cortex-A8 erratum fix array for use later in
5444 elf32_arm_write_section(). */
5445 htab->a8_erratum_fixes = a8_fixes;
5446 htab->num_a8_erratum_fixes = num_a8_fixes;
5450 htab->a8_erratum_fixes = NULL;
5451 htab->num_a8_erratum_fixes = 0;
5455 error_ret_free_local:
5459 /* Build all the stubs associated with the current output file. The
5460 stubs are kept in a hash table attached to the main linker hash
5461 table. We also set up the .plt entries for statically linked PIC
5462 functions here. This function is called via arm_elf_finish in the
5466 elf32_arm_build_stubs (struct bfd_link_info *info)
5469 struct bfd_hash_table *table;
5470 struct elf32_arm_link_hash_table *htab;
5472 htab = elf32_arm_hash_table (info);
5476 for (stub_sec = htab->stub_bfd->sections;
5478 stub_sec = stub_sec->next)
5482 /* Ignore non-stub sections. */
5483 if (!strstr (stub_sec->name, STUB_SUFFIX))
5486 /* Allocate memory to hold the linker stubs. */
5487 size = stub_sec->size;
5488 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
5489 if (stub_sec->contents == NULL && size != 0)
5494 /* Build the stubs as directed by the stub hash table. */
5495 table = &htab->stub_hash_table;
5496 bfd_hash_traverse (table, arm_build_one_stub, info);
5497 if (htab->fix_cortex_a8)
5499 /* Place the cortex a8 stubs last. */
5500 htab->fix_cortex_a8 = -1;
5501 bfd_hash_traverse (table, arm_build_one_stub, info);
5507 /* Locate the Thumb encoded calling stub for NAME. */
5509 static struct elf_link_hash_entry *
5510 find_thumb_glue (struct bfd_link_info *link_info,
5512 char **error_message)
5515 struct elf_link_hash_entry *hash;
5516 struct elf32_arm_link_hash_table *hash_table;
5518 /* We need a pointer to the armelf specific hash table. */
5519 hash_table = elf32_arm_hash_table (link_info);
5520 if (hash_table == NULL)
5523 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5524 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
5526 BFD_ASSERT (tmp_name);
5528 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5530 hash = elf_link_hash_lookup
5531 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5534 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5535 tmp_name, name) == -1)
5536 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5543 /* Locate the ARM encoded calling stub for NAME. */
5545 static struct elf_link_hash_entry *
5546 find_arm_glue (struct bfd_link_info *link_info,
5548 char **error_message)
5551 struct elf_link_hash_entry *myh;
5552 struct elf32_arm_link_hash_table *hash_table;
5554 /* We need a pointer to the elfarm specific hash table. */
5555 hash_table = elf32_arm_hash_table (link_info);
5556 if (hash_table == NULL)
5559 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5560 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5562 BFD_ASSERT (tmp_name);
5564 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5566 myh = elf_link_hash_lookup
5567 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5570 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5571 tmp_name, name) == -1)
5572 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5579 /* ARM->Thumb glue (static images):
5583 ldr r12, __func_addr
5586 .word func @ behave as if you saw a ARM_32 reloc.
5593 .word func @ behave as if you saw a ARM_32 reloc.
5595 (relocatable images)
5598 ldr r12, __func_offset
5604 #define ARM2THUMB_STATIC_GLUE_SIZE 12
5605 static const insn32 a2t1_ldr_insn = 0xe59fc000;
5606 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5607 static const insn32 a2t3_func_addr_insn = 0x00000001;
5609 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5610 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5611 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5613 #define ARM2THUMB_PIC_GLUE_SIZE 16
5614 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5615 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5616 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5618 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
5622 __func_from_thumb: __func_from_thumb:
5624 nop ldr r6, __func_addr
5634 #define THUMB2ARM_GLUE_SIZE 8
5635 static const insn16 t2a1_bx_pc_insn = 0x4778;
5636 static const insn16 t2a2_noop_insn = 0x46c0;
5637 static const insn32 t2a3_b_insn = 0xea000000;
5639 #define VFP11_ERRATUM_VENEER_SIZE 8
5641 #define ARM_BX_VENEER_SIZE 12
5642 static const insn32 armbx1_tst_insn = 0xe3100001;
5643 static const insn32 armbx2_moveq_insn = 0x01a0f000;
5644 static const insn32 armbx3_bx_insn = 0xe12fff10;
5646 #ifndef ELFARM_NABI_C_INCLUDED
5648 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
5651 bfd_byte * contents;
5655 /* Do not include empty glue sections in the output. */
5658 s = bfd_get_linker_section (abfd, name);
5660 s->flags |= SEC_EXCLUDE;
5665 BFD_ASSERT (abfd != NULL);
5667 s = bfd_get_linker_section (abfd, name);
5668 BFD_ASSERT (s != NULL);
5670 contents = (bfd_byte *) bfd_alloc (abfd, size);
5672 BFD_ASSERT (s->size == size);
5673 s->contents = contents;
5677 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5679 struct elf32_arm_link_hash_table * globals;
5681 globals = elf32_arm_hash_table (info);
5682 BFD_ASSERT (globals != NULL);
5684 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5685 globals->arm_glue_size,
5686 ARM2THUMB_GLUE_SECTION_NAME);
5688 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5689 globals->thumb_glue_size,
5690 THUMB2ARM_GLUE_SECTION_NAME);
5692 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5693 globals->vfp11_erratum_glue_size,
5694 VFP11_ERRATUM_VENEER_SECTION_NAME);
5696 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5697 globals->bx_glue_size,
5698 ARM_BX_GLUE_SECTION_NAME);
5703 /* Allocate space and symbols for calling a Thumb function from Arm mode.
5704 returns the symbol identifying the stub. */
5706 static struct elf_link_hash_entry *
5707 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5708 struct elf_link_hash_entry * h)
5710 const char * name = h->root.root.string;
5713 struct elf_link_hash_entry * myh;
5714 struct bfd_link_hash_entry * bh;
5715 struct elf32_arm_link_hash_table * globals;
5719 globals = elf32_arm_hash_table (link_info);
5720 BFD_ASSERT (globals != NULL);
5721 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5723 s = bfd_get_linker_section
5724 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5726 BFD_ASSERT (s != NULL);
5728 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5729 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5731 BFD_ASSERT (tmp_name);
5733 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5735 myh = elf_link_hash_lookup
5736 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
5740 /* We've already seen this guy. */
5745 /* The only trick here is using hash_table->arm_glue_size as the value.
5746 Even though the section isn't allocated yet, this is where we will be
5747 putting it. The +1 on the value marks that the stub has not been
5748 output yet - not that it is a Thumb function. */
5750 val = globals->arm_glue_size + 1;
5751 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5752 tmp_name, BSF_GLOBAL, s, val,
5753 NULL, TRUE, FALSE, &bh);
5755 myh = (struct elf_link_hash_entry *) bh;
5756 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5757 myh->forced_local = 1;
5761 if (link_info->shared || globals->root.is_relocatable_executable
5762 || globals->pic_veneer)
5763 size = ARM2THUMB_PIC_GLUE_SIZE;
5764 else if (globals->use_blx)
5765 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
5767 size = ARM2THUMB_STATIC_GLUE_SIZE;
5770 globals->arm_glue_size += size;
5775 /* Allocate space for ARMv4 BX veneers. */
5778 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5781 struct elf32_arm_link_hash_table *globals;
5783 struct elf_link_hash_entry *myh;
5784 struct bfd_link_hash_entry *bh;
5787 /* BX PC does not need a veneer. */
5791 globals = elf32_arm_hash_table (link_info);
5792 BFD_ASSERT (globals != NULL);
5793 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5795 /* Check if this veneer has already been allocated. */
5796 if (globals->bx_glue_offset[reg])
5799 s = bfd_get_linker_section
5800 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5802 BFD_ASSERT (s != NULL);
5804 /* Add symbol for veneer. */
5806 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
5808 BFD_ASSERT (tmp_name);
5810 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
5812 myh = elf_link_hash_lookup
5813 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
5815 BFD_ASSERT (myh == NULL);
5818 val = globals->bx_glue_size;
5819 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5820 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5821 NULL, TRUE, FALSE, &bh);
5823 myh = (struct elf_link_hash_entry *) bh;
5824 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5825 myh->forced_local = 1;
5827 s->size += ARM_BX_VENEER_SIZE;
5828 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5829 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5833 /* Add an entry to the code/data map for section SEC. */
5836 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5838 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5839 unsigned int newidx;
5841 if (sec_data->map == NULL)
5843 sec_data->map = (elf32_arm_section_map *)
5844 bfd_malloc (sizeof (elf32_arm_section_map));
5845 sec_data->mapcount = 0;
5846 sec_data->mapsize = 1;
5849 newidx = sec_data->mapcount++;
5851 if (sec_data->mapcount > sec_data->mapsize)
5853 sec_data->mapsize *= 2;
5854 sec_data->map = (elf32_arm_section_map *)
5855 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5856 * sizeof (elf32_arm_section_map));
5861 sec_data->map[newidx].vma = vma;
5862 sec_data->map[newidx].type = type;
5867 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5868 veneers are handled for now. */
5871 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5872 elf32_vfp11_erratum_list *branch,
5874 asection *branch_sec,
5875 unsigned int offset)
5878 struct elf32_arm_link_hash_table *hash_table;
5880 struct elf_link_hash_entry *myh;
5881 struct bfd_link_hash_entry *bh;
5883 struct _arm_elf_section_data *sec_data;
5884 elf32_vfp11_erratum_list *newerr;
5886 hash_table = elf32_arm_hash_table (link_info);
5887 BFD_ASSERT (hash_table != NULL);
5888 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
5890 s = bfd_get_linker_section
5891 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
5893 sec_data = elf32_arm_section_data (s);
5895 BFD_ASSERT (s != NULL);
5897 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
5898 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
5900 BFD_ASSERT (tmp_name);
5902 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5903 hash_table->num_vfp11_fixes);
5905 myh = elf_link_hash_lookup
5906 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
5908 BFD_ASSERT (myh == NULL);
5911 val = hash_table->vfp11_erratum_glue_size;
5912 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5913 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5914 NULL, TRUE, FALSE, &bh);
5916 myh = (struct elf_link_hash_entry *) bh;
5917 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5918 myh->forced_local = 1;
5920 /* Link veneer back to calling location. */
5921 sec_data->erratumcount += 1;
5922 newerr = (elf32_vfp11_erratum_list *)
5923 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
5925 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5927 newerr->u.v.branch = branch;
5928 newerr->u.v.id = hash_table->num_vfp11_fixes;
5929 branch->u.b.veneer = newerr;
5931 newerr->next = sec_data->erratumlist;
5932 sec_data->erratumlist = newerr;
5934 /* A symbol for the return from the veneer. */
5935 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5936 hash_table->num_vfp11_fixes);
5938 myh = elf_link_hash_lookup
5939 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
5946 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5947 branch_sec, val, NULL, TRUE, FALSE, &bh);
5949 myh = (struct elf_link_hash_entry *) bh;
5950 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5951 myh->forced_local = 1;
5955 /* Generate a mapping symbol for the veneer section, and explicitly add an
5956 entry for that symbol to the code/data map for the section. */
5957 if (hash_table->vfp11_erratum_glue_size == 0)
5960 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5961 ever requires this erratum fix. */
5962 _bfd_generic_link_add_one_symbol (link_info,
5963 hash_table->bfd_of_glue_owner, "$a",
5964 BSF_LOCAL, s, 0, NULL,
5967 myh = (struct elf_link_hash_entry *) bh;
5968 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5969 myh->forced_local = 1;
5971 /* The elf32_arm_init_maps function only cares about symbols from input
5972 BFDs. We must make a note of this generated mapping symbol
5973 ourselves so that code byteswapping works properly in
5974 elf32_arm_write_section. */
5975 elf32_arm_section_map_add (s, 'a', 0);
5978 s->size += VFP11_ERRATUM_VENEER_SIZE;
5979 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5980 hash_table->num_vfp11_fixes++;
5982 /* The offset of the veneer. */
5986 #define ARM_GLUE_SECTION_FLAGS \
5987 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5988 | SEC_READONLY | SEC_LINKER_CREATED)
5990 /* Create a fake section for use by the ARM backend of the linker. */
5993 arm_make_glue_section (bfd * abfd, const char * name)
5997 sec = bfd_get_linker_section (abfd, name);
6002 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
6005 || !bfd_set_section_alignment (abfd, sec, 2))
6008 /* Set the gc mark to prevent the section from being removed by garbage
6009 collection, despite the fact that no relocs refer to this section. */
6015 /* Add the glue sections to ABFD. This function is called from the
6016 linker scripts in ld/emultempl/{armelf}.em. */
6019 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
6020 struct bfd_link_info *info)
6022 /* If we are only performing a partial
6023 link do not bother adding the glue. */
6024 if (info->relocatable)
6027 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
6028 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
6029 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
6030 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
6033 /* Select a BFD to be used to hold the sections used by the glue code.
6034 This function is called from the linker scripts in ld/emultempl/
6038 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
6040 struct elf32_arm_link_hash_table *globals;
6042 /* If we are only performing a partial link
6043 do not bother getting a bfd to hold the glue. */
6044 if (info->relocatable)
6047 /* Make sure we don't attach the glue sections to a dynamic object. */
6048 BFD_ASSERT (!(abfd->flags & DYNAMIC));
6050 globals = elf32_arm_hash_table (info);
6051 BFD_ASSERT (globals != NULL);
6053 if (globals->bfd_of_glue_owner != NULL)
6056 /* Save the bfd for later use. */
6057 globals->bfd_of_glue_owner = abfd;
6063 check_use_blx (struct elf32_arm_link_hash_table *globals)
6067 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
6070 if (globals->fix_arm1176)
6072 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
6073 globals->use_blx = 1;
6077 if (cpu_arch > TAG_CPU_ARCH_V4T)
6078 globals->use_blx = 1;
6083 bfd_elf32_arm_process_before_allocation (bfd *abfd,
6084 struct bfd_link_info *link_info)
6086 Elf_Internal_Shdr *symtab_hdr;
6087 Elf_Internal_Rela *internal_relocs = NULL;
6088 Elf_Internal_Rela *irel, *irelend;
6089 bfd_byte *contents = NULL;
6092 struct elf32_arm_link_hash_table *globals;
6094 /* If we are only performing a partial link do not bother
6095 to construct any glue. */
6096 if (link_info->relocatable)
6099 /* Here we have a bfd that is to be included on the link. We have a
6100 hook to do reloc rummaging, before section sizes are nailed down. */
6101 globals = elf32_arm_hash_table (link_info);
6102 BFD_ASSERT (globals != NULL);
6104 check_use_blx (globals);
6106 if (globals->byteswap_code && !bfd_big_endian (abfd))
6108 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6113 /* PR 5398: If we have not decided to include any loadable sections in
6114 the output then we will not have a glue owner bfd. This is OK, it
6115 just means that there is nothing else for us to do here. */
6116 if (globals->bfd_of_glue_owner == NULL)
6119 /* Rummage around all the relocs and map the glue vectors. */
6120 sec = abfd->sections;
6125 for (; sec != NULL; sec = sec->next)
6127 if (sec->reloc_count == 0)
6130 if ((sec->flags & SEC_EXCLUDE) != 0)
6133 symtab_hdr = & elf_symtab_hdr (abfd);
6135 /* Load the relocs. */
6137 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
6139 if (internal_relocs == NULL)
6142 irelend = internal_relocs + sec->reloc_count;
6143 for (irel = internal_relocs; irel < irelend; irel++)
6146 unsigned long r_index;
6148 struct elf_link_hash_entry *h;
6150 r_type = ELF32_R_TYPE (irel->r_info);
6151 r_index = ELF32_R_SYM (irel->r_info);
6153 /* These are the only relocation types we care about. */
6154 if ( r_type != R_ARM_PC24
6155 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
6158 /* Get the section contents if we haven't done so already. */
6159 if (contents == NULL)
6161 /* Get cached copy if it exists. */
6162 if (elf_section_data (sec)->this_hdr.contents != NULL)
6163 contents = elf_section_data (sec)->this_hdr.contents;
6166 /* Go get them off disk. */
6167 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6172 if (r_type == R_ARM_V4BX)
6176 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
6177 record_arm_bx_glue (link_info, reg);
6181 /* If the relocation is not against a symbol it cannot concern us. */
6184 /* We don't care about local symbols. */
6185 if (r_index < symtab_hdr->sh_info)
6188 /* This is an external symbol. */
6189 r_index -= symtab_hdr->sh_info;
6190 h = (struct elf_link_hash_entry *)
6191 elf_sym_hashes (abfd)[r_index];
6193 /* If the relocation is against a static symbol it must be within
6194 the current section and so cannot be a cross ARM/Thumb relocation. */
6198 /* If the call will go through a PLT entry then we do not need
6200 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
6206 /* This one is a call from arm code. We need to look up
6207 the target of the call. If it is a thumb target, we
6209 if (h->target_internal == ST_BRANCH_TO_THUMB)
6210 record_arm_to_thumb_glue (link_info, h);
6218 if (contents != NULL
6219 && elf_section_data (sec)->this_hdr.contents != contents)
6223 if (internal_relocs != NULL
6224 && elf_section_data (sec)->relocs != internal_relocs)
6225 free (internal_relocs);
6226 internal_relocs = NULL;
6232 if (contents != NULL
6233 && elf_section_data (sec)->this_hdr.contents != contents)
6235 if (internal_relocs != NULL
6236 && elf_section_data (sec)->relocs != internal_relocs)
6237 free (internal_relocs);
6244 /* Initialise maps of ARM/Thumb/data for input BFDs. */
6247 bfd_elf32_arm_init_maps (bfd *abfd)
6249 Elf_Internal_Sym *isymbuf;
6250 Elf_Internal_Shdr *hdr;
6251 unsigned int i, localsyms;
6253 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6254 if (! is_arm_elf (abfd))
6257 if ((abfd->flags & DYNAMIC) != 0)
6260 hdr = & elf_symtab_hdr (abfd);
6261 localsyms = hdr->sh_info;
6263 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6264 should contain the number of local symbols, which should come before any
6265 global symbols. Mapping symbols are always local. */
6266 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
6269 /* No internal symbols read? Skip this BFD. */
6270 if (isymbuf == NULL)
6273 for (i = 0; i < localsyms; i++)
6275 Elf_Internal_Sym *isym = &isymbuf[i];
6276 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6280 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6282 name = bfd_elf_string_from_elf_section (abfd,
6283 hdr->sh_link, isym->st_name);
6285 if (bfd_is_arm_special_symbol_name (name,
6286 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
6287 elf32_arm_section_map_add (sec, name[1], isym->st_value);
6293 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6294 say what they wanted. */
6297 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
6299 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6300 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6302 if (globals == NULL)
6305 if (globals->fix_cortex_a8 == -1)
6307 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6308 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
6309 && (out_attr[Tag_CPU_arch_profile].i == 'A'
6310 || out_attr[Tag_CPU_arch_profile].i == 0))
6311 globals->fix_cortex_a8 = 1;
6313 globals->fix_cortex_a8 = 0;
6319 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
6321 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6322 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6324 if (globals == NULL)
6326 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6327 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
6329 switch (globals->vfp11_fix)
6331 case BFD_ARM_VFP11_FIX_DEFAULT:
6332 case BFD_ARM_VFP11_FIX_NONE:
6333 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6337 /* Give a warning, but do as the user requests anyway. */
6338 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
6339 "workaround is not necessary for target architecture"), obfd);
6342 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
6343 /* For earlier architectures, we might need the workaround, but do not
6344 enable it by default. If users is running with broken hardware, they
6345 must enable the erratum fix explicitly. */
6346 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6350 enum bfd_arm_vfp11_pipe
6358 /* Return a VFP register number. This is encoded as RX:X for single-precision
6359 registers, or X:RX for double-precision registers, where RX is the group of
6360 four bits in the instruction encoding and X is the single extension bit.
6361 RX and X fields are specified using their lowest (starting) bit. The return
6364 0...31: single-precision registers s0...s31
6365 32...63: double-precision registers d0...d31.
6367 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6368 encounter VFP3 instructions, so we allow the full range for DP registers. */
6371 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
6375 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
6377 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
6380 /* Set bits in *WMASK according to a register number REG as encoded by
6381 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6384 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
6389 *wmask |= 3 << ((reg - 32) * 2);
6392 /* Return TRUE if WMASK overwrites anything in REGS. */
6395 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
6399 for (i = 0; i < numregs; i++)
6401 unsigned int reg = regs[i];
6403 if (reg < 32 && (wmask & (1 << reg)) != 0)
6411 if ((wmask & (3 << (reg * 2))) != 0)
6418 /* In this function, we're interested in two things: finding input registers
6419 for VFP data-processing instructions, and finding the set of registers which
6420 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6421 hold the written set, so FLDM etc. are easy to deal with (we're only
6422 interested in 32 SP registers or 16 dp registers, due to the VFP version
6423 implemented by the chip in question). DP registers are marked by setting
6424 both SP registers in the write mask). */
6426 static enum bfd_arm_vfp11_pipe
6427 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
6430 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
6431 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6433 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6436 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6437 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6439 pqrs = ((insn & 0x00800000) >> 20)
6440 | ((insn & 0x00300000) >> 19)
6441 | ((insn & 0x00000040) >> 6);
6445 case 0: /* fmac[sd]. */
6446 case 1: /* fnmac[sd]. */
6447 case 2: /* fmsc[sd]. */
6448 case 3: /* fnmsc[sd]. */
6450 bfd_arm_vfp11_write_mask (destmask, fd);
6452 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6457 case 4: /* fmul[sd]. */
6458 case 5: /* fnmul[sd]. */
6459 case 6: /* fadd[sd]. */
6460 case 7: /* fsub[sd]. */
6464 case 8: /* fdiv[sd]. */
6467 bfd_arm_vfp11_write_mask (destmask, fd);
6468 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6473 case 15: /* extended opcode. */
6475 unsigned int extn = ((insn >> 15) & 0x1e)
6476 | ((insn >> 7) & 1);
6480 case 0: /* fcpy[sd]. */
6481 case 1: /* fabs[sd]. */
6482 case 2: /* fneg[sd]. */
6483 case 8: /* fcmp[sd]. */
6484 case 9: /* fcmpe[sd]. */
6485 case 10: /* fcmpz[sd]. */
6486 case 11: /* fcmpez[sd]. */
6487 case 16: /* fuito[sd]. */
6488 case 17: /* fsito[sd]. */
6489 case 24: /* ftoui[sd]. */
6490 case 25: /* ftouiz[sd]. */
6491 case 26: /* ftosi[sd]. */
6492 case 27: /* ftosiz[sd]. */
6493 /* These instructions will not bounce due to underflow. */
6498 case 3: /* fsqrt[sd]. */
6499 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6500 registers to cause the erratum in previous instructions. */
6501 bfd_arm_vfp11_write_mask (destmask, fd);
6505 case 15: /* fcvt{ds,sd}. */
6509 bfd_arm_vfp11_write_mask (destmask, fd);
6511 /* Only FCVTSD can underflow. */
6512 if ((insn & 0x100) != 0)
6531 /* Two-register transfer. */
6532 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6534 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6536 if ((insn & 0x100000) == 0)
6539 bfd_arm_vfp11_write_mask (destmask, fm);
6542 bfd_arm_vfp11_write_mask (destmask, fm);
6543 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6549 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6551 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6552 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
6556 case 0: /* Two-reg transfer. We should catch these above. */
6559 case 2: /* fldm[sdx]. */
6563 unsigned int i, offset = insn & 0xff;
6568 for (i = fd; i < fd + offset; i++)
6569 bfd_arm_vfp11_write_mask (destmask, i);
6573 case 4: /* fld[sd]. */
6575 bfd_arm_vfp11_write_mask (destmask, fd);
6584 /* Single-register transfer. Note L==0. */
6585 else if ((insn & 0x0f100e10) == 0x0e000a10)
6587 unsigned int opcode = (insn >> 21) & 7;
6588 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
6592 case 0: /* fmsr/fmdlr. */
6593 case 1: /* fmdhr. */
6594 /* Mark fmdhr and fmdlr as writing to the whole of the DP
6595 destination register. I don't know if this is exactly right,
6596 but it is the conservative choice. */
6597 bfd_arm_vfp11_write_mask (destmask, fn);
6611 static int elf32_arm_compare_mapping (const void * a, const void * b);
6614 /* Look for potentially-troublesome code sequences which might trigger the
6615 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
6616 (available from ARM) for details of the erratum. A short version is
6617 described in ld.texinfo. */
6620 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
6623 bfd_byte *contents = NULL;
6625 int regs[3], numregs = 0;
6626 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6627 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
6629 if (globals == NULL)
6632 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
6633 The states transition as follows:
6635 0 -> 1 (vector) or 0 -> 2 (scalar)
6636 A VFP FMAC-pipeline instruction has been seen. Fill
6637 regs[0]..regs[numregs-1] with its input operands. Remember this
6638 instruction in 'first_fmac'.
6641 Any instruction, except for a VFP instruction which overwrites
6646 A VFP instruction has been seen which overwrites any of regs[*].
6647 We must make a veneer! Reset state to 0 before examining next
6651 If we fail to match anything in state 2, reset to state 0 and reset
6652 the instruction pointer to the instruction after 'first_fmac'.
6654 If the VFP11 vector mode is in use, there must be at least two unrelated
6655 instructions between anti-dependent VFP11 instructions to properly avoid
6656 triggering the erratum, hence the use of the extra state 1. */
6658 /* If we are only performing a partial link do not bother
6659 to construct any glue. */
6660 if (link_info->relocatable)
6663 /* Skip if this bfd does not correspond to an ELF image. */
6664 if (! is_arm_elf (abfd))
6667 /* We should have chosen a fix type by the time we get here. */
6668 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6670 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6673 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6674 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6677 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6679 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6680 struct _arm_elf_section_data *sec_data;
6682 /* If we don't have executable progbits, we're not interested in this
6683 section. Also skip if section is to be excluded. */
6684 if (elf_section_type (sec) != SHT_PROGBITS
6685 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6686 || (sec->flags & SEC_EXCLUDE) != 0
6687 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
6688 || sec->output_section == bfd_abs_section_ptr
6689 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6692 sec_data = elf32_arm_section_data (sec);
6694 if (sec_data->mapcount == 0)
6697 if (elf_section_data (sec)->this_hdr.contents != NULL)
6698 contents = elf_section_data (sec)->this_hdr.contents;
6699 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6702 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6703 elf32_arm_compare_mapping);
6705 for (span = 0; span < sec_data->mapcount; span++)
6707 unsigned int span_start = sec_data->map[span].vma;
6708 unsigned int span_end = (span == sec_data->mapcount - 1)
6709 ? sec->size : sec_data->map[span + 1].vma;
6710 char span_type = sec_data->map[span].type;
6712 /* FIXME: Only ARM mode is supported at present. We may need to
6713 support Thumb-2 mode also at some point. */
6714 if (span_type != 'a')
6717 for (i = span_start; i < span_end;)
6719 unsigned int next_i = i + 4;
6720 unsigned int insn = bfd_big_endian (abfd)
6721 ? (contents[i] << 24)
6722 | (contents[i + 1] << 16)
6723 | (contents[i + 2] << 8)
6725 : (contents[i + 3] << 24)
6726 | (contents[i + 2] << 16)
6727 | (contents[i + 1] << 8)
6729 unsigned int writemask = 0;
6730 enum bfd_arm_vfp11_pipe vpipe;
6735 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
6737 /* I'm assuming the VFP11 erratum can trigger with denorm
6738 operands on either the FMAC or the DS pipeline. This might
6739 lead to slightly overenthusiastic veneer insertion. */
6740 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
6742 state = use_vector ? 1 : 2;
6744 veneer_of_insn = insn;
6750 int other_regs[3], other_numregs;
6751 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
6754 if (vpipe != VFP11_BAD
6755 && bfd_arm_vfp11_antidependency (writemask, regs,
6765 int other_regs[3], other_numregs;
6766 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
6769 if (vpipe != VFP11_BAD
6770 && bfd_arm_vfp11_antidependency (writemask, regs,
6776 next_i = first_fmac + 4;
6782 abort (); /* Should be unreachable. */
6787 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6788 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
6790 elf32_arm_section_data (sec)->erratumcount += 1;
6792 newerr->u.b.vfp_insn = veneer_of_insn;
6797 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6804 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6809 newerr->next = sec_data->erratumlist;
6810 sec_data->erratumlist = newerr;
6819 if (contents != NULL
6820 && elf_section_data (sec)->this_hdr.contents != contents)
6828 if (contents != NULL
6829 && elf_section_data (sec)->this_hdr.contents != contents)
6835 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6836 after sections have been laid out, using specially-named symbols. */
6839 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6840 struct bfd_link_info *link_info)
6843 struct elf32_arm_link_hash_table *globals;
6846 if (link_info->relocatable)
6849 /* Skip if this bfd does not correspond to an ELF image. */
6850 if (! is_arm_elf (abfd))
6853 globals = elf32_arm_hash_table (link_info);
6854 if (globals == NULL)
6857 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6858 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
6860 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6862 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6863 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
6865 for (; errnode != NULL; errnode = errnode->next)
6867 struct elf_link_hash_entry *myh;
6870 switch (errnode->type)
6872 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6873 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6874 /* Find veneer symbol. */
6875 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6876 errnode->u.b.veneer->u.v.id);
6878 myh = elf_link_hash_lookup
6879 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6882 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6883 "`%s'"), abfd, tmp_name);
6885 vma = myh->root.u.def.section->output_section->vma
6886 + myh->root.u.def.section->output_offset
6887 + myh->root.u.def.value;
6889 errnode->u.b.veneer->vma = vma;
6892 case VFP11_ERRATUM_ARM_VENEER:
6893 case VFP11_ERRATUM_THUMB_VENEER:
6894 /* Find return location. */
6895 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6898 myh = elf_link_hash_lookup
6899 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6902 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6903 "`%s'"), abfd, tmp_name);
6905 vma = myh->root.u.def.section->output_section->vma
6906 + myh->root.u.def.section->output_offset
6907 + myh->root.u.def.value;
6909 errnode->u.v.branch->vma = vma;
6922 /* Set target relocation values needed during linking. */
6925 bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6926 struct bfd_link_info *link_info,
6928 char * target2_type,
6931 bfd_arm_vfp11_fix vfp11_fix,
6932 int no_enum_warn, int no_wchar_warn,
6933 int pic_veneer, int fix_cortex_a8,
6936 struct elf32_arm_link_hash_table *globals;
6938 globals = elf32_arm_hash_table (link_info);
6939 if (globals == NULL)
6942 globals->target1_is_rel = target1_is_rel;
6943 if (strcmp (target2_type, "rel") == 0)
6944 globals->target2_reloc = R_ARM_REL32;
6945 else if (strcmp (target2_type, "abs") == 0)
6946 globals->target2_reloc = R_ARM_ABS32;
6947 else if (strcmp (target2_type, "got-rel") == 0)
6948 globals->target2_reloc = R_ARM_GOT_PREL;
6951 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6954 globals->fix_v4bx = fix_v4bx;
6955 globals->use_blx |= use_blx;
6956 globals->vfp11_fix = vfp11_fix;
6957 globals->pic_veneer = pic_veneer;
6958 globals->fix_cortex_a8 = fix_cortex_a8;
6959 globals->fix_arm1176 = fix_arm1176;
6961 BFD_ASSERT (is_arm_elf (output_bfd));
6962 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
6963 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
6966 /* Replace the target offset of a Thumb bl or b.w instruction. */
6969 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6975 BFD_ASSERT ((offset & 1) == 0);
6977 upper = bfd_get_16 (abfd, insn);
6978 lower = bfd_get_16 (abfd, insn + 2);
6979 reloc_sign = (offset < 0) ? 1 : 0;
6980 upper = (upper & ~(bfd_vma) 0x7ff)
6981 | ((offset >> 12) & 0x3ff)
6982 | (reloc_sign << 10);
6983 lower = (lower & ~(bfd_vma) 0x2fff)
6984 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6985 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6986 | ((offset >> 1) & 0x7ff);
6987 bfd_put_16 (abfd, upper, insn);
6988 bfd_put_16 (abfd, lower, insn + 2);
6991 /* Thumb code calling an ARM function. */
6994 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6998 asection * input_section,
6999 bfd_byte * hit_data,
7002 bfd_signed_vma addend,
7004 char **error_message)
7008 long int ret_offset;
7009 struct elf_link_hash_entry * myh;
7010 struct elf32_arm_link_hash_table * globals;
7012 myh = find_thumb_glue (info, name, error_message);
7016 globals = elf32_arm_hash_table (info);
7017 BFD_ASSERT (globals != NULL);
7018 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7020 my_offset = myh->root.u.def.value;
7022 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7023 THUMB2ARM_GLUE_SECTION_NAME);
7025 BFD_ASSERT (s != NULL);
7026 BFD_ASSERT (s->contents != NULL);
7027 BFD_ASSERT (s->output_section != NULL);
7029 if ((my_offset & 0x01) == 0x01)
7032 && sym_sec->owner != NULL
7033 && !INTERWORK_FLAG (sym_sec->owner))
7035 (*_bfd_error_handler)
7036 (_("%B(%s): warning: interworking not enabled.\n"
7037 " first occurrence: %B: Thumb call to ARM"),
7038 sym_sec->owner, input_bfd, name);
7044 myh->root.u.def.value = my_offset;
7046 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
7047 s->contents + my_offset);
7049 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
7050 s->contents + my_offset + 2);
7053 /* Address of destination of the stub. */
7054 ((bfd_signed_vma) val)
7056 /* Offset from the start of the current section
7057 to the start of the stubs. */
7059 /* Offset of the start of this stub from the start of the stubs. */
7061 /* Address of the start of the current section. */
7062 + s->output_section->vma)
7063 /* The branch instruction is 4 bytes into the stub. */
7065 /* ARM branches work from the pc of the instruction + 8. */
7068 put_arm_insn (globals, output_bfd,
7069 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
7070 s->contents + my_offset + 4);
7073 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
7075 /* Now go back and fix up the original BL insn to point to here. */
7077 /* Address of where the stub is located. */
7078 (s->output_section->vma + s->output_offset + my_offset)
7079 /* Address of where the BL is located. */
7080 - (input_section->output_section->vma + input_section->output_offset
7082 /* Addend in the relocation. */
7084 /* Biassing for PC-relative addressing. */
7087 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
7092 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
7094 static struct elf_link_hash_entry *
7095 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
7102 char ** error_message)
7105 long int ret_offset;
7106 struct elf_link_hash_entry * myh;
7107 struct elf32_arm_link_hash_table * globals;
7109 myh = find_arm_glue (info, name, error_message);
7113 globals = elf32_arm_hash_table (info);
7114 BFD_ASSERT (globals != NULL);
7115 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7117 my_offset = myh->root.u.def.value;
7119 if ((my_offset & 0x01) == 0x01)
7122 && sym_sec->owner != NULL
7123 && !INTERWORK_FLAG (sym_sec->owner))
7125 (*_bfd_error_handler)
7126 (_("%B(%s): warning: interworking not enabled.\n"
7127 " first occurrence: %B: arm call to thumb"),
7128 sym_sec->owner, input_bfd, name);
7132 myh->root.u.def.value = my_offset;
7134 if (info->shared || globals->root.is_relocatable_executable
7135 || globals->pic_veneer)
7137 /* For relocatable objects we can't use absolute addresses,
7138 so construct the address from a relative offset. */
7139 /* TODO: If the offset is small it's probably worth
7140 constructing the address with adds. */
7141 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
7142 s->contents + my_offset);
7143 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
7144 s->contents + my_offset + 4);
7145 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
7146 s->contents + my_offset + 8);
7147 /* Adjust the offset by 4 for the position of the add,
7148 and 8 for the pipeline offset. */
7149 ret_offset = (val - (s->output_offset
7150 + s->output_section->vma
7153 bfd_put_32 (output_bfd, ret_offset,
7154 s->contents + my_offset + 12);
7156 else if (globals->use_blx)
7158 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
7159 s->contents + my_offset);
7161 /* It's a thumb address. Add the low order bit. */
7162 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
7163 s->contents + my_offset + 4);
7167 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
7168 s->contents + my_offset);
7170 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
7171 s->contents + my_offset + 4);
7173 /* It's a thumb address. Add the low order bit. */
7174 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
7175 s->contents + my_offset + 8);
7181 BFD_ASSERT (my_offset <= globals->arm_glue_size);
7186 /* Arm code calling a Thumb function. */
7189 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
7193 asection * input_section,
7194 bfd_byte * hit_data,
7197 bfd_signed_vma addend,
7199 char **error_message)
7201 unsigned long int tmp;
7204 long int ret_offset;
7205 struct elf_link_hash_entry * myh;
7206 struct elf32_arm_link_hash_table * globals;
7208 globals = elf32_arm_hash_table (info);
7209 BFD_ASSERT (globals != NULL);
7210 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7212 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7213 ARM2THUMB_GLUE_SECTION_NAME);
7214 BFD_ASSERT (s != NULL);
7215 BFD_ASSERT (s->contents != NULL);
7216 BFD_ASSERT (s->output_section != NULL);
7218 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
7219 sym_sec, val, s, error_message);
7223 my_offset = myh->root.u.def.value;
7224 tmp = bfd_get_32 (input_bfd, hit_data);
7225 tmp = tmp & 0xFF000000;
7227 /* Somehow these are both 4 too far, so subtract 8. */
7228 ret_offset = (s->output_offset
7230 + s->output_section->vma
7231 - (input_section->output_offset
7232 + input_section->output_section->vma
7236 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
7238 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
7243 /* Populate Arm stub for an exported Thumb function. */
7246 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
7248 struct bfd_link_info * info = (struct bfd_link_info *) inf;
7250 struct elf_link_hash_entry * myh;
7251 struct elf32_arm_link_hash_entry *eh;
7252 struct elf32_arm_link_hash_table * globals;
7255 char *error_message;
7257 eh = elf32_arm_hash_entry (h);
7258 /* Allocate stubs for exported Thumb functions on v4t. */
7259 if (eh->export_glue == NULL)
7262 globals = elf32_arm_hash_table (info);
7263 BFD_ASSERT (globals != NULL);
7264 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7266 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7267 ARM2THUMB_GLUE_SECTION_NAME);
7268 BFD_ASSERT (s != NULL);
7269 BFD_ASSERT (s->contents != NULL);
7270 BFD_ASSERT (s->output_section != NULL);
7272 sec = eh->export_glue->root.u.def.section;
7274 BFD_ASSERT (sec->output_section != NULL);
7276 val = eh->export_glue->root.u.def.value + sec->output_offset
7277 + sec->output_section->vma;
7279 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
7280 h->root.u.def.section->owner,
7281 globals->obfd, sec, val, s,
7287 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
7290 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
7295 struct elf32_arm_link_hash_table *globals;
7297 globals = elf32_arm_hash_table (info);
7298 BFD_ASSERT (globals != NULL);
7299 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7301 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7302 ARM_BX_GLUE_SECTION_NAME);
7303 BFD_ASSERT (s != NULL);
7304 BFD_ASSERT (s->contents != NULL);
7305 BFD_ASSERT (s->output_section != NULL);
7307 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
7309 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
7311 if ((globals->bx_glue_offset[reg] & 1) == 0)
7313 p = s->contents + glue_addr;
7314 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
7315 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
7316 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
7317 globals->bx_glue_offset[reg] |= 1;
7320 return glue_addr + s->output_section->vma + s->output_offset;
7323 /* Generate Arm stubs for exported Thumb symbols. */
7325 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
7326 struct bfd_link_info *link_info)
7328 struct elf32_arm_link_hash_table * globals;
7330 if (link_info == NULL)
7331 /* Ignore this if we are not called by the ELF backend linker. */
7334 globals = elf32_arm_hash_table (link_info);
7335 if (globals == NULL)
7338 /* If blx is available then exported Thumb symbols are OK and there is
7340 if (globals->use_blx)
7343 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
7347 /* Reserve space for COUNT dynamic relocations in relocation selection
7351 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
7352 bfd_size_type count)
7354 struct elf32_arm_link_hash_table *htab;
7356 htab = elf32_arm_hash_table (info);
7357 BFD_ASSERT (htab->root.dynamic_sections_created);
7360 sreloc->size += RELOC_SIZE (htab) * count;
7363 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
7364 dynamic, the relocations should go in SRELOC, otherwise they should
7365 go in the special .rel.iplt section. */
7368 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
7369 bfd_size_type count)
7371 struct elf32_arm_link_hash_table *htab;
7373 htab = elf32_arm_hash_table (info);
7374 if (!htab->root.dynamic_sections_created)
7375 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
7378 BFD_ASSERT (sreloc != NULL);
7379 sreloc->size += RELOC_SIZE (htab) * count;
7383 /* Add relocation REL to the end of relocation section SRELOC. */
7386 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
7387 asection *sreloc, Elf_Internal_Rela *rel)
7390 struct elf32_arm_link_hash_table *htab;
7392 htab = elf32_arm_hash_table (info);
7393 if (!htab->root.dynamic_sections_created
7394 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
7395 sreloc = htab->root.irelplt;
7398 loc = sreloc->contents;
7399 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
7400 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
7402 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
7405 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
7406 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
7410 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
7411 bfd_boolean is_iplt_entry,
7412 union gotplt_union *root_plt,
7413 struct arm_plt_info *arm_plt)
7415 struct elf32_arm_link_hash_table *htab;
7419 htab = elf32_arm_hash_table (info);
7423 splt = htab->root.iplt;
7424 sgotplt = htab->root.igotplt;
7426 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
7427 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
7431 splt = htab->root.splt;
7432 sgotplt = htab->root.sgotplt;
7434 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
7435 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
7437 /* If this is the first .plt entry, make room for the special
7439 if (splt->size == 0)
7440 splt->size += htab->plt_header_size;
7443 /* Allocate the PLT entry itself, including any leading Thumb stub. */
7444 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7445 splt->size += PLT_THUMB_STUB_SIZE;
7446 root_plt->offset = splt->size;
7447 splt->size += htab->plt_entry_size;
7449 if (!htab->symbian_p)
7451 /* We also need to make an entry in the .got.plt section, which
7452 will be placed in the .got section by the linker script. */
7453 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
7459 arm_movw_immediate (bfd_vma value)
7461 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
7465 arm_movt_immediate (bfd_vma value)
7467 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
7470 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
7471 the entry lives in .iplt and resolves to (*SYM_VALUE)().
7472 Otherwise, DYNINDX is the index of the symbol in the dynamic
7473 symbol table and SYM_VALUE is undefined.
7475 ROOT_PLT points to the offset of the PLT entry from the start of its
7476 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
7477 bookkeeping information. */
7480 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
7481 union gotplt_union *root_plt,
7482 struct arm_plt_info *arm_plt,
7483 int dynindx, bfd_vma sym_value)
7485 struct elf32_arm_link_hash_table *htab;
7491 Elf_Internal_Rela rel;
7492 bfd_vma plt_header_size;
7493 bfd_vma got_header_size;
7495 htab = elf32_arm_hash_table (info);
7497 /* Pick the appropriate sections and sizes. */
7500 splt = htab->root.iplt;
7501 sgot = htab->root.igotplt;
7502 srel = htab->root.irelplt;
7504 /* There are no reserved entries in .igot.plt, and no special
7505 first entry in .iplt. */
7506 got_header_size = 0;
7507 plt_header_size = 0;
7511 splt = htab->root.splt;
7512 sgot = htab->root.sgotplt;
7513 srel = htab->root.srelplt;
7515 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
7516 plt_header_size = htab->plt_header_size;
7518 BFD_ASSERT (splt != NULL && srel != NULL);
7520 /* Fill in the entry in the procedure linkage table. */
7521 if (htab->symbian_p)
7523 BFD_ASSERT (dynindx >= 0);
7524 put_arm_insn (htab, output_bfd,
7525 elf32_arm_symbian_plt_entry[0],
7526 splt->contents + root_plt->offset);
7527 bfd_put_32 (output_bfd,
7528 elf32_arm_symbian_plt_entry[1],
7529 splt->contents + root_plt->offset + 4);
7531 /* Fill in the entry in the .rel.plt section. */
7532 rel.r_offset = (splt->output_section->vma
7533 + splt->output_offset
7534 + root_plt->offset + 4);
7535 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
7537 /* Get the index in the procedure linkage table which
7538 corresponds to this symbol. This is the index of this symbol
7539 in all the symbols for which we are making plt entries. The
7540 first entry in the procedure linkage table is reserved. */
7541 plt_index = ((root_plt->offset - plt_header_size)
7542 / htab->plt_entry_size);
7546 bfd_vma got_offset, got_address, plt_address;
7547 bfd_vma got_displacement, initial_got_entry;
7550 BFD_ASSERT (sgot != NULL);
7552 /* Get the offset into the .(i)got.plt table of the entry that
7553 corresponds to this function. */
7554 got_offset = (arm_plt->got_offset & -2);
7556 /* Get the index in the procedure linkage table which
7557 corresponds to this symbol. This is the index of this symbol
7558 in all the symbols for which we are making plt entries.
7559 After the reserved .got.plt entries, all symbols appear in
7560 the same order as in .plt. */
7561 plt_index = (got_offset - got_header_size) / 4;
7563 /* Calculate the address of the GOT entry. */
7564 got_address = (sgot->output_section->vma
7565 + sgot->output_offset
7568 /* ...and the address of the PLT entry. */
7569 plt_address = (splt->output_section->vma
7570 + splt->output_offset
7571 + root_plt->offset);
7573 ptr = splt->contents + root_plt->offset;
7574 if (htab->vxworks_p && info->shared)
7579 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7581 val = elf32_arm_vxworks_shared_plt_entry[i];
7583 val |= got_address - sgot->output_section->vma;
7585 val |= plt_index * RELOC_SIZE (htab);
7586 if (i == 2 || i == 5)
7587 bfd_put_32 (output_bfd, val, ptr);
7589 put_arm_insn (htab, output_bfd, val, ptr);
7592 else if (htab->vxworks_p)
7597 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7599 val = elf32_arm_vxworks_exec_plt_entry[i];
7603 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
7605 val |= plt_index * RELOC_SIZE (htab);
7606 if (i == 2 || i == 5)
7607 bfd_put_32 (output_bfd, val, ptr);
7609 put_arm_insn (htab, output_bfd, val, ptr);
7612 loc = (htab->srelplt2->contents
7613 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
7615 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
7616 referencing the GOT for this PLT entry. */
7617 rel.r_offset = plt_address + 8;
7618 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
7619 rel.r_addend = got_offset;
7620 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7621 loc += RELOC_SIZE (htab);
7623 /* Create the R_ARM_ABS32 relocation referencing the
7624 beginning of the PLT for this GOT entry. */
7625 rel.r_offset = got_address;
7626 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
7628 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7630 else if (htab->nacl_p)
7632 /* Calculate the displacement between the PLT slot and the
7633 common tail that's part of the special initial PLT slot. */
7634 int32_t tail_displacement
7635 = ((splt->output_section->vma + splt->output_offset
7636 + ARM_NACL_PLT_TAIL_OFFSET)
7637 - (plt_address + htab->plt_entry_size + 4));
7638 BFD_ASSERT ((tail_displacement & 3) == 0);
7639 tail_displacement >>= 2;
7641 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
7642 || (-tail_displacement & 0xff000000) == 0);
7644 /* Calculate the displacement between the PLT slot and the entry
7645 in the GOT. The offset accounts for the value produced by
7646 adding to pc in the penultimate instruction of the PLT stub. */
7647 got_displacement = (got_address
7648 - (plt_address + htab->plt_entry_size));
7650 /* NaCl does not support interworking at all. */
7651 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
7653 put_arm_insn (htab, output_bfd,
7654 elf32_arm_nacl_plt_entry[0]
7655 | arm_movw_immediate (got_displacement),
7657 put_arm_insn (htab, output_bfd,
7658 elf32_arm_nacl_plt_entry[1]
7659 | arm_movt_immediate (got_displacement),
7661 put_arm_insn (htab, output_bfd,
7662 elf32_arm_nacl_plt_entry[2],
7664 put_arm_insn (htab, output_bfd,
7665 elf32_arm_nacl_plt_entry[3]
7666 | (tail_displacement & 0x00ffffff),
7671 /* Calculate the displacement between the PLT slot and the
7672 entry in the GOT. The eight-byte offset accounts for the
7673 value produced by adding to pc in the first instruction
7675 got_displacement = got_address - (plt_address + 8);
7677 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
7679 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7681 put_thumb_insn (htab, output_bfd,
7682 elf32_arm_plt_thumb_stub[0], ptr - 4);
7683 put_thumb_insn (htab, output_bfd,
7684 elf32_arm_plt_thumb_stub[1], ptr - 2);
7687 put_arm_insn (htab, output_bfd,
7688 elf32_arm_plt_entry[0]
7689 | ((got_displacement & 0x0ff00000) >> 20),
7691 put_arm_insn (htab, output_bfd,
7692 elf32_arm_plt_entry[1]
7693 | ((got_displacement & 0x000ff000) >> 12),
7695 put_arm_insn (htab, output_bfd,
7696 elf32_arm_plt_entry[2]
7697 | (got_displacement & 0x00000fff),
7699 #ifdef FOUR_WORD_PLT
7700 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
7704 /* Fill in the entry in the .rel(a).(i)plt section. */
7705 rel.r_offset = got_address;
7709 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
7710 The dynamic linker or static executable then calls SYM_VALUE
7711 to determine the correct run-time value of the .igot.plt entry. */
7712 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
7713 initial_got_entry = sym_value;
7717 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
7718 initial_got_entry = (splt->output_section->vma
7719 + splt->output_offset);
7722 /* Fill in the entry in the global offset table. */
7723 bfd_put_32 (output_bfd, initial_got_entry,
7724 sgot->contents + got_offset);
7727 loc = srel->contents + plt_index * RELOC_SIZE (htab);
7728 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7731 /* Some relocations map to different relocations depending on the
7732 target. Return the real relocation. */
7735 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
7741 if (globals->target1_is_rel)
7747 return globals->target2_reloc;
7754 /* Return the base VMA address which should be subtracted from real addresses
7755 when resolving @dtpoff relocation.
7756 This is PT_TLS segment p_vaddr. */
7759 dtpoff_base (struct bfd_link_info *info)
7761 /* If tls_sec is NULL, we should have signalled an error already. */
7762 if (elf_hash_table (info)->tls_sec == NULL)
7764 return elf_hash_table (info)->tls_sec->vma;
7767 /* Return the relocation value for @tpoff relocation
7768 if STT_TLS virtual address is ADDRESS. */
7771 tpoff (struct bfd_link_info *info, bfd_vma address)
7773 struct elf_link_hash_table *htab = elf_hash_table (info);
7776 /* If tls_sec is NULL, we should have signalled an error already. */
7777 if (htab->tls_sec == NULL)
7779 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
7780 return address - htab->tls_sec->vma + base;
7783 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
7784 VALUE is the relocation value. */
7786 static bfd_reloc_status_type
7787 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
7790 return bfd_reloc_overflow;
7792 value |= bfd_get_32 (abfd, data) & 0xfffff000;
7793 bfd_put_32 (abfd, value, data);
7794 return bfd_reloc_ok;
7797 /* Handle TLS relaxations. Relaxing is possible for symbols that use
7798 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
7799 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
7801 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7802 is to then call final_link_relocate. Return other values in the
7805 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
7806 the pre-relaxed code. It would be nice if the relocs were updated
7807 to match the optimization. */
7809 static bfd_reloc_status_type
7810 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
7811 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
7812 Elf_Internal_Rela *rel, unsigned long is_local)
7816 switch (ELF32_R_TYPE (rel->r_info))
7819 return bfd_reloc_notsupported;
7821 case R_ARM_TLS_GOTDESC:
7826 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7828 insn -= 5; /* THUMB */
7830 insn -= 8; /* ARM */
7832 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7833 return bfd_reloc_continue;
7835 case R_ARM_THM_TLS_DESCSEQ:
7837 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
7838 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
7842 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7844 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
7848 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7851 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
7853 else if ((insn & 0xff87) == 0x4780) /* blx rx */
7857 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7860 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
7861 contents + rel->r_offset);
7865 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
7866 /* It's a 32 bit instruction, fetch the rest of it for
7867 error generation. */
7869 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
7870 (*_bfd_error_handler)
7871 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
7872 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7873 return bfd_reloc_notsupported;
7877 case R_ARM_TLS_DESCSEQ:
7879 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7880 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
7884 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
7885 contents + rel->r_offset);
7887 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
7891 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7894 bfd_put_32 (input_bfd, insn & 0xfffff000,
7895 contents + rel->r_offset);
7897 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
7901 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7904 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
7905 contents + rel->r_offset);
7909 (*_bfd_error_handler)
7910 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
7911 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7912 return bfd_reloc_notsupported;
7916 case R_ARM_TLS_CALL:
7917 /* GD->IE relaxation, turn the instruction into 'nop' or
7918 'ldr r0, [pc,r0]' */
7919 insn = is_local ? 0xe1a00000 : 0xe79f0000;
7920 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7923 case R_ARM_THM_TLS_CALL:
7924 /* GD->IE relaxation */
7926 /* add r0,pc; ldr r0, [r0] */
7928 else if (arch_has_thumb2_nop (globals))
7935 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
7936 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
7939 return bfd_reloc_ok;
7942 /* For a given value of n, calculate the value of G_n as required to
7943 deal with group relocations. We return it in the form of an
7944 encoded constant-and-rotation, together with the final residual. If n is
7945 specified as less than zero, then final_residual is filled with the
7946 input value and no further action is performed. */
7949 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
7953 bfd_vma encoded_g_n = 0;
7954 bfd_vma residual = value; /* Also known as Y_n. */
7956 for (current_n = 0; current_n <= n; current_n++)
7960 /* Calculate which part of the value to mask. */
7967 /* Determine the most significant bit in the residual and
7968 align the resulting value to a 2-bit boundary. */
7969 for (msb = 30; msb >= 0; msb -= 2)
7970 if (residual & (3 << msb))
7973 /* The desired shift is now (msb - 6), or zero, whichever
7980 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
7981 g_n = residual & (0xff << shift);
7982 encoded_g_n = (g_n >> shift)
7983 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
7985 /* Calculate the residual for the next time around. */
7989 *final_residual = residual;
7994 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
7995 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
7998 identify_add_or_sub (bfd_vma insn)
8000 int opcode = insn & 0x1e00000;
8002 if (opcode == 1 << 23) /* ADD */
8005 if (opcode == 1 << 22) /* SUB */
8011 /* Perform a relocation as part of a final link. */
8013 static bfd_reloc_status_type
8014 elf32_arm_final_link_relocate (reloc_howto_type * howto,
8017 asection * input_section,
8018 bfd_byte * contents,
8019 Elf_Internal_Rela * rel,
8021 struct bfd_link_info * info,
8023 const char * sym_name,
8024 unsigned char st_type,
8025 enum arm_st_branch_type branch_type,
8026 struct elf_link_hash_entry * h,
8027 bfd_boolean * unresolved_reloc_p,
8028 char ** error_message)
8030 unsigned long r_type = howto->type;
8031 unsigned long r_symndx;
8032 bfd_byte * hit_data = contents + rel->r_offset;
8033 bfd_vma * local_got_offsets;
8034 bfd_vma * local_tlsdesc_gotents;
8037 asection * sreloc = NULL;
8040 bfd_signed_vma signed_addend;
8041 unsigned char dynreloc_st_type;
8042 bfd_vma dynreloc_value;
8043 struct elf32_arm_link_hash_table * globals;
8044 struct elf32_arm_link_hash_entry *eh;
8045 union gotplt_union *root_plt;
8046 struct arm_plt_info *arm_plt;
8048 bfd_vma gotplt_offset;
8049 bfd_boolean has_iplt_entry;
8051 globals = elf32_arm_hash_table (info);
8052 if (globals == NULL)
8053 return bfd_reloc_notsupported;
8055 BFD_ASSERT (is_arm_elf (input_bfd));
8057 /* Some relocation types map to different relocations depending on the
8058 target. We pick the right one here. */
8059 r_type = arm_real_reloc_type (globals, r_type);
8061 /* It is possible to have linker relaxations on some TLS access
8062 models. Update our information here. */
8063 r_type = elf32_arm_tls_transition (info, r_type, h);
8065 if (r_type != howto->type)
8066 howto = elf32_arm_howto_from_type (r_type);
8068 /* If the start address has been set, then set the EF_ARM_HASENTRY
8069 flag. Setting this more than once is redundant, but the cost is
8070 not too high, and it keeps the code simple.
8072 The test is done here, rather than somewhere else, because the
8073 start address is only set just before the final link commences.
8075 Note - if the user deliberately sets a start address of 0, the
8076 flag will not be set. */
8077 if (bfd_get_start_address (output_bfd) != 0)
8078 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
8080 eh = (struct elf32_arm_link_hash_entry *) h;
8081 sgot = globals->root.sgot;
8082 local_got_offsets = elf_local_got_offsets (input_bfd);
8083 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
8085 if (globals->root.dynamic_sections_created)
8086 srelgot = globals->root.srelgot;
8090 r_symndx = ELF32_R_SYM (rel->r_info);
8092 if (globals->use_rel)
8094 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
8096 if (addend & ((howto->src_mask + 1) >> 1))
8099 signed_addend &= ~ howto->src_mask;
8100 signed_addend |= addend;
8103 signed_addend = addend;
8106 addend = signed_addend = rel->r_addend;
8108 /* Record the symbol information that should be used in dynamic
8110 dynreloc_st_type = st_type;
8111 dynreloc_value = value;
8112 if (branch_type == ST_BRANCH_TO_THUMB)
8113 dynreloc_value |= 1;
8115 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
8116 VALUE appropriately for relocations that we resolve at link time. */
8117 has_iplt_entry = FALSE;
8118 if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
8119 && root_plt->offset != (bfd_vma) -1)
8121 plt_offset = root_plt->offset;
8122 gotplt_offset = arm_plt->got_offset;
8124 if (h == NULL || eh->is_iplt)
8126 has_iplt_entry = TRUE;
8127 splt = globals->root.iplt;
8129 /* Populate .iplt entries here, because not all of them will
8130 be seen by finish_dynamic_symbol. The lower bit is set if
8131 we have already populated the entry. */
8136 elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
8137 -1, dynreloc_value);
8138 root_plt->offset |= 1;
8141 /* Static relocations always resolve to the .iplt entry. */
8143 value = (splt->output_section->vma
8144 + splt->output_offset
8146 branch_type = ST_BRANCH_TO_ARM;
8148 /* If there are non-call relocations that resolve to the .iplt
8149 entry, then all dynamic ones must too. */
8150 if (arm_plt->noncall_refcount != 0)
8152 dynreloc_st_type = st_type;
8153 dynreloc_value = value;
8157 /* We populate the .plt entry in finish_dynamic_symbol. */
8158 splt = globals->root.splt;
8163 plt_offset = (bfd_vma) -1;
8164 gotplt_offset = (bfd_vma) -1;
8170 /* We don't need to find a value for this symbol. It's just a
8172 *unresolved_reloc_p = FALSE;
8173 return bfd_reloc_ok;
8176 if (!globals->vxworks_p)
8177 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8181 case R_ARM_ABS32_NOI:
8183 case R_ARM_REL32_NOI:
8189 /* Handle relocations which should use the PLT entry. ABS32/REL32
8190 will use the symbol's value, which may point to a PLT entry, but we
8191 don't need to handle that here. If we created a PLT entry, all
8192 branches in this object should go to it, except if the PLT is too
8193 far away, in which case a long branch stub should be inserted. */
8194 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
8195 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
8196 && r_type != R_ARM_CALL
8197 && r_type != R_ARM_JUMP24
8198 && r_type != R_ARM_PLT32)
8199 && plt_offset != (bfd_vma) -1)
8201 /* If we've created a .plt section, and assigned a PLT entry
8202 to this function, it must either be a STT_GNU_IFUNC reference
8203 or not be known to bind locally. In other cases, we should
8204 have cleared the PLT entry by now. */
8205 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
8207 value = (splt->output_section->vma
8208 + splt->output_offset
8210 *unresolved_reloc_p = FALSE;
8211 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8212 contents, rel->r_offset, value,
8216 /* When generating a shared object or relocatable executable, these
8217 relocations are copied into the output file to be resolved at
8219 if ((info->shared || globals->root.is_relocatable_executable)
8220 && (input_section->flags & SEC_ALLOC)
8221 && !(globals->vxworks_p
8222 && strcmp (input_section->output_section->name,
8224 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
8225 || !SYMBOL_CALLS_LOCAL (info, h))
8226 && (!strstr (input_section->name, STUB_SUFFIX))
8228 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8229 || h->root.type != bfd_link_hash_undefweak)
8230 && r_type != R_ARM_PC24
8231 && r_type != R_ARM_CALL
8232 && r_type != R_ARM_JUMP24
8233 && r_type != R_ARM_PREL31
8234 && r_type != R_ARM_PLT32)
8236 Elf_Internal_Rela outrel;
8237 bfd_boolean skip, relocate;
8239 *unresolved_reloc_p = FALSE;
8241 if (sreloc == NULL && globals->root.dynamic_sections_created)
8243 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
8244 ! globals->use_rel);
8247 return bfd_reloc_notsupported;
8253 outrel.r_addend = addend;
8255 _bfd_elf_section_offset (output_bfd, info, input_section,
8257 if (outrel.r_offset == (bfd_vma) -1)
8259 else if (outrel.r_offset == (bfd_vma) -2)
8260 skip = TRUE, relocate = TRUE;
8261 outrel.r_offset += (input_section->output_section->vma
8262 + input_section->output_offset);
8265 memset (&outrel, 0, sizeof outrel);
8270 || !h->def_regular))
8271 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
8276 /* This symbol is local, or marked to become local. */
8277 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
8278 if (globals->symbian_p)
8282 /* On Symbian OS, the data segment and text segement
8283 can be relocated independently. Therefore, we
8284 must indicate the segment to which this
8285 relocation is relative. The BPABI allows us to
8286 use any symbol in the right segment; we just use
8287 the section symbol as it is convenient. (We
8288 cannot use the symbol given by "h" directly as it
8289 will not appear in the dynamic symbol table.)
8291 Note that the dynamic linker ignores the section
8292 symbol value, so we don't subtract osec->vma
8293 from the emitted reloc addend. */
8295 osec = sym_sec->output_section;
8297 osec = input_section->output_section;
8298 symbol = elf_section_data (osec)->dynindx;
8301 struct elf_link_hash_table *htab = elf_hash_table (info);
8303 if ((osec->flags & SEC_READONLY) == 0
8304 && htab->data_index_section != NULL)
8305 osec = htab->data_index_section;
8307 osec = htab->text_index_section;
8308 symbol = elf_section_data (osec)->dynindx;
8310 BFD_ASSERT (symbol != 0);
8313 /* On SVR4-ish systems, the dynamic loader cannot
8314 relocate the text and data segments independently,
8315 so the symbol does not matter. */
8317 if (dynreloc_st_type == STT_GNU_IFUNC)
8318 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
8319 to the .iplt entry. Instead, every non-call reference
8320 must use an R_ARM_IRELATIVE relocation to obtain the
8321 correct run-time address. */
8322 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
8324 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
8325 if (globals->use_rel)
8328 outrel.r_addend += dynreloc_value;
8331 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
8333 /* If this reloc is against an external symbol, we do not want to
8334 fiddle with the addend. Otherwise, we need to include the symbol
8335 value so that it becomes an addend for the dynamic reloc. */
8337 return bfd_reloc_ok;
8339 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8340 contents, rel->r_offset,
8341 dynreloc_value, (bfd_vma) 0);
8343 else switch (r_type)
8346 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8348 case R_ARM_XPC25: /* Arm BLX instruction. */
8351 case R_ARM_PC24: /* Arm B/BL instruction. */
8354 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
8356 if (r_type == R_ARM_XPC25)
8358 /* Check for Arm calling Arm function. */
8359 /* FIXME: Should we translate the instruction into a BL
8360 instruction instead ? */
8361 if (branch_type != ST_BRANCH_TO_THUMB)
8362 (*_bfd_error_handler)
8363 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
8365 h ? h->root.root.string : "(local)");
8367 else if (r_type == R_ARM_PC24)
8369 /* Check for Arm calling Thumb function. */
8370 if (branch_type == ST_BRANCH_TO_THUMB)
8372 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
8373 output_bfd, input_section,
8374 hit_data, sym_sec, rel->r_offset,
8375 signed_addend, value,
8377 return bfd_reloc_ok;
8379 return bfd_reloc_dangerous;
8383 /* Check if a stub has to be inserted because the
8384 destination is too far or we are changing mode. */
8385 if ( r_type == R_ARM_CALL
8386 || r_type == R_ARM_JUMP24
8387 || r_type == R_ARM_PLT32)
8389 enum elf32_arm_stub_type stub_type = arm_stub_none;
8390 struct elf32_arm_link_hash_entry *hash;
8392 hash = (struct elf32_arm_link_hash_entry *) h;
8393 stub_type = arm_type_of_stub (info, input_section, rel,
8394 st_type, &branch_type,
8395 hash, value, sym_sec,
8396 input_bfd, sym_name);
8398 if (stub_type != arm_stub_none)
8400 /* The target is out of reach, so redirect the
8401 branch to the local stub for this function. */
8402 stub_entry = elf32_arm_get_stub_entry (input_section,
8407 if (stub_entry != NULL)
8408 value = (stub_entry->stub_offset
8409 + stub_entry->stub_sec->output_offset
8410 + stub_entry->stub_sec->output_section->vma);
8412 if (plt_offset != (bfd_vma) -1)
8413 *unresolved_reloc_p = FALSE;
8418 /* If the call goes through a PLT entry, make sure to
8419 check distance to the right destination address. */
8420 if (plt_offset != (bfd_vma) -1)
8422 value = (splt->output_section->vma
8423 + splt->output_offset
8425 *unresolved_reloc_p = FALSE;
8426 /* The PLT entry is in ARM mode, regardless of the
8428 branch_type = ST_BRANCH_TO_ARM;
8433 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
8435 S is the address of the symbol in the relocation.
8436 P is address of the instruction being relocated.
8437 A is the addend (extracted from the instruction) in bytes.
8439 S is held in 'value'.
8440 P is the base address of the section containing the
8441 instruction plus the offset of the reloc into that
8443 (input_section->output_section->vma +
8444 input_section->output_offset +
8446 A is the addend, converted into bytes, ie:
8449 Note: None of these operations have knowledge of the pipeline
8450 size of the processor, thus it is up to the assembler to
8451 encode this information into the addend. */
8452 value -= (input_section->output_section->vma
8453 + input_section->output_offset);
8454 value -= rel->r_offset;
8455 if (globals->use_rel)
8456 value += (signed_addend << howto->size);
8458 /* RELA addends do not have to be adjusted by howto->size. */
8459 value += signed_addend;
8461 signed_addend = value;
8462 signed_addend >>= howto->rightshift;
8464 /* A branch to an undefined weak symbol is turned into a jump to
8465 the next instruction unless a PLT entry will be created.
8466 Do the same for local undefined symbols (but not for STN_UNDEF).
8467 The jump to the next instruction is optimized as a NOP depending
8468 on the architecture. */
8469 if (h ? (h->root.type == bfd_link_hash_undefweak
8470 && plt_offset == (bfd_vma) -1)
8471 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
8473 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
8475 if (arch_has_arm_nop (globals))
8476 value |= 0x0320f000;
8478 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
8482 /* Perform a signed range check. */
8483 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
8484 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
8485 return bfd_reloc_overflow;
8487 addend = (value & 2);
8489 value = (signed_addend & howto->dst_mask)
8490 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
8492 if (r_type == R_ARM_CALL)
8494 /* Set the H bit in the BLX instruction. */
8495 if (branch_type == ST_BRANCH_TO_THUMB)
8500 value &= ~(bfd_vma)(1 << 24);
8503 /* Select the correct instruction (BL or BLX). */
8504 /* Only if we are not handling a BL to a stub. In this
8505 case, mode switching is performed by the stub. */
8506 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
8508 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
8510 value &= ~(bfd_vma)(1 << 28);
8520 if (branch_type == ST_BRANCH_TO_THUMB)
8524 case R_ARM_ABS32_NOI:
8530 if (branch_type == ST_BRANCH_TO_THUMB)
8532 value -= (input_section->output_section->vma
8533 + input_section->output_offset + rel->r_offset);
8536 case R_ARM_REL32_NOI:
8538 value -= (input_section->output_section->vma
8539 + input_section->output_offset + rel->r_offset);
8543 value -= (input_section->output_section->vma
8544 + input_section->output_offset + rel->r_offset);
8545 value += signed_addend;
8546 if (! h || h->root.type != bfd_link_hash_undefweak)
8548 /* Check for overflow. */
8549 if ((value ^ (value >> 1)) & (1 << 30))
8550 return bfd_reloc_overflow;
8552 value &= 0x7fffffff;
8553 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
8554 if (branch_type == ST_BRANCH_TO_THUMB)
8559 bfd_put_32 (input_bfd, value, hit_data);
8560 return bfd_reloc_ok;
8565 /* There is no way to tell whether the user intended to use a signed or
8566 unsigned addend. When checking for overflow we accept either,
8567 as specified by the AAELF. */
8568 if ((long) value > 0xff || (long) value < -0x80)
8569 return bfd_reloc_overflow;
8571 bfd_put_8 (input_bfd, value, hit_data);
8572 return bfd_reloc_ok;
8577 /* See comment for R_ARM_ABS8. */
8578 if ((long) value > 0xffff || (long) value < -0x8000)
8579 return bfd_reloc_overflow;
8581 bfd_put_16 (input_bfd, value, hit_data);
8582 return bfd_reloc_ok;
8584 case R_ARM_THM_ABS5:
8585 /* Support ldr and str instructions for the thumb. */
8586 if (globals->use_rel)
8588 /* Need to refetch addend. */
8589 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8590 /* ??? Need to determine shift amount from operand size. */
8591 addend >>= howto->rightshift;
8595 /* ??? Isn't value unsigned? */
8596 if ((long) value > 0x1f || (long) value < -0x10)
8597 return bfd_reloc_overflow;
8599 /* ??? Value needs to be properly shifted into place first. */
8600 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
8601 bfd_put_16 (input_bfd, value, hit_data);
8602 return bfd_reloc_ok;
8604 case R_ARM_THM_ALU_PREL_11_0:
8605 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
8608 bfd_signed_vma relocation;
8610 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8611 | bfd_get_16 (input_bfd, hit_data + 2);
8613 if (globals->use_rel)
8615 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
8616 | ((insn & (1 << 26)) >> 15);
8617 if (insn & 0xf00000)
8618 signed_addend = -signed_addend;
8621 relocation = value + signed_addend;
8622 relocation -= (input_section->output_section->vma
8623 + input_section->output_offset
8626 value = abs (relocation);
8628 if (value >= 0x1000)
8629 return bfd_reloc_overflow;
8631 insn = (insn & 0xfb0f8f00) | (value & 0xff)
8632 | ((value & 0x700) << 4)
8633 | ((value & 0x800) << 15);
8637 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8638 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8640 return bfd_reloc_ok;
8644 /* PR 10073: This reloc is not generated by the GNU toolchain,
8645 but it is supported for compatibility with third party libraries
8646 generated by other compilers, specifically the ARM/IAR. */
8649 bfd_signed_vma relocation;
8651 insn = bfd_get_16 (input_bfd, hit_data);
8653 if (globals->use_rel)
8654 addend = (insn & 0x00ff) << 2;
8656 relocation = value + addend;
8657 relocation -= (input_section->output_section->vma
8658 + input_section->output_offset
8661 value = abs (relocation);
8663 /* We do not check for overflow of this reloc. Although strictly
8664 speaking this is incorrect, it appears to be necessary in order
8665 to work with IAR generated relocs. Since GCC and GAS do not
8666 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
8667 a problem for them. */
8670 insn = (insn & 0xff00) | (value >> 2);
8672 bfd_put_16 (input_bfd, insn, hit_data);
8674 return bfd_reloc_ok;
8677 case R_ARM_THM_PC12:
8678 /* Corresponds to: ldr.w reg, [pc, #offset]. */
8681 bfd_signed_vma relocation;
8683 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8684 | bfd_get_16 (input_bfd, hit_data + 2);
8686 if (globals->use_rel)
8688 signed_addend = insn & 0xfff;
8689 if (!(insn & (1 << 23)))
8690 signed_addend = -signed_addend;
8693 relocation = value + signed_addend;
8694 relocation -= (input_section->output_section->vma
8695 + input_section->output_offset
8698 value = abs (relocation);
8700 if (value >= 0x1000)
8701 return bfd_reloc_overflow;
8703 insn = (insn & 0xff7ff000) | value;
8704 if (relocation >= 0)
8707 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8708 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8710 return bfd_reloc_ok;
8713 case R_ARM_THM_XPC22:
8714 case R_ARM_THM_CALL:
8715 case R_ARM_THM_JUMP24:
8716 /* Thumb BL (branch long instruction). */
8720 bfd_boolean overflow = FALSE;
8721 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8722 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
8723 bfd_signed_vma reloc_signed_max;
8724 bfd_signed_vma reloc_signed_min;
8726 bfd_signed_vma signed_check;
8728 const int thumb2 = using_thumb2 (globals);
8730 /* A branch to an undefined weak symbol is turned into a jump to
8731 the next instruction unless a PLT entry will be created.
8732 The jump to the next instruction is optimized as a NOP.W for
8733 Thumb-2 enabled architectures. */
8734 if (h && h->root.type == bfd_link_hash_undefweak
8735 && plt_offset == (bfd_vma) -1)
8737 if (arch_has_thumb2_nop (globals))
8739 bfd_put_16 (input_bfd, 0xf3af, hit_data);
8740 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
8744 bfd_put_16 (input_bfd, 0xe000, hit_data);
8745 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
8747 return bfd_reloc_ok;
8750 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
8751 with Thumb-1) involving the J1 and J2 bits. */
8752 if (globals->use_rel)
8754 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
8755 bfd_vma upper = upper_insn & 0x3ff;
8756 bfd_vma lower = lower_insn & 0x7ff;
8757 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
8758 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
8759 bfd_vma i1 = j1 ^ s ? 0 : 1;
8760 bfd_vma i2 = j2 ^ s ? 0 : 1;
8762 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
8764 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
8766 signed_addend = addend;
8769 if (r_type == R_ARM_THM_XPC22)
8771 /* Check for Thumb to Thumb call. */
8772 /* FIXME: Should we translate the instruction into a BL
8773 instruction instead ? */
8774 if (branch_type == ST_BRANCH_TO_THUMB)
8775 (*_bfd_error_handler)
8776 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
8778 h ? h->root.root.string : "(local)");
8782 /* If it is not a call to Thumb, assume call to Arm.
8783 If it is a call relative to a section name, then it is not a
8784 function call at all, but rather a long jump. Calls through
8785 the PLT do not require stubs. */
8786 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
8788 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8790 /* Convert BL to BLX. */
8791 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8793 else if (( r_type != R_ARM_THM_CALL)
8794 && (r_type != R_ARM_THM_JUMP24))
8796 if (elf32_thumb_to_arm_stub
8797 (info, sym_name, input_bfd, output_bfd, input_section,
8798 hit_data, sym_sec, rel->r_offset, signed_addend, value,
8800 return bfd_reloc_ok;
8802 return bfd_reloc_dangerous;
8805 else if (branch_type == ST_BRANCH_TO_THUMB
8807 && r_type == R_ARM_THM_CALL)
8809 /* Make sure this is a BL. */
8810 lower_insn |= 0x1800;
8814 enum elf32_arm_stub_type stub_type = arm_stub_none;
8815 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
8817 /* Check if a stub has to be inserted because the destination
8819 struct elf32_arm_stub_hash_entry *stub_entry;
8820 struct elf32_arm_link_hash_entry *hash;
8822 hash = (struct elf32_arm_link_hash_entry *) h;
8824 stub_type = arm_type_of_stub (info, input_section, rel,
8825 st_type, &branch_type,
8826 hash, value, sym_sec,
8827 input_bfd, sym_name);
8829 if (stub_type != arm_stub_none)
8831 /* The target is out of reach or we are changing modes, so
8832 redirect the branch to the local stub for this
8834 stub_entry = elf32_arm_get_stub_entry (input_section,
8838 if (stub_entry != NULL)
8840 value = (stub_entry->stub_offset
8841 + stub_entry->stub_sec->output_offset
8842 + stub_entry->stub_sec->output_section->vma);
8844 if (plt_offset != (bfd_vma) -1)
8845 *unresolved_reloc_p = FALSE;
8848 /* If this call becomes a call to Arm, force BLX. */
8849 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
8852 && !arm_stub_is_thumb (stub_entry->stub_type))
8853 || branch_type != ST_BRANCH_TO_THUMB)
8854 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8859 /* Handle calls via the PLT. */
8860 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
8862 value = (splt->output_section->vma
8863 + splt->output_offset
8866 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8868 /* If the Thumb BLX instruction is available, convert
8869 the BL to a BLX instruction to call the ARM-mode
8871 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8872 branch_type = ST_BRANCH_TO_ARM;
8876 /* Target the Thumb stub before the ARM PLT entry. */
8877 value -= PLT_THUMB_STUB_SIZE;
8878 branch_type = ST_BRANCH_TO_THUMB;
8880 *unresolved_reloc_p = FALSE;
8883 relocation = value + signed_addend;
8885 relocation -= (input_section->output_section->vma
8886 + input_section->output_offset
8889 check = relocation >> howto->rightshift;
8891 /* If this is a signed value, the rightshift just dropped
8892 leading 1 bits (assuming twos complement). */
8893 if ((bfd_signed_vma) relocation >= 0)
8894 signed_check = check;
8896 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
8898 /* Calculate the permissable maximum and minimum values for
8899 this relocation according to whether we're relocating for
8901 bitsize = howto->bitsize;
8904 reloc_signed_max = (1 << (bitsize - 1)) - 1;
8905 reloc_signed_min = ~reloc_signed_max;
8907 /* Assumes two's complement. */
8908 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8911 if ((lower_insn & 0x5000) == 0x4000)
8912 /* For a BLX instruction, make sure that the relocation is rounded up
8913 to a word boundary. This follows the semantics of the instruction
8914 which specifies that bit 1 of the target address will come from bit
8915 1 of the base address. */
8916 relocation = (relocation + 2) & ~ 3;
8918 /* Put RELOCATION back into the insn. Assumes two's complement.
8919 We use the Thumb-2 encoding, which is safe even if dealing with
8920 a Thumb-1 instruction by virtue of our overflow check above. */
8921 reloc_sign = (signed_check < 0) ? 1 : 0;
8922 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
8923 | ((relocation >> 12) & 0x3ff)
8924 | (reloc_sign << 10);
8925 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
8926 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
8927 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
8928 | ((relocation >> 1) & 0x7ff);
8930 /* Put the relocated value back in the object file: */
8931 bfd_put_16 (input_bfd, upper_insn, hit_data);
8932 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8934 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8938 case R_ARM_THM_JUMP19:
8939 /* Thumb32 conditional branch instruction. */
8942 bfd_boolean overflow = FALSE;
8943 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8944 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
8945 bfd_signed_vma reloc_signed_max = 0xffffe;
8946 bfd_signed_vma reloc_signed_min = -0x100000;
8947 bfd_signed_vma signed_check;
8949 /* Need to refetch the addend, reconstruct the top three bits,
8950 and squish the two 11 bit pieces together. */
8951 if (globals->use_rel)
8953 bfd_vma S = (upper_insn & 0x0400) >> 10;
8954 bfd_vma upper = (upper_insn & 0x003f);
8955 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
8956 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
8957 bfd_vma lower = (lower_insn & 0x07ff);
8962 upper -= 0x0100; /* Sign extend. */
8964 addend = (upper << 12) | (lower << 1);
8965 signed_addend = addend;
8968 /* Handle calls via the PLT. */
8969 if (plt_offset != (bfd_vma) -1)
8971 value = (splt->output_section->vma
8972 + splt->output_offset
8974 /* Target the Thumb stub before the ARM PLT entry. */
8975 value -= PLT_THUMB_STUB_SIZE;
8976 *unresolved_reloc_p = FALSE;
8979 /* ??? Should handle interworking? GCC might someday try to
8980 use this for tail calls. */
8982 relocation = value + signed_addend;
8983 relocation -= (input_section->output_section->vma
8984 + input_section->output_offset
8986 signed_check = (bfd_signed_vma) relocation;
8988 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8991 /* Put RELOCATION back into the insn. */
8993 bfd_vma S = (relocation & 0x00100000) >> 20;
8994 bfd_vma J2 = (relocation & 0x00080000) >> 19;
8995 bfd_vma J1 = (relocation & 0x00040000) >> 18;
8996 bfd_vma hi = (relocation & 0x0003f000) >> 12;
8997 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
8999 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
9000 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
9003 /* Put the relocated value back in the object file: */
9004 bfd_put_16 (input_bfd, upper_insn, hit_data);
9005 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9007 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9010 case R_ARM_THM_JUMP11:
9011 case R_ARM_THM_JUMP8:
9012 case R_ARM_THM_JUMP6:
9013 /* Thumb B (branch) instruction). */
9015 bfd_signed_vma relocation;
9016 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
9017 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
9018 bfd_signed_vma signed_check;
9020 /* CZB cannot jump backward. */
9021 if (r_type == R_ARM_THM_JUMP6)
9022 reloc_signed_min = 0;
9024 if (globals->use_rel)
9026 /* Need to refetch addend. */
9027 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
9028 if (addend & ((howto->src_mask + 1) >> 1))
9031 signed_addend &= ~ howto->src_mask;
9032 signed_addend |= addend;
9035 signed_addend = addend;
9036 /* The value in the insn has been right shifted. We need to
9037 undo this, so that we can perform the address calculation
9038 in terms of bytes. */
9039 signed_addend <<= howto->rightshift;
9041 relocation = value + signed_addend;
9043 relocation -= (input_section->output_section->vma
9044 + input_section->output_offset
9047 relocation >>= howto->rightshift;
9048 signed_check = relocation;
9050 if (r_type == R_ARM_THM_JUMP6)
9051 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
9053 relocation &= howto->dst_mask;
9054 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
9056 bfd_put_16 (input_bfd, relocation, hit_data);
9058 /* Assumes two's complement. */
9059 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9060 return bfd_reloc_overflow;
9062 return bfd_reloc_ok;
9065 case R_ARM_ALU_PCREL7_0:
9066 case R_ARM_ALU_PCREL15_8:
9067 case R_ARM_ALU_PCREL23_15:
9072 insn = bfd_get_32 (input_bfd, hit_data);
9073 if (globals->use_rel)
9075 /* Extract the addend. */
9076 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
9077 signed_addend = addend;
9079 relocation = value + signed_addend;
9081 relocation -= (input_section->output_section->vma
9082 + input_section->output_offset
9084 insn = (insn & ~0xfff)
9085 | ((howto->bitpos << 7) & 0xf00)
9086 | ((relocation >> howto->bitpos) & 0xff);
9087 bfd_put_32 (input_bfd, value, hit_data);
9089 return bfd_reloc_ok;
9091 case R_ARM_GNU_VTINHERIT:
9092 case R_ARM_GNU_VTENTRY:
9093 return bfd_reloc_ok;
9095 case R_ARM_GOTOFF32:
9096 /* Relocation is relative to the start of the
9097 global offset table. */
9099 BFD_ASSERT (sgot != NULL);
9101 return bfd_reloc_notsupported;
9103 /* If we are addressing a Thumb function, we need to adjust the
9104 address by one, so that attempts to call the function pointer will
9105 correctly interpret it as Thumb code. */
9106 if (branch_type == ST_BRANCH_TO_THUMB)
9109 /* Note that sgot->output_offset is not involved in this
9110 calculation. We always want the start of .got. If we
9111 define _GLOBAL_OFFSET_TABLE in a different way, as is
9112 permitted by the ABI, we might have to change this
9114 value -= sgot->output_section->vma;
9115 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9116 contents, rel->r_offset, value,
9120 /* Use global offset table as symbol value. */
9121 BFD_ASSERT (sgot != NULL);
9124 return bfd_reloc_notsupported;
9126 *unresolved_reloc_p = FALSE;
9127 value = sgot->output_section->vma;
9128 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9129 contents, rel->r_offset, value,
9133 case R_ARM_GOT_PREL:
9134 /* Relocation is to the entry for this symbol in the
9135 global offset table. */
9137 return bfd_reloc_notsupported;
9139 if (dynreloc_st_type == STT_GNU_IFUNC
9140 && plt_offset != (bfd_vma) -1
9141 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
9143 /* We have a relocation against a locally-binding STT_GNU_IFUNC
9144 symbol, and the relocation resolves directly to the runtime
9145 target rather than to the .iplt entry. This means that any
9146 .got entry would be the same value as the .igot.plt entry,
9147 so there's no point creating both. */
9148 sgot = globals->root.igotplt;
9149 value = sgot->output_offset + gotplt_offset;
9155 off = h->got.offset;
9156 BFD_ASSERT (off != (bfd_vma) -1);
9159 /* We have already processsed one GOT relocation against
9162 if (globals->root.dynamic_sections_created
9163 && !SYMBOL_REFERENCES_LOCAL (info, h))
9164 *unresolved_reloc_p = FALSE;
9168 Elf_Internal_Rela outrel;
9170 if (!SYMBOL_REFERENCES_LOCAL (info, h))
9172 /* If the symbol doesn't resolve locally in a static
9173 object, we have an undefined reference. If the
9174 symbol doesn't resolve locally in a dynamic object,
9175 it should be resolved by the dynamic linker. */
9176 if (globals->root.dynamic_sections_created)
9178 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
9179 *unresolved_reloc_p = FALSE;
9183 outrel.r_addend = 0;
9187 if (dynreloc_st_type == STT_GNU_IFUNC)
9188 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9189 else if (info->shared)
9190 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9193 outrel.r_addend = dynreloc_value;
9196 /* The GOT entry is initialized to zero by default.
9197 See if we should install a different value. */
9198 if (outrel.r_addend != 0
9199 && (outrel.r_info == 0 || globals->use_rel))
9201 bfd_put_32 (output_bfd, outrel.r_addend,
9202 sgot->contents + off);
9203 outrel.r_addend = 0;
9206 if (outrel.r_info != 0)
9208 outrel.r_offset = (sgot->output_section->vma
9209 + sgot->output_offset
9211 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9215 value = sgot->output_offset + off;
9221 BFD_ASSERT (local_got_offsets != NULL &&
9222 local_got_offsets[r_symndx] != (bfd_vma) -1);
9224 off = local_got_offsets[r_symndx];
9226 /* The offset must always be a multiple of 4. We use the
9227 least significant bit to record whether we have already
9228 generated the necessary reloc. */
9233 if (globals->use_rel)
9234 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
9236 if (info->shared || dynreloc_st_type == STT_GNU_IFUNC)
9238 Elf_Internal_Rela outrel;
9240 outrel.r_addend = addend + dynreloc_value;
9241 outrel.r_offset = (sgot->output_section->vma
9242 + sgot->output_offset
9244 if (dynreloc_st_type == STT_GNU_IFUNC)
9245 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9247 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9248 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9251 local_got_offsets[r_symndx] |= 1;
9254 value = sgot->output_offset + off;
9256 if (r_type != R_ARM_GOT32)
9257 value += sgot->output_section->vma;
9259 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9260 contents, rel->r_offset, value,
9263 case R_ARM_TLS_LDO32:
9264 value = value - dtpoff_base (info);
9266 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9267 contents, rel->r_offset, value,
9270 case R_ARM_TLS_LDM32:
9277 off = globals->tls_ldm_got.offset;
9283 /* If we don't know the module number, create a relocation
9287 Elf_Internal_Rela outrel;
9289 if (srelgot == NULL)
9292 outrel.r_addend = 0;
9293 outrel.r_offset = (sgot->output_section->vma
9294 + sgot->output_offset + off);
9295 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
9297 if (globals->use_rel)
9298 bfd_put_32 (output_bfd, outrel.r_addend,
9299 sgot->contents + off);
9301 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9304 bfd_put_32 (output_bfd, 1, sgot->contents + off);
9306 globals->tls_ldm_got.offset |= 1;
9309 value = sgot->output_section->vma + sgot->output_offset + off
9310 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
9312 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9313 contents, rel->r_offset, value,
9317 case R_ARM_TLS_CALL:
9318 case R_ARM_THM_TLS_CALL:
9319 case R_ARM_TLS_GD32:
9320 case R_ARM_TLS_IE32:
9321 case R_ARM_TLS_GOTDESC:
9322 case R_ARM_TLS_DESCSEQ:
9323 case R_ARM_THM_TLS_DESCSEQ:
9325 bfd_vma off, offplt;
9329 BFD_ASSERT (sgot != NULL);
9334 dyn = globals->root.dynamic_sections_created;
9335 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
9337 || !SYMBOL_REFERENCES_LOCAL (info, h)))
9339 *unresolved_reloc_p = FALSE;
9342 off = h->got.offset;
9343 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
9344 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
9348 BFD_ASSERT (local_got_offsets != NULL);
9349 off = local_got_offsets[r_symndx];
9350 offplt = local_tlsdesc_gotents[r_symndx];
9351 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
9354 /* Linker relaxations happens from one of the
9355 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
9356 if (ELF32_R_TYPE(rel->r_info) != r_type)
9357 tls_type = GOT_TLS_IE;
9359 BFD_ASSERT (tls_type != GOT_UNKNOWN);
9365 bfd_boolean need_relocs = FALSE;
9366 Elf_Internal_Rela outrel;
9369 /* The GOT entries have not been initialized yet. Do it
9370 now, and emit any relocations. If both an IE GOT and a
9371 GD GOT are necessary, we emit the GD first. */
9373 if ((info->shared || indx != 0)
9375 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9376 || h->root.type != bfd_link_hash_undefweak))
9379 BFD_ASSERT (srelgot != NULL);
9382 if (tls_type & GOT_TLS_GDESC)
9386 /* We should have relaxed, unless this is an undefined
9388 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
9390 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
9391 <= globals->root.sgotplt->size);
9393 outrel.r_addend = 0;
9394 outrel.r_offset = (globals->root.sgotplt->output_section->vma
9395 + globals->root.sgotplt->output_offset
9397 + globals->sgotplt_jump_table_size);
9399 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
9400 sreloc = globals->root.srelplt;
9401 loc = sreloc->contents;
9402 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
9403 BFD_ASSERT (loc + RELOC_SIZE (globals)
9404 <= sreloc->contents + sreloc->size);
9406 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9408 /* For globals, the first word in the relocation gets
9409 the relocation index and the top bit set, or zero,
9410 if we're binding now. For locals, it gets the
9411 symbol's offset in the tls section. */
9412 bfd_put_32 (output_bfd,
9413 !h ? value - elf_hash_table (info)->tls_sec->vma
9414 : info->flags & DF_BIND_NOW ? 0
9415 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
9416 globals->root.sgotplt->contents + offplt
9417 + globals->sgotplt_jump_table_size);
9419 /* Second word in the relocation is always zero. */
9420 bfd_put_32 (output_bfd, 0,
9421 globals->root.sgotplt->contents + offplt
9422 + globals->sgotplt_jump_table_size + 4);
9424 if (tls_type & GOT_TLS_GD)
9428 outrel.r_addend = 0;
9429 outrel.r_offset = (sgot->output_section->vma
9430 + sgot->output_offset
9432 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
9434 if (globals->use_rel)
9435 bfd_put_32 (output_bfd, outrel.r_addend,
9436 sgot->contents + cur_off);
9438 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9441 bfd_put_32 (output_bfd, value - dtpoff_base (info),
9442 sgot->contents + cur_off + 4);
9445 outrel.r_addend = 0;
9446 outrel.r_info = ELF32_R_INFO (indx,
9447 R_ARM_TLS_DTPOFF32);
9448 outrel.r_offset += 4;
9450 if (globals->use_rel)
9451 bfd_put_32 (output_bfd, outrel.r_addend,
9452 sgot->contents + cur_off + 4);
9454 elf32_arm_add_dynreloc (output_bfd, info,
9460 /* If we are not emitting relocations for a
9461 general dynamic reference, then we must be in a
9462 static link or an executable link with the
9463 symbol binding locally. Mark it as belonging
9464 to module 1, the executable. */
9465 bfd_put_32 (output_bfd, 1,
9466 sgot->contents + cur_off);
9467 bfd_put_32 (output_bfd, value - dtpoff_base (info),
9468 sgot->contents + cur_off + 4);
9474 if (tls_type & GOT_TLS_IE)
9479 outrel.r_addend = value - dtpoff_base (info);
9481 outrel.r_addend = 0;
9482 outrel.r_offset = (sgot->output_section->vma
9483 + sgot->output_offset
9485 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
9487 if (globals->use_rel)
9488 bfd_put_32 (output_bfd, outrel.r_addend,
9489 sgot->contents + cur_off);
9491 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9494 bfd_put_32 (output_bfd, tpoff (info, value),
9495 sgot->contents + cur_off);
9502 local_got_offsets[r_symndx] |= 1;
9505 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
9507 else if (tls_type & GOT_TLS_GDESC)
9510 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
9511 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
9513 bfd_signed_vma offset;
9514 /* TLS stubs are arm mode. The original symbol is a
9515 data object, so branch_type is bogus. */
9516 branch_type = ST_BRANCH_TO_ARM;
9517 enum elf32_arm_stub_type stub_type
9518 = arm_type_of_stub (info, input_section, rel,
9519 st_type, &branch_type,
9520 (struct elf32_arm_link_hash_entry *)h,
9521 globals->tls_trampoline, globals->root.splt,
9522 input_bfd, sym_name);
9524 if (stub_type != arm_stub_none)
9526 struct elf32_arm_stub_hash_entry *stub_entry
9527 = elf32_arm_get_stub_entry
9528 (input_section, globals->root.splt, 0, rel,
9529 globals, stub_type);
9530 offset = (stub_entry->stub_offset
9531 + stub_entry->stub_sec->output_offset
9532 + stub_entry->stub_sec->output_section->vma);
9535 offset = (globals->root.splt->output_section->vma
9536 + globals->root.splt->output_offset
9537 + globals->tls_trampoline);
9539 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
9543 offset -= (input_section->output_section->vma
9544 + input_section->output_offset
9545 + rel->r_offset + 8);
9549 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
9553 /* Thumb blx encodes the offset in a complicated
9555 unsigned upper_insn, lower_insn;
9558 offset -= (input_section->output_section->vma
9559 + input_section->output_offset
9560 + rel->r_offset + 4);
9562 if (stub_type != arm_stub_none
9563 && arm_stub_is_thumb (stub_type))
9565 lower_insn = 0xd000;
9569 lower_insn = 0xc000;
9570 /* Round up the offset to a word boundary */
9571 offset = (offset + 2) & ~2;
9575 upper_insn = (0xf000
9576 | ((offset >> 12) & 0x3ff)
9578 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
9579 | (((!((offset >> 22) & 1)) ^ neg) << 11)
9580 | ((offset >> 1) & 0x7ff);
9581 bfd_put_16 (input_bfd, upper_insn, hit_data);
9582 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9583 return bfd_reloc_ok;
9586 /* These relocations needs special care, as besides the fact
9587 they point somewhere in .gotplt, the addend must be
9588 adjusted accordingly depending on the type of instruction
9590 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
9592 unsigned long data, insn;
9595 data = bfd_get_32 (input_bfd, hit_data);
9601 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
9602 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9604 | bfd_get_16 (input_bfd,
9605 contents + rel->r_offset - data + 2);
9606 if ((insn & 0xf800c000) == 0xf000c000)
9609 else if ((insn & 0xffffff00) == 0x4400)
9614 (*_bfd_error_handler)
9615 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
9616 input_bfd, input_section,
9617 (unsigned long)rel->r_offset, insn);
9618 return bfd_reloc_notsupported;
9623 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
9628 case 0xfa: /* blx */
9632 case 0xe0: /* add */
9637 (*_bfd_error_handler)
9638 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
9639 input_bfd, input_section,
9640 (unsigned long)rel->r_offset, insn);
9641 return bfd_reloc_notsupported;
9645 value += ((globals->root.sgotplt->output_section->vma
9646 + globals->root.sgotplt->output_offset + off)
9647 - (input_section->output_section->vma
9648 + input_section->output_offset
9650 + globals->sgotplt_jump_table_size);
9653 value = ((globals->root.sgot->output_section->vma
9654 + globals->root.sgot->output_offset + off)
9655 - (input_section->output_section->vma
9656 + input_section->output_offset + rel->r_offset));
9658 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9659 contents, rel->r_offset, value,
9663 case R_ARM_TLS_LE32:
9664 if (info->shared && !info->pie)
9666 (*_bfd_error_handler)
9667 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
9668 input_bfd, input_section,
9669 (long) rel->r_offset, howto->name);
9670 return bfd_reloc_notsupported;
9673 value = tpoff (info, value);
9675 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9676 contents, rel->r_offset, value,
9680 if (globals->fix_v4bx)
9682 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9684 /* Ensure that we have a BX instruction. */
9685 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
9687 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
9689 /* Branch to veneer. */
9691 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
9692 glue_addr -= input_section->output_section->vma
9693 + input_section->output_offset
9694 + rel->r_offset + 8;
9695 insn = (insn & 0xf0000000) | 0x0a000000
9696 | ((glue_addr >> 2) & 0x00ffffff);
9700 /* Preserve Rm (lowest four bits) and the condition code
9701 (highest four bits). Other bits encode MOV PC,Rm. */
9702 insn = (insn & 0xf000000f) | 0x01a0f000;
9705 bfd_put_32 (input_bfd, insn, hit_data);
9707 return bfd_reloc_ok;
9709 case R_ARM_MOVW_ABS_NC:
9710 case R_ARM_MOVT_ABS:
9711 case R_ARM_MOVW_PREL_NC:
9712 case R_ARM_MOVT_PREL:
9713 /* Until we properly support segment-base-relative addressing then
9714 we assume the segment base to be zero, as for the group relocations.
9715 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
9716 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
9717 case R_ARM_MOVW_BREL_NC:
9718 case R_ARM_MOVW_BREL:
9719 case R_ARM_MOVT_BREL:
9721 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9723 if (globals->use_rel)
9725 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
9726 signed_addend = (addend ^ 0x8000) - 0x8000;
9729 value += signed_addend;
9731 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
9732 value -= (input_section->output_section->vma
9733 + input_section->output_offset + rel->r_offset);
9735 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
9736 return bfd_reloc_overflow;
9738 if (branch_type == ST_BRANCH_TO_THUMB)
9741 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
9742 || r_type == R_ARM_MOVT_BREL)
9746 insn |= value & 0xfff;
9747 insn |= (value & 0xf000) << 4;
9748 bfd_put_32 (input_bfd, insn, hit_data);
9750 return bfd_reloc_ok;
9752 case R_ARM_THM_MOVW_ABS_NC:
9753 case R_ARM_THM_MOVT_ABS:
9754 case R_ARM_THM_MOVW_PREL_NC:
9755 case R_ARM_THM_MOVT_PREL:
9756 /* Until we properly support segment-base-relative addressing then
9757 we assume the segment base to be zero, as for the above relocations.
9758 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
9759 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
9760 as R_ARM_THM_MOVT_ABS. */
9761 case R_ARM_THM_MOVW_BREL_NC:
9762 case R_ARM_THM_MOVW_BREL:
9763 case R_ARM_THM_MOVT_BREL:
9767 insn = bfd_get_16 (input_bfd, hit_data) << 16;
9768 insn |= bfd_get_16 (input_bfd, hit_data + 2);
9770 if (globals->use_rel)
9772 addend = ((insn >> 4) & 0xf000)
9773 | ((insn >> 15) & 0x0800)
9774 | ((insn >> 4) & 0x0700)
9776 signed_addend = (addend ^ 0x8000) - 0x8000;
9779 value += signed_addend;
9781 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
9782 value -= (input_section->output_section->vma
9783 + input_section->output_offset + rel->r_offset);
9785 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
9786 return bfd_reloc_overflow;
9788 if (branch_type == ST_BRANCH_TO_THUMB)
9791 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
9792 || r_type == R_ARM_THM_MOVT_BREL)
9796 insn |= (value & 0xf000) << 4;
9797 insn |= (value & 0x0800) << 15;
9798 insn |= (value & 0x0700) << 4;
9799 insn |= (value & 0x00ff);
9801 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9802 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9804 return bfd_reloc_ok;
9806 case R_ARM_ALU_PC_G0_NC:
9807 case R_ARM_ALU_PC_G1_NC:
9808 case R_ARM_ALU_PC_G0:
9809 case R_ARM_ALU_PC_G1:
9810 case R_ARM_ALU_PC_G2:
9811 case R_ARM_ALU_SB_G0_NC:
9812 case R_ARM_ALU_SB_G1_NC:
9813 case R_ARM_ALU_SB_G0:
9814 case R_ARM_ALU_SB_G1:
9815 case R_ARM_ALU_SB_G2:
9817 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9818 bfd_vma pc = input_section->output_section->vma
9819 + input_section->output_offset + rel->r_offset;
9820 /* sb should be the origin of the *segment* containing the symbol.
9821 It is not clear how to obtain this OS-dependent value, so we
9822 make an arbitrary choice of zero. */
9826 bfd_signed_vma signed_value;
9829 /* Determine which group of bits to select. */
9832 case R_ARM_ALU_PC_G0_NC:
9833 case R_ARM_ALU_PC_G0:
9834 case R_ARM_ALU_SB_G0_NC:
9835 case R_ARM_ALU_SB_G0:
9839 case R_ARM_ALU_PC_G1_NC:
9840 case R_ARM_ALU_PC_G1:
9841 case R_ARM_ALU_SB_G1_NC:
9842 case R_ARM_ALU_SB_G1:
9846 case R_ARM_ALU_PC_G2:
9847 case R_ARM_ALU_SB_G2:
9855 /* If REL, extract the addend from the insn. If RELA, it will
9856 have already been fetched for us. */
9857 if (globals->use_rel)
9860 bfd_vma constant = insn & 0xff;
9861 bfd_vma rotation = (insn & 0xf00) >> 8;
9864 signed_addend = constant;
9867 /* Compensate for the fact that in the instruction, the
9868 rotation is stored in multiples of 2 bits. */
9871 /* Rotate "constant" right by "rotation" bits. */
9872 signed_addend = (constant >> rotation) |
9873 (constant << (8 * sizeof (bfd_vma) - rotation));
9876 /* Determine if the instruction is an ADD or a SUB.
9877 (For REL, this determines the sign of the addend.) */
9878 negative = identify_add_or_sub (insn);
9881 (*_bfd_error_handler)
9882 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
9883 input_bfd, input_section,
9884 (long) rel->r_offset, howto->name);
9885 return bfd_reloc_overflow;
9888 signed_addend *= negative;
9891 /* Compute the value (X) to go in the place. */
9892 if (r_type == R_ARM_ALU_PC_G0_NC
9893 || r_type == R_ARM_ALU_PC_G1_NC
9894 || r_type == R_ARM_ALU_PC_G0
9895 || r_type == R_ARM_ALU_PC_G1
9896 || r_type == R_ARM_ALU_PC_G2)
9898 signed_value = value - pc + signed_addend;
9900 /* Section base relative. */
9901 signed_value = value - sb + signed_addend;
9903 /* If the target symbol is a Thumb function, then set the
9904 Thumb bit in the address. */
9905 if (branch_type == ST_BRANCH_TO_THUMB)
9908 /* Calculate the value of the relevant G_n, in encoded
9909 constant-with-rotation format. */
9910 g_n = calculate_group_reloc_mask (abs (signed_value), group,
9913 /* Check for overflow if required. */
9914 if ((r_type == R_ARM_ALU_PC_G0
9915 || r_type == R_ARM_ALU_PC_G1
9916 || r_type == R_ARM_ALU_PC_G2
9917 || r_type == R_ARM_ALU_SB_G0
9918 || r_type == R_ARM_ALU_SB_G1
9919 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
9921 (*_bfd_error_handler)
9922 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9923 input_bfd, input_section,
9924 (long) rel->r_offset, abs (signed_value), howto->name);
9925 return bfd_reloc_overflow;
9928 /* Mask out the value and the ADD/SUB part of the opcode; take care
9929 not to destroy the S bit. */
9932 /* Set the opcode according to whether the value to go in the
9933 place is negative. */
9934 if (signed_value < 0)
9939 /* Encode the offset. */
9942 bfd_put_32 (input_bfd, insn, hit_data);
9944 return bfd_reloc_ok;
9946 case R_ARM_LDR_PC_G0:
9947 case R_ARM_LDR_PC_G1:
9948 case R_ARM_LDR_PC_G2:
9949 case R_ARM_LDR_SB_G0:
9950 case R_ARM_LDR_SB_G1:
9951 case R_ARM_LDR_SB_G2:
9953 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9954 bfd_vma pc = input_section->output_section->vma
9955 + input_section->output_offset + rel->r_offset;
9956 bfd_vma sb = 0; /* See note above. */
9958 bfd_signed_vma signed_value;
9961 /* Determine which groups of bits to calculate. */
9964 case R_ARM_LDR_PC_G0:
9965 case R_ARM_LDR_SB_G0:
9969 case R_ARM_LDR_PC_G1:
9970 case R_ARM_LDR_SB_G1:
9974 case R_ARM_LDR_PC_G2:
9975 case R_ARM_LDR_SB_G2:
9983 /* If REL, extract the addend from the insn. If RELA, it will
9984 have already been fetched for us. */
9985 if (globals->use_rel)
9987 int negative = (insn & (1 << 23)) ? 1 : -1;
9988 signed_addend = negative * (insn & 0xfff);
9991 /* Compute the value (X) to go in the place. */
9992 if (r_type == R_ARM_LDR_PC_G0
9993 || r_type == R_ARM_LDR_PC_G1
9994 || r_type == R_ARM_LDR_PC_G2)
9996 signed_value = value - pc + signed_addend;
9998 /* Section base relative. */
9999 signed_value = value - sb + signed_addend;
10001 /* Calculate the value of the relevant G_{n-1} to obtain
10002 the residual at that stage. */
10003 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10005 /* Check for overflow. */
10006 if (residual >= 0x1000)
10008 (*_bfd_error_handler)
10009 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10010 input_bfd, input_section,
10011 (long) rel->r_offset, abs (signed_value), howto->name);
10012 return bfd_reloc_overflow;
10015 /* Mask out the value and U bit. */
10016 insn &= 0xff7ff000;
10018 /* Set the U bit if the value to go in the place is non-negative. */
10019 if (signed_value >= 0)
10022 /* Encode the offset. */
10025 bfd_put_32 (input_bfd, insn, hit_data);
10027 return bfd_reloc_ok;
10029 case R_ARM_LDRS_PC_G0:
10030 case R_ARM_LDRS_PC_G1:
10031 case R_ARM_LDRS_PC_G2:
10032 case R_ARM_LDRS_SB_G0:
10033 case R_ARM_LDRS_SB_G1:
10034 case R_ARM_LDRS_SB_G2:
10036 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10037 bfd_vma pc = input_section->output_section->vma
10038 + input_section->output_offset + rel->r_offset;
10039 bfd_vma sb = 0; /* See note above. */
10041 bfd_signed_vma signed_value;
10044 /* Determine which groups of bits to calculate. */
10047 case R_ARM_LDRS_PC_G0:
10048 case R_ARM_LDRS_SB_G0:
10052 case R_ARM_LDRS_PC_G1:
10053 case R_ARM_LDRS_SB_G1:
10057 case R_ARM_LDRS_PC_G2:
10058 case R_ARM_LDRS_SB_G2:
10066 /* If REL, extract the addend from the insn. If RELA, it will
10067 have already been fetched for us. */
10068 if (globals->use_rel)
10070 int negative = (insn & (1 << 23)) ? 1 : -1;
10071 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
10074 /* Compute the value (X) to go in the place. */
10075 if (r_type == R_ARM_LDRS_PC_G0
10076 || r_type == R_ARM_LDRS_PC_G1
10077 || r_type == R_ARM_LDRS_PC_G2)
10079 signed_value = value - pc + signed_addend;
10081 /* Section base relative. */
10082 signed_value = value - sb + signed_addend;
10084 /* Calculate the value of the relevant G_{n-1} to obtain
10085 the residual at that stage. */
10086 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10088 /* Check for overflow. */
10089 if (residual >= 0x100)
10091 (*_bfd_error_handler)
10092 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10093 input_bfd, input_section,
10094 (long) rel->r_offset, abs (signed_value), howto->name);
10095 return bfd_reloc_overflow;
10098 /* Mask out the value and U bit. */
10099 insn &= 0xff7ff0f0;
10101 /* Set the U bit if the value to go in the place is non-negative. */
10102 if (signed_value >= 0)
10105 /* Encode the offset. */
10106 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
10108 bfd_put_32 (input_bfd, insn, hit_data);
10110 return bfd_reloc_ok;
10112 case R_ARM_LDC_PC_G0:
10113 case R_ARM_LDC_PC_G1:
10114 case R_ARM_LDC_PC_G2:
10115 case R_ARM_LDC_SB_G0:
10116 case R_ARM_LDC_SB_G1:
10117 case R_ARM_LDC_SB_G2:
10119 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10120 bfd_vma pc = input_section->output_section->vma
10121 + input_section->output_offset + rel->r_offset;
10122 bfd_vma sb = 0; /* See note above. */
10124 bfd_signed_vma signed_value;
10127 /* Determine which groups of bits to calculate. */
10130 case R_ARM_LDC_PC_G0:
10131 case R_ARM_LDC_SB_G0:
10135 case R_ARM_LDC_PC_G1:
10136 case R_ARM_LDC_SB_G1:
10140 case R_ARM_LDC_PC_G2:
10141 case R_ARM_LDC_SB_G2:
10149 /* If REL, extract the addend from the insn. If RELA, it will
10150 have already been fetched for us. */
10151 if (globals->use_rel)
10153 int negative = (insn & (1 << 23)) ? 1 : -1;
10154 signed_addend = negative * ((insn & 0xff) << 2);
10157 /* Compute the value (X) to go in the place. */
10158 if (r_type == R_ARM_LDC_PC_G0
10159 || r_type == R_ARM_LDC_PC_G1
10160 || r_type == R_ARM_LDC_PC_G2)
10162 signed_value = value - pc + signed_addend;
10164 /* Section base relative. */
10165 signed_value = value - sb + signed_addend;
10167 /* Calculate the value of the relevant G_{n-1} to obtain
10168 the residual at that stage. */
10169 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10171 /* Check for overflow. (The absolute value to go in the place must be
10172 divisible by four and, after having been divided by four, must
10173 fit in eight bits.) */
10174 if ((residual & 0x3) != 0 || residual >= 0x400)
10176 (*_bfd_error_handler)
10177 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10178 input_bfd, input_section,
10179 (long) rel->r_offset, abs (signed_value), howto->name);
10180 return bfd_reloc_overflow;
10183 /* Mask out the value and U bit. */
10184 insn &= 0xff7fff00;
10186 /* Set the U bit if the value to go in the place is non-negative. */
10187 if (signed_value >= 0)
10190 /* Encode the offset. */
10191 insn |= residual >> 2;
10193 bfd_put_32 (input_bfd, insn, hit_data);
10195 return bfd_reloc_ok;
10198 return bfd_reloc_notsupported;
10202 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
10204 arm_add_to_rel (bfd * abfd,
10205 bfd_byte * address,
10206 reloc_howto_type * howto,
10207 bfd_signed_vma increment)
10209 bfd_signed_vma addend;
10211 if (howto->type == R_ARM_THM_CALL
10212 || howto->type == R_ARM_THM_JUMP24)
10214 int upper_insn, lower_insn;
10217 upper_insn = bfd_get_16 (abfd, address);
10218 lower_insn = bfd_get_16 (abfd, address + 2);
10219 upper = upper_insn & 0x7ff;
10220 lower = lower_insn & 0x7ff;
10222 addend = (upper << 12) | (lower << 1);
10223 addend += increment;
10226 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
10227 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
10229 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
10230 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
10236 contents = bfd_get_32 (abfd, address);
10238 /* Get the (signed) value from the instruction. */
10239 addend = contents & howto->src_mask;
10240 if (addend & ((howto->src_mask + 1) >> 1))
10242 bfd_signed_vma mask;
10245 mask &= ~ howto->src_mask;
10249 /* Add in the increment, (which is a byte value). */
10250 switch (howto->type)
10253 addend += increment;
10260 addend <<= howto->size;
10261 addend += increment;
10263 /* Should we check for overflow here ? */
10265 /* Drop any undesired bits. */
10266 addend >>= howto->rightshift;
10270 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
10272 bfd_put_32 (abfd, contents, address);
10276 #define IS_ARM_TLS_RELOC(R_TYPE) \
10277 ((R_TYPE) == R_ARM_TLS_GD32 \
10278 || (R_TYPE) == R_ARM_TLS_LDO32 \
10279 || (R_TYPE) == R_ARM_TLS_LDM32 \
10280 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
10281 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
10282 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
10283 || (R_TYPE) == R_ARM_TLS_LE32 \
10284 || (R_TYPE) == R_ARM_TLS_IE32 \
10285 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
10287 /* Specific set of relocations for the gnu tls dialect. */
10288 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
10289 ((R_TYPE) == R_ARM_TLS_GOTDESC \
10290 || (R_TYPE) == R_ARM_TLS_CALL \
10291 || (R_TYPE) == R_ARM_THM_TLS_CALL \
10292 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
10293 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
10295 /* Relocate an ARM ELF section. */
10298 elf32_arm_relocate_section (bfd * output_bfd,
10299 struct bfd_link_info * info,
10301 asection * input_section,
10302 bfd_byte * contents,
10303 Elf_Internal_Rela * relocs,
10304 Elf_Internal_Sym * local_syms,
10305 asection ** local_sections)
10307 Elf_Internal_Shdr *symtab_hdr;
10308 struct elf_link_hash_entry **sym_hashes;
10309 Elf_Internal_Rela *rel;
10310 Elf_Internal_Rela *relend;
10312 struct elf32_arm_link_hash_table * globals;
10314 globals = elf32_arm_hash_table (info);
10315 if (globals == NULL)
10318 symtab_hdr = & elf_symtab_hdr (input_bfd);
10319 sym_hashes = elf_sym_hashes (input_bfd);
10322 relend = relocs + input_section->reloc_count;
10323 for (; rel < relend; rel++)
10326 reloc_howto_type * howto;
10327 unsigned long r_symndx;
10328 Elf_Internal_Sym * sym;
10330 struct elf_link_hash_entry * h;
10331 bfd_vma relocation;
10332 bfd_reloc_status_type r;
10335 bfd_boolean unresolved_reloc = FALSE;
10336 char *error_message = NULL;
10338 r_symndx = ELF32_R_SYM (rel->r_info);
10339 r_type = ELF32_R_TYPE (rel->r_info);
10340 r_type = arm_real_reloc_type (globals, r_type);
10342 if ( r_type == R_ARM_GNU_VTENTRY
10343 || r_type == R_ARM_GNU_VTINHERIT)
10346 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
10347 howto = bfd_reloc.howto;
10353 if (r_symndx < symtab_hdr->sh_info)
10355 sym = local_syms + r_symndx;
10356 sym_type = ELF32_ST_TYPE (sym->st_info);
10357 sec = local_sections[r_symndx];
10359 /* An object file might have a reference to a local
10360 undefined symbol. This is a daft object file, but we
10361 should at least do something about it. V4BX & NONE
10362 relocations do not use the symbol and are explicitly
10363 allowed to use the undefined symbol, so allow those.
10364 Likewise for relocations against STN_UNDEF. */
10365 if (r_type != R_ARM_V4BX
10366 && r_type != R_ARM_NONE
10367 && r_symndx != STN_UNDEF
10368 && bfd_is_und_section (sec)
10369 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
10371 if (!info->callbacks->undefined_symbol
10372 (info, bfd_elf_string_from_elf_section
10373 (input_bfd, symtab_hdr->sh_link, sym->st_name),
10374 input_bfd, input_section,
10375 rel->r_offset, TRUE))
10379 if (globals->use_rel)
10381 relocation = (sec->output_section->vma
10382 + sec->output_offset
10384 if (!info->relocatable
10385 && (sec->flags & SEC_MERGE)
10386 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10389 bfd_vma addend, value;
10393 case R_ARM_MOVW_ABS_NC:
10394 case R_ARM_MOVT_ABS:
10395 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10396 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
10397 addend = (addend ^ 0x8000) - 0x8000;
10400 case R_ARM_THM_MOVW_ABS_NC:
10401 case R_ARM_THM_MOVT_ABS:
10402 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
10404 value |= bfd_get_16 (input_bfd,
10405 contents + rel->r_offset + 2);
10406 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
10407 | ((value & 0x04000000) >> 15);
10408 addend = (addend ^ 0x8000) - 0x8000;
10412 if (howto->rightshift
10413 || (howto->src_mask & (howto->src_mask + 1)))
10415 (*_bfd_error_handler)
10416 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
10417 input_bfd, input_section,
10418 (long) rel->r_offset, howto->name);
10422 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10424 /* Get the (signed) value from the instruction. */
10425 addend = value & howto->src_mask;
10426 if (addend & ((howto->src_mask + 1) >> 1))
10428 bfd_signed_vma mask;
10431 mask &= ~ howto->src_mask;
10439 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
10441 addend += msec->output_section->vma + msec->output_offset;
10443 /* Cases here must match those in the preceding
10444 switch statement. */
10447 case R_ARM_MOVW_ABS_NC:
10448 case R_ARM_MOVT_ABS:
10449 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
10450 | (addend & 0xfff);
10451 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10454 case R_ARM_THM_MOVW_ABS_NC:
10455 case R_ARM_THM_MOVT_ABS:
10456 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
10457 | (addend & 0xff) | ((addend & 0x0800) << 15);
10458 bfd_put_16 (input_bfd, value >> 16,
10459 contents + rel->r_offset);
10460 bfd_put_16 (input_bfd, value,
10461 contents + rel->r_offset + 2);
10465 value = (value & ~ howto->dst_mask)
10466 | (addend & howto->dst_mask);
10467 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10473 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
10477 bfd_boolean warned;
10479 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
10480 r_symndx, symtab_hdr, sym_hashes,
10481 h, sec, relocation,
10482 unresolved_reloc, warned);
10484 sym_type = h->type;
10487 if (sec != NULL && discarded_section (sec))
10488 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
10489 rel, 1, relend, howto, 0, contents);
10491 if (info->relocatable)
10493 /* This is a relocatable link. We don't have to change
10494 anything, unless the reloc is against a section symbol,
10495 in which case we have to adjust according to where the
10496 section symbol winds up in the output section. */
10497 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10499 if (globals->use_rel)
10500 arm_add_to_rel (input_bfd, contents + rel->r_offset,
10501 howto, (bfd_signed_vma) sec->output_offset);
10503 rel->r_addend += sec->output_offset;
10509 name = h->root.root.string;
10512 name = (bfd_elf_string_from_elf_section
10513 (input_bfd, symtab_hdr->sh_link, sym->st_name));
10514 if (name == NULL || *name == '\0')
10515 name = bfd_section_name (input_bfd, sec);
10518 if (r_symndx != STN_UNDEF
10519 && r_type != R_ARM_NONE
10521 || h->root.type == bfd_link_hash_defined
10522 || h->root.type == bfd_link_hash_defweak)
10523 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
10525 (*_bfd_error_handler)
10526 ((sym_type == STT_TLS
10527 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
10528 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
10531 (long) rel->r_offset,
10536 /* We call elf32_arm_final_link_relocate unless we're completely
10537 done, i.e., the relaxation produced the final output we want,
10538 and we won't let anybody mess with it. Also, we have to do
10539 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
10540 both in relaxed and non-relaxed cases */
10541 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
10542 || (IS_ARM_TLS_GNU_RELOC (r_type)
10543 && !((h ? elf32_arm_hash_entry (h)->tls_type :
10544 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
10547 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
10548 contents, rel, h == NULL);
10549 /* This may have been marked unresolved because it came from
10550 a shared library. But we've just dealt with that. */
10551 unresolved_reloc = 0;
10554 r = bfd_reloc_continue;
10556 if (r == bfd_reloc_continue)
10557 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
10558 input_section, contents, rel,
10559 relocation, info, sec, name, sym_type,
10560 (h ? h->target_internal
10561 : ARM_SYM_BRANCH_TYPE (sym)), h,
10562 &unresolved_reloc, &error_message);
10564 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
10565 because such sections are not SEC_ALLOC and thus ld.so will
10566 not process them. */
10567 if (unresolved_reloc
10568 && !((input_section->flags & SEC_DEBUGGING) != 0
10570 && _bfd_elf_section_offset (output_bfd, info, input_section,
10571 rel->r_offset) != (bfd_vma) -1)
10573 (*_bfd_error_handler)
10574 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
10577 (long) rel->r_offset,
10579 h->root.root.string);
10583 if (r != bfd_reloc_ok)
10587 case bfd_reloc_overflow:
10588 /* If the overflowing reloc was to an undefined symbol,
10589 we have already printed one error message and there
10590 is no point complaining again. */
10592 h->root.type != bfd_link_hash_undefined)
10593 && (!((*info->callbacks->reloc_overflow)
10594 (info, (h ? &h->root : NULL), name, howto->name,
10595 (bfd_vma) 0, input_bfd, input_section,
10600 case bfd_reloc_undefined:
10601 if (!((*info->callbacks->undefined_symbol)
10602 (info, name, input_bfd, input_section,
10603 rel->r_offset, TRUE)))
10607 case bfd_reloc_outofrange:
10608 error_message = _("out of range");
10611 case bfd_reloc_notsupported:
10612 error_message = _("unsupported relocation");
10615 case bfd_reloc_dangerous:
10616 /* error_message should already be set. */
10620 error_message = _("unknown error");
10621 /* Fall through. */
10624 BFD_ASSERT (error_message != NULL);
10625 if (!((*info->callbacks->reloc_dangerous)
10626 (info, error_message, input_bfd, input_section,
10637 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
10638 adds the edit to the start of the list. (The list must be built in order of
10639 ascending TINDEX: the function's callers are primarily responsible for
10640 maintaining that condition). */
10643 add_unwind_table_edit (arm_unwind_table_edit **head,
10644 arm_unwind_table_edit **tail,
10645 arm_unwind_edit_type type,
10646 asection *linked_section,
10647 unsigned int tindex)
10649 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
10650 xmalloc (sizeof (arm_unwind_table_edit));
10652 new_edit->type = type;
10653 new_edit->linked_section = linked_section;
10654 new_edit->index = tindex;
10658 new_edit->next = NULL;
10661 (*tail)->next = new_edit;
10663 (*tail) = new_edit;
10666 (*head) = new_edit;
10670 new_edit->next = *head;
10679 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
10681 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
10683 adjust_exidx_size(asection *exidx_sec, int adjust)
10687 if (!exidx_sec->rawsize)
10688 exidx_sec->rawsize = exidx_sec->size;
10690 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
10691 out_sec = exidx_sec->output_section;
10692 /* Adjust size of output section. */
10693 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
10696 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
10698 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
10700 struct _arm_elf_section_data *exidx_arm_data;
10702 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10703 add_unwind_table_edit (
10704 &exidx_arm_data->u.exidx.unwind_edit_list,
10705 &exidx_arm_data->u.exidx.unwind_edit_tail,
10706 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
10708 adjust_exidx_size(exidx_sec, 8);
10711 /* Scan .ARM.exidx tables, and create a list describing edits which should be
10712 made to those tables, such that:
10714 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
10715 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
10716 codes which have been inlined into the index).
10718 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
10720 The edits are applied when the tables are written
10721 (in elf32_arm_write_section). */
10724 elf32_arm_fix_exidx_coverage (asection **text_section_order,
10725 unsigned int num_text_sections,
10726 struct bfd_link_info *info,
10727 bfd_boolean merge_exidx_entries)
10730 unsigned int last_second_word = 0, i;
10731 asection *last_exidx_sec = NULL;
10732 asection *last_text_sec = NULL;
10733 int last_unwind_type = -1;
10735 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
10737 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
10741 for (sec = inp->sections; sec != NULL; sec = sec->next)
10743 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
10744 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
10746 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
10749 if (elf_sec->linked_to)
10751 Elf_Internal_Shdr *linked_hdr
10752 = &elf_section_data (elf_sec->linked_to)->this_hdr;
10753 struct _arm_elf_section_data *linked_sec_arm_data
10754 = get_arm_elf_section_data (linked_hdr->bfd_section);
10756 if (linked_sec_arm_data == NULL)
10759 /* Link this .ARM.exidx section back from the text section it
10761 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
10766 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
10767 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
10768 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
10770 for (i = 0; i < num_text_sections; i++)
10772 asection *sec = text_section_order[i];
10773 asection *exidx_sec;
10774 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
10775 struct _arm_elf_section_data *exidx_arm_data;
10776 bfd_byte *contents = NULL;
10777 int deleted_exidx_bytes = 0;
10779 arm_unwind_table_edit *unwind_edit_head = NULL;
10780 arm_unwind_table_edit *unwind_edit_tail = NULL;
10781 Elf_Internal_Shdr *hdr;
10784 if (arm_data == NULL)
10787 exidx_sec = arm_data->u.text.arm_exidx_sec;
10788 if (exidx_sec == NULL)
10790 /* Section has no unwind data. */
10791 if (last_unwind_type == 0 || !last_exidx_sec)
10794 /* Ignore zero sized sections. */
10795 if (sec->size == 0)
10798 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10799 last_unwind_type = 0;
10803 /* Skip /DISCARD/ sections. */
10804 if (bfd_is_abs_section (exidx_sec->output_section))
10807 hdr = &elf_section_data (exidx_sec)->this_hdr;
10808 if (hdr->sh_type != SHT_ARM_EXIDX)
10811 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10812 if (exidx_arm_data == NULL)
10815 ibfd = exidx_sec->owner;
10817 if (hdr->contents != NULL)
10818 contents = hdr->contents;
10819 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
10823 for (j = 0; j < hdr->sh_size; j += 8)
10825 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
10829 /* An EXIDX_CANTUNWIND entry. */
10830 if (second_word == 1)
10832 if (last_unwind_type == 0)
10836 /* Inlined unwinding data. Merge if equal to previous. */
10837 else if ((second_word & 0x80000000) != 0)
10839 if (merge_exidx_entries
10840 && last_second_word == second_word && last_unwind_type == 1)
10843 last_second_word = second_word;
10845 /* Normal table entry. In theory we could merge these too,
10846 but duplicate entries are likely to be much less common. */
10852 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
10853 DELETE_EXIDX_ENTRY, NULL, j / 8);
10855 deleted_exidx_bytes += 8;
10858 last_unwind_type = unwind_type;
10861 /* Free contents if we allocated it ourselves. */
10862 if (contents != hdr->contents)
10865 /* Record edits to be applied later (in elf32_arm_write_section). */
10866 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
10867 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
10869 if (deleted_exidx_bytes > 0)
10870 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
10872 last_exidx_sec = exidx_sec;
10873 last_text_sec = sec;
10876 /* Add terminating CANTUNWIND entry. */
10877 if (last_exidx_sec && last_unwind_type != 0)
10878 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10884 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
10885 bfd *ibfd, const char *name)
10887 asection *sec, *osec;
10889 sec = bfd_get_linker_section (ibfd, name);
10890 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
10893 osec = sec->output_section;
10894 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
10897 if (! bfd_set_section_contents (obfd, osec, sec->contents,
10898 sec->output_offset, sec->size))
10905 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
10907 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
10908 asection *sec, *osec;
10910 if (globals == NULL)
10913 /* Invoke the regular ELF backend linker to do all the work. */
10914 if (!bfd_elf_final_link (abfd, info))
10917 /* Process stub sections (eg BE8 encoding, ...). */
10918 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
10920 for (i=0; i<htab->top_id; i++)
10922 sec = htab->stub_group[i].stub_sec;
10923 /* Only process it once, in its link_sec slot. */
10924 if (sec && i == htab->stub_group[i].link_sec->id)
10926 osec = sec->output_section;
10927 elf32_arm_write_section (abfd, info, sec, sec->contents);
10928 if (! bfd_set_section_contents (abfd, osec, sec->contents,
10929 sec->output_offset, sec->size))
10934 /* Write out any glue sections now that we have created all the
10936 if (globals->bfd_of_glue_owner != NULL)
10938 if (! elf32_arm_output_glue_section (info, abfd,
10939 globals->bfd_of_glue_owner,
10940 ARM2THUMB_GLUE_SECTION_NAME))
10943 if (! elf32_arm_output_glue_section (info, abfd,
10944 globals->bfd_of_glue_owner,
10945 THUMB2ARM_GLUE_SECTION_NAME))
10948 if (! elf32_arm_output_glue_section (info, abfd,
10949 globals->bfd_of_glue_owner,
10950 VFP11_ERRATUM_VENEER_SECTION_NAME))
10953 if (! elf32_arm_output_glue_section (info, abfd,
10954 globals->bfd_of_glue_owner,
10955 ARM_BX_GLUE_SECTION_NAME))
10962 /* Return a best guess for the machine number based on the attributes. */
10964 static unsigned int
10965 bfd_arm_get_mach_from_attributes (bfd * abfd)
10967 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
10971 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
10972 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
10973 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
10975 case TAG_CPU_ARCH_V5TE:
10979 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
10980 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
10984 if (strcmp (name, "IWMMXT2") == 0)
10985 return bfd_mach_arm_iWMMXt2;
10987 if (strcmp (name, "IWMMXT") == 0)
10988 return bfd_mach_arm_iWMMXt;
10991 return bfd_mach_arm_5TE;
10995 return bfd_mach_arm_unknown;
10999 /* Set the right machine number. */
11002 elf32_arm_object_p (bfd *abfd)
11006 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
11008 if (mach == bfd_mach_arm_unknown)
11010 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
11011 mach = bfd_mach_arm_ep9312;
11013 mach = bfd_arm_get_mach_from_attributes (abfd);
11016 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
11020 /* Function to keep ARM specific flags in the ELF header. */
11023 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
11025 if (elf_flags_init (abfd)
11026 && elf_elfheader (abfd)->e_flags != flags)
11028 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
11030 if (flags & EF_ARM_INTERWORK)
11031 (*_bfd_error_handler)
11032 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
11036 (_("Warning: Clearing the interworking flag of %B due to outside request"),
11042 elf_elfheader (abfd)->e_flags = flags;
11043 elf_flags_init (abfd) = TRUE;
11049 /* Copy backend specific data from one object module to another. */
11052 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
11055 flagword out_flags;
11057 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
11060 in_flags = elf_elfheader (ibfd)->e_flags;
11061 out_flags = elf_elfheader (obfd)->e_flags;
11063 if (elf_flags_init (obfd)
11064 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
11065 && in_flags != out_flags)
11067 /* Cannot mix APCS26 and APCS32 code. */
11068 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
11071 /* Cannot mix float APCS and non-float APCS code. */
11072 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
11075 /* If the src and dest have different interworking flags
11076 then turn off the interworking bit. */
11077 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
11079 if (out_flags & EF_ARM_INTERWORK)
11081 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
11084 in_flags &= ~EF_ARM_INTERWORK;
11087 /* Likewise for PIC, though don't warn for this case. */
11088 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
11089 in_flags &= ~EF_ARM_PIC;
11092 elf_elfheader (obfd)->e_flags = in_flags;
11093 elf_flags_init (obfd) = TRUE;
11095 /* Also copy the EI_OSABI field. */
11096 elf_elfheader (obfd)->e_ident[EI_OSABI] =
11097 elf_elfheader (ibfd)->e_ident[EI_OSABI];
11099 /* Copy object attributes. */
11100 _bfd_elf_copy_obj_attributes (ibfd, obfd);
11105 /* Values for Tag_ABI_PCS_R9_use. */
11114 /* Values for Tag_ABI_PCS_RW_data. */
11117 AEABI_PCS_RW_data_absolute,
11118 AEABI_PCS_RW_data_PCrel,
11119 AEABI_PCS_RW_data_SBrel,
11120 AEABI_PCS_RW_data_unused
11123 /* Values for Tag_ABI_enum_size. */
11129 AEABI_enum_forced_wide
11132 /* Determine whether an object attribute tag takes an integer, a
11136 elf32_arm_obj_attrs_arg_type (int tag)
11138 if (tag == Tag_compatibility)
11139 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
11140 else if (tag == Tag_nodefaults)
11141 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
11142 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
11143 return ATTR_TYPE_FLAG_STR_VAL;
11145 return ATTR_TYPE_FLAG_INT_VAL;
11147 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
11150 /* The ABI defines that Tag_conformance should be emitted first, and that
11151 Tag_nodefaults should be second (if either is defined). This sets those
11152 two positions, and bumps up the position of all the remaining tags to
11155 elf32_arm_obj_attrs_order (int num)
11157 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
11158 return Tag_conformance;
11159 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
11160 return Tag_nodefaults;
11161 if ((num - 2) < Tag_nodefaults)
11163 if ((num - 1) < Tag_conformance)
11168 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
11170 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
11172 if ((tag & 127) < 64)
11175 (_("%B: Unknown mandatory EABI object attribute %d"),
11177 bfd_set_error (bfd_error_bad_value);
11183 (_("Warning: %B: Unknown EABI object attribute %d"),
11189 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
11190 Returns -1 if no architecture could be read. */
11193 get_secondary_compatible_arch (bfd *abfd)
11195 obj_attribute *attr =
11196 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11198 /* Note: the tag and its argument below are uleb128 values, though
11199 currently-defined values fit in one byte for each. */
11201 && attr->s[0] == Tag_CPU_arch
11202 && (attr->s[1] & 128) != 128
11203 && attr->s[2] == 0)
11206 /* This tag is "safely ignorable", so don't complain if it looks funny. */
11210 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
11211 The tag is removed if ARCH is -1. */
11214 set_secondary_compatible_arch (bfd *abfd, int arch)
11216 obj_attribute *attr =
11217 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11225 /* Note: the tag and its argument below are uleb128 values, though
11226 currently-defined values fit in one byte for each. */
11228 attr->s = (char *) bfd_alloc (abfd, 3);
11229 attr->s[0] = Tag_CPU_arch;
11234 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
11238 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
11239 int newtag, int secondary_compat)
11241 #define T(X) TAG_CPU_ARCH_##X
11242 int tagl, tagh, result;
11245 T(V6T2), /* PRE_V4. */
11247 T(V6T2), /* V4T. */
11248 T(V6T2), /* V5T. */
11249 T(V6T2), /* V5TE. */
11250 T(V6T2), /* V5TEJ. */
11253 T(V6T2) /* V6T2. */
11257 T(V6K), /* PRE_V4. */
11261 T(V6K), /* V5TE. */
11262 T(V6K), /* V5TEJ. */
11264 T(V6KZ), /* V6KZ. */
11270 T(V7), /* PRE_V4. */
11275 T(V7), /* V5TEJ. */
11288 T(V6K), /* V5TE. */
11289 T(V6K), /* V5TEJ. */
11291 T(V6KZ), /* V6KZ. */
11295 T(V6_M) /* V6_M. */
11297 const int v6s_m[] =
11303 T(V6K), /* V5TE. */
11304 T(V6K), /* V5TEJ. */
11306 T(V6KZ), /* V6KZ. */
11310 T(V6S_M), /* V6_M. */
11311 T(V6S_M) /* V6S_M. */
11313 const int v7e_m[] =
11317 T(V7E_M), /* V4T. */
11318 T(V7E_M), /* V5T. */
11319 T(V7E_M), /* V5TE. */
11320 T(V7E_M), /* V5TEJ. */
11321 T(V7E_M), /* V6. */
11322 T(V7E_M), /* V6KZ. */
11323 T(V7E_M), /* V6T2. */
11324 T(V7E_M), /* V6K. */
11325 T(V7E_M), /* V7. */
11326 T(V7E_M), /* V6_M. */
11327 T(V7E_M), /* V6S_M. */
11328 T(V7E_M) /* V7E_M. */
11330 const int v4t_plus_v6_m[] =
11336 T(V5TE), /* V5TE. */
11337 T(V5TEJ), /* V5TEJ. */
11339 T(V6KZ), /* V6KZ. */
11340 T(V6T2), /* V6T2. */
11343 T(V6_M), /* V6_M. */
11344 T(V6S_M), /* V6S_M. */
11345 T(V7E_M), /* V7E_M. */
11346 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
11348 const int *comb[] =
11356 /* Pseudo-architecture. */
11360 /* Check we've not got a higher architecture than we know about. */
11362 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
11364 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
11368 /* Override old tag if we have a Tag_also_compatible_with on the output. */
11370 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
11371 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
11372 oldtag = T(V4T_PLUS_V6_M);
11374 /* And override the new tag if we have a Tag_also_compatible_with on the
11377 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
11378 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
11379 newtag = T(V4T_PLUS_V6_M);
11381 tagl = (oldtag < newtag) ? oldtag : newtag;
11382 result = tagh = (oldtag > newtag) ? oldtag : newtag;
11384 /* Architectures before V6KZ add features monotonically. */
11385 if (tagh <= TAG_CPU_ARCH_V6KZ)
11388 result = comb[tagh - T(V6T2)][tagl];
11390 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
11391 as the canonical version. */
11392 if (result == T(V4T_PLUS_V6_M))
11395 *secondary_compat_out = T(V6_M);
11398 *secondary_compat_out = -1;
11402 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
11403 ibfd, oldtag, newtag);
11411 /* Query attributes object to see if integer divide instructions may be
11412 present in an object. */
11414 elf32_arm_attributes_accept_div (const obj_attribute *attr)
11416 int arch = attr[Tag_CPU_arch].i;
11417 int profile = attr[Tag_CPU_arch_profile].i;
11419 switch (attr[Tag_DIV_use].i)
11422 /* Integer divide allowed if instruction contained in archetecture. */
11423 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
11425 else if (arch >= TAG_CPU_ARCH_V7E_M)
11431 /* Integer divide explicitly prohibited. */
11435 /* Unrecognised case - treat as allowing divide everywhere. */
11437 /* Integer divide allowed in ARM state. */
11442 /* Query attributes object to see if integer divide instructions are
11443 forbidden to be in the object. This is not the inverse of
11444 elf32_arm_attributes_accept_div. */
11446 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
11448 return attr[Tag_DIV_use].i == 1;
11451 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
11452 are conflicting attributes. */
11455 elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
11457 obj_attribute *in_attr;
11458 obj_attribute *out_attr;
11459 /* Some tags have 0 = don't care, 1 = strong requirement,
11460 2 = weak requirement. */
11461 static const int order_021[3] = {0, 2, 1};
11463 bfd_boolean result = TRUE;
11465 /* Skip the linker stubs file. This preserves previous behavior
11466 of accepting unknown attributes in the first input file - but
11468 if (ibfd->flags & BFD_LINKER_CREATED)
11471 if (!elf_known_obj_attributes_proc (obfd)[0].i)
11473 /* This is the first object. Copy the attributes. */
11474 _bfd_elf_copy_obj_attributes (ibfd, obfd);
11476 out_attr = elf_known_obj_attributes_proc (obfd);
11478 /* Use the Tag_null value to indicate the attributes have been
11482 /* We do not output objects with Tag_MPextension_use_legacy - we move
11483 the attribute's value to Tag_MPextension_use. */
11484 if (out_attr[Tag_MPextension_use_legacy].i != 0)
11486 if (out_attr[Tag_MPextension_use].i != 0
11487 && out_attr[Tag_MPextension_use_legacy].i
11488 != out_attr[Tag_MPextension_use].i)
11491 (_("Error: %B has both the current and legacy "
11492 "Tag_MPextension_use attributes"), ibfd);
11496 out_attr[Tag_MPextension_use] =
11497 out_attr[Tag_MPextension_use_legacy];
11498 out_attr[Tag_MPextension_use_legacy].type = 0;
11499 out_attr[Tag_MPextension_use_legacy].i = 0;
11505 in_attr = elf_known_obj_attributes_proc (ibfd);
11506 out_attr = elf_known_obj_attributes_proc (obfd);
11507 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
11508 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
11510 /* Ignore mismatches if the object doesn't use floating point. */
11511 if (out_attr[Tag_ABI_FP_number_model].i == 0)
11512 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
11513 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
11516 (_("error: %B uses VFP register arguments, %B does not"),
11517 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
11518 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
11523 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
11525 /* Merge this attribute with existing attributes. */
11528 case Tag_CPU_raw_name:
11530 /* These are merged after Tag_CPU_arch. */
11533 case Tag_ABI_optimization_goals:
11534 case Tag_ABI_FP_optimization_goals:
11535 /* Use the first value seen. */
11540 int secondary_compat = -1, secondary_compat_out = -1;
11541 unsigned int saved_out_attr = out_attr[i].i;
11542 static const char *name_table[] = {
11543 /* These aren't real CPU names, but we can't guess
11544 that from the architecture version alone. */
11560 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
11561 secondary_compat = get_secondary_compatible_arch (ibfd);
11562 secondary_compat_out = get_secondary_compatible_arch (obfd);
11563 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
11564 &secondary_compat_out,
11567 set_secondary_compatible_arch (obfd, secondary_compat_out);
11569 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
11570 if (out_attr[i].i == saved_out_attr)
11571 ; /* Leave the names alone. */
11572 else if (out_attr[i].i == in_attr[i].i)
11574 /* The output architecture has been changed to match the
11575 input architecture. Use the input names. */
11576 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
11577 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
11579 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
11580 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
11585 out_attr[Tag_CPU_name].s = NULL;
11586 out_attr[Tag_CPU_raw_name].s = NULL;
11589 /* If we still don't have a value for Tag_CPU_name,
11590 make one up now. Tag_CPU_raw_name remains blank. */
11591 if (out_attr[Tag_CPU_name].s == NULL
11592 && out_attr[i].i < ARRAY_SIZE (name_table))
11593 out_attr[Tag_CPU_name].s =
11594 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
11598 case Tag_ARM_ISA_use:
11599 case Tag_THUMB_ISA_use:
11600 case Tag_WMMX_arch:
11601 case Tag_Advanced_SIMD_arch:
11602 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
11603 case Tag_ABI_FP_rounding:
11604 case Tag_ABI_FP_exceptions:
11605 case Tag_ABI_FP_user_exceptions:
11606 case Tag_ABI_FP_number_model:
11607 case Tag_FP_HP_extension:
11608 case Tag_CPU_unaligned_access:
11610 case Tag_MPextension_use:
11611 /* Use the largest value specified. */
11612 if (in_attr[i].i > out_attr[i].i)
11613 out_attr[i].i = in_attr[i].i;
11616 case Tag_ABI_align_preserved:
11617 case Tag_ABI_PCS_RO_data:
11618 /* Use the smallest value specified. */
11619 if (in_attr[i].i < out_attr[i].i)
11620 out_attr[i].i = in_attr[i].i;
11623 case Tag_ABI_align_needed:
11624 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
11625 && (in_attr[Tag_ABI_align_preserved].i == 0
11626 || out_attr[Tag_ABI_align_preserved].i == 0))
11628 /* This error message should be enabled once all non-conformant
11629 binaries in the toolchain have had the attributes set
11632 (_("error: %B: 8-byte data alignment conflicts with %B"),
11636 /* Fall through. */
11637 case Tag_ABI_FP_denormal:
11638 case Tag_ABI_PCS_GOT_use:
11639 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
11640 value if greater than 2 (for future-proofing). */
11641 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
11642 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
11643 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
11644 out_attr[i].i = in_attr[i].i;
11647 case Tag_Virtualization_use:
11648 /* The virtualization tag effectively stores two bits of
11649 information: the intended use of TrustZone (in bit 0), and the
11650 intended use of Virtualization (in bit 1). */
11651 if (out_attr[i].i == 0)
11652 out_attr[i].i = in_attr[i].i;
11653 else if (in_attr[i].i != 0
11654 && in_attr[i].i != out_attr[i].i)
11656 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
11661 (_("error: %B: unable to merge virtualization attributes "
11669 case Tag_CPU_arch_profile:
11670 if (out_attr[i].i != in_attr[i].i)
11672 /* 0 will merge with anything.
11673 'A' and 'S' merge to 'A'.
11674 'R' and 'S' merge to 'R'.
11675 'M' and 'A|R|S' is an error. */
11676 if (out_attr[i].i == 0
11677 || (out_attr[i].i == 'S'
11678 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
11679 out_attr[i].i = in_attr[i].i;
11680 else if (in_attr[i].i == 0
11681 || (in_attr[i].i == 'S'
11682 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
11683 ; /* Do nothing. */
11687 (_("error: %B: Conflicting architecture profiles %c/%c"),
11689 in_attr[i].i ? in_attr[i].i : '0',
11690 out_attr[i].i ? out_attr[i].i : '0');
11697 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
11698 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
11699 when it's 0. It might mean absence of FP hardware if
11700 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
11702 static const struct
11706 } vfp_versions[7] =
11720 /* If the output has no requirement about FP hardware,
11721 follow the requirement of the input. */
11722 if (out_attr[i].i == 0)
11724 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
11725 out_attr[i].i = in_attr[i].i;
11726 out_attr[Tag_ABI_HardFP_use].i
11727 = in_attr[Tag_ABI_HardFP_use].i;
11730 /* If the input has no requirement about FP hardware, do
11732 else if (in_attr[i].i == 0)
11734 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
11738 /* Both the input and the output have nonzero Tag_FP_arch.
11739 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
11741 /* If both the input and the output have zero Tag_ABI_HardFP_use,
11743 if (in_attr[Tag_ABI_HardFP_use].i == 0
11744 && out_attr[Tag_ABI_HardFP_use].i == 0)
11746 /* If the input and the output have different Tag_ABI_HardFP_use,
11747 the combination of them is 3 (SP & DP). */
11748 else if (in_attr[Tag_ABI_HardFP_use].i
11749 != out_attr[Tag_ABI_HardFP_use].i)
11750 out_attr[Tag_ABI_HardFP_use].i = 3;
11752 /* Now we can handle Tag_FP_arch. */
11754 /* Values greater than 6 aren't defined, so just pick the
11756 if (in_attr[i].i > 6 && in_attr[i].i > out_attr[i].i)
11758 out_attr[i] = in_attr[i];
11761 /* The output uses the superset of input features
11762 (ISA version) and registers. */
11763 ver = vfp_versions[in_attr[i].i].ver;
11764 if (ver < vfp_versions[out_attr[i].i].ver)
11765 ver = vfp_versions[out_attr[i].i].ver;
11766 regs = vfp_versions[in_attr[i].i].regs;
11767 if (regs < vfp_versions[out_attr[i].i].regs)
11768 regs = vfp_versions[out_attr[i].i].regs;
11769 /* This assumes all possible supersets are also a valid
11771 for (newval = 6; newval > 0; newval--)
11773 if (regs == vfp_versions[newval].regs
11774 && ver == vfp_versions[newval].ver)
11777 out_attr[i].i = newval;
11780 case Tag_PCS_config:
11781 if (out_attr[i].i == 0)
11782 out_attr[i].i = in_attr[i].i;
11783 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
11785 /* It's sometimes ok to mix different configs, so this is only
11788 (_("Warning: %B: Conflicting platform configuration"), ibfd);
11791 case Tag_ABI_PCS_R9_use:
11792 if (in_attr[i].i != out_attr[i].i
11793 && out_attr[i].i != AEABI_R9_unused
11794 && in_attr[i].i != AEABI_R9_unused)
11797 (_("error: %B: Conflicting use of R9"), ibfd);
11800 if (out_attr[i].i == AEABI_R9_unused)
11801 out_attr[i].i = in_attr[i].i;
11803 case Tag_ABI_PCS_RW_data:
11804 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
11805 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
11806 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
11809 (_("error: %B: SB relative addressing conflicts with use of R9"),
11813 /* Use the smallest value specified. */
11814 if (in_attr[i].i < out_attr[i].i)
11815 out_attr[i].i = in_attr[i].i;
11817 case Tag_ABI_PCS_wchar_t:
11818 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
11819 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
11822 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
11823 ibfd, in_attr[i].i, out_attr[i].i);
11825 else if (in_attr[i].i && !out_attr[i].i)
11826 out_attr[i].i = in_attr[i].i;
11828 case Tag_ABI_enum_size:
11829 if (in_attr[i].i != AEABI_enum_unused)
11831 if (out_attr[i].i == AEABI_enum_unused
11832 || out_attr[i].i == AEABI_enum_forced_wide)
11834 /* The existing object is compatible with anything.
11835 Use whatever requirements the new object has. */
11836 out_attr[i].i = in_attr[i].i;
11838 else if (in_attr[i].i != AEABI_enum_forced_wide
11839 && out_attr[i].i != in_attr[i].i
11840 && !elf_arm_tdata (obfd)->no_enum_size_warning)
11842 static const char *aeabi_enum_names[] =
11843 { "", "variable-size", "32-bit", "" };
11844 const char *in_name =
11845 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11846 ? aeabi_enum_names[in_attr[i].i]
11848 const char *out_name =
11849 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11850 ? aeabi_enum_names[out_attr[i].i]
11853 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
11854 ibfd, in_name, out_name);
11858 case Tag_ABI_VFP_args:
11861 case Tag_ABI_WMMX_args:
11862 if (in_attr[i].i != out_attr[i].i)
11865 (_("error: %B uses iWMMXt register arguments, %B does not"),
11870 case Tag_compatibility:
11871 /* Merged in target-independent code. */
11873 case Tag_ABI_HardFP_use:
11874 /* This is handled along with Tag_FP_arch. */
11876 case Tag_ABI_FP_16bit_format:
11877 if (in_attr[i].i != 0 && out_attr[i].i != 0)
11879 if (in_attr[i].i != out_attr[i].i)
11882 (_("error: fp16 format mismatch between %B and %B"),
11887 if (in_attr[i].i != 0)
11888 out_attr[i].i = in_attr[i].i;
11892 /* A value of zero on input means that the divide instruction may
11893 be used if available in the base architecture as specified via
11894 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
11895 the user did not want divide instructions. A value of 2
11896 explicitly means that divide instructions were allowed in ARM
11897 and Thumb state. */
11898 if (in_attr[i].i == out_attr[i].i)
11899 /* Do nothing. */ ;
11900 else if (elf32_arm_attributes_forbid_div (in_attr)
11901 && !elf32_arm_attributes_accept_div (out_attr))
11903 else if (elf32_arm_attributes_forbid_div (out_attr)
11904 && elf32_arm_attributes_accept_div (in_attr))
11905 out_attr[i].i = in_attr[i].i;
11906 else if (in_attr[i].i == 2)
11907 out_attr[i].i = in_attr[i].i;
11910 case Tag_MPextension_use_legacy:
11911 /* We don't output objects with Tag_MPextension_use_legacy - we
11912 move the value to Tag_MPextension_use. */
11913 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
11915 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
11918 (_("%B has has both the current and legacy "
11919 "Tag_MPextension_use attributes"),
11925 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
11926 out_attr[Tag_MPextension_use] = in_attr[i];
11930 case Tag_nodefaults:
11931 /* This tag is set if it exists, but the value is unused (and is
11932 typically zero). We don't actually need to do anything here -
11933 the merge happens automatically when the type flags are merged
11936 case Tag_also_compatible_with:
11937 /* Already done in Tag_CPU_arch. */
11939 case Tag_conformance:
11940 /* Keep the attribute if it matches. Throw it away otherwise.
11941 No attribute means no claim to conform. */
11942 if (!in_attr[i].s || !out_attr[i].s
11943 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
11944 out_attr[i].s = NULL;
11949 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
11952 /* If out_attr was copied from in_attr then it won't have a type yet. */
11953 if (in_attr[i].type && !out_attr[i].type)
11954 out_attr[i].type = in_attr[i].type;
11957 /* Merge Tag_compatibility attributes and any common GNU ones. */
11958 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
11961 /* Check for any attributes not known on ARM. */
11962 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
11968 /* Return TRUE if the two EABI versions are incompatible. */
11971 elf32_arm_versions_compatible (unsigned iver, unsigned over)
11973 /* v4 and v5 are the same spec before and after it was released,
11974 so allow mixing them. */
11975 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
11976 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
11979 return (iver == over);
11982 /* Merge backend specific data from an object file to the output
11983 object file when linking. */
11986 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
11988 /* Display the flags field. */
11991 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
11993 FILE * file = (FILE *) ptr;
11994 unsigned long flags;
11996 BFD_ASSERT (abfd != NULL && ptr != NULL);
11998 /* Print normal ELF private data. */
11999 _bfd_elf_print_private_bfd_data (abfd, ptr);
12001 flags = elf_elfheader (abfd)->e_flags;
12002 /* Ignore init flag - it may not be set, despite the flags field
12003 containing valid data. */
12005 /* xgettext:c-format */
12006 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
12008 switch (EF_ARM_EABI_VERSION (flags))
12010 case EF_ARM_EABI_UNKNOWN:
12011 /* The following flag bits are GNU extensions and not part of the
12012 official ARM ELF extended ABI. Hence they are only decoded if
12013 the EABI version is not set. */
12014 if (flags & EF_ARM_INTERWORK)
12015 fprintf (file, _(" [interworking enabled]"));
12017 if (flags & EF_ARM_APCS_26)
12018 fprintf (file, " [APCS-26]");
12020 fprintf (file, " [APCS-32]");
12022 if (flags & EF_ARM_VFP_FLOAT)
12023 fprintf (file, _(" [VFP float format]"));
12024 else if (flags & EF_ARM_MAVERICK_FLOAT)
12025 fprintf (file, _(" [Maverick float format]"));
12027 fprintf (file, _(" [FPA float format]"));
12029 if (flags & EF_ARM_APCS_FLOAT)
12030 fprintf (file, _(" [floats passed in float registers]"));
12032 if (flags & EF_ARM_PIC)
12033 fprintf (file, _(" [position independent]"));
12035 if (flags & EF_ARM_NEW_ABI)
12036 fprintf (file, _(" [new ABI]"));
12038 if (flags & EF_ARM_OLD_ABI)
12039 fprintf (file, _(" [old ABI]"));
12041 if (flags & EF_ARM_SOFT_FLOAT)
12042 fprintf (file, _(" [software FP]"));
12044 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
12045 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
12046 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
12047 | EF_ARM_MAVERICK_FLOAT);
12050 case EF_ARM_EABI_VER1:
12051 fprintf (file, _(" [Version1 EABI]"));
12053 if (flags & EF_ARM_SYMSARESORTED)
12054 fprintf (file, _(" [sorted symbol table]"));
12056 fprintf (file, _(" [unsorted symbol table]"));
12058 flags &= ~ EF_ARM_SYMSARESORTED;
12061 case EF_ARM_EABI_VER2:
12062 fprintf (file, _(" [Version2 EABI]"));
12064 if (flags & EF_ARM_SYMSARESORTED)
12065 fprintf (file, _(" [sorted symbol table]"));
12067 fprintf (file, _(" [unsorted symbol table]"));
12069 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
12070 fprintf (file, _(" [dynamic symbols use segment index]"));
12072 if (flags & EF_ARM_MAPSYMSFIRST)
12073 fprintf (file, _(" [mapping symbols precede others]"));
12075 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
12076 | EF_ARM_MAPSYMSFIRST);
12079 case EF_ARM_EABI_VER3:
12080 fprintf (file, _(" [Version3 EABI]"));
12083 case EF_ARM_EABI_VER4:
12084 fprintf (file, _(" [Version4 EABI]"));
12087 case EF_ARM_EABI_VER5:
12088 fprintf (file, _(" [Version5 EABI]"));
12090 if (flags & EF_ARM_BE8)
12091 fprintf (file, _(" [BE8]"));
12093 if (flags & EF_ARM_LE8)
12094 fprintf (file, _(" [LE8]"));
12096 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
12100 fprintf (file, _(" <EABI version unrecognised>"));
12104 flags &= ~ EF_ARM_EABIMASK;
12106 if (flags & EF_ARM_RELEXEC)
12107 fprintf (file, _(" [relocatable executable]"));
12109 if (flags & EF_ARM_HASENTRY)
12110 fprintf (file, _(" [has entry point]"));
12112 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
12115 fprintf (file, _("<Unrecognised flag bits set>"));
12117 fputc ('\n', file);
12123 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
12125 switch (ELF_ST_TYPE (elf_sym->st_info))
12127 case STT_ARM_TFUNC:
12128 return ELF_ST_TYPE (elf_sym->st_info);
12130 case STT_ARM_16BIT:
12131 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
12132 This allows us to distinguish between data used by Thumb instructions
12133 and non-data (which is probably code) inside Thumb regions of an
12135 if (type != STT_OBJECT && type != STT_TLS)
12136 return ELF_ST_TYPE (elf_sym->st_info);
12147 elf32_arm_gc_mark_hook (asection *sec,
12148 struct bfd_link_info *info,
12149 Elf_Internal_Rela *rel,
12150 struct elf_link_hash_entry *h,
12151 Elf_Internal_Sym *sym)
12154 switch (ELF32_R_TYPE (rel->r_info))
12156 case R_ARM_GNU_VTINHERIT:
12157 case R_ARM_GNU_VTENTRY:
12161 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
12164 /* Update the got entry reference counts for the section being removed. */
12167 elf32_arm_gc_sweep_hook (bfd * abfd,
12168 struct bfd_link_info * info,
12170 const Elf_Internal_Rela * relocs)
12172 Elf_Internal_Shdr *symtab_hdr;
12173 struct elf_link_hash_entry **sym_hashes;
12174 bfd_signed_vma *local_got_refcounts;
12175 const Elf_Internal_Rela *rel, *relend;
12176 struct elf32_arm_link_hash_table * globals;
12178 if (info->relocatable)
12181 globals = elf32_arm_hash_table (info);
12182 if (globals == NULL)
12185 elf_section_data (sec)->local_dynrel = NULL;
12187 symtab_hdr = & elf_symtab_hdr (abfd);
12188 sym_hashes = elf_sym_hashes (abfd);
12189 local_got_refcounts = elf_local_got_refcounts (abfd);
12191 check_use_blx (globals);
12193 relend = relocs + sec->reloc_count;
12194 for (rel = relocs; rel < relend; rel++)
12196 unsigned long r_symndx;
12197 struct elf_link_hash_entry *h = NULL;
12198 struct elf32_arm_link_hash_entry *eh;
12200 bfd_boolean call_reloc_p;
12201 bfd_boolean may_become_dynamic_p;
12202 bfd_boolean may_need_local_target_p;
12203 union gotplt_union *root_plt;
12204 struct arm_plt_info *arm_plt;
12206 r_symndx = ELF32_R_SYM (rel->r_info);
12207 if (r_symndx >= symtab_hdr->sh_info)
12209 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12210 while (h->root.type == bfd_link_hash_indirect
12211 || h->root.type == bfd_link_hash_warning)
12212 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12214 eh = (struct elf32_arm_link_hash_entry *) h;
12216 call_reloc_p = FALSE;
12217 may_become_dynamic_p = FALSE;
12218 may_need_local_target_p = FALSE;
12220 r_type = ELF32_R_TYPE (rel->r_info);
12221 r_type = arm_real_reloc_type (globals, r_type);
12225 case R_ARM_GOT_PREL:
12226 case R_ARM_TLS_GD32:
12227 case R_ARM_TLS_IE32:
12230 if (h->got.refcount > 0)
12231 h->got.refcount -= 1;
12233 else if (local_got_refcounts != NULL)
12235 if (local_got_refcounts[r_symndx] > 0)
12236 local_got_refcounts[r_symndx] -= 1;
12240 case R_ARM_TLS_LDM32:
12241 globals->tls_ldm_got.refcount -= 1;
12249 case R_ARM_THM_CALL:
12250 case R_ARM_THM_JUMP24:
12251 case R_ARM_THM_JUMP19:
12252 call_reloc_p = TRUE;
12253 may_need_local_target_p = TRUE;
12257 if (!globals->vxworks_p)
12259 may_need_local_target_p = TRUE;
12262 /* Fall through. */
12264 case R_ARM_ABS32_NOI:
12266 case R_ARM_REL32_NOI:
12267 case R_ARM_MOVW_ABS_NC:
12268 case R_ARM_MOVT_ABS:
12269 case R_ARM_MOVW_PREL_NC:
12270 case R_ARM_MOVT_PREL:
12271 case R_ARM_THM_MOVW_ABS_NC:
12272 case R_ARM_THM_MOVT_ABS:
12273 case R_ARM_THM_MOVW_PREL_NC:
12274 case R_ARM_THM_MOVT_PREL:
12275 /* Should the interworking branches be here also? */
12276 if ((info->shared || globals->root.is_relocatable_executable)
12277 && (sec->flags & SEC_ALLOC) != 0)
12280 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12282 call_reloc_p = TRUE;
12283 may_need_local_target_p = TRUE;
12286 may_become_dynamic_p = TRUE;
12289 may_need_local_target_p = TRUE;
12296 if (may_need_local_target_p
12297 && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
12299 /* If PLT refcount book-keeping is wrong and too low, we'll
12300 see a zero value (going to -1) for the root PLT reference
12302 if (root_plt->refcount >= 0)
12304 BFD_ASSERT (root_plt->refcount != 0);
12305 root_plt->refcount -= 1;
12308 /* A value of -1 means the symbol has become local, forced
12309 or seeing a hidden definition. Any other negative value
12311 BFD_ASSERT (root_plt->refcount == -1);
12314 arm_plt->noncall_refcount--;
12316 if (r_type == R_ARM_THM_CALL)
12317 arm_plt->maybe_thumb_refcount--;
12319 if (r_type == R_ARM_THM_JUMP24
12320 || r_type == R_ARM_THM_JUMP19)
12321 arm_plt->thumb_refcount--;
12324 if (may_become_dynamic_p)
12326 struct elf_dyn_relocs **pp;
12327 struct elf_dyn_relocs *p;
12330 pp = &(eh->dyn_relocs);
12333 Elf_Internal_Sym *isym;
12335 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
12339 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12343 for (; (p = *pp) != NULL; pp = &p->next)
12346 /* Everything must go for SEC. */
12356 /* Look through the relocs for a section during the first phase. */
12359 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
12360 asection *sec, const Elf_Internal_Rela *relocs)
12362 Elf_Internal_Shdr *symtab_hdr;
12363 struct elf_link_hash_entry **sym_hashes;
12364 const Elf_Internal_Rela *rel;
12365 const Elf_Internal_Rela *rel_end;
12368 struct elf32_arm_link_hash_table *htab;
12369 bfd_boolean call_reloc_p;
12370 bfd_boolean may_become_dynamic_p;
12371 bfd_boolean may_need_local_target_p;
12372 unsigned long nsyms;
12374 if (info->relocatable)
12377 BFD_ASSERT (is_arm_elf (abfd));
12379 htab = elf32_arm_hash_table (info);
12385 /* Create dynamic sections for relocatable executables so that we can
12386 copy relocations. */
12387 if (htab->root.is_relocatable_executable
12388 && ! htab->root.dynamic_sections_created)
12390 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
12394 if (htab->root.dynobj == NULL)
12395 htab->root.dynobj = abfd;
12396 if (!create_ifunc_sections (info))
12399 dynobj = htab->root.dynobj;
12401 symtab_hdr = & elf_symtab_hdr (abfd);
12402 sym_hashes = elf_sym_hashes (abfd);
12403 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
12405 rel_end = relocs + sec->reloc_count;
12406 for (rel = relocs; rel < rel_end; rel++)
12408 Elf_Internal_Sym *isym;
12409 struct elf_link_hash_entry *h;
12410 struct elf32_arm_link_hash_entry *eh;
12411 unsigned long r_symndx;
12414 r_symndx = ELF32_R_SYM (rel->r_info);
12415 r_type = ELF32_R_TYPE (rel->r_info);
12416 r_type = arm_real_reloc_type (htab, r_type);
12418 if (r_symndx >= nsyms
12419 /* PR 9934: It is possible to have relocations that do not
12420 refer to symbols, thus it is also possible to have an
12421 object file containing relocations but no symbol table. */
12422 && (r_symndx > STN_UNDEF || nsyms > 0))
12424 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
12433 if (r_symndx < symtab_hdr->sh_info)
12435 /* A local symbol. */
12436 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
12443 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12444 while (h->root.type == bfd_link_hash_indirect
12445 || h->root.type == bfd_link_hash_warning)
12446 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12450 eh = (struct elf32_arm_link_hash_entry *) h;
12452 call_reloc_p = FALSE;
12453 may_become_dynamic_p = FALSE;
12454 may_need_local_target_p = FALSE;
12456 /* Could be done earlier, if h were already available. */
12457 r_type = elf32_arm_tls_transition (info, r_type, h);
12461 case R_ARM_GOT_PREL:
12462 case R_ARM_TLS_GD32:
12463 case R_ARM_TLS_IE32:
12464 case R_ARM_TLS_GOTDESC:
12465 case R_ARM_TLS_DESCSEQ:
12466 case R_ARM_THM_TLS_DESCSEQ:
12467 case R_ARM_TLS_CALL:
12468 case R_ARM_THM_TLS_CALL:
12469 /* This symbol requires a global offset table entry. */
12471 int tls_type, old_tls_type;
12475 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
12477 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
12479 case R_ARM_TLS_GOTDESC:
12480 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
12481 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
12482 tls_type = GOT_TLS_GDESC; break;
12484 default: tls_type = GOT_NORMAL; break;
12490 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
12494 /* This is a global offset table entry for a local symbol. */
12495 if (!elf32_arm_allocate_local_sym_info (abfd))
12497 elf_local_got_refcounts (abfd)[r_symndx] += 1;
12498 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
12501 /* If a variable is accessed with both tls methods, two
12502 slots may be created. */
12503 if (GOT_TLS_GD_ANY_P (old_tls_type)
12504 && GOT_TLS_GD_ANY_P (tls_type))
12505 tls_type |= old_tls_type;
12507 /* We will already have issued an error message if there
12508 is a TLS/non-TLS mismatch, based on the symbol
12509 type. So just combine any TLS types needed. */
12510 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
12511 && tls_type != GOT_NORMAL)
12512 tls_type |= old_tls_type;
12514 /* If the symbol is accessed in both IE and GDESC
12515 method, we're able to relax. Turn off the GDESC flag,
12516 without messing up with any other kind of tls types
12517 that may be involved */
12518 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
12519 tls_type &= ~GOT_TLS_GDESC;
12521 if (old_tls_type != tls_type)
12524 elf32_arm_hash_entry (h)->tls_type = tls_type;
12526 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
12529 /* Fall through. */
12531 case R_ARM_TLS_LDM32:
12532 if (r_type == R_ARM_TLS_LDM32)
12533 htab->tls_ldm_got.refcount++;
12534 /* Fall through. */
12536 case R_ARM_GOTOFF32:
12538 if (htab->root.sgot == NULL
12539 && !create_got_section (htab->root.dynobj, info))
12548 case R_ARM_THM_CALL:
12549 case R_ARM_THM_JUMP24:
12550 case R_ARM_THM_JUMP19:
12551 call_reloc_p = TRUE;
12552 may_need_local_target_p = TRUE;
12556 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
12557 ldr __GOTT_INDEX__ offsets. */
12558 if (!htab->vxworks_p)
12560 may_need_local_target_p = TRUE;
12563 /* Fall through. */
12565 case R_ARM_MOVW_ABS_NC:
12566 case R_ARM_MOVT_ABS:
12567 case R_ARM_THM_MOVW_ABS_NC:
12568 case R_ARM_THM_MOVT_ABS:
12571 (*_bfd_error_handler)
12572 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
12573 abfd, elf32_arm_howto_table_1[r_type].name,
12574 (h) ? h->root.root.string : "a local symbol");
12575 bfd_set_error (bfd_error_bad_value);
12579 /* Fall through. */
12581 case R_ARM_ABS32_NOI:
12583 case R_ARM_REL32_NOI:
12584 case R_ARM_MOVW_PREL_NC:
12585 case R_ARM_MOVT_PREL:
12586 case R_ARM_THM_MOVW_PREL_NC:
12587 case R_ARM_THM_MOVT_PREL:
12589 /* Should the interworking branches be listed here? */
12590 if ((info->shared || htab->root.is_relocatable_executable)
12591 && (sec->flags & SEC_ALLOC) != 0)
12594 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12596 /* In shared libraries and relocatable executables,
12597 we treat local relative references as calls;
12598 see the related SYMBOL_CALLS_LOCAL code in
12599 allocate_dynrelocs. */
12600 call_reloc_p = TRUE;
12601 may_need_local_target_p = TRUE;
12604 /* We are creating a shared library or relocatable
12605 executable, and this is a reloc against a global symbol,
12606 or a non-PC-relative reloc against a local symbol.
12607 We may need to copy the reloc into the output. */
12608 may_become_dynamic_p = TRUE;
12611 may_need_local_target_p = TRUE;
12614 /* This relocation describes the C++ object vtable hierarchy.
12615 Reconstruct it for later use during GC. */
12616 case R_ARM_GNU_VTINHERIT:
12617 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
12621 /* This relocation describes which C++ vtable entries are actually
12622 used. Record for later use during GC. */
12623 case R_ARM_GNU_VTENTRY:
12624 BFD_ASSERT (h != NULL);
12626 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
12634 /* We may need a .plt entry if the function this reloc
12635 refers to is in a different object, regardless of the
12636 symbol's type. We can't tell for sure yet, because
12637 something later might force the symbol local. */
12639 else if (may_need_local_target_p)
12640 /* If this reloc is in a read-only section, we might
12641 need a copy reloc. We can't check reliably at this
12642 stage whether the section is read-only, as input
12643 sections have not yet been mapped to output sections.
12644 Tentatively set the flag for now, and correct in
12645 adjust_dynamic_symbol. */
12646 h->non_got_ref = 1;
12649 if (may_need_local_target_p
12650 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
12652 union gotplt_union *root_plt;
12653 struct arm_plt_info *arm_plt;
12654 struct arm_local_iplt_info *local_iplt;
12658 root_plt = &h->plt;
12659 arm_plt = &eh->plt;
12663 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
12664 if (local_iplt == NULL)
12666 root_plt = &local_iplt->root;
12667 arm_plt = &local_iplt->arm;
12670 /* If the symbol is a function that doesn't bind locally,
12671 this relocation will need a PLT entry. */
12672 if (root_plt->refcount != -1)
12673 root_plt->refcount += 1;
12676 arm_plt->noncall_refcount++;
12678 /* It's too early to use htab->use_blx here, so we have to
12679 record possible blx references separately from
12680 relocs that definitely need a thumb stub. */
12682 if (r_type == R_ARM_THM_CALL)
12683 arm_plt->maybe_thumb_refcount += 1;
12685 if (r_type == R_ARM_THM_JUMP24
12686 || r_type == R_ARM_THM_JUMP19)
12687 arm_plt->thumb_refcount += 1;
12690 if (may_become_dynamic_p)
12692 struct elf_dyn_relocs *p, **head;
12694 /* Create a reloc section in dynobj. */
12695 if (sreloc == NULL)
12697 sreloc = _bfd_elf_make_dynamic_reloc_section
12698 (sec, dynobj, 2, abfd, ! htab->use_rel);
12700 if (sreloc == NULL)
12703 /* BPABI objects never have dynamic relocations mapped. */
12704 if (htab->symbian_p)
12708 flags = bfd_get_section_flags (dynobj, sreloc);
12709 flags &= ~(SEC_LOAD | SEC_ALLOC);
12710 bfd_set_section_flags (dynobj, sreloc, flags);
12714 /* If this is a global symbol, count the number of
12715 relocations we need for this symbol. */
12717 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
12720 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12726 if (p == NULL || p->sec != sec)
12728 bfd_size_type amt = sizeof *p;
12730 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
12740 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
12749 /* Unwinding tables are not referenced directly. This pass marks them as
12750 required if the corresponding code section is marked. */
12753 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
12754 elf_gc_mark_hook_fn gc_mark_hook)
12757 Elf_Internal_Shdr **elf_shdrp;
12760 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
12762 /* Marking EH data may cause additional code sections to be marked,
12763 requiring multiple passes. */
12768 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
12772 if (! is_arm_elf (sub))
12775 elf_shdrp = elf_elfsections (sub);
12776 for (o = sub->sections; o != NULL; o = o->next)
12778 Elf_Internal_Shdr *hdr;
12780 hdr = &elf_section_data (o)->this_hdr;
12781 if (hdr->sh_type == SHT_ARM_EXIDX
12783 && hdr->sh_link < elf_numsections (sub)
12785 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
12788 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
12798 /* Treat mapping symbols as special target symbols. */
12801 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
12803 return bfd_is_arm_special_symbol_name (sym->name,
12804 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
12807 /* This is a copy of elf_find_function() from elf.c except that
12808 ARM mapping symbols are ignored when looking for function names
12809 and STT_ARM_TFUNC is considered to a function type. */
12812 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
12813 asection * section,
12814 asymbol ** symbols,
12816 const char ** filename_ptr,
12817 const char ** functionname_ptr)
12819 const char * filename = NULL;
12820 asymbol * func = NULL;
12821 bfd_vma low_func = 0;
12824 for (p = symbols; *p != NULL; p++)
12826 elf_symbol_type *q;
12828 q = (elf_symbol_type *) *p;
12830 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
12835 filename = bfd_asymbol_name (&q->symbol);
12838 case STT_ARM_TFUNC:
12840 /* Skip mapping symbols. */
12841 if ((q->symbol.flags & BSF_LOCAL)
12842 && bfd_is_arm_special_symbol_name (q->symbol.name,
12843 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
12845 /* Fall through. */
12846 if (bfd_get_section (&q->symbol) == section
12847 && q->symbol.value >= low_func
12848 && q->symbol.value <= offset)
12850 func = (asymbol *) q;
12851 low_func = q->symbol.value;
12861 *filename_ptr = filename;
12862 if (functionname_ptr)
12863 *functionname_ptr = bfd_asymbol_name (func);
12869 /* Find the nearest line to a particular section and offset, for error
12870 reporting. This code is a duplicate of the code in elf.c, except
12871 that it uses arm_elf_find_function. */
12874 elf32_arm_find_nearest_line (bfd * abfd,
12875 asection * section,
12876 asymbol ** symbols,
12878 const char ** filename_ptr,
12879 const char ** functionname_ptr,
12880 unsigned int * line_ptr)
12882 bfd_boolean found = FALSE;
12884 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
12886 if (_bfd_dwarf2_find_nearest_line (abfd, dwarf_debug_sections,
12887 section, symbols, offset,
12888 filename_ptr, functionname_ptr,
12890 & elf_tdata (abfd)->dwarf2_find_line_info))
12892 if (!*functionname_ptr)
12893 arm_elf_find_function (abfd, section, symbols, offset,
12894 *filename_ptr ? NULL : filename_ptr,
12900 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
12901 & found, filename_ptr,
12902 functionname_ptr, line_ptr,
12903 & elf_tdata (abfd)->line_info))
12906 if (found && (*functionname_ptr || *line_ptr))
12909 if (symbols == NULL)
12912 if (! arm_elf_find_function (abfd, section, symbols, offset,
12913 filename_ptr, functionname_ptr))
12921 elf32_arm_find_inliner_info (bfd * abfd,
12922 const char ** filename_ptr,
12923 const char ** functionname_ptr,
12924 unsigned int * line_ptr)
12927 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
12928 functionname_ptr, line_ptr,
12929 & elf_tdata (abfd)->dwarf2_find_line_info);
12933 /* Adjust a symbol defined by a dynamic object and referenced by a
12934 regular object. The current definition is in some section of the
12935 dynamic object, but we're not including those sections. We have to
12936 change the definition to something the rest of the link can
12940 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
12941 struct elf_link_hash_entry * h)
12945 struct elf32_arm_link_hash_entry * eh;
12946 struct elf32_arm_link_hash_table *globals;
12948 globals = elf32_arm_hash_table (info);
12949 if (globals == NULL)
12952 dynobj = elf_hash_table (info)->dynobj;
12954 /* Make sure we know what is going on here. */
12955 BFD_ASSERT (dynobj != NULL
12957 || h->type == STT_GNU_IFUNC
12958 || h->u.weakdef != NULL
12961 && !h->def_regular)));
12963 eh = (struct elf32_arm_link_hash_entry *) h;
12965 /* If this is a function, put it in the procedure linkage table. We
12966 will fill in the contents of the procedure linkage table later,
12967 when we know the address of the .got section. */
12968 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
12970 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
12971 symbol binds locally. */
12972 if (h->plt.refcount <= 0
12973 || (h->type != STT_GNU_IFUNC
12974 && (SYMBOL_CALLS_LOCAL (info, h)
12975 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
12976 && h->root.type == bfd_link_hash_undefweak))))
12978 /* This case can occur if we saw a PLT32 reloc in an input
12979 file, but the symbol was never referred to by a dynamic
12980 object, or if all references were garbage collected. In
12981 such a case, we don't actually need to build a procedure
12982 linkage table, and we can just do a PC24 reloc instead. */
12983 h->plt.offset = (bfd_vma) -1;
12984 eh->plt.thumb_refcount = 0;
12985 eh->plt.maybe_thumb_refcount = 0;
12986 eh->plt.noncall_refcount = 0;
12994 /* It's possible that we incorrectly decided a .plt reloc was
12995 needed for an R_ARM_PC24 or similar reloc to a non-function sym
12996 in check_relocs. We can't decide accurately between function
12997 and non-function syms in check-relocs; Objects loaded later in
12998 the link may change h->type. So fix it now. */
12999 h->plt.offset = (bfd_vma) -1;
13000 eh->plt.thumb_refcount = 0;
13001 eh->plt.maybe_thumb_refcount = 0;
13002 eh->plt.noncall_refcount = 0;
13005 /* If this is a weak symbol, and there is a real definition, the
13006 processor independent code will have arranged for us to see the
13007 real definition first, and we can just use the same value. */
13008 if (h->u.weakdef != NULL)
13010 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
13011 || h->u.weakdef->root.type == bfd_link_hash_defweak);
13012 h->root.u.def.section = h->u.weakdef->root.u.def.section;
13013 h->root.u.def.value = h->u.weakdef->root.u.def.value;
13017 /* If there are no non-GOT references, we do not need a copy
13019 if (!h->non_got_ref)
13022 /* This is a reference to a symbol defined by a dynamic object which
13023 is not a function. */
13025 /* If we are creating a shared library, we must presume that the
13026 only references to the symbol are via the global offset table.
13027 For such cases we need not do anything here; the relocations will
13028 be handled correctly by relocate_section. Relocatable executables
13029 can reference data in shared objects directly, so we don't need to
13030 do anything here. */
13031 if (info->shared || globals->root.is_relocatable_executable)
13034 /* We must allocate the symbol in our .dynbss section, which will
13035 become part of the .bss section of the executable. There will be
13036 an entry for this symbol in the .dynsym section. The dynamic
13037 object will contain position independent code, so all references
13038 from the dynamic object to this symbol will go through the global
13039 offset table. The dynamic linker will use the .dynsym entry to
13040 determine the address it must put in the global offset table, so
13041 both the dynamic object and the regular object will refer to the
13042 same memory location for the variable. */
13043 s = bfd_get_linker_section (dynobj, ".dynbss");
13044 BFD_ASSERT (s != NULL);
13046 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
13047 copy the initial value out of the dynamic object and into the
13048 runtime process image. We need to remember the offset into the
13049 .rel(a).bss section we are going to use. */
13050 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
13054 srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
13055 elf32_arm_allocate_dynrelocs (info, srel, 1);
13059 return _bfd_elf_adjust_dynamic_copy (h, s);
13062 /* Allocate space in .plt, .got and associated reloc sections for
13066 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
13068 struct bfd_link_info *info;
13069 struct elf32_arm_link_hash_table *htab;
13070 struct elf32_arm_link_hash_entry *eh;
13071 struct elf_dyn_relocs *p;
13073 if (h->root.type == bfd_link_hash_indirect)
13076 eh = (struct elf32_arm_link_hash_entry *) h;
13078 info = (struct bfd_link_info *) inf;
13079 htab = elf32_arm_hash_table (info);
13083 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
13084 && h->plt.refcount > 0)
13086 /* Make sure this symbol is output as a dynamic symbol.
13087 Undefined weak syms won't yet be marked as dynamic. */
13088 if (h->dynindx == -1
13089 && !h->forced_local)
13091 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13095 /* If the call in the PLT entry binds locally, the associated
13096 GOT entry should use an R_ARM_IRELATIVE relocation instead of
13097 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
13098 than the .plt section. */
13099 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
13102 if (eh->plt.noncall_refcount == 0
13103 && SYMBOL_REFERENCES_LOCAL (info, h))
13104 /* All non-call references can be resolved directly.
13105 This means that they can (and in some cases, must)
13106 resolve directly to the run-time target, rather than
13107 to the PLT. That in turns means that any .got entry
13108 would be equal to the .igot.plt entry, so there's
13109 no point having both. */
13110 h->got.refcount = 0;
13115 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
13117 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
13119 /* If this symbol is not defined in a regular file, and we are
13120 not generating a shared library, then set the symbol to this
13121 location in the .plt. This is required to make function
13122 pointers compare as equal between the normal executable and
13123 the shared library. */
13125 && !h->def_regular)
13127 h->root.u.def.section = htab->root.splt;
13128 h->root.u.def.value = h->plt.offset;
13130 /* Make sure the function is not marked as Thumb, in case
13131 it is the target of an ABS32 relocation, which will
13132 point to the PLT entry. */
13133 h->target_internal = ST_BRANCH_TO_ARM;
13136 htab->next_tls_desc_index++;
13138 /* VxWorks executables have a second set of relocations for
13139 each PLT entry. They go in a separate relocation section,
13140 which is processed by the kernel loader. */
13141 if (htab->vxworks_p && !info->shared)
13143 /* There is a relocation for the initial PLT entry:
13144 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
13145 if (h->plt.offset == htab->plt_header_size)
13146 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
13148 /* There are two extra relocations for each subsequent
13149 PLT entry: an R_ARM_32 relocation for the GOT entry,
13150 and an R_ARM_32 relocation for the PLT entry. */
13151 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
13156 h->plt.offset = (bfd_vma) -1;
13162 h->plt.offset = (bfd_vma) -1;
13166 eh = (struct elf32_arm_link_hash_entry *) h;
13167 eh->tlsdesc_got = (bfd_vma) -1;
13169 if (h->got.refcount > 0)
13173 int tls_type = elf32_arm_hash_entry (h)->tls_type;
13176 /* Make sure this symbol is output as a dynamic symbol.
13177 Undefined weak syms won't yet be marked as dynamic. */
13178 if (h->dynindx == -1
13179 && !h->forced_local)
13181 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13185 if (!htab->symbian_p)
13187 s = htab->root.sgot;
13188 h->got.offset = s->size;
13190 if (tls_type == GOT_UNKNOWN)
13193 if (tls_type == GOT_NORMAL)
13194 /* Non-TLS symbols need one GOT slot. */
13198 if (tls_type & GOT_TLS_GDESC)
13200 /* R_ARM_TLS_DESC needs 2 GOT slots. */
13202 = (htab->root.sgotplt->size
13203 - elf32_arm_compute_jump_table_size (htab));
13204 htab->root.sgotplt->size += 8;
13205 h->got.offset = (bfd_vma) -2;
13206 /* plt.got_offset needs to know there's a TLS_DESC
13207 reloc in the middle of .got.plt. */
13208 htab->num_tls_desc++;
13211 if (tls_type & GOT_TLS_GD)
13213 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
13214 the symbol is both GD and GDESC, got.offset may
13215 have been overwritten. */
13216 h->got.offset = s->size;
13220 if (tls_type & GOT_TLS_IE)
13221 /* R_ARM_TLS_IE32 needs one GOT slot. */
13225 dyn = htab->root.dynamic_sections_created;
13228 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
13230 || !SYMBOL_REFERENCES_LOCAL (info, h)))
13233 if (tls_type != GOT_NORMAL
13234 && (info->shared || indx != 0)
13235 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13236 || h->root.type != bfd_link_hash_undefweak))
13238 if (tls_type & GOT_TLS_IE)
13239 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13241 if (tls_type & GOT_TLS_GD)
13242 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13244 if (tls_type & GOT_TLS_GDESC)
13246 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
13247 /* GDESC needs a trampoline to jump to. */
13248 htab->tls_trampoline = -1;
13251 /* Only GD needs it. GDESC just emits one relocation per
13253 if ((tls_type & GOT_TLS_GD) && indx != 0)
13254 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13256 else if (!SYMBOL_REFERENCES_LOCAL (info, h))
13258 if (htab->root.dynamic_sections_created)
13259 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
13260 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13262 else if (h->type == STT_GNU_IFUNC
13263 && eh->plt.noncall_refcount == 0)
13264 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
13265 they all resolve dynamically instead. Reserve room for the
13266 GOT entry's R_ARM_IRELATIVE relocation. */
13267 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
13268 else if (info->shared)
13269 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
13270 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13274 h->got.offset = (bfd_vma) -1;
13276 /* Allocate stubs for exported Thumb functions on v4t. */
13277 if (!htab->use_blx && h->dynindx != -1
13279 && h->target_internal == ST_BRANCH_TO_THUMB
13280 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
13282 struct elf_link_hash_entry * th;
13283 struct bfd_link_hash_entry * bh;
13284 struct elf_link_hash_entry * myh;
13288 /* Create a new symbol to regist the real location of the function. */
13289 s = h->root.u.def.section;
13290 sprintf (name, "__real_%s", h->root.root.string);
13291 _bfd_generic_link_add_one_symbol (info, s->owner,
13292 name, BSF_GLOBAL, s,
13293 h->root.u.def.value,
13294 NULL, TRUE, FALSE, &bh);
13296 myh = (struct elf_link_hash_entry *) bh;
13297 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
13298 myh->forced_local = 1;
13299 myh->target_internal = ST_BRANCH_TO_THUMB;
13300 eh->export_glue = myh;
13301 th = record_arm_to_thumb_glue (info, h);
13302 /* Point the symbol at the stub. */
13303 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
13304 h->target_internal = ST_BRANCH_TO_ARM;
13305 h->root.u.def.section = th->root.u.def.section;
13306 h->root.u.def.value = th->root.u.def.value & ~1;
13309 if (eh->dyn_relocs == NULL)
13312 /* In the shared -Bsymbolic case, discard space allocated for
13313 dynamic pc-relative relocs against symbols which turn out to be
13314 defined in regular objects. For the normal shared case, discard
13315 space for pc-relative relocs that have become local due to symbol
13316 visibility changes. */
13318 if (info->shared || htab->root.is_relocatable_executable)
13320 /* The only relocs that use pc_count are R_ARM_REL32 and
13321 R_ARM_REL32_NOI, which will appear on something like
13322 ".long foo - .". We want calls to protected symbols to resolve
13323 directly to the function rather than going via the plt. If people
13324 want function pointer comparisons to work as expected then they
13325 should avoid writing assembly like ".long foo - .". */
13326 if (SYMBOL_CALLS_LOCAL (info, h))
13328 struct elf_dyn_relocs **pp;
13330 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
13332 p->count -= p->pc_count;
13341 if (htab->vxworks_p)
13343 struct elf_dyn_relocs **pp;
13345 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
13347 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
13354 /* Also discard relocs on undefined weak syms with non-default
13356 if (eh->dyn_relocs != NULL
13357 && h->root.type == bfd_link_hash_undefweak)
13359 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
13360 eh->dyn_relocs = NULL;
13362 /* Make sure undefined weak symbols are output as a dynamic
13364 else if (h->dynindx == -1
13365 && !h->forced_local)
13367 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13372 else if (htab->root.is_relocatable_executable && h->dynindx == -1
13373 && h->root.type == bfd_link_hash_new)
13375 /* Output absolute symbols so that we can create relocations
13376 against them. For normal symbols we output a relocation
13377 against the section that contains them. */
13378 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13385 /* For the non-shared case, discard space for relocs against
13386 symbols which turn out to need copy relocs or are not
13389 if (!h->non_got_ref
13390 && ((h->def_dynamic
13391 && !h->def_regular)
13392 || (htab->root.dynamic_sections_created
13393 && (h->root.type == bfd_link_hash_undefweak
13394 || h->root.type == bfd_link_hash_undefined))))
13396 /* Make sure this symbol is output as a dynamic symbol.
13397 Undefined weak syms won't yet be marked as dynamic. */
13398 if (h->dynindx == -1
13399 && !h->forced_local)
13401 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13405 /* If that succeeded, we know we'll be keeping all the
13407 if (h->dynindx != -1)
13411 eh->dyn_relocs = NULL;
13416 /* Finally, allocate space. */
13417 for (p = eh->dyn_relocs; p != NULL; p = p->next)
13419 asection *sreloc = elf_section_data (p->sec)->sreloc;
13420 if (h->type == STT_GNU_IFUNC
13421 && eh->plt.noncall_refcount == 0
13422 && SYMBOL_REFERENCES_LOCAL (info, h))
13423 elf32_arm_allocate_irelocs (info, sreloc, p->count);
13425 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
13431 /* Find any dynamic relocs that apply to read-only sections. */
13434 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
13436 struct elf32_arm_link_hash_entry * eh;
13437 struct elf_dyn_relocs * p;
13439 eh = (struct elf32_arm_link_hash_entry *) h;
13440 for (p = eh->dyn_relocs; p != NULL; p = p->next)
13442 asection *s = p->sec;
13444 if (s != NULL && (s->flags & SEC_READONLY) != 0)
13446 struct bfd_link_info *info = (struct bfd_link_info *) inf;
13448 info->flags |= DF_TEXTREL;
13450 /* Not an error, just cut short the traversal. */
13458 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
13461 struct elf32_arm_link_hash_table *globals;
13463 globals = elf32_arm_hash_table (info);
13464 if (globals == NULL)
13467 globals->byteswap_code = byteswap_code;
13470 /* Set the sizes of the dynamic sections. */
13473 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
13474 struct bfd_link_info * info)
13479 bfd_boolean relocs;
13481 struct elf32_arm_link_hash_table *htab;
13483 htab = elf32_arm_hash_table (info);
13487 dynobj = elf_hash_table (info)->dynobj;
13488 BFD_ASSERT (dynobj != NULL);
13489 check_use_blx (htab);
13491 if (elf_hash_table (info)->dynamic_sections_created)
13493 /* Set the contents of the .interp section to the interpreter. */
13494 if (info->executable)
13496 s = bfd_get_linker_section (dynobj, ".interp");
13497 BFD_ASSERT (s != NULL);
13498 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
13499 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
13503 /* Set up .got offsets for local syms, and space for local dynamic
13505 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
13507 bfd_signed_vma *local_got;
13508 bfd_signed_vma *end_local_got;
13509 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
13510 char *local_tls_type;
13511 bfd_vma *local_tlsdesc_gotent;
13512 bfd_size_type locsymcount;
13513 Elf_Internal_Shdr *symtab_hdr;
13515 bfd_boolean is_vxworks = htab->vxworks_p;
13516 unsigned int symndx;
13518 if (! is_arm_elf (ibfd))
13521 for (s = ibfd->sections; s != NULL; s = s->next)
13523 struct elf_dyn_relocs *p;
13525 for (p = (struct elf_dyn_relocs *)
13526 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
13528 if (!bfd_is_abs_section (p->sec)
13529 && bfd_is_abs_section (p->sec->output_section))
13531 /* Input section has been discarded, either because
13532 it is a copy of a linkonce section or due to
13533 linker script /DISCARD/, so we'll be discarding
13536 else if (is_vxworks
13537 && strcmp (p->sec->output_section->name,
13540 /* Relocations in vxworks .tls_vars sections are
13541 handled specially by the loader. */
13543 else if (p->count != 0)
13545 srel = elf_section_data (p->sec)->sreloc;
13546 elf32_arm_allocate_dynrelocs (info, srel, p->count);
13547 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
13548 info->flags |= DF_TEXTREL;
13553 local_got = elf_local_got_refcounts (ibfd);
13557 symtab_hdr = & elf_symtab_hdr (ibfd);
13558 locsymcount = symtab_hdr->sh_info;
13559 end_local_got = local_got + locsymcount;
13560 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
13561 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
13562 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
13564 s = htab->root.sgot;
13565 srel = htab->root.srelgot;
13566 for (; local_got < end_local_got;
13567 ++local_got, ++local_iplt_ptr, ++local_tls_type,
13568 ++local_tlsdesc_gotent, ++symndx)
13570 *local_tlsdesc_gotent = (bfd_vma) -1;
13571 local_iplt = *local_iplt_ptr;
13572 if (local_iplt != NULL)
13574 struct elf_dyn_relocs *p;
13576 if (local_iplt->root.refcount > 0)
13578 elf32_arm_allocate_plt_entry (info, TRUE,
13581 if (local_iplt->arm.noncall_refcount == 0)
13582 /* All references to the PLT are calls, so all
13583 non-call references can resolve directly to the
13584 run-time target. This means that the .got entry
13585 would be the same as the .igot.plt entry, so there's
13586 no point creating both. */
13591 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
13592 local_iplt->root.offset = (bfd_vma) -1;
13595 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
13599 psrel = elf_section_data (p->sec)->sreloc;
13600 if (local_iplt->arm.noncall_refcount == 0)
13601 elf32_arm_allocate_irelocs (info, psrel, p->count);
13603 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
13606 if (*local_got > 0)
13608 Elf_Internal_Sym *isym;
13610 *local_got = s->size;
13611 if (*local_tls_type & GOT_TLS_GD)
13612 /* TLS_GD relocs need an 8-byte structure in the GOT. */
13614 if (*local_tls_type & GOT_TLS_GDESC)
13616 *local_tlsdesc_gotent = htab->root.sgotplt->size
13617 - elf32_arm_compute_jump_table_size (htab);
13618 htab->root.sgotplt->size += 8;
13619 *local_got = (bfd_vma) -2;
13620 /* plt.got_offset needs to know there's a TLS_DESC
13621 reloc in the middle of .got.plt. */
13622 htab->num_tls_desc++;
13624 if (*local_tls_type & GOT_TLS_IE)
13627 if (*local_tls_type & GOT_NORMAL)
13629 /* If the symbol is both GD and GDESC, *local_got
13630 may have been overwritten. */
13631 *local_got = s->size;
13635 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
13639 /* If all references to an STT_GNU_IFUNC PLT are calls,
13640 then all non-call references, including this GOT entry,
13641 resolve directly to the run-time target. */
13642 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
13643 && (local_iplt == NULL
13644 || local_iplt->arm.noncall_refcount == 0))
13645 elf32_arm_allocate_irelocs (info, srel, 1);
13646 else if ((info->shared && !(*local_tls_type & GOT_TLS_GDESC))
13647 || *local_tls_type & GOT_TLS_GD)
13648 elf32_arm_allocate_dynrelocs (info, srel, 1);
13650 if (info->shared && *local_tls_type & GOT_TLS_GDESC)
13652 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
13653 htab->tls_trampoline = -1;
13657 *local_got = (bfd_vma) -1;
13661 if (htab->tls_ldm_got.refcount > 0)
13663 /* Allocate two GOT entries and one dynamic relocation (if necessary)
13664 for R_ARM_TLS_LDM32 relocations. */
13665 htab->tls_ldm_got.offset = htab->root.sgot->size;
13666 htab->root.sgot->size += 8;
13668 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13671 htab->tls_ldm_got.offset = -1;
13673 /* Allocate global sym .plt and .got entries, and space for global
13674 sym dynamic relocs. */
13675 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
13677 /* Here we rummage through the found bfds to collect glue information. */
13678 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
13680 if (! is_arm_elf (ibfd))
13683 /* Initialise mapping tables for code/data. */
13684 bfd_elf32_arm_init_maps (ibfd);
13686 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
13687 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
13688 /* xgettext:c-format */
13689 _bfd_error_handler (_("Errors encountered processing file %s"),
13693 /* Allocate space for the glue sections now that we've sized them. */
13694 bfd_elf32_arm_allocate_interworking_sections (info);
13696 /* For every jump slot reserved in the sgotplt, reloc_count is
13697 incremented. However, when we reserve space for TLS descriptors,
13698 it's not incremented, so in order to compute the space reserved
13699 for them, it suffices to multiply the reloc count by the jump
13701 if (htab->root.srelplt)
13702 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
13704 if (htab->tls_trampoline)
13706 if (htab->root.splt->size == 0)
13707 htab->root.splt->size += htab->plt_header_size;
13709 htab->tls_trampoline = htab->root.splt->size;
13710 htab->root.splt->size += htab->plt_entry_size;
13712 /* If we're not using lazy TLS relocations, don't generate the
13713 PLT and GOT entries they require. */
13714 if (!(info->flags & DF_BIND_NOW))
13716 htab->dt_tlsdesc_got = htab->root.sgot->size;
13717 htab->root.sgot->size += 4;
13719 htab->dt_tlsdesc_plt = htab->root.splt->size;
13720 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
13724 /* The check_relocs and adjust_dynamic_symbol entry points have
13725 determined the sizes of the various dynamic sections. Allocate
13726 memory for them. */
13729 for (s = dynobj->sections; s != NULL; s = s->next)
13733 if ((s->flags & SEC_LINKER_CREATED) == 0)
13736 /* It's OK to base decisions on the section name, because none
13737 of the dynobj section names depend upon the input files. */
13738 name = bfd_get_section_name (dynobj, s);
13740 if (s == htab->root.splt)
13742 /* Remember whether there is a PLT. */
13743 plt = s->size != 0;
13745 else if (CONST_STRNEQ (name, ".rel"))
13749 /* Remember whether there are any reloc sections other
13750 than .rel(a).plt and .rela.plt.unloaded. */
13751 if (s != htab->root.srelplt && s != htab->srelplt2)
13754 /* We use the reloc_count field as a counter if we need
13755 to copy relocs into the output file. */
13756 s->reloc_count = 0;
13759 else if (s != htab->root.sgot
13760 && s != htab->root.sgotplt
13761 && s != htab->root.iplt
13762 && s != htab->root.igotplt
13763 && s != htab->sdynbss)
13765 /* It's not one of our sections, so don't allocate space. */
13771 /* If we don't need this section, strip it from the
13772 output file. This is mostly to handle .rel(a).bss and
13773 .rel(a).plt. We must create both sections in
13774 create_dynamic_sections, because they must be created
13775 before the linker maps input sections to output
13776 sections. The linker does that before
13777 adjust_dynamic_symbol is called, and it is that
13778 function which decides whether anything needs to go
13779 into these sections. */
13780 s->flags |= SEC_EXCLUDE;
13784 if ((s->flags & SEC_HAS_CONTENTS) == 0)
13787 /* Allocate memory for the section contents. */
13788 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
13789 if (s->contents == NULL)
13793 if (elf_hash_table (info)->dynamic_sections_created)
13795 /* Add some entries to the .dynamic section. We fill in the
13796 values later, in elf32_arm_finish_dynamic_sections, but we
13797 must add the entries now so that we get the correct size for
13798 the .dynamic section. The DT_DEBUG entry is filled in by the
13799 dynamic linker and used by the debugger. */
13800 #define add_dynamic_entry(TAG, VAL) \
13801 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
13803 if (info->executable)
13805 if (!add_dynamic_entry (DT_DEBUG, 0))
13811 if ( !add_dynamic_entry (DT_PLTGOT, 0)
13812 || !add_dynamic_entry (DT_PLTRELSZ, 0)
13813 || !add_dynamic_entry (DT_PLTREL,
13814 htab->use_rel ? DT_REL : DT_RELA)
13815 || !add_dynamic_entry (DT_JMPREL, 0))
13818 if (htab->dt_tlsdesc_plt &&
13819 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
13820 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
13828 if (!add_dynamic_entry (DT_REL, 0)
13829 || !add_dynamic_entry (DT_RELSZ, 0)
13830 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
13835 if (!add_dynamic_entry (DT_RELA, 0)
13836 || !add_dynamic_entry (DT_RELASZ, 0)
13837 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
13842 /* If any dynamic relocs apply to a read-only section,
13843 then we need a DT_TEXTREL entry. */
13844 if ((info->flags & DF_TEXTREL) == 0)
13845 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
13848 if ((info->flags & DF_TEXTREL) != 0)
13850 if (!add_dynamic_entry (DT_TEXTREL, 0))
13853 if (htab->vxworks_p
13854 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
13857 #undef add_dynamic_entry
13862 /* Size sections even though they're not dynamic. We use it to setup
13863 _TLS_MODULE_BASE_, if needed. */
13866 elf32_arm_always_size_sections (bfd *output_bfd,
13867 struct bfd_link_info *info)
13871 if (info->relocatable)
13874 tls_sec = elf_hash_table (info)->tls_sec;
13878 struct elf_link_hash_entry *tlsbase;
13880 tlsbase = elf_link_hash_lookup
13881 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
13885 struct bfd_link_hash_entry *bh = NULL;
13886 const struct elf_backend_data *bed
13887 = get_elf_backend_data (output_bfd);
13889 if (!(_bfd_generic_link_add_one_symbol
13890 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
13891 tls_sec, 0, NULL, FALSE,
13892 bed->collect, &bh)))
13895 tlsbase->type = STT_TLS;
13896 tlsbase = (struct elf_link_hash_entry *)bh;
13897 tlsbase->def_regular = 1;
13898 tlsbase->other = STV_HIDDEN;
13899 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
13905 /* Finish up dynamic symbol handling. We set the contents of various
13906 dynamic sections here. */
13909 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
13910 struct bfd_link_info * info,
13911 struct elf_link_hash_entry * h,
13912 Elf_Internal_Sym * sym)
13914 struct elf32_arm_link_hash_table *htab;
13915 struct elf32_arm_link_hash_entry *eh;
13917 htab = elf32_arm_hash_table (info);
13921 eh = (struct elf32_arm_link_hash_entry *) h;
13923 if (h->plt.offset != (bfd_vma) -1)
13927 BFD_ASSERT (h->dynindx != -1);
13928 elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
13932 if (!h->def_regular)
13934 /* Mark the symbol as undefined, rather than as defined in
13935 the .plt section. Leave the value alone. */
13936 sym->st_shndx = SHN_UNDEF;
13937 /* If the symbol is weak, we do need to clear the value.
13938 Otherwise, the PLT entry would provide a definition for
13939 the symbol even if the symbol wasn't defined anywhere,
13940 and so the symbol would never be NULL. */
13941 if (!h->ref_regular_nonweak)
13944 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
13946 /* At least one non-call relocation references this .iplt entry,
13947 so the .iplt entry is the function's canonical address. */
13948 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
13949 sym->st_target_internal = ST_BRANCH_TO_ARM;
13950 sym->st_shndx = (_bfd_elf_section_from_bfd_section
13951 (output_bfd, htab->root.iplt->output_section));
13952 sym->st_value = (h->plt.offset
13953 + htab->root.iplt->output_section->vma
13954 + htab->root.iplt->output_offset);
13961 Elf_Internal_Rela rel;
13963 /* This symbol needs a copy reloc. Set it up. */
13964 BFD_ASSERT (h->dynindx != -1
13965 && (h->root.type == bfd_link_hash_defined
13966 || h->root.type == bfd_link_hash_defweak));
13969 BFD_ASSERT (s != NULL);
13972 rel.r_offset = (h->root.u.def.value
13973 + h->root.u.def.section->output_section->vma
13974 + h->root.u.def.section->output_offset);
13975 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
13976 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
13979 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
13980 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
13981 to the ".got" section. */
13982 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
13983 || (!htab->vxworks_p && h == htab->root.hgot))
13984 sym->st_shndx = SHN_ABS;
13990 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
13992 const unsigned long *template, unsigned count)
13996 for (ix = 0; ix != count; ix++)
13998 unsigned long insn = template[ix];
14000 /* Emit mov pc,rx if bx is not permitted. */
14001 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
14002 insn = (insn & 0xf000000f) | 0x01a0f000;
14003 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
14007 /* Finish up the dynamic sections. */
14010 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
14015 struct elf32_arm_link_hash_table *htab;
14017 htab = elf32_arm_hash_table (info);
14021 dynobj = elf_hash_table (info)->dynobj;
14023 sgot = htab->root.sgotplt;
14024 /* A broken linker script might have discarded the dynamic sections.
14025 Catch this here so that we do not seg-fault later on. */
14026 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
14028 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
14030 if (elf_hash_table (info)->dynamic_sections_created)
14033 Elf32_External_Dyn *dyncon, *dynconend;
14035 splt = htab->root.splt;
14036 BFD_ASSERT (splt != NULL && sdyn != NULL);
14037 BFD_ASSERT (htab->symbian_p || sgot != NULL);
14039 dyncon = (Elf32_External_Dyn *) sdyn->contents;
14040 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
14042 for (; dyncon < dynconend; dyncon++)
14044 Elf_Internal_Dyn dyn;
14048 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
14055 if (htab->vxworks_p
14056 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
14057 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14062 goto get_vma_if_bpabi;
14065 goto get_vma_if_bpabi;
14068 goto get_vma_if_bpabi;
14070 name = ".gnu.version";
14071 goto get_vma_if_bpabi;
14073 name = ".gnu.version_d";
14074 goto get_vma_if_bpabi;
14076 name = ".gnu.version_r";
14077 goto get_vma_if_bpabi;
14083 name = RELOC_SECTION (htab, ".plt");
14085 s = bfd_get_section_by_name (output_bfd, name);
14086 BFD_ASSERT (s != NULL);
14087 if (!htab->symbian_p)
14088 dyn.d_un.d_ptr = s->vma;
14090 /* In the BPABI, tags in the PT_DYNAMIC section point
14091 at the file offset, not the memory address, for the
14092 convenience of the post linker. */
14093 dyn.d_un.d_ptr = s->filepos;
14094 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14098 if (htab->symbian_p)
14103 s = htab->root.srelplt;
14104 BFD_ASSERT (s != NULL);
14105 dyn.d_un.d_val = s->size;
14106 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14111 if (!htab->symbian_p)
14113 /* My reading of the SVR4 ABI indicates that the
14114 procedure linkage table relocs (DT_JMPREL) should be
14115 included in the overall relocs (DT_REL). This is
14116 what Solaris does. However, UnixWare can not handle
14117 that case. Therefore, we override the DT_RELSZ entry
14118 here to make it not include the JMPREL relocs. Since
14119 the linker script arranges for .rel(a).plt to follow all
14120 other relocation sections, we don't have to worry
14121 about changing the DT_REL entry. */
14122 s = htab->root.srelplt;
14124 dyn.d_un.d_val -= s->size;
14125 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14128 /* Fall through. */
14132 /* In the BPABI, the DT_REL tag must point at the file
14133 offset, not the VMA, of the first relocation
14134 section. So, we use code similar to that in
14135 elflink.c, but do not check for SHF_ALLOC on the
14136 relcoation section, since relocations sections are
14137 never allocated under the BPABI. The comments above
14138 about Unixware notwithstanding, we include all of the
14139 relocations here. */
14140 if (htab->symbian_p)
14143 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
14144 ? SHT_REL : SHT_RELA);
14145 dyn.d_un.d_val = 0;
14146 for (i = 1; i < elf_numsections (output_bfd); i++)
14148 Elf_Internal_Shdr *hdr
14149 = elf_elfsections (output_bfd)[i];
14150 if (hdr->sh_type == type)
14152 if (dyn.d_tag == DT_RELSZ
14153 || dyn.d_tag == DT_RELASZ)
14154 dyn.d_un.d_val += hdr->sh_size;
14155 else if ((ufile_ptr) hdr->sh_offset
14156 <= dyn.d_un.d_val - 1)
14157 dyn.d_un.d_val = hdr->sh_offset;
14160 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14164 case DT_TLSDESC_PLT:
14165 s = htab->root.splt;
14166 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14167 + htab->dt_tlsdesc_plt);
14168 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14171 case DT_TLSDESC_GOT:
14172 s = htab->root.sgot;
14173 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14174 + htab->dt_tlsdesc_got);
14175 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14178 /* Set the bottom bit of DT_INIT/FINI if the
14179 corresponding function is Thumb. */
14181 name = info->init_function;
14184 name = info->fini_function;
14186 /* If it wasn't set by elf_bfd_final_link
14187 then there is nothing to adjust. */
14188 if (dyn.d_un.d_val != 0)
14190 struct elf_link_hash_entry * eh;
14192 eh = elf_link_hash_lookup (elf_hash_table (info), name,
14193 FALSE, FALSE, TRUE);
14194 if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
14196 dyn.d_un.d_val |= 1;
14197 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14204 /* Fill in the first entry in the procedure linkage table. */
14205 if (splt->size > 0 && htab->plt_header_size)
14207 const bfd_vma *plt0_entry;
14208 bfd_vma got_address, plt_address, got_displacement;
14210 /* Calculate the addresses of the GOT and PLT. */
14211 got_address = sgot->output_section->vma + sgot->output_offset;
14212 plt_address = splt->output_section->vma + splt->output_offset;
14214 if (htab->vxworks_p)
14216 /* The VxWorks GOT is relocated by the dynamic linker.
14217 Therefore, we must emit relocations rather than simply
14218 computing the values now. */
14219 Elf_Internal_Rela rel;
14221 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
14222 put_arm_insn (htab, output_bfd, plt0_entry[0],
14223 splt->contents + 0);
14224 put_arm_insn (htab, output_bfd, plt0_entry[1],
14225 splt->contents + 4);
14226 put_arm_insn (htab, output_bfd, plt0_entry[2],
14227 splt->contents + 8);
14228 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
14230 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
14231 rel.r_offset = plt_address + 12;
14232 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14234 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
14235 htab->srelplt2->contents);
14237 else if (htab->nacl_p)
14241 got_displacement = got_address + 8 - (plt_address + 16);
14243 put_arm_insn (htab, output_bfd,
14244 elf32_arm_nacl_plt0_entry[0]
14245 | arm_movw_immediate (got_displacement),
14246 splt->contents + 0);
14247 put_arm_insn (htab, output_bfd,
14248 elf32_arm_nacl_plt0_entry[1]
14249 | arm_movt_immediate (got_displacement),
14250 splt->contents + 4);
14251 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
14252 put_arm_insn (htab, output_bfd,
14253 elf32_arm_nacl_plt0_entry[i],
14254 splt->contents + (i * 4));
14258 got_displacement = got_address - (plt_address + 16);
14260 plt0_entry = elf32_arm_plt0_entry;
14261 put_arm_insn (htab, output_bfd, plt0_entry[0],
14262 splt->contents + 0);
14263 put_arm_insn (htab, output_bfd, plt0_entry[1],
14264 splt->contents + 4);
14265 put_arm_insn (htab, output_bfd, plt0_entry[2],
14266 splt->contents + 8);
14267 put_arm_insn (htab, output_bfd, plt0_entry[3],
14268 splt->contents + 12);
14270 #ifdef FOUR_WORD_PLT
14271 /* The displacement value goes in the otherwise-unused
14272 last word of the second entry. */
14273 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
14275 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
14280 /* UnixWare sets the entsize of .plt to 4, although that doesn't
14281 really seem like the right value. */
14282 if (splt->output_section->owner == output_bfd)
14283 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
14285 if (htab->dt_tlsdesc_plt)
14287 bfd_vma got_address
14288 = sgot->output_section->vma + sgot->output_offset;
14289 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
14290 + htab->root.sgot->output_offset);
14291 bfd_vma plt_address
14292 = splt->output_section->vma + splt->output_offset;
14294 arm_put_trampoline (htab, output_bfd,
14295 splt->contents + htab->dt_tlsdesc_plt,
14296 dl_tlsdesc_lazy_trampoline, 6);
14298 bfd_put_32 (output_bfd,
14299 gotplt_address + htab->dt_tlsdesc_got
14300 - (plt_address + htab->dt_tlsdesc_plt)
14301 - dl_tlsdesc_lazy_trampoline[6],
14302 splt->contents + htab->dt_tlsdesc_plt + 24);
14303 bfd_put_32 (output_bfd,
14304 got_address - (plt_address + htab->dt_tlsdesc_plt)
14305 - dl_tlsdesc_lazy_trampoline[7],
14306 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
14309 if (htab->tls_trampoline)
14311 arm_put_trampoline (htab, output_bfd,
14312 splt->contents + htab->tls_trampoline,
14313 tls_trampoline, 3);
14314 #ifdef FOUR_WORD_PLT
14315 bfd_put_32 (output_bfd, 0x00000000,
14316 splt->contents + htab->tls_trampoline + 12);
14320 if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0)
14322 /* Correct the .rel(a).plt.unloaded relocations. They will have
14323 incorrect symbol indexes. */
14327 num_plts = ((htab->root.splt->size - htab->plt_header_size)
14328 / htab->plt_entry_size);
14329 p = htab->srelplt2->contents + RELOC_SIZE (htab);
14331 for (; num_plts; num_plts--)
14333 Elf_Internal_Rela rel;
14335 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14336 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14337 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14338 p += RELOC_SIZE (htab);
14340 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14341 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
14342 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14343 p += RELOC_SIZE (htab);
14348 /* Fill in the first three entries in the global offset table. */
14351 if (sgot->size > 0)
14354 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
14356 bfd_put_32 (output_bfd,
14357 sdyn->output_section->vma + sdyn->output_offset,
14359 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
14360 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
14363 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
14370 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
14372 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
14373 struct elf32_arm_link_hash_table *globals;
14375 i_ehdrp = elf_elfheader (abfd);
14377 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
14378 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
14380 i_ehdrp->e_ident[EI_OSABI] = 0;
14381 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
14385 globals = elf32_arm_hash_table (link_info);
14386 if (globals != NULL && globals->byteswap_code)
14387 i_ehdrp->e_flags |= EF_ARM_BE8;
14391 static enum elf_reloc_type_class
14392 elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
14394 switch ((int) ELF32_R_TYPE (rela->r_info))
14396 case R_ARM_RELATIVE:
14397 return reloc_class_relative;
14398 case R_ARM_JUMP_SLOT:
14399 return reloc_class_plt;
14401 return reloc_class_copy;
14403 return reloc_class_normal;
14408 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
14410 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
14413 /* Return TRUE if this is an unwinding table entry. */
14416 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
14418 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
14419 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
14423 /* Set the type and flags for an ARM section. We do this by
14424 the section name, which is a hack, but ought to work. */
14427 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
14431 name = bfd_get_section_name (abfd, sec);
14433 if (is_arm_elf_unwind_section_name (abfd, name))
14435 hdr->sh_type = SHT_ARM_EXIDX;
14436 hdr->sh_flags |= SHF_LINK_ORDER;
14441 /* Handle an ARM specific section when reading an object file. This is
14442 called when bfd_section_from_shdr finds a section with an unknown
14446 elf32_arm_section_from_shdr (bfd *abfd,
14447 Elf_Internal_Shdr * hdr,
14451 /* There ought to be a place to keep ELF backend specific flags, but
14452 at the moment there isn't one. We just keep track of the
14453 sections by their name, instead. Fortunately, the ABI gives
14454 names for all the ARM specific sections, so we will probably get
14456 switch (hdr->sh_type)
14458 case SHT_ARM_EXIDX:
14459 case SHT_ARM_PREEMPTMAP:
14460 case SHT_ARM_ATTRIBUTES:
14467 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
14473 static _arm_elf_section_data *
14474 get_arm_elf_section_data (asection * sec)
14476 if (sec && sec->owner && is_arm_elf (sec->owner))
14477 return elf32_arm_section_data (sec);
14485 struct bfd_link_info *info;
14488 int (*func) (void *, const char *, Elf_Internal_Sym *,
14489 asection *, struct elf_link_hash_entry *);
14490 } output_arch_syminfo;
14492 enum map_symbol_type
14500 /* Output a single mapping symbol. */
14503 elf32_arm_output_map_sym (output_arch_syminfo *osi,
14504 enum map_symbol_type type,
14507 static const char *names[3] = {"$a", "$t", "$d"};
14508 Elf_Internal_Sym sym;
14510 sym.st_value = osi->sec->output_section->vma
14511 + osi->sec->output_offset
14515 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
14516 sym.st_shndx = osi->sec_shndx;
14517 sym.st_target_internal = 0;
14518 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
14519 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
14522 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
14523 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
14526 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
14527 bfd_boolean is_iplt_entry_p,
14528 union gotplt_union *root_plt,
14529 struct arm_plt_info *arm_plt)
14531 struct elf32_arm_link_hash_table *htab;
14532 bfd_vma addr, plt_header_size;
14534 if (root_plt->offset == (bfd_vma) -1)
14537 htab = elf32_arm_hash_table (osi->info);
14541 if (is_iplt_entry_p)
14543 osi->sec = htab->root.iplt;
14544 plt_header_size = 0;
14548 osi->sec = htab->root.splt;
14549 plt_header_size = htab->plt_header_size;
14551 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
14552 (osi->info->output_bfd, osi->sec->output_section));
14554 addr = root_plt->offset & -2;
14555 if (htab->symbian_p)
14557 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14559 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
14562 else if (htab->vxworks_p)
14564 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14566 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
14568 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
14570 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
14573 else if (htab->nacl_p)
14575 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14580 bfd_boolean thumb_stub_p;
14582 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
14585 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
14588 #ifdef FOUR_WORD_PLT
14589 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14591 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
14594 /* A three-word PLT with no Thumb thunk contains only Arm code,
14595 so only need to output a mapping symbol for the first PLT entry and
14596 entries with thumb thunks. */
14597 if (thumb_stub_p || addr == plt_header_size)
14599 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14608 /* Output mapping symbols for PLT entries associated with H. */
14611 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
14613 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
14614 struct elf32_arm_link_hash_entry *eh;
14616 if (h->root.type == bfd_link_hash_indirect)
14619 if (h->root.type == bfd_link_hash_warning)
14620 /* When warning symbols are created, they **replace** the "real"
14621 entry in the hash table, thus we never get to see the real
14622 symbol in a hash traversal. So look at it now. */
14623 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14625 eh = (struct elf32_arm_link_hash_entry *) h;
14626 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
14627 &h->plt, &eh->plt);
14630 /* Output a single local symbol for a generated stub. */
14633 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
14634 bfd_vma offset, bfd_vma size)
14636 Elf_Internal_Sym sym;
14638 sym.st_value = osi->sec->output_section->vma
14639 + osi->sec->output_offset
14641 sym.st_size = size;
14643 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
14644 sym.st_shndx = osi->sec_shndx;
14645 sym.st_target_internal = 0;
14646 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
14650 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
14653 struct elf32_arm_stub_hash_entry *stub_entry;
14654 asection *stub_sec;
14657 output_arch_syminfo *osi;
14658 const insn_sequence *template_sequence;
14659 enum stub_insn_type prev_type;
14662 enum map_symbol_type sym_type;
14664 /* Massage our args to the form they really have. */
14665 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
14666 osi = (output_arch_syminfo *) in_arg;
14668 stub_sec = stub_entry->stub_sec;
14670 /* Ensure this stub is attached to the current section being
14672 if (stub_sec != osi->sec)
14675 addr = (bfd_vma) stub_entry->stub_offset;
14676 stub_name = stub_entry->output_name;
14678 template_sequence = stub_entry->stub_template;
14679 switch (template_sequence[0].type)
14682 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
14687 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
14688 stub_entry->stub_size))
14696 prev_type = DATA_TYPE;
14698 for (i = 0; i < stub_entry->stub_template_size; i++)
14700 switch (template_sequence[i].type)
14703 sym_type = ARM_MAP_ARM;
14708 sym_type = ARM_MAP_THUMB;
14712 sym_type = ARM_MAP_DATA;
14720 if (template_sequence[i].type != prev_type)
14722 prev_type = template_sequence[i].type;
14723 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
14727 switch (template_sequence[i].type)
14751 /* Output mapping symbols for linker generated sections,
14752 and for those data-only sections that do not have a
14756 elf32_arm_output_arch_local_syms (bfd *output_bfd,
14757 struct bfd_link_info *info,
14759 int (*func) (void *, const char *,
14760 Elf_Internal_Sym *,
14762 struct elf_link_hash_entry *))
14764 output_arch_syminfo osi;
14765 struct elf32_arm_link_hash_table *htab;
14767 bfd_size_type size;
14770 htab = elf32_arm_hash_table (info);
14774 check_use_blx (htab);
14776 osi.flaginfo = flaginfo;
14780 /* Add a $d mapping symbol to data-only sections that
14781 don't have any mapping symbol. This may result in (harmless) redundant
14782 mapping symbols. */
14783 for (input_bfd = info->input_bfds;
14785 input_bfd = input_bfd->link_next)
14787 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
14788 for (osi.sec = input_bfd->sections;
14790 osi.sec = osi.sec->next)
14792 if (osi.sec->output_section != NULL
14793 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
14795 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
14796 == SEC_HAS_CONTENTS
14797 && get_arm_elf_section_data (osi.sec) != NULL
14798 && get_arm_elf_section_data (osi.sec)->mapcount == 0
14799 && osi.sec->size > 0
14800 && (osi.sec->flags & SEC_EXCLUDE) == 0)
14802 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14803 (output_bfd, osi.sec->output_section);
14804 if (osi.sec_shndx != (int)SHN_BAD)
14805 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
14810 /* ARM->Thumb glue. */
14811 if (htab->arm_glue_size > 0)
14813 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14814 ARM2THUMB_GLUE_SECTION_NAME);
14816 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14817 (output_bfd, osi.sec->output_section);
14818 if (info->shared || htab->root.is_relocatable_executable
14819 || htab->pic_veneer)
14820 size = ARM2THUMB_PIC_GLUE_SIZE;
14821 else if (htab->use_blx)
14822 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
14824 size = ARM2THUMB_STATIC_GLUE_SIZE;
14826 for (offset = 0; offset < htab->arm_glue_size; offset += size)
14828 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
14829 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
14833 /* Thumb->ARM glue. */
14834 if (htab->thumb_glue_size > 0)
14836 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14837 THUMB2ARM_GLUE_SECTION_NAME);
14839 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14840 (output_bfd, osi.sec->output_section);
14841 size = THUMB2ARM_GLUE_SIZE;
14843 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
14845 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
14846 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
14850 /* ARMv4 BX veneers. */
14851 if (htab->bx_glue_size > 0)
14853 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14854 ARM_BX_GLUE_SECTION_NAME);
14856 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14857 (output_bfd, osi.sec->output_section);
14859 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
14862 /* Long calls stubs. */
14863 if (htab->stub_bfd && htab->stub_bfd->sections)
14865 asection* stub_sec;
14867 for (stub_sec = htab->stub_bfd->sections;
14869 stub_sec = stub_sec->next)
14871 /* Ignore non-stub sections. */
14872 if (!strstr (stub_sec->name, STUB_SUFFIX))
14875 osi.sec = stub_sec;
14877 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14878 (output_bfd, osi.sec->output_section);
14880 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
14884 /* Finally, output mapping symbols for the PLT. */
14885 if (htab->root.splt && htab->root.splt->size > 0)
14887 osi.sec = htab->root.splt;
14888 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
14889 (output_bfd, osi.sec->output_section));
14891 /* Output mapping symbols for the plt header. SymbianOS does not have a
14893 if (htab->vxworks_p)
14895 /* VxWorks shared libraries have no PLT header. */
14898 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
14900 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
14904 else if (htab->nacl_p)
14906 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
14909 else if (!htab->symbian_p)
14911 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
14913 #ifndef FOUR_WORD_PLT
14914 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
14919 if ((htab->root.splt && htab->root.splt->size > 0)
14920 || (htab->root.iplt && htab->root.iplt->size > 0))
14922 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
14923 for (input_bfd = info->input_bfds;
14925 input_bfd = input_bfd->link_next)
14927 struct arm_local_iplt_info **local_iplt;
14928 unsigned int i, num_syms;
14930 local_iplt = elf32_arm_local_iplt (input_bfd);
14931 if (local_iplt != NULL)
14933 num_syms = elf_symtab_hdr (input_bfd).sh_info;
14934 for (i = 0; i < num_syms; i++)
14935 if (local_iplt[i] != NULL
14936 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
14937 &local_iplt[i]->root,
14938 &local_iplt[i]->arm))
14943 if (htab->dt_tlsdesc_plt != 0)
14945 /* Mapping symbols for the lazy tls trampoline. */
14946 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
14949 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
14950 htab->dt_tlsdesc_plt + 24))
14953 if (htab->tls_trampoline != 0)
14955 /* Mapping symbols for the tls trampoline. */
14956 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
14958 #ifdef FOUR_WORD_PLT
14959 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
14960 htab->tls_trampoline + 12))
14968 /* Allocate target specific section data. */
14971 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
14973 if (!sec->used_by_bfd)
14975 _arm_elf_section_data *sdata;
14976 bfd_size_type amt = sizeof (*sdata);
14978 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
14981 sec->used_by_bfd = sdata;
14984 return _bfd_elf_new_section_hook (abfd, sec);
14988 /* Used to order a list of mapping symbols by address. */
14991 elf32_arm_compare_mapping (const void * a, const void * b)
14993 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
14994 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
14996 if (amap->vma > bmap->vma)
14998 else if (amap->vma < bmap->vma)
15000 else if (amap->type > bmap->type)
15001 /* Ensure results do not depend on the host qsort for objects with
15002 multiple mapping symbols at the same address by sorting on type
15005 else if (amap->type < bmap->type)
15011 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
15013 static unsigned long
15014 offset_prel31 (unsigned long addr, bfd_vma offset)
15016 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
15019 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
15023 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
15025 unsigned long first_word = bfd_get_32 (output_bfd, from);
15026 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
15028 /* High bit of first word is supposed to be zero. */
15029 if ((first_word & 0x80000000ul) == 0)
15030 first_word = offset_prel31 (first_word, offset);
15032 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
15033 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
15034 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
15035 second_word = offset_prel31 (second_word, offset);
15037 bfd_put_32 (output_bfd, first_word, to);
15038 bfd_put_32 (output_bfd, second_word, to + 4);
15041 /* Data for make_branch_to_a8_stub(). */
15043 struct a8_branch_to_stub_data
15045 asection *writing_section;
15046 bfd_byte *contents;
15050 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
15051 places for a particular section. */
15054 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
15057 struct elf32_arm_stub_hash_entry *stub_entry;
15058 struct a8_branch_to_stub_data *data;
15059 bfd_byte *contents;
15060 unsigned long branch_insn;
15061 bfd_vma veneered_insn_loc, veneer_entry_loc;
15062 bfd_signed_vma branch_offset;
15064 unsigned int target;
15066 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
15067 data = (struct a8_branch_to_stub_data *) in_arg;
15069 if (stub_entry->target_section != data->writing_section
15070 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
15073 contents = data->contents;
15075 veneered_insn_loc = stub_entry->target_section->output_section->vma
15076 + stub_entry->target_section->output_offset
15077 + stub_entry->target_value;
15079 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
15080 + stub_entry->stub_sec->output_offset
15081 + stub_entry->stub_offset;
15083 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
15084 veneered_insn_loc &= ~3u;
15086 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
15088 abfd = stub_entry->target_section->owner;
15089 target = stub_entry->target_value;
15091 /* We attempt to avoid this condition by setting stubs_always_after_branch
15092 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
15093 This check is just to be on the safe side... */
15094 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
15096 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
15097 "allocated in unsafe location"), abfd);
15101 switch (stub_entry->stub_type)
15103 case arm_stub_a8_veneer_b:
15104 case arm_stub_a8_veneer_b_cond:
15105 branch_insn = 0xf0009000;
15108 case arm_stub_a8_veneer_blx:
15109 branch_insn = 0xf000e800;
15112 case arm_stub_a8_veneer_bl:
15114 unsigned int i1, j1, i2, j2, s;
15116 branch_insn = 0xf000d000;
15119 if (branch_offset < -16777216 || branch_offset > 16777214)
15121 /* There's not much we can do apart from complain if this
15123 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
15124 "of range (input file too large)"), abfd);
15128 /* i1 = not(j1 eor s), so:
15130 j1 = (not i1) eor s. */
15132 branch_insn |= (branch_offset >> 1) & 0x7ff;
15133 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
15134 i2 = (branch_offset >> 22) & 1;
15135 i1 = (branch_offset >> 23) & 1;
15136 s = (branch_offset >> 24) & 1;
15139 branch_insn |= j2 << 11;
15140 branch_insn |= j1 << 13;
15141 branch_insn |= s << 26;
15150 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
15151 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
15156 /* Do code byteswapping. Return FALSE afterwards so that the section is
15157 written out as normal. */
15160 elf32_arm_write_section (bfd *output_bfd,
15161 struct bfd_link_info *link_info,
15163 bfd_byte *contents)
15165 unsigned int mapcount, errcount;
15166 _arm_elf_section_data *arm_data;
15167 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
15168 elf32_arm_section_map *map;
15169 elf32_vfp11_erratum_list *errnode;
15172 bfd_vma offset = sec->output_section->vma + sec->output_offset;
15176 if (globals == NULL)
15179 /* If this section has not been allocated an _arm_elf_section_data
15180 structure then we cannot record anything. */
15181 arm_data = get_arm_elf_section_data (sec);
15182 if (arm_data == NULL)
15185 mapcount = arm_data->mapcount;
15186 map = arm_data->map;
15187 errcount = arm_data->erratumcount;
15191 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
15193 for (errnode = arm_data->erratumlist; errnode != 0;
15194 errnode = errnode->next)
15196 bfd_vma target = errnode->vma - offset;
15198 switch (errnode->type)
15200 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
15202 bfd_vma branch_to_veneer;
15203 /* Original condition code of instruction, plus bit mask for
15204 ARM B instruction. */
15205 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
15208 /* The instruction is before the label. */
15211 /* Above offset included in -4 below. */
15212 branch_to_veneer = errnode->u.b.veneer->vma
15213 - errnode->vma - 4;
15215 if ((signed) branch_to_veneer < -(1 << 25)
15216 || (signed) branch_to_veneer >= (1 << 25))
15217 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15218 "range"), output_bfd);
15220 insn |= (branch_to_veneer >> 2) & 0xffffff;
15221 contents[endianflip ^ target] = insn & 0xff;
15222 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15223 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15224 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15228 case VFP11_ERRATUM_ARM_VENEER:
15230 bfd_vma branch_from_veneer;
15233 /* Take size of veneer into account. */
15234 branch_from_veneer = errnode->u.v.branch->vma
15235 - errnode->vma - 12;
15237 if ((signed) branch_from_veneer < -(1 << 25)
15238 || (signed) branch_from_veneer >= (1 << 25))
15239 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15240 "range"), output_bfd);
15242 /* Original instruction. */
15243 insn = errnode->u.v.branch->u.b.vfp_insn;
15244 contents[endianflip ^ target] = insn & 0xff;
15245 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15246 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15247 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15249 /* Branch back to insn after original insn. */
15250 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
15251 contents[endianflip ^ (target + 4)] = insn & 0xff;
15252 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
15253 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
15254 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
15264 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
15266 arm_unwind_table_edit *edit_node
15267 = arm_data->u.exidx.unwind_edit_list;
15268 /* Now, sec->size is the size of the section we will write. The original
15269 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
15270 markers) was sec->rawsize. (This isn't the case if we perform no
15271 edits, then rawsize will be zero and we should use size). */
15272 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
15273 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
15274 unsigned int in_index, out_index;
15275 bfd_vma add_to_offsets = 0;
15277 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
15281 unsigned int edit_index = edit_node->index;
15283 if (in_index < edit_index && in_index * 8 < input_size)
15285 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15286 contents + in_index * 8, add_to_offsets);
15290 else if (in_index == edit_index
15291 || (in_index * 8 >= input_size
15292 && edit_index == UINT_MAX))
15294 switch (edit_node->type)
15296 case DELETE_EXIDX_ENTRY:
15298 add_to_offsets += 8;
15301 case INSERT_EXIDX_CANTUNWIND_AT_END:
15303 asection *text_sec = edit_node->linked_section;
15304 bfd_vma text_offset = text_sec->output_section->vma
15305 + text_sec->output_offset
15307 bfd_vma exidx_offset = offset + out_index * 8;
15308 unsigned long prel31_offset;
15310 /* Note: this is meant to be equivalent to an
15311 R_ARM_PREL31 relocation. These synthetic
15312 EXIDX_CANTUNWIND markers are not relocated by the
15313 usual BFD method. */
15314 prel31_offset = (text_offset - exidx_offset)
15317 /* First address we can't unwind. */
15318 bfd_put_32 (output_bfd, prel31_offset,
15319 &edited_contents[out_index * 8]);
15321 /* Code for EXIDX_CANTUNWIND. */
15322 bfd_put_32 (output_bfd, 0x1,
15323 &edited_contents[out_index * 8 + 4]);
15326 add_to_offsets -= 8;
15331 edit_node = edit_node->next;
15336 /* No more edits, copy remaining entries verbatim. */
15337 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15338 contents + in_index * 8, add_to_offsets);
15344 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
15345 bfd_set_section_contents (output_bfd, sec->output_section,
15347 (file_ptr) sec->output_offset, sec->size);
15352 /* Fix code to point to Cortex-A8 erratum stubs. */
15353 if (globals->fix_cortex_a8)
15355 struct a8_branch_to_stub_data data;
15357 data.writing_section = sec;
15358 data.contents = contents;
15360 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
15367 if (globals->byteswap_code)
15369 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
15372 for (i = 0; i < mapcount; i++)
15374 if (i == mapcount - 1)
15377 end = map[i + 1].vma;
15379 switch (map[i].type)
15382 /* Byte swap code words. */
15383 while (ptr + 3 < end)
15385 tmp = contents[ptr];
15386 contents[ptr] = contents[ptr + 3];
15387 contents[ptr + 3] = tmp;
15388 tmp = contents[ptr + 1];
15389 contents[ptr + 1] = contents[ptr + 2];
15390 contents[ptr + 2] = tmp;
15396 /* Byte swap code halfwords. */
15397 while (ptr + 1 < end)
15399 tmp = contents[ptr];
15400 contents[ptr] = contents[ptr + 1];
15401 contents[ptr + 1] = tmp;
15407 /* Leave data alone. */
15415 arm_data->mapcount = -1;
15416 arm_data->mapsize = 0;
15417 arm_data->map = NULL;
15422 /* Mangle thumb function symbols as we read them in. */
15425 elf32_arm_swap_symbol_in (bfd * abfd,
15428 Elf_Internal_Sym *dst)
15430 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
15433 /* New EABI objects mark thumb function symbols by setting the low bit of
15435 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
15436 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
15438 if (dst->st_value & 1)
15440 dst->st_value &= ~(bfd_vma) 1;
15441 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15444 dst->st_target_internal = ST_BRANCH_TO_ARM;
15446 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
15448 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
15449 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15451 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
15452 dst->st_target_internal = ST_BRANCH_LONG;
15454 dst->st_target_internal = ST_BRANCH_UNKNOWN;
15460 /* Mangle thumb function symbols as we write them out. */
15463 elf32_arm_swap_symbol_out (bfd *abfd,
15464 const Elf_Internal_Sym *src,
15468 Elf_Internal_Sym newsym;
15470 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
15471 of the address set, as per the new EABI. We do this unconditionally
15472 because objcopy does not set the elf header flags until after
15473 it writes out the symbol table. */
15474 if (src->st_target_internal == ST_BRANCH_TO_THUMB)
15477 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
15478 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
15479 if (newsym.st_shndx != SHN_UNDEF)
15481 /* Do this only for defined symbols. At link type, the static
15482 linker will simulate the work of dynamic linker of resolving
15483 symbols and will carry over the thumbness of found symbols to
15484 the output symbol table. It's not clear how it happens, but
15485 the thumbness of undefined symbols can well be different at
15486 runtime, and writing '1' for them will be confusing for users
15487 and possibly for dynamic linker itself.
15489 newsym.st_value |= 1;
15494 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
15497 /* Add the PT_ARM_EXIDX program header. */
15500 elf32_arm_modify_segment_map (bfd *abfd,
15501 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15503 struct elf_segment_map *m;
15506 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15507 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15509 /* If there is already a PT_ARM_EXIDX header, then we do not
15510 want to add another one. This situation arises when running
15511 "strip"; the input binary already has the header. */
15512 m = elf_tdata (abfd)->segment_map;
15513 while (m && m->p_type != PT_ARM_EXIDX)
15517 m = (struct elf_segment_map *)
15518 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
15521 m->p_type = PT_ARM_EXIDX;
15523 m->sections[0] = sec;
15525 m->next = elf_tdata (abfd)->segment_map;
15526 elf_tdata (abfd)->segment_map = m;
15533 /* We may add a PT_ARM_EXIDX program header. */
15536 elf32_arm_additional_program_headers (bfd *abfd,
15537 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15541 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15542 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15548 /* Hook called by the linker routine which adds symbols from an object
15552 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
15553 Elf_Internal_Sym *sym, const char **namep,
15554 flagword *flagsp, asection **secp, bfd_vma *valp)
15556 if ((abfd->flags & DYNAMIC) == 0
15557 && (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
15558 || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE))
15559 elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE;
15561 if (elf32_arm_hash_table (info)->vxworks_p
15562 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
15563 flagsp, secp, valp))
15569 /* We use this to override swap_symbol_in and swap_symbol_out. */
15570 const struct elf_size_info elf32_arm_size_info =
15572 sizeof (Elf32_External_Ehdr),
15573 sizeof (Elf32_External_Phdr),
15574 sizeof (Elf32_External_Shdr),
15575 sizeof (Elf32_External_Rel),
15576 sizeof (Elf32_External_Rela),
15577 sizeof (Elf32_External_Sym),
15578 sizeof (Elf32_External_Dyn),
15579 sizeof (Elf_External_Note),
15583 ELFCLASS32, EV_CURRENT,
15584 bfd_elf32_write_out_phdrs,
15585 bfd_elf32_write_shdrs_and_ehdr,
15586 bfd_elf32_checksum_contents,
15587 bfd_elf32_write_relocs,
15588 elf32_arm_swap_symbol_in,
15589 elf32_arm_swap_symbol_out,
15590 bfd_elf32_slurp_reloc_table,
15591 bfd_elf32_slurp_symbol_table,
15592 bfd_elf32_swap_dyn_in,
15593 bfd_elf32_swap_dyn_out,
15594 bfd_elf32_swap_reloc_in,
15595 bfd_elf32_swap_reloc_out,
15596 bfd_elf32_swap_reloca_in,
15597 bfd_elf32_swap_reloca_out
15600 #define ELF_ARCH bfd_arch_arm
15601 #define ELF_TARGET_ID ARM_ELF_DATA
15602 #define ELF_MACHINE_CODE EM_ARM
15603 #ifdef __QNXTARGET__
15604 #define ELF_MAXPAGESIZE 0x1000
15606 #define ELF_MAXPAGESIZE 0x8000
15608 #define ELF_MINPAGESIZE 0x1000
15609 #define ELF_COMMONPAGESIZE 0x1000
15611 #define bfd_elf32_mkobject elf32_arm_mkobject
15613 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
15614 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
15615 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
15616 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
15617 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
15618 #define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
15619 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
15620 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
15621 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
15622 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
15623 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
15624 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
15625 #define bfd_elf32_bfd_final_link elf32_arm_final_link
15627 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
15628 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
15629 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
15630 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
15631 #define elf_backend_check_relocs elf32_arm_check_relocs
15632 #define elf_backend_relocate_section elf32_arm_relocate_section
15633 #define elf_backend_write_section elf32_arm_write_section
15634 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
15635 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
15636 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
15637 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
15638 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
15639 #define elf_backend_always_size_sections elf32_arm_always_size_sections
15640 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
15641 #define elf_backend_post_process_headers elf32_arm_post_process_headers
15642 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
15643 #define elf_backend_object_p elf32_arm_object_p
15644 #define elf_backend_fake_sections elf32_arm_fake_sections
15645 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
15646 #define elf_backend_final_write_processing elf32_arm_final_write_processing
15647 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
15648 #define elf_backend_size_info elf32_arm_size_info
15649 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
15650 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
15651 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
15652 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
15653 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
15655 #define elf_backend_can_refcount 1
15656 #define elf_backend_can_gc_sections 1
15657 #define elf_backend_plt_readonly 1
15658 #define elf_backend_want_got_plt 1
15659 #define elf_backend_want_plt_sym 0
15660 #define elf_backend_may_use_rel_p 1
15661 #define elf_backend_may_use_rela_p 0
15662 #define elf_backend_default_use_rela_p 0
15664 #define elf_backend_got_header_size 12
15666 #undef elf_backend_obj_attrs_vendor
15667 #define elf_backend_obj_attrs_vendor "aeabi"
15668 #undef elf_backend_obj_attrs_section
15669 #define elf_backend_obj_attrs_section ".ARM.attributes"
15670 #undef elf_backend_obj_attrs_arg_type
15671 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
15672 #undef elf_backend_obj_attrs_section_type
15673 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
15674 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
15675 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
15677 #include "elf32-target.h"
15679 /* Native Client targets. */
15681 #undef TARGET_LITTLE_SYM
15682 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_nacl_vec
15683 #undef TARGET_LITTLE_NAME
15684 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
15685 #undef TARGET_BIG_SYM
15686 #define TARGET_BIG_SYM bfd_elf32_bigarm_nacl_vec
15687 #undef TARGET_BIG_NAME
15688 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
15690 /* Like elf32_arm_link_hash_table_create -- but overrides
15691 appropriately for NaCl. */
15693 static struct bfd_link_hash_table *
15694 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
15696 struct bfd_link_hash_table *ret;
15698 ret = elf32_arm_link_hash_table_create (abfd);
15701 struct elf32_arm_link_hash_table *htab
15702 = (struct elf32_arm_link_hash_table *) ret;
15706 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
15707 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
15712 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
15713 really need to use elf32_arm_modify_segment_map. But we do it
15714 anyway just to reduce gratuitous differences with the stock ARM backend. */
15717 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
15719 return (elf32_arm_modify_segment_map (abfd, info)
15720 && nacl_modify_segment_map (abfd, info));
15724 #define elf32_bed elf32_arm_nacl_bed
15725 #undef bfd_elf32_bfd_link_hash_table_create
15726 #define bfd_elf32_bfd_link_hash_table_create \
15727 elf32_arm_nacl_link_hash_table_create
15728 #undef elf_backend_plt_alignment
15729 #define elf_backend_plt_alignment 4
15730 #undef elf_backend_modify_segment_map
15731 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
15732 #undef elf_backend_modify_program_headers
15733 #define elf_backend_modify_program_headers nacl_modify_program_headers
15735 #undef ELF_MAXPAGESIZE
15736 #define ELF_MAXPAGESIZE 0x10000
15738 #include "elf32-target.h"
15740 /* Reset to defaults. */
15741 #undef elf_backend_plt_alignment
15742 #undef elf_backend_modify_segment_map
15743 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
15744 #undef elf_backend_modify_program_headers
15746 /* VxWorks Targets. */
15748 #undef TARGET_LITTLE_SYM
15749 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
15750 #undef TARGET_LITTLE_NAME
15751 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
15752 #undef TARGET_BIG_SYM
15753 #define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
15754 #undef TARGET_BIG_NAME
15755 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
15757 /* Like elf32_arm_link_hash_table_create -- but overrides
15758 appropriately for VxWorks. */
15760 static struct bfd_link_hash_table *
15761 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
15763 struct bfd_link_hash_table *ret;
15765 ret = elf32_arm_link_hash_table_create (abfd);
15768 struct elf32_arm_link_hash_table *htab
15769 = (struct elf32_arm_link_hash_table *) ret;
15771 htab->vxworks_p = 1;
15777 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
15779 elf32_arm_final_write_processing (abfd, linker);
15780 elf_vxworks_final_write_processing (abfd, linker);
15784 #define elf32_bed elf32_arm_vxworks_bed
15786 #undef bfd_elf32_bfd_link_hash_table_create
15787 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
15788 #undef elf_backend_final_write_processing
15789 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
15790 #undef elf_backend_emit_relocs
15791 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
15793 #undef elf_backend_may_use_rel_p
15794 #define elf_backend_may_use_rel_p 0
15795 #undef elf_backend_may_use_rela_p
15796 #define elf_backend_may_use_rela_p 1
15797 #undef elf_backend_default_use_rela_p
15798 #define elf_backend_default_use_rela_p 1
15799 #undef elf_backend_want_plt_sym
15800 #define elf_backend_want_plt_sym 1
15801 #undef ELF_MAXPAGESIZE
15802 #define ELF_MAXPAGESIZE 0x1000
15804 #include "elf32-target.h"
15807 /* Merge backend specific data from an object file to the output
15808 object file when linking. */
15811 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
15813 flagword out_flags;
15815 bfd_boolean flags_compatible = TRUE;
15818 /* Check if we have the same endianness. */
15819 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
15822 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
15825 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
15828 /* The input BFD must have had its flags initialised. */
15829 /* The following seems bogus to me -- The flags are initialized in
15830 the assembler but I don't think an elf_flags_init field is
15831 written into the object. */
15832 /* BFD_ASSERT (elf_flags_init (ibfd)); */
15834 in_flags = elf_elfheader (ibfd)->e_flags;
15835 out_flags = elf_elfheader (obfd)->e_flags;
15837 /* In theory there is no reason why we couldn't handle this. However
15838 in practice it isn't even close to working and there is no real
15839 reason to want it. */
15840 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
15841 && !(ibfd->flags & DYNAMIC)
15842 && (in_flags & EF_ARM_BE8))
15844 _bfd_error_handler (_("error: %B is already in final BE8 format"),
15849 if (!elf_flags_init (obfd))
15851 /* If the input is the default architecture and had the default
15852 flags then do not bother setting the flags for the output
15853 architecture, instead allow future merges to do this. If no
15854 future merges ever set these flags then they will retain their
15855 uninitialised values, which surprise surprise, correspond
15856 to the default values. */
15857 if (bfd_get_arch_info (ibfd)->the_default
15858 && elf_elfheader (ibfd)->e_flags == 0)
15861 elf_flags_init (obfd) = TRUE;
15862 elf_elfheader (obfd)->e_flags = in_flags;
15864 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
15865 && bfd_get_arch_info (obfd)->the_default)
15866 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
15871 /* Determine what should happen if the input ARM architecture
15872 does not match the output ARM architecture. */
15873 if (! bfd_arm_merge_machines (ibfd, obfd))
15876 /* Identical flags must be compatible. */
15877 if (in_flags == out_flags)
15880 /* Check to see if the input BFD actually contains any sections. If
15881 not, its flags may not have been initialised either, but it
15882 cannot actually cause any incompatiblity. Do not short-circuit
15883 dynamic objects; their section list may be emptied by
15884 elf_link_add_object_symbols.
15886 Also check to see if there are no code sections in the input.
15887 In this case there is no need to check for code specific flags.
15888 XXX - do we need to worry about floating-point format compatability
15889 in data sections ? */
15890 if (!(ibfd->flags & DYNAMIC))
15892 bfd_boolean null_input_bfd = TRUE;
15893 bfd_boolean only_data_sections = TRUE;
15895 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
15897 /* Ignore synthetic glue sections. */
15898 if (strcmp (sec->name, ".glue_7")
15899 && strcmp (sec->name, ".glue_7t"))
15901 if ((bfd_get_section_flags (ibfd, sec)
15902 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
15903 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
15904 only_data_sections = FALSE;
15906 null_input_bfd = FALSE;
15911 if (null_input_bfd || only_data_sections)
15915 /* Complain about various flag mismatches. */
15916 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
15917 EF_ARM_EABI_VERSION (out_flags)))
15920 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
15922 (in_flags & EF_ARM_EABIMASK) >> 24,
15923 (out_flags & EF_ARM_EABIMASK) >> 24);
15927 /* Not sure what needs to be checked for EABI versions >= 1. */
15928 /* VxWorks libraries do not use these flags. */
15929 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
15930 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
15931 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
15933 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
15936 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
15938 in_flags & EF_ARM_APCS_26 ? 26 : 32,
15939 out_flags & EF_ARM_APCS_26 ? 26 : 32);
15940 flags_compatible = FALSE;
15943 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
15945 if (in_flags & EF_ARM_APCS_FLOAT)
15947 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
15951 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
15954 flags_compatible = FALSE;
15957 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
15959 if (in_flags & EF_ARM_VFP_FLOAT)
15961 (_("error: %B uses VFP instructions, whereas %B does not"),
15965 (_("error: %B uses FPA instructions, whereas %B does not"),
15968 flags_compatible = FALSE;
15971 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
15973 if (in_flags & EF_ARM_MAVERICK_FLOAT)
15975 (_("error: %B uses Maverick instructions, whereas %B does not"),
15979 (_("error: %B does not use Maverick instructions, whereas %B does"),
15982 flags_compatible = FALSE;
15985 #ifdef EF_ARM_SOFT_FLOAT
15986 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
15988 /* We can allow interworking between code that is VFP format
15989 layout, and uses either soft float or integer regs for
15990 passing floating point arguments and results. We already
15991 know that the APCS_FLOAT flags match; similarly for VFP
15993 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
15994 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
15996 if (in_flags & EF_ARM_SOFT_FLOAT)
15998 (_("error: %B uses software FP, whereas %B uses hardware FP"),
16002 (_("error: %B uses hardware FP, whereas %B uses software FP"),
16005 flags_compatible = FALSE;
16010 /* Interworking mismatch is only a warning. */
16011 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
16013 if (in_flags & EF_ARM_INTERWORK)
16016 (_("Warning: %B supports interworking, whereas %B does not"),
16022 (_("Warning: %B does not support interworking, whereas %B does"),
16028 return flags_compatible;
16032 /* Symbian OS Targets. */
16034 #undef TARGET_LITTLE_SYM
16035 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
16036 #undef TARGET_LITTLE_NAME
16037 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
16038 #undef TARGET_BIG_SYM
16039 #define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
16040 #undef TARGET_BIG_NAME
16041 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
16043 /* Like elf32_arm_link_hash_table_create -- but overrides
16044 appropriately for Symbian OS. */
16046 static struct bfd_link_hash_table *
16047 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
16049 struct bfd_link_hash_table *ret;
16051 ret = elf32_arm_link_hash_table_create (abfd);
16054 struct elf32_arm_link_hash_table *htab
16055 = (struct elf32_arm_link_hash_table *)ret;
16056 /* There is no PLT header for Symbian OS. */
16057 htab->plt_header_size = 0;
16058 /* The PLT entries are each one instruction and one word. */
16059 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
16060 htab->symbian_p = 1;
16061 /* Symbian uses armv5t or above, so use_blx is always true. */
16063 htab->root.is_relocatable_executable = 1;
16068 static const struct bfd_elf_special_section
16069 elf32_arm_symbian_special_sections[] =
16071 /* In a BPABI executable, the dynamic linking sections do not go in
16072 the loadable read-only segment. The post-linker may wish to
16073 refer to these sections, but they are not part of the final
16075 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
16076 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
16077 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
16078 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
16079 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
16080 /* These sections do not need to be writable as the SymbianOS
16081 postlinker will arrange things so that no dynamic relocation is
16083 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
16084 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
16085 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
16086 { NULL, 0, 0, 0, 0 }
16090 elf32_arm_symbian_begin_write_processing (bfd *abfd,
16091 struct bfd_link_info *link_info)
16093 /* BPABI objects are never loaded directly by an OS kernel; they are
16094 processed by a postlinker first, into an OS-specific format. If
16095 the D_PAGED bit is set on the file, BFD will align segments on
16096 page boundaries, so that an OS can directly map the file. With
16097 BPABI objects, that just results in wasted space. In addition,
16098 because we clear the D_PAGED bit, map_sections_to_segments will
16099 recognize that the program headers should not be mapped into any
16100 loadable segment. */
16101 abfd->flags &= ~D_PAGED;
16102 elf32_arm_begin_write_processing (abfd, link_info);
16106 elf32_arm_symbian_modify_segment_map (bfd *abfd,
16107 struct bfd_link_info *info)
16109 struct elf_segment_map *m;
16112 /* BPABI shared libraries and executables should have a PT_DYNAMIC
16113 segment. However, because the .dynamic section is not marked
16114 with SEC_LOAD, the generic ELF code will not create such a
16116 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
16119 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
16120 if (m->p_type == PT_DYNAMIC)
16125 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
16126 m->next = elf_tdata (abfd)->segment_map;
16127 elf_tdata (abfd)->segment_map = m;
16131 /* Also call the generic arm routine. */
16132 return elf32_arm_modify_segment_map (abfd, info);
16135 /* Return address for Ith PLT stub in section PLT, for relocation REL
16136 or (bfd_vma) -1 if it should not be included. */
16139 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
16140 const arelent *rel ATTRIBUTE_UNUSED)
16142 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
16147 #define elf32_bed elf32_arm_symbian_bed
16149 /* The dynamic sections are not allocated on SymbianOS; the postlinker
16150 will process them and then discard them. */
16151 #undef ELF_DYNAMIC_SEC_FLAGS
16152 #define ELF_DYNAMIC_SEC_FLAGS \
16153 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
16155 #undef elf_backend_emit_relocs
16157 #undef bfd_elf32_bfd_link_hash_table_create
16158 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
16159 #undef elf_backend_special_sections
16160 #define elf_backend_special_sections elf32_arm_symbian_special_sections
16161 #undef elf_backend_begin_write_processing
16162 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
16163 #undef elf_backend_final_write_processing
16164 #define elf_backend_final_write_processing elf32_arm_final_write_processing
16166 #undef elf_backend_modify_segment_map
16167 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
16169 /* There is no .got section for BPABI objects, and hence no header. */
16170 #undef elf_backend_got_header_size
16171 #define elf_backend_got_header_size 0
16173 /* Similarly, there is no .got.plt section. */
16174 #undef elf_backend_want_got_plt
16175 #define elf_backend_want_got_plt 0
16177 #undef elf_backend_plt_sym_val
16178 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
16180 #undef elf_backend_may_use_rel_p
16181 #define elf_backend_may_use_rel_p 1
16182 #undef elf_backend_may_use_rela_p
16183 #define elf_backend_may_use_rela_p 0
16184 #undef elf_backend_default_use_rela_p
16185 #define elf_backend_default_use_rela_p 0
16186 #undef elf_backend_want_plt_sym
16187 #define elf_backend_want_plt_sym 0
16188 #undef ELF_MAXPAGESIZE
16189 #define ELF_MAXPAGESIZE 0x8000
16191 #include "elf32-target.h"