7 * mips-dis.c (print_insn_arg): Handle '[', ']', 'e' and '%'.
8 (mips_isa_type): Handle bfd_mach_mips4120, bfd_mach_mips5400
10 * mips-opc.c (V1): Include INSN_4111 and INSN_4120.
11 (N411, N412, N5, N54, N55): New convenience defines.
12 (mips_builtin_opcodes): Add vr4120, vr5400 and vr5500 opcodes.
13 Change dmadd16 and madd16 from V1 to N411.
17 * mips-dis.c (print_insn_mips): Always allow disassembly of
22 * po/de.po: Updated German translation.
26 * Makefile.am: Run "make dep-am".
27 * Makefile.in: Regenerate.
28 * po/POTFILES.in: Regenerate.
32 * ppc-opc.c (CRFD, CRFS): Add PPC_OPERAND_CR flag so that cr
33 register names are accepted.
37 * tic4x-dis.c: Add function declarations and ATTRIBUTE_UNUSED.
38 Convert functions to K&R format.
42 * ppc-opc.c (MFDEC2): Include Book-E.
43 (PPCCHLK64): New opcode mask.
44 (evsubw, evsubiw, evmr, evnot, isellt, iselgt, iseleq, mfpid,
45 mfcsrr0, mfcsrr1, mfdear, mfesr, mfivpr, mfusprg0, mftbl,
46 mftbu, mfpir, mfdbsr, mfdbcr0, mfdbcr1, mfdbcr2, mfiac1,
47 mfiac2, mfiac3, mfiac4, mfdac1, mfdac2, mfdvc1, mfdvc2, mftsr,
48 mftcr, mfivor0, mfivor1, mfivor2, mfivor3, mfivor4, mfivor5,
49 mfivor6, mfivor7, mfivor8, mfivor9, mfivor10, mfivor11,
50 mfivor12, mfivor13, mfivor14, mfivor15, mfbbear, mfmcsrr0,
51 mfmcsrr1, mfmcsr, mtpid, mtdecar, mtcsrr0, mtcsrr1, mtdear,
52 mtesr, mtivpr, mtusprg0, mtsprg4, mtsprg5, mtsprg6, mtsprg7,
53 mtdbsr, mtdbcr0, mtdbcr1, mtdbcr2, mtiac1, mtiac2, mtiac3,
54 mtiac4, mtdac1, mtdac2, mtdvc1, mtdvc2, mttsr, mttcr, mtivor0,
55 mtivor1, mtivor2, mtivor3, mtivor4, mtivor5, mtivor6, mtivor7,
56 mtivor8, mtivor9, mtivor10, mtivor11, mtivor12, mtivor13,
57 mtivor14, mtivor15, mtbbear, mtmcsrr0, mtmcsrr1, mtmcsr): New
59 (evfsneg): Fix opcode value.
60 (dcbtstlse, dcbtlse, icblce, dcblce, icbtsle): Use PPCCHLK64
62 (mcrxr64, tlbivaxe, tlbsxe, tlbsxe.): Restrict to 64-bit
64 (extsw): Restrict to 64-bit PPC instruction sets.
65 (extsw.): Does not exist in 64-bit Book-E.
66 (powerpc_macro): Remove mftbl, mftbu and mftb Book-E macros as
67 they are no longer needed.
71 * ppc-dis.c (powerpc_dialect): Add missing PPC_OPCODE_CLASSIC.
75 * po/da.po: Updated Danish translation file.
79 * ppc-opc.c (extsw, extsw.): Do not allow for the BookE32.
83 * disassemble.c (disassembler_usage): Add invocation of
84 print_ppc_disassembler_options.
85 * ppc-dis.c (print_ppc_disassembler_options): New function.
89 * ppc-opc.c: The BookE implementations of the TLBWE and TLBRE
90 instructions do not take any arguments.
94 * v850-opc.c: Remove redundant references to V850EA architecture.
98 * arc-opc.c: Include bfd.h.
99 (arc_get_opcode_mach): Subtract off base bfd_mach value.
103 * v850-dis.c (disassemble): Remove bfd_mach_v850ea case.
105 * mips-dis.c (_print_insn_mips): Don't use hard-coded mach constants.
109 * configure.in: Added bfd_tic4x_arch.
110 * configure: Regenerate.
111 * Makefile.am: Added tic4x-dis.o target.
112 * Makefile.in: Regenerate.
116 * disassemble.c: Added tic4x target and c4x
117 disassembler routine.
118 * tic4x-dis.c: New file.
122 * z8k-dis.c (unparse_instr): case CLASS_BA: Designate hex
124 * z8kgen.c (opt): Fix definition of "in rd,imm16" opcode.
125 * z8k-opc.h: Regenerated with new z8kgen.c.
131 * ppc-dis.c (powerpc_dialect): Support `-m500', `-m500x2' and
132 `-mefs'. Turn off AltiVec for E500 and efs.
133 (print_insn_powerpc): Don't print an AltiVec instruction if the
136 * ppc-opc.c (insert_pmrn, extract_pmrn, insert_ev2, extract_ev2,
137 insert_ev4, extract_ev4, insert_ev8, extract_ev8): New functions
138 for extracting pmrn/evld/evstd/etc operands.
139 (CRB, CRFD, CRFS, DC, RD): New instruction fields.
140 (CT): Make this equal to RD + 1.
143 (EVUIMM, EVUIMM_2, EVUIMM_4, EVUIMM_8): New operands.
145 (EVSEL, EVSEL_MASK): New instruction form and mask for EVSEL.
146 (ISEL, ISEL_MASK): New instruction form and mask for ISEL.
147 (XISEL, XISEL_MASK): New instruction form and mask for ISEL.
148 (CTX, CTX_MASK): New instruction form and mask for context cache
150 (UCTX, UCTX_MASK): New instruction form and mask for user context
152 (XC, XC_MASK, XUC, XUC_MASK): New instruction forms.
153 (CLASSIC): New define.
154 (PPCESPE): New define.
155 (PPCISEL, , PPCBRLK, PPCPMR, PPCCHLK, PPCRFMI): New
156 defines for integer select, cache control, branch
157 locking, power management, cache locking and machine check
158 APU instructions, respectively.
159 (efsabs, efsnabs, efsneg, efsadd, efssub, efsmul,
160 efsdiv, efscmpgt, efscmplt, efscmpeq, efststgt, efststlt,
161 efststeq, efscfui, efsctuiz, efscfsi, efscfuf, efscfsf,
162 efsctui, efsctsi, efsctsiz, efsctuf, efsctsf,
163 evaddw, evaddiw, evsubfw, evsubifw, evabs, evneg, evextsb,
164 evextsh, evrndw, evcntlzw, evcntlsw, brinc, evand, evandc, evor,
165 evorc, evxor, eveqv, evnand, evnor, evrlw, evrlwi, evslw, evslwi,
166 evsrws, evsrwu, evsrwis, evsrwiu, evsplati, evsplatfi, evmergehi,
167 evmergelo, evmergehilo, evmergelohi, evcmpgts, evcmpgtu, evcmplts,
168 evcmpltu, evcmpeq, evsel, evldd, evlddx, evldw, evldwx, evldh,
169 evldhx, evlwhe, evlwhex, evlwhou, evlwhoux, evlwhos, evlwhosx,
170 evlwwsplat, evlwwsplatx, evlwhsplat, evlwhsplatx, evlhhesplat,
171 evlhhesplatx, evlhousplat, evlhousplatx, evlhossplat, evlhossplatx,
172 evstdd, evstddx, evstdw, evstdwx, evstdh, evstdhx, evstwwe,
173 evstwwex, evstwwo, evstwwox, evstwhe, evstwhex, evstwho, evstwhox,
174 evfsabs, evfsnabs, evfsneg, evfsadd, evfssub, evfsmul, evfsdiv,
175 evfscmpgt, evfscmplt, evfscmpeq, evfststgt, evfststlt, evfststeq,
176 evfscfui, evfsctuiz, evfscfsi, evfscfuf, evfscfsf, evfsctui,
177 evfsctsi, evfsctsiz, evfsctuf, evfsctsf, evsabs, evsnabs, evsneg,
178 evsadd, evssub, evsmul, evsdiv, evscmpgt, evsgmplt, evsgmpeq,
179 evststgt, evststlt, evststeq, evscfui, evscfsi, evscfuf, evscfsf,
180 evsctui, evsctuiz, evsctsi, evsctsiz, evsctuf, evsctsf, evmhossf,
181 evmhossfa, evmhosmf, evmhosmfa, evmhosmi, evmhosmia, evmhoumi,
182 evmhoumia, evmhessf, evmhessfa, evmhesmf, evmhesmfa, evmhesmi,
183 evmhesmia, evmheumi, evmheumia, evmhossfaaw, evmhossiaaw,
184 evmhosmfaaw, evmhosmiaaw, evmhousiaaw, evmhoumiaaw, evmhessfaaw,
185 evmhessiaaw, evmhesmfaaw, evmhesmiaaw, evmheusiaaw, evmheumiaaw,
186 evmhossfanw, evmhossianw, evmhosmfanw, evmhosmianw, evmhousianw,
187 evmhoumianw, evmhessfanw, evmhessianw, evmhesmfanw, evmhesmianw,
188 evmheusianw, evmheumianw, evmhogsmfaa, evmhogsmiaa, evmhogumiaa,
189 evmhegsmfaa, evmhegsmiaa, evmhegumiaa, evmhogsmfan, evmhogsmian,
190 evmhogumian, evmhegsmfan, evmhegsmian, evmhegumian, evmwhssf,
191 evmwhssfa, evmwhssfaa, evmwhssmaa, evmwhsmfaa, evmwhsmiaa,
192 evmwhusiaa, evmwhumiaa, evmwhssfan, evmwhssian, evmwhsmfan,
193 evmwhsmian, evmwhusian, evmwhumian, evmwhgssfaa, evmwhgsmfaa,
194 evmwhgsmiaa, evmwhgumiaa, evmwhgssfan, evmwhgsmfan, evmwhgsmian,
195 evmwhgumian, evmwhsmf, evmwhsmfa, evmshsmi, evmshsmia, evmshumi,
196 evmshumia, evmmlssf, evmmlssfa, evmwlsmf, evmwlsmfa, evmwlumi,
197 evmwlumia, evmwlssfaaw, evmwlssiaaw, evmwlsmfaaw, evmwlsmiaaw,
198 evmwlusiaaw, evmwlumiaaw, evmwissfanw, evmwissianw, evmwlsmfanw,
199 evmwlsmianw, evmwlusianw, evmwlumianw, evmwssf, evmwssfa,
200 evmwsmf, evmwsmfa, evmwsmi, evmwsmia, evmwumi, evmwumia,
201 evmwssfaa, evmwsmfaa, evmwsmiaa, evmwumiaa, evmwssfan, evmwsmfan,
202 evmwsmian, evmwumian, evaddssiaaw, evaddsmiaaw, evaddusiaaw,
203 evaddumiaaw, evsubfssiaaw, evsubfsmiaaw, evsubfusiaaw,
204 evsubfumiaaw, evmra, evdivws, evdivws): New e500x2 Core Complex
206 (rfmci): New machine check APU instruction.
207 (isel): New integer select APU instructino.
208 (icbtls, icbtlse, icblc, icblce, dcbtls, dcbtlse, dcbtstls,
209 dcbtstlse, dcblc, dcblce): New cache control APU instructions.
210 (mtspefscr, mfspefscr): New instructions.
211 (mfpmr, mtpmr): New performance monitor APU instructions.
212 (savecontext): New context cache APU instructions.
213 (bblels, bbelr): New branch locking APU instructions.
214 (bblels, bbelr): New instructions.
215 (mftbl, mftbu, mftb): Set as CLASSIC instructions. Add BOOKE alias.
219 * m68hc11-opc.c: Update call operand to accept the page definition.
220 Identify instructions that are branches and calls to generate a
225 * m68hc11-dis.c (print_insn): Take into account 68HC12 memory
226 banks and fix disassembling of call instruction.
227 (print_indexed_operand): New param to tell whether
228 it was an indirect addressing operand (for disassembling call).
232 * po/sv.po: Updated Swedish translation.
236 * mips-opc.c (mips_builtin_opcodes): Remove "dla" and "la" as
237 aliases to "daddiu" and "addiu".
241 * po/sv.po: Updated Swedish translation.
245 * po/sv.po: Updated Swedish translation.
246 * po/es.po: Updated Spanish translation.
247 * po/pr_BR.po: Updated Brazilian Portuguese translation.
248 * po/tr.po: Updated Turkish translation.
249 * po/fr.po: Updated French translation.
253 * po/sv.po: Updated Swedish translation.
254 * po/es.po: Updated Spanish translation.
255 * po/pr_BR.po: Updated Brazilian Portuguese translation.
259 * Makefile.am: Run "make dep-am".
260 * Makefile.in: Regenerate.
261 * po/POTFILES.in: Regenerate.
265 * po/fr.po: Updated French translation.
266 * po/pr_BR.po: New Brazilian Portuguese translation.
267 * po/id.po: Updated Indonesian translation.
268 * configure.in (LINGUAS): Add pr_BR.
269 * configure: Regenerate.
276 * configure.in: Add support for ip2k.
277 * configure: Regenerate.
278 * Makefile.am: Add support for ip2k.
279 * Makefile.in: Regenerate.
280 * disassemble.c: Add support for ip2k.
281 * ip2k-asm.c: New generated file.
282 * ip2k-desc.c: New generated file.
283 * ip2k-desc.h: New generated file.
284 * ip2k-dis.c: New generated file.
285 * ip2k-ibld.c: New generated file.
286 * ip2k-opc.c: New generated file.
287 * ip2k-opc.h: New generated file.
291 * ia64-opc-b.c (bWhc): New macro.
294 (ia64_opcodes_b): Correct patterns for indirect call
295 instructions to use 3-bit "wh" field.
296 * ia64-asmtab.c: Regnerate.
300 * mips-dis.c (mips_isa_type): Add MIPS16 insn handling.
301 * mips-opc.c (I16): New define.
302 (mips_builtin_opcodes): Make jalx an I16 insn.
306 * po/POTFILES.in: Add frv-*.[ch].
307 * disassemble.c (ARCH_frv): New macro.
308 (disassembler): Handle bfd_arch_frv.
309 * configure.in: Support frv_bfd_arch.
310 * Makefile.am (HFILES): Add frv-*.h.
311 (CFILES): Add frv-*.c
312 (ALL_MACHINES): Add frv-*.lo.
313 (CLEANFILES): Add stamp-frv.
314 (FRV_DEPS): New variable.
315 (stamp-frv): New target.
316 (frv-asm.lo): New target.
317 (frv-desc.lo): New target.
318 (frv-dis.lo): New target.
319 (frv-ibld.lo): New target.
320 (frv-opc.lo): New target.
321 (frv-*.[ch]): New files.
325 * Makefile.am (CGENDEPS): Remove unnecessary stamp-cgen.
326 * Makefile.in: Regenerate.
330 * a29k-dis.c: Replace CONST with const.
331 * h8300-dis.c: Likewise.
332 * m68k-dis.c: Likewise.
333 * or32-dis.c: Likewise.
334 * sparc-dis.c: Likewise.
338 * configure.in: Add "sh5*-*" to list of targets which include
340 * configure: Regenerate.
344 * mips-opc.c: Clean up a few whitespace issues, and sort a
345 few entries understanding that 'x' follows 'w' in the alphabet.
350 * mips-opc.c: Add support for SB-1 MDMX subset and extensions.
354 * Makefile.am: Run "make dep-am".
355 * Makefile.in: Regenerate.
356 * po/POTFILES.in: Regenerate.
361 * mips-dis.c (print_insn_arg): Add support for 'O', 'Q', 'X', 'Y',
362 and 'Z' formats, for MDMX.
363 (mips_isa_type): Add MDMX instructions to the ISA
364 bit mask for bfd_mach_mipsisa64.
365 * mips-opc.c: Add support for MDMX instructions.
366 (MX): New definition.
368 * mips-dis.c: Update copyright years to include 2002.
372 * d10v-opc.c (d10v_opcodes): `btsti' does not modify its
377 * configure.in: Add DLX configuraton support.
378 * configure: Regenerate.
379 * Makefile.am: Add DLX configuraton support.
380 * Makefile.in: Regenerate.
381 * disassemble.c: Add DLX support.
382 * dlx-dis.c: New file.
386 * Makefile.am (sh-dis.lo): Don't put make commands in deps.
387 * Makefile.in: Regenerate.
388 * arc-dis.c: Use #include "" instead of <> for local header files.
389 * m68k-dis.c: Likewise.
393 * Makefile.am (sh-dis.lo): Compile with @archdefs@.
394 * Makefile.in: regenerate.
396 * sh-dis.c (print_insn_sh): If coff and bfd_mach_sh, use arch_sh4
401 * mips-opc.c (mips_builtin_opcodes): Add drol, dror macros.
405 * disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh.
406 * sh-dis.c (LITTLE_BIT): Delete.
407 (print_insn_sh, print_insn_shl): Deleted.
408 (print_insn_shx): Renamed to
409 (print_insn_sh). No longer static. Handle SHmedia instructions.
410 Use info->endian to determine endianness.
411 * sh64-dis.c (print_insn_sh64, print_insn_sh64l): Delete.
412 (print_insn_sh64x): No longer static. Renamed to
413 (print_insn_sh64). Removed pfun_compact and endian arguments.
414 If we got an uneven address to indicate SHmedia, adjust it.
415 Return -2 for SHcompact instructions.
419 * acinclude.m4 (AM_INSTALL_LIBBFD): Fake to fool autotools.
420 * configure.in: Invoke AM_INSTALL_LIBBFD.
421 * Makefile.am (install-data-local): Move to..
422 (install_libopcodes): .. New target.
423 (uninstall_libopcodes): Likewise.
424 (install-bfdlibLTLIBRARIES): Likewise.
425 (uninstall-bfdlibLTLIBRARIES): Likewise.
427 (bfdincludedir): New.
428 (lib_LTLIBRARIES): Rename to bfdlib_LTLIBRARIES.
429 * aclocal.m4: Regenerate.
430 * configure: Regenerate.
431 * Makefile.in: Regenerate.
435 * fr30-asm.c: Regenerate.
436 * fr30-desc.c: Regenerate.
437 * fr30-dis.c: Regenerate.
438 * m32r-asm.c: Regenerate.
439 * m32r-desc.c: Regenerate.
440 * m32r-dis.c: Regenerate.
441 * openrisc-asm.c: Regenerate.
442 * openrisc-desc.c: Regenerate.
443 * openrisc-dis.c: Regenerate.
444 * xstormy16-asm.c: Regenerate.
445 * xstormy16-desc.c: Regenerate.
446 * xstormy16-dis.c: Regenerate.
450 * mips-dis.c (is_newabi): EABI is not a NewABI.
454 * configure.in (shle-*-*elf*): Include sh64 support.
455 * configure: Regenerate.
459 * vax-dis.c (print_insn_arg): Pass the insn info to print_insn_mode.
460 (print_insn_mode): Print some basic info about floating point values.
464 * ppc-opc.c: Add "tlbiel" for POWER4.
468 * cgen-dis.in: (print_insn_@arch@): Cache list of opened CPUs rather
469 than just most-recently-opened.
473 * ppc-opc.c: Add "tlbsx." and "tlbsxe." for booke.
477 * z8k-dis.c (print_insn_z8k): Set disassemble_info to 2
478 bytes_per_chunk, 6 bytes_per_line for nicer display of the hex
480 (z8k_lookup_instr): CLASS_IGNORE case added.
481 (output_instr): Don't print hex codes, they are already
483 (unpack_instr): ARG_NIM4 case added. ARG_NIM8 case
484 fixed. Support CLASS_BIT_1OR2 and CLASS_IGNORE cases.
485 (unparse_instr): Fix base and indexed addressing disassembly:
486 The index is inside the brackets.
487 * z8kgen.c (gas): Add ARG_NIM4 and CLASS_IGNORE defines.
488 (opt): Fix shift left/right arithmetic/logical byte defines:
489 The high byte of the immediate word is ignored by the
491 Fix n parameter of ldm opcodes: The opcode contains (n-1).
492 (args): Fix "n" entry.
493 (toks): Add "nim4" and "iiii" entries.
494 * z8k-opc.h: Regenerated with new z8kgen.c.
498 * po/id.po: New Indonesian translation.
499 * configure.in (ALL_LIGUAS): Add id.po
500 * configure: Regenerate.
504 * ppc-opc.c (powerpc_opcode): Fix dssall operand list.
508 * dep-in.sed: Cope with absolute paths.
509 * Makefile.am (dep.sed): Subst TOPDIR.
511 * Makefile.in: Regenerate.
512 * ppc-opc.c: Whitespace.
513 * s390-dis.c: Fix copyright date.
517 * ppc-opc.c (vmaddfp): Fix operand order.
521 * Makefile.am: Run "make dep-am".
522 * Makefile.in: Regenerate.
526 * ppc-opc.c: Add optional field to mtmsrd.
527 (MTMSRD_L, XRLARB_MASK): Define.
531 * i386-dis.c (prefix_name): Fix handling of 32bit address prefix
533 (print_insn) Likewise.
534 (putop): Fix handling of 'E'
535 (OP_E, OP_OFF): handle 32bit addressing mode in 64bit.
540 * po/fr.po: Updated version.
544 * mips-opc.c (M3D): Tweak comment.
545 (mips_builtin_op): Add comment indicating that opcodes of the
546 same name must be placed together in the table, and sort
547 the "recip.fmt", "recip1.fmt", "recip2.fmt", "rsqrt.fmt",
548 "rsqrt1.fmt", and "rsqrt2.fmt" opcodes by name.
552 * Makefile.am: Tidy up sh64 rules.
553 * Makefile.in: Regenerate.
557 * mips-dis.c: Update copyright years.
561 * mips-dis.c (mips_isa_type): Add MIPS3D instructions to the ISA
562 bit masks for bfd_mach_mips_sb1 and bfd_mach_mipsisa64. Add
563 comments for bfd_mach_mipsisa32 and bfd_mach_mipsisa64 that
564 indicate that they should dissassemble all applicable
566 * mips-opc.c: Add support for MIPS-3D instructions.
567 (M3D): New definition.
569 * mips-opc.c: Update copyright years.
573 * mips-opc.c (mips_builtin_opcodes): Sort bc<N> opcodes by name.
577 * mips-dis.c (is_newabi): Fix ABI decoding.
581 * mips-dis.c (mips_isa_type): Fix formatting of bfd_mach_mipsisa32
582 and bfd_mach_mipsisa64 cases to match the rest.
586 * po/fr.po: Updated version.
590 * ppc-opc.c: Add optional `L' field to tlbie.
591 (XRTLRA_MASK): Define.
595 * mips-opc.c (mips_builtin_opcodes): Mark "pref" as being
598 * mips-opc.c (mips_builtin_opcodes): Add "movn.ps" and "movz.ps".
602 * pdp11-opc.c: Fix "mark" operand type. Fix operand types
603 for float opcodes that take float operands. Add alternate
604 names (xxxD vs. xxxF) for float opcodes.
605 * pdp11-dis.c (print_operand): Clean up formatting for mode 67.
606 (print_foperand): New function to handle float opcode operands.
607 (print_insn_pdp11): Use print_foperand to disassemble float ops.
615 * Makefile.am (install-data-local): Install dis-asm.h.
619 * configure.in (LINGUAS): Add de.po.
620 * configure: Regenerate.
621 * po/de.po: New file.
625 * ppc-dis.c (powerpc_dialect): Handle power4 option.
626 * ppc-opc.c (insert_bdm): Correct description of "at" branch
627 hints. Test PPC_OPCODE_POWER4 to determine branch hint flavour.
628 (extract_bdm, insert_bdp, extract_bdp, valid_bo): Likewise.
629 (BOFM64, BOFP64, BOTM64, BOFP64): Rename to BOFM4, BOFP4 etc.
630 (BODNZM64, BODNZP64, BODZM64, BODZP64): Likewise.
631 (PPCCOM32, PPCCOM64): Delete.
632 (NOPOWER4, POWER4): Define.
633 (powerpc_opcodes): Replace occurences of PPCCOM32 with NOPOWER4,
634 and PPCCOM4 with POWER4 so that "at" style branch hint opcodes
635 are enabled for power4 rather than ppc64.
639 * ppc-opc.c (powerpc_operands): Add WS field. Use for tlbre, tlbwe.
643 * s390-dis.c (init_disasm): Use renamed architecture defines.
647 * ppc-opc.c (powerpc_dialect): Fix comment; BookE is not Motorola
652 * po/tr.po: Updated translation.
656 * alpha-opc.c (alpha_opcodes): Fix thinko in ret pseudo
661 * alpha-opc.c (alpha_opcodes): Add simple pseudos for
666 * po/da.po: Updated translation.
670 * cgen-asm.in (parse_insn_normal): Change call from
671 @arch@_cgen_parse_operand to cd->parse_operand, to
672 facilitate CGEN_ASM_INIT_HOOK doing useful work.
676 * sparc-dis.c (print_insn_sparc): Make sure 0xFFFFFFFF is not
681 * Makefile.am: "make dep-am".
682 * Makefile.in: Regenerate.
683 * aclocal.m4: Regenerate.
684 * config.in: Regenerate.
685 * configure: Regenerate.
689 * configure.in <bfd_sh_arc>: For sh-* and shl-*, enable sh64
690 support only for sh-*-*elf*, shl-*-*elf*, sh-*-linux* and
692 * configure: Regenerate.
696 * cgen-dis.c: Add prototypes for count_decodable_bits
697 and add_insn_to_hash_chain.
701 * configure.in <bfd_sh_arc>: Enable sh64 support on sh-*.
702 * configure: Rebuilt.
706 * or32-opc.c: Fix compile time warning messages.
707 * or32-dis.c: Fix compile time warning messages.
713 * sh64-opc.c: Regenerate.
715 * sh64-opc.h: Rename A_RESV_Fx to A_REUSE_PREV so that its
716 purpose is more obvious.
717 * sh64-opc.c (shmedia_table): Ditto.
718 * sh64-dis.c (initialize_shmedia_opcode_mask_table): Ditto.
719 (print_insn_shmedia): Ditto.
721 * sh64-opc.c: Adjust comments to reflect reality: replace bits
722 3:0 with zeros (not "reserved"), replace "rrrrrr" with
723 "gggggg" for two-operand floating point opcodes. Remove
726 * sh64-dis.c (print_insn_shmedia) <failing read_memory_func>:
727 Correct printing of .byte:s. Return number of printed bytes or
729 (print_insn_sh64x) <not CRT_SH5_ISA16>: Ditto. Print as .byte:s
730 to next four-byte-alignment if insn or data is not aligned.
732 * sh64-dis.c: Update comments and fix comment formatting.
733 (initialize_shmedia_opcode_mask_table) <case A_IMMM>:
734 Abort instead of setting length to 0.
735 (crange_qsort_cmpb, crange_qsort_cmpl, crange_bsearch_cmpb,
736 crange_bsearch_cmpl, sh64_get_contents_type,
737 sh64_address_in_cranges): Move to bfd/elf32-sh64.c.
739 * sh64-opc.c: Remove #if 0:d entries for instructions not found in
740 SH-5/ST50-023-04: fcosa.s, fsrra.s and prefo.
742 * sh64-dis.c (print_insn_shmedia): Display MOVI/SHORI-formed
743 address with same prefix as SHcompact.
744 In the disassembler, use a .cranges section for linked executables.
745 * sh64-dis.c (SAVED_MOVI_R, SAVED_MOVI_IMM): Move to head of file
746 and update for using structure in info->private_data.
747 (struct sh64_disassemble_info): New.
748 (is_shmedia_p): Delete.
749 (crange_qsort_cmpb): New function.
750 (crange_qsort_cmpl, crange_bsearch_cmpb): New functions.
751 (crange_bsearch_cmpl, sh64_address_in_cranges): New functions.
752 (init_sh64_disasm_info, sh64_get_contents_type_disasm): New functions.
753 (sh64_get_contents_type, sh64_address_is_shmedia): New functions.
754 (print_insn_shmedia): Correct displaying of address after MOVI/SHORI
755 pair. Display addresses for linked executables only.
756 (print_insn_sh64x_media): Initialize info->private_data by calling
757 init_sh64_disasm_info.
758 (print_insn_sh64x): Ditto. Find out type of contents by calling
759 sh64_contents_type_disasm. Display data regions using ".long" and
760 ".byte" similar to unrecognized opcodes.
762 * sh64-dis.c (is_shmedia_p): Check info->section and look for ISA
763 information in section flags before considering symbols. Don't
764 assume an info->mach setting of bfd_mach_sh5 means SHmedia code.
765 * configure.in (bfd_sh_arch): Check presence of sh64 insns by
766 matching $target $canon_targets instead of looking at the
767 now-removed -DINCLUDE_SHMEDIA in $targ_cflags.
768 * configure: Regenerate.
770 * sh64-opc.c (shmedia_creg_table): New.
771 * sh64-opc.h (shmedia_creg_info): New type.
772 (shmedia_creg_table): Declare.
773 * sh64-dis.c (creg_name): New function.
774 (print_insn_shmedia): Use it.
775 * disassemble.c (disassembler) [ARCH_sh, INCLUDE_SHMEDIA]: Map
776 bfd_mach_sh5 to print_insn_sh64 if big-endian and to
777 print_insn_sh64l if little-endian.
778 * sh64-dis.c (print_insn_shmedia): Make r unsigned.
779 (print_insn_sh64l): New.
780 (print_insn_sh64x): New.
781 (print_insn_sh64x_media): New.
782 (print_insn_sh64): Break out code to print_insn_sh64x and
783 print_insn_sh64x_media.
785 * sh64-opc.h: New file
786 * sh64-opc.c: New file
787 * sh64-dis.c: New file
788 * Makefile.am: Add sh64 targets.
789 (HFILES): Add sh64-opc.h.
790 (CFILES): Add sh64-opc.c and sh64-dis.c.
791 (ALL_MACHINES): Add sh64 files.
792 * Makefile.in: Regenerate.
793 * configure.in: Add support for sh64 to bfd_sh_arch.
794 * configure: Regenerate.
795 * disassemble.c [ARCH_all] (INCLUDE_SHMEDIA): Define.
796 (disassembler) [ARCH_sh, INCLUDE_SHMEDIA]: Map bfd_mach_sh5 to
798 * sh-dis.c (print_insn_shx): Handle bfd_mach_sh5 as arch_sh4.
799 * po/POTFILES.in: Regenerate.
800 * po/opcodes.pot: Regenerate.
804 * cgen-dis.in (print_insn_@arch@): Support disassemble_info.insn_sets.
808 * sh-opc.h (sh_arg_type): Added A_DISP_PC_ABS.
812 * Makefile.am: Run "make dep-am"
813 * Makefile.in: Regenerate.
817 * or32-dis.c: New file.
818 * or32-opc.c: New file.
819 * configure.in: Add support for or32.
820 * configure: Regenerate.
821 * Makefile.am: Add support for or32.
822 * Makefile.in: Regenerate.
823 * disassemble.c: Add support for or32.
824 * po/POTFILES.in: Regenerate.
825 * po/opcodes.pot: Regenerate.
829 * configure: Regenerated.
833 * po/fr.po: Updated version.
837 * po/es.po: Updated version.
841 * po/da.po: New version.
845 * po/da.po: New file: Spanish translation.
846 * configure.in (ALL_LINGUAS): Add da.
847 * configure: Regenerate.
851 * fr30-asm.c: Regenerate.
852 * fr30-desc.c: Likewise.
853 * fr30-desc.h: Likewise.
854 * fr30-dis.c: Likewise.
855 * fr30-ibld.c: Likewise.
856 * fr30-opc.c: Likewise.
857 * fr30-opc.h: Likewise.
858 * m32r-asm.c: Likewise.
859 * m32r-desc.c: Likewise.
860 * m32r-desc.h: Likewise.
861 * m32r-dis.c: Likewise.
862 * m32r-ibld.c: Likewise.
863 * m32r-opc.c: Likewise.
864 * m32r-opc.h: Likewise.
865 * m32r-opinst.c: Likewise.
866 * openrisc-asm.c: Likewise.
867 * openrisc-desc.c: Likewise.
868 * openrisc-desc.h: Likewise.
869 * openrisc-dis.c: Likewise.
870 * openrisc-ibld.c: Likewise.
871 * openrisc-opc.c: Likewise.
872 * openrisc-opc.h: Likewise.
873 * xstormy16-desc.c: Likewise.
877 * alpha-dis.c (print_insn_alpha): Also mask the base opcode for
882 * Makefile.am: Run "make dep-am".
883 * Makefile.in: Regenerate.
884 * opcodes/po/POTFILES.in: Regenerate.
888 * arm-opc.h (arm_opcodes): Use generic rule %5?hb instead of %h.
889 * arm-dis.c (print_insn_arm): Don't handle 'h' case.
893 * arm-opc.h (arm_opcodes): Add bxj instruction.
897 * po/opcodes.pot: Regenerate.
898 * po/fr.po: Regenerate.
899 * po/sv.po: Regenerate.
900 * po/tr.po: Regenerate.
904 * po/tr.po: Import new version.
908 * arm-opc.h (arm_opcodes): Add patterns for VFP instructions.
909 * arm-dis.c (print_insn_arm): Support new disassembly qualifiers for
914 * xstormy16-asm.c: Regenerate.
915 * xstormy16-desc.c: Likewise.
916 * xstormy16-desc.h: Likewise.
917 * xstormy16-dis.c: Likewise.
918 * xstormy16-opc.c: Likewise.
919 * xstormy16-opc.h: Likewise.
923 * po/es.po: New file: Spanish translation.
924 * configure.in (ALL_LINGUAS): Add es.
925 * configure: Regenerate.
929 * hppa-dis.c (print_insn_hppa): Handle new 'c' mode completers,
930 'X', 'M', and 'A'. No longer emit a space after 'x' or 's'.
931 Always emit a space after 'H'.
935 * ppc-opc.c (PPCVEC): Include PPC_OPCODE_ANY.
939 * alpha-opc.c (unop): Encode with RB as $sp.
943 * Makefile.am: Add support for xstormy16.
944 * Makefile.in: Regenerate.
945 * configure.in: Add support for xstormy16.
946 * configure: Regenerate.
947 * disassemble.c: Add support for xstormy16.
948 * xstormy16-asm.c: New generated file.
949 * xstormy16-desc.c: New generated file.
950 * xstormy16-desc.h: New generated file.
951 * xstormy16-dis.c: New generated file.
952 * xstormy16-ibld.c: New generated file.
953 * xstormy16-opc.c: New generated file.
954 * xstormy16-opc.h: New generated file.
958 * alpha-opc.c (alpha_opcodes): Add wh64en.
962 * d10v-opc.c (d10v_predefined_registers): Remove warnings
963 introduced in Nov 29's patch.
965 * d10v-dis.c (print_operand): Apply REGISTER_MASK to `num' of
968 * d10v-dis.c (print_operand): Disregard OPERAND_SP in register
971 * d10v-opc.c (RSRC_NOSP): New macro.
972 (d10v_operands): Add it.
973 (d10v_opcodes): Use RSRC_NOSP in post-decrement "st" and "st2w".
977 * d10v-opc.c (d10v_predefined_registers): Mark `sp' as OPERAND_SP.
978 (RSRC_SP): New macro.
979 (d10v_operands): Add it.
980 (d10v_opcodes): Adjust "st" and "st2w" to use RSRC_SP.
984 * pdp11-dis.c (print_insn_pdp11): Handle illegal instructions.
985 Also, break out of the loop as soon as an instruction has been
990 * ppc-opc.c (mfvrsave, mtvrsave): New instructions.
994 * po/POTFILES.in: Regenerate.
996 * ppc-opc.c (PPC64): Revert 2001-10-12. Do include PPC_OPCODE_PPC.
997 (insert_bat, extract_bat, insert_bba, extract_bba,
998 insert_bd, extract_bd, insert_bdm, extract_bdm,
999 insert_bdp, extract_bdp, valid_bo,
1000 insert_bo, extract_bo, insert_boe, extract_boe,
1001 insert_ds, extract_ds, insert_de, extract_de,
1002 insert_des, extract_des, insert_li, extract_li,
1003 insert_mbe, extract_mbe, insert_mb6, extract_mb6,
1004 insert_nb, extract_nb, insert_nsi, extract_nsi,
1005 insert_ral, insert_ram, insert_ras,
1006 insert_rbs, extract_rbs, insert_sh6, extract_sh6,
1007 insert_spr, extract_spr, insert_tbr, extract_tbr): Add dialect param.
1008 (extract_bd, extract_bdm, extract_bdp,
1009 extract_ds, extract_des,
1010 extract_li, extract_nsi): Implement sign extension without conditional.
1011 (insert_bdm, extract_bdm,
1012 insert_bdp, extract_bdp, valid_bo): Handle 64 bit branch hints.
1013 (extract_bdm, extract_bdp): Correct 32 bit validation.
1014 (AT1_MASK, AT2_MASK): Define.
1015 (BBOAT_MASK): Define.
1016 (BBOATCB_MASK, BBOAT2CB_MASK, BBOATBI_MASK): Define.
1017 (BOFM64, BOFP64, BOTM64, BOTP64): Define.
1018 (BODNZM64, BODNZP64, BODZM64, BODZP64): Define.
1019 (PPCCOM32, PPCCOM64): Define.
1020 (powerpc_opcodes): Modify existing 32 bit insns with branch hints
1021 and add new patterns to implement 64 bit branches with hints. Move
1022 booke instructions so they match before ppc64.
1024 * ppc-dis.c (powerpc_dialect): Set PPC_OPCODE_64 in dialect for
1025 64 bit default targets, and parse "32" and "64" in options.
1027 (print_insn_powerpc): Pass dialect to operand->extract.
1031 * cgen-dis.c (count_decodable_bits): New function.
1032 (add_insn_to_hash_chain): New function.
1033 (hash_insn_array): Call add_insn_to_hash_chain.
1034 (hash_insn_list): Call add_insn_to_hash_chain.
1035 * m32r-dis.c: Regenerated.
1036 * fr30-dis.c: Regenerated.
1040 * i386-dis.c (print_insn): Use x86-64 as option.
1044 * disassemble.c (disassembler): Call print_insn_i386.
1045 * i386-dis.c (SUFFIX_ALWAYS): Define.
1046 (struct dis_private): Add orig_sizeflag.
1047 (print_insn_i386): Make it a wrapper, calling..
1048 (print_insn): ..The old body of print_insn_i386. Avoid longjmp
1049 warning without using volatile by moving orig_sizeflag to priv,
1050 and removing inbuf. Parse disassembler_options.
1051 (print_insn_i386_att, print_insn_i386_intel): Move initialisation
1053 (putop): Remove #ifdef SUFFIX_ALWAYS.
1057 * tic54x-dis.c: Use revised opcode structure. Export opcode
1059 (has_lkaddr): Don't forget about Lmem insns.
1060 * tic54x-opc.c: Add emulation trap. Parallel table now uses
1061 standard opcode templates.
1065 * i386-dis.c (grps): Change "sldt", "str", and "smsw" entries
1066 to "sldtQ", "strQ", "smswQ" respectively; all with Ev operand
1067 category instead of Ew.
1071 * m68k-opc.c: Fix definitions of wddata[bwl].
1075 * cgen-asm.c (cgen_parse_keyword): If the keyword is too big to
1076 fit in the buffer, try to match the empty keyword.
1080 * cgen-ibld.in (extract_1): Fix badly placed #if 0.
1081 * fr30-ibld.c: Regenerate.
1082 * m32r-ibld.c: Regenerate.
1083 * openrisc-ibld.c: Regenerate.
1087 * mips-dis.c (print_insn_mips): Remove spaces at end of line.
1091 * configure.in (ALL_LINGUAS): Add "fr", "sv" and "tr".
1092 * configure: Regernate.
1093 * po/fr.po: New file.
1094 * po/sv.po: New file.
1095 * po/tr.po: New file.
1099 * m68hc11-dis.c (print_insn): Fix disassembly of movb with a
1104 * Makefile.am (CFILES): Add mmix-dis.c and mmix-opc.c. Regenerate
1106 * Makefile.in: Regenerate.
1107 * mmix-dis.c, mmix-opc.c: New files.
1111 * d30v-dis.c: Fix a comment typo.
1115 * mips-opc.c (mips_builtin_opcodes): Mark "bgezall" and
1116 "bltzall" as writing GPR 31 (since they do).
1118 * mips-dis.c (print_insn_arg): Calculate info->target
1120 (print_insn_mips): Fill in instruction info.
1121 (print_mips16_insn_arg): Remove unneded variable 'val'.
1122 Removed duplicated instruction target calculations,
1123 calculate once and print that result. Use same idiom for
1124 masking the jump segment bits as is used in print_insn_arg.
1128 * ppc-opc.c (CT): Make it an optional operand.
1132 * mips-dis.c (mips_isa_type): Make the ISA used to disassemble
1133 SB-1 binaries include instructions specific to the SB-1.
1134 * mips-opc.c (SB1): New definition.
1135 (mips_builtin_opcodes): Add SB-1 extension opcodes "div.ps",
1136 "recip.ps", "rsqrt.ps", and "sqrt.ps".
1140 * ppc-opc.c (STRM): New AltiVec operand.
1141 (XDSS): New AltiVec instruction form.
1142 (mtvscr): Correct operand list.
1143 (dst, dstt, dstst, dststt, dss, dssall): AltiVec instructions.
1147 * po/POTFILES.in: Regenerate.
1151 * ppc-opc.c (MO): New macro for MO field of mbar instruction.
1152 (powerpc_opcodes): Add rfci, wrtee, wrteei, mfdcrx, mfdcr,
1153 mtdcrx, mtdcr, msync, dcba and mbar as BookE instructions.
1157 * cgen-ibld.in: Include safe-ctype.h in preference to
1159 * cgen-asm.in: Include safe-ctype.h in preference to
1160 ctype.h. Fix formatting. Use ISSPACE instead of isspace and
1161 TOLOWER instead of tolower.
1162 (@arch@_cgen_build_insn_regex): Remove duplication of syntax
1163 string elements in constructed regular expression.
1164 * fr30-asm.c: Regenerate.
1165 * fr30-desc.c: Regenerate.
1166 * fr30-ibld.c: Regenerate.
1167 * m32r-asm.c: Regenerate.
1168 * m32r-desc.c: Regenerate.
1169 * m32r-ibld.c: Regenerate.
1170 * openrisc-asm.c: Regenerate.
1171 * openrisc-desc.c: Regenerate.
1172 * openrisc-ibld.c: Regenerate.
1173 * po/opcodes.pot: Regenerate.
1177 * ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New
1178 instruction field instruction/extraction functions for new BookE
1179 DE form instructions.
1180 (CT): New macro for CT field in an X form instruction.
1181 (DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form
1183 (PPC64): Don't include PPC_OPCODE_PPC.
1184 (403): New opcode macro for PPC403 processors.
1185 (BOOKE): New opcode macro for BookE processors.
1186 (bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions.
1187 (bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise.
1188 (dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise.
1189 (stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise.
1190 (mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise.
1191 (subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise.
1192 (subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise.
1193 (addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise.
1194 (lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise.
1195 (stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise.
1196 (tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise.
1197 (lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise.
1198 (stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise.
1199 (lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise.
1201 * ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look
1202 for a disassembler option of `booke', `booke32' or `booke64' to enable
1203 BookE support in the disassembler.
1207 * cgen-dis.in (print_insn): Use min (cd->base_insn_bitsize, buflen*8)
1208 for the length when extracting the base part of the insn.
1212 * cgen-asm.in (*_cgen_build_insn_regex): Generate a case sensitive
1213 regular expression. Fix some formatting problems.
1214 * fr30-asm.c: Regenerate.
1215 * openrisc-asm.c: Regenerate.
1216 * m32r-asm.c: Regenerate.
1220 * z8k-dis.c (unparse_instr): Fixed formatting. Change disassembly
1221 of indirect register memory accesses to be same format the
1226 * sh-opc.h: Fix encoding of least significant nibble of the
1227 DSP single data transfer instructions.
1229 * sh-dis.c (print_insn_shx): Fix decoding of As opcode in DSP
1234 * cgen-asm.in: Fix compile time warning messages in generated
1236 * cgen-dis.in: The same.
1237 * cgen-ibld.in: The same.
1238 * fr30-asm.c: Regenerate.
1239 * fr30-desc.c: Regenerate.
1240 * fr30-dis.c: Regenerate.
1241 * fr30-ibld.c: Regenerate.
1242 * fr30-opc.c: Regenerate.
1243 * m32r-asm.c: Regenerate.
1244 * m32r-desc.c: Regenerate.
1245 * m32r-dis.c: Regenerate.
1246 * m32r-ibld.c: Regenerate.
1247 * m32r-opc.c: Regenerate.
1248 * m32r-opinst.c Regenerate.
1249 * openrisc-asm.c: Regenerate.
1250 * openrisc-desc.c: Regenerate.
1251 * openrisc-dis.c: Regenerate.
1252 * openrisc-ibld.c: Regenerate.
1253 * openrisc-opc.c: Regenerate.
1254 * openrisc-opc.h: Regenerate.
1255 * Makefile.in: Regenerate.
1256 * po/POTFILES.in: Regenerate.
1257 * po/opcodes.pot: Regenerate.
1261 * arm-opc.h (arm_opcodes): Add cirrus insns.
1263 * arm-dis.c (print_insn_arm): Add 'I' case.
1267 * po/POTFILES.in: Regenerate.
1268 * configure: Regenerate.
1272 * Makefile.am (Makefile): Depend on bfd/configure.in.
1274 * Makefile.in: Regenerate.
1278 * cgen-ibld.in (insert_1): Switched bfd_get_bits and bfd_set_bits
1279 calls to cgen_get_insn_value and cgen_put_insn_value calls.
1280 (extract_1): Switched bfd_get_bits call to cgen_get_insn_value call.
1284 * Makefile.am: Update dependencies with "make dep-am".
1285 * Makefile.in: Regenerate.
1289 * arc-dis.c: Formatting fixes.
1290 (my_sprintf): Define using VPARAMS, VA_OPEN, VA_FIXEDARG, VA_CLOSE.
1294 * arc-dis.c: Don't include <ctype.h>.
1295 * openrisc-desc.c: Likewise.
1296 * openrisc-ibld.c: Likewise.
1300 * fr30-opc.c: Fix compile time warning messages.
1301 * i370-opc.c: Fix compile time warning messages.
1302 * i960-dis.c: Fix compile time warning messages.
1303 * m32r-asm.c: Fix compile time warning messages.
1304 * m32r-desc.c: Fix compile time warning messages.
1305 * m32r-dis.c: Fix compile time warning messages.
1306 * m32r-ibld.c: Fix compile time warning messages.
1307 * m32r-opc.c: Fix compile time warning messages.
1308 * m32r-opinst.c: Fix compile time warning messages.
1309 * ns32k-dis.c: Fix compile time warning messages.
1310 * openrisc-asm.c: Fix compile time warning messages.
1311 * openrisc-desc.c: Fix compile time warning messages.
1312 * openrisc-dis.c: Fix compile time warning messages.
1313 * openrisc-ibld.c: Fix compile time warning messages.
1314 * openrisc-opc.c: Fix compile time warning messages.
1315 * pdp11-dis.c: Fix compile time warning messages.
1316 * tic54x-dis.c: Fix compile time warning messages.
1317 * v850-opc.c: Fix compile time warning messages.
1318 * vax-dis.c: Fix compile time warning messages.
1319 * w65-opc.h: Fix compile time warning messages.
1320 * z8k-opc.h: Fix compile time warning messages.
1321 * z8kgen.c: Fix compile time warning messages.
1325 * arm-dis.c: Fix compile time warning messages.
1326 * cgen-asm.c: Fix compile time warning messages.
1327 * cgen-dis.c: Fix compile time warning messages.
1328 * cris-dis.c: Fix compile time warning messages.
1329 * d10v-dis.c: Fix compile time warning messages.
1330 * fr30-asm.c: Fix compile time warning messages.
1331 * fr30-desc.c: Fix compile time warning messages.
1332 * fr30-dis.c: Fix compile time warning messages.
1333 * fr30-ibld.c: Fix compile time warning messages.
1337 * cgen-asm.c: Include "safe-ctype.h" instead of <ctype.h>.
1338 (cgen_parse_keyword): Use ISALNUM instead of isalnum.
1339 * cgen-opc.c: Include "safe-ctype.h" instead of <ctype.h>.
1340 (cgen_keyword_lookup_name): Use ISALPHA/TOLOWER instead of
1342 (cgen_keyword_add): Use ISALNUM instead of isalnum.
1343 (hash_keyword_name): Use TOLOWER instead of tolower.
1344 * fr30-asm.c: Include "safe-ctype.h" instead of <ctype.h>.
1345 (parse_insn_normal): Use TOLOWER/ISSPACE instead of
1347 (fr30_cgen_assemble_insn): Use ISSPACE instead of isspace.
1348 * fr30-desc.c: Don't include <ctype.h>.
1349 * fr30-ibld.c: Likewise.
1350 * ia64-gen.c: Include "safe-ctype.h" instead of <ctype.h>.
1351 (load_insn_classes, parse_resource_users, load_depfile): Use
1352 ISSPACE instead of isspace.
1353 * m32r-asm.c: Include "safe-ctype.h" instead of <ctype.h>.
1354 (parse_insn_normal): Use TOLOWER/ISSPACE instead of
1356 (m32r_cgen_assemble_insn): Use ISSPACE instead of isspace.
1357 * m32r-desc.c: Don't include <ctype.h>.
1358 * m32r-ibld.c: Likewise.
1359 * openrisc-asm.c: Include "safe-ctype.h" instead of <ctype.h>.
1360 (parse_insn_normal): Use TOLOWER/ISSPACE instead of
1362 (openrisc_cgen_assemble_insn): Use ISSPACE instead of isspace.
1366 * Makefile.am: Add rules and dependencies to create the s/390 opcode
1367 table out of s390-opc.txt automatically.
1368 * configure.in: Add BFD_CC_FOR_BUILD to allow CC_FOR_BUILD to be used.
1369 * s390-mkopc.c (dumpTable): Change output to create a complete file.
1370 * s390-opc.c: New improved opcode format macros and remove the
1371 pregenerated opcode table.
1372 * s390-opc.txt: Adapt to new improved opcode format macros.
1376 * ppc-opc.c (VXA, VXA_MASK): Fix mask bits.
1380 * i386-dis.c (grps): Don't print the implicit al/ax/eax register
1381 for opcode 0xf6 or 0xf7 forms of mul, imul, div, idiv insns.
1386 * mips-dis.c: Add support for bfd_mach_mipsisa32 and
1387 bfd_mach_mipsisa64. Remove bfd_mach_mips32, bfd_mach_mips32_4k,
1392 * tic54x-opc.c: Add default initializers to avoid warnings.
1394 * arc-opc.c: Include "sysdep.h" to get stdio.h as include file.
1395 * arc-ext.c: Likewise.
1399 * ppc-opc.c (icbt): Order correctly.
1404 * ppc-opc.c (DS): Add PPC_OPERAND_DS flag.
1406 (insert_ds): Complain if not a multiple of 4.
1408 (XSYNC_MASK): Define.
1409 (powerpc_opcodes): Add "slbmte", "lwsync", "ptesync", "slbmfev",
1410 "slbmfee". Modify "sync" to use XSYNC_MASK and LS.
1414 * h8500-opc.h: Add default initializers to h8500_table to shut up
1419 * tic54x-dis.c: Add unused attributes where needed.
1421 * z8k-dis.c (output_instr): Add unused attribute.
1423 * h8300-dis.c: Add missing prototypes.
1424 (bfd_h8_disassemble): Make static.
1426 * cris-dis.c: Add missing prototype.
1427 * h8500-dis.c: Likewise.
1428 * m68hc11-dis.c: Likewise.
1429 * pj-dis.c: Likewise.
1430 * tic54x-dis.c: Likewise.
1431 * v850-dis.c: Likewise.
1432 * vax-dis.c: Likewise.
1433 * w65-dis.c: Likewise.
1434 * z8k-dis.c: Likewise.
1436 * d10v-dis.c: Add missing prototype.
1437 (dis_long): Remove unused variable.
1438 (dis_2_short): Likewise.
1440 * sh-dis.c: Add missing prototypes.
1441 * v850-opc.c: Likewise.
1442 Add unused attributes where needed.
1444 * ns32k-dis.c: Add missing prototypes.
1445 (bit_extract_simple): Remove unused variable.
1449 * opcodes/s390-opc.c: Add "low or high" and "not low or high"
1450 branch instructions for gcc 3.0.
1451 * opcodes/s390-opc.txt: Likewise.
1455 * i960-dis.c: Add parameters for prototypes
1456 (ctrl): Add unused attributes.
1458 (put_abs): Likewise.
1460 * mips-dis.c: Add missing prototypes.
1461 * a29k-dis.c: Likewise.
1462 * arc-dis.c: Likewise.
1463 * ia64-opc.c: Likewise.
1465 * s390-dis.c: Add missing prototypes.
1466 (init_disasm): Remove unused attribute since the parameter is
1471 * mips-opc.c (M1): Define. Reformatted Code.
1472 (mips_builtin_opcodes): Added performance counter opcodes mfpc, mfps,
1477 * mips-opc.c: R3900s can support all branch likely INSN_MACROs where
1478 the corresponding non-likely insn is in MIPS I.
1482 * mcore-dis.c: Fix formatting.
1483 * mips-dis.c: Likewise.
1484 * pj-dis.c: Likewise.
1485 * z8k-dis.c: Likewise.
1489 * cgen-ibld.in (extract_normal): Match type of VALUE and MASK
1490 to *VALUEP. Regenerate all cgen files.
1494 * mips-dis.c (print_insn_mips): Remove OPCODE_IS_MEMBER's gp32
1496 * mips-opc.c (G6): Undefine.
1497 (mips_builtin_opcodes): Remove gp32 entry for "move". Add macro
1498 as the first "move" alternative.
1502 * configure.in: Add -Wstrict-prototypes and -Wmissing-prototypes
1504 * configure: Regenerate.
1508 * ppc-opc.c: Revert 2001-08-08.
1512 * dis-buf.c (generic_strcat_address): Add missing prototype.
1513 #if 0 the functions as it is unused.
1518 * ppc-opc.c: Include "bfd.h".
1519 (powerpc_operands): Add new field for reloc type.
1523 * mips-dis.c (print_insn_arg): Don't use software integer registers
1524 for coprocessor registers.
1525 (get_mips_isa): Removed.
1526 (is_newabi): New function, checks if NewABI is used.
1527 (_print_insn_mips): Get distinction between old ABI and new ABI right.
1531 * z8kgen.c: Fixed indentation of opt[] array. Include stdio.h to
1532 get stderr definition.
1533 (internal, gas): Removed warnings.
1534 (gas): Create a correct final entry for created array.
1535 * z8k-opc.h: Recreated with new z8kgen.
1539 * i386-dis.c: Fix formatting.
1543 * i386-dis.c: Change formatting conventions for architecture
1544 i386:intel to better match the format of various intel i386
1545 assemblers, like nasm, tasm or masm.
1549 * Makefile.am: Update dependencies with "make dep-am".
1550 * Makefile.in: Regenerate
1554 * alpha-dis.c: Fix formatting.
1555 * cris-dis.c: Likewise.
1556 * d10v-dis.c: Likewise.
1557 * d30v-dis.c: Likewise.
1558 * m10300-dis.c: Likewise.
1559 * tic54x-dis.c: Likewise.
1563 * m68k-dis.c: Fix formatting.
1564 * pj-dis.c: Likewise.
1565 * s390-dis.c: Likewise.
1566 * z8k-dis.c: Likewise.
1570 * mips-opc.c (mips_builtin_opcodes): Sort c.le.s and c.lt.s
1571 into the rest of the surrounding definitions.
1575 * i386-dis.c (grps): Print l or w suffix, and require mem modrm
1576 for lgdt, lidt, sgdt, sidt.
1580 * arm-dis.c (print_insn_arm): Use decimal for offsets in LDR/STR.
1584 * cgen-asm.in: Include "xregex.h" always to enable the libiberty
1586 (@arch@_cgen_build_insn_regex): New routine from Graydon.
1587 (@arch@_cgen_assemble_insn): Add Graydon's code to use regex
1588 to verify if it is worth parsing the insn as insn "x". Also update
1589 error message when insn is not a recognized format of the insn vs
1590 when the insn is completely unrecognized.
1594 * cgen-dis.in (print_insn): Use cgen_get_insn_value instead of
1596 * cgen-opc.c (cgen_get_insn_value, cgen_put_insn_value): Respect
1597 non-zero CGEN_CPU_DESC->insn_chunk_bitsize.
1601 * i386-dis.c (set_op): Handle 64 bit and 32 bit mode.
1602 (OP_J): Use bfd_vma for mask to work properly with 64 bits.
1603 (op_address,op_riprel): Use bfd_vma to handle 64 bits.
1607 * Makefile.am (CPUDIR): Define.
1608 (stamp-m32r): Update dependencies.
1609 (stamp-fr30): Ditto.
1610 (stamp-openrisc): Ditto.
1611 * Makefile.in: Regenerate.
1615 * ppc-opc.c: Fix encoding of 'clf' instruction.
1619 * cgen-ibld.in (insert_normal): Support CGEN_IFLD_SIGN_OPT.
1623 * cgen-asm.c (cgen_parse_keyword): Allow any first character.
1624 * cgen-opc.c (cgen_keyword_add): Ignore special first
1625 character when building nonalpha_chars field.
1629 * m88k-dis.c: Format to conform to GNU coding standards.
1633 * disassemble.c (disassembler_usage): Add unused attribute.
1637 * mips-opc.c: Move prefx to start of the table.
1641 * arc-opc.c (insert_st_syntax): Fix over-optimisation of ST
1646 * m68k-opc.c: Add wdebug instruction.
1650 * m10300-opc.c (mn10300_opcodes): Change opcode for AM33 subc.
1654 * cgen-asm.c (cgen_parse_keyword): When looking for the
1655 boundaries of a keyword, allow any special characters
1656 that are actually in one of the allowed keyword.
1657 * cgen-opc.c (cgen_keyword_add): Add any special characters
1658 to the nonalpha_chars field.
1662 * s390-opc.c: Add lgh instruction.
1663 * s390-opc.txt: Likewise.
1667 * i386-dis.c: Group function prototypes in one place.
1668 (FLOATCODE): Redefine as 1.
1669 (USE_GROUPS): Redefine as 2.
1670 (USE_PREFIX_USER_TABLE): Redefine as 3.
1671 (X86_64_SPECIAL): Define as 4.
1672 (GRP1b..GRPAMD): Move USE_GROUPS to bytecode1, index to bytecode2.
1673 (PREGRP0..PREGRP26): Similarly with USE_PREFIX_USER_TABLE.
1674 (dis386_att, dis386_intel, disx86_64_att, disx86_64_intel): Delete.
1675 (dis386): New table combining above four tables.
1676 (dis386_twobyte_att, dis386_twobyte_intel): Delete.
1677 (dis386_twobyte): New table combining above two tables.
1678 (x86_64_table): New table to handle x86_64.
1680 (float_mem_att, float_mem_intel): Delet.
1681 (float_mem): New table combining above two tables.
1682 (print_insn_i386): Modify for above.
1683 (dofloat): Likewise.
1684 (putop): Handle '{', '|' and '}' to select alternative mnemonics.
1685 Return 0 on success, 1 if no valid alternative.
1686 (putop <case 'F'>, <case 'H'>): Print nothing for intel_syntax.
1687 (putop <case 'T'>): Move to case 'U', and share case 'Q' code.
1688 (putop <case 'I'>): Move to case 'T', and share case 'P' code.
1689 (OP_REG <case rAX_reg .. rDI_reg>): Handle as for eAX_reg .. eDI_reg
1691 (OP_I <case q_mode>): Handle as for v_mode if not 64-bit mode.
1692 (OP_I64): If not 64-bit mode, call OP_I.
1693 OP_OFF64): If not 64-bit mode, call OP_OFF.
1694 (OP_ST, OP_STi, OP_SEG, OP_DIR, OP_OFF, OP_OFF64, OP_MMX): Rename
1695 'ignore'/'ignored' to 'bytemode'.
1699 * configure.in: Sort 'ta' case statement.
1700 * configure: Regenerate.
1702 * i386-dis.c (dis386_att): Add 'H' to conditional branch and
1704 (disx86_64_att): Likewise.
1705 (dis386_twobyte_att): Likewise.
1706 (print_insn_i386): Don't print branch hints as a prefix.
1707 (putop): 'H' macro prints branch hints.
1708 (get64): Kill compile warnings.
1712 * sh-opc.h (sh_table): Don't use empty initializers.
1716 * z8k-dis.c: Fix formatting.
1717 (unpack_instr): Remove unused cases in switch statement. Add
1718 safety abort() in default case.
1719 (unparse_instr): Add safety abort() in default case.
1723 * m68k-dis.c (print_insn_m68k): Fix typo.
1724 * m68k-opc.c (m68k_opcodes): Correct allowed operands for
1725 mcf (ColdFire) div, rem and moveb instructions.
1729 * i386-dis.c (cond_jump_flag, loop_jcxz_flag): Define.
1730 (cond_jump_mode, loop_jcxz_mode): Define.
1731 (dis386_att): Add cond_jump_flag and loop_jcxz_flag as
1732 appropriate, and 'F' suffix to loop insns.
1733 (disx86_64_att): Likewise.
1734 (dis386_twobyte_att): Likewise.
1735 (print_insn_i386): Don't output addr prefix for loop, jcxz insns.
1736 Output data size prefix for long conditional jumps. Output cs and
1738 (putop): Handle 'F', and mark PREFIX_ADDR used for case 'E'.
1739 (OP_J): Don't make PREFIX_DATA used.
1743 * sh-opc.h (sh_table): Complete last element entry to avoid
1748 * mips-dis.c (mips_isa_type): Add MIPS r12k support.
1752 * arc-opc.c: Whitespace changes.
1756 * cris-opc.c (cris_spec_regs): Add missing initializer field for
1761 * cgen-dis.in (extract_normal): Complete support for min<base case.
1765 * mips-dis.c (INSNLEN): Rename MAXLEN.
1766 (std_reg_names): Replace by mips32_reg_names and mips64_reg_names.
1767 (print_insn_arg): Remove $ prefix of register names.
1768 (set_mips_isa_type): Remove.
1769 (mips_isa_type): New function.
1770 (get_mips_isa): New Function.
1771 (print_insn_mips): Rename _print_insn_mips.
1772 (_print_insn_mips): New function, contains code which was
1773 duplicated in print_insn_big_mips and print_insn_little_mips.
1774 (print_insn_big_mips): Moved code to _print_insn_mips.
1775 (print_insn_little_mips): Likewise.
1776 (print_mips16_insn_arg): Remove $ prefix of register names.
1777 Print error message before abort.
1781 * ppc-opc.c (powerpc_opcodes): Fixed extended opcode field of
1782 simplified mnemonics used for setting PPC750-specific special
1787 * i386-dis.c (print_insn_i386): Always set `mod', `reg' and
1792 * arc-opc.c (arc_reg_names): Correct attribute for lp_count
1793 register to r/w. Formatting fixes throughout file.
1797 * i386-dis.c (prefix_user_table): Correct movq2dq, movdq2q, and
1799 (twobyte_has_modrm): Update table.
1800 (need_modrm): Give it file scope.
1801 (MODRM_CHECK): Define.
1802 (dofloat): Use MODRM_CHECK.
1809 * cgen-dis.in (default_print_insn): Tolerate min<base instructions
1810 even at end of a section.
1811 * cgen-ibld.in (extract_normal): Tolerate min!=base!=max instructions
1812 by ignoring precariously-unpacked insn_value in favor of raw buffer.
1816 * disassemble.c (disassembler_usage): Remove unused attribute.
1820 * m32r-dis.c, -asm.c, -ibld.c: Regenerated with disassembler fixes.
1824 * cgen-dis.in (print_insn): Remove call to read_insn. Instead,
1825 assume incoming buffer already has the base insn loaded. Handle
1826 smaller-than-base instructions for variable-length case.
1830 * i386-dis.c (Ev, Ed): Remove duplicate define.
1833 (OP_XS): New function.
1834 (dis386_twobyte_att): Correct pinsrw, pextrw, pmovmskb, and
1836 (dis386_twobyte_intel): Likewise.
1837 (prefix_user_table): Use MS for maskmovq operand.
1841 * Makefile.am: Add OpenRISC target.
1842 * Makefile.in: Regenerated.
1844 * disassemble.c (disassembler): Recognize the OpenRISC disassembly.
1846 * configure.in (bfd_openrisc_arch): Add target.
1847 * configure: Regenerated.
1849 * openrisc-asm.c: New file.
1850 * openrisc-desc.c: Likewise.
1851 * openrisc-desc.h: Likewise.
1852 * openrisc-dis.c: Likewise.
1853 * openrisc-ibld.c: Likewise.
1854 * openrisc-opc.c: Likewise.
1855 * openrisc-opc.h: Likewise.
1859 * z8k-dis.c: add names of control registers (ctrl_names);
1860 (seg_length): provides instruction length fixup for segmented
1861 mode; (unpack_instr): correctly handle ARG_DISP16, ARG_DISP12,
1862 CLASS_0DISP7, CLASS_1DISP7, CLASS_DISP8 and CLASS_PR cases;
1863 (unparse_intr): handle CLASS_PR, print addresses without '#'
1864 * z8k-opc.h: re-created with new z8kgen
1865 * z8kgen.c: merged in fixes which were in existing z8k-opc.h; new
1866 entries for ldctl/ldctlb instruction
1870 * i386-dis.c: Add ffreep instruction.
1874 * ppc-opc.c (insert_mbe): Shift mask initializer as long.
1878 * i386-dis.c (PREGRP25): Define.
1879 (dis386_twobyte_att): Use here in place of "movntq" entry.
1880 (dis386_twobyte_intel): Likewise.
1881 (prefix_user_table): Add PREGRP25 entry for "movntq" and "movntdq".
1883 (dis386_twobyte_att): Use here.
1884 (dis386_twobyte_intel): Likewise.
1885 (prefix_user_table): Add PREGRP26 entry for "punpcklqdq".
1886 (prefix_user_table <maskmovdqu>): XM operand, not MX.
1887 (prefix_user_table): Cosmetic changes to "bad" entries.
1891 * mips-opc.c: Remove extraneous whitespace.
1892 * mips-dis.c: Remove extraneous whitespace.
1896 * cgen-asm.in (@arch@_cgen_assemble_insn): Move tmp_errmsg
1897 declaration inside CGEN_VERBOSE_ASSEMBLER_ERRORS conditional.
1898 * cgen-ibld.in (put_insn_int_value): Mark cd parameter as unused
1899 to allay a compiler warning.
1903 * i386-dis.c (dis386_twobyte_att): Add entries for paddq, psubq.
1904 (dis386_twobyte_intel): Likewise.
1905 (twobyte_has_modrm): Set entry for paddq, psubq.
1909 * cgen-dis.in (print_insn_@arch@): Add support for target machine
1910 determination via CGEN_COMPUTE_MACH.
1911 * fr30-desc.c: Regenerate.
1912 * fr30-dis.c: Regenerate.
1913 * fr30-opc.h: Regenerate.
1914 * m32r-desc.c: Regenerate.
1915 * m32r-dis.c: Regenerate.
1916 * m32r-opc.h: Regenerate.
1917 * m32r-opinst.c: Regenerate.
1921 * configure.in: Remove the redundent AC_ARG_PROGRAM.
1922 * configure: Rebuild.
1926 * ia64-gen.c (fetch_insn_class): If xsect, then ignore comment and
1927 notestr if larger than xsect.
1928 (in_class): Handle format M5.
1929 * ia64-asmtab.c: Regnerate.
1933 * vax-dis.c (print_insn_vax): Only fetch two bytes if the info buffer
1934 has more than one byte left to read.
1938 * s390-opc.c: Add new opcodes. Smooth out formatting.
1939 * s390-opc.txt: Add new opcodes.
1943 * arm-dis.c (print_insn_thumb): Compute destination address
1944 of BLX(1) instruction by taking bit 1 from PC and not from bit
1949 * m68k-dis.c (print_insn_m68k): Recognize Coldfire CPUs
1950 so command line switches will work.
1954 * fr30-asm.c: Regenerate.
1955 * fr30-desc.c: Regenerate.
1956 * fr30-desc.h: Regenerate.
1957 * fr30-dis.c: Regenerate.
1958 * fr30-ibld.c: Regenerate.
1959 * fr30-opc.c: Regenerate.
1960 * fr30-opc.h: Regenerate.
1961 * m32r-asm.c: Regenerate.
1962 * m32r-desc.c: Regenerate.
1963 * m32r-desc.h: Regenerate.
1964 * m32r-dis.c: Regenerate.
1965 * m32r-ibld.c: Regenerate.
1966 * m32r-opc.c: Regenerate.
1967 * m32r-opc.h: Regenerate.
1968 * m32r-opinst.c: Regenerate.
1972 * m68k-opc.c: fix cpushl according to Motorola. Enable
1973 bunch of instructions for Coldfire 5407 and add all new.
1977 * configure.in (BFD_VERSION): Do without grep.
1978 * configure: Regenerate.
1979 * Makefile.am: Run "make dep-am".
1980 * Makefile.in: Regenerate.
1984 * ia64-opc-a.c: Add missing pseudo-ops for "cmp" and "cmp4".
1985 * ia64-asmtab.c: Regenerate.
1989 * ia64-opc-d.c (ia64_opcodes_d): Break the "add" pattern into two
1990 separate variants: one for IMM22 and the other for IMM14.
1991 * ia64-asmtab.c: Regenerate.
1995 * cgen-opc.c (cgen_get_insn_value): Add missing `return'.
1999 * Makefile.am (ia64-ic.tbl): Remove the target.
2000 (ia64-raw.tbl): Likewise.
2001 (ia64-waw.tbl): Likewise.
2002 (ia64-war.tbl): Likewise.
2003 (ia64-asmtab.c): Generate it in the source directory.
2004 * Makefile.in: Regenerated.
2008 * Makefile.am: Add PDP-11 target.
2009 * configure.in: Likewise.
2010 * disassemble.c: Likewise.
2011 * pdp11-dis.c: New file.
2012 * pdp11-opc.c: New file.
2016 * ia64-ic.tbl: Update from Intel. Add setf to fr-writers.
2017 * ia64-asmtab.c: Regenerate.
2021 * i386-dis.c (prefix_user_t): Add 'Y' to SSE ineger converison
2027 * mips-dis.c (print_insn_arg): Use top four bits of the address of
2028 the following instruction not of the jump itself for the jump
2030 (print_mips16_insn_arg): Likewise.
2034 * Makefile.am (stamp-lib): ranlib the libopcodes.a in the build
2036 * Makefile.in: Regenerate.
2040 * Makefile.am: Add linux target for S/390.
2041 * Makefile.in: Likewise.
2042 * configure.in: Likewise.
2043 * disassemble.c: Likewise.
2044 * s390-dis.c: New file.
2045 * s390-mkopc.c: New file.
2046 * s390-opc.c: New file.
2047 * s390-opc.txt: New file.
2051 * ia64-asmtab.c: Revert 2000-12-16 change.
2055 * fr30-desc.h: Regenerate with CGEN_MAX_SYNTAX_ELEMENTS.
2056 * m32r-desc.h: Regenerate.
2060 * i386-dis.c (dis386_att, grps): Use 'T' for push/pop
2061 (putop): Handle 'T', alphabetize order, fix 'I' handling in Intel syntax
2065 * hppa-dis.c (print_insn_hppa): Handle '>' and '<' arg types.
2069 * disassemble.c: Remove spurious white space.
2073 * i386-dis.c (dis386_att, disx86_64_att): Fix ret, lret and iret
2078 * configure.in: Add arc-ext.lo for bfd_arc_arch selection.
2079 * Makefile.am (C_FILES): Add arc-ext.c.
2080 (ALL_MACHINES) Add arc-ext.lo.
2081 (INCLUDES) Add opcode directory to list.
2082 New dependency entry for arc-ext.lo.
2083 * disassemble.c (disassembler): Correct call to
2084 arc_get_disassembler.
2085 * arc-opc.c: New update for ARC, including full base
2086 instructions for ARC variants.
2087 * arc-dis.h, arc-dis.c: New update for ARC, including
2088 extensibility functionality.
2089 * arc-ext.h, arc-ext.c: New files for handling extensibility.
2093 * i386-dis.c (PREGRP15 - PREGRP24): New.
2094 (dis386_twobyt): Add SSE2 instructions.
2095 (twobyte_uses_SSE_prefix: Rename from ... ; add new SSE instructions.
2096 (twobyte_uses_f3_prefix): ... this one.
2097 (grps): Add SSE instructions.
2098 (prefix_user_table): Add two new slots; add SSE2 instructions.
2099 (print_insn_i386): Rename uses_f3_prefix to uses_SSE_prefix;
2100 Handle the REPNZ and Data16 prefixes as well; do proper lookup
2101 to prefix_user_table.
2102 (OP_E): Accept mfence and lfence as well.
2103 (OP_MMX): Data16 prefix turns MMX to SSE; support REX extensions.
2104 (OP_XMM): Support REX extensions.
2110 * arm-dis.c (print_insn): Set pc to zero for instructions with
2111 a reloc associated with them.
2115 * cgen-asm.in (parse_insn_normal): Changed syn to be
2116 CGEN_SYNTAX_CHAR_TYPE. Changed all references to *syn
2117 as character to use CGEN_SYNTAX_CHAR macro and all comparisons
2118 to '\0' to use 0 instead.
2119 * cgen-dis.in (print_insn_normal): Ditto.
2120 * cgen-ibld.in (insert_insn_normal, extract_insn_normal): Ditto.
2124 * i386-dis.c: Add x86_64 support.
2125 (rex): New static variable.
2126 (REX_MODE64, REX_EXTX, REX_EXTY, REX_EXTZ): New constants.
2127 (USED_REX): New macro.
2128 (Ev, Ed, Rm, Iq, Iv64, Cm, Dm, Rm*, Ob64, Ov64): New macros.
2129 (OP_I64, OP_OFF64, OP_IMREG): New functions.
2130 (OP_REG, OP_OFF): Declare.
2131 (get64, get32, get32s): New functions.
2132 (r??_reg): New constants.
2133 (dis386_att): Change templates of instruction implicitly promoted
2134 to 64bit; change e?? to RMe?? for unwind RM byte instructions.
2136 (dis386_intel): Likewise.
2137 (dixx86_64_att): New table based on dis386_att.
2138 (dixx86_64_intel): New table based on dis386_intel.
2139 (names64, names8rex): New global variable.
2140 (names32, names16): Add extended registers.
2141 (prefix_user_t): Recognize rex prefixes.
2142 (prefix_name): Print REX prefixes nicely.
2143 (op_riprel): New global variable.
2144 (start_pc): Set type to bfd_vma.
2145 (print_insn_i386): Detect the 64bit mode and use proper table;
2146 move ckprefix after initializing the buffer; output unused rex prefixes;
2147 output information about target of RIP relative addresses.
2148 (putop): Support 'O' and 'I'. Update handling of "P', 'Q', 'R' and 'S';
2149 (print_operand_value): New function.
2150 (OP_E, OP_G, OP_REG, OP_I, OP_J, OP_DIR, OP_OFF, OP_D): Add support for
2151 REX prefix and new modes.
2152 (get64, get32s): New.
2153 (get32): Return bfd_signed_vma type.
2154 (set_op): Initialize the op_riprel.
2155 * disassemble.c (disassembler): Recognize the x86-64 disassembly.
2159 cgen-dis.in (read_insn): Use bfd_get_bits()
2163 * cgen-dis.c (hash_insn_array): Use bfd_put_bits().
2164 (hash_insn_list): Likewise
2165 * cgen-ibld.in (insert_1): Use bfd_put_bits() and bfd_get_bits().
2166 (extract_1): Use bfd_get_bits().
2167 (extract_normal): Apply sign extension to both extraction
2169 * cgen-opc.c (cgen_get_insn_value): Use bfd_get_bits()
2170 (cgen_put_insn_value): Use bfd_put_bits()
2174 * cgen-asm.in (parse_insn_normal): Print better error message for
2175 instructions with missing operands.
2179 * cgen-opc.c: Include alloca.h if HAVE_ALLOCA_H is defined.
2183 * Makefile.in: Regenerate.
2184 * aclocal.m4: Regenerate.
2185 * config.in: Regenerate.
2186 * configure.in: Add spacing.
2187 * configure: Regenerate.
2188 * ia64-asmtab.c: Regenerate.
2189 * po/opcodes.pot: Regenerate.
2193 * cgen-asm.in (@arch@_cgen_assemble_insn): Prefer printing insert-time
2194 error messages over later parse-time ones.
2198 * ia64-dis.c (print_insn_ia64): Cast away const on ia64_free_opcode
2200 * ia64-gen.c (insert_deplist): Cast sizeof result to int.
2201 (print_dependency_table): Print NULL if semantics field not set.
2202 (insert_opcode_dependencies): Mark cmp parameter as unused.
2203 (print_main_table): Use fprintf_vma to print long long fields.
2204 (main): Mark argv paramter as unused. Convert to old style definition.
2205 * ia64-opc.c (ia64_find_dependency): Cast sizeof result to int.
2206 * ia64-asmtab.c: Regnerate.
2210 * m32r-dis.c (print_insn): Prevent re-read of instruction from
2213 * fr30-dis.c: Regenerate.
2217 * configure.in: Add arc-ext.lo for bfd_arc_arch selection.
2218 * Makefile.am (C_FILES): Add arc-ext.c.
2219 (ALL_MACHINES) Add arc-ext.lo.
2220 (INCLUDES) Add opcode directory to list.
2221 New dependency entry for arc-ext.lo.
2222 * disassemble.c (disassembler): Correct call to
2223 arc_get_disassembler.
2224 * arc-opc.c: New update for ARC, including full base
2225 instructions for ARC variants.
2226 * arc-dis.h, arc-dis.c: New update for ARC, including
2227 extensibility functionality.
2228 * arc-ext.h, arc-ext.c: New files for handling extensibility.
2232 * mips-opc.c (mips_builtin_opcodes): Use the WR_HILO, RD_HILO,
2233 MOD_HILO, and MOD_LO macros.
2235 * mips-opc.c (M1, M2): Delete.
2236 (mips_builtin_opcodes): Remove all uses of M1.
2238 * mips-opc.c (mips_builtin_opcodes): Make the dmfc2 and dmtc2
2239 instructions take "G" format second operands and use the
2241 There are mfc3 and mtc3 opcodes, so add dmfc3 and dmtc3 opcodes to
2243 Delete "sel" code operands from mfc1 and mtc1.
2244 Add MIPS64 opcode changes (dclo, dclz), and "sel" code variants
2250 * mips-opc.c (mips_builtin_opcodes): Finish additions
2251 for MIPS32 support, and clean up existing entries for
2252 aesthetics, consistency with the MIPS32 ISA, and
2253 with consistency the rest of the table.
2257 * mips16-opc.c (mips16_opcodes): Add initialiser for membership
2262 mips-dis.c (print_insn_arg): Handle new 'U' and 'J' argument
2263 specifiers. Update 'B' for new constant names, and remove
2265 mips-opc.c (mips_builtin_opcodes): Place "pref" and "ssnop"
2266 near the top of the array, so they are disassembled properly.
2267 Enable "ssnop" for MIPS32. Add "break" variant with 20 bit
2268 code for MIPS32. Update "clo" and "clz" to use 'U' operand
2269 specifier. Add 'H' format specifier variants for "mfc1,"
2270 "mfc2," "mfc3," "mtc1," "mtc2," and "mtc3" for MIPS32. Update
2271 MIPS32 "sdbbp" to use 'B' operand specifier. Add MIPS32
2272 "wait" variant which uses 'J' operand specifier.
2274 * mips-dis.c (set_mips_isa_type): Update to use
2275 CPU_UNKNOWN and ISA_* constants. Add bfd_mach_mips32 case.
2276 Replace bfd_mach_mips4K with bfd_mach_mips32_4k case.
2277 * mips-opc.c (I32): New constant for instructions added in
2280 (mips_builtin_opcodes) Replace all uses of P4 with I32.
2282 * mips-dis.c (set_mips_isa_type): Add cases for
2283 bfd_mach_mips5 and bfd_mach_mips64.
2284 * mips-opc.c (I64): New definitions.
2286 * mips-dis.c (set_mips_isa_type): Add case for
2291 * sh-dis.c (print_insn_ddt): Make insn_x, insn_y unsigned.
2292 (print_insn_ppi): Make nib1, nib2, nib3 unsigned.
2293 Initialize variable dc to NULL.
2294 (print_insn_shx): Remove unused label d_reg_n.
2298 * arm-opc.h: Add new opcode formatting parameter 'B'.
2299 (arm_opcodes): Add XScale, v5, and v5te instructions.
2300 (thumb_opcodes): Add v5t instructions.
2302 * arm-dis.c (print_insn_arm): Handle new 'B' format
2304 (print_insn_thumb): Decode BLX(1) instruction.
2308 * mips-opc.c: Fix file header comment.
2312 * cris-dis.c (cris_get_disassembler): If abfd is NULL, return
2313 print_insn_cris_with_register_prefix.
2317 * sh-opc.h: The operand of `mov.w r0, (<disp>,GBR)' is IMM1, not 0.
2321 * cgen-dis.in (print_insn): All insns which can fit into insn_value
2322 must be loaded there in their entirety.
2326 * sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs.
2327 (compute_arch_mask): Add v8plusb and v9b machines.
2328 (print_insn_sparc): siam mode decoding, accept ASRs up to 25.
2329 * sparc-opc.c: Support for Cheetah instruction set.
2330 (prefetch_table): Add #invalidate.
2334 * mcore-dis.c (imsk): Change mask for OC to 0xFE00.
2338 * fr30-desc.h: Regenerate.
2339 * m32r-desc.h: Regenerate.
2340 * m32r-ibld.c: Regenerate.
2344 * ia64-ic.tbl: Update from Intel.
2345 * ia64-asmtab.c: Regenerate.
2349 * ia64-gen.c: Convert C++-style comments to C-style comments.
2350 * tic54x-dis.c: Likewise.
2354 Changes to add dollar prefix to registers for files where user symbols
2355 don't have a leading underscore. Fix formatting.
2356 * cris-dis.c (REGISTER_PREFIX_CHAR): New.
2357 (format_reg): Add parameter with_reg_prefix. All callers changed.
2358 (print_with_operands): Ditto.
2359 (print_insn_cris_generic): Renamed from print_insn_cris, add
2360 parameter with_reg_prefix.
2361 (print_insn_cris_with_register_prefix,
2362 print_insn_cris_without_register_prefix, cris_get_disassembler):
2364 * disassemble.c (disassembler) [ARCH_cris]: Call cris_get_disassembler.
2368 * ia64-opc-f.c (ia64_opcodes_f): Add fpcmp pseudo-ops for
2369 gt, ge, ngt, and nge.
2370 * ia64-asmtab.c: Regenerate.
2372 * ia64-dis.c (print_insn_ia64): Revert Aug 7 byte skip count change.
2373 * ia64-gen.c (parse_semantics): Handle IA64_DVS_STOP.
2374 (lookup_specifier): Handle "PR%, 1 to 15" and "PR%, 16 to 62".
2375 * ia64-ic.tbl, ia64-raw.tbl, ia64-war.tbl, ia64-waw.tbl: Update.
2376 * ia64-asmtab.c: Regnerate.
2380 * mips-opc.c (mips_builtin_opcodes): Support cache instruction on 4K cores.
2381 Add mfc0 and mtc0 with sub-selection values.
2382 Add clo and clz opcodes.
2383 Add msub and msubu instructions for MIPS32.
2384 Add madd/maddu aliases for mad/madu for MIPS32.
2385 Support wait, deret, eret, movn, pref for MIPS32.
2386 Support tlbp, tlbr, tlbwi, tlbwr.
2389 * mips-dis.c (print_insn_arg): Print sdbbp 'm' args.
2390 (print_insn_arg): Handle 'H' args.
2391 (set_mips_isa_type): Recognize 4K.
2392 Use CPU_* defines instead of hardcoded numbers.
2396 * d30v-opc.c (d30v_operand_t): New operand type Rb2.
2397 (d30v_format_tab): Use Rb2 for modinc and moddec.
2401 * d30v-opc.c (d30v_format_tab): Use format Ra for
2406 * configure: Rebuilt with new libtool.m4.
2410 * configure: Regenerate.
2411 * po/opcodes.pot: Regenerate.
2415 * acinclude.m4: Include libtool and gettext macros from the
2417 * aclocal.m4, configure: Rebuilt.
2421 * tic80-dis.c: Fix formatting.
2425 * w65-dis.c: Fix formatting.
2429 * ppc-opc.c: Add XTLB macro for a few PPC 4xx extended mnemonics.
2430 (powerpc_opcodes): Add table entries for PPC 405 instructions.
2431 Changed rfci, icbt, mfdcr, dccci, mtdcr, iccci from PPC to PPC403
2432 instructions. Added extended mnemonic mftbl as defined in the
2433 405GP manual for all PPCs.
2437 * ia64-dis.c (print_insn_ia64): Add failed label after ia64_free_opcode
2438 call. Change last goto to use failed instead of done.
2442 * cgen-ibld.in (cgen_put_insn_int_value): New function.
2443 (insert_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
2444 (insert_insn_normal): Use cgen_put_insn_int_value with CGEN_INT_INSN_P.
2445 (extract_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
2446 * cgen-dis.in (read_insn): New static function.
2447 (print_insn): Use read_insn to read the insn into the buffer and set
2449 (print_insn): in CGEN_INT_INSN_P, make sure that the entire insn is
2451 * fr30-asm.c: Regenerated.
2452 * fr30-desc.c: Regenerated.
2453 * fr30-desc.h: Regenerated.
2454 * fr30-dis.c: Regenerated.
2455 * fr30-ibld.c: Regenerated.
2456 * fr30-opc.c: Regenerated.
2457 * fr30-opc.h: Regenerated.
2458 * m32r-asm.c: Regenerated.
2459 * m32r-desc.c: Regenerated.
2460 * m32r-desc.h: Regenerated.
2461 * m32r-dis.c: Regenerated.
2462 * m32r-ibld.c: Regenerated.
2463 * m32r-opc.c: Regenerated.
2467 * tic30-dis.c: Fix formatting.
2471 * sh-dis.c: Fix formatting.
2475 * ppc-opc.c (powerpc_opcodes): Add rfid, mtsrd, mtsrdin, mtmsrd.
2479 * z8k-dis.c: Fix formatting.
2483 * ia64-ic.tbl (pr-readers-nobr-nomovpr): Add addl, adds. Delete
2484 break, mov-immediate, nop.
2485 * ia64-opc-f.c: Delete fpsub instructions.
2486 * ia64-opc-m.c: Add POSTINC to all instructions with postincrement
2487 address operand. Rewrite using macros to avoid long lines.
2488 * ia64-opc.h (POSTINC): Define.
2489 * ia64-asmtab.c: Regenerate.
2493 * ia64-ic.tbl: Add missing entries.
2497 * i860-dis.c (print_br_address): Change third argument from int
2502 * ia64-dis.c (print_insn_ia64): Get byte skip count correct
2503 for MLI templates. Handle IA64_OPND_TGT64.
2507 * cgen-dis.in, cgen-asm.in, cgen-ibld.in: New files.
2508 * cgen.sh: Likewise.
2512 * ia64-dis.c (print_insn_ia64): Call ia64_free_opcode at end.
2516 * avr-dis.c (avr_operand): Use PARAMS macro in declaration.
2517 Change return type from void to int. Check the combination
2518 of operands, return 1 if valid. Fix to avoid BUF overflow.
2519 Report undefined combinations of operands in COMMENT.
2520 Report internal errors to stderr. Output the adiw/sbiw
2521 constant operand in both decimal and hex.
2522 (print_insn_avr): Disassemble ldd/std with displacement of 0
2523 as ld/st. Check avr_operand () return value, handle invalid
2524 combinations of operands like unknown opcodes.
2528 * Makefile.am (CGEN, CGENDEPS, CGENDIR, CGENFLAGS): New.
2529 (run-cgen, stamp-m32r, stamp-fr30): New targets.
2530 * Makefile.in: Regenerate.
2531 * configure.in: Add --enable-cgen-maint option.
2532 * configure: Regenerate.
2536 * cgen-opc.c (cgen_hw_lookup_by_name): 'i' is now unsigned.
2537 (cgen_hw_lookup_by_num): Ditto.
2538 (cgen_operand_lookup_by_name): Ditto.
2539 (print_address): Ditto.
2540 (print_keyword): Ditto.
2541 * cgen-dis.c (hash_insn_array): Mark unused parameters with
2543 * cgen-asm.c (hash_insn_array): Mark unused parameters with
2545 (cgen_parse_keyword): Ditto.
2549 * i860-dis.c: New file.
2550 (print_insn_i860): New function.
2551 (print_br_address): New function.
2552 (sign_extend): New function.
2553 (BITWISE_OP): New macro.
2554 (I860_REG_PREFIX): New macro.
2555 (grnames, frnames, crnames): New structures.
2557 * disassemble.c (ARCH_i860): Define.
2558 (disassembler): Add check for bfd_arch_i860 to set disassemble
2559 function to print_insn_i860.
2561 * Makefile.in (CFILES): Added i860-dis.c.
2562 (ALL_MACHINES): Added i860-dis.lo.
2563 (i860-dis.lo): New dependences.
2565 * configure.in: New bits for bfd_i860_arch.
2567 * configure: Regenerated.
2571 * Makefile.am (CFILES): Add cris-dis.c and cris-opc.c.
2572 (ALL_MACHINES): Add cris-dis.lo and cris-opc.lo.
2573 (cris-dis.lo, cris-opc.lo): New rules.
2574 * Makefile.in: Rebuild.
2575 * configure.in (bfd_cris_arch): New target.
2576 * configure: Rebuild.
2577 * disassemble.c (ARCH_cris): Define.
2578 (disassembler): Support ARCH_cris.
2579 * cris-dis.c, cris-opc.c: New files.
2580 * po/POTFILES.in, po/opcodes.pot: Regenerate.
2584 * sparc-opc.c (sparc_opcodes): popc has 0 in rs1, not rs2.
2589 * ppc-opc.c (powerpc_opcodes): Correct suffix for vslw.
2594 * hppa-dis.c (fput_reg, fput_fp_reg, fput_fp_reg_r, fput_creg,
2595 fput_const, extract_3, extract_5_load, extract_5_store,
2596 extract_5r_store, extract_5R_store, extract_10U_store,
2597 extract_5Q_store, extract_11, extract_14, extract_16, extract_21,
2598 extract_12, extract_17, extract_22): Prototype.
2599 (print_insn_hppa): Rename inner block opcode -> opc to avoid
2600 shadowing outer block.
2609 * arm-dis.c (print_insn_arm): Output combinations of PSR flags.
2613 * avr-dis.c (avr_operand): Change _ () to _() around all strings
2614 marked for translation (exception from the usual coding style).
2615 (print_insn_avr): Initialize insn2 to avoid warnings.
2619 * h8300-dis.c (bfd_h8_disassemble): Improve readability.
2620 * h8500-dis.c: Fix formatting.
2624 * Makefile.am (DEP): Fix 2000-06-22. grep after running dep.sed
2625 (CLEANFILES): Add DEPA.
2626 * Makefile.in: Regenerate.
2630 * arm-dis.c (regnames): Add an additional register set to match
2631 the set used by GCC. Make it the default.
2635 * Makefile.am (DEP): grep for leading `/' in DEP1, and fail if we
2637 * Makefile.in: Regenerate.
2641 * Makefile.am: Rebuild dependency.
2642 * Makefile.in: Rebuild.
2646 * Makefile.in, configure: regenerate
2647 * disassemble.c (disassembler): Recognize ARCH_m68hc12,
2649 * m68hc11-dis.c (read_memory, print_insn, print_insn_m68hc12):
2651 * configure.in: Recognize m68hc12 and m68hc11.
2652 * m68hc11-dis.c, m68hc11-opc.c: New files for support of m68hc1x
2653 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
2654 and opcode generation for m68hc11 and m68hc12.
2658 * disassemble.c (disassembler): Refer to the PowerPC 620 using
2659 bfd_mach_ppc_620 instead of 620.
2663 * h8300-dis.c: Fix formatting.
2664 (bfd_h8_disassemble): Distinguish adds/subs, inc/dec.[wl]
2669 * avr-dis.c (avr_operand): Bugfix for jmp/call address.
2673 * avr-dis.c: completely rewritten.
2677 * h8300-dis.c: Follow the GNU coding style.
2678 (bfd_h8_disassemble) Fix a typo.
2682 * h8300-dis.c (bfd_h8_disassemble_init): Fix a typo.
2683 (bfd_h8_disassemble): Distinguish the operand size of inc/dev.[wl]
2684 correctly. Fix a typo.
2688 * opintl.h (_(String)): Explain why dgettext is used instead of
2693 * opintl.h (gettext, dgettext, dcgettext, textdomain,
2694 bindtextdomain): Replace defines with those from intl/libgettext.h
2695 to quieten gcc warnings.
2699 * Makefile.am: Update dependencies with "make dep-am"
2700 * Makefile.in: Regenerate.
2704 * m10300-dis.c (disassemble): Don't assume 32-bit longs when
2705 sign-extending operands.
2709 * d10v-opc.c (d10v_opcodes): add ALONE tag to all short branches
2714 * Makefile.am (LIBIBERTY): Define.
2718 * mips-dis.c (REGISTER_NAMES): Rename to STD_REGISTER_NAMES.
2719 (STD_REGISTER_NAMES): New name for REGISTER_NAMES.
2720 (reg_names): Rename to std_reg_names. Change it to a char **
2722 (std_reg_names): New name for reg_names.
2723 (set_mips_isa_type): Set reg_names to point to std_reg_names by
2728 * fr30-desc.h: Partially regenerated to account for changed
2729 CGEN_MAX_* -> CGEN_ACTUAL_MAX_* macros.
2730 * m32r-desc.h: Ditto.
2734 * arm-opc.h: Use upper case for flasg in MSR and MRS
2735 instructions. Allow any bit to be set in the field_mask of
2736 the MSR instruction.
2738 * arm-dis.c (print_insn_arm): Decode _x and _s bits of the
2739 field_mask of an MSR instruction.
2743 * arm-opc.h: Disassembly of thumb ldsb/ldsh
2744 instructions changed to ldrsb/ldrsh.
2748 * mips-dis.c (print_insn_arg): Don't mask top 32 bits of 64-bit
2749 target addresses for 'jal' and 'j'.
2753 * ppc-opc.c (powerpc_opcodes): Make the predicted-branch opcodes
2754 also available in common mode when powerpc syntax is being used.
2758 * m68k-dis.c (dummy_printer): Add ATTRIBUTE_UNUSED to args.
2759 (dummy_print_address): Ditto.
2763 * tic54x-opc.c: New.
2764 * tic54x-dis.c: New.
2765 * disassemble.c (disassembler): Add ARCH_tic54x.
2766 * configure.in: Added tic54x target.
2768 * Makefile.am: Add tic54x dependencies.
2769 * Makefile.in: Ditto.
2773 * ppc-opc.c (VA, VB, VC, VD, VS, SIMM, UIMM, SHB): New macros, for
2774 vector unit operands.
2775 (VX, VX_MASK, VXA, VXA_MASK, VXR, VXR_MASK): New macros, for vector
2776 unit instruction formats.
2777 (PPCVEC): New macro, mask for vector instructions.
2778 (powerpc_operands): Add table entries for above operand types.
2779 (powerpc_opcodes): Add table entries for vector instructions.
2781 * ppc-dis.c (print_insn_big_powerpc): Add PPC_OPCODE_ALTIVEC to mask.
2782 (print_insn_little_powerpc): Likewise.
2783 (print_insn_powerpc): Prepend 'v' when printing vector registers.
2787 * configure.in: Add bfd_powerpc_64_arch.
2788 * disassemble.c (disassembler): Use print_insn_big_powerpc for
2793 * fr30-desc.c (fr30_cgen_cpu_open): Initialise signed_overflow
2798 * avr-dis.c (reg_fmul_d): New. Extract destination register from
2800 (reg_fmul_r): New. Extract source register from FMUL instruction.
2801 (reg_muls_d): New. Extract destination register from MULS instruction.
2802 (reg_muls_r): New. Extract source register from MULS instruction.
2803 (reg_movw_d): New. Extract destination register from MOVW instruction.
2804 (reg_movw_r): New. Extract source register from MOVW instruction.
2805 (print_insn_avr): Handle MOVW, MULS, MULSU, FMUL, FMULS, FMULSU,
2806 EICALL, EIJMP, LPM r,Z, ELPM r,Z, SPM, ESPM instructions.
2810 * ia64-gen.c (general): Add an ordered table of primary
2811 opcode names, as well as priority fields to disassembly data
2812 structures to enforce a preferred disassembly format based on the
2813 ordering of the opcode tables.
2814 (load_insn_classes): Show a useful message if IC tables are missing.
2815 (load_depfile): Ditto.
2816 * ia64-asmtab.h (struct ia64_dis_names ): Add priority flag to
2817 distinguish preferred disassembly.
2818 * ia64-opc-f.c: Reorder some insn for preferred disassembly
2819 format. Fix incorrect flag on fma.s/fma.s.s0.
2820 * ia64-opc.c: Scan *all* disassembly matches and use the one with
2821 the highest priority.
2822 * ia64-opc-b.c: Use more abbreviations.
2823 * ia64-asmtab.c: Regenerate.
2827 * hppa-dis.c (extract_16): New function.
2828 (print_insn_hppa): Fix incorrect handling of 'fe'. Added handling of
2829 new operand types l,y,&,fe,fE,fx.
2837 * Makefile.am (HFILES): Add ia64-asmtab.h, ia64-opc.h.
2838 (CFILES): Add ia64-dis.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c,
2839 ia64-opc-i.c, ia64-opc-m.c, ia64-opc-d.c, ia64-opc.c, ia64-gen.c,
2841 (ALL_MACHINES): Add ia64-dis.lo, ia64-opc.lo.
2842 (ia64-ic.tbl, ia64-raw.tbl, ia64-waw.tbl, ia64-war.tbl, ia64-gen,
2843 ia64-gen.o, ia64-asmtab.c, ia64-dis.lo, ia64-opc.lo): New rules.
2844 * Makefile.in: Rebuild.
2845 * configure Rebuild.
2846 * configure.in (bfd_ia64_arch): New target.
2847 * disassemble.c (ARCH_ia64): Define.
2848 (disassembler): Support ARCH_ia64.
2849 * ia64-asmtab.c, ia64-asmtab.h, ia64-dis.c, ia64-gen.c ia64-ic.tbl,
2850 ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c ia64-opc-f.c, ia64-opc-i.c,
2851 ia64-opc-m.c, ia64-opc-x.c, ia64-opc.c, ia64-opc.h, ia64-raw.tbl,
2852 ia64-war.tbl, ia64-waw.tbl: New files.
2856 * m10300-dis.c (HAVE_AM30, HAVE_AM33): Define.
2857 (disassemble): Use them.
2861 * sysdep.h: Include "ansidecl.h" not <ansidecl.h>
2862 * Makefile.am: Update dependencies.
2863 * Makefile.in: Regenerate.
2867 * a29k-dis.c, alpha-dis.c, alpha-opc.c, arc-dis.c, arc-opc.c,
2868 avr-dis.c, d10v-dis.c, d10v-opc.c, d30v-dis.c, d30v-opc.c,
2869 disassemble.c, h8300-dis.c, h8500-dis.c, hppa-dis.c, i370-dis.c,
2870 i370-opc.c, i960-dis.c, m10200-dis.c, m10200-opc.c, m10300-dis.c,
2871 m10300-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c, mcore-dis.c,
2872 mips-dis.c, mips-opc.c, mips16-opc.c, pj-dis.c, pj-opc.c,
2873 ppc-dis.c, ppc-opc.c, sh-dis.c, sparc-dis.c, sparc-opc.c,
2874 tic80-dis.c, tic80-opc.c, v850-dis.c, v850-opc.c, vax-dis.c,
2875 w65-dis.c, z8k-dis.c, z8kgen.c: Include sysdep.h. Remove
2876 ansidecl.h as sysdep.h includes it.
2880 * configure.in (WARN_CFLAGS): Set to -W -Wall by default. Add
2881 --enable-build-warnings option.
2882 * Makefile.am (AM_CFLAGS, WARN_CFLAGS): Add definitions.
2883 * Makefile.in, configure: Re-generate.
2887 * sh-opc.h (sh_table): Use A_DISP_PC / PCRELIMM_8BY2 for ldre & ldrs.
2888 stc GBR,@-<REG_N> is available for arch_sh1_up.
2889 Group parallel processing insn with identical mnemonics together.
2890 Make three-operand psha / pshl come first.
2894 * sh-opc.h (sh_nibble_type): Remove DISP_8 and DISP_4.
2895 Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
2896 (sh_arg_type): Add A_PC.
2897 (sh_table): Update entries using immediates. Add repeat.
2898 * sh-dis.c (print_insn_shx): Remove DISP_8 and DISP_4.
2899 Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
2903 * po/opcodes.pot: Regenerate.
2905 * Makefile.am (MKDEP): Use gcc -MM rather than mkdep.
2906 (DEP): Quote when passing vars to sub-make. Add warning message
2908 (DEP1): Rewrite for "gcc -MM".
2909 (CLEANFILES): Add DEP2.
2910 Update dependencies.
2911 * Makefile.in: Regenerate.
2915 * avr-dis.c: Syntax cleanup.
2916 (add0fff): Print the pc relative address as a signed number.
2917 (add03f8): Likewise.
2921 * disassemble.c (disassembler_usage): Don't use a prototype. Mark
2922 the parameter ATTRIBUTE_UNUSED.
2923 * ppc-opc.c: Add ATTRIBUTE_UNUSED as needed.
2927 * m10300-opc.c: SP-based offsets are always unsigned.
2931 * arm-opc.h (thumb_opcodes): Disassemble 0xde.. to "bal"
2932 [branch always] instead of "undefined".
2936 * d30v-opc.c (d30v_format_table): Move SHORT_AR to end of list of
2937 short instructions, from end of list of long instructions.
2941 * Makefile.am (CFILES): Add avr-dis.c.
2942 (ALL_MACHINES): Add avr-dis.lo.
2946 * avr-dis.c (add0fff, add03f8): Don't use structure bitfields to
2948 (print_insn_avr): Call function via pointer in K&R compatible way.
2949 (dispLDD, regPP, reg50, reg104, reg40, reg20w, lit404, lit204,
2950 add0fff, add03f8): Convert to old style function declaration and
2952 (avrdis_opcode): Add prototype.
2956 * avr-dis.c: New file. AVR disassembler.
2957 * configure.in (bfd_avr_arch): New architecture support.
2958 * disassemble.c: Likewise.
2959 * configure: Regenerate.
2963 * sh-opc.h (sh_table): ldre and ldrs have a *signed* displacement.
2967 * d30v-dis.c (print_insn): Remove d*i hacks. Use per-operand
2968 flag to determine if operand is pc-relative.
2970 (d30v_format_table):
2971 (REL6S3): Renamed from IMM6S3.
2972 Added flag OPERAND_PCREL.
2973 (REL12S3, REL18S3, REL32): Split from IMM12S3, IMM18S3, REL32, with
2974 added flag OPERAND_PCREL.
2975 (IMM12S3U): Replaced with REL12S3.
2976 (SHORT_D2, LONG_D): Delay target is pc-relative.
2977 (SHORT_B2r, SHORT_B3r, SHORT_B3br, SHORT_D2r, LONG_Ur, LONG_2r):
2978 Split from SHORT_B2, SHORT_D2, SHORT_B3b, SHORT_D2, LONG_U, LONG_2r,
2979 using the REL* operands.
2980 (LONG_2br, LONG_Dr): Likewise, from LONG_2b, LONG_D.
2981 (SHORT_D1r, SHORT_D2Br, LONG_Dbr): Renamed from SHORT_D1, SHORT_D2B,
2982 LONG_Db, using REL* operands.
2983 (SHORT_U, SHORT_A5S): Removed stray alternatives.
2984 (d30v_opcode_table): Use new *r formats.
2988 * m32r-desc.c (m32r_cgen_cpu_open): Replace 'flags' with
2989 'signed_overflow_ok_p'.
2993 * Makefile.am (stamp-lib): Use $(LIBTOOL) --config to get the
2994 name of the libtool directory.
2995 * Makefile.in: Rebuild.
2999 * cgen-opc.c (cgen_set_signed_overflow_ok): New function.
3000 (cgen_clear_signed_overflow_ok): New function.
3001 (cgen_signed_overflow_ok_p): New function.
3005 * m32r-asm.c, m32r-desc.c, m32r-desc.h, m32r-dis.c,
3006 m32r-ibld.c, m32r-opc.h: Rebuild.
3010 * i370-dis.c, i370-opc.c: New.
3012 * disassemble.c (ARCH_i370): Define.
3013 (disassembler): Handle it.
3015 * Makefile.am: Add support for Linux/IBM 370.
3016 * configure.in: Likewise.
3018 * Makefile.in: Regenerate.
3019 * configure: Likewise.
3023 * d30v-opc.c (d30v_opcode_tab) : Added FLAG_NOT_WITH_ADDSUBppp to
3024 ST2H, STB, STH, STHH, STW and ST2H opcodes to prohibit parallel
3029 * mips-dis.c (_print_insn_mips): New arg for OPCODE_IS_MEMBER:
3031 * mips-opc.c (G6): New define.
3032 (mips_builtin_op): Add "move" definition for -gp32.
3037 * ppc-opc.c: Correct dcread--it takes 3 arguments, not 2.
3041 * dis-buf.c (buffer_read_memory): Change `length' param and all int
3046 * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions.
3047 (print_insn_ppi): Likewise.
3048 (print_insn_shx): Use info->mach to select appropriate insn set.
3049 Add support for sh-dsp. Remove FD_REG_N support.
3050 * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support.
3051 (sh_arg_type): Likewise. Remove FD_REG_N.
3052 (sh_dsp_reg_nums): New enum.
3053 (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros.
3054 (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise.
3055 (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise.
3056 (arch_sh3_dsp_up): Likewise.
3057 (sh_opcode_info): New field: arch.
3058 (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and
3059 D_REG_N. Fill in arch field. Add sh-dsp insns.
3063 * arm-dis.c: Change flavor name from atpcs-special to
3064 special-atpcs to prevent name conflict in gdb.
3065 (get_arm_regname_num_options, set_arm_regname_option,
3066 get_arm_regnames): New functions. API to access the several
3067 flavor of register names. Note: Used by gdb.
3068 (print_insn_thumb): Use the register name entry from the currently
3069 selected flavor for LR and PC.
3073 * mcore-opc.h (enum mcore_opclass): Add MULSH and OPSR
3075 (mcore_table): Add "idly4", "psrclr", "psrset", "mulsh" and
3076 "mulsh.h" instructions.
3077 * mcore-dis.c (imsk array): Add masks for MULSH and OPSR
3079 (print_insn_mcore): Add support for little endian targets.
3080 Add support for MULSH and OPSR classes.
3084 * arm-dis.c (parse_arm_diassembler_option): Rename again.
3085 Previous delat did not take.
3089 * dis-buf.c (buffer_read_memory): Use octets_per_byte field
3090 to adjust target address bounds checking and calculate the
3091 appropriate octet offset into data.
3095 * arm-dis.c: (parse_disassembler_option): Rename to
3096 parse_arm_disassembler_option and allow to be exported.
3098 * disassemble.c (disassembler_usage): New function: Print out any
3099 target specific disassembler options.
3100 Call arm_disassembler_options() if the ARM architecture is being
3103 * arm-dis.c (NUM_ELEM): Define this macro if not already
3105 (arm_regname): New struct type for ARM register names.
3106 (arm_toggle_regnames): Delete.
3107 (parse_disassembler_option): Use register name structure.
3108 (print_insn): New function: Combines duplicate code found in
3109 print_insn_big_arm and print_insn_little_arm.
3110 (print_insn_big_arm): Call print_insn.
3111 (print_insn_little_arm): Call print_insn.
3112 (print_arm_disassembler_options): Display list of supported,
3113 ARM specific disassembler options.
3117 * arm-dis.c (printf_insn_big_arm): Treat ELF symbols with the
3118 ARM_STT_16BIT flag as Thumb code symbols.
3120 * arm-dis.c (printf_insn_little_arm): Ditto.
3124 * arm-dis.c (printf_insn_thumb): Prevent double dumping
3125 of raw thumb instructions.
3129 * mcore-opc.h (mcore_table): Add "add" as an alias for "addu".
3133 * arm-dis.c (streq): New macro.
3134 (strneq): New macro.
3135 (force_thumb): ew local variable.
3136 (parse_disassembler_option): New function: Parse a single, ARM
3137 specific disassembler command line switch.
3138 (parse_disassembler_option): Call parse_disassembler_option to
3139 parse individual command line switches.
3140 (print_insn_big_arm): Check force_thumb.
3141 (print_insn_little_arm): Check force_thumb.
3143 For older changes see ChangeLog-9899
3149 version-control: never