3 * interp.c (sim_stop_reason): Fix typo.
7 * interp.c (gdb/signals.h): Include it.
8 (sim_stop_reason): Use TARGET_SIGNAL_*.
12 * configure: Regenerate.
16 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
17 explicit call to AC_CONFIG_HEADER.
18 * configure: Regenerate.
22 * configure.ac: Update to use ../common/common.m4.
23 * configure: Re-generate.
27 * configure: Regenerated to track ../common/aclocal.m4 changes.
31 * configure.ac: Rename configure.in, require autoconf 2.59.
32 * configure: Re-generate.
36 * configure: Regenerate for ../common/aclocal.m4 update.
40 * interp.c (sim_resume): Rename ui_loop_hook to
41 deprecated_ui_loop_hook.
45 * simops.c: Replace "struct symbol_cache_entry" with "struct
50 * interp.c (xfer_mem): Simplify. Only do a single partial
51 transfer. Problem reported by Tom Rix.
55 * interp.c (sim_d10v_translate_addr): Add "regcache" parameter.
56 (sim_d10v_translate_imap_addr): Ditto.
57 (sim_d10v_translate_dmap_addr): Ditto.
58 (xfer_mem): Pass NULL regcache to sim_d10v_translate_addr.
59 (dmem_addr): Pass NULL regcache to sim_d10v_translate_dmap_addr.
60 (dmap_register, imap_register): Add "regcache" parameter.
61 (imem_addr): Pass NULL regcache to sim_d10v_translate_imap_addr.
62 (sim_fetch_register): Pass NULL regcache to imap_register and
67 * interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
71 * simops.c: Include <string.h>.
75 * d10v_sim.h (SET_PSW_BIT): Add cast to avoid inverting an enum.
79 * configure: Regenerated to track ../common/aclocal.m4 changes.
83 * interp.c (xfer_mem): Fix transfers across multiple segments.
87 * Makefile.in (INCLUDE): Update path to callback.h.
88 * gencode.c: Do not include "callback.h".
89 * d10v_sim.h: Include "gdb/callback.h" and "gdb/remote-sim.h".
94 * interp.c (sim_fetch_register): Fix name of enum used in cast.
95 (sim_store_register): Ditto.
100 * d10v_sim.h (INC_ADDR): Correctly handle the case where MOD_E is
101 less than MOD_S (post-decrement).
105 * interp.c (sim_fetch_register, sim_store_register): Use a switch
106 statement and enums from "sim-d10v.h".
110 * interp.c (sim_create_inferior): Add comment.
114 * simops.c (OP_4400): Output "mvf0f" instead of "mf0f".
115 (OP_4401): Output "mvf0t" instead of "mf0t".
116 (OP_460B): Do not output a flag register.
117 (OP_4609): Do not output a flag register.
121 * Makefile.in (INCLUDE): Add "gdb/sim-d10v.h".
122 * interp.c: Include "gdb/sim-d10v.h" instead of "sim-d10v.h".
126 * interp.c (sim_create_inferior): Removed a hack that stated
127 it was setting r0/r1 with argc/argv.
131 * Makefile.in (simops.o): Add simops.h to dependency list.
135 * configure: Regenerated to track ../common/aclocal.m4 changes.
139 * interp.c (sim_resume): Deliver SIGILL.
140 (lookup_hash): Do not print SIGILL message.
144 * Makefile.in (SIM_EXTRA_CFLAGS): Define SIM_HAVE_ENVIRONMENT.
145 * interp.c (sim_set_trace): Replace sim_trace. Enable tracing.
149 * d10v_sim.h (SIG_D10V_BUS): Define.
151 * simops.c (address_exception): Delete function.
152 (OP_30000000, OP_6401, OP_6001, OP_6000, OP_32010000, OP_31000000,
153 OP_6601, OP_6201, OP_6200, OP_33010000, OP_34000000, OP_6800,
154 OP_6C1F, OP_6801, OP_6C01, OP_36010000, OP_35000000, OP_6A00,
155 OP_6E1F, OP_6A01, OP_6E01, OP_37010000): Replace call to
156 address_exception with code that sets SIG_D10V_BUS.
158 * interp.c (sim_resume): When SIGBUS or SIGSEGV, deliver a bus
159 error to the simulator before resuming execution.
160 (sim_trace): Check stop reason and use that to determine sim_trace
162 (sim_stop_reason): For SIG_D10V_BUS return a SIGBUS / SIGSEGV
167 * interp.c (sim_create_inferior): Change internal initial value for
172 * interp.c (lookup_hash): Stop the update of the PC when there was
173 an illegal instruction exception.
177 * simops.c (address_exception): New function.
178 (OP_30000000, OP_6401, OP_6001, OP_6000, OP_32010000, OP_31000000,
179 OP_6601, OP_6201, OP_6200, OP_33010000, OP_34000000, OP_6800,
180 OP_6C1F, OP_6801, OP_6C01, OP_36010000, OP_35000000, OP_6A00,
181 OP_6E1F, OP_6A01, OP_6E01, OP_37010000): For "ld", "ld2w", "st"
182 and "st2w" check that the address is aligned.
186 * d10v_sim.h (INC_ADDR): Added code to assign
187 proper address for loads with predec operations.
191 * simops.c (OP_4E0F): New function: Simulate new bit pattern for
196 * simops.c (move_to_cr): Don't allow user to set PSW.DM in either
201 * simops.c (OP_5F20): Use SET_HW_PSW when updating PSW.
202 (PSW_HW_MASK): Declare.
204 * d10v_sim.h (move_to_cr): Add ``psw_hw_p'' parameter.
205 (SET_CREG, SET_PSW_BIT): Update.
206 (SET_HW_CREG, SET_HW_PSW): Define.
210 * interp.c (sim_d10v_translate_dmap_addr): Fix extraction of IOSP
215 * interp.c (sim_d10v_translate_addr): New function.
216 (xfer_mem): Rewrite. Use sim_d10v_translate_addr.
217 (map_memory): Make INLINE.
221 * interp.c (sim_d10v_translate_dmap_addr): New function.
222 (dmem_addr): Rewrite. Use sim_d10v_translate_dmap_addr. Change
223 offset parameter to type uint16.
224 * d10v_sim.h (dmem_addr): Update declaration.
228 * interp.c (imap_register, set_imap_register, dmap_register,
229 set_imap_register): Use map_memory.
231 (sim_create_inferior): Initialize all DMAP registers. NOTE that
232 DMAP2, in internal memory mode, is set to 0x0000 and NOT
233 0x2000. This is consistent with the older d10v boards.
237 * interp.c (sim_d10v_translate_imap_addr): New function.
238 (imem_addr): Rewrite. Use sim_d10v_translate_imap_addr.
239 (last_from, last_to): Declare.
243 * d10v_sim.h (struct d10v_memory): Define. Support very long
245 (struct _state): Replace imem, dmem and umem by mem.
246 (IMAP_BLOCK_SIZE, DMAP_BLOCK_SIZE, SEGMENT_SIZE, IMEM_SEGMENTS,
247 DMEM_SEGMENTS, UMEM_SEGMENTS): Define.
249 * interp.c (map_memory): New function.
250 (sim_size, xfer_memory, imem_addr, dmem_addr): Update.
251 (UMEM_SEGMENTS): Moveed to "d10v_sim.h".
252 (IMEM_SIZEDMEM_SIZE): Delete.
256 * interp.c: Include "sim-d10v.h".
257 (imap_register, set_imap_register, dmap_register,
258 set_dmap_register, spi_register, spu_register, set_spi_register,
259 set_spu_register): New functions.
260 (sim_create_inferior): Update.
261 (sim_fetch_register, sim_store_register): Rewrite. Use enums
262 defined in sim-d10v.h.
264 * d10v_sim.h (DEBUG_MEMORY): Define.
265 (IMAP0, IMAP1, DMAP, SET_IMAP0, SET_IMAP1, SET_DMAP): Delete.
269 * interp.c (sim_open): Allow a debug value to be passed to the -t
271 (lookup_hash): Don't exit on an illegal instruction.
272 (do_long, do_2_short, do_parallel): Check for failed instruction
277 * simops.c (OP_3220): Fix trace output for illegal accumulator
282 * simops.c: Disable setting of DM bit in PSW.
286 * simops.c (op_types): Added new memory indirect type OP_MEMREF3.
287 (trace_input_func): Added support for OP_MEMREF3.
288 (OP_32010000): New instruction ld.
289 (OP_33010000): New instruction ld2w.
290 (OP_5209): New instruction sac.
291 (OP_4209): New instruction sachi.
292 (OP_3220): New instruction slae.
293 (OP_36010000): New instruction st.
294 (OP_37010000): New instruction st2w.
298 * interp.c (old_segment_mapping): New global.
299 (xfer_mem): Change the default segment mapping to be the way
300 that Mitsubishi prefers, but use the previous mapping if
301 old_segment_mapping is true.
302 (sim_open): Add an option -oldseg to get the old mapping.
303 (sim_create_inferior): Init mapping registers based on the
304 value of old_segment_mapping.
308 * simops.c (OP_6601): Do not write back decremented address if
309 either of the destination registers was the same as the address
311 (OP_6201): Do not write back incremented address if either of the
312 destination registers was the same as the address register.
316 * configure: Regenerated to track ../common/aclocal.m4 changes.
320 * configure: Regenerated to track ../common/aclocal.m4 changes.
324 * interp.c (ui_loop_hook_counter): New global (when NEED_UI_LOOP_HOOK
326 (sim_resume): If the counter has expired, call the ui_loop_hook,
328 (UI_LOOP_POLL_INTERVAL): Define. Used to tweak the frequency of
330 * Makefile.in (SIM_EXTRA_CFLAGS): Include NEED_UI_LOOP_HOOK.
334 * simops.c: If load instruction with auto increment/decrement
335 addressing is used when the destination register is the same as
336 the address register, then ignore the auto increment/decrement.
340 * simops.c (OP_5F00): Ifdef SYS_stat case because
341 not all systems have it defined.
345 * simops.c (OP_5607): Correct saturation comparison/assignment.
346 (OP_1201, OP_1203, OP_17001200, OP_17001202,
347 OP_2A00, OP_2800, OP_2C00, OP_3200, OP_3201,
348 OP_1001, OP_1003, OP_17001000, OP_17001002): Ditto.
352 * simops.c (OP_5605): Sign extend MIN32 and MAX32 before saturation
360 * simops.c (OP_1223): Sign extend MIN32 and MAX32 before saturation
365 * simops.c (sys/syscall.h): Include targ-vals.h instead.
366 (SYS_*): Replace with TARGET_SYS_*.
368 * Makefile.in: Add dependency on targ-vals.h.
369 (NL_TARGET): Define as NL_TARGET_d10v.
373 * interp.c (xfer_mem): Missing break, instruction memory case
374 flowed into unified memory case.
378 * simops.c: If load instruction with auto increment/decrement
379 addressing is used when the destination register is the same as
380 the address register, then ignore the auto increment/decrement.
384 * configure: Regenerated to track ../common/aclocal.m4 changes.
386 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
388 * configure: Regenerated to track ../common/aclocal.m4 changes.
393 * acconfig.h: New file.
394 * configure.in: Reverted change of Apr 24; use sinclude again.
396 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
398 * configure: Regenerated to track ../common/aclocal.m4 changes.
403 * configure.in: Don't call sinclude.
407 * interp.c (struct hash_entry): OPCODE and MASK are unsigned.
409 * d10v_sim.h (remote-sim.h, sim-config.h): Include.
413 * configure: Regenerated to track ../common/aclocal.m4 changes.
417 * simops.c (trace_input_func): Use move_from_cr / CREGS to obtain
419 (OP_OP_1000000, add3): Trace inputs before performing add.
420 (OP_5F00, <*>): Trace input registers before making system call.
421 (OP_5F00, <kill>): Trace R0, R1 not REGn.
422 (OP_5F00, <getpid>): Always return 47.
424 * d10v_sim.h (SLOT, SLOT_NR, SLOT_PEND_MASK, SLOT_PEND,
425 SLOT_DISCARD, SLOT_FLUSH): Define. An implementation of write
427 (struct _state): Add struct slot slot to global state variable.
428 (struct _state): Delete fields SM, EA, DB, DM, IE, RP, MD, FX, ST,
429 F0, F1, C from global State variable.
430 (struct _state): Add struct trace to global State variable.
431 (GPR, SET_GPR): Define. SET_GPR uses SLOT_PEND.
432 (PSW*, SET_PSW*): Define. SET_PSW* uses SET_CREG.
433 (CREG, SET_CREG, SET_*): Define. SET_CREG uses func move_to_cr.
434 (INC_ADDR): Re-implement. Use SET_GPR to update registers.
435 (JMP): Re-implement. Use SET_* to update registers.
437 * interp.c: Use new SET_* et.al. macros to fetch / store
439 (get_operands): Squirrel away trace values at start of each
441 (do_2_short): Flush pending writes before issuing second
443 (sim_resume): Flush pending writes at end of instruction cycle.
444 (sim_fetch_register, sim_store_register, sim_create_inferior):
445 After scheduling updates to registers using SET_*, flush updates.
446 (sim_resume): Re-order handling of RPT/repeat and IBA/hbreak so
447 that each sets pc using SET_* and last SET_* eventually winds out.
449 * simops.c: Use new SET_* et.al. macros to fetch / store
451 (move_to_cr): Add MASK argument for selective update of CREG bits.
452 Re-implement using new SET_* macros.
453 (trace_output_func, trace_output): Delete. Replace with.
454 (do_trace_output_flush, trace_output_finish, trace_output_40,
455 trace_output_32, trace_output_16, trace_output_void,
456 trace_output_flag): New functions. Handle specific trace cases.
457 (OP_*): Re-write tracing to use new trace_output_* functions.
458 (OP_*): Re-write to use new SET_* et.al. macros.
459 (FUNC, PARM[1-4], RETVAL, RETVAL32): Redo definition.
460 (RETVAL_HIGH, RETVAL_LOW): Delete, use RETVAL32.
464 * configure.in (SIM_AC_OPTION_WARNINGS): Add.
465 configure: Re-generate.
469 * configure: Regenerated to track ../common/aclocal.m4 changes.
473 * configure: Regenerated to track ../common/aclocal.m4 changes.
477 * configure: Regenerated to track ../common/aclocal.m4 changes.
481 * interp.c (sim_store_register, sim_fetch_register): Pass in
482 length parameter. Return -1.
486 * (dmem_addr): If address is illegal or in I/O space, signal a bus
487 error. Allocate unified memory on demand. Fix DMEM address
492 * simops.c (OP_5F20): Implement "dbt".
493 (OP_5F60): Implement "rtd".
495 * d10v_sim.h (DPC_CR): Define enum.
496 (DBT_VECTOR_START): Define
501 * simops.c (move_to_cr): Sync regs[SP_IDX] with State.sp according
504 * d10v_sim.h (struct _state): Add sp, as holding area for SPI/SPU.
509 * simops.c (OP_5F00): Call error instead of abort for unknown
512 * d10v_sim.h (enum): Define DPSW_CR.
514 * simops.c (move_to_cr): Mask out hardwired zero bits in DPSW.
518 * interp.c (sim_write_phys): Delete.
519 (sim_load): Call sim_load_file with sim_write and LMA.
523 * interp.c: Rewrite xfer_mem so that it translates addresses as -
524 0x00... - DMAP translated memory, 0x01... IMAP translated memory,
525 0x10... - on-chip data, 0x11... - on-chip insn, 0x12... - unified
528 (imem_addr): New function - translate IMEM address.
529 (sim_resume): Use imem_addr to translate insn address, abort if
531 (sim_create_inferior): Write ARGV to memory using sim_write. Pass
532 argc/argv using r0/r1 not r2/r3.
533 (sim_size): Do not initialize IMAP/DMAP here.
534 (sim_open): Call sim_create_inferior and sim_size to initialize
536 (sim_create_inferior): Initialize IMAP/DMAP to hardware reset
538 (init_system): Delete.
539 (xfer_mem, sim_fetch_register, sim_store_register): Do not call
541 (decode_pc): Check prog_bfd is defined before looking up .text
546 * configure: Regenerated to track ../common/aclocal.m4 changes.
550 * configure: Regenerated to track ../common/aclocal.m4 changes.
554 * interp.c (sim_stop_reason): Exit status is now in r0, not r2.
558 * d10v_sim.h (DEBUG_TRAP): New debug flag.
560 * simops.c (OP_5F00): If DEBUG_TRAP is on, turn traps 0-14 into
561 printing the registers.
565 * simops.c (op_types): New ABI, args are r0..r3, system call # is
567 (trace_{in,out}put_func): Ditto.
569 (OP_24800000): Ditto.
575 * interp.c (UMEM_SEGMENTS): New define, set to 128.
576 (sim_size): Use UMEM_SEGMENTS rather than hardwired constant.
577 (sim_close): Reset prog_bfd to NULL after closing it. Also
578 reset prog_bfd_was_opened_p after closing prog_bfd.
579 (sim_load): Reset prog_bfd_was_opened_p after closing prog_bfd.
580 (sim_create_inferior): Get start address from abfd not prog_bfd.
581 (xfer_mem): Do bounds checking on addresses and return zero length
582 read/write on bad addresses, rather than aborting. Prepare to
583 be able to handle xfers that cross segment boundaries, but not
584 yet implemented. Only emit debug message when d10v_debug is
585 set as well as DEBUG being defined.
587 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
589 * configure: Regenerated to track ../common/aclocal.m4 changes.
593 * configure: Regenerated to track ../common/aclocal.m4 changes.
598 * d10v_sim.h (RPT_S): Index cregs with RPT_S_CR not RPT_E_CR.
599 (BPSW): Ditto for BPSW_CR and not PSW_CR.
601 * simops.c (OP_5F40): JMP to BPC instead of assigning PC directly.
606 reserved trap from 0 to 15. Add trap emulation code for 0-14.
611 * d10v_sim.h (AE_VECTOR_START, RIE_VECTOR_START,
612 SDBT_VECTOR_START, TRAP_VECTOR_START): Define.
614 * simops.c (OP_5F00): For "trap", mask out all but SM bit in PSW,
616 (OP_5F00): For "trap", update BPSW with move_to_cr.
620 * d10v_sim.h (enum): Enumerate CR register names.
621 (enum): Enumerate PSW bit values.
622 (PSW): Obtain value uing move_from_cr.
623 (MOD_S, MOD_E, BPSW): Make r-values.
624 (move_from_cr, move_to_cr): Declare functions.
626 * interp.c (sim_fetch_register, sim_store_register): Use
627 move_from_cr and move_to_cr for CR register transfers.
629 * simops.c (move_from_cr, move_to_cr): New functions.
630 (OP_5F40): Move BPSW to PSW using move_to_cr and move_from_cr.
631 (OP_5600): For "mvtc", use function move_to_cr.
632 (OP_5200): For "mvfc", use function move_from_cr.
636 * simops.c (OP_5600): For "mvtc" MOD_E and MOD_S, ensure that the
641 * configure: Regenerated to track ../common/aclocal.m4 changes.
645 * d10v_sim.h (struct _state): Add DM - PSW debug mask.
647 * simops.c (OP_5600): For "mvtc", save PSW.DM.
648 (OP_5200): Ditto for "mvfc".
652 * d10v_sim.h (SEXT56): Define.
654 * simops.c (OP_4201): For "rac", sign extend 56 bit value before
657 * d10v_sim.h (MAX32, MIN32, MASK32, MASK40): Re-define using
662 * interp.c (sim_resume): Call do_2_short with LEFT_FIRST or
663 RIGHT_FIRST, as appropriate, instead of hardcoded ints that
664 don't match enum values.
668 * simops.c (OP_3A00): For "macu", perform multiply stage using 32
669 bit rather than 16 bit precision.
670 (OP_3C00): For "mulxu", store unsigned product in ACC.
671 (OP_3800): For "msbu", subtract unsigned product from ACC,
672 (OP_0): For "sub", compute carry by comparing inputs.
676 * simops.c (OP_1000): For "sub2w", compute carry by comparing
681 * simops.c (OP_1): Use 32 bit unsigned arithmetic for subtract,
682 carry indicated by value > 0xffff.
686 * interp.c (sim_resume): Don't set up SIGINT handler using signal,
688 (sim_resume): Fix race condition of a direct assignment to
689 stop_simulator, conditionally call sim_stop.
690 (sim_stop_reason): Check stop_simulator returning SIGINT. Clear
691 stop_simulator ready for next sim_resume call.
692 (sim_ctrl_c): Delete function.
696 * interp.c (sim_resume): For "REP", only check/update the PC when
697 a branch instruction has not been executed.
701 * simops.c (OP_4201): "rachi". Sign extend bit 40 of ACC. Sign
702 extend bit 44 all constants.
703 (OP_4201): Replace GCC specific 0x..LL with SIGNED64 macro.
707 * d10v_sim.h: Include sim-types.h.
708 (uint8, in816, uiny16, int32, uint32, int64, uint64): Typedef
709 using unsigned8 et.al. from sim-types.h.
710 (SEXT32, SEXT40, SEXT44, SEXT60): Replace GCC specific 0x..LL with
715 * interp.c (sim_write_phys): New function, write to physical
716 instead of virtual memory.
718 * interp.c (sim_load): Pass lma_p and sim_write_phys to
721 Mon Oct 13 10:55:07 1997 Fred Fish <cygnus.com>
723 * simops.c (OP_6A01): Change OP_POSTDEC to OP_POSTINC and move
724 exception generation code to OP_6E01.
725 (OP_6E01): Change OP_POSTINC to OP_POSTDEC and insert exception
730 * simops.c (OP_6401): postdecrement on r15 is OK, remove exception.
735 * configure: Regenerated to track ../common/aclocal.m4 changes.
739 * interp.c (pc_addr): Discard upper bit(s) of PC in case
740 IMAP1 selects unified memory.
741 * d10v_sim.h (INC_ADDR): Align MOD_E to increment before testing
746 * configure: Regenerated to track ../common/aclocal.m4 changes.
750 * configure: Regenerated to track ../common/aclocal.m4 changes.
754 * configure: Regenerated to track ../common/aclocal.m4 changes.
758 * configure: Regenerated to track ../common/aclocal.m4 changes.
762 * configure: Regenerated to track ../common/aclocal.m4 changes.
766 * interp.c (sim_resume): Increment PC at end of rep
769 * simops.c (OP_4201): Fix rachi instruction.
771 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
773 * configure: Regenerated to track ../common/aclocal.m4 changes.
777 * configure: Regenerated to track ../common/aclocal.m4 changes.
782 * interp.c (sim_kill): Delete.
783 (sim_create_inferior): Add ABFD argument.
784 (sim_load): Move setting of PC from here.
785 (sim_create_inferior): To here.
786 (start_address): Delete variable.
790 * configure: Regenerated to track ../common/aclocal.m4 changes.
795 * interp.c (sim_open): Add ABFD argument.
799 * interp.c (sim_open): Add callback argument.
800 (sim_set_callbacks): Remove SIM_DESC argument.
804 * configure: Regenerated to track ../common/aclocal.m4 changes.
808 * interp.c (sim_open): Undo patch to add -E support.
812 * interp.c (sim_stop): New function.
816 * Makefile.in (SIM_OBJS): Add sim-load.o.
817 * d10v_sim.h (exec_bfd): Rename to prog_bfd.
818 * interp.c: #include bfd.h.
819 (myname, sim_kind, start_address): New static locals.
820 (prog_bfd_was_opened_p, prog_bfd): New static locals.
821 (decode_pc): Update to use prog_bfd.
822 (sim_open): Set sim_kind, myname. Ignore -E arg.
823 (sim_close): Close prog_bfd if simulator opened it.
824 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
825 (sim_load): Return SIM_RC. New arg abfd. Set start address from bfd.
826 Call sim_load_file to load file into simulator.
827 * simops.c (trace_input_func): exec_bfd renamed to prog_bfd.
831 * simops.c (OP_5F00): Only provide system calls SYS_execv,
832 SYS_wait, SYS_wait, SYS_utime, SYS_time if defined by the host.
836 * configure: Regenerated to track ../common/aclocal.m4 changes.
841 * interp.c (sim_open): New arg `kind'.
843 * configure: Regenerated to track ../common/aclocal.m4 changes.
847 * configure: Regenerated to track ../common/aclocal.m4 changes.
851 * configure: Re-generate.
855 * configure: Regenerate to track ../common/aclocal.m4 changes.
857 * simops.c (OP_5F00): Remove old traps 1-3. Make trap 15 the same
858 as trap 0, which will be deprecated. Only set errno, if an error
859 in fact was returned.
863 * interp.c: Delete redundant prototypes of sim_foo fns.
864 (sim_open): New SIM_DESC result. Argument is now in argv form.
865 (other sim_*): New SIM_DESC argument.
869 * simops.c (trace_{input,output}_func): Call flush_stdout from the
872 (OP_6{4,6,C,A}01): Test for post decrement on the stack pointer.
873 (OP_{1200,1000000,201,5FE0,1003,17001002}): Fix problems in
874 setting the carry bit after an add or a subtract.
878 * simops.c (OP_{1403,15002A02,3{0,4}0{0,1}}): Only use the bottom
879 40 bits of accumulators. Sign/zero extend as appropriate.
883 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
884 COMMON_{PRE,POST}_CONFIG_FRAG instead.
885 * configure.in: sinclude ../common/aclocal.m4.
886 * configure: Regenerated.
890 * configure configure.in Makefile.in: Update to new configure
891 scheme which is more compatible with WinGDB builds.
892 * configure.in: Improve comment on how to run autoconf.
893 * configure: Re-run autoconf to get new ../common/aclocal.m4.
894 * Makefile.in: Use autoconf substitution to install common
899 * gencode.c: patch to not #include "d10v_sim.h" which
900 unecessarily includes bfd.h and causes wingdb configure
905 * interp.c (xfer_mem): Change unified memory to 0x0.
909 * simops.c (OP_3E01): Fix tracing information.
910 (OP_300{0,1}): Do not propigate sign.
914 * config.in (WORDS_BIGENDIAN): Add.
915 * configure: Regenerated.
916 * d10v_sim.h: #include "config.h"
920 * gencode.c (write_opcodes): Eliminate warnings when generated
925 * interp.c (sim_open): Cast result of calloc, and make sure NULL
927 (dmem_addr): If address is illegal or in I/O space, signal a bus
929 (pc_addr): Signal bus error, not illegal instruction for bogus
934 * Makefile.in: Delete all stuff moved to ../common/Make-common.in.
935 (SIM_OBJS,SIM_EXTRA_CFLAGS,SIM_EXTRA_CLEAN): Define.
936 * configure.in: Simplify using macros in ../common/aclocal.m4.
937 Call AC_CHECK_HEADERS(unistd.h).
938 * configure: Regenerated.
939 * config.in: New file.
940 * interp.c: #include "callback.h".
941 * simops.c: #include "config.h". #include <unistd.h> if present.
945 * d10v-sim.h (simops): Add flag is_long.
946 (State): Add pc_changed. Instructions which update the PC should
947 use the JMP macro which sets this.
948 (JMP): New macro. Sets the PC and the pc_changed flag.
950 * gencode.c (write_opcodes): Add is_long field.
952 * interp.c (lookup_hash): If we blindly apply a short opcode's mask
953 to a long opcode we could get a false match. Check the opcode size.
954 (hash): Add a size field to the hash table.
955 (sim_open): Initialize size field in hash table.
956 (sim_resume): Change to logic for setting the PC. Used to increment the
957 PC if it had not been changed. This didn't allow single-instruction loops.
958 Now checks the flag State.pc_changed. Also now stops when ^C is received.
959 (dmem_addr): Fix translation of data segments to unified memory.
960 (sim_ctrl_c): New function. When ^C is received, set stop_simulator flag.
962 * simops.c: Changed all branch and jump instructions to use new JMP macro.
963 (OP_20000000): Corrected trace information to show this is a ldi.l, not
968 * interp.c (sim_fetch_register, sim_store_register): Fix bug where
969 updating the accumulators was overwriting other parts of the global
974 * interp.c (bfd.h) Don't include it here any more.
975 (text{,_start,_end}): Move here from simops.c and make extern.
976 (decode_pc): New function to return the PC as an address that the
978 (dmem_addr): Print decoded PC in error message.
981 * simops.c (bfd.h) Don't include it here any more.
982 (text{,_start,_end}): Move to simops.c.
983 (trace_input_func): Move decoding of PC, and looking up .text
986 * d10v_sim.h (bfd.h): Include it here.
987 (text{,_start,_end}): Add external declarations.
993 * interp.c (sim_size): Now allocates unified memory for imap segments
994 0,1,2, and 127. Initializes imap0 and imap1 to 0x1000. Initializes dmap to 0.
995 (sim_write): Just call xfer_mem().
996 (sim_read): Just call xfer_mem().
997 (xfer_mem): New function. Does appropriate memory mapping and copies bytes.
998 (dmem_addr): New function. Reads dmap register and translates data
999 addresses to local addresses.
1000 (pc_addr): New function. Reads imap register and computes local address
1001 corresponding to contents of the PC.
1002 (sim_resume): Change to use pc_addr().
1003 (sim_create_inferior): Change reinitialization code. Also reinitializes
1005 (sim_fetch_register): Add fake registers 32,33,34 for imap0, imap1, and dmap.
1006 (sim_store_register): Add fake registers 32,33,34 for imap0, imap1, and dmap.
1008 * simops.c (MEMPTR): Redefine to use dmem_addr().
1009 (OP_5F00): Replace references to STate.imem with dmem_addr().
1011 * d10v-sim.h (State): Remove mem_min and mem_max. Add umem[128].
1012 (RB,SW,RW,SLW,RLW): Redefine to use dmem_addr().
1013 (IMAP0,IMAP1,DMAP,SET_IMAP,SET_IMAP1,SET_DMAP): Define.
1017 * d10v_sim.h (_ins_type): Reorganize, so that we can provide
1018 better statistics, like not counting NOPS as parallel
1019 instructions, and printing total cycles.
1020 (ins_type_counters): Make unsigned long.
1021 (left_nops,right_nops): Fold into ins_type_counters.
1023 * simops.c (trace_input_func): Print new instruction types.
1024 Handle OP_R2R3 as input types.
1025 (OP_{38000000,7000}): Correctly sign extend bytes.
1026 (OP_5E00): Don't count NOPs as parallel instructions.
1027 (OP_460B): Remove unused variable.
1030 * interp.c (ins_type_counters): Make unsigned long.
1031 (left_nops,right_nops): Delete.
1032 (most functions): Add prototypes.
1033 (INLINE): If GCC and optimize define as __inline__.
1034 ({,lookup_}hash,get_operands): Declare as INLINE.
1035 (do_parallel): Count conditional operations.
1036 (add_commas): New function, to add commas every 3 digits.
1037 (sim_size): Call add_commas to print numbers.
1038 (sim_{open,resume}): Delete unused variables.
1039 (sim_info): Provide better statistics.
1040 (sim_read): Add int return type.
1044 * interp.c (sim_resume): Change the way single-stepping and exceptions
1045 are handled so single-stepping works again.
1049 * endian.c: Optimize simulated loads/stores on x86, AIX, and big
1052 * configure.in (--enable-sim-bswap): New switch to enable using
1053 the BSWAP instruction on x86's.
1054 * configure: Regenerate.
1056 * Makefile.in ({SWAP,CONFIG}_CFLAGS): Add --enable-sim-bswap
1061 * endian.c: New file. Move endian functions here from interp.c.
1062 Optimize code, and make it work as either inline functions or as a
1065 * interp.c: Move endian functions from here to endian.c.
1067 * Makefile.in (INCLUDE): Add endian.c.
1068 (run,libsim.a): Add dependency on endian.o.
1069 (endian.o): Add dependency.
1071 * d10v_sim.h (read/write support): Always go through the machine
1072 independent endian functions. If compiling with GCC and
1073 optimizing, include endian.c so the endian functions are inlined.
1075 * simops.c (OP_5F00): Correct tracing of accumulators.
1079 * simops.c (OP_5F00): Add support for getpid, kill system calls.
1081 * interp.c (do_{2_short,parallel}): If an exception is raised,
1082 don't execute the second instruction.
1086 * simops.c (OP_{31000000,6601,6201,6200}): Store address in a
1087 temporary in case the register is overriden when loading.
1088 (OP_6200): Output type is OP_DREG for tracing.
1092 * d10v_sim.h (struct _state): Add mem_{min,max} fields.
1094 * interp.c (sim_size): Initialize mem_{min,max} fields.
1095 (sim_write): Update mem_{min,max} fields.
1096 (sim_resume): If PC is not in the minimum/maximum memory range,
1098 (sim_create_inferior): Preserve mem_{min,max} fields.
1102 * simops.c (OP_5F00): Add support for time() system call.
1106 * simops.c (OP_{6E01,6A01,6E1F,6A00}): Print both words being
1108 (OP_5F00,trace_{in,out}put_func): Add finer grain tracing for
1113 * simops.c (op_types): Add OP_{CONSTANT8,R2,R3}.
1114 (trace_input_func): Add support for OP_{CONSTANT8,R2,R3}.
1115 (OP_{4900,24800000,4800,4A00,4B00,4D00,4C00}): Add OP_R2 and OP_R3
1116 to call/subroutine returns to trace the first two arguments and
1117 the return value. For small jumps, use CONSTANT8, not CONSTANT16.
1121 * interp.c (sim_create_inferior): Reinitialize State every time
1122 sim_create_inferior() is called.
1126 * simops.c (OP_{401,2000000,601,3000000,23000000}): Get sign right
1128 (OP_401): Fix tracing information.
1132 * simops.c (SIZE_{PC,LINE_NUMBER}): New default sizes for output.
1133 (trace_input_func): Use them.
1134 (trace_input_func): Make sure there is a trailing space after the
1136 (OP_6200): Fix tracing info.
1138 * Makefile.in (run): Add dependencies on libbfd.a and
1143 * d10v_sim.h (DEBUG_INSTRUCTION): New debug value to include line
1144 numbers and function names in debug trace.
1145 (DEBUG): If not defined, set to DEBUG_TRACE, DEBUG_VALUES, and
1147 (SIG_D10V_{STOP,EXIT}): Values to represent the stop instruction
1148 and exit system call trap being executed.
1150 * interp.c (sim_stop_reason): Set exit code correctly for stop
1151 instruction and exit system call trap.
1153 * configure.in (--enable-sim-cflags): Remove trace case.
1154 (--enable-sim-debug): New switch to set the debug values.
1155 * configure: Regenerate.
1157 * simops.c (trace_{input,output}_func): Rename from
1158 trace_{input,output}.
1159 (trace_{input,output}): Call trace_{input,output}_func if
1160 d10v_debug is non-zero.
1161 (SIZE_INSTRUCTION): Cut down to 8.
1162 (SIZE_OPERANDS): Cut down to 18.
1163 (SIZE_LOCATION): New value for size of line number, function name
1165 (init_text_p,text{,_start,_end}): New static variables for
1166 printing line number and function name.
1167 (exec_bfd): New external that run.c sets.
1168 (trace_input_func): Print line number and function name if
1169 available and if desired.
1170 (OP_4E09): Don't print out DBT message.
1171 (OP_5FE0): Set exception field to SIG_D10V_STOP.
1172 (OP_5F00): Set exception field to SIG_D10V_EXIT.
1176 * interp.c (do_2_short): If the instruction encodes jump->ins,
1177 don't do the second instruction if the jump succeeds.
1181 * simops.c (OP_5F00): Use unknown traps to print all GPRs,
1182 accumulators, PC, and F0/F1/C flags.
1186 * simops.c (OP_5F00): Fix problems with system calls.
1190 * simops.c (OP_5F00): Correct tracing information for trap.
1194 * Makefile.in (CSEARCH): Correctly find opcodes directory.
1198 * simops.c (trace_output): Properly align accumulator output.
1199 (OP_3{0,2,4}00): Properly parenthesize test expression. Add error
1200 if shift count is too high.
1201 (OP_4E{00,02,04,20,22,40,42}): Make tests agree with book.
1202 (OP_4E09): Make cpfg properly trace the input flags.
1203 (op_types): Add OP_FLAG_OUTPUT.
1204 (trace_{input,output}): Support OP_FLAG_OUTPUT.
1205 (OP_31000000): This ld2w varient is a 16-bit memory reference, not
1206 an 8-bit memory reference instruction for tracing purposes.
1207 (OP_201): Addi needs to set the carry.
1211 * simops.c (OP_2600, OP_2601): Changed min and max comparisons
1212 to use signed register values.
1216 * d10v_sim.h (DEBUG_*): Add bit flags for controlling debug
1218 (_ins_type): New enumeration to specify which container an
1219 instruction is in, and whether it is part of a parallel operation.
1220 (_state): Add ins_type field.
1221 ({,u}int{8,16,32,64}): Use limits.h to size the appropriate types.
1222 (ins_type_counters): Counters for the various instruction types.
1223 ({left,right}_nops): Counters for the number of nops in each
1225 (d10v_debug): New variable to indicate whether debugging is turned
1228 * simops.c: (all functions): Change all #ifdef DEBUG code so that
1229 the input and output values can be traced, along with the
1230 instruction type. Make the -t option enable tracing.
1231 (all functions): Change printf calls to use the printf_filtered
1232 function in the callback table.
1234 * interp.c (_leftright): New enumeration to say whether 2 short
1235 instructions are done left first or right first.
1236 (do_{long,2_short,parallel}): Indicate in the machine state which
1237 type of instruction this is. Count each of the types of
1238 instructions executed.
1239 (sim_size): Only print the memory sizes if DEBUG_MEMSIZE debug
1241 (sim_resume): Pass left/right indication to do_2_short.
1242 (all functions): Change printf calls to use the printf_filtered
1243 function in the callback table.
1244 (sim_trace): Turn on debug flag if DEBUG was defined, and call
1246 (sim_info): Print out statistics on instructions.
1247 (sim_{trace,create_inferior}): Eliminate extraneous output unless
1249 (sim_open): If args == -t and DEBUG was defined, set d10v_debug.
1250 Only initialize the hash table the first time sim_open is called.
1252 * Makefile.in: Make objects depend on d10v_sim.h.
1253 ({,SIM_}CFLAGS): Include configure dependent switches. Setting
1254 CFLAGS does not override host/target defines or SIM_CFLAGS.
1255 (CC_FOR_BUILD,gencode): Use CC_FOR_BUILD to compile gencode.
1256 (run): By default, the math library is not needed to be linked
1258 ({BFD,LIBIBERTY}_LIB): Define as variables so they can be
1260 (VPATH): Don't set to anything but @srcdir@ to work with non-GNU
1262 ({run,callback}.o): Provide explicit paths to their appropriate
1264 (gencode{,.o},d10v-opc.o): Split compilation into creating object
1265 and linking. Instead of linking in libopcodes.a, just compile
1266 d10v-opc.o directly to handle canadian cross.
1267 (CSEARCH): Add opcodes directory.
1269 * configure.in (--enable-sim-cflags): New switch to allow user to
1271 (CC_FOR_BUILD): Deal with canadian crosses.
1272 * configure: Regenerate.
1276 * simops.c: Include correct syscall.h for d10v, not host's.
1277 Fix #ifdef SYS_stat.
1281 * simops.c (OP_5F00): Wrap all SYS_xxx traps with #ifdef.
1282 Add trap 2 to be printf and trap 3 to be putchar.
1286 * Makefile.in, d10v_sim.h, interp.c, simops.c: Add support
1287 for low-level system calls.
1291 * Makefile.in, d10v_sim.h, interp.c: Fix byte-order problems.
1295 * d10v_sim.h (SEXT32): Added.
1296 * interp.c: Commented out printfs.
1297 * simops.c: Fixed error in sb and st2w.
1301 * Makefile.in, d10v_sim.h, interp.c, simops.c: Added remaining
1302 DSP instructions. Added modulo addressing.
1306 * Makefile.in, d10v_sim.h, interp.c, simops.c: Snapshot.
1310 * d10v_sim.h, simops.c: Snapshot.
1314 * ChangeLog, Makefile.in, configure, configure.in, d10v_sim.h,
1315 gencode.c, interp.c, simops.c: Created.