1 /* M32R-specific support for 32-bit ELF.
2 Copyright 1996, 1997, 1998, 1999, 2000, 2001
3 Free Software Foundation, Inc.
5 This file is part of BFD, the Binary File Descriptor library.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
27 static bfd_reloc_status_type m32r_elf_10_pcrel_reloc
28 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
29 static bfd_reloc_status_type m32r_elf_do_10_pcrel_reloc
30 PARAMS ((bfd *, reloc_howto_type *, asection *,
31 bfd_byte *, bfd_vma, asection *, bfd_vma, bfd_vma));
32 static bfd_reloc_status_type m32r_elf_hi16_reloc
33 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
34 static void m32r_elf_relocate_hi16
35 PARAMS ((bfd *, int, Elf_Internal_Rela *, Elf_Internal_Rela *,
36 bfd_byte *, bfd_vma));
37 bfd_reloc_status_type m32r_elf_lo16_reloc
38 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
39 bfd_reloc_status_type m32r_elf_generic_reloc
40 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
41 static bfd_reloc_status_type m32r_elf_sda16_reloc
42 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
43 static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
44 PARAMS ((bfd *abfd, bfd_reloc_code_real_type code));
45 static void m32r_info_to_howto_rel
46 PARAMS ((bfd *, arelent *, Elf32_Internal_Rel *));
47 boolean _bfd_m32r_elf_section_from_bfd_section
48 PARAMS ((bfd *, Elf32_Internal_Shdr *, asection *, int *));
49 void _bfd_m32r_elf_symbol_processing
50 PARAMS ((bfd *, asymbol *));
51 static boolean m32r_elf_add_symbol_hook
52 PARAMS ((bfd *, struct bfd_link_info *, const Elf_Internal_Sym *,
53 const char **, flagword *, asection **, bfd_vma *));
54 static boolean m32r_elf_relocate_section
55 PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
56 Elf_Internal_Rela *, Elf_Internal_Sym *, asection **));
58 static boolean m32r_elf_relax_delete_bytes
59 PARAMS ((bfd *, asection *, bfd_vma, int));
61 static bfd_reloc_status_type m32r_elf_final_sda_base
62 PARAMS ((bfd *, struct bfd_link_info *, const char **, bfd_vma *));
63 static boolean m32r_elf_object_p
65 static void m32r_elf_final_write_processing
66 PARAMS ((bfd *, boolean));
67 static boolean m32r_elf_set_private_flags
68 PARAMS ((bfd *, flagword));
69 static boolean m32r_elf_copy_private_bfd_data
70 PARAMS ((bfd *, bfd *));
71 static boolean m32r_elf_merge_private_bfd_data
72 PARAMS ((bfd *, bfd *));
73 static boolean m32r_elf_print_private_bfd_data
74 PARAMS ((bfd *, PTR));
75 static boolean m32r_elf_gc_sweep_hook
76 PARAMS ((bfd *, struct bfd_link_info *, asection *,
77 const Elf_Internal_Rela *));
78 static boolean m32r_elf_check_relocs
79 PARAMS ((bfd *, struct bfd_link_info *, asection *,
80 const Elf_Internal_Rela *));
82 asection * m32r_elf_gc_mark_hook
83 PARAMS ((bfd *, struct bfd_link_info *, Elf_Internal_Rela *,
84 struct elf_link_hash_entry *, Elf_Internal_Sym *));
86 #define NOP_INSN 0x7000
87 #define MAKE_PARALLEL(insn) ((insn) | 0x8000)
89 /* Use REL instead of RELA to save space.
90 This only saves space in libraries and object files, but perhaps
91 relocs will be put in ROM? All in all though, REL relocs are a pain
95 static reloc_howto_type m32r_elf_howto_table[] =
97 /* This reloc does nothing. */
98 HOWTO (R_M32R_NONE, /* type */
100 2, /* size (0 = byte, 1 = short, 2 = long) */
102 false, /* pc_relative */
104 complain_overflow_bitfield, /* complain_on_overflow */
105 bfd_elf_generic_reloc, /* special_function */
106 "R_M32R_NONE", /* name */
107 false, /* partial_inplace */
110 false), /* pcrel_offset */
112 /* A 16 bit absolute relocation. */
113 HOWTO (R_M32R_16, /* type */
115 1, /* size (0 = byte, 1 = short, 2 = long) */
117 false, /* pc_relative */
119 complain_overflow_bitfield, /* complain_on_overflow */
120 m32r_elf_generic_reloc,/* special_function */
121 "R_M32R_16", /* name */
122 true, /* partial_inplace */
123 0xffff, /* src_mask */
124 0xffff, /* dst_mask */
125 false), /* pcrel_offset */
127 /* A 32 bit absolute relocation. */
128 HOWTO (R_M32R_32, /* type */
130 2, /* size (0 = byte, 1 = short, 2 = long) */
132 false, /* pc_relative */
134 complain_overflow_bitfield, /* complain_on_overflow */
135 m32r_elf_generic_reloc,/* special_function */
136 "R_M32R_32", /* name */
137 true, /* partial_inplace */
138 0xffffffff, /* src_mask */
139 0xffffffff, /* dst_mask */
140 false), /* pcrel_offset */
142 /* A 24 bit address. */
143 HOWTO (R_M32R_24, /* type */
145 2, /* size (0 = byte, 1 = short, 2 = long) */
147 false, /* pc_relative */
149 complain_overflow_unsigned, /* complain_on_overflow */
150 m32r_elf_generic_reloc,/* special_function */
151 "R_M32R_24", /* name */
152 true, /* partial_inplace */
153 0xffffff, /* src_mask */
154 0xffffff, /* dst_mask */
155 false), /* pcrel_offset */
157 /* An PC Relative 10-bit relocation, shifted by 2.
158 This reloc is complicated because relocations are relative to pc & -4.
159 i.e. branches in the right insn slot use the address of the left insn
161 /* ??? It's not clear whether this should have partial_inplace set or not.
162 Branch relaxing in the assembler can store the addend in the insn,
163 and if bfd_install_relocation gets called the addend may get added
165 HOWTO (R_M32R_10_PCREL, /* type */
167 1, /* size (0 = byte, 1 = short, 2 = long) */
169 true, /* pc_relative */
171 complain_overflow_signed, /* complain_on_overflow */
172 m32r_elf_10_pcrel_reloc, /* special_function */
173 "R_M32R_10_PCREL", /* name */
174 false, /* partial_inplace */
177 true), /* pcrel_offset */
179 /* A relative 18 bit relocation, right shifted by 2. */
180 HOWTO (R_M32R_18_PCREL, /* type */
182 2, /* size (0 = byte, 1 = short, 2 = long) */
184 true, /* pc_relative */
186 complain_overflow_signed, /* complain_on_overflow */
187 bfd_elf_generic_reloc, /* special_function */
188 "R_M32R_18_PCREL", /* name */
189 false, /* partial_inplace */
190 0xffff, /* src_mask */
191 0xffff, /* dst_mask */
192 true), /* pcrel_offset */
194 /* A relative 26 bit relocation, right shifted by 2. */
195 /* ??? It's not clear whether this should have partial_inplace set or not.
196 Branch relaxing in the assembler can store the addend in the insn,
197 and if bfd_install_relocation gets called the addend may get added
199 HOWTO (R_M32R_26_PCREL, /* type */
201 2, /* size (0 = byte, 1 = short, 2 = long) */
203 true, /* pc_relative */
205 complain_overflow_signed, /* complain_on_overflow */
206 bfd_elf_generic_reloc, /* special_function */
207 "R_M32R_26_PCREL", /* name */
208 false, /* partial_inplace */
209 0xffffff, /* src_mask */
210 0xffffff, /* dst_mask */
211 true), /* pcrel_offset */
213 /* High 16 bits of address when lower 16 is or'd in. */
214 HOWTO (R_M32R_HI16_ULO, /* type */
216 2, /* size (0 = byte, 1 = short, 2 = long) */
218 false, /* pc_relative */
220 complain_overflow_dont, /* complain_on_overflow */
221 m32r_elf_hi16_reloc, /* special_function */
222 "R_M32R_HI16_ULO", /* name */
223 true, /* partial_inplace */
224 0x0000ffff, /* src_mask */
225 0x0000ffff, /* dst_mask */
226 false), /* pcrel_offset */
228 /* High 16 bits of address when lower 16 is added in. */
229 HOWTO (R_M32R_HI16_SLO, /* type */
231 2, /* size (0 = byte, 1 = short, 2 = long) */
233 false, /* pc_relative */
235 complain_overflow_dont, /* complain_on_overflow */
236 m32r_elf_hi16_reloc, /* special_function */
237 "R_M32R_HI16_SLO", /* name */
238 true, /* partial_inplace */
239 0x0000ffff, /* src_mask */
240 0x0000ffff, /* dst_mask */
241 false), /* pcrel_offset */
243 /* Lower 16 bits of address. */
244 HOWTO (R_M32R_LO16, /* type */
246 2, /* size (0 = byte, 1 = short, 2 = long) */
248 false, /* pc_relative */
250 complain_overflow_dont, /* complain_on_overflow */
251 m32r_elf_lo16_reloc, /* special_function */
252 "R_M32R_LO16", /* name */
253 true, /* partial_inplace */
254 0x0000ffff, /* src_mask */
255 0x0000ffff, /* dst_mask */
256 false), /* pcrel_offset */
258 /* Small data area 16 bits offset. */
259 HOWTO (R_M32R_SDA16, /* type */
261 2, /* size (0 = byte, 1 = short, 2 = long) */
263 false, /* pc_relative */
265 complain_overflow_signed, /* complain_on_overflow */
266 m32r_elf_sda16_reloc, /* special_function */
267 "R_M32R_SDA16", /* name */
268 true, /* partial_inplace */ /* FIXME: correct? */
269 0x0000ffff, /* src_mask */
270 0x0000ffff, /* dst_mask */
271 false), /* pcrel_offset */
273 /* GNU extension to record C++ vtable hierarchy */
274 HOWTO (R_M32R_GNU_VTINHERIT, /* type */
276 2, /* size (0 = byte, 1 = short, 2 = long) */
278 false, /* pc_relative */
280 complain_overflow_dont, /* complain_on_overflow */
281 NULL, /* special_function */
282 "R_M32R_GNU_VTINHERIT", /* name */
283 false, /* partial_inplace */
286 false), /* pcrel_offset */
288 /* GNU extension to record C++ vtable member usage */
289 HOWTO (R_M32R_GNU_VTENTRY, /* type */
291 2, /* size (0 = byte, 1 = short, 2 = long) */
293 false, /* pc_relative */
295 complain_overflow_dont, /* complain_on_overflow */
296 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
297 "R_M32R_GNU_VTENTRY", /* name */
298 false, /* partial_inplace */
301 false), /* pcrel_offset */
305 /* Handle the R_M32R_10_PCREL reloc. */
307 static bfd_reloc_status_type
308 m32r_elf_10_pcrel_reloc (abfd, reloc_entry, symbol, data,
309 input_section, output_bfd, error_message)
311 arelent * reloc_entry;
314 asection * input_section;
316 char ** error_message ATTRIBUTE_UNUSED;
318 /* This part is from bfd_elf_generic_reloc. */
319 if (output_bfd != (bfd *) NULL
320 && (symbol->flags & BSF_SECTION_SYM) == 0
321 && (! reloc_entry->howto->partial_inplace
322 || reloc_entry->addend == 0))
324 reloc_entry->address += input_section->output_offset;
328 if (output_bfd != NULL)
330 /* FIXME: See bfd_perform_relocation. Is this right? */
331 return bfd_reloc_continue;
334 return m32r_elf_do_10_pcrel_reloc (abfd, reloc_entry->howto,
336 data, reloc_entry->address,
339 + symbol->section->output_section->vma
340 + symbol->section->output_offset),
341 reloc_entry->addend);
344 /* Utility to actually perform an R_M32R_10_PCREL reloc. */
346 static bfd_reloc_status_type
347 m32r_elf_do_10_pcrel_reloc (abfd, howto, input_section, data, offset,
348 symbol_section, symbol_value, addend)
350 reloc_howto_type *howto;
351 asection *input_section;
354 asection *symbol_section ATTRIBUTE_UNUSED;
355 bfd_vma symbol_value;
358 bfd_signed_vma relocation;
360 bfd_reloc_status_type status;
362 /* Sanity check the address (offset in section). */
363 if (offset > input_section->_cooked_size)
364 return bfd_reloc_outofrange;
366 relocation = symbol_value + addend;
367 /* Make it pc relative. */
368 relocation -= (input_section->output_section->vma
369 + input_section->output_offset);
370 /* These jumps mask off the lower two bits of the current address
371 before doing pcrel calculations. */
372 relocation -= (offset & -(bfd_vma) 4);
374 if (relocation < -0x200 || relocation > 0x1ff)
375 status = bfd_reloc_overflow;
377 status = bfd_reloc_ok;
379 x = bfd_get_16 (abfd, data + offset);
380 relocation >>= howto->rightshift;
381 relocation <<= howto->bitpos;
382 x = (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask);
383 bfd_put_16 (abfd, (bfd_vma) x, data + offset);
388 /* Handle the R_M32R_HI16_[SU]LO relocs.
389 HI16_SLO is for the add3 and load/store with displacement instructions.
390 HI16_ULO is for the or3 instruction.
391 For R_M32R_HI16_SLO, the lower 16 bits are sign extended when added to
392 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
393 we must add one to the high 16 bytes (which will get subtracted off when
394 the low 16 bits are added).
395 These relocs have to be done in combination with an R_M32R_LO16 reloc
396 because there is a carry from the LO16 to the HI16. Here we just save
397 the information we need; we do the actual relocation when we see the LO16.
398 This code is copied from the elf32-mips.c. We also support an arbitrary
399 number of HI16 relocs to be associated with a single LO16 reloc. The
400 assembler sorts the relocs to ensure each HI16 immediately precedes its
401 LO16. However if there are multiple copies, the assembler may not find
402 the real LO16 so it picks the first one it finds. */
406 struct m32r_hi16 *next;
411 /* FIXME: This should not be a static variable. */
413 static struct m32r_hi16 *m32r_hi16_list;
415 static bfd_reloc_status_type
416 m32r_elf_hi16_reloc (abfd, reloc_entry, symbol, data,
417 input_section, output_bfd, error_message)
418 bfd *abfd ATTRIBUTE_UNUSED;
419 arelent *reloc_entry;
422 asection *input_section;
424 char **error_message ATTRIBUTE_UNUSED;
426 bfd_reloc_status_type ret;
430 /* This part is from bfd_elf_generic_reloc.
431 If we're relocating, and this an external symbol, we don't want
432 to change anything. */
433 if (output_bfd != (bfd *) NULL
434 && (symbol->flags & BSF_SECTION_SYM) == 0
435 && reloc_entry->addend == 0)
437 reloc_entry->address += input_section->output_offset;
441 /* Sanity check the address (offset in section). */
442 if (reloc_entry->address > input_section->_cooked_size)
443 return bfd_reloc_outofrange;
446 if (bfd_is_und_section (symbol->section)
447 && output_bfd == (bfd *) NULL)
448 ret = bfd_reloc_undefined;
450 if (bfd_is_com_section (symbol->section))
453 relocation = symbol->value;
455 relocation += symbol->section->output_section->vma;
456 relocation += symbol->section->output_offset;
457 relocation += reloc_entry->addend;
459 /* Save the information, and let LO16 do the actual relocation. */
460 n = (struct m32r_hi16 *) bfd_malloc ((bfd_size_type) sizeof *n);
462 return bfd_reloc_outofrange;
463 n->addr = (bfd_byte *) data + reloc_entry->address;
464 n->addend = relocation;
465 n->next = m32r_hi16_list;
468 if (output_bfd != (bfd *) NULL)
469 reloc_entry->address += input_section->output_offset;
474 /* Handle an M32R ELF HI16 reloc. */
477 m32r_elf_relocate_hi16 (input_bfd, type, relhi, rello, contents, addend)
480 Elf_Internal_Rela *relhi;
481 Elf_Internal_Rela *rello;
488 insn = bfd_get_32 (input_bfd, contents + relhi->r_offset);
490 addlo = bfd_get_32 (input_bfd, contents + rello->r_offset);
491 if (type == R_M32R_HI16_SLO)
492 addlo = ((addlo & 0xffff) ^ 0x8000) - 0x8000;
496 addend += ((insn & 0xffff) << 16) + addlo;
498 /* Reaccount for sign extension of low part. */
499 if (type == R_M32R_HI16_SLO
500 && (addend & 0x8000) != 0)
503 bfd_put_32 (input_bfd,
504 (insn & 0xffff0000) | ((addend >> 16) & 0xffff),
505 contents + relhi->r_offset);
508 /* Do an R_M32R_LO16 relocation. This is a straightforward 16 bit
509 inplace relocation; this function exists in order to do the
510 R_M32R_HI16_[SU]LO relocation described above. */
512 bfd_reloc_status_type
513 m32r_elf_lo16_reloc (input_bfd, reloc_entry, symbol, data,
514 input_section, output_bfd, error_message)
516 arelent *reloc_entry;
519 asection *input_section;
521 char **error_message;
523 /* This part is from bfd_elf_generic_reloc.
524 If we're relocating, and this an external symbol, we don't want
525 to change anything. */
526 if (output_bfd != (bfd *) NULL
527 && (symbol->flags & BSF_SECTION_SYM) == 0
528 && reloc_entry->addend == 0)
530 reloc_entry->address += input_section->output_offset;
534 if (m32r_hi16_list != NULL)
544 struct m32r_hi16 *next;
546 /* Do the HI16 relocation. Note that we actually don't need
547 to know anything about the LO16 itself, except where to
548 find the low 16 bits of the addend needed by the LO16. */
549 insn = bfd_get_32 (input_bfd, l->addr);
550 vallo = ((bfd_get_32 (input_bfd, (bfd_byte *) data + reloc_entry->address)
551 & 0xffff) ^ 0x8000) - 0x8000;
552 val = ((insn & 0xffff) << 16) + vallo;
555 /* Reaccount for sign extension of low part. */
556 if ((val & 0x8000) != 0)
559 insn = (insn &~ (bfd_vma) 0xffff) | ((val >> 16) & 0xffff);
560 bfd_put_32 (input_bfd, (bfd_vma) insn, l->addr);
567 m32r_hi16_list = NULL;
570 /* Now do the LO16 reloc in the usual way.
571 ??? It would be nice to call bfd_elf_generic_reloc here,
572 but we have partial_inplace == TRUE. bfd_elf_generic_reloc will
573 pass the handling back to bfd_install_relocation which will install
574 a section relative addend which is wrong. */
575 return m32r_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
576 input_section, output_bfd, error_message);
579 /* Do generic partial_inplace relocation.
580 This is a local replacement for bfd_elf_generic_reloc. */
582 bfd_reloc_status_type
583 m32r_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
584 input_section, output_bfd, error_message)
586 arelent *reloc_entry;
589 asection *input_section;
591 char **error_message ATTRIBUTE_UNUSED;
593 bfd_reloc_status_type ret;
595 bfd_byte *inplace_address;
597 /* This part is from bfd_elf_generic_reloc.
598 If we're relocating, and this an external symbol, we don't want
599 to change anything. */
600 if (output_bfd != (bfd *) NULL
601 && (symbol->flags & BSF_SECTION_SYM) == 0
602 && reloc_entry->addend == 0)
604 reloc_entry->address += input_section->output_offset;
608 /* Now do the the reloc in the usual way.
609 ??? It would be nice to call bfd_elf_generic_reloc here,
610 but we have partial_inplace == TRUE. bfd_elf_generic_reloc will
611 pass the handling back to bfd_install_relocation which will install
612 a section relative addend which is wrong. */
614 /* Sanity check the address (offset in section). */
615 if (reloc_entry->address > input_section->_cooked_size)
616 return bfd_reloc_outofrange;
619 if (bfd_is_und_section (symbol->section)
620 && output_bfd == (bfd *) NULL)
621 ret = bfd_reloc_undefined;
623 if (bfd_is_com_section (symbol->section)
624 || output_bfd != (bfd *) NULL)
627 relocation = symbol->value;
629 /* Only do this for a final link. */
630 if (output_bfd == (bfd *) NULL)
632 relocation += symbol->section->output_section->vma;
633 relocation += symbol->section->output_offset;
636 relocation += reloc_entry->addend;
637 inplace_address = (bfd_byte *) data + reloc_entry->address;
640 x = ( (x & ~reloc_entry->howto->dst_mask) | \
641 (((x & reloc_entry->howto->src_mask) + relocation) & \
642 reloc_entry->howto->dst_mask))
644 switch (reloc_entry->howto->size)
648 short x = bfd_get_16 (input_bfd, inplace_address);
650 bfd_put_16 (input_bfd, (bfd_vma) x, inplace_address);
655 unsigned long x = bfd_get_32 (input_bfd, inplace_address);
657 bfd_put_32 (input_bfd, (bfd_vma)x , inplace_address);
664 if (output_bfd != (bfd *) NULL)
665 reloc_entry->address += input_section->output_offset;
670 /* Handle the R_M32R_SDA16 reloc.
671 This reloc is used to compute the address of objects in the small data area
672 and to perform loads and stores from that area.
673 The lower 16 bits are sign extended and added to the register specified
674 in the instruction, which is assumed to point to _SDA_BASE_. */
676 static bfd_reloc_status_type
677 m32r_elf_sda16_reloc (abfd, reloc_entry, symbol, data,
678 input_section, output_bfd, error_message)
679 bfd *abfd ATTRIBUTE_UNUSED;
680 arelent *reloc_entry;
682 PTR data ATTRIBUTE_UNUSED;
683 asection *input_section;
685 char **error_message ATTRIBUTE_UNUSED;
687 /* This part is from bfd_elf_generic_reloc. */
688 if (output_bfd != (bfd *) NULL
689 && (symbol->flags & BSF_SECTION_SYM) == 0
690 && (! reloc_entry->howto->partial_inplace
691 || reloc_entry->addend == 0))
693 reloc_entry->address += input_section->output_offset;
697 if (output_bfd != NULL)
699 /* FIXME: See bfd_perform_relocation. Is this right? */
700 return bfd_reloc_continue;
703 /* FIXME: not sure what to do here yet. But then again, the linker
704 may never call us. */
708 /* Map BFD reloc types to M32R ELF reloc types. */
710 struct m32r_reloc_map
712 bfd_reloc_code_real_type bfd_reloc_val;
713 unsigned char elf_reloc_val;
716 static const struct m32r_reloc_map m32r_reloc_map[] =
718 { BFD_RELOC_NONE, R_M32R_NONE },
719 { BFD_RELOC_16, R_M32R_16 },
720 { BFD_RELOC_32, R_M32R_32 },
721 { BFD_RELOC_M32R_24, R_M32R_24 },
722 { BFD_RELOC_M32R_10_PCREL, R_M32R_10_PCREL },
723 { BFD_RELOC_M32R_18_PCREL, R_M32R_18_PCREL },
724 { BFD_RELOC_M32R_26_PCREL, R_M32R_26_PCREL },
725 { BFD_RELOC_M32R_HI16_ULO, R_M32R_HI16_ULO },
726 { BFD_RELOC_M32R_HI16_SLO, R_M32R_HI16_SLO },
727 { BFD_RELOC_M32R_LO16, R_M32R_LO16 },
728 { BFD_RELOC_M32R_SDA16, R_M32R_SDA16 },
729 { BFD_RELOC_VTABLE_INHERIT, R_M32R_GNU_VTINHERIT },
730 { BFD_RELOC_VTABLE_ENTRY, R_M32R_GNU_VTENTRY },
733 static reloc_howto_type *
734 bfd_elf32_bfd_reloc_type_lookup (abfd, code)
735 bfd *abfd ATTRIBUTE_UNUSED;
736 bfd_reloc_code_real_type code;
741 i < sizeof (m32r_reloc_map) / sizeof (struct m32r_reloc_map);
744 if (m32r_reloc_map[i].bfd_reloc_val == code)
745 return &m32r_elf_howto_table[m32r_reloc_map[i].elf_reloc_val];
751 /* Set the howto pointer for an M32R ELF reloc. */
754 m32r_info_to_howto_rel (abfd, cache_ptr, dst)
755 bfd *abfd ATTRIBUTE_UNUSED;
757 Elf32_Internal_Rel *dst;
761 r_type = ELF32_R_TYPE (dst->r_info);
762 BFD_ASSERT (r_type < (unsigned int) R_M32R_max);
763 cache_ptr->howto = &m32r_elf_howto_table[r_type];
766 /* Given a BFD section, try to locate the corresponding ELF section
770 _bfd_m32r_elf_section_from_bfd_section (abfd, hdr, sec, retval)
771 bfd *abfd ATTRIBUTE_UNUSED;
772 Elf32_Internal_Shdr *hdr ATTRIBUTE_UNUSED;
776 if (strcmp (bfd_get_section_name (abfd, sec), ".scommon") == 0)
778 *retval = SHN_M32R_SCOMMON;
784 /* M32R ELF uses two common sections. One is the usual one, and the other
785 is for small objects. All the small objects are kept together, and then
786 referenced via one register, which yields faster assembler code. It is
787 up to the compiler to emit an instruction to load the register with
788 _SDA_BASE. This is what we use for the small common section. This
789 approach is copied from elf32-mips.c. */
790 static asection m32r_elf_scom_section;
791 static asymbol m32r_elf_scom_symbol;
792 static asymbol *m32r_elf_scom_symbol_ptr;
794 /* Handle the special M32R section numbers that a symbol may use. */
797 _bfd_m32r_elf_symbol_processing (abfd, asym)
798 bfd *abfd ATTRIBUTE_UNUSED;
801 elf_symbol_type *elfsym;
803 elfsym = (elf_symbol_type *) asym;
805 switch (elfsym->internal_elf_sym.st_shndx)
807 case SHN_M32R_SCOMMON:
808 if (m32r_elf_scom_section.name == NULL)
810 /* Initialize the small common section. */
811 m32r_elf_scom_section.name = ".scommon";
812 m32r_elf_scom_section.flags = SEC_IS_COMMON;
813 m32r_elf_scom_section.output_section = &m32r_elf_scom_section;
814 m32r_elf_scom_section.symbol = &m32r_elf_scom_symbol;
815 m32r_elf_scom_section.symbol_ptr_ptr = &m32r_elf_scom_symbol_ptr;
816 m32r_elf_scom_symbol.name = ".scommon";
817 m32r_elf_scom_symbol.flags = BSF_SECTION_SYM;
818 m32r_elf_scom_symbol.section = &m32r_elf_scom_section;
819 m32r_elf_scom_symbol_ptr = &m32r_elf_scom_symbol;
821 asym->section = &m32r_elf_scom_section;
822 asym->value = elfsym->internal_elf_sym.st_size;
827 /* Hook called by the linker routine which adds symbols from an object
828 file. We must handle the special M32R section numbers here.
829 We also keep watching for whether we need to create the sdata special
833 m32r_elf_add_symbol_hook (abfd, info, sym, namep, flagsp, secp, valp)
835 struct bfd_link_info *info;
836 const Elf_Internal_Sym *sym;
838 flagword *flagsp ATTRIBUTE_UNUSED;
842 if (! info->relocateable
843 && (*namep)[0] == '_' && (*namep)[1] == 'S'
844 && strcmp (*namep, "_SDA_BASE_") == 0)
846 /* This is simpler than using _bfd_elf_create_linker_section
847 (our needs are simpler than ppc's needs). Also
848 _bfd_elf_create_linker_section currently has a bug where if a .sdata
849 section already exists a new one is created that follows it which
850 screws of _SDA_BASE_ address calcs because output_offset != 0. */
851 struct elf_link_hash_entry *h;
852 asection *s = bfd_get_section_by_name (abfd, ".sdata");
854 /* The following code was cobbled from elf32-ppc.c and elflink.c. */
858 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
859 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
861 s = bfd_make_section_anyway (abfd, ".sdata");
864 bfd_set_section_flags (abfd, s, flags);
865 bfd_set_section_alignment (abfd, s, 2);
868 h = (struct elf_link_hash_entry *)
869 bfd_link_hash_lookup (info->hash, "_SDA_BASE_", false, false, false);
871 if ((h == NULL || h->root.type == bfd_link_hash_undefined)
872 && !(_bfd_generic_link_add_one_symbol (info,
880 get_elf_backend_data (abfd)->collect,
881 (struct bfd_link_hash_entry **) &h)))
883 h->type = STT_OBJECT;
886 switch (sym->st_shndx)
888 case SHN_M32R_SCOMMON:
889 *secp = bfd_make_section_old_way (abfd, ".scommon");
890 (*secp)->flags |= SEC_IS_COMMON;
891 *valp = sym->st_size;
898 /* We have to figure out the SDA_BASE value, so that we can adjust the
899 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
900 BFD. If we can't find it, we're stuck. We cache it in the ELF
901 target data. We don't need to adjust the symbol value for an
902 external symbol if we are producing relocateable output. */
904 static bfd_reloc_status_type
905 m32r_elf_final_sda_base (output_bfd, info, error_message, psb)
907 struct bfd_link_info *info;
908 const char **error_message;
911 if (elf_gp (output_bfd) == 0)
913 struct bfd_link_hash_entry *h;
915 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", false, false, true);
916 if (h != (struct bfd_link_hash_entry *) NULL
917 && h->type == bfd_link_hash_defined)
918 elf_gp (output_bfd) = (h->u.def.value
919 + h->u.def.section->output_section->vma
920 + h->u.def.section->output_offset);
923 /* Only get the error once. */
924 *psb = elf_gp (output_bfd) = 4;
926 (const char *) _("SDA relocation when _SDA_BASE_ not defined");
927 return bfd_reloc_dangerous;
930 *psb = elf_gp (output_bfd);
934 /* Relocate an M32R/D ELF section.
935 There is some attempt to make this function usable for many architectures,
936 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
937 if only to serve as a learning tool.
939 The RELOCATE_SECTION function is called by the new ELF backend linker
940 to handle the relocations for a section.
942 The relocs are always passed as Rela structures; if the section
943 actually uses Rel structures, the r_addend field will always be
946 This function is responsible for adjust the section contents as
947 necessary, and (if using Rela relocs and generating a
948 relocateable output file) adjusting the reloc addend as
951 This function does not have to worry about setting the reloc
952 address or the reloc symbol index.
954 LOCAL_SYMS is a pointer to the swapped in local symbols.
956 LOCAL_SECTIONS is an array giving the section in the input file
957 corresponding to the st_shndx field of each local symbol.
959 The global hash table entry for the global symbols can be found
960 via elf_sym_hashes (input_bfd).
962 When generating relocateable output, this function must handle
963 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
964 going to be the section symbol corresponding to the output
965 section, which means that the addend must be adjusted
969 m32r_elf_relocate_section (output_bfd, info, input_bfd, input_section,
970 contents, relocs, local_syms, local_sections)
971 bfd *output_bfd ATTRIBUTE_UNUSED;
972 struct bfd_link_info *info;
974 asection *input_section;
976 Elf_Internal_Rela *relocs;
977 Elf_Internal_Sym *local_syms;
978 asection **local_sections;
980 Elf_Internal_Shdr *symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
981 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (input_bfd);
982 Elf_Internal_Rela *rel, *relend;
983 /* Assume success. */
987 relend = relocs + input_section->reloc_count;
988 for (; rel < relend; rel++)
991 reloc_howto_type *howto;
992 unsigned long r_symndx;
993 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
994 ensure it's zero (we use REL relocs, not RELA). Therefore this
995 should be assigning zero to `addend', but for clarity we use
997 bfd_vma addend = rel->r_addend;
998 bfd_vma offset = rel->r_offset;
999 struct elf_link_hash_entry *h;
1000 Elf_Internal_Sym *sym;
1002 const char *sym_name;
1003 bfd_reloc_status_type r;
1004 const char *errmsg = NULL;
1007 r_type = ELF32_R_TYPE (rel->r_info);
1008 if (r_type < 0 || r_type >= (int) R_M32R_max)
1010 (*_bfd_error_handler) (_("%s: unknown relocation type %d"),
1011 bfd_archive_filename (input_bfd),
1013 bfd_set_error (bfd_error_bad_value);
1018 if (r_type == R_M32R_GNU_VTENTRY
1019 || r_type == R_M32R_GNU_VTINHERIT)
1022 howto = m32r_elf_howto_table + r_type;
1023 r_symndx = ELF32_R_SYM (rel->r_info);
1025 if (info->relocateable)
1027 /* This is a relocateable link. We don't have to change
1028 anything, unless the reloc is against a section symbol,
1029 in which case we have to adjust according to where the
1030 section symbol winds up in the output section. */
1032 if (r_symndx >= symtab_hdr->sh_info)
1034 /* External symbol. */
1039 sym = local_syms + r_symndx;
1040 sym_name = "<local symbol>";
1041 /* STT_SECTION: symbol is associated with a section. */
1042 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
1044 /* Symbol isn't associated with a section. Nothing to do. */
1048 sec = local_sections[r_symndx];
1049 addend += sec->output_offset + sym->st_value;
1051 /* This can't be done for USE_REL because it doesn't mean anything
1052 and elf_link_input_bfd asserts this stays zero. */
1053 rel->r_addend = addend;
1057 /* Addends are stored with relocs. We're done. */
1060 /* If partial_inplace, we need to store any additional addend
1061 back in the section. */
1062 if (! howto->partial_inplace)
1064 /* ??? Here is a nice place to call a special_function
1066 if (r_type != R_M32R_HI16_SLO && r_type != R_M32R_HI16_ULO)
1067 r = _bfd_relocate_contents (howto, input_bfd,
1068 addend, contents + offset);
1071 Elf_Internal_Rela *lorel;
1073 /* We allow an arbitrary number of HI16 relocs before the
1074 LO16 reloc. This permits gcc to emit the HI and LO relocs
1076 for (lorel = rel + 1;
1078 && (ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_SLO
1079 || ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_ULO));
1083 && ELF32_R_TYPE (lorel->r_info) == R_M32R_LO16)
1085 m32r_elf_relocate_hi16 (input_bfd, r_type, rel, lorel,
1090 r = _bfd_relocate_contents (howto, input_bfd,
1091 addend, contents + offset);
1093 #endif /* USE_REL */
1099 /* This is a final link. */
1103 if (r_symndx < symtab_hdr->sh_info)
1106 sym = local_syms + r_symndx;
1107 sec = local_sections[r_symndx];
1108 sym_name = "<local symbol>";
1109 relocation = (sec->output_section->vma
1110 + sec->output_offset
1115 /* External symbol. */
1116 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
1117 while (h->root.type == bfd_link_hash_indirect
1118 || h->root.type == bfd_link_hash_warning)
1119 h = (struct elf_link_hash_entry *) h->root.u.i.link;
1120 sym_name = h->root.root.string;
1122 if (h->root.type == bfd_link_hash_defined
1123 || h->root.type == bfd_link_hash_defweak)
1125 sec = h->root.u.def.section;
1126 if (sec->output_section == NULL)
1129 relocation = (h->root.u.def.value
1130 + sec->output_section->vma
1131 + sec->output_offset);
1133 else if (h->root.type == bfd_link_hash_undefweak)
1137 if (! ((*info->callbacks->undefined_symbol)
1138 (info, h->root.root.string, input_bfd,
1139 input_section, offset, true)))
1145 /* Sanity check the address. */
1146 if (offset > input_section->_raw_size)
1148 r = bfd_reloc_outofrange;
1152 switch ((int) r_type)
1154 case (int) R_M32R_10_PCREL :
1155 r = m32r_elf_do_10_pcrel_reloc (input_bfd, howto, input_section,
1157 sec, relocation, addend);
1160 case (int) R_M32R_HI16_SLO :
1161 case (int) R_M32R_HI16_ULO :
1163 Elf_Internal_Rela *lorel;
1165 /* We allow an arbitrary number of HI16 relocs before the
1166 LO16 reloc. This permits gcc to emit the HI and LO relocs
1168 for (lorel = rel + 1;
1170 && (ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_SLO
1171 || ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_ULO));
1175 && ELF32_R_TYPE (lorel->r_info) == R_M32R_LO16)
1177 m32r_elf_relocate_hi16 (input_bfd, r_type, rel, lorel,
1178 contents, relocation + addend);
1182 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
1184 relocation, addend);
1188 case (int) R_M32R_SDA16 :
1192 BFD_ASSERT (sec != NULL);
1193 name = bfd_get_section_name (abfd, sec);
1195 if (strcmp (name, ".sdata") == 0
1196 || strcmp (name, ".sbss") == 0
1197 || strcmp (name, ".scommon") == 0)
1200 bfd *out_bfd = sec->output_section->owner;
1202 r = m32r_elf_final_sda_base (out_bfd, info,
1205 if (r != bfd_reloc_ok)
1211 /* At this point `relocation' contains the object's
1213 relocation -= sda_base;
1214 /* Now it contains the offset from _SDA_BASE_. */
1218 (*_bfd_error_handler)
1219 (_("%s: The target (%s) of an %s relocation is in the wrong section (%s)"),
1220 bfd_archive_filename (input_bfd),
1222 m32r_elf_howto_table[(int) r_type].name,
1223 bfd_get_section_name (abfd, sec));
1224 /*bfd_set_error (bfd_error_bad_value); ??? why? */
1232 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
1234 relocation, addend);
1241 if (r != bfd_reloc_ok)
1243 /* FIXME: This should be generic enough to go in a utility. */
1247 name = h->root.root.string;
1250 name = (bfd_elf_string_from_elf_section
1251 (input_bfd, symtab_hdr->sh_link, sym->st_name));
1252 if (name == NULL || *name == '\0')
1253 name = bfd_section_name (input_bfd, sec);
1261 case bfd_reloc_overflow:
1262 if (! ((*info->callbacks->reloc_overflow)
1263 (info, name, howto->name, (bfd_vma) 0,
1264 input_bfd, input_section, offset)))
1268 case bfd_reloc_undefined:
1269 if (! ((*info->callbacks->undefined_symbol)
1270 (info, name, input_bfd, input_section,
1275 case bfd_reloc_outofrange:
1276 errmsg = _("internal error: out of range error");
1279 case bfd_reloc_notsupported:
1280 errmsg = _("internal error: unsupported relocation error");
1283 case bfd_reloc_dangerous:
1284 errmsg = _("internal error: dangerous error");
1288 errmsg = _("internal error: unknown error");
1292 if (!((*info->callbacks->warning)
1293 (info, errmsg, name, input_bfd, input_section,
1304 #if 0 /* relaxing not supported yet */
1306 /* This function handles relaxing for the m32r.
1307 Relaxing on the m32r is tricky because of instruction alignment
1308 requirements (4 byte instructions must be aligned on 4 byte boundaries).
1310 The following relaxing opportunities are handled:
1312 seth/add3/jl -> bl24 or bl8
1315 It would be nice to handle bl24 -> bl8 but given:
1317 - 4 byte insns must be on 4 byte boundaries
1318 - branch instructions only branch to insns on 4 byte boundaries
1320 this isn't much of a win because the insn in the 2 "deleted" bytes
1321 must become a nop. With some complexity some real relaxation could be
1322 done but the frequency just wouldn't make it worth it; it's better to
1323 try to do all the code compaction one can elsewhere.
1324 When the chip supports parallel 16 bit insns, things may change.
1328 m32r_elf_relax_section (abfd, sec, link_info, again)
1331 struct bfd_link_info *link_info;
1334 Elf_Internal_Shdr *symtab_hdr;
1335 /* The Rela structures are used here because that's what
1336 _bfd_elf32_link_read_relocs uses [for convenience - it sets the addend
1338 Elf_Internal_Rela *internal_relocs;
1339 Elf_Internal_Rela *free_relocs = NULL;
1340 Elf_Internal_Rela *irel, *irelend;
1341 bfd_byte *contents = NULL;
1342 bfd_byte *free_contents = NULL;
1343 Elf32_External_Sym *extsyms = NULL;
1344 Elf32_External_Sym *free_extsyms = NULL;
1346 /* Assume nothing changes. */
1349 /* We don't have to do anything for a relocateable link, if
1350 this section does not have relocs, or if this is not a
1352 if (link_info->relocateable
1353 || (sec->flags & SEC_RELOC) == 0
1354 || sec->reloc_count == 0
1355 || (sec->flags & SEC_CODE) == 0
1356 || 0 /* FIXME: check SHF_M32R_CAN_RELAX */)
1359 /* If this is the first time we have been called for this section,
1360 initialize the cooked size. */
1361 if (sec->_cooked_size == 0)
1362 sec->_cooked_size = sec->_raw_size;
1364 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1366 /* Get a copy of the native relocations. */
1367 internal_relocs = (_bfd_elf32_link_read_relocs
1368 (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL,
1369 link_info->keep_memory));
1370 if (internal_relocs == NULL)
1372 if (! link_info->keep_memory)
1373 free_relocs = internal_relocs;
1375 /* Walk through them looking for relaxing opportunities. */
1376 irelend = internal_relocs + sec->reloc_count;
1377 for (irel = internal_relocs; irel < irelend; irel++)
1381 /* If this isn't something that can be relaxed, then ignore
1383 if (ELF32_R_TYPE (irel->r_info) != (int) R_M32R_HI16_SLO)
1386 /* Get the section contents if we haven't done so already. */
1387 if (contents == NULL)
1389 /* Get cached copy if it exists. */
1390 if (elf_section_data (sec)->this_hdr.contents != NULL)
1391 contents = elf_section_data (sec)->this_hdr.contents;
1394 /* Go get them off disk. */
1395 contents = (bfd_byte *) bfd_malloc (sec->_raw_size);
1396 if (contents == NULL)
1398 free_contents = contents;
1400 if (! bfd_get_section_contents (abfd, sec, contents,
1401 (file_ptr) 0, sec->_raw_size))
1406 /* Read this BFD's symbols if we haven't done so already. */
1407 if (extsyms == NULL)
1409 /* Get cached copy if it exists. */
1410 if (symtab_hdr->contents != NULL)
1411 extsyms = (Elf32_External_Sym *) symtab_hdr->contents;
1414 bfd_size_type amt = symtab_hdr->sh_size;
1415 /* Go get them off disk. */
1416 extsyms = (Elf32_External_Sym *) bfd_malloc (amt);
1417 if (extsyms == NULL)
1419 free_extsyms = extsyms;
1420 if (bfd_seek (abfd, symtab_hdr->sh_offset, SEEK_SET) != 0
1421 || bfd_bread (extsyms, amt, abfd) != amt)
1426 /* Get the value of the symbol referred to by the reloc. */
1427 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
1429 Elf_Internal_Sym isym;
1432 /* A local symbol. */
1433 bfd_elf32_swap_symbol_in (abfd,
1434 extsyms + ELF32_R_SYM (irel->r_info),
1437 sym_sec = bfd_section_from_elf_index (abfd, isym.st_shndx);
1438 symval = (isym.st_value
1439 + sym_sec->output_section->vma
1440 + sym_sec->output_offset);
1445 struct elf_link_hash_entry *h;
1447 /* An external symbol. */
1448 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
1449 h = elf_sym_hashes (abfd)[indx];
1450 BFD_ASSERT (h != NULL);
1451 if (h->root.type != bfd_link_hash_defined
1452 && h->root.type != bfd_link_hash_defweak)
1454 /* This appears to be a reference to an undefined
1455 symbol. Just ignore it--it will be caught by the
1456 regular reloc processing. */
1460 symval = (h->root.u.def.value
1461 + h->root.u.def.section->output_section->vma
1462 + h->root.u.def.section->output_offset);
1465 /* For simplicity of coding, we are going to modify the section
1466 contents, the section relocs, and the BFD symbol table. We
1467 must tell the rest of the code not to free up this
1468 information. It would be possible to instead create a table
1469 of changes which have to be made, as is done in coff-mips.c;
1470 that would be more work, but would require less memory when
1471 the linker is run. */
1473 /* Try to change a seth/add3/jl subroutine call to bl24 or bl8.
1474 This sequence is generated by the compiler when compiling in
1475 32 bit mode. Also look for seth/add3 -> ld24. */
1477 if (ELF32_R_TYPE (irel->r_info) == (int) R_M32R_HI16_SLO)
1479 Elf_Internal_Rela *nrel;
1480 bfd_vma pc = (sec->output_section->vma + sec->output_offset
1482 bfd_signed_vma pcrel_value = symval - pc;
1483 unsigned int code,reg;
1484 int addend,nop_p,bl8_p,to_delete;
1486 /* The tests are ordered so that we get out as quickly as possible
1487 if this isn't something we can relax, taking into account that
1488 we are looking for two separate possibilities (jl/ld24). */
1490 /* Do nothing if no room in the section for this to be what we're
1492 if (irel->r_offset > sec->_cooked_size - 8)
1495 /* Make sure the next relocation applies to the next
1496 instruction and that it's the add3's reloc. */
1499 || irel->r_offset + 4 != nrel->r_offset
1500 || ELF32_R_TYPE (nrel->r_info) != (int) R_M32R_LO16)
1503 /* See if the instructions are seth/add3. */
1504 /* FIXME: This is where macros from cgen can come in. */
1505 code = bfd_get_16 (abfd, contents + irel->r_offset + 0);
1506 if ((code & 0xf0ff) != 0xd0c0)
1507 continue; /* not seth rN,foo */
1508 reg = (code & 0x0f00) >> 8;
1509 code = bfd_get_16 (abfd, contents + irel->r_offset + 4);
1510 if (code != (0x80a0 | reg | (reg << 8)))
1511 continue; /* not add3 rN,rN,foo */
1513 /* At this point we've confirmed we have seth/add3. Now check
1514 whether the next insn is a jl, in which case try to change this
1517 /* Ensure the branch target is in range.
1518 The bl24 instruction has a 24 bit operand which is the target
1519 address right shifted by 2, giving a signed range of 26 bits.
1520 Note that 4 bytes are added to the high value because the target
1521 will be at least 4 bytes closer if we can relax. It'll actually
1522 be 4 or 8 bytes closer, but we don't know which just yet and
1523 the difference isn't significant enough to worry about. */
1524 #ifndef USE_REL /* put in for learning purposes */
1525 pcrel_value += irel->r_addend;
1527 addend = bfd_get_signed_16 (abfd, contents + irel->r_offset + 2);
1528 pcrel_value += addend;
1531 if (pcrel_value >= -(1 << 25) && pcrel_value < (1 << 25) + 4
1532 /* Do nothing if no room in the section for this to be what we're
1534 && (irel->r_offset <= sec->_cooked_size - 12)
1535 /* Ensure the next insn is "jl rN". */
1536 && ((code = bfd_get_16 (abfd, contents + irel->r_offset + 8)),
1537 code != (0x1ec0 | reg)))
1539 /* We can relax to bl24/bl8. */
1541 /* See if there's a nop following the jl.
1542 Also see if we can use a bl8 insn. */
1543 code = bfd_get_16 (abfd, contents + irel->r_offset + 10);
1544 nop_p = (code & 0x7fff) == NOP_INSN;
1545 bl8_p = pcrel_value >= -0x200 && pcrel_value < 0x200;
1549 /* Change "seth rN,foo" to "bl8 foo || nop".
1550 We OR in CODE just in case it's not a nop (technically,
1551 CODE currently must be a nop, but for cleanness we
1552 allow it to be anything). */
1553 #ifndef USE_REL /* put in for learning purposes */
1554 code = 0x7e000000 | MAKE_PARALLEL (code);
1556 code = (0x7e000000 + (((addend >> 2) & 0xff) << 16)) | MAKE_PARALLEL (code);
1562 /* Change the seth rN,foo to a bl24 foo. */
1563 #ifndef USE_REL /* put in for learning purposes */
1566 code = 0xfe000000 + ((addend >> 2) & 0xffffff);
1568 to_delete = nop_p ? 8 : 4;
1571 bfd_put_32 (abfd, code, contents + irel->r_offset);
1573 /* Set the new reloc type. */
1574 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info),
1575 bl8_p ? R_M32R_10_PCREL : R_M32R_26_PCREL);
1577 /* Delete the add3 reloc by making it a null reloc. */
1578 nrel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info),
1581 else if (addend >= 0
1582 && symval + addend <= 0xffffff)
1584 /* We can relax to ld24. */
1586 code = 0xe0000000 | (reg << 24) | (addend & 0xffffff);
1587 bfd_put_32 (abfd, code, contents + irel->r_offset);
1589 /* Tell the following code a nop filler isn't needed. */
1594 /* Can't do anything here. */
1598 /* Note that we've changed the relocs, section contents, etc. */
1599 elf_section_data (sec)->relocs = internal_relocs;
1602 elf_section_data (sec)->this_hdr.contents = contents;
1603 free_contents = NULL;
1605 symtab_hdr->contents = (bfd_byte *) extsyms;
1606 free_extsyms = NULL;
1608 /* Delete TO_DELETE bytes of data. */
1609 if (!m32r_elf_relax_delete_bytes (abfd, sec,
1610 irel->r_offset + 4, to_delete))
1613 /* Now that the following bytes have been moved into place, see if
1614 we need to replace the jl with a nop. This happens when we had
1615 to use a bl24 insn and the insn following the jl isn't a nop.
1616 Technically, this situation can't happen (since the insn can
1617 never be executed) but to be clean we do this. When the chip
1618 supports parallel 16 bit insns things may change.
1619 We don't need to do this in the case of relaxing to ld24,
1620 and the above code sets nop_p so this isn't done. */
1621 if (! nop_p && to_delete == 4)
1622 bfd_put_16 (abfd, NOP_INSN, contents + irel->r_offset + 4);
1624 /* That will change things, so we should relax again.
1625 Note that this is not required, and it may be slow. */
1631 /* loop to try the next reloc */
1634 if (free_relocs != NULL)
1640 if (free_contents != NULL)
1642 if (! link_info->keep_memory)
1643 free (free_contents);
1646 /* Cache the section contents for elf_link_input_bfd. */
1647 elf_section_data (sec)->this_hdr.contents = contents;
1649 free_contents = NULL;
1652 if (free_extsyms != NULL)
1654 if (! link_info->keep_memory)
1655 free (free_extsyms);
1658 /* Cache the symbols for elf_link_input_bfd. */
1659 symtab_hdr->contents = extsyms;
1661 free_extsyms = NULL;
1667 if (free_relocs != NULL)
1669 if (free_contents != NULL)
1670 free (free_contents);
1671 if (free_extsyms != NULL)
1672 free (free_extsyms);
1676 /* Delete some bytes from a section while relaxing. */
1679 m32r_elf_relax_delete_bytes (abfd, sec, addr, count)
1685 Elf_Internal_Shdr *symtab_hdr;
1686 Elf32_External_Sym *extsyms;
1689 Elf_Internal_Rela *irel, *irelend;
1690 Elf_Internal_Rela *irelalign;
1692 Elf32_External_Sym *esym, *esymend;
1693 struct elf_link_hash_entry *sym_hash;
1695 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1696 extsyms = (Elf32_External_Sym *) symtab_hdr->contents;
1698 shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1700 contents = elf_section_data (sec)->this_hdr.contents;
1702 /* The deletion must stop at the next ALIGN reloc for an aligment
1703 power larger than the number of bytes we are deleting. */
1706 toaddr = sec->_cooked_size;
1708 irel = elf_section_data (sec)->relocs;
1709 irelend = irel + sec->reloc_count;
1711 /* Actually delete the bytes. */
1712 memmove (contents + addr, contents + addr + count, toaddr - addr - count);
1713 sec->_cooked_size -= count;
1715 /* Adjust all the relocs. */
1716 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1718 /* Get the new reloc address. */
1719 if ((irel->r_offset > addr
1720 && irel->r_offset < toaddr))
1721 irel->r_offset -= count;
1724 /* Adjust the local symbols defined in this section. */
1726 esymend = esym + symtab_hdr->sh_info;
1727 for (; esym < esymend; esym++)
1729 Elf_Internal_Sym isym;
1731 bfd_elf32_swap_symbol_in (abfd, esym, &isym);
1733 if (isym.st_shndx == shndx
1734 && isym.st_value > addr
1735 && isym.st_value < toaddr)
1737 isym.st_value -= count;
1738 bfd_elf32_swap_symbol_out (abfd, &isym, esym);
1742 /* Now adjust the global symbols defined in this section. */
1743 esym = extsyms + symtab_hdr->sh_info;
1744 esymend = extsyms + (symtab_hdr->sh_size / sizeof (Elf32_External_Sym));
1745 for (index = 0; esym < esymend; esym++, index++)
1747 Elf_Internal_Sym isym;
1749 bfd_elf32_swap_symbol_in (abfd, esym, &isym);
1750 sym_hash = elf_sym_hashes (abfd)[index];
1751 if (isym.st_shndx == shndx
1752 && ((sym_hash)->root.type == bfd_link_hash_defined
1753 || (sym_hash)->root.type == bfd_link_hash_defweak)
1754 && (sym_hash)->root.u.def.section == sec
1755 && (sym_hash)->root.u.def.value > addr
1756 && (sym_hash)->root.u.def.value < toaddr)
1758 (sym_hash)->root.u.def.value -= count;
1765 /* This is a version of bfd_generic_get_relocated_section_contents
1766 which uses m32r_elf_relocate_section. */
1769 m32r_elf_get_relocated_section_contents (output_bfd, link_info, link_order,
1770 data, relocateable, symbols)
1772 struct bfd_link_info *link_info;
1773 struct bfd_link_order *link_order;
1775 boolean relocateable;
1778 Elf_Internal_Shdr *symtab_hdr;
1779 asection *input_section = link_order->u.indirect.section;
1780 bfd *input_bfd = input_section->owner;
1781 asection **sections = NULL;
1782 Elf_Internal_Rela *internal_relocs = NULL;
1783 Elf32_External_Sym *external_syms = NULL;
1784 Elf_Internal_Sym *internal_syms = NULL;
1787 /* We only need to handle the case of relaxing, or of having a
1788 particular set of section contents, specially. */
1790 || elf_section_data (input_section)->this_hdr.contents == NULL)
1791 return bfd_generic_get_relocated_section_contents (output_bfd, link_info,
1796 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
1798 memcpy (data, elf_section_data (input_section)->this_hdr.contents,
1799 input_section->_raw_size);
1801 if ((input_section->flags & SEC_RELOC) != 0
1802 && input_section->reloc_count > 0)
1804 Elf_Internal_Sym *isymp;
1806 Elf32_External_Sym *esym, *esymend;
1808 if (symtab_hdr->contents != NULL)
1809 external_syms = (Elf32_External_Sym *) symtab_hdr->contents;
1812 amt = symtab_hdr->sh_info;
1813 amt *= sizeof (Elf32_External_Sym);
1814 external_syms = (Elf32_External_Sym *) bfd_malloc (amt);
1815 if (external_syms == NULL && symtab_hdr->sh_info > 0)
1817 if (bfd_seek (input_bfd, symtab_hdr->sh_offset, SEEK_SET) != 0
1818 || bfd_bread (external_syms, amt, input_bfd) != amt)
1822 internal_relocs = (_bfd_elf32_link_read_relocs
1823 (input_bfd, input_section, (PTR) NULL,
1824 (Elf_Internal_Rela *) NULL, false));
1825 if (internal_relocs == NULL)
1828 amt = symtab_hdr->sh_info;
1829 amt *= sizeof (Elf_Internal_Sym);
1830 internal_syms = (Elf_Internal_Sym *) bfd_malloc (amt);
1831 if (internal_syms == NULL && symtab_hdr->sh_info > 0)
1834 amt = symtab_hdr->sh_info;
1835 amt *= sizeof (asection *);
1836 sections = (asection **) bfd_malloc (amt);
1837 if (sections == NULL && symtab_hdr->sh_info > 0)
1840 isymp = internal_syms;
1842 esym = external_syms;
1843 esymend = esym + symtab_hdr->sh_info;
1844 for (; esym < esymend; ++esym, ++isymp, ++secpp)
1848 bfd_elf32_swap_symbol_in (input_bfd, esym, isymp);
1850 if (isymp->st_shndx == SHN_UNDEF)
1851 isec = bfd_und_section_ptr;
1852 else if (isymp->st_shndx > 0 && isymp->st_shndx < SHN_LORESERVE)
1853 isec = bfd_section_from_elf_index (input_bfd, isymp->st_shndx);
1854 else if (isymp->st_shndx == SHN_ABS)
1855 isec = bfd_abs_section_ptr;
1856 else if (isymp->st_shndx == SHN_COMMON)
1857 isec = bfd_com_section_ptr;
1858 else if (isymp->st_shndx == SHN_M32R_SCOMMON)
1859 isec = &m32r_elf_scom_section;
1869 if (! m32r_elf_relocate_section (output_bfd, link_info, input_bfd,
1870 input_section, data, internal_relocs,
1871 internal_syms, sections))
1874 if (sections != NULL)
1877 if (internal_syms != NULL)
1878 free (internal_syms);
1879 internal_syms = NULL;
1880 if (external_syms != NULL && symtab_hdr->contents == NULL)
1881 free (external_syms);
1882 external_syms = NULL;
1883 if (internal_relocs != elf_section_data (input_section)->relocs)
1884 free (internal_relocs);
1885 internal_relocs = NULL;
1891 if (internal_relocs != NULL
1892 && internal_relocs != elf_section_data (input_section)->relocs)
1893 free (internal_relocs);
1894 if (external_syms != NULL && symtab_hdr->contents == NULL)
1895 free (external_syms);
1896 if (internal_syms != NULL)
1897 free (internal_syms);
1898 if (sections != NULL)
1905 /* Set the right machine number. */
1907 m32r_elf_object_p (abfd)
1910 switch (elf_elfheader (abfd)->e_flags & EF_M32R_ARCH)
1913 case E_M32R_ARCH: (void) bfd_default_set_arch_mach (abfd, bfd_arch_m32r, bfd_mach_m32r); break;
1914 case E_M32RX_ARCH: (void) bfd_default_set_arch_mach (abfd, bfd_arch_m32r, bfd_mach_m32rx); break;
1919 /* Store the machine number in the flags field. */
1921 m32r_elf_final_write_processing (abfd, linker)
1923 boolean linker ATTRIBUTE_UNUSED;
1927 switch (bfd_get_mach (abfd))
1930 case bfd_mach_m32r: val = E_M32R_ARCH; break;
1931 case bfd_mach_m32rx: val = E_M32RX_ARCH; break;
1934 elf_elfheader (abfd)->e_flags &=~ EF_M32R_ARCH;
1935 elf_elfheader (abfd)->e_flags |= val;
1938 /* Function to keep M32R specific file flags. */
1940 m32r_elf_set_private_flags (abfd, flags)
1944 BFD_ASSERT (!elf_flags_init (abfd)
1945 || elf_elfheader (abfd)->e_flags == flags);
1947 elf_elfheader (abfd)->e_flags = flags;
1948 elf_flags_init (abfd) = true;
1952 /* Copy backend specific data from one object module to another */
1954 m32r_elf_copy_private_bfd_data (ibfd, obfd)
1958 if ( bfd_get_flavour (ibfd) != bfd_target_elf_flavour
1959 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
1962 BFD_ASSERT (!elf_flags_init (obfd)
1963 || (elf_elfheader (obfd)->e_flags
1964 == elf_elfheader (ibfd)->e_flags));
1966 elf_gp (obfd) = elf_gp (ibfd);
1967 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
1968 elf_flags_init (obfd) = true;
1972 /* Merge backend specific data from an object file to the output
1973 object file when linking. */
1975 m32r_elf_merge_private_bfd_data (ibfd, obfd)
1982 if ( bfd_get_flavour (ibfd) != bfd_target_elf_flavour
1983 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
1986 in_flags = elf_elfheader (ibfd)->e_flags;
1987 out_flags = elf_elfheader (obfd)->e_flags;
1989 if (! elf_flags_init (obfd))
1991 /* If the input is the default architecture then do not
1992 bother setting the flags for the output architecture,
1993 instead allow future merges to do this. If no future
1994 merges ever set these flags then they will retain their
1995 unitialised values, which surprise surprise, correspond
1996 to the default values. */
1997 if (bfd_get_arch_info (ibfd)->the_default)
2000 elf_flags_init (obfd) = true;
2001 elf_elfheader (obfd)->e_flags = in_flags;
2003 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
2004 && bfd_get_arch_info (obfd)->the_default)
2006 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
2012 /* Check flag compatibility. */
2013 if (in_flags == out_flags)
2016 if ((in_flags & EF_M32R_ARCH) != (out_flags & EF_M32R_ARCH))
2018 if ((in_flags & EF_M32R_ARCH) != E_M32R_ARCH)
2020 (*_bfd_error_handler)
2021 (_("%s: Instruction set mismatch with previous modules"),
2022 bfd_archive_filename (ibfd));
2024 bfd_set_error (bfd_error_bad_value);
2032 /* Display the flags field */
2034 m32r_elf_print_private_bfd_data (abfd, ptr)
2038 FILE * file = (FILE *) ptr;
2040 BFD_ASSERT (abfd != NULL && ptr != NULL)
2042 _bfd_elf_print_private_bfd_data (abfd, ptr);
2044 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
2046 switch (elf_elfheader (abfd)->e_flags & EF_M32R_ARCH)
2049 case E_M32R_ARCH: fprintf (file, _(": m32r instructions")); break;
2050 case E_M32RX_ARCH: fprintf (file, _(": m32rx instructions")); break;
2059 m32r_elf_gc_mark_hook (abfd, info, rel, h, sym)
2061 struct bfd_link_info *info ATTRIBUTE_UNUSED;
2062 Elf_Internal_Rela *rel;
2063 struct elf_link_hash_entry *h;
2064 Elf_Internal_Sym *sym;
2068 switch (ELF32_R_TYPE (rel->r_info))
2070 case R_M32R_GNU_VTINHERIT:
2071 case R_M32R_GNU_VTENTRY:
2075 switch (h->root.type)
2077 case bfd_link_hash_defined:
2078 case bfd_link_hash_defweak:
2079 return h->root.u.def.section;
2081 case bfd_link_hash_common:
2082 return h->root.u.c.p->section;
2091 if (!(elf_bad_symtab (abfd)
2092 && ELF_ST_BIND (sym->st_info) != STB_LOCAL)
2093 && ! ((sym->st_shndx <= 0 || sym->st_shndx >= SHN_LORESERVE)
2094 && sym->st_shndx != SHN_COMMON))
2096 return bfd_section_from_elf_index (abfd, sym->st_shndx);
2103 m32r_elf_gc_sweep_hook (abfd, info, sec, relocs)
2104 bfd *abfd ATTRIBUTE_UNUSED;
2105 struct bfd_link_info *info ATTRIBUTE_UNUSED;
2106 asection *sec ATTRIBUTE_UNUSED;
2107 const Elf_Internal_Rela *relocs ATTRIBUTE_UNUSED;
2109 /* we don't use got and plt entries for m32r */
2113 /* Look through the relocs for a section during the first phase.
2114 Since we don't do .gots or .plts, we just need to consider the
2115 virtual table relocs for gc. */
2118 m32r_elf_check_relocs (abfd, info, sec, relocs)
2120 struct bfd_link_info *info;
2122 const Elf_Internal_Rela *relocs;
2124 Elf_Internal_Shdr *symtab_hdr;
2125 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
2126 const Elf_Internal_Rela *rel;
2127 const Elf_Internal_Rela *rel_end;
2129 if (info->relocateable)
2132 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
2133 sym_hashes = elf_sym_hashes (abfd);
2134 sym_hashes_end = sym_hashes + symtab_hdr->sh_size/sizeof (Elf32_External_Sym);
2135 if (!elf_bad_symtab (abfd))
2136 sym_hashes_end -= symtab_hdr->sh_info;
2138 rel_end = relocs + sec->reloc_count;
2139 for (rel = relocs; rel < rel_end; rel++)
2141 struct elf_link_hash_entry *h;
2142 unsigned long r_symndx;
2144 r_symndx = ELF32_R_SYM (rel->r_info);
2145 if (r_symndx < symtab_hdr->sh_info)
2148 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
2150 switch (ELF32_R_TYPE (rel->r_info))
2152 /* This relocation describes the C++ object vtable hierarchy.
2153 Reconstruct it for later use during GC. */
2154 case R_M32R_GNU_VTINHERIT:
2155 if (!_bfd_elf32_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
2159 /* This relocation describes which C++ vtable entries are actually
2160 used. Record for later use during GC. */
2161 case R_M32R_GNU_VTENTRY:
2162 if (!_bfd_elf32_gc_record_vtentry (abfd, sec, h, rel->r_offset))
2171 #define ELF_ARCH bfd_arch_m32r
2172 #define ELF_MACHINE_CODE EM_M32R
2173 #define ELF_MACHINE_ALT1 EM_CYGNUS_M32R
2174 #define ELF_MAXPAGESIZE 0x1 /* Explicitly requested by Mitsubishi. */
2176 #define TARGET_BIG_SYM bfd_elf32_m32r_vec
2177 #define TARGET_BIG_NAME "elf32-m32r"
2179 #define elf_info_to_howto 0
2180 #define elf_info_to_howto_rel m32r_info_to_howto_rel
2181 #define elf_backend_section_from_bfd_section _bfd_m32r_elf_section_from_bfd_section
2182 #define elf_backend_symbol_processing _bfd_m32r_elf_symbol_processing
2183 #define elf_backend_add_symbol_hook m32r_elf_add_symbol_hook
2184 #define elf_backend_relocate_section m32r_elf_relocate_section
2185 #define elf_backend_gc_mark_hook m32r_elf_gc_mark_hook
2186 #define elf_backend_gc_sweep_hook m32r_elf_gc_sweep_hook
2187 #define elf_backend_check_relocs m32r_elf_check_relocs
2189 #define elf_backend_can_gc_sections 1
2192 #define bfd_elf32_bfd_relax_section m32r_elf_relax_section
2193 #define bfd_elf32_bfd_get_relocated_section_contents \
2194 m32r_elf_get_relocated_section_contents
2197 #define elf_backend_object_p m32r_elf_object_p
2198 #define elf_backend_final_write_processing m32r_elf_final_write_processing
2199 #define bfd_elf32_bfd_copy_private_bfd_data m32r_elf_copy_private_bfd_data
2200 #define bfd_elf32_bfd_merge_private_bfd_data m32r_elf_merge_private_bfd_data
2201 #define bfd_elf32_bfd_set_private_flags m32r_elf_set_private_flags
2202 #define bfd_elf32_bfd_print_private_bfd_data m32r_elf_print_private_bfd_data
2204 #include "elf32-target.h"