3 * gencode.c (build_instruction): For "FPSQRT", output correct
4 number of arguments to Recip.
8 * Makefile.in (interp.o): Depends on sim-main.h
10 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
12 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
13 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
14 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
15 STATE, DSSTATE): Define
16 (GPR, FGRIDX, ..): Define.
18 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
19 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
20 (GPR, FGRIDX, ...): Delete macros.
22 * interp.c: Update names to match defines from sim-main.h
26 * interp.c (sim_monitor): Add SD argument.
27 (sim_warning): Delete. Replace calls with calls to
29 (sim_error): Delete. Replace calls with sim_io_error.
30 (open_trace, writeout32, writeout16, getnum): Add SD argument.
31 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
32 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
34 (mips_size): Rename from sim_size. Add SD argument.
36 * interp.c (simulator): Delete global variable.
37 (callback): Delete global variable.
38 (mips_option_handler, sim_open, sim_write, sim_read,
39 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
40 sim_size,sim_monitor): Use sim_io_* not callback->*.
41 (sim_open): ZALLOC simulator struct.
42 (PROFILE): Do not define.
46 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
47 support.h with corresponding code.
49 * sim-main.h (word64, uword64), support.h: Move definition to
51 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
54 * Makefile.in: Update dependencies
55 * interp.c: Do not include.
59 * interp.c (address_translation, load_memory, store_memory,
60 cache_op): Rename to from AddressTranslation et.al., make global,
63 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
66 * interp.c (SignalException): Rename to signal_exception, make
69 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
71 * sim-main.h (SignalException, SignalExceptionInterrupt,
72 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
73 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
74 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
77 * interp.c, support.h: Use.
81 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
82 to value_fpr / store_fpr. Add SD argument.
83 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
84 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
86 * sim-main.h (ValueFPR, StoreFPR): Define.
90 * interp.c (sim_engine_run): Check consistency between configure
91 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
94 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
95 (mips_fpu): Configure WITH_FLOATING_POINT.
96 (mips_endian): Configure WITH_TARGET_ENDIAN.
101 * configure: Regenerated to track ../common/aclocal.m4 changes.
106 * interp.c (MAX_REG): Allow up-to 128 registers.
107 (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
108 (REGISTER_SA): Ditto.
109 (sim_open): Initialize register_widths for r5900 specific
111 (sim_fetch_register, sim_store_register): Check for request of
112 r5900 specific SA register. Check for request for hi 64 bits of
113 r5900 specific registers.
118 * configure: Regenerated.
122 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
126 * gencode.c (print_igen_insn_models): Assume certain architectures
127 include all mips* instructions.
128 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
131 * Makefile.in (tmp.igen): Add target. Generate igen input from
134 * gencode.c (FEATURE_IGEN): Define.
135 (main): Add --igen option. Generate output in igen format.
136 (process_instructions): Format output according to igen option.
137 (print_igen_insn_format): New function.
138 (print_igen_insn_models): New function.
139 (process_instructions): Only issue warnings and ignore
140 instructions when no FEATURE_IGEN.
144 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
149 * configure: Regenerated to track ../common/aclocal.m4 changes.
153 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
154 SIM_RESERVED_BITS): Delete, moved to common.
155 (SIM_EXTRA_CFLAGS): Update.
159 * configure.in: Configure non-strict memory alignment.
160 * configure: Regenerated to track ../common/aclocal.m4 changes.
164 * configure: Regenerated to track ../common/aclocal.m4 changes.
168 * gencode.c (SDBBP,DERET): Added (3900) insns.
169 (RFE): Turn on for 3900.
170 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
171 (dsstate): Made global.
172 (SUBTARGET_R3900): Added.
173 (CANCELDELAYSLOT): New.
174 (SignalException): Ignore SystemCall rather than ignore and
175 terminate. Add DebugBreakPoint handling.
176 (decode_coproc): New insns RFE, DERET; and new registers Debug
177 and DEPC protected by SUBTARGET_R3900.
178 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
180 * Makefile.in,configure.in: Add mips subtarget option.
185 * gencode.c: Add r3900 (tx39).
188 * gencode.c: Fix some configuration problems by improving
189 the relationship between tx19 and tx39.
194 * gencode.c (build_instruction): Don't need to subtract 4 for
199 * interp.c: Correct some HASFPU problems.
203 * configure: Regenerated to track ../common/aclocal.m4 changes.
207 * interp.c (mips_options): Fix samples option short form, should
212 * interp.c (sim_info): Enable info code. Was just returning.
216 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
221 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
223 (build_instruction): Ditto for LL.
228 * mips/configure.in, mips/gencode: Add tx19/r1900.
231 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
233 * configure: Regenerated to track ../common/aclocal.m4 changes.
238 * gencode.c (build_instruction): For "pabsw" and "pabsh", check
239 for overflow due to ABS of MININT, set result to MAXINT.
240 (build_instruction): For "psrlvw", signextend bit 31.
245 * configure: Regenerated to track ../common/aclocal.m4 changes.
250 * interp.c (sim_open): Add call to sim_analyze_program, update
255 * interp.c (sim_kill): Delete.
256 (sim_create_inferior): Add ABFD argument. Set PC from same.
257 (sim_load): Move code initializing trap handlers from here.
259 (sim_load): Delete, use sim-hload.c.
261 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
265 * configure: Regenerated to track ../common/aclocal.m4 changes.
270 * interp.c (sim_open): Add ABFD argument.
271 (sim_load): Move call to sim_config from here.
272 (sim_open): To here. Check return status.
275 * gencode.c (build_instruction): Do not define x8000000000000000,
276 x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
282 * gencode.c (build_instruction): For "pdivw", "pdivbw" and
283 "pdivuw" check for overflow due to signed divide by -1.
288 * gencode.c (build_instruction): Two arg MADD should
289 not assign result to $0.
294 * gencode.c (build_instruction): For "ppac5" use unsigned
295 arrithmetic so that the sign bit doesn't smear when right shifted.
296 (build_instruction): For "pdiv" perform sign extension when
297 storing results in HI and LO.
298 (build_instructions): For "pdiv" and "pdivbw" check for
300 (build_instruction): For "pmfhl.slw" update hi part of dest
301 register as well as low part.
302 (build_instruction): For "pmfhl" portably handle long long values.
303 (build_instruction): For "pmfhl.sh" correctly negative values.
304 Store half words 2 and three in the correct place.
305 (build_instruction): For "psllvw", sign extend value after shift.
310 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
311 * sim/mips/configure.in: Regenerate.
315 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
316 signed8, unsigned8 et.al. types.
319 * gencode.c (build_instruction): For PMULTU* do not sign extend
320 registers. Make generated code easier to debug.
323 * interp.c (SUB_REG_FETCH): Handle both little and big endian
324 hosts when selecting subreg.
329 * gencode.c (type_for_data_len): For 32bit operations concerned
330 with overflow, perform op using 64bits.
331 (build_instruction): For PADD, always compute operation using type
332 returned by type_for_data_len.
333 (build_instruction): For PSUBU, when overflow, saturate to zero as
340 * gencode.c (build_instruction): Handle "pext5" according to
341 version 1.95 of the r5900 ISA.
343 * gencode.c (build_instruction): Handle "ppac5" according to
344 version 1.95 of the r5900 ISA.
347 * interp.c (sim_engine_run): Reset the ZERO register to zero
348 regardless of FEATURE_WARN_ZERO.
349 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
353 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
354 (SignalException): For BreakPoints ignore any mode bits and just
356 (SignalException): Always set the CAUSE register.
360 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
361 exception has been taken.
363 * interp.c: Implement the ERET and mt/f sr instructions.
368 * gencode.c (build_instruction): For paddu, extract unsigned
371 * gencode.c (build_instruction): Saturate padds instead of padd
377 * interp.c (SignalException): Don't bother restarting an
382 * interp.c (SignalException): Really take an interrupt.
383 (interrupt_event): Only deliver interrupts when enabled.
387 * interp.c (sim_info): Only print info when verbose.
388 (sim_info) Use sim_io_printf for output.
392 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
397 * interp.c (sim_do_command): Check for common commands if a
398 simulator specific command fails.
402 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
403 and simBE when DEBUG is defined.
407 * interp.c (interrupt_event): New function. Pass exception event
408 onto exception handler.
410 * configure.in: Check for stdlib.h.
411 * configure: Regenerate.
413 * gencode.c (build_instruction): Add UNUSED attribute to tempS
414 variable declaration.
415 (build_instruction): Initialize memval1.
416 (build_instruction): Add UNUSED attribute to byte, bigend,
418 (build_operands): Ditto.
420 * interp.c: Fix GCC warnings.
421 (sim_get_quit_code): Delete.
423 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
424 * Makefile.in: Ditto.
425 * configure: Re-generate.
427 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
431 * interp.c (mips_option_handler): New function parse argumes using
433 (myname): Replace with STATE_MY_NAME.
434 (sim_open): Delete check for host endianness - performed by
436 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
437 (sim_open): Move much of the initialization from here.
438 (sim_load): To here. After the image has been loaded and
440 (sim_open): Move ColdReset from here.
441 (sim_create_inferior): To here.
442 (sim_open): Make FP check less dependant on host endianness.
444 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
446 * interp.c (sim_set_callbacks): Delete.
448 * interp.c (membank, membank_base, membank_size): Replace with
449 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
450 (sim_open): Remove call to callback->init. gdb/run do this.
454 * sim-main.h (SIM_HAVE_FLATMEM): Define.
456 * interp.c (big_endian_p): Delete, replaced by
457 current_target_byte_order.
461 * interp.c (host_read_long, host_read_word, host_swap_word,
462 host_swap_long): Delete. Using common sim-endian.
463 (sim_fetch_register, sim_store_register): Use H2T.
464 (pipeline_ticks): Delete. Handled by sim-events.
466 (sim_engine_run): Update.
470 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
472 (SignalException): To here. Signal using sim_engine_halt.
473 (sim_stop_reason): Delete, moved to common.
477 * interp.c (sim_open): Add callback argument.
478 (sim_set_callbacks): Delete SIM_DESC argument.
483 * Makefile.in (SIM_OBJS): Add common modules.
485 * interp.c (sim_set_callbacks): Also set SD callback.
486 (set_endianness, xfer_*, swap_*): Delete.
487 (host_read_word, host_read_long, host_swap_word, host_swap_long):
488 Change to functions using sim-endian macros.
489 (control_c, sim_stop): Delete, use common version.
490 (simulate): Convert into.
491 (sim_engine_run): This function.
492 (sim_resume): Delete.
494 * interp.c (simulation): New variable - the simulator object.
495 (sim_kind): Delete global - merged into simulation.
496 (sim_load): Cleanup. Move PC assignment from here.
497 (sim_create_inferior): To here.
499 * sim-main.h: New file.
500 * interp.c (sim-main.h): Include.
504 * configure: Regenerated to track ../common/aclocal.m4 changes.
508 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
512 * gencode.c (build_instruction): DIV instructions: check
513 for division by zero and integer overflow before using
514 host's division operation.
518 * Makefile.in (SIM_OBJS): Add sim-load.o.
519 * interp.c: #include bfd.h.
520 (target_byte_order): Delete.
521 (sim_kind, myname, big_endian_p): New static locals.
522 (sim_open): Set sim_kind, myname. Move call to set_endianness to
523 after argument parsing. Recognize -E arg, set endianness accordingly.
524 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
525 load file into simulator. Set PC from bfd.
526 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
527 (set_endianness): Use big_endian_p instead of target_byte_order.
531 * interp.c (sim_size): Delete prototype - conflicts with
532 definition in remote-sim.h. Correct definition.
536 * configure: Regenerated to track ../common/aclocal.m4 changes.
541 * interp.c (sim_open): New arg `kind'.
543 * configure: Regenerated to track ../common/aclocal.m4 changes.
547 * configure: Regenerated to track ../common/aclocal.m4 changes.
551 * interp.c (sim_open): Set optind to 0 before calling getopt.
555 * configure: Regenerated to track ../common/aclocal.m4 changes.
559 * interp.c : Replace uses of pr_addr with pr_uword64
560 where the bit length is always 64 independent of SIM_ADDR.
561 (pr_uword64) : added.
565 * configure: Re-generate.
569 * configure: Regenerate to track ../common/aclocal.m4 changes.
573 * interp.c (sim_open): New SIM_DESC result. Argument is now
575 (other sim_*): New SIM_DESC argument.
580 * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
581 Change values to avoid overloading DOUBLEWORD which is tested
583 * gencode.c: reinstate "offending code".
588 * interp.c: Fix printing of addresses for non-64-bit targets.
589 (pr_addr): Add function to print address based on size.
591 * gencode.c: #ifdef out offending code until a permanent fix
592 can be added. Code is causing build errors for non-5900 mips targets.
598 * gencode.c (process_instructions): Correct test for ISA dependent
599 architecture bits in isa field of MIPS_DECODE.
604 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
609 * gencode.c (MIPS_DECODE): Correct instruction feature flags for
615 * gencode.c (build_mips16_operands): Correct computation of base
616 address for extended PC relative instruction.
621 * Makefile.in, configure, configure.in, gencode.c,
622 interp.c, support.h: add r5900.
627 * interp.c (mips16_entry): Add support for floating point cases.
628 (SignalException): Pass floating point cases to mips16_entry.
629 (ValueFPR): Don't restrict fmt_single and fmt_word to even
631 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
633 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
634 and then set the state to fmt_uninterpreted.
635 (COP_SW): Temporarily set the state to fmt_word while calling
640 * gencode.c (build_instruction): The high order may be set in the
641 comparison flags at any ISA level, not just ISA 4.
645 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
646 COMMON_{PRE,POST}_CONFIG_FRAG instead.
647 * configure.in: sinclude ../common/aclocal.m4.
648 * configure: Regenerated.
652 * configure: Rebuild after change to aclocal.m4.
656 * configure configure.in Makefile.in: Update to new configure
657 scheme which is more compatible with WinGDB builds.
658 * configure.in: Improve comment on how to run autoconf.
659 * configure: Re-run autoconf to get new ../common/aclocal.m4.
660 * Makefile.in: Use autoconf substitution to install common
665 * gencode.c (build_instruction): Use BigEndianCPU instead of
670 * interp.c (sim_monitor): Make output to stdout visible in
671 wingdb's I/O log window.
675 * support.h: Undo previous change to SIGTRAP
680 * interp.c (store_word, load_word): New static functions.
681 (mips16_entry): New static function.
682 (SignalException): Look for mips16 entry and exit instructions.
683 (simulate): Use the correct index when setting fpr_state after
684 doing a pending move.
688 * interp.c: Fix byte-swapping code throughout to work on
689 both little- and big-endian hosts.
693 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
694 with gdb/config/i386/xm-windows.h.
698 * gencode.c (build_instruction): Work around MSVC++ code gen bug
699 that messes up arithmetic shifts.
703 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
704 SIGTRAP and SIGQUIT for _WIN32.
708 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
709 force a 64 bit multiplication.
710 (build_instruction) [OR]: In mips16 mode, don't do anything if the
711 destination register is 0, since that is the default mips16 nop
716 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
717 (build_endian_shift): Don't check proc64.
718 (build_instruction): Always set memval to uword64. Cast op2 to
719 uword64 when shifting it left in memory instructions. Always use
720 the same code for stores--don't special case proc64.
722 * gencode.c (build_mips16_operands): Fix base PC value for PC
724 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
726 * interp.c (simJALDELAYSLOT): Define.
727 (JALDELAYSLOT): Define.
728 (INDELAYSLOT, INJALDELAYSLOT): Define.
729 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
733 * interp.c (sim_open): add flush_cache as a PMON routine
734 (sim_monitor): handle flush_cache by ignoring it
738 * gencode.c (build_instruction): Use !ByteSwapMem instead of
740 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
741 (BigEndianMem): Rename to ByteSwapMem and change sense.
742 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
743 BigEndianMem references to !ByteSwapMem.
744 (set_endianness): New function, with prototype.
745 (sim_open): Call set_endianness.
746 (sim_info): Use simBE instead of BigEndianMem.
747 (xfer_direct_word, xfer_direct_long, swap_direct_word,
748 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
749 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
750 ifdefs, keeping the prototype declaration.
751 (swap_word): Rewrite correctly.
752 (ColdReset): Delete references to CONFIG. Delete endianness related
753 code; moved to set_endianness.
757 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
758 * interp.c (CHECKHILO): Define away.
759 (simSIGINT): New macro.
760 (membank_size): Increase from 1MB to 2MB.
761 (control_c): New function.
762 (sim_resume): Rename parameter signal to signal_number. Add local
763 variable prev. Call signal before and after simulate.
764 (sim_stop_reason): Add simSIGINT support.
765 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
767 (sim_warning): Delete call to SignalException. Do call printf_filtered
769 (AddressTranslation): Add #ifdef DEBUG around debugging message and
770 a call to sim_warning.
774 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
779 Add support for mips16 (16 bit MIPS implementation):
780 * gencode.c (inst_type): Add mips16 instruction encoding types.
781 (GETDATASIZEINSN): Define.
782 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
783 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
785 (MIPS16_DECODE): New table, for mips16 instructions.
786 (bitmap_val): New static function.
787 (struct mips16_op): Define.
788 (mips16_op_table): New table, for mips16 operands.
789 (build_mips16_operands): New static function.
790 (process_instructions): If PC is odd, decode a mips16
791 instruction. Break out instruction handling into new
792 build_instruction function.
793 (build_instruction): New static function, broken out of
794 process_instructions. Check modifiers rather than flags for SHIFT
795 bit count and m[ft]{hi,lo} direction.
796 (usage): Pass program name to fprintf.
797 (main): Remove unused variable this_option_optind. Change
798 ``*loptarg++'' to ``loptarg++''.
799 (my_strtoul): Parenthesize && within ||.
800 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
801 (simulate): If PC is odd, fetch a 16 bit instruction, and
802 increment PC by 2 rather than 4.
803 * configure.in: Add case for mips16*-*-*.
804 * configure: Rebuild.
808 * interp.c: Allow -t to enable tracing in standalone simulator.
809 Fix garbage output in trace file and error messages.
813 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
814 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
815 * configure.in: Simplify using macros in ../common/aclocal.m4.
816 * configure: Regenerated.
817 * tconfig.in: New file.
821 * interp.c: Fix bugs in 64-bit port.
822 Use ansi function declarations for msvc compiler.
823 Initialize and test file pointer in trace code.
824 Prevent duplicate definition of LAST_EMED_REGNUM.
828 * interp.c (xfer_big_long): Prevent unwanted sign extension.
832 * interp.c (SignalException): Check for explicit terminating
834 * gencode.c: Pass instruction value through SignalException()
835 calls for Trap, Breakpoint and Syscall.
839 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
840 only used on those hosts that provide it.
841 * configure.in: Add sqrt() to list of functions to be checked for.
842 * config.in: Re-generated.
843 * configure: Re-generated.
847 * gencode.c (process_instructions): Call build_endian_shift when
848 expanding STORE RIGHT, to fix swr.
849 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
851 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
852 Fix float to int conversions to produce signed values.
856 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
857 (process_instructions): Correct handling of nor instruction.
858 Correct shift count for 32 bit shift instructions. Correct sign
859 extension for arithmetic shifts to not shift the number of bits in
860 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
861 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
863 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
864 It's OK to have a mult follow a mult. What's not OK is to have a
866 (Convert): Comment out incorrect rounding code.
870 * interp.c (sim_monitor): Improved monitor printf
871 simulation. Tidied up simulator warnings, and added "--log" option
872 for directing warning message output.
873 * gencode.c: Use sim_warning() rather than WARNING macro.
877 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
878 getopt1.o, rather than on gencode.c. Link objects together.
879 Don't link against -liberty.
880 (gencode.o, getopt.o, getopt1.o): New targets.
881 * gencode.c: Include <ctype.h> and "ansidecl.h".
882 (AND): Undefine after including "ansidecl.h".
883 (ULONG_MAX): Define if not defined.
884 (OP_*): Don't define macros; now defined in opcode/mips.h.
885 (main): Call my_strtoul rather than strtoul.
886 (my_strtoul): New static function.
890 * gencode.c (process_instructions): Generate word64 and uword64
891 instead of `long long' and `unsigned long long' data types.
892 * interp.c: #include sysdep.h to get signals, and define default
894 * (Convert): Work around for Visual-C++ compiler bug with type
896 * support.h: Make things compile under Visual-C++ by using
897 __int64 instead of `long long'. Change many refs to long long
898 into word64/uword64 typedefs.
902 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
903 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
905 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
906 (AC_PROG_INSTALL): Added.
907 (AC_PROG_CC): Moved to before configure.host call.
908 * configure: Rebuilt.
912 * configure.in: Define @SIMCONF@ depending on mips target.
913 * configure: Rebuild.
914 * Makefile.in (run): Add @SIMCONF@ to control simulator
916 * gencode.c: Change LOADDRMASK to 64bit memory model only.
917 * interp.c: Remove some debugging, provide more detailed error
918 messages, update memory accesses to use LOADDRMASK.
922 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
923 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
925 * configure: Rebuild.
926 * config.in: New file, generated by autoheader.
927 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
928 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
929 HAVE_ANINT and HAVE_AINT, as appropriate.
930 * Makefile.in (run): Use @LIBS@ rather than -lm.
931 (interp.o): Depend upon config.h.
932 (Makefile): Just rebuild Makefile.
933 (clean): Remove stamp-h.
934 (mostlyclean): Make the same as clean, not as distclean.
935 (config.h, stamp-h): New targets.
939 * interp.c (ColdReset): Fix boolean test. Make all simulator
944 * interp.c (xfer_direct_word, xfer_direct_long,
945 swap_direct_word, swap_direct_long, xfer_big_word,
946 xfer_big_long, xfer_little_word, xfer_little_long,
947 swap_word,swap_long): Added.
948 * interp.c (ColdReset): Provide function indirection to
949 host<->simulated_target transfer routines.
950 * interp.c (sim_store_register, sim_fetch_register): Updated to
951 make use of indirected transfer routines.
955 * gencode.c (process_instructions): Ensure FP ABS instruction
957 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
962 * interp.c (sim_do_command): Complain if callback structure not
967 * interp.c (Convert): Provide round-to-nearest and round-to-zero
968 support for Sun hosts.
969 * Makefile.in (gencode): Ensure the host compiler and libraries
970 used for cross-hosted build.
974 * interp.c, gencode.c: Some more (TODO) tidying.
978 * gencode.c, interp.c: Replaced explicit long long references with
979 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
980 * support.h (SET64LO, SET64HI): Macros added.
984 * configure: Regenerate with autoconf 2.7.
988 * interp.c (LoadMemory): Enclose text following #endif in /* */.
989 * support.h: Remove superfluous "1" from #if.
990 * support.h (CHECKSIM): Remove stray 'a' at end of line.
994 * interp.c (StoreFPR): Control UndefinedResult() call on
995 WARN_RESULT manifest.
999 * gencode.c: Tidied instruction decoding, and added FP instruction
1002 * interp.c: Added dineroIII, and BSD profiling support. Also
1003 run-time FP handling.
1007 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1008 gencode.c, interp.c, support.h: created.