3 * config/tc-i386.c (i386_error): Replace oprand_size_mismatch
4 with operand_size_mismatch.
5 (operand_size_match): Updated.
6 (match_template): Likewise.
10 * config/tc-i386.c (i386_error): New.
11 (_i386_insn): Replace err_msg with error.
12 (operand_size_match): Set error instead of err_msg on failure.
13 (operand_type_match): Likewise.
14 (operand_type_register_match): Likewise.
15 (VEX_check_operands): Likewise.
16 (match_template): Likewise. Use error instead of err_msg with
21 * config/tc-arm.c (make_mapping_symbol): Hanle the case
22 that two mapping symbols have the same value.
26 * doc/c-arm.texi (.setfp): Correct example.
31 * config/tc-arm.c (reloc_names): New relocation names.
32 (md_apply_fix): New case for BFD_RELOC_ARM_GOT_PREL.
33 (tc_gen_reloc): New case for BFD_RELOC_ARM_GOT_PREL.
34 * doc/c-arm.texi (ARM-Relocations): Document the new relocation.
38 * dw2gencfi.c (output_cie): Consider emitting the S augmentation in all
39 cases, and not only for .eh_frame.
41 * dw2gencfi.c (output_cie): Make it more explicit which code paths
42 belong to .eh_frame only.
46 * config/tc-v850.c (v850_insert_operand): Handle out-of-range
47 assembler constants on 64-bit hosts.
51 * bfin-defs.h, bfin-lex.l, bfin-parse.y, tc-bfin.c, tc-bfin.h:
52 Strip trailing whitespace.
56 * doc/c-bfin.texi (-mcpu): Add bf504 and bf506.
57 * config/tc-bfin.c (bfin_cpu_type): Add BFIN_CPU_BF504 and
59 (bfin_cpus[]): Add 0.0 for bf504 and bf506.
63 * doc/as.texinfo: Add Blackfin options.
64 * doc/c-bfin.texi: Document -mfdpic, -mno-fdpic and -mnopic.
65 * config/tc-bfin.c (md_show_usage): Show usage for all
66 Blackfin specific options.
71 * listing.c (listing_newline): Correct backslash quote logic.
75 * config/tc-i386.h [TE_SOLARIS] (ELF_TARGET_FORMAT): Define.
76 (ELF_TARGET_FORMAT64): Define.
80 * config/tc-arm.c (arm_cpu_option_table): Add cortex-m4.
84 * config/tc-sh.c (get_specific): Move overflow checking code to avoid
85 reading uninitialized data.
89 * config/tc-score7.c (s7_frag_check): Add ATTRIBUTE_UNUSED.
93 * configure.tgt: Fix mep cpu case.
97 * config/tc-arm.c (do_t_strexd): Remove
98 operand[1] != operand[2] contraint.
102 * config/tc-arm.c (neon_select_shape): No need to match
103 the remaining operands in the shape when one operand does
108 * config/tc-arm.c (do_neon_ld_st_interleave): Reject bad
113 * cgen.c: Whitespace fixes.
114 (weak_operand_overflow_check): Formatting fix.
118 * config/tc-i386.c (match_template): Update error messages.
122 * config/tc-i386.c (_i386_insn): Add err_msg.
123 (operand_size_match): Set err_msg on failure.
124 (operand_type_match): Likewise.
125 (operand_type_register_match): Likewise.
126 (VEX_check_operands): Likewise.
127 (match_template): Likewise. Use i.err_msg with as_bad.
131 * config/tc-mips.c (mips_fix_loongson2f, mips_fix_loongson2f_nop,
132 mips_fix_loongson2f_jump): New variables.
133 (md_longopts): Add New options -mfix-loongson2f-nop/jump,
134 -mno-fix-loongson2f-nop/jump.
135 (md_parse_option): Initialize variables via above options.
136 (options): New enums for the above options.
137 (md_begin): Initialize nop_insn from LOONGSON2F_NOP_INSN.
138 (fix_loongson2f, fix_loongson2f_nop, fix_loongson2f_jump):
140 (append_insn): call fix_loongson2f().
141 (mips_handle_align): Replace the implicit nops.
142 * config/tc-mips.h (MAX_MEM_FOR_RS_ALIGN_CODE): Modified
143 for the new mips_handle_align().
144 * doc/c-mips.texi: Document the new options.
148 * config/tc-arm.c (do_rd_rm_rn): Added warning
154 * config/tc-avr.c (md_apply_fix): Handle BFD_RELOC_8.
155 (avr_cons_fix_new): Handle fixups of a single byte.
160 * config/tc-arm.c (CPU_DEFAULT): Do not define based upon build
161 compiler's predefines.
165 * configure.tgt: Whiltespace. Sort moxie entry.
169 * config/tc-arm.c (arm_convert_symbolic_attribute): Add Tag_DIV_use.
170 * doc/c-arm.texi: Likewise.
174 * config/tc-arm.c (asm_opcode): operands type
176 (BAD_PC_ADDRESSING): New macro message.
177 (BAD_PC_WRITEBACK): Likewise.
178 (MIX_ARM_THUMB_OPERANDS): New macro.
179 (operand_parse_code): Added enum values.
180 (parse_operands): Added thumb/arm distinction,
181 plus new enum values handling.
182 (encode_arm_addr_mode_2): Validations enhanced.
183 (encode_arm_addr_mode_3): Likewise.
184 (do_rm_rd_rn): Likewise.
185 (encode_thumb32_addr_mode): Likewise.
186 (do_t_ldrex): Likewise.
187 (do_t_ldst): Likewise.
188 (do_t_strex): Likewise.
189 (md_assemble): Call parse_operands with
197 (insns): Updated insns operands.
202 * config/tc-ia64.c (enum reloc_func): Add FUNC_SLOTCOUNT_RELOC.
203 (DUMMY_RELOC_IA64_SLOTCOUNT): Added.
204 (pseudo_func): Add an entry for slotcount.
205 (md_begin): Initialize slotcount pseudo symbol.
206 (ia64_parse_name): Handle @slotcount parameter.
207 (ia64_gen_real_reloc_type): Handle slotcount.
208 (md_apply_fix): Ditto.
209 * doc/c-ia64.texi (IA-64-Relocs): Document @slotcount.
213 * config/tc-xtensa.c (istack_init): Don't call memset.
217 * config/tc-xtensa.c (cache_literal_section): Handle prefixes as
222 * config/tc-xtensa.c (xtensa_find_unaligned_loops): Rewrite.
226 * config/tc-i386.c (build_modrm_byte): Reformat.
230 * config/tc-i386.c: Update copyright.
235 * config/tc-i386.c (vec_imm4) New operand type.
237 (VEX_check_operands): New.
238 (check_reverse): Call VEX_check_operands.
239 (build_modrm_byte): Reintroduce code for 5
240 operand insns. Fix whitespace.
244 * config/tc-ppc.c (md_show_usage): Add -mpwr4, -mpwr5, -mpwr5x,
249 * config/tc-xtensa.c (RELAXED_LOOP_INSN_BYTES): New.
250 (next_frag_pre_opcode_bytes): Use RELAXED_LOOP_INSN_BYTES.
251 (xtensa_mark_zcl_first_insns): Rewrite to handle corner case.
255 * config/tc-arm.c (md_pcrel_from_section): Keep base to zero for
256 non-local branches (BFD_RELOC_THUMB_PCREL_BRANCH23,
257 BFD_RELOC_THUMB_PCREL_BLX, BFD_RELOC_ARM_PCREL_BLX,
258 BFD_RELOC_ARM_PCREL_CALL)
262 * config/tc-xtensa.c (frag_format_size): Generalize logic to
263 handle more instruction sizes and fetch widths.
264 (branch_align_power): Likewise.
265 (text_align_power): Likewise.
266 (bytes_to_stretch): Likewise.
270 * config/tc-ppc.c (md_show_usage): Mention -mtitan. Don't use tabs.
271 (ppc_mach): Handle titan.
272 * doc/c-ppc.texi: Mention -mtitan.
276 * config/tc-xtensa.c (UNREACHABLE_MAX_WIDTH): Delete and
278 (xtensa_fetch_width) ...this.
282 * Makefile.am (CPU_TYPES, OBJ_FORMATS, CPU_OBJ_VALID,
283 MULTI_CPU_TYPES, MULTI_CPU_OBJ_VALID): Remove.
284 * Makefile.in: Regenerate.
288 * config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1.
289 (i386_align_code): Rename PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1.
290 * config/tc-i386.h (processor_type): Same.
291 * doc/c-i386.texi: Change amdfam15 to bdver1.
296 * config/tc-arm.c (neon_check_type): Handle a neon_shape value of
301 * NEWS: Mention new feature.
302 * config/obj-coff.c (obj_coff_section): Accept digits and use
303 to override default section alignment power if specified.
304 * doc/as.texinfo (.section directive): Update documentation.
308 * config/tc-i386.c (avxscalar): New.
309 (OPTION_MAVXSCALAR): Likewise.
310 (build_vex_prefix): Select vector_length for scalar instructions
312 (md_longopts): Add OPTION_MAVXSCALAR.
313 (md_parse_option): Handle OPTION_MAVXSCALAR.
314 (md_show_usage): Add -mavxscalar=.
316 * doc/c-i386.texi: Document -mavxscalar=.
320 * config/tc-i386.c (build_vex_prefix): Set i.vex.bytes[0] to
325 * write.h (fix_at_start): Declare.
326 * write.c (fix_new_internal): Add at_beginning parameter.
327 Use it instead of REVERSE_SORT_RELOCS. Fix the handling of
328 seg_fix_tailP for the at_beginning/REVERSE_SORT_RELOCS case.
329 (fix_new, fix_new_exp): Update accordingly.
330 (fix_at_start): New function.
331 * config/tc-ppc.c (md_pseudo_table): Add .ref to the OBJ_XCOFF section.
332 (ppc_ref): New function, for OBJ_XCOFF.
333 (md_apply_fix): Handle BFD_RELOC_NONE for OBJ_XCOFF.
334 * config/te-i386aix.h (REVERSE_SORT_RELOCS): Remove #undef.
338 * config/te-solaris.h (DWARF2_EH_FRAME_READ_ONLY): Make read-only
339 on 64-bit Solaris/x86.
340 Include obj-format.h earlier.
344 * config/tc-s390.c (s390_elf_final_processing): New function.
345 * config/tc-s390.h (elf_tc_final_processing): New macro definition.
346 (s390_elf_final_processing): Added prototype.
352 * config/tc-arm.c (do_neon_cvt): Rename to do_neon_cvt_1. Add
353 code to handle round-to-zero for VCVT conversions.
354 (do_neon_cvt): New. Call do_neon_cvt_1.
355 (do_neon_cvtr): New. Call do_neon_cvt_1.
356 (insns): Use do_neon_cvt for VCVT insn and do_neon_cvtr for VCVTR
361 * config/tc-ia64.c (ia64_vms_note): Generate 24 bytes note headers.
365 * config/tc-i386.c (md_assemble): Before accessing the IMM field
366 check that it's not an XOP insn.
370 * config/bfin-aux.h: Remove argument names in function
372 * config/bfin-lex.l (parse_int): Fix shadowed variable name
374 * config/bfin-parse.y (value_match): Remove argument names
376 (notethat): Likewise.
381 * config/tc-arm.c (do_t_nop): Correct check for Thumb-2 NOP.
385 * config/tc-h8300.c (h8300_elf_section): New function - issue a
386 warning message if a new section is created without setting any
388 (md_pseudo_table): Intercept section creation pseudos.
389 (md_pcrel_from): Replace abort with an error message.
390 * config/obj-elf.c (obj_elf_section_name): Export this function.
391 * config/obj-elf.h (obj_elf_section_name): Prototype.
396 * listing.c (print_source): Add one to line number.
400 * Makefile.in: Regenerate.
401 * configure: Regenerate.
402 * doc/Makefile.in: Regenerate.
406 * version.c (parse_args): Change to "Copyright 2010".
410 * config/tc-i386.c (cpu_arch): Add amdfam15.
411 (i386_align_code): Add PROCESSOR_AMDFAM15 cases.
412 * config/tc-i386.h (processor_type): Add PROCESSOR_AMDFAM15.
413 * doc/c-i386.texi: Add amdfam15.
417 * config/tc-arm.c (do_neon_logic): Accept imm value
418 in the third operand too.
419 (operand_parse_code): OP_RNDQ_IMVNb renamed to
421 (parse_operands): OP_NILO case removed, applied renaming.
422 (insns): Neon shape changed for some logic instructions.
426 * config/tc-arm.c (do_neon_ldx_stx): Added
427 validation for vector load/store insns.
431 * config/tc-ppc.c (md_show_usage): Document -me500mc64.
435 * config/tc-arm.c (struct arm_it): New flag 'is_neon'.
436 (NEON_ENC_*): Macros renamed to _NEON_ENC_*.
437 (NEON_ENCODE): New macro.
438 (check_neon_suffixes): New macro.
439 (do_vfp_cond_or_thumb): Set the 'is_neon' flag.
440 (do_vfp_nsyn_opcode): Likewise.
441 (do_vfp_nsyn_nmul): Use the new 'NEON_ENCODE' macro.
442 (do_vfp_nsyn_cmp): Likewise.
443 (do_neon_shl_imm): Likewise.
444 (do_neon_qshl_imm): Likewise.
445 (neon_dyadic_misc): Likewise.
446 (do_neon_mac_maybe_scalar): Likewise.
447 (do_neon_qdmulh): Likewise.
448 (do_neon_qmovn): Likewise.
449 (do_neon_qmovun): Likewise.
450 (do_neon_movn): Likewise.
451 (neon_mac_reg_scalar_long): Likewise.
452 (do_neon_vmull): Likewise.
453 (do_neon_trn): Likewise.
454 (do_neon_ldx_stx): Likewise.
455 (neon_dp_fixup): Changed signature and set the flag.
456 (neon_three_same): Call the above with new signature.
457 (neon_two_same): Likewise.
458 (neon_imm_shift): Likewise.
459 (neon_mul_mac): Likewise.
460 (do_neon_abs_neg): Likewise.
461 (neon_mixed_length): Likewise.
462 (do_neon_ext): Likewise.
463 (do_neon_mov): Likewise.
464 (do_neon_tbl_tbx): Likewise.
465 (do_neon_logic): Likewise, and use the new 'NEON_ENCODE' macro.
466 (neon_compare): Likewise.
467 (do_neon_shll): Likewise.
468 (do_neon_cvt): Likewise.
469 (do_neon_mvn): Likewise.
470 (do_neon_dup): Likewise.
471 (md_assemble): Call check_neon_suffixes ().
473 For older changes see ChangeLog-2009
479 version-control: never