3 * config/tc-mips.c (reg_needs_delay): Move later in file.
5 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
18 * config/tc-i386-intel.c (O_zmmword_ptr): New.
19 (i386_types): Add zmmword.
20 (i386_intel_simplify_register): Allow regzmm.
21 (i386_intel_simplify): Handle zmmwords.
22 (i386_intel_operand): Handle RC/SAE, vector operations and
24 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
25 (struct RC_Operation): New.
26 (struct Mask_Operation): New.
27 (struct Broadcast_Operation): New.
28 (vex_prefix): Size of bytes increased to 4 to support EVEX
30 (enum i386_error): Add new error codes: unsupported_broadcast,
31 broadcast_not_on_src_operand, broadcast_needed,
32 unsupported_masking, mask_not_on_destination, no_default_mask,
33 unsupported_rc_sae, rc_sae_operand_not_last_imm,
34 invalid_register_operand, try_vector_disp8.
35 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
36 rounding, broadcast, memshift.
37 (struct RC_name): New.
41 (extra_symbol_chars): Add '{'.
42 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
43 (i386_operand_type): Add regzmm, regmask and vec_disp8.
44 (match_mem_size): Handle zmmwords.
45 (operand_type_match): Handle zmm-registers.
46 (mode_from_disp_size): Handle vec_disp8.
47 (fits_in_vec_disp8): New.
48 (md_begin): Handle {} properly.
49 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
50 (build_vex_prefix): Handle vrex.
51 (build_evex_prefix): New.
52 (process_immext): Adjust to properly handle EVEX.
53 (md_assemble): Add EVEX encoding support.
54 (swap_2_operands): Correctly handle operands with masking,
55 broadcasting or RC/SAE.
56 (check_VecOperands): Support EVEX features.
57 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
58 (match_template): Support regzmm and handle new error codes.
59 (process_suffix): Handle zmmwords and zmm-registers.
60 (check_byte_reg): Extend to zmm-registers.
61 (process_operands): Extend to zmm-registers.
62 (build_modrm_byte): Handle EVEX.
63 (output_insn): Adjust to properly handle EVEX case.
64 (disp_size): Handle vec_disp8.
65 (output_disp): Support compressed disp8*N evex feature.
66 (output_imm): Handle RC/SAE immediates properly.
67 (check_VecOperations): New.
68 (i386_immediate): Handle EVEX features.
69 (i386_index_check): Handle zmmwords and zmm-registers.
70 (RC_SAE_immediate): New.
71 (i386_att_operand): Handle EVEX features.
72 (parse_real_register): Add a check for ZMM/Mask registers.
73 (OPTION_MEVEXLIG): New.
74 (OPTION_MEVEXWIG): New.
75 (md_longopts): Add mevexlig and mevexwig.
76 (md_parse_option): Handle mevexlig and mevexwig options.
77 (md_show_usage): Add description for mevexlig and mevexwig.
78 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
79 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
83 * config/tc-i386.c (cpu_arch): Add .sha.
84 * doc/c-i386.texi: Document sha/.sha.
90 * config/tc-i386.c (BND_PREFIX): New.
91 (struct _i386_insn): Add new field bnd_prefix.
92 (add_bnd_prefix): New.
94 (i386_operand_type): Add regbnd.
95 (md_assemble): Handle BND prefixes.
96 (parse_insn): Likewise.
97 (output_branch): Likewise.
98 (output_jump): Likewise.
99 (build_modrm_byte): Handle regbnd.
100 (OPTION_MADD_BND_PREFIX): New.
101 (md_longopts): Add entry for 'madd-bnd-prefix'.
102 (md_parse_option): Handle madd-bnd-prefix option.
103 (md_show_usage): Add description for madd-bnd-prefix
105 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
109 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
114 * config/tc-s390.c (s390_machine): Don't force the .machine
115 argument to lower case.
119 * config/tc-arm.c (s_arm_arch_extension): Improve error message
120 for invalid extension.
124 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
125 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
126 (aarch64_abi): New variable.
127 (ilp32_p): Change to be a macro.
128 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
129 (struct aarch64_option_abi_value_table): New struct.
130 (aarch64_abis): New table.
131 (aarch64_parse_abi): New function.
132 (aarch64_long_opts): Add entry for -mabi=.
133 * doc/as.texinfo (Target AArch64 options): Document -mabi.
134 * doc/c-aarch64.texi: Likewise.
138 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
143 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
145 * config/rx-parse.y: (rx_check_float_support): Add function to
146 check floating point operation support for target RX100 and
148 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
149 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
150 RX200, RX600, and RX610
154 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
158 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
159 * doc/c-avr.texi: Likewise.
163 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
164 error with older GCCs.
165 (mips16_macro_build): Dereference args.
169 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
170 New functions, split out from...
171 (reg_lookup): ...here. Remove itbl support.
172 (reglist_lookup): Delete.
173 (mips_operand_token_type): New enum.
174 (mips_operand_token): New structure.
175 (mips_operand_tokens): New variable.
176 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
177 (mips_parse_arguments): New functions.
178 (md_begin): Initialize mips_operand_tokens.
179 (mips_arg_info): Add a token field. Remove optional_reg field.
180 (match_char, match_expression): New functions.
181 (match_const_int): Use match_expression. Remove "s" argument
182 and return a boolean result. Remove O_register handling.
183 (match_regno, match_reg, match_reg_range): New functions.
184 (match_int_operand, match_mapped_int_operand, match_msb_operand)
185 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
186 (match_addiusp_operand, match_clo_clz_dest_operand)
187 (match_lwm_swm_list_operand, match_entry_exit_operand)
188 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
189 (match_tied_reg_operand): Remove "s" argument and return a boolean
190 result. Match tokens rather than text. Update calls to
191 match_const_int. Rely on match_regno to call check_regno.
192 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
193 "arg" argument. Return a boolean result.
194 (parse_float_constant): Replace with...
195 (match_float_constant): ...this new function.
196 (match_operand): Remove "s" argument and return a boolean result.
197 Update calls to subfunctions.
198 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
199 rather than string-parsing routines. Update handling of optional
200 registers for token scheme.
204 * config/tc-mips.c (parse_float_constant): Split out from...
209 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
214 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
215 (match_entry_exit_operand): New function.
216 (match_save_restore_list_operand): Likewise.
217 (match_operand): Use them.
218 (check_absolute_expr): Delete.
219 (mips16_ip): Rewrite main parsing loop to use mips_operands.
223 * config/tc-mips.c: Enable functions commented out in previous patch.
224 (SKIP_SPACE_TABS): Move further up file.
225 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
226 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
227 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
228 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
229 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
230 (micromips_imm_b_map, micromips_imm_c_map): Delete.
231 (mips_lookup_reg_pair): Delete.
232 (macro): Use report_bad_range and report_bad_field.
233 (mips_immed, expr_const_in_range): Delete.
234 (mips_ip): Rewrite main parsing loop to use new functions.
238 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
239 Change return type to bfd_boolean.
240 (report_bad_range, report_bad_field): New functions.
241 (mips_arg_info): New structure.
242 (match_const_int, convert_reg_type, check_regno, match_int_operand)
243 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
244 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
245 (match_addiusp_operand, match_clo_clz_dest_operand)
246 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
247 (match_pc_operand, match_tied_reg_operand, match_operand)
248 (check_completed_insn): New functions, commented out for now.
252 * config/tc-mips.c (insn_insert_operand): New function.
253 (macro_build, mips16_macro_build): Put null character check
254 in the for loop and convert continues to breaks. Use operand
255 structures to handle constant operands.
259 * config/tc-mips.c (validate_mips_insn): Move further up file.
260 Add insn_bits and decode_operand arguments. Use the mips_operand
261 fields to work out which bits an operand occupies. Detect double
263 (validate_micromips_insn): Move further up file. Call into
268 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
272 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
274 (macro): Update accordingly.
278 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
280 (md_assemble): Remove imm_reloc handling.
281 (mips_ip): Update commentary. Use offset_expr and offset_reloc
282 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
283 Use a temporary array rather than imm_reloc when parsing
284 constant expressions. Remove imm_reloc initialization.
285 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
286 for the relaxable field. Use a relax_char variable to track the
287 type of this field. Remove imm_reloc initialization.
291 * config/tc-mips.c (mips16_ip): Handle "I".
295 * config/tc-mips.c (mips_flag_nan2008): New variable.
296 (options): Add OPTION_NAN enum value.
297 (md_longopts): Handle it.
298 (md_parse_option): Likewise.
299 (s_nan): New function.
300 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
301 (md_show_usage): Add -mnan.
303 * doc/as.texinfo (Overview): Add -mnan.
304 * doc/c-mips.texi (MIPS Opts): Document -mnan.
305 (MIPS NaN Encodings): New node. Document .nan directive.
306 (MIPS-Dependent): List the new node.
310 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
314 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
315 for 'A' and assume that the constant has been elided if the result
320 * config/tc-mips.c (gprel16_reloc_p): New function.
321 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
323 (offset_high_part, small_offset_p): New functions.
324 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
325 register load and store macros, handle the 16-bit offset case first.
326 If a 16-bit offset is not suitable for the instruction we're
327 generating, load it into the temporary register using
328 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
329 M_L_DAB code once the address has been constructed. For double load
330 and store macros, again handle the 16-bit offset case first.
331 If the second register cannot be accessed from the same high
332 part as the first, load it into AT using ADDRESS_ADDI_INSN.
333 Fix the handling of LD in cases where the first register is the
334 same as the base. Also handle the case where the offset is
335 not 16 bits and the second register cannot be accessed from the
336 same high part as the first. For unaligned loads and stores,
337 fuse the offbits == 12 and old "ab" handling. Apply this handling
338 whenever the second offset needs a different high part from the first.
339 Construct the offset using ADDRESS_ADDI_INSN where possible,
340 for offbits == 16 as well as offbits == 12. Use offset_reloc
341 when constructing the individual loads and stores.
342 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
343 and offset_reloc before matching against a particular opcode.
344 Handle elided 'A' constants. Allow 'A' constants to use
345 relocation operators.
349 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
350 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
351 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
355 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
356 Require the msb to be <= 31 for "+s". Check that the size is <= 31
357 for both "+s" and "+S".
361 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
362 (mips_ip, mips16_ip): Handle "+i".
366 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
367 (micromips_to_32_reg_h_map): Rename to...
368 (micromips_to_32_reg_h_map1): ...this.
369 (micromips_to_32_reg_i_map): Rename to...
370 (micromips_to_32_reg_h_map2): ...this.
371 (mips_lookup_reg_pair): New function.
372 (gpr_write_mask, macro): Adjust after above renaming.
373 (validate_micromips_insn): Remove "mi" handling.
374 (mips_ip): Likewise. Parse both registers in a pair for "mh".
378 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
379 (mips_ip): Remove "+D" and "+T" handling.
383 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
388 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
392 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
393 (aarch64_force_relocation): Likewise.
397 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
401 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
402 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
403 Replace @sc{mips16} with literal `MIPS16'.
404 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
408 * config/tc-aarch64.c (reloc_table): Replace
409 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
410 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
411 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
412 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
413 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
414 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
415 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
416 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
417 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
418 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
419 (aarch64_force_relocation): Likewise.
423 * config/tc-aarch64.c (ilp32_p): New static variable.
424 (elf64_aarch64_target_format): Return the target according to the
426 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
427 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
428 (aarch64_dwarf2_addr_size): New function.
429 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
430 (DWARF2_ADDR_SIZE): New define.
434 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
438 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
442 * config/tc-mips.c (mips_set_options): Add insn32 member.
443 (mips_opts): Initialize it.
444 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
445 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
446 (md_longopts): Add "minsn32" and "mno-insn32" options.
447 (is_size_valid): Handle insn32 mode.
448 (md_assemble): Pass instruction string down to macro.
449 (brk_fmt): Add second dimension and insn32 mode initializers.
450 (mfhl_fmt): Likewise.
451 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
452 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
453 (macro_build_jalr, move_register): Handle insn32 mode.
454 (macro_build_branch_rs): Likewise.
455 (macro): Handle insn32 mode.
456 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
457 (mips_ip): Handle insn32 mode.
458 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
459 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
460 (mips_handle_align): Handle insn32 mode.
461 (md_show_usage): Add -minsn32 and -mno-insn32.
463 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
465 (-minsn32, -mno-insn32): New options.
466 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
468 (MIPS assembly options): New node. Document .set insn32 and
470 (MIPS-Dependent): List the new node.
474 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
475 the PC in indirect addressing on 430xv2 parts.
476 (msp430_operands): Add version test to hardware bug encoding
481 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
482 so it skips whitespace before it.
483 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
485 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
486 (arm_reg_parse_multi): Skip whitespace first.
487 (parse_reg_list): Likewise.
488 (parse_vfp_reg_list): Likewise.
489 (s_arm_unwind_save_mmxwcg): Likewise.
494 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
498 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
502 * config/tc-mips.c: Assert that offsetT and valueT are at least
504 (GPR_SMIN, GPR_SMAX): New macros.
505 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
509 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
510 conditions. Remove any code deselected by them.
511 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
515 * NEWS: Note removal of ECOFF support.
516 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
517 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
518 (MULTI_CFILES): Remove config/e-mipsecoff.c.
519 * Makefile.in: Regenerate.
520 * configure.in: Remove MIPS ECOFF references.
521 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
523 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
524 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
525 (mips-*-*): ...this single case.
526 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
527 MIPS emulations to be e-mipself*.
528 * configure: Regenerate.
529 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
530 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
531 (mips-*-sysv*): Remove coff and ecoff cases.
532 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
533 * ecoff.c: Remove reference to MIPS ECOFF.
534 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
535 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
536 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
537 (mips_hi_fixup): Tweak comment.
538 (append_insn): Require a howto.
539 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
543 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
544 Use "CPU" instead of "cpu".
545 * doc/c-mips.texi: Likewise.
546 (MIPS Opts): Rename to MIPS Options.
547 (MIPS option stack): Rename to MIPS Option Stack.
548 (MIPS ASE instruction generation overrides): Rename to
549 MIPS ASE Instruction Generation Overrides (for now).
550 (MIPS floating-point): Rename to MIPS Floating-Point.
554 * doc/c-mips.texi (MIPS Macros): New section.
555 (MIPS Object): Replace with...
556 (MIPS Small Data): ...this new section.
560 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
561 Capitalize name. Use @kindex instead of @cindex for .set entries.
565 * doc/c-mips.texi (MIPS Stabs): Remove section.
569 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
570 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
571 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
572 (ISA_SUPPORTS_VIRT64_ASE): Delete.
573 (mips_ase): New structure.
574 (mips_ases): New table.
575 (FP64_ASES): New macro.
576 (mips_ase_groups): New array.
577 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
578 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
580 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
581 (md_parse_option): Use mips_ases and mips_set_ase instead of
582 separate case statements for each ASE option.
583 (mips_after_parse_args): Use FP64_ASES. Use
584 mips_check_isa_supports_ases to check the ASEs against
586 (s_mipsset): Use mips_ases and mips_set_ase instead of
587 separate if statements for each ASE option. Use
588 mips_check_isa_supports_ases, even when a non-ASE option
593 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
597 * config/tc-mips.c (md_shortopts, options, md_longopts)
598 (md_longopts_size): Move earlier in file.
602 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
603 with a single "ase" bitmask.
604 (mips_opts): Update accordingly.
605 (file_ase, file_ase_explicit): New variables.
606 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
607 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
608 (ISA_HAS_ROR): Adjust for mips_set_options change.
609 (is_opcode_valid): Take the base ase mask directly from mips_opts.
610 (mips_ip): Adjust for mips_set_options change.
611 (md_parse_option): Likewise. Update file_ase_explicit.
612 (mips_after_parse_args): Adjust for mips_set_options change.
613 Use bitmask operations to select the default ASEs. Set file_ase
614 rather than individual per-ASE variables.
615 (s_mipsset): Adjust for mips_set_options change.
616 (mips_elf_final_processing): Test file_ase rather than
617 file_ase_mdmx. Remove commented-out code.
621 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
622 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
623 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
624 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
625 (mips_after_parse_args): Use the new "ase" field to choose
627 (mips_cpu_info_table): Move ASEs from the "flags" field to the
632 * config/tc-arm.c (symbol_preemptible): New function.
633 (relax_branch): Use it.
639 * config/tc-mips.c (mips_set_options): Add ase_eva.
640 (mips_set_options mips_opts): Add ase_eva.
641 (file_ase_eva): Declare.
642 (ISA_SUPPORTS_EVA_ASE): Define.
643 (IS_SEXT_9BIT_NUM): Define.
644 (MIPS_CPU_ASE_EVA): Define.
645 (is_opcode_valid): Add support for ase_eva.
646 (macro_build): Likewise.
648 (validate_mips_insn): Likewise.
649 (validate_micromips_insn): Likewise.
651 (options): Add OPTION_EVA and OPTION_NO_EVA.
652 (md_longopts): Add -meva and -mno-eva.
653 (md_parse_option): Process new options.
654 (mips_after_parse_args): Check for valid EVA combinations.
655 (s_mipsset): Likewise.
659 * dwarf2dbg.h (dwarf2_move_insn): Declare.
660 * dwarf2dbg.c (line_subseg): Add pmove_tail.
661 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
662 (dwarf2_gen_line_info_1): Update call accordingly.
663 (dwarf2_move_insn): New function.
664 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
673 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
674 (dwarf2_gen_line_info_1): Delete.
675 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
676 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
677 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
678 (dwarf2_directive_loc): Push previous .locs instead of generating
683 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
684 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
689 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
690 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
691 function. Generates an error if the adjusted offset is out of a
696 * config/tc-nios2.c (md_apply_fix): Mask constant
697 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
701 * config/tc-mips.c (append_insn): Don't do branch relaxation for
702 MIPS-3D instructions either.
703 (md_convert_frag): Update the COPx branch mask accordingly.
705 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
707 * doc/as.texinfo (Overview): Add --relax-branch and
709 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
714 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
719 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
720 (is_opcode_valid_16): Pass ase value to opcode_is_member.
721 (append_insn): Change INSN_xxxx to ASE_xxxx.
725 * gas/config/tc-avr.c: Change ISA for devices with USB support to
730 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
736 * config/tc-mips.c (s_ehword): New.
740 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
744 * write.c (resolve_reloc_expr_symbols): On REL targets don't
745 convert relocs who have no relocatable field either. Rephrase
746 the conditional so that the PC-relative check is only applied
751 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
756 * config/tc-aarch64.c (reloc_table): Update to use
757 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
758 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
759 (md_apply_fix): Likewise.
760 (aarch64_force_relocation): Likewise.
764 * config/tc-arm.c (it_fsm_post_encode): Improve
765 warning messages about deprecated IT block formats.
769 * config/tc-aarch64.c (md_apply_fix): Move value range checking
770 inside fx_done condition.
774 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
778 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
779 and clean up warning when using PRINT_OPCODE_TABLE.
783 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
784 and data fixups performing shift/high adjust/sign extension on
785 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
786 when writing data fixups rather than recalculating size.
790 * doc/c-msp430.texi: Fix typo.
794 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
795 are also TOC symbols.
799 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
800 Add -mcpu command to specify core type.
801 * doc/c-msp430.texi: Update documentation.
805 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
806 (mips_opts): Update for the new field.
807 (file_ase_virt): New variable.
808 (ISA_SUPPORTS_VIRT_ASE): New macro.
809 (ISA_SUPPORTS_VIRT64_ASE): New macro.
810 (MIPS_CPU_ASE_VIRT): New define.
811 (is_opcode_valid): Handle ase_virt.
812 (macro_build): Handle "+J".
813 (validate_mips_insn): Likewise.
815 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
816 (md_longopts): Add mvirt and mnovirt
817 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
818 (mips_after_parse_args): Handle ase_virt field.
819 (s_mipsset): Handle "virt" and "novirt".
820 (mips_elf_final_processing): Add a comment about virt ASE might need
822 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
823 * doc/c-mips.texi: Document -mvirt and -mno-virt.
824 Document ".set virt" and ".set novirt".
828 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
829 control of operand flag bits.
833 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
834 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
835 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
836 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
837 (md_apply_fix): Set fx_no_overflow for assorted relocations.
838 Shift and sign-extend fieldval for use by some VLE reloc
839 operand->insert functions.
844 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
845 (limited_pcrel_reloc_p): Likewise.
846 (md_apply_fix): Likewise.
847 (tc_gen_reloc): Likewise.
851 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
852 (mips_fix_adjustable): Adjust pc-relative check to use
857 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
858 (s_mips_stab): Do not restrict to stabn only.
862 * config/tc-msp430.c: Add support for the MSP430X architecture.
863 Add code to insert a NOP instruction after any instruction that
864 might change the interrupt state.
865 Add support for the LARGE memory model.
866 Add code to initialise the .MSP430.attributes section.
867 * config/tc-msp430.h: Add support for the MSP430X architecture.
868 * doc/c-msp430.texi: Document the new -mL and -mN command line
870 * NEWS: Mention support for the MSP430X architecture.
874 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
875 alpha*-*-linux*ecoff*.
879 * config/tc-mips.c (mips_ip): Add sizelo.
880 For "+C", "+G", and "+H", set sizelo and compare against it.
884 * as.c (Options): Add -gdwarf-sections.
885 (parse_args): Likewise.
886 * as.h (flag_dwarf_sections): Declare.
887 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
888 (process_entries): When -gdwarf-sections is enabled generate
889 fragmentary .debug_line sections.
890 (out_debug_line): Set the section for the .debug_line section end
892 * doc/as.texinfo: Document -gdwarf-sections.
893 * NEWS: Mention -gdwarf-sections.
897 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
898 according to the target parameter. Don't call s_segm since s_segm
899 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
901 (md_begin): Call s_segm according to target parameter from command
906 * configure.in: Allow little-endian linux.
907 * configure: Regenerate.
911 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
912 "fstatus" control register to "eccinj".
916 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
920 * expr.c (add_to_result, subtract_from_result): Make global.
921 * expr.h (add_to_result, subtract_from_result): Add prototypes.
922 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
923 subtract_from_result to handle extra bit of precision for .sleb128
928 * read.c (convert_to_bignum): Add sign parameter. Use it
929 instead of X_unsigned to determine sign of resulting bignum.
930 (emit_expr): Pass extra argument to convert_to_bignum.
931 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
932 X_extrabit to convert_to_bignum.
933 (parse_bitfield_cons): Set X_extrabit.
934 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
935 Initialise X_extrabit field as appropriate.
936 (add_to_result): New.
937 (subtract_from_result): New.
939 * expr.h (expressionS): Add X_extrabit field.
943 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
944 register being PC when is_t or writeback, and use distinct
945 diagnostic for the latter case.
949 * gas/config/tc-arm.c (parse_operands): Re-write
951 (do_barrier): Remove bogus constraint().
952 (do_t_barrier): Remove.
956 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
957 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
959 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
963 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
964 Use local variable Rt in more places.
965 (do_vmsr): Accept all control registers.
969 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
970 if there was none specified for moves between scalar and core
975 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
980 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
985 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
990 * doc/as.texinfo: Add support to generate man options for h8300.
991 * doc/c-h8300.texi: Likewise.
995 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1001 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1006 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1007 start of the file each time.
1010 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1015 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1020 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1021 pc-relative str instructions in Thumb mode.
1025 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1026 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1028 * config/tc-h8300.h: Remove duplicated defines.
1033 * tc-avr.c (mcu_has_3_byte_pc): New function.
1034 (tc_cfi_frame_initial_instructions): Call it to find return
1040 * config/tc-tic6x.c (tic6x_try_encode): Handle
1041 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1042 encode register pair numbers when required.
1046 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1047 in vstr in Thumb mode for pre-ARMv7 cores.
1051 * doc/c-arc.texi (ARC Directives): Revert last change and use
1052 @itemize instead of @table.
1053 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1058 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1059 NULL message, instead just check ARM_CPU_IS_ANY directly.
1064 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1066 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1067 to the @item directives.
1068 (ARM-Neon-Alignment): Move to correct place in the document.
1069 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1071 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1076 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1077 case. Add default BAD_CASE to switch.
1081 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1082 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1086 * config/tc-arm.c (crc_ext_armv8): New feature set.
1087 (UNPRED_REG): New macro.
1088 (do_crc32_1): New function.
1089 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1090 do_crc32ch, do_crc32cw): Likewise.
1092 (insns): Add entries for crc32 mnemonics.
1093 (arm_extensions): Add entry for crc.
1097 * write.h (struct fix): Add fx_dot_frag field.
1098 (dot_frag): Declare.
1099 * write.c (dot_frag): New variable.
1100 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1101 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1102 * expr.c (expr): Save value of frag_now in dot_frag when setting
1104 * read.c (emit_expr): Likewise. Delete comments.
1108 * config/tc-i386.c (flag_code_names): Removed.
1109 (i386_index_check): Rewrote.
1113 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1115 (aarch64_double_precision_fmovable): New function.
1116 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1117 function; handle hexadecimal representation of IEEE754 encoding.
1118 (parse_operands): Update the call to parse_aarch64_imm_float.
1122 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1123 (check_hle): Updated.
1124 (md_assemble): Likewise.
1125 (parse_insn): Likewise.
1129 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1130 (md_assemble): Check if REP prefix is OK.
1131 (parse_insn): Remove expecting_string_instruction. Set
1136 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1140 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1141 for system registers.
1145 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1146 (rl78_op): Handle %code().
1147 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1148 (tc_gen_reloc): Likwise; convert to a computed reloc.
1149 (md_apply_fix): Likewise.
1153 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1157 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1158 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1159 list of accepted CPUs.
1164 * config/tc-i386.c (cpu_arch): Add ".smap".
1166 * doc/c-i386.texi: Document smap.
1170 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1171 mips_assembling_insn appropriately.
1172 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1176 * config/tc-mips.c (append_insn): Correct indentation, remove
1181 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1185 * configure.tgt: Add nios2-*-rtems*.
1189 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1194 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1195 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1199 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1205 Based on patches from Altera Corporation.
1207 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1208 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1209 * Makefile.in: Regenerated.
1210 * configure.tgt: Add case for nios2*-linux*.
1211 * config/obj-elf.c: Conditionally include elf/nios2.h.
1212 * config/tc-nios2.c: New file.
1213 * config/tc-nios2.h: New file.
1214 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1215 * doc/Makefile.in: Regenerated.
1216 * doc/all.texi: Set NIOSII.
1217 * doc/as.texinfo (Overview): Add Nios II options.
1218 (Machine Dependencies): Include c-nios2.texi.
1219 * doc/c-nios2.texi: New file.
1220 * NEWS: Note Altera Nios II support.
1225 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1226 Don't skip fixups with fx_subsy non-NULL.
1227 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1228 with fx_subsy non-NULL.
1232 * doc/c-metag.texi: Add "@c man" markers.
1236 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1238 (TC_ADJUST_RELOC_COUNT): Delete.
1239 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1243 * po/POTFILES.in: Regenerate.
1247 * config/tc-metag.c: Make SWAP instruction less permissive with
1252 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1253 relocs in .word/.etc statements.
1257 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1258 immediate value for 8-bit offset" error so it shows line info.
1262 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1267 * config/tc-v850.c: Add support for e3v5 architecture.
1268 * doc/c-v850.texi: Mention new support.
1273 * config/tc-avr.c: Include dwarf2dbg.h.
1277 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1278 (tc_i386_fix_adjustable): Likewise.
1279 (lex_got): Likewise.
1280 (tc_gen_reloc): Likewise.
1284 * config/tc-aarch64.c (output_operand_error_record): Change to output
1285 the out-of-range error message as value-expected message if there is
1286 only one single value in the expected range.
1287 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1288 LSL #0 as a programmer-friendly feature.
1292 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1293 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1294 BFD_RELOC_64_SIZE relocations.
1295 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1297 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1298 relocations against local symbols.
1302 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1303 finding some sort of toc syntax error, and break to avoid
1304 compiler uninit warning.
1309 * config/tc-i386.c (lex_got): Increment length by 1 if the
1310 relocation token is removed.
1314 * config/tc-v850.c (md_assemble): Allow signed values for
1319 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1324 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1325 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1326 * config/tc-ppc.c (md_show_usage): Likewise.
1327 (ppc_handle_align): Handle power8's group ending nop.
1331 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1332 that the assember exits after the opcodes have been printed.
1336 * app.c: Remove trailing white spaces.
1340 * dw2gencfi.c: Likewise.
1341 * dwarf2dbg.h: Likewise.
1342 * ecoff.c: Likewise.
1343 * input-file.c: Likewise.
1344 * itbl-lex.h: Likewise.
1345 * output-file.c: Likewise.
1348 * subsegs.c: Likewise.
1349 * symbols.c: Likewise.
1350 * write.c: Likewise.
1351 * config/tc-i386.c: Likewise.
1352 * doc/Makefile.am: Likewise.
1353 * doc/Makefile.in: Likewise.
1354 * doc/c-aarch64.texi: Likewise.
1355 * doc/c-alpha.texi: Likewise.
1356 * doc/c-arc.texi: Likewise.
1357 * doc/c-arm.texi: Likewise.
1358 * doc/c-avr.texi: Likewise.
1359 * doc/c-bfin.texi: Likewise.
1360 * doc/c-cr16.texi: Likewise.
1361 * doc/c-d10v.texi: Likewise.
1362 * doc/c-d30v.texi: Likewise.
1363 * doc/c-h8300.texi: Likewise.
1364 * doc/c-hppa.texi: Likewise.
1365 * doc/c-i370.texi: Likewise.
1366 * doc/c-i386.texi: Likewise.
1367 * doc/c-i860.texi: Likewise.
1368 * doc/c-m32c.texi: Likewise.
1369 * doc/c-m32r.texi: Likewise.
1370 * doc/c-m68hc11.texi: Likewise.
1371 * doc/c-m68k.texi: Likewise.
1372 * doc/c-microblaze.texi: Likewise.
1373 * doc/c-mips.texi: Likewise.
1374 * doc/c-msp430.texi: Likewise.
1375 * doc/c-mt.texi: Likewise.
1376 * doc/c-s390.texi: Likewise.
1377 * doc/c-score.texi: Likewise.
1378 * doc/c-sh.texi: Likewise.
1379 * doc/c-sh64.texi: Likewise.
1380 * doc/c-tic54x.texi: Likewise.
1381 * doc/c-tic6x.texi: Likewise.
1382 * doc/c-v850.texi: Likewise.
1383 * doc/c-xc16x.texi: Likewise.
1384 * doc/c-xgate.texi: Likewise.
1385 * doc/c-xtensa.texi: Likewise.
1386 * doc/c-z80.texi: Likewise.
1387 * doc/internals.texi: Likewise.
1391 * hash.c (hash_new_sized): Make it global.
1392 * hash.h: Declare it.
1393 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1398 * Makefile.am: Add Meta.
1399 * Makefile.in: Regenerate.
1400 * config/tc-metag.c: New file.
1401 * config/tc-metag.h: New file.
1402 * configure.tgt: Add Meta.
1403 * doc/Makefile.am: Add Meta.
1404 * doc/Makefile.in: Regenerate.
1405 * doc/all.texi: Add Meta.
1406 * doc/as.texiinfo: Document Meta options.
1407 * doc/c-metag.texi: New file.
1411 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1413 * config/tc-mips.c (internalError): Remove, replace with abort.
1417 * config/tc-aarch64.c (parse_operands): Change to compare the result
1418 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1423 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1424 anticipated character.
1425 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1426 here as it is no longer needed.
1430 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1431 * doc/c-score.texi (SCORE-Opts): Likewise.
1432 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1436 * config/tc-mips.c: Add support for MIPS r5900.
1437 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1439 (can_swap_branch_p, get_append_method): Detect some conditional
1440 short loops to fix a bug on the r5900 by NOP in the branch delay
1442 (M_MUL): Support 3 operands in multu on r5900.
1443 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1444 (s_mipsset): Force 32 bit floating point on r5900.
1445 (mips_ip): Check parameter range of instructions mfps and mtps on
1447 * configure.in: Detect CPU type when target string contains r5900
1448 (e.g. mips64r5900el-linux-gnu).
1452 * as.c (parse_args): Update copyright year to 2013.
1456 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1462 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1465 For older changes see ChangeLog-2012
1467 Copyright (C) 2013 Free Software Foundation, Inc.
1469 Copying and distribution of this file, with or without modification,
1470 are permitted in any medium without royalty provided the copyright
1471 notice and this notice are preserved.
1477 version-control: never