1 /* m68k.c All the m68020 specific stuff in one convenient, huge,
2 slow to compile, easy to find file.
3 Copyright (C) 1987, 1991 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
27 /* note that this file includes real declarations and thus can only be included by one source file per executable. */
28 #include "m68k-opcode.h"
30 /* This variable contains the value to write out at the beginning of
31 the a.out file. The 2<<16 means that this is a 68020 file instead
32 of an old-style 68000 file */
34 long omagic = 2<<16|OMAGIC; /* Magic byte for header file */
39 /* This array holds the chars that always start a comment. If the
40 pre-processor is disabled, these aren't very useful */
41 const char comment_chars[] = "|";
43 /* This array holds the chars that only start a comment at the beginning of
44 a line. If the line seems to have the form '# 123 filename'
45 .line and .file directives will appear in the pre-processed output */
46 /* Note that input_file.c hand checks for '#' at the beginning of the
47 first line of the input file. This is because the compiler outputs
48 #NO_APP at the beginning of its output. */
49 /* Also note that comments like this one will always work. */
50 const char line_comment_chars[] = "#";
52 /* Chars that can be used to separate mant from exp in floating point nums */
53 const char EXP_CHARS[] = "eE";
55 /* Chars that mean this number is a floating point constant */
59 const char FLT_CHARS[] = "rRsSfFdDxXeEpP";
61 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
62 changed in read.c . Ideally it shouldn't have to know about it at all,
63 but nothing is ideal around here.
66 int md_reloc_size = 8; /* Size of relocation record */
68 /* Its an arbitrary name: This means I don't approve of it */
69 /* See flames below */
70 static struct obstack robyn;
72 #define TAB(x,y) (((x)<<2)+(y))
73 #define TABTYPE(xy) ((xy) >> 2)
86 /* Operands we can parse: (And associated modes)
92 reg: address or data register
93 areg: address register
94 apc: address register, PC, ZPC or empty string
97 sz: w or l if omitted, l assumed
98 scale: 1 2 4 or 8 if omitted, 1 assumed
100 7.4 IMMED #num --> NUM
101 0.? DREG dreg --> dreg
102 1.? AREG areg --> areg
103 2.? AINDR areg@ --> *(areg)
104 3.? AINC areg@+ --> *(areg++)
105 4.? ADEC areg@- --> *(--areg)
106 5.? AOFF apc@(numw) --> *(apc+numw) -- empty string and ZPC not allowed here
107 6.? AINDX apc@(num,reg:sz:scale) --> *(apc+num+reg*scale)
108 6.? AINDX apc@(reg:sz:scale) --> same, with num=0
109 6.? APODX apc@(num)@(num2,reg:sz:scale) --> *(*(apc+num)+num2+reg*scale)
110 6.? APODX apc@(num)@(reg:sz:scale) --> same, with num2=0
111 6.? AMIND apc@(num)@(num2) --> *(*(apc+num)+num2) (previous mode without an index reg)
112 6.? APRDX apc@(num,reg:sz:scale)@(num2) --> *(*(apc+num+reg*scale)+num2)
113 6.? APRDX apc@(reg:sz:scale)@(num2) --> same, with num=0
114 7.0 ABSL num:sz --> *(num)
115 num --> *(num) (sz L assumed)
116 *** MSCR otherreg --> Magic
118 5.? AOFF apc@(num) --> *(apc+num) -- empty string and ZPC not allowed here still
128 a1@(5,d2:w:1) @(45,d6:l:4)
133 #name@(numw) -->turn into PC rel mode
134 apc@(num8,reg:sz:scale) --> *(apc+num8+reg*scale)
160 short e_siz; /* 0== default 1==short/byte 2==word 3==long */
163 /* DATA and ADDR have to be contiguous, so that reg-DATA gives 0-7==data reg,
164 8-15==addr reg for operands that take both types */
167 DATA = 1, /* 1- 8 == data registers 0-7 */
187 /* Note that COPNUM==processor #1 -- COPNUM+7==#8, which stores as 000 */
192 FPREG, /* Eight FP registers */
201 COPNUM = (FPREG+8), /* Co-processor #1-#8 */
210 PC, /* Program counter */
211 ZPC, /* Hack for Program space, but 0 addressing */
213 CCR, /* Condition code Reg */
215 /* These have to be in order for the movec instruction to work. */
216 USP, /* User Stack Pointer */
217 ISP, /* Interrupt stack pointer */
232 /* end of movec ordering constraints */
265 IC, /* instruction cache token */
266 DC, /* data cache token */
267 NC, /* no cache token */
268 BC, /* both caches token */
272 /* Internal form of an operand. */
274 char *error; /* Couldn't parse it */
275 enum operand_type mode; /* What mode this instruction is in. */
276 enum _register reg; /* Base register */
277 struct m68k_exp *con1;
278 int ireg; /* Index register */
279 int isiz; /* 0==unspec 1==byte(?) 2==short 3==long */
280 int imul; /* Multipy ireg by this (1,2,4,or 8) */
281 struct m68k_exp *con2;
284 /* internal form of a 68020 instruction */
287 char *args; /* list of opcode info */
290 int numo; /* Number of shorts in opcode */
293 struct m68k_op operands[6];
295 int nexp; /* number of exprs in use */
296 struct m68k_exp exprs[4];
298 int nfrag; /* Number of frags we have to produce */
300 int fragoff; /* Where in the current opcode[] the frag ends */
306 int nrel; /* Num of reloc strucs in use */
314 } reloc[5]; /* Five is enough??? */
317 static struct m68k_it the_ins; /* the instruction being assembled */
318 static enum m68k_architecture max_arch_this_insn;
320 /* Macros for adding things to the m68k_it struct */
322 #define addword(w) the_ins.opcode[the_ins.numo++]=(w)
324 /* Like addword, but goes BEFORE general operands */
325 #define insop(w) {int z;\
326 for(z=the_ins.numo;z>opcode->m_codenum;--z)\
327 the_ins.opcode[z]=the_ins.opcode[z-1];\
328 for(z=0;z<the_ins.nrel;z++)\
329 the_ins.reloc[z].n+=2;\
330 the_ins.opcode[opcode->m_codenum]=w;\
335 #define add_exp(beg,end) (\
336 the_ins.exprs[the_ins.nexp].e_beg=beg,\
337 the_ins.exprs[the_ins.nexp].e_end=end,\
338 &the_ins.exprs[the_ins.nexp++]\
342 /* The numo+1 kludge is so we can hit the low order byte of the prev word. Blecch*/
343 #define add_fix(width,exp,pc_rel) {\
344 the_ins.reloc[the_ins.nrel].n= ((width)=='B') ? (the_ins.numo*2-1) : \
345 (((width)=='b') ? ((the_ins.numo-1)*2) : (the_ins.numo*2));\
346 the_ins.reloc[the_ins.nrel].add=adds((exp));\
347 the_ins.reloc[the_ins.nrel].sub=subs((exp));\
348 the_ins.reloc[the_ins.nrel].off=offs((exp));\
349 the_ins.reloc[the_ins.nrel].wid=width;\
350 the_ins.reloc[the_ins.nrel++].pcrel=pc_rel;\
353 #define add_frag(add,off,type) {\
354 the_ins.fragb[the_ins.nfrag].fragoff=the_ins.numo;\
355 the_ins.fragb[the_ins.nfrag].fadd=add;\
356 the_ins.fragb[the_ins.nfrag].foff=off;\
357 the_ins.fragb[the_ins.nfrag++].fragty=type;\
360 #define isvar(exp) ((exp) && (adds(exp) || subs(exp)))
362 #define seg(exp) ((exp)->e_exp.X_seg)
363 #define adds(exp) ((exp)->e_exp.X_add_symbol)
364 #define subs(exp) ((exp)->e_exp.X_subtract_symbol)
365 #define offs(exp) ((exp)->e_exp.X_add_number)
370 unsigned long m_opcode;
373 enum m68k_architecture m_arch;
374 struct m68k_incant *m_next;
377 #define getone(x) ((((x)->m_opcode)>>16)&0xffff)
378 #define gettwo(x) (((x)->m_opcode)&0xffff)
383 static char *crack_operand(char *str, struct m68k_op *opP);
384 static int get_num(struct m68k_exp *exp, int ok);
385 static int get_regs(int i, char *str, struct m68k_op *opP);
386 static int reverse_16_bits(int in);
387 static int reverse_8_bits(int in);
388 static int try_index(char **s, struct m68k_op *opP);
389 static void install_gen_operand(int mode, int val);
390 static void install_operand(int mode, int val);
391 static void s_bss(void);
392 static void s_data1(void);
393 static void s_data2(void);
394 static void s_even(void);
395 static void s_proc(void);
399 static char *crack_operand();
400 static int get_num();
401 static int get_regs();
402 static int reverse_16_bits();
403 static int reverse_8_bits();
404 static int try_index();
405 static void install_gen_operand();
406 static void install_operand();
408 static void s_data1();
409 static void s_data2();
410 static void s_even();
411 static void s_proc();
413 #endif /* __STDC__ */
415 static enum m68k_architecture current_architecture = m68020
424 /* BCC68000 is for patching in an extra jmp instruction for long offsets
425 on the 68000. The 68000 doesn't support long branches with branchs */
427 /* This table desribes how you change sizes for the various types of variable
428 size expressions. This version only supports two kinds. */
430 /* Note that calls to frag_var need to specify the maximum expansion needed */
431 /* This is currently 10 bytes for DBCC */
434 How far Forward this mode will reach:
435 How far Backward this mode will reach:
436 How many bytes this mode will add to the size of the frag
437 Which mode to go to if the offset won't fit in this one
441 { 1, 1, 0, 0 }, /* First entries aren't used */
442 { 1, 1, 0, 0 }, /* For no good reason except */
443 { 1, 1, 0, 0 }, /* that the VAX doesn't either */
446 { (127), (-128), 0, TAB(BRANCH,SHORT)},
447 { (32767), (-32768), 2, TAB(BRANCH,LONG) },
451 { 1, 1, 0, 0 }, /* FBRANCH doesn't come BYTE */
452 { (32767), (-32768), 2, TAB(FBRANCH,LONG)},
456 { 1, 1, 0, 0 }, /* PCREL doesn't come BYTE */
457 { (32767), (-32768), 2, TAB(PCREL,LONG)},
461 { (127), (-128), 0, TAB(BCC68000,SHORT)},
462 { (32767), (-32768), 2, TAB(BCC68000,LONG) },
463 { 0, 0, 6, 0 }, /* jmp long space */
466 { 1, 1, 0, 0 }, /* DBCC doesn't come BYTE */
467 { (32767), (-32768), 2, TAB(DBCC,LONG) },
468 { 0, 0, 10, 0 }, /* bra/jmp long space */
471 { 1, 1, 0, 0 }, /* PCLEA doesn't come BYTE */
472 { 32767, -32768, 2, TAB(PCLEA,LONG) },
478 /* These are the machine dependent pseudo-ops. These are included so
479 the assembler can work on the output from the SUN C compiler, which
483 /* This table describes all the machine specific pseudo-ops the assembler
484 has to support. The fields are:
485 pseudo-op name without dot
486 function to call to execute this pseudo-op
487 Integer arg to pass to the function
489 const pseudo_typeS md_pseudo_table[] = {
490 { "data1", s_data1, 0 },
491 { "data2", s_data2, 0 },
493 { "even", s_even, 0 },
494 { "skip", s_space, 0 },
495 { "proc", s_proc, 0 },
500 /* #define isbyte(x) ((x)>=-128 && (x)<=127) */
501 /* #define isword(x) ((x)>=-32768 && (x)<=32767) */
503 #define issbyte(x) ((x)>=-128 && (x)<=127)
504 #define isubyte(x) ((x)>=0 && (x)<=255)
505 #define issword(x) ((x)>=-32768 && (x)<=32767)
506 #define isuword(x) ((x)>=0 && (x)<=65535)
508 #define isbyte(x) ((x)>=-128 && (x)<=255)
509 #define isword(x) ((x)>=-32768 && (x)<=65535)
510 #define islong(x) (1)
512 extern char *input_line_pointer;
519 /* JF these tables here are for speed at the expense of size */
520 /* You can replace them with the #if 0 versions if you really
521 need space and don't mind it running a bit slower */
523 static char mklower_table[256];
524 #define mklower(c) (mklower_table[(unsigned char)(c)])
525 static char notend_table[256];
526 static char alt_notend_table[256];
527 #define notend(s) ( !(notend_table[(unsigned char)(*s)] || (*s==':' &&\
528 alt_notend_table[(unsigned char)(s[1])])))
531 #define mklower(c) (isupper(c) ? tolower(c) : c)
535 /* JF modified this to handle cases where the first part of a symbol name
536 looks like a register */
539 * m68k_reg_parse() := if it looks like a register, return it's token &
540 * advance the pointer.
543 enum _register m68k_reg_parse(ccp)
546 #ifndef MAX_REG_NAME_LEN
547 #define MAX_REG_NAME_LEN (6)
548 #endif /* MAX_REG_NAME_LEN */
549 register char c[MAX_REG_NAME_LEN];
554 c[0] = mklower(ccp[0][0]);
555 #ifdef REGISTER_PREFIX
556 if (c[0] != REGISTER_PREFIX) {
561 for (p = c, q = ccp[0]; p < c + MAX_REG_NAME_LEN && *q != 0; ++p, ++q) {
567 if(c[1]>='0' && c[1]<='7') {
572 else if (c[1] == 'c') {
582 if (c[3] >= '0' && c[3] <= '7') {
584 ret = BAD + c[3] - '0';
588 if (c[3] >= '0' && c[3] <= '7') {
590 ret = BAC + c[3] - '0';
593 } else if (c[1] == 'c') {
601 if (c[1] == 'a' && c[2] == 'l') {
606 /* This supports both CCR and CC as the ccr reg. */
607 if(c[1]=='c' && c[2]=='r') {
610 } else if(c[1]=='c') {
613 } else if(c[1]=='a' && (c[2]=='a' || c[2]=='c') && c[3]=='r') {
615 ret = c[2]=='a' ? CAAR : CACR;
618 else if (c[1] == 'r' && c[2] == 'p') {
625 if (c[1] >= '0' && c[1] <= '7') {
627 ret = DATA + c[1] - '0';
628 } else if (c[1] == 'f' && c[2] == 'c') {
631 } else if (c[1] == 'c') {
634 } else if (c[1] == 't' && c[2] == 't') {
635 if ('0' <= c[3] && c[3] <= '1') {
637 ret = DTT0 + (c[3] - '0');
641 else if (c[1] == 'r' && c[2] == 'p') {
649 if(c[2]>='0' && c[2]<='7') {
651 ret = FPREG+c[2]-'0';
654 } else if(c[2]=='i') {
657 } else if(c[2]=='s') {
658 n= (c[3] == 'r' ? 4 : 3);
660 } else if(c[2]=='c') {
661 n= (c[3] == 'r' ? 4 : 3);
667 if (c[1] == 's' && c[2] == 'p') {
670 } else if (c[1] == 'c') {
673 } else if (c[1] == 't' && c[2] == 't') {
674 if ('0' <= c[3] && c[3] <= '1') {
676 ret = ITT0 + (c[3] - '0');
681 if (c[1] == 's' && c[2] == 'p') {
684 } else if (c[1] == 'm' && c[2] == 'u' && c[3] == 's' && c[4] == 'r') {
698 if(c[2] == 's' && c[3]=='r') {
709 else if (c[1] == 's' && c[2] == 'r') {
717 if (c[1] == 'c' && c[2] == 'c') {
730 } else if (c[1] == 'p') {
733 } else if (c[1] == 'f' && c[2] == 'c') {
745 if (c[1] == 's' && c[2] == 'p') {
748 } else if (c[1] == 'r' && c[2] == 'p') {
755 if (c[1] == 'a' && c[2] == 'l') {
760 if(c[1]=='b' && c[2]=='r') {
766 if(c[1]=='p' && c[2]=='c') {
775 #ifdef REGISTER_PREFIX
778 if(isalnum(ccp[0][n]) || ccp[0][n]=='_')
787 #define SKIP_WHITE() { str++; if(*str==' ') str++;}
790 * m68k_ip_op := '#' + <anything>
791 * | <register> + range_sep + get_regs
794 * range_sep := '/' | '-' ;
796 * SKIP_WHITE := <empty> | ' ' ;
803 register struct m68k_op *opP;
811 } /* Find the beginning of the string */
814 opP->error="Missing operand";
818 for(strend = str; *strend; strend++) ;;
824 opP->con1=add_exp(str,strend);
827 } /* Guess what: A constant. Shar and enjoy */
829 i = m68k_reg_parse(&str);
831 /* is a register, is exactly a register, and is followed by '@' */
833 if((i==FAIL || *str!='\0') && *str!='@') {
836 if(i!=FAIL && (*str=='/' || *str=='-')) {
838 return get_regs(i,str,opP);
840 if ((stmp=strchr(str,'@')) != '\0') {
841 opP->con1=add_exp(str,stmp-1);
847 if(*stmp++!='(' || *strend--!=')') {
848 opP->error="Malformed operand";
851 i=try_index(&stmp,opP);
852 opP->con2=add_exp(stmp,strend);
856 if (max_arch_this_insn < m68020) {
857 max_arch_this_insn = m68020;
861 if (max_arch_this_insn < m68020) {
862 max_arch_this_insn = m68020;
866 } /* if there's an '@' */
868 opP->con1=add_exp(str,strend);
870 } /* not a register, not exactly a register, or no '@' */
875 if(i>=DATA+0 && i<=DATA+7)
877 else if(i>=ADDR+0 && i<=ADDR+7)
884 if((i<ADDR+0 || i>ADDR+7) && i!=PC && i!=ZPC && i!=FAIL) { /* Can't indirect off non address regs */
885 opP->error="Invalid indirect register";
905 opP->error="Junk after indirect";
908 /* Some kind of indexing involved. Lets find out how bad it is */
909 i=try_index(&str,opP);
910 /* Didn't start with an index reg, maybe its offset or offset,reg */
918 opP->error="Missing )";
920 case ',': i=0; break;
921 case '(': i++; break;
922 case ')': --i; break;
925 /* if(str[-3]==':') {
942 opP->error="Specified size isn't :w or :l";
945 opP->con1=add_exp(beg_str,str-4);
946 opP->con1->e_siz=siz;
948 opP->con1=add_exp(beg_str,str-2);
949 /* Should be offset,reg */
951 i=try_index(&str,opP);
953 opP->error="Malformed index reg";
958 /* We've now got offset) offset,reg) or reg) */
961 /* Th-the-thats all folks */
962 if(opP->reg==FAIL) opP->mode=AINDX; /* Other form of indirect */
963 else if(opP->ireg==FAIL) opP->mode=AOFF;
964 else opP->mode=AINDX;
967 /* Next thing had better be another @ */
968 if(*str!='@' || str[1]!='(') {
969 opP->error="junk after indirect";
973 if(opP->ireg!=FAIL) {
976 if (max_arch_this_insn < m68020) {
977 max_arch_this_insn = m68020;
980 i=try_index(&str,opP);
982 opP->error="Two index registers! not allowed!";
986 i=try_index(&str,opP);
995 opP->error="Missing )";
997 case ',': i=0; break;
998 case '(': i++; break;
999 case ')': --i; break;
1002 opP->con2=add_exp(beg_str,str-2);
1004 if(opP->ireg!=FAIL) {
1005 opP->error="Can't have two index regs";
1008 i=try_index(&str,opP);
1010 opP->error="malformed index reg";
1014 if (max_arch_this_insn < m68020) {
1015 max_arch_this_insn = m68020;
1017 } else if(opP->ireg!=FAIL) {
1020 if (max_arch_this_insn < m68020) {
1021 max_arch_this_insn = m68020;
1026 if (max_arch_this_insn < m68020) {
1027 max_arch_this_insn = m68020;
1032 if (max_arch_this_insn < m68020) {
1033 max_arch_this_insn = m68020;
1038 opP->error="Junk after indirect";
1046 * try_index := data_or_address_register + ')' + SKIP_W
1047 * | data_or_address_register + ':' + SKIP_W + size_spec + SKIP_W + multiplier + ')' + SKIP_W
1049 * multiplier := <empty>
1050 * | ':' + multiplier_number
1053 * multiplier_number := '1' | '2' | '4' | '8' ;
1055 * size_spec := 'l' | 'L' | 'w' | 'W' ;
1057 * SKIP_W := <empty> | ' ' ;
1061 static int try_index(s,opP)
1063 struct m68k_op *opP;
1067 #define SKIP_W() { ss++; if (*ss==' ') ss++;}
1071 i=m68k_reg_parse(&ss);
1072 if(!(i>=DATA+0 && i<=ADDR+7)) { /* if i is not DATA or ADDR reg */
1086 opP->error="Missing : in index register";
1101 opP->error="Index register size spec not :w or :l";
1116 opP->error="index multiplier not 1, 2, 4 or 8";
1123 opP->error="Missing )";
1132 #ifdef TEST1 /* TEST1 tests m68k_ip_op(), which parses operands */
1136 struct m68k_op thark;
1141 bzero(&thark,sizeof(thark));
1142 if(!m68k_ip_op(buf,&thark)) printf("FAIL:");
1144 printf("op1 error %s in %s\n",thark.error,buf);
1145 printf("mode %d, reg %d, ",thark.mode,thark.reg);
1147 printf("Constant: '%.*s',",1+thark.e_const-thark.b_const,thark.b_const);
1148 printf("ireg %d, isiz %d, imul %d ",thark.ireg,thark.isiz,thark.imul);
1150 printf("Iadd: '%.*s'",1+thark.e_iadd-thark.b_iadd,thark.b_iadd);
1159 static struct hash_control* op_hash = NULL; /* handle of the OPCODE hash table
1160 NULL means any use before m68k_ip_begin()
1167 * This converts a string into a 68k instruction.
1168 * The string must be a bare single instruction in sun format
1169 * with RMS-style 68020 indirects
1172 * It provides some error messages: at most one fatal error message (which
1173 * stops the scan) and at most one warning message for each operand.
1174 * The 68k instruction is returned in exploded form, since we have no
1175 * knowledge of how you parse (or evaluate) your expressions.
1176 * We do however strip off and decode addressing modes and operation
1179 * This function's value is a string. If it is not "" then an internal
1180 * logic error was found: read this code to assign meaning to the string.
1181 * No argument string should generate such an error string:
1182 * it means a bug in our code, not in the user's text.
1184 * You MUST have called m68k_ip_begin() once and m86_ip_end() never before using
1188 /* JF this function no longer returns a useful value. Sorry */
1189 void m68k_ip (instring)
1193 register struct m68k_op *opP;
1194 register struct m68k_incant *opcode;
1196 register int tmpreg = 0,
1205 char *crack_operand();
1206 LITTLENUM_TYPE words[6];
1207 LITTLENUM_TYPE *wordp;
1209 max_arch_this_insn = m68000;
1211 if (*instring == ' ')
1212 instring++; /* skip leading whitespace */
1214 /* Scan up to end of operation-code, which MUST end in end-of-string
1215 or exactly 1 space. */
1216 for (p = instring; *p != '\0'; p++)
1221 if (p == instring) {
1222 the_ins.error = "No operator";
1223 the_ins.opcode[0] = NULL;
1224 /* the_ins.numo=1; */
1228 /* p now points to the end of the opcode name, probably whitespace.
1229 make sure the name is null terminated by clobbering the whitespace,
1230 look it up in the hash table, then fix it back. */
1233 opcode = (struct m68k_incant *)hash_find (op_hash, instring);
1236 if (opcode == NULL) {
1237 the_ins.error = "Unknown operator";
1238 the_ins.opcode[0] = NULL;
1239 /* the_ins.numo=1; */
1243 /* found a legitimate opcode, start matching operands */
1244 while (*p == ' ') ++p;
1246 for(opP = &the_ins.operands[0]; *p; opP++) {
1248 p = crack_operand(p, opP);
1251 the_ins.error=opP->error;
1256 opsfound=opP- &the_ins.operands[0];
1258 /* This ugly hack is to support the floating pt opcodes in their standard form */
1259 /* Essentially, we fake a first enty of type COP#1 */
1260 if (opcode->m_operands[0]=='I') {
1263 for(n=opsfound;n>0;--n)
1264 the_ins.operands[n]=the_ins.operands[n-1];
1266 /* bcopy((char *)(&the_ins.operands[0]),(char *)(&the_ins.operands[1]),opsfound*sizeof(the_ins.operands[0])); */
1267 bzero((char *)(&the_ins.operands[0]),sizeof(the_ins.operands[0]));
1268 the_ins.operands[0].mode=MSCR;
1269 the_ins.operands[0].reg=COPNUM; /* COP #1 */
1273 /* We've got the operands. Find an opcode that'll accept them */
1274 for (losing = 0; ; ) {
1275 /* if we didn't get the right number of ops, or either
1276 the modes of our args or this op line itself are out
1279 if ((opsfound != opcode->m_opnum)
1280 || ((max_arch_this_insn > current_architecture)
1281 || (opcode->m_arch > current_architecture))) {
1285 for (s=opcode->m_operands, opP = &the_ins.operands[0]; *s && !losing; s += 2, opP++) {
1286 /* Warning: this switch is huge! */
1287 /* I've tried to organize the cases into this order:
1288 non-alpha first, then alpha by letter. lower-case goes directly
1289 before uppercase counterpart. */
1290 /* Code with multiple case ...: gets sorted by the lowest case ...
1291 it belongs to. I hope this makes sense. */
1294 if(opP->mode==MSCR || opP->mode==IMMED ||
1295 opP->mode==DREG || opP->mode==AREG || opP->mode==AINC || opP->mode==ADEC || opP->mode==REGLST)
1300 if(opP->mode!=IMMED)
1305 t=get_num(opP->con1,80);
1306 if(s[1]=='b' && !isbyte(t))
1308 else if(s[1]=='w' && !isword(t))
1315 if(opP->mode!=IMMED)
1320 if(opP->mode==MSCR || opP->mode==AREG ||
1321 opP->mode==IMMED || opP->reg==PC || opP->reg==ZPC || opP->mode==REGLST)
1326 if(opP->mode==MSCR || opP->reg==PC ||
1327 opP->reg==ZPC || opP->mode==REGLST)
1333 if(opP->mode==MSCR || opP->mode==DREG ||
1334 opP->mode==AREG || opP->mode==IMMED || opP->reg==PC || opP->reg==ZPC ||
1335 opP->mode==AINC || opP->mode==ADEC || opP->mode==REGLST)
1340 if(opP->mode==MSCR || opP->mode==REGLST)
1355 if(opP->mode==MSCR || opP->mode==AREG ||
1356 opP->mode==AINC || opP->mode==ADEC || opP->mode==IMMED || opP->mode==REGLST)
1361 if(opP->mode==MSCR || opP->mode==AREG || opP->mode==REGLST)
1366 if(opP->mode==MSCR || opP->mode==AREG ||
1367 opP->mode==AINC || opP->mode==ADEC || opP->mode==IMMED || opP->reg==PC ||
1368 opP->reg==ZPC || opP->mode==REGLST)
1373 if(opP->mode==MSCR || opP->mode==AREG ||
1374 opP->mode==IMMED || opP->mode==REGLST)
1378 case '~': /* For now! (JF FOO is this right?) */
1379 if(opP->mode==MSCR || opP->mode==DREG ||
1380 opP->mode==AREG || opP->mode==IMMED || opP->reg==PC || opP->reg==ZPC || opP->mode==REGLST)
1389 if (opP->mode != AINDR) {
1391 } /* if not address register indirect */
1394 if(opP->mode!=ABSL || (flagseen['S'] && instring[0] == 'j'
1395 && instring[1] == 'b'
1396 && instring[2] == 's'
1397 && instring[3] == 'r'))
1402 if(opP->mode!=MSCR || opP->reg!=CCR)
1406 case 'd': /* FOO This mode is a KLUDGE!! */
1407 if(opP->mode!=AOFF && (opP->mode!=ABSL ||
1408 opP->con1->e_beg[0]!='(' || opP->con1->e_end[0]!=')'))
1418 if(opP->mode!=MSCR || opP->reg<(FPREG+0) || opP->reg>(FPREG+7))
1423 if(opP->mode!=MSCR || opP->reg<COPNUM ||
1429 if (opP->mode != MSCR
1432 || (current_architecture & m68000up) < m68010 /* before 68010 had none */
1433 || ((current_architecture & m68020up) == 0
1437 && opP->reg != VBR) /* 68010's had only these */
1438 || ((current_architecture & m68040) == 0
1446 && opP->reg != ISP) /* 680[23]0's have only these */
1447 || ((current_architecture & m68040) /* 68040 has all but this */
1448 && opP->reg == CAAR)) {
1450 } /* doesn't cut it */
1454 if(opP->mode!=IMMED)
1460 if(opP->mode==DREG || opP->mode==AREG || opP->mode==FPREG) {
1465 opP->reg=1<<(opP->reg-DATA);
1467 } else if(opP->mode!=REGLST) {
1469 } else if(s[1]=='8' && opP->reg&0x0FFffFF)
1471 else if(s[1]=='3' && opP->reg&0x7000000)
1476 if(opP->mode!=IMMED)
1481 t=get_num(opP->con1,80);
1482 if(!issbyte(t) || isvar(opP->con1))
1488 if(opP->mode!=DREG && opP->mode!=IMMED)
1493 if(opP->mode!=IMMED)
1498 t=get_num(opP->con1,80);
1499 if(t<1 || t>8 || isvar(opP->con1))
1505 if(opP->mode!=DREG && opP->mode!=AREG)
1510 if(opP->mode!=MSCR || !(opP->reg==FPI || opP->reg==FPS || opP->reg==FPC))
1515 if(opP->mode!=MSCR || opP->reg!=SR)
1520 if(opP->mode!=MSCR || opP->reg!=USP)
1524 /* JF these are out of order. We could put them
1525 in order if we were willing to put up with
1526 bunches of #ifdef m68851s in the code */
1528 /* Memory addressing mode used by pflushr */
1530 if(opP->mode==MSCR || opP->mode==DREG ||
1531 opP->mode==AREG || opP->mode==REGLST)
1536 if (opP->mode != MSCR || (opP->reg != SFC && opP->reg != DFC))
1541 if (opP->mode != MSCR || (opP->reg != TC && opP->reg != CAL &&
1542 opP->reg != VAL && opP->reg != SCC && opP->reg != AC))
1547 if (opP->reg != VAL)
1552 if (opP->mode != MSCR || (opP->reg != DRP && opP->reg != SRP &&
1558 if (opP->mode != MSCR ||
1559 (!(opP->reg >= BAD && opP->reg <= BAD+7) &&
1560 !(opP->reg >= BAC && opP->reg <= BAC+7)))
1565 if (opP->reg != PSR)
1570 if (opP->reg != PCSR)
1578 && opP->reg != BC) {
1580 } /* not a cache specifier. */
1584 if (opP->mode != ABSL) {
1586 } /* not absolute */
1590 as_fatal("Internal error: Operand mode %c unknown in line %s of file \"%s\"",
1591 *s, __LINE__, __FILE__);
1592 } /* switch on type of operand */
1595 } /* for each operand */
1596 } /* if immediately wrong */
1602 opcode = opcode->m_next;
1605 the_ins.error = "instruction/operands mismatch";
1607 } /* Fell off the end */
1613 the_ins.args=opcode->m_operands;
1614 the_ins.numargs=opcode->m_opnum;
1615 the_ins.numo=opcode->m_codenum;
1616 the_ins.opcode[0]=getone(opcode);
1617 the_ins.opcode[1]=gettwo(opcode);
1619 for (s = the_ins.args, opP = &the_ins.operands[0]; *s; s += 2, opP++) {
1620 /* This switch is a doozy.
1621 Watch the first step; its a big one! */
1639 tmpreg=0x3c; /* 7.4 */
1640 if (strchr("bwl",s[1])) nextword=get_num(opP->con1,80);
1641 else nextword=nextword=get_num(opP->con1,0);
1642 if(isvar(opP->con1))
1643 add_fix(s[1],opP->con1,0);
1646 if(!isbyte(nextword))
1647 opP->error="operand out of range";
1652 if(!isword(nextword))
1653 opP->error="operand out of range";
1658 addword(nextword>>16);
1680 as_fatal("Internal error: Can't decode %c%c in line %s of file \"%s\"",
1681 *s, s[1], __LINE__, __FILE__);
1686 /* We gotta put out some float */
1687 if(seg(opP->con1)!=SEG_BIG) {
1688 int_to_gen(nextword);
1689 gen_to_words(words,baseo,(long int)outro);
1690 for(wordp=words;baseo--;wordp++)
1694 if(offs(opP->con1)>0) {
1695 as_warn("Bignum assumed to be binary bit-pattern");
1696 if(offs(opP->con1)>baseo) {
1697 as_warn("Bignum too big for %c format; truncated",s[1]);
1698 offs(opP->con1)=baseo;
1700 baseo-=offs(opP->con1);
1701 for(wordp=generic_bignum+offs(opP->con1)-1;offs(opP->con1)--;--wordp)
1707 gen_to_words(words,baseo,(long)outro);
1708 for (wordp=words;baseo--;wordp++)
1712 tmpreg=opP->reg-DATA; /* 0.dreg */
1715 tmpreg=0x08+opP->reg-ADDR; /* 1.areg */
1718 tmpreg=0x10+opP->reg-ADDR; /* 2.areg */
1721 tmpreg=0x20+opP->reg-ADDR; /* 4.areg */
1724 tmpreg=0x18+opP->reg-ADDR; /* 3.areg */
1728 nextword=get_num(opP->con1,80);
1729 /* Force into index mode. Hope this works */
1731 /* We do the first bit for 32-bit displacements,
1732 and the second bit for 16 bit ones. It is
1733 possible that we should make the default be
1734 WORD instead of LONG, but I think that'd
1735 break GCC, so we put up with a little
1736 inefficiency for the sake of working output.
1739 if( !issword(nextword)
1740 || ( isvar(opP->con1)
1741 && ( ( opP->con1->e_siz==0
1742 && flagseen['l']==0)
1743 || opP->con1->e_siz==3))) {
1746 tmpreg=0x3B; /* 7.3 */
1748 tmpreg=0x30+opP->reg-ADDR; /* 6.areg */
1749 if(isvar(opP->con1)) {
1751 add_frag(adds(opP->con1),
1753 TAB(PCLEA,SZ_UNDEF));
1757 add_fix('l',opP->con1,1);
1761 addword(nextword>>16);
1764 tmpreg=0x3A; /* 7.2 */
1766 tmpreg=0x28+opP->reg-ADDR; /* 5.areg */
1768 if(isvar(opP->con1)) {
1770 add_fix('w',opP->con1,1);
1772 add_fix('w',opP->con1,0);
1781 if (max_arch_this_insn < m68020) {
1782 max_arch_this_insn = m68020;
1784 /* intentional fall-through */
1787 baseo=get_num(opP->con1,80);
1788 outro=get_num(opP->con2,80);
1789 /* Figure out the 'addressing mode' */
1790 /* Also turn on the BASE_DISABLE bit, if needed */
1791 if(opP->reg==PC || opP->reg==ZPC) {
1792 tmpreg=0x3b; /* 7.3 */
1795 } else if(opP->reg==FAIL) {
1797 tmpreg=0x30; /* 6.garbage */
1798 } else tmpreg=0x30+opP->reg-ADDR; /* 6.areg */
1800 siz1= (opP->con1) ? opP->con1->e_siz : 0;
1801 siz2= (opP->con2) ? opP->con2->e_siz : 0;
1803 /* Index register stuff */
1804 if(opP->ireg>=DATA+0 && opP->ireg<=ADDR+7) {
1805 nextword|=(opP->ireg-DATA)<<12;
1807 if(opP->isiz==0 || opP->isiz==3)
1811 case 2: nextword|=0x200; break;
1812 case 4: nextword|=0x400; break;
1813 case 8: nextword|=0x600; break;
1814 default: as_fatal("failed sanity check.");
1817 GET US OUT OF HERE! */
1819 /* Must be INDEX, with an index
1820 register. Address register
1821 cannot be ZERO-PC, and either
1822 :b was forced, or we know
1824 if( opP->mode==AINDX
1829 && !isvar(opP->con1)))) {
1830 nextword +=baseo&0xff;
1832 if(isvar(opP->con1))
1833 add_fix('B',opP->con1,0);
1837 nextword|=0x40; /* No index reg */
1839 /* It aint simple */
1841 /* If the guy specified a width, we assume that
1842 it is wide enough. Maybe it isn't. Ifso, we lose
1846 if(isvar(opP->con1) || !issword(baseo)) {
1857 as_warn("Byte dispacement won't work. Defaulting to :w");
1866 /* Figure out innner displacement stuff */
1867 if(opP->mode!=AINDX) {
1870 if(isvar(opP->con2) || !issword(outro)) {
1881 as_warn("Byte dispacement won't work. Defaulting to :w");
1889 if(opP->mode==APODX) nextword|=0x04;
1890 else if(opP->mode==AMIND) nextword|=0x40;
1894 if(isvar(opP->con1)) {
1895 if(opP->reg==PC || opP->reg==ZPC) {
1896 add_fix(siz1==3 ? 'l' : 'w',opP->con1,1);
1897 opP->con1->e_exp.X_add_number+=6;
1899 add_fix(siz1==3 ? 'l' : 'w',opP->con1,0);
1906 if(isvar(opP->con2)) {
1907 if(opP->reg==PC || opP->reg==ZPC) {
1908 add_fix(siz2==3 ? 'l' : 'w',opP->con2,1);
1909 opP->con1->e_exp.X_add_number+=6;
1911 add_fix(siz2==3 ? 'l' : 'w',opP->con2,0);
1921 nextword=get_num(opP->con1,80);
1922 switch(opP->con1->e_siz) {
1924 as_warn("Unknown size for absolute reference");
1926 if(!isvar(opP->con1) && issword(offs(opP->con1))) {
1927 tmpreg=0x38; /* 7.0 */
1931 /* Don't generate pc relative code
1932 on 68010 and 68000 */
1935 && seg(opP->con1) == SEG_TEXT
1936 && now_seg == SEG_TEXT
1937 && (current_architecture & m68000up) <= m68010
1939 && !strchr("~%&$?", s[0])) {
1940 tmpreg=0x3A; /* 7.2 */
1941 add_frag(adds(opP->con1),
1943 TAB(PCREL,SZ_UNDEF));
1946 case 3: /* Fall through into long */
1947 if(isvar(opP->con1))
1948 add_fix('l',opP->con1,0);
1950 tmpreg=0x39; /* 7.1 mode */
1951 addword(nextword>>16);
1956 if(isvar(opP->con1))
1957 add_fix('w',opP->con1,0);
1959 tmpreg=0x38; /* 7.0 mode */
1966 as_bad("unknown/incorrect operand");
1969 install_gen_operand(s[1],tmpreg);
1974 switch(s[1]) { /* JF: I hate floating point! */
1989 tmpreg=get_num(opP->con1,tmpreg);
1990 if(isvar(opP->con1))
1991 add_fix(s[1],opP->con1,0);
1993 case 'b': /* Danger: These do no check for
1994 certain types of overflow.
1997 opP->error="out of range";
1999 if(isvar(opP->con1))
2000 the_ins.reloc[the_ins.nrel-1].n=(opcode->m_codenum)*2;
2004 opP->error="out of range";
2006 if(isvar(opP->con1))
2007 the_ins.reloc[the_ins.nrel-1].n=(opcode->m_codenum)*2;
2010 insop(tmpreg); /* Because of the way insop works, we put these two out backwards */
2012 if(isvar(opP->con1))
2013 the_ins.reloc[the_ins.nrel-1].n=(opcode->m_codenum)*2;
2019 install_operand(s[1],tmpreg);
2022 as_fatal("Internal error: Unknown mode #%c in line %s of file \"%s\"", s[1], __LINE__, __FILE__);
2030 install_operand(s[1],opP->reg-ADDR);
2034 tmpreg=get_num(opP->con1,80);
2037 /* Needs no offsetting */
2038 add_fix('B',opP->con1,1);
2041 /* Offset the displacement to be relative to byte disp location */
2042 opP->con1->e_exp.X_add_number+=2;
2043 add_fix('w',opP->con1,1);
2048 if(current_architecture <= m68010) /* 68000 or 010 */
2049 as_warn("Can't use long branches on 68000/68010");
2050 the_ins.opcode[the_ins.numo-1]|=0xff;
2051 /* Offset the displacement to be relative to byte disp location */
2052 opP->con1->e_exp.X_add_number+=4;
2053 add_fix('l',opP->con1,1);
2058 if(subs(opP->con1)) /* We can't relax it */
2061 /* This could either be a symbol, or an
2062 absolute address. No matter, the
2063 frag hacking will finger it out.
2064 Not quite: it can't switch from
2065 BRANCH to BCC68000 for the case
2066 where opnd is absolute (it needs
2067 to use the 68000 hack since no
2068 conditional abs jumps). */
2069 if (((current_architecture <= m68010) || (0==adds(opP->con1)))
2070 && (the_ins.opcode[0] >= 0x6200)
2071 && (the_ins.opcode[0] <= 0x6f00)) {
2072 add_frag(adds(opP->con1),offs(opP->con1),TAB(BCC68000,SZ_UNDEF));
2074 add_frag(adds(opP->con1),offs(opP->con1),TAB(BRANCH,SZ_UNDEF));
2078 if(isvar(opP->con1)) {
2079 /* check for DBcc instruction */
2080 if ((the_ins.opcode[0] & 0xf0f8) ==0x50c8) {
2081 /* size varies if patch */
2082 /* needed for long form */
2083 add_frag(adds(opP->con1),offs(opP->con1),TAB(DBCC,SZ_UNDEF));
2088 opP->con1->e_exp.X_add_number+=2;
2089 add_fix('w',opP->con1,1);
2093 case 'C': /* Fixed size LONG coproc branches */
2094 the_ins.opcode[the_ins.numo-1]|=0x40;
2095 /* Offset the displacement to be relative to byte disp location */
2096 /* Coproc branches don't have a byte disp option, but they are
2097 compatible with the ordinary branches, which do... */
2098 opP->con1->e_exp.X_add_number+=4;
2099 add_fix('l',opP->con1,1);
2103 case 'c': /* Var size Coprocesssor branches */
2104 if(subs(opP->con1)) {
2105 add_fix('l',opP->con1,1);
2106 add_frag((symbolS *)0,(long)0,TAB(FBRANCH,LONG));
2107 } else if(adds(opP->con1)) {
2108 add_frag(adds(opP->con1),offs(opP->con1),TAB(FBRANCH,SZ_UNDEF));
2110 /* add_frag((symbolS *)0,offs(opP->con1),TAB(FBRANCH,SHORT)); */
2111 the_ins.opcode[the_ins.numo-1]|=0x40;
2112 add_fix('l',opP->con1,1);
2118 as_fatal("Internal error: operand type B%c unknown in line %s of file \"%s\"",
2119 s[1], __LINE__, __FILE__);
2123 case 'C': /* Ignore it */
2126 case 'd': /* JF this is a kludge */
2127 if(opP->mode==AOFF) {
2128 install_operand('s',opP->reg-ADDR);
2132 tmpP=opP->con1->e_end-2;
2134 opP->con1->e_end-=4; /* point to the , */
2135 baseo=m68k_reg_parse(&tmpP);
2136 if(baseo<ADDR+0 || baseo>ADDR+7) {
2137 as_bad("Unknown address reg, using A0");
2140 install_operand('s',baseo);
2142 tmpreg=get_num(opP->con1,80);
2143 if(!issword(tmpreg)) {
2144 as_warn("Expression out of range, using 0");
2151 install_operand(s[1],opP->reg-DATA);
2155 install_operand(s[1],opP->reg-FPREG);
2159 tmpreg=1+opP->reg-COPNUM;
2162 install_operand(s[1],tmpreg);
2165 case 'J': /* JF foo */
2167 case SFC: tmpreg=0x000; break;
2168 case DFC: tmpreg=0x001; break;
2169 case CACR: tmpreg=0x002; break;
2170 case TC: tmpreg=0x003; break;
2171 case ITT0: tmpreg=0x004; break;
2172 case ITT1: tmpreg=0x005; break;
2173 case DTT0: tmpreg=0x006; break;
2174 case DTT1: tmpreg=0x007; break;
2176 case USP: tmpreg=0x800; break;
2177 case VBR: tmpreg=0x801; break;
2178 case CAAR: tmpreg=0x802; break;
2179 case MSP: tmpreg=0x803; break;
2180 case ISP: tmpreg=0x804; break;
2181 case MMUSR: tmpreg=0x805; break;
2182 case URP: tmpreg=0x806; break;
2183 case SRP: tmpreg=0x807; break;
2185 as_fatal("failed sanity check.");
2187 install_operand(s[1],tmpreg);
2191 tmpreg=get_num(opP->con1,55);
2192 install_operand(s[1],tmpreg&0x7f);
2198 if(tmpreg&0x7FF0000)
2199 as_bad("Floating point register in register list");
2200 insop(reverse_16_bits(tmpreg));
2202 if(tmpreg&0x700FFFF)
2203 as_bad("Wrong register in floating-point reglist");
2204 install_operand(s[1],reverse_8_bits(tmpreg>>16));
2211 if(tmpreg&0x7FF0000)
2212 as_bad("Floating point register in register list");
2214 } else if(s[1]=='8') {
2215 if(tmpreg&0x0FFFFFF)
2216 as_bad("incorrect register in reglist");
2217 install_operand(s[1],tmpreg>>24);
2219 if(tmpreg&0x700FFFF)
2220 as_bad("wrong register in floating-point reglist");
2222 install_operand(s[1],tmpreg>>16);
2227 install_operand(s[1],get_num(opP->con1,60));
2231 tmpreg= (opP->mode==DREG)
2232 ? 0x20+opP->reg-DATA
2233 : (get_num(opP->con1,40)&0x1F);
2234 install_operand(s[1],tmpreg);
2238 tmpreg=get_num(opP->con1,10);
2241 install_operand(s[1],tmpreg);
2245 /* This depends on the fact that ADDR registers are
2246 eight more than their corresponding DATA regs, so
2247 the result will have the ADDR_REG bit set */
2248 install_operand(s[1],opP->reg-DATA);
2252 if(opP->reg==FPI) tmpreg=0x1;
2253 else if(opP->reg==FPS) tmpreg=0x2;
2254 else if(opP->reg==FPC) tmpreg=0x4;
2255 else as_fatal("failed sanity check.");
2256 install_operand(s[1],tmpreg);
2259 case 'S': /* Ignore it */
2263 install_operand(s[1],get_num(opP->con1,30));
2266 case 'U': /* Ignore it */
2271 case NC: tmpreg = 0; break;
2272 case DC: tmpreg = 1; break;
2273 case IC: tmpreg = 2; break;
2274 case BC: tmpreg = 3; break;
2276 as_fatal("failed sanity check");
2277 } /* switch on cache token */
2278 install_operand(s[1], tmpreg);
2281 /* JF: These are out of order, I fear. */
2291 as_fatal("failed sanity check.");
2293 install_operand(s[1],tmpreg);
2314 as_fatal("failed sanity check.");
2316 install_operand(s[1],tmpreg);
2320 if (opP->reg == VAL)
2322 as_fatal("failed sanity check.");
2337 as_fatal("failed sanity check.");
2339 install_operand(s[1],tmpreg);
2344 case BAD: case BAD+1: case BAD+2: case BAD+3:
2345 case BAD+4: case BAD+5: case BAD+6: case BAD+7:
2346 tmpreg = (4 << 10) | ((opP->reg - BAD) << 2);
2349 case BAC: case BAC+1: case BAC+2: case BAC+3:
2350 case BAC+4: case BAC+5: case BAC+6: case BAC+7:
2351 tmpreg = (5 << 10) | ((opP->reg - BAC) << 2);
2355 as_fatal("failed sanity check.");
2357 install_operand(s[1], tmpreg);
2360 know(opP->reg == PSR);
2363 know(opP->reg == PCSR);
2367 tmpreg=get_num(opP->con1,80);
2368 install_operand(s[1], tmpreg);
2371 as_fatal("Internal error: Operand type %c unknown in line %s of file \"%s\"", s[0], __LINE__, __FILE__);
2374 /* By the time whe get here (FINALLY) the_ins contains the complete
2375 instruction, ready to be emitted. . . */
2379 * get_regs := '/' + ?
2380 * | '-' + <register>
2381 * | '-' + <register> + ?
2386 * The idea here must be to scan in a set of registers but I don't
2387 * understand it. Looks awfully sloppy to me but I don't have any doc on
2394 static int get_regs(i,str,opP)
2396 struct m68k_op *opP;
2399 /* 26, 25, 24, 23-16, 15-8, 0-7 */
2400 /* Low order 24 bits encoded fpc,fps,fpi,fp7-fp0,a7-a0,d7-d0 */
2401 unsigned long cur_regs = 0;
2405 #define ADD_REG(x) { if(x==FPI) cur_regs|=(1<<24);\
2406 else if(x==FPS) cur_regs|=(1<<25);\
2407 else if(x==FPC) cur_regs|=(1<<26);\
2408 else cur_regs|=(1<<(x-1)); }
2415 } else if(*str=='-') {
2417 reg2=m68k_reg_parse(&str);
2418 if(reg2<DATA || reg2>=FPREG+8 || reg1==FPI || reg1==FPS || reg1==FPC) {
2419 opP->error="unknown register in register list";
2428 } else if(*str=='\0') {
2432 opP->error="unknow character in register list";
2435 /* DJA -- Bug Fix. Did't handle d1-d2/a1 until the following instruction was added */
2438 reg1=m68k_reg_parse(&str);
2439 if((reg1<DATA || reg1>=FPREG+8) && !(reg1==FPI || reg1==FPS || reg1==FPC)) {
2440 opP->error="unknown register in register list";
2448 static int reverse_16_bits(in)
2454 static int mask[16] = {
2455 0x0001,0x0002,0x0004,0x0008,0x0010,0x0020,0x0040,0x0080,
2456 0x0100,0x0200,0x0400,0x0800,0x1000,0x2000,0x4000,0x8000
2463 } /* reverse_16_bits() */
2465 static int reverse_8_bits(in)
2471 static int mask[8] = {
2472 0x0001,0x0002,0x0004,0x0008,0x0010,0x0020,0x0040,0x0080,
2480 } /* reverse_8_bits() */
2482 static void install_operand(mode,val)
2488 the_ins.opcode[0]|=val & 0xFF; /* JF FF is for M kludge */
2491 the_ins.opcode[0]|=val<<9;
2494 the_ins.opcode[1]|=val<<12;
2497 the_ins.opcode[1]|=val<<6;
2500 the_ins.opcode[1]|=val;
2503 the_ins.opcode[2]|=val<<12;
2506 the_ins.opcode[2]|=val<<6;
2509 /* DANGER! This is a hack to force cas2l and cas2w cmds
2510 to be three words long! */
2512 the_ins.opcode[2]|=val;
2515 the_ins.opcode[1]|=val<<7;
2518 the_ins.opcode[1]|=val<<10;
2522 the_ins.opcode[1]|=val<<5;
2527 the_ins.opcode[1]|=(val<<10)|(val<<7);
2530 the_ins.opcode[1]|=(val<<12)|val;
2533 the_ins.opcode[0]|=val=0xff;
2536 the_ins.opcode[0]|=val<<9;
2539 the_ins.opcode[1]|=val;
2542 the_ins.opcode[1]|=val;
2543 the_ins.numo++; /* What a hack */
2546 the_ins.opcode[1]|=val<<4;
2553 the_ins.opcode[0] |= (val << 6);
2556 the_ins.opcode[1] = (val >> 16);
2557 the_ins.opcode[2] = val & 0xffff;
2561 as_fatal("failed sanity check.");
2563 } /* install_operand() */
2565 static void install_gen_operand(mode,val)
2571 the_ins.opcode[0]|=val;
2574 /* This is a kludge!!! */
2575 the_ins.opcode[0]|=(val&0x07)<<9|(val&0x38)<<3;
2584 the_ins.opcode[0]|=val;
2586 /* more stuff goes here */
2588 as_fatal("failed sanity check.");
2590 } /* install_gen_operand() */
2593 * verify that we have some number of paren pairs, do m68k_ip_op(), and
2594 * then deal with the bitfield hack.
2597 static char *crack_operand(str,opP)
2599 register struct m68k_op *opP;
2601 register int parens;
2603 register char *beg_str;
2609 for(parens=0;*str && (parens>0 || notend(str));str++) {
2610 if(*str=='(') parens++;
2611 else if(*str==')') {
2612 if(!parens) { /* ERROR */
2613 opP->error="Extra )";
2619 if(!*str && parens) { /* ERROR */
2620 opP->error="Missing )";
2625 if(m68k_ip_op(beg_str,opP)==FAIL) {
2631 c= *++str; /* JF bitfield hack */
2635 as_bad("Missing operand");
2640 /* See the comment up above where the #define notend(... is */
2645 if(*s==',') return 0;
2646 if(*s=='{' || *s=='}')
2648 if(*s!=':') return 1;
2649 /* This kludge here is for the division cmd, which is a kludge */
2650 if(index("aAdD#",s[1])) return 0;
2655 /* This is the guts of the machine-dependent assembler. STR points to a
2656 machine dependent instruction. This function is supposed to emit
2657 the frags/bytes it assembles to.
2668 int shorts_this_frag;
2670 bzero((char *)(&the_ins),sizeof(the_ins)); /* JF for paranoia sake */
2674 for(n=the_ins.numargs;n;--n)
2675 if(the_ins.operands[n].error) {
2676 er=the_ins.operands[n].error;
2681 as_bad("\"%s\" -- Statement '%s' ignored",er,str);
2685 if(the_ins.nfrag==0) { /* No frag hacking involved; just put it out */
2686 toP=frag_more(2*the_ins.numo);
2687 fromP= &the_ins.opcode[0];
2688 for(m=the_ins.numo;m;--m) {
2689 md_number_to_chars(toP,(long)(*fromP),2);
2693 /* put out symbol-dependent info */
2694 for(m=0;m<the_ins.nrel;m++) {
2695 switch(the_ins.reloc[m].wid) {
2712 as_fatal("Don't know how to figure width of %c in md_assemble()",the_ins.reloc[m].wid);
2716 (toP-frag_now->fr_literal)-the_ins.numo*2+the_ins.reloc[m].n,
2718 the_ins.reloc[m].add,
2719 the_ins.reloc[m].sub,
2720 the_ins.reloc[m].off,
2721 the_ins.reloc[m].pcrel,
2727 /* There's some frag hacking */
2728 for(n=0,fromP= &the_ins.opcode[0];n<the_ins.nfrag;n++) {
2731 if(n==0) wid=2*the_ins.fragb[n].fragoff;
2732 else wid=2*(the_ins.numo-the_ins.fragb[n-1].fragoff);
2736 for(m=wid/2;m;--m) {
2737 md_number_to_chars(toP,(long)(*fromP),2);
2742 for(m=0;m<the_ins.nrel;m++) {
2743 if((the_ins.reloc[m].n)>= 2*shorts_this_frag /* 2*the_ins.fragb[n].fragoff */) {
2744 the_ins.reloc[m].n-= 2*shorts_this_frag /* 2*the_ins.fragb[n].fragoff */;
2747 wid=the_ins.reloc[m].wid;
2750 the_ins.reloc[m].wid=0;
2751 wid = (wid=='b') ? 1 : (wid=='w') ? 2 : (wid=='l') ? 4 : 4000;
2754 (toP-frag_now->fr_literal)-the_ins.numo*2+the_ins.reloc[m].n,
2756 the_ins.reloc[m].add,
2757 the_ins.reloc[m].sub,
2758 the_ins.reloc[m].off,
2759 the_ins.reloc[m].pcrel,
2762 know(the_ins.fragb[n].fadd);
2763 (void)frag_var(rs_machine_dependent,10,0,(relax_substateT)(the_ins.fragb[n].fragty),
2764 the_ins.fragb[n].fadd,the_ins.fragb[n].foff,to_beg_P);
2766 n=(the_ins.numo-the_ins.fragb[n-1].fragoff);
2769 toP=frag_more(n*sizeof(short));
2771 md_number_to_chars(toP,(long)(*fromP),2);
2777 for(m=0;m<the_ins.nrel;m++) {
2780 wid=the_ins.reloc[m].wid;
2783 the_ins.reloc[m].wid=0;
2784 wid = (wid=='b') ? 1 : (wid=='w') ? 2 : (wid=='l') ? 4 : 4000;
2787 (the_ins.reloc[m].n + toP-frag_now->fr_literal)-/* the_ins.numo */ shorts_this_frag*2,
2789 the_ins.reloc[m].add,
2790 the_ins.reloc[m].sub,
2791 the_ins.reloc[m].off,
2792 the_ins.reloc[m].pcrel,
2797 /* This function is called once, at assembler startup time. This should
2798 set up all the tables, etc that the MD part of the assembler needs
2804 * md_begin -- set up hash tables with 68000 instructions.
2805 * similar to what the vax assembler does. ---phr
2807 /* RMS claims the thing to do is take the m68k-opcode.h table, and make
2808 a copy of it at runtime, adding in the information we want but isn't
2809 there. I think it'd be better to have an awk script hack the table
2810 at compile time. Or even just xstr the table and use it as-is. But
2811 my lord ghod hath spoken, so we do it this way. Excuse the ugly var
2814 register const struct m68k_opcode *ins;
2815 register struct m68k_incant *hack,
2817 register char *retval = 0; /* empty string, or error msg text */
2818 register unsigned int i;
2821 if ((op_hash = hash_new()) == NULL)
2822 as_fatal("Virtual memory exhausted");
2824 obstack_begin(&robyn,4000);
2825 for (ins = m68k_opcodes; ins < endop; ins++) {
2826 hack=slak=(struct m68k_incant *)obstack_alloc(&robyn,sizeof(struct m68k_incant));
2828 /* we *could* ignore insns that don't match our
2829 arch here but just leaving them out of the
2831 slak->m_operands=ins->args;
2832 slak->m_opnum=strlen(slak->m_operands)/2;
2833 slak->m_arch = ins->arch;
2834 slak->m_opcode=ins->opcode;
2835 /* This is kludgey */
2836 slak->m_codenum=((ins->match)&0xffffL) ? 2 : 1;
2837 if((ins+1)!=endop && !strcmp(ins->name,(ins+1)->name)) {
2838 slak->m_next=(struct m68k_incant *) obstack_alloc(&robyn,sizeof(struct m68k_incant));
2845 retval = hash_insert (op_hash, ins->name,(char *)hack);
2846 /* Didn't his mommy tell him about null pointers? */
2847 if(retval && *retval)
2848 as_fatal("Internal Error: Can't hash %s: %s",ins->name,retval);
2851 for (i = 0; i < sizeof(mklower_table) ; i++)
2852 mklower_table[i] = (isupper(c = (char) i)) ? tolower(c) : c;
2854 for (i = 0 ; i < sizeof(notend_table) ; i++) {
2855 notend_table[i] = 0;
2856 alt_notend_table[i] = 0;
2858 notend_table[','] = 1;
2859 notend_table['{'] = 1;
2860 notend_table['}'] = 1;
2861 alt_notend_table['a'] = 1;
2862 alt_notend_table['A'] = 1;
2863 alt_notend_table['d'] = 1;
2864 alt_notend_table['D'] = 1;
2865 alt_notend_table['#'] = 1;
2866 alt_notend_table['f'] = 1;
2867 alt_notend_table['F'] = 1;
2868 #ifdef REGISTER_PREFIX
2869 alt_notend_table[REGISTER_PREFIX] = 1;
2874 #define notend(s) ((*s == ',' || *s == '}' || *s == '{' \
2875 || (*s == ':' && strchr("aAdD#", s[1]))) \
2879 /* This funciton is called once, before the assembler exits. It is
2880 supposed to do any final cleanup for this part of the assembler.
2887 /* Equal to MAX_PRECISION in atof-ieee.c */
2888 #define MAX_LITTLENUMS 6
2890 /* Turn a string in input_line_pointer into a floating point constant of type
2891 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
2892 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
2895 md_atof(type,litP,sizeP)
2901 LITTLENUM_TYPE words[MAX_LITTLENUMS];
2902 LITTLENUM_TYPE *wordP;
2933 return "Bad call to MD_ATOF()";
2935 t=atof_ieee(input_line_pointer,type,words);
2937 input_line_pointer=t;
2939 *sizeP=prec * sizeof(LITTLENUM_TYPE);
2940 for(wordP=words;prec--;) {
2941 md_number_to_chars(litP,(long)(*wordP++),sizeof(LITTLENUM_TYPE));
2942 litP+=sizeof(LITTLENUM_TYPE);
2944 return ""; /* Someone should teach Dean about null pointers */
2947 /* Turn an integer of n bytes (in val) into a stream of bytes appropriate
2948 for use in the a.out file, and stores them in the array pointed to by buf.
2949 This knows about the endian-ness of the target machine and does
2950 THE RIGHT THING, whatever it is. Possible values for n are 1 (byte)
2951 2 (short) and 4 (long) Floating numbers are put out as a series of
2952 LITTLENUMS (shorts, here at least)
2955 md_number_to_chars(buf,val,n)
2975 as_fatal("failed sanity check.");
2980 md_apply_fix(fixP, val)
2984 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
2986 switch(fixP->fx_size) {
3001 BAD_CASE (fixP->fx_size);
3006 /* *fragP has been relaxed to its final size, and now needs to have
3007 the bytes inside it modified to conform to the new size There is UGLY
3011 md_convert_frag(headers, fragP)
3012 object_headers *headers;
3013 register fragS *fragP;
3018 /* Address in object code of the displacement. */
3019 register int object_address = fragP -> fr_fix + fragP -> fr_address;
3021 #ifdef IBM_COMPILER_SUX
3022 /* This is wrong but it convinces the native rs6000 compiler to
3023 generate the code we want. */
3024 register char *buffer_address = fragP -> fr_literal;
3025 buffer_address += fragP -> fr_fix;
3026 #else /* IBM_COMPILER_SUX */
3027 /* Address in gas core of the place to store the displacement. */
3028 register char *buffer_address = fragP->fr_fix + fragP->fr_literal;
3029 #endif /* IBM_COMPILER_SUX */
3031 /* No longer true: know(fragP->fr_symbol); */
3033 /* The displacement of the address, from current location. */
3034 disp = fragP->fr_symbol ? S_GET_VALUE(fragP->fr_symbol) : 0;
3035 disp = (disp + fragP->fr_offset) - object_address;
3037 switch(fragP->fr_subtype) {
3038 case TAB(BCC68000,BYTE):
3039 case TAB(BRANCH,BYTE):
3040 know(issbyte(disp));
3042 as_bad("short branch with zero offset: use :w");
3043 fragP->fr_opcode[1]=disp;
3046 case TAB(DBCC,SHORT):
3047 know(issword(disp));
3050 case TAB(BCC68000,SHORT):
3051 case TAB(BRANCH,SHORT):
3052 know(issword(disp));
3053 fragP->fr_opcode[1]=0x00;
3056 case TAB(BRANCH,LONG):
3057 if (current_architecture <= m68010) {
3058 if (fragP->fr_opcode[0]==0x61) {
3059 fragP->fr_opcode[0]= 0x4E;
3060 fragP->fr_opcode[1]= 0xB9; /* JBSR with ABSL LONG offset */
3061 subseg_change(SEG_TEXT, 0);
3074 } else if (fragP->fr_opcode[0]==0x60) {
3075 fragP->fr_opcode[0]= 0x4E;
3076 fragP->fr_opcode[1]= 0xF9; /* JMP with ABSL LONG offset */
3077 subseg_change(SEG_TEXT, 0);
3078 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0, fragP->fr_offset,0,
3083 as_bad("Long branch offset not supported.");
3086 fragP->fr_opcode[1]=0xff;
3090 case TAB(BCC68000,LONG):
3091 /* only Bcc 68000 instructions can come here */
3092 /* change bcc into b!cc/jmp absl long */
3093 fragP->fr_opcode[0] ^= 0x01; /* invert bcc */
3094 fragP->fr_opcode[1] = 0x6; /* branch offset = 6 */
3096 /* JF: these used to be fr_opcode[2,3], but they may be in a
3097 different frag, in which case refering to them is a no-no.
3098 Only fr_opcode[0,1] are guaranteed to work. */
3099 *buffer_address++ = 0x4e; /* put in jmp long (0x4ef9) */
3100 *buffer_address++ = 0xf9;
3101 fragP->fr_fix += 2; /* account for jmp instruction */
3102 subseg_change(SEG_TEXT,0);
3103 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0,
3109 case TAB(DBCC,LONG):
3110 /* only DBcc 68000 instructions can come here */
3111 /* change dbcc into dbcc/jmp absl long */
3112 /* JF: these used to be fr_opcode[2-7], but that's wrong */
3113 *buffer_address++ = 0x00; /* branch offset = 4 */
3114 *buffer_address++ = 0x04;
3115 *buffer_address++ = 0x60; /* put in bra pc+6 */
3116 *buffer_address++ = 0x06;
3117 *buffer_address++ = 0x4e; /* put in jmp long (0x4ef9) */
3118 *buffer_address++ = 0xf9;
3120 fragP->fr_fix += 6; /* account for bra/jmp instructions */
3121 subseg_change(SEG_TEXT,0);
3122 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0,
3128 case TAB(FBRANCH,SHORT):
3129 know((fragP->fr_opcode[1]&0x40)==0);
3132 case TAB(FBRANCH,LONG):
3133 fragP->fr_opcode[1]|=0x40; /* Turn on LONG bit */
3136 case TAB(PCREL,SHORT):
3139 case TAB(PCREL,LONG):
3140 /* The thing to do here is force it to ABSOLUTE LONG, since
3141 PCREL is really trying to shorten an ABSOLUTE address anyway */
3142 /* JF FOO This code has not been tested */
3143 subseg_change(SEG_TEXT,0);
3144 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0, fragP->fr_offset, 0, NO_RELOC);
3145 if((fragP->fr_opcode[1] & 0x3F) != 0x3A)
3146 as_bad("Internal error (long PC-relative operand) for insn 0x%04lx at 0x%lx",
3147 fragP->fr_opcode[0],fragP->fr_address);
3148 fragP->fr_opcode[1]&= ~0x3F;
3149 fragP->fr_opcode[1]|=0x39; /* Mode 7.1 */
3151 /* md_number_to_chars(buffer_address,
3152 (long)(fragP->fr_symbol->sy_value + fragP->fr_offset),
3156 case TAB(PCLEA,SHORT):
3157 subseg_change(SEG_TEXT,0);
3158 fix_new(fragP,(int)(fragP->fr_fix),2,fragP->fr_symbol,(symbolS *)0,fragP->fr_offset,1,
3160 fragP->fr_opcode[1] &= ~0x3F;
3161 fragP->fr_opcode[1] |= 0x3A;
3164 case TAB(PCLEA,LONG):
3165 subseg_change(SEG_TEXT,0);
3166 fix_new(fragP,(int)(fragP->fr_fix)+2,4,fragP->fr_symbol,(symbolS *)0,fragP->fr_offset+2,1,
3168 *buffer_address++ = 0x01;
3169 *buffer_address++ = 0x70;
3171 /* buffer_address+=2; */
3175 } /* switch on subtype */
3178 md_number_to_chars(buffer_address, (long) disp, (int) ext);
3179 fragP->fr_fix += ext;
3180 /* H_SET_TEXT_SIZE(headers, H_GET_TEXT_SIZE(headers) + ext); */
3181 } /* if extending */
3184 } /* md_convert_frag() */
3186 /* Force truly undefined symbols to their maximum size, and generally set up
3187 the frag list to be relaxed
3189 int md_estimate_size_before_relax(fragP, segment)
3190 register fragS *fragP;
3194 register char *buffer_address = fragP->fr_fix + fragP->fr_literal;
3196 old_fix = fragP->fr_fix;
3198 /* handle SZ_UNDEF first, it can be changed to BYTE or SHORT */
3199 switch(fragP->fr_subtype) {
3201 case TAB(BCC68000,SZ_UNDEF): {
3202 if((fragP->fr_symbol != NULL)
3203 && S_GET_SEGMENT(fragP->fr_symbol) == segment) {
3204 fragP->fr_subtype=TAB(BCC68000,BYTE);
3207 /* only Bcc 68000 instructions can come here */
3208 /* change bcc into b!cc/jmp absl long */
3209 fragP->fr_opcode[0] ^= 0x01; /* invert bcc */
3211 fragP->fr_opcode[1] = 0x04; /* branch offset = 6 */
3212 /* JF: these were fr_opcode[2,3] */
3213 buffer_address[0] = 0x4e; /* put in jmp long (0x4ef9) */
3214 buffer_address[1] = 0xf8;
3215 fragP->fr_fix += 2; /* account for jmp instruction */
3216 subseg_change(SEG_TEXT,0);
3217 fix_new(fragP, fragP->fr_fix, 2, fragP->fr_symbol, 0,
3218 fragP->fr_offset, 0, NO_RELOC);
3221 fragP->fr_opcode[1] = 0x06; /* branch offset = 6 */
3222 /* JF: these were fr_opcode[2,3] */
3223 buffer_address[2] = 0x4e; /* put in jmp long (0x4ef9) */
3224 buffer_address[3] = 0xf9;
3225 fragP->fr_fix += 2; /* account for jmp instruction */
3226 subseg_change(SEG_TEXT,0);
3227 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0,
3228 fragP->fr_offset, 0, NO_RELOC);
3233 } /* case TAB(BCC68000,SZ_UNDEF) */
3235 case TAB(DBCC,SZ_UNDEF): {
3236 if (fragP->fr_symbol != NULL && S_GET_SEGMENT(fragP->fr_symbol) == segment) {
3237 fragP->fr_subtype=TAB(DBCC,SHORT);
3241 /* only DBcc 68000 instructions can come here */
3242 /* change dbcc into dbcc/jmp absl long */
3243 /* JF: these used to be fr_opcode[2-4], which is wrong. */
3244 buffer_address[0] = 0x00; /* branch offset = 4 */
3245 buffer_address[1] = 0x04;
3246 buffer_address[2] = 0x60; /* put in bra pc + ... */
3249 /* JF: these were fr_opcode[5-7] */
3250 buffer_address[3] = 0x04; /* plus 4 */
3251 buffer_address[4] = 0x4e;/* Put in Jump Word */
3252 buffer_address[5] = 0xf8;
3253 fragP->fr_fix += 6; /* account for bra/jmp instruction */
3254 subseg_change(SEG_TEXT,0);
3255 fix_new(fragP, fragP->fr_fix, 2, fragP->fr_symbol, 0,
3256 fragP->fr_offset, 0, NO_RELOC);
3259 /* JF: these were fr_opcode[5-7] */
3260 buffer_address[3] = 0x06; /* Plus 6 */
3261 buffer_address[4] = 0x4e; /* put in jmp long (0x4ef9) */
3262 buffer_address[5] = 0xf9;
3263 fragP->fr_fix += 6; /* account for bra/jmp instruction */
3264 subseg_change(SEG_TEXT,0);
3265 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0,
3266 fragP->fr_offset, 0, NO_RELOC);
3272 } /* case TAB(DBCC,SZ_UNDEF) */
3274 case TAB(BRANCH,SZ_UNDEF): {
3275 if((fragP->fr_symbol != NULL) /* Not absolute */
3276 && S_GET_SEGMENT(fragP->fr_symbol) == segment) {
3277 fragP->fr_subtype=TAB(TABTYPE(fragP->fr_subtype),BYTE);
3279 } else if((fragP->fr_symbol == 0) || (current_architecture <= m68010)) {
3280 /* On 68000, or for absolute value, switch to abs long */
3281 /* FIXME, we should check abs val, pick short or long */
3282 if(fragP->fr_opcode[0]==0x61) {
3283 fragP->fr_opcode[0]= 0x4E;
3284 fragP->fr_opcode[1]= 0xB9; /* JBSR with ABSL LONG offset */
3285 subseg_change(SEG_TEXT, 0);
3286 fix_new(fragP, fragP->fr_fix, 4,
3287 fragP->fr_symbol, 0, fragP->fr_offset, 0, NO_RELOC);
3290 } else if(fragP->fr_opcode[0]==0x60) {
3291 fragP->fr_opcode[0]= 0x4E;
3292 fragP->fr_opcode[1]= 0xF9; /* JMP with ABSL LONG offset */
3293 subseg_change(SEG_TEXT, 0);
3294 fix_new(fragP, fragP->fr_fix, 4,
3295 fragP->fr_symbol, 0, fragP->fr_offset, 0, NO_RELOC);
3299 as_warn("Long branch offset to extern symbol not supported.");
3301 } else { /* Symbol is still undefined. Make it simple */
3302 fix_new(fragP, (int)(fragP->fr_fix), 4, fragP->fr_symbol,
3303 (symbolS *)0, fragP->fr_offset+4, 1, NO_RELOC);
3305 fragP->fr_opcode[1]=0xff;
3311 } /* case TAB(BRANCH,SZ_UNDEF) */
3313 case TAB(PCLEA,SZ_UNDEF): {
3314 if ((S_GET_SEGMENT(fragP->fr_symbol))==segment || flagseen['l']) {
3315 fragP->fr_subtype=TAB(PCLEA,SHORT);
3318 fragP->fr_subtype=TAB(PCLEA,LONG);
3322 } /* TAB(PCLEA,SZ_UNDEF) */
3324 case TAB(PCREL,SZ_UNDEF): {
3325 if(S_GET_SEGMENT(fragP->fr_symbol) == segment || flagseen['l']) {
3326 fragP->fr_subtype = TAB(PCREL,SHORT);
3329 fragP->fr_subtype = TAB(PCREL,LONG);
3333 } /* TAB(PCREL,SZ_UNDEF) */
3338 } /* switch on subtype looking for SZ_UNDEF's. */
3340 /* now that SZ_UNDEF are taken care of, check others */
3341 switch(fragP->fr_subtype) {
3342 case TAB(BCC68000,BYTE):
3343 case TAB(BRANCH,BYTE):
3344 /* We can't do a short jump to the next instruction,
3345 so we force word mode. */
3346 if (fragP->fr_symbol && S_GET_VALUE(fragP->fr_symbol)==0 &&
3347 fragP->fr_symbol->sy_frag==fragP->fr_next) {
3348 fragP->fr_subtype=TAB(TABTYPE(fragP->fr_subtype),SHORT);
3355 return fragP->fr_var + fragP->fr_fix - old_fix;
3358 #if defined(OBJ_AOUT) | defined(OBJ_BOUT)
3359 /* the bit-field entries in the relocation_info struct plays hell
3360 with the byte-order problems of cross-assembly. So as a hack,
3361 I added this mach. dependent ri twiddler. Ugly, but it gets
3363 /* on m68k: first 4 bytes are normal unsigned long, next three bytes
3364 are symbolnum, most sig. byte first. Last byte is broken up with
3365 bit 7 as pcrel, bits 6 & 5 as length, bit 4 as pcrel, and the lower
3366 nibble as nuthin. (on Sun 3 at least) */
3367 /* Translate the internal relocation information into target-specific
3371 md_ri_to_chars(the_bytes, ri)
3373 struct reloc_info_generic *ri;
3376 md_number_to_chars(the_bytes, ri->r_address, 4);
3377 /* now the fun stuff */
3378 the_bytes[4] = (ri->r_symbolnum >> 16) & 0x0ff;
3379 the_bytes[5] = (ri->r_symbolnum >> 8) & 0x0ff;
3380 the_bytes[6] = ri->r_symbolnum & 0x0ff;
3381 the_bytes[7] = (((ri->r_pcrel << 7) & 0x80) | ((ri->r_length << 5) & 0x60) |
3382 ((ri->r_extern << 4) & 0x10));
3384 #endif /* comment */
3386 void tc_aout_fix_to_chars(where, fixP, segment_address_in_file)
3389 relax_addressT segment_address_in_file;
3392 * In: length of relocation (or of address) in chars: 1, 2 or 4.
3393 * Out: GNU LD relocation length code: 0, 1, or 2.
3396 static unsigned char nbytes_r_length [] = { 42, 0, 1, 42, 2 };
3402 md_number_to_chars(where,
3403 fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file,
3406 /* now the fun stuff */
3407 if (S_GET_TYPE(fixP->fx_addsy) == N_UNDF) {
3409 r_symbolnum = fixP->fx_addsy->sy_number;
3412 r_symbolnum = S_GET_TYPE(fixP->fx_addsy);
3415 where[4] = (r_symbolnum >> 16) & 0x0ff;
3416 where[5] = (r_symbolnum >> 8) & 0x0ff;
3417 where[6] = r_symbolnum & 0x0ff;
3418 where[7] = (((fixP->fx_pcrel << 7) & 0x80) | ((nbytes_r_length[fixP->fx_size] << 5) & 0x60) |
3419 ((r_extern << 4) & 0x10));
3422 } /* tc_aout_fix_to_chars() */
3424 #endif /* OBJ_AOUT or OBJ_BOUT */
3426 #ifndef WORKING_DOT_WORD
3427 const int md_short_jump_size = 4;
3428 const int md_long_jump_size = 6;
3431 md_create_short_jump(ptr,from_addr,to_addr,frag,to_symbol)
3440 offset = to_addr - (from_addr+2);
3442 md_number_to_chars(ptr ,(long)0x6000,2);
3443 md_number_to_chars(ptr+2,(long)offset,2);
3447 md_create_long_jump(ptr,from_addr,to_addr,frag,to_symbol)
3456 if (current_architecture <= m68010) {
3457 offset=to_addr-S_GET_VALUE(to_symbol);
3458 md_number_to_chars(ptr ,(long)0x4EF9,2);
3459 md_number_to_chars(ptr+2,(long)offset,4);
3460 fix_new(frag,(ptr+2)-frag->fr_literal,4,to_symbol,(symbolS *)0,(long)0,0,
3463 offset=to_addr - (from_addr+2);
3464 md_number_to_chars(ptr ,(long)0x60ff,2);
3465 md_number_to_chars(ptr+2,(long)offset,4);
3470 /* Different values of OK tell what its OK to return. Things that aren't OK are an error (what a shock, no?)
3473 10: Absolute 1:8 only
3474 20: Absolute 0:7 only
3475 30: absolute 0:15 only
3476 40: Absolute 0:31 only
3477 50: absolute 0:127 only
3478 55: absolute -64:63 only
3479 60: absolute -128:127 only
3480 70: absolute 0:4095 only
3485 static int get_num(exp,ok)
3486 struct m68k_exp *exp;
3494 if(*exp->e_beg=='0') {
3495 if(exp->e_beg[1]=='x')
3496 sscanf(exp->e_beg+2,"%x",&l);
3498 sscanf(exp->e_beg+1,"%O",&l);
3501 return atol(exp->e_beg);
3507 /* Can't do anything */
3510 if(!exp->e_beg || !exp->e_end) {
3511 seg(exp)=SEG_ABSOLUTE;
3514 offs(exp)= (ok==10) ? 1 : 0;
3515 as_warn("Null expression defaults to %ld",offs(exp));
3520 if(/* ok!=80 && */exp->e_end[-1]==':' && (exp->e_end-exp->e_beg)>=2) {
3521 switch(exp->e_end[0]) {
3537 as_bad("Unknown size for expression \"%c\"",exp->e_end[0]);
3541 c_save=exp->e_end[1];
3543 save_in=input_line_pointer;
3544 input_line_pointer=exp->e_beg;
3545 switch(expression(&(exp->e_exp))) {
3547 seg(exp)=SEG_ABSOLUTE;
3550 offs(exp)= (ok==10) ? 1 : 0;
3551 as_warn("Unknown expression: '%s' defaulting to %d",exp->e_beg,offs(exp));
3555 /* Do the same thing the VAX asm does */
3556 seg(exp)=SEG_ABSOLUTE;
3561 as_warn("expression out of range: defaulting to 1");
3568 if(offs(exp)<1 || offs(exp)>8) {
3569 as_warn("expression out of range: defaulting to 1");
3574 if(offs(exp)<0 || offs(exp)>7)
3578 if(offs(exp)<0 || offs(exp)>15)
3582 if(offs(exp)<0 || offs(exp)>32)
3586 if(offs(exp)<0 || offs(exp)>127)
3590 if(offs(exp)<-64 || offs(exp)>63)
3594 if(offs(exp)<-128 || offs(exp)>127)
3598 if(offs(exp)<0 || offs(exp)>4095) {
3600 as_warn("expression out of range: defaulting to 0");
3612 case SEG_DIFFERENCE:
3613 if(ok>=10 && ok<=70) {
3614 seg(exp)=SEG_ABSOLUTE;
3617 offs(exp)= (ok==10) ? 1 : 0;
3618 as_warn("Can't deal with expression \"%s\": defaulting to %ld",exp->e_beg,offs(exp));
3622 if(ok==80 && offs(exp)<0) { /* HACK! Turn it into a long */
3623 LITTLENUM_TYPE words[6];
3625 gen_to_words(words,2,8L);/* These numbers are magic! */
3626 seg(exp)=SEG_ABSOLUTE;
3629 offs(exp)=words[1]|(words[0]<<16);
3631 seg(exp)=SEG_ABSOLUTE;
3634 offs(exp)= (ok==10) ? 1 : 0;
3635 as_warn("Can't deal with expression \"%s\": defaulting to %ld",exp->e_beg,offs(exp));
3639 as_fatal("failed sanity check.");
3641 if(input_line_pointer!=exp->e_end+1)
3642 as_bad("Ignoring junk after expression");
3643 exp->e_end[1]=c_save;
3644 input_line_pointer=save_in;
3646 switch(exp->e_siz) {
3648 if(!isbyte(offs(exp)))
3649 as_warn("expression doesn't fit in BYTE");
3652 if(!isword(offs(exp)))
3653 as_warn("expression doesn't fit in WORD");
3661 /* These are the back-ends for the various machine dependent pseudo-ops. */
3662 void demand_empty_rest_of_line(); /* Hate those extra verbose names */
3664 static void s_data1() {
3665 subseg_new(SEG_DATA,1);
3666 demand_empty_rest_of_line();
3669 static void s_data2() {
3670 subseg_new(SEG_DATA,2);
3671 demand_empty_rest_of_line();
3674 static void s_bss() {
3675 /* We don't support putting frags in the BSS segment, but we
3676 can put them into initialized data for now... */
3677 subseg_new(SEG_DATA,255); /* FIXME-SOON */
3678 demand_empty_rest_of_line();
3681 static void s_even() {
3683 register long temp_fill;
3685 temp = 1; /* JF should be 2? */
3686 temp_fill = get_absolute_expression ();
3687 if ( ! need_pass_2 ) /* Never make frag if expect extra pass. */
3688 frag_align (temp, (int)temp_fill);
3689 demand_empty_rest_of_line();
3692 static void s_proc() {
3693 demand_empty_rest_of_line();
3696 /* s_space is defined in read.c .skip is simply an alias to it. */
3700 * Invocation line includes a switch not recognized by the base assembler.
3701 * See if it's a processor-specific option. These are:
3703 * -[A]m[c]68000, -[A]m[c]68008, -[A]m[c]68010, -[A]m[c]68020, -[A]m[c]68030, -[A]m[c]68040
3704 * -[A]m[c]68881, -[A]m[c]68882, -[A]m[c]68851
3705 * Select the architecture. Instructions or features not
3706 * supported by the selected architecture cause fatal
3707 * errors. More than one may be specified. The default is
3708 * -m68020 -m68851 -m68881. Note that -m68008 is a synonym
3709 * for -m68000, and -m68882 is a synonym for -m68881.
3713 int md_parse_option(argP,cntP,vecP)
3719 case 'l': /* -l means keep external to 2 bit offset
3720 rather than 16 bit one */
3723 case 'S': /* -S means that jbsr's always turn into jsr's. */
3728 /* intentional fall-through */
3734 } /* allow an optional "c" */
3736 if (!strcmp(*argP, "68000")
3737 || !strcmp(*argP, "68008")) {
3738 current_architecture |= m68000;
3739 } else if (!strcmp(*argP, "68010")) {
3741 omagic= 1<<16|OMAGIC;
3743 current_architecture |= m68010;
3745 } else if (!strcmp(*argP, "68020")) {
3746 current_architecture |= m68020;
3748 } else if (!strcmp(*argP, "68030")) {
3749 current_architecture |= m68030;
3751 } else if (!strcmp(*argP, "68040")) {
3752 current_architecture |= m68040;
3755 } else if (!strcmp(*argP, "68881")
3756 || !strcmp(*argP, "68882")) {
3757 current_architecture |= m68040;
3759 #endif /* NO_68881 */
3761 } else if (!strcmp(*argP,"68851")) {
3762 current_architecture |= m68040;
3764 #endif /* NO_68851 */
3766 as_warn("Unknown architecture, \"%s\". option ignored", *argP);
3767 } /* switch on architecture */
3769 while(**argP) (*argP)++;
3774 if (!strcmp(*argP,"pic")) {
3776 break; /* -pic, Position Independent Code */
3790 /* TEST2: Test md_assemble() */
3791 /* Warning, this routine probably doesn't work anymore */
3795 struct m68k_it the_ins;
3802 if(!gets(buf) || !*buf)
3804 if(buf[0]=='|' || buf[1]=='.')
3806 for(cp=buf;*cp;cp++)
3811 bzero(&the_ins,sizeof(the_ins));
3812 m68k_ip(&the_ins,buf);
3814 printf("Error %s in %s\n",the_ins.error,buf);
3816 printf("Opcode(%d.%s): ",the_ins.numo,the_ins.args);
3817 for(n=0;n<the_ins.numo;n++)
3818 printf(" 0x%x",the_ins.opcode[n]&0xffff);
3820 print_the_insn(&the_ins.opcode[0],stdout);
3821 (void)putchar('\n');
3823 for(n=0;n<strlen(the_ins.args)/2;n++) {
3824 if(the_ins.operands[n].error) {
3825 printf("op%d Error %s in %s\n",n,the_ins.operands[n].error,buf);
3828 printf("mode %d, reg %d, ",the_ins.operands[n].mode,the_ins.operands[n].reg);
3829 if(the_ins.operands[n].b_const)
3830 printf("Constant: '%.*s', ",1+the_ins.operands[n].e_const-the_ins.operands[n].b_const,the_ins.operands[n].b_const);
3831 printf("ireg %d, isiz %d, imul %d, ",the_ins.operands[n].ireg,the_ins.operands[n].isiz,the_ins.operands[n].imul);
3832 if(the_ins.operands[n].b_iadd)
3833 printf("Iadd: '%.*s',",1+the_ins.operands[n].e_iadd-the_ins.operands[n].b_iadd,the_ins.operands[n].b_iadd);
3834 (void)putchar('\n');
3846 while(*str && *str!=' ')
3848 if(str[-1]==':' || str[1]=='=')
3855 /* Possible states for relaxation:
3857 0 0 branch offset byte (bra, etc)
3861 1 0 indexed offsets byte a0@(32,d4:w:1) etc
3865 2 0 two-offset index word-word a0@(32,d4)@(45) etc
3901 extern fragS *text_frag_root;
3903 for(fragP=text_frag_root;fragP;fragP=fragP->fr_next) {
3904 printf("addr %lu next 0x%x fix %ld var %ld symbol 0x%x offset %ld\n",
3905 fragP->fr_address,fragP->fr_next,fragP->fr_fix,fragP->fr_var,fragP->fr_symbol,fragP->fr_offset);
3906 printf("opcode 0x%x type %d subtype %d\n\n",fragP->fr_opcode,fragP->fr_type,fragP->fr_subtype);
3918 fputs("Internal error:",stderr);
3919 _doprnt(format,&args,stderr);
3920 (void)putc('\n',stderr);
3926 /* We have no need to default values of symbols. */
3930 md_undefined_symbol (name)
3936 /* Parse an operand that is machine-specific.
3937 We just return without modifying the expression if we have nothing
3942 md_operand (expressionP)
3943 expressionS *expressionP;
3947 /* Round up a section size to the appropriate boundary. */
3949 md_section_align (segment, size)
3953 return size; /* Byte alignment is fine */
3956 /* Exactly what point is a PC-relative offset relative TO?
3957 On the 68k, they're relative to the address of the offset, plus
3958 its size. (??? Is this right? FIXME-SOON!) */
3960 md_pcrel_from (fixP)
3963 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address;
3973 /* end of tc-m68k.c */