3 * m10200-dis.c (print_insn_mn10200): Recognize 'break' pseudo-op.
8 * m10300-opc.c: Support for 3 byte and 4 byte extended instructions
14 * i386-dis.c: Add support for fxsave, fxrstor, sysenter and
19 * mips-dis.c (print_insn_little_mips): Previously, instruction
20 printing references the symbol table to determine whether the
21 instruction resides in a block regular instructions or mips16
22 instructions. However, when the disassembler gets used in other
23 environments where the symbol table is not present, we no longer
24 rely in the symbol table, rather, use the low bit of the
25 instructions address to guess. There should be no change for usage
26 of the disassembler in host based programse, gdb ,objdump.
27 (print_insn_big_mips): ditto.
28 (print_insn_mips): ditto
32 * m10200-dis.c (print_insn_mn10200): Don't bomb on unknown opcodes.
37 * m10300-opc.c (USP, SSP, MSP, PC, IMM4, EPSW, RN0, RM1): New
38 operands for the am33.
39 (mn10300_opcodes): Add new instructions from the am33.
41 * m10300-opc.c (mn10300_opcodes): Change opcode for "syscall".
45 * i386-dis.c (index16): Add '%' to register names. Use ','
50 * i386-dis.c: Don't print opcode suffix when we can figure out the
51 size (and gas can!) by register operands, or from the default
53 (putop): Handle 'A', 'B', 'L', 'P', 'Q', 'R' macros. Rename 'C'
55 (dis386, dis386_twobyte, grps): Use new suffix macros.
56 (dis386): Correct imul Ib to imul sIb. Change jnl to jge to be
57 consistent. Add suffix for call, jmp, lcall, ljmp, iret. Reverse
58 order of cmps operands to agree with Intel docs. Correct operand
59 of aad and aam (Ib -> sIb). Change ud2b from 0fb8 to 0fb9 to
60 agree with Intel docs.
61 (print_insn_x86): Print orphan fwait before other prefixes.
62 Return correct byte count for orphan fwait with prefixes. Don't
63 print `bound' operands in reverse order.
64 (ckprefix): Stop accumulating prefixes if we get fwait.
65 (OP_DIR): Print `$' before Ap operands of ljmp, lcall.
69 * po/Make-in (all-yes): If maintainer mode, depend on .pot file.
70 ($(PACKAGE).pot): Unconditionally depend on POTFILES.
74 Fix problems when bfd_vma is wider than long.
75 * i386-dis.c: Make op_address and start_pc unsigned.
76 (set_op): Make parameter unsigned.
77 (print_insn_x86): Cast to bfd_vma when passing a value to
79 * ns32k-dis.c (CORE_ADDR): Don't define.
80 (print_insn_ns32k): Change type of addr to bfd_vma. Use
81 bfd_scan_vma to read back address.
82 (print_insn_arg): Change type of addr to bfd_vma. Use sprintf_vma
84 * m68k-dis.c (COERCE32): Cast to bfd_signed_vma to avoid overflow.
85 (NEXTULONG): New definition.
86 (print_insn_m68k): Avoid overflow when computing third argument of
88 (print_insn_arg): Use NEXTULONG to fetch 32 bit address values.
89 Use disp instead of val to store offset values.
90 (print_indexed): Use base_disp instead of word to store base
91 displacement, to avoid overflow.
92 * m10300-dis.c (disassemble): Cast value to long when computing
93 pc-relative address, to get correct sign extension.
97 * m32r-opc.c: Regenerate.
101 * arm-opc.h (thumb_opcodes): Display 'add rx, rY, #0' insns as
106 * d30v-opc.c: Remove FALG_MUL32 attribyte from MULX2H insn.
110 * i386-dis.c: Combine aflag and dflag into sizeflag. Change OP_*
112 (OP_DSreg): Rename from OP_DSSI.
113 (OP_ESreg): Rename from OP_ESDI.
114 (Xb, Xv, Yb, Yv): Use index reg code, not b_mode or v_mode.
116 (append_seg): Rename from append_prefix.
117 (ptr_reg): New function.
118 (dis386): Add S suffix to pushf, popf, ret, lret, enter, leave.
120 (PREFIX_ADDR): Rename from PREFIX_ADR.
121 (float_reg): Add non-broken opcodes for people who don't want
126 * m68k-opc.c (tstb, tstw, tstl): Don't allow pcrel on
131 * i386-dis.c (dis386): Change 0x60 to "pushaS", 0x61 to "popaS".
135 * ppc-opc.c (powerpc_macros): Support shifts and rotates of size
136 0; produce error message for shifts of size 32 (or 64 for 64-bit
137 shifts), because the hardware doesn't support them.
142 * mips-opc.c (c.lt.s): Remove r5900 specific variant.
145 * vu0.h (sqc2): Fix opcode.
147 * mips-opc.c (rsqrt.s): Update based on r5900 ISA manual version 2.1
151 start-sanitize-vr5400
154 * mips-opc.c (macc, maccu, macchi, macchiu, msac, msacu, msachi, msachiu):
155 Change pinfo to use WR_HILO.
161 * d30v-opc.c: Add new operand: Ra3. Change SHORT_B3, SHORT_B3b,
162 LONG_2, LONG_2b formats to use this new operand.
167 * sparc-dis.c (compute_arch_mask): Added bfd_mach_sparc_sparclite_le.
171 * sparc-dis.c (print_insn_sparc): big endian instruction / little
177 * d30v-opc.c (d30v_format_table): Change definition of SHORT_B3
178 and SHORT_B3b formats to use Rb instead of Ra.
180 Add FLAG_MUL16 to MUL2XH opcode.
182 Add FLAG_ADDSUBppp to SRC and SATHp opcodes to implement extension
183 to existing 1.1.1 parallelisation prohibition procedure.
188 * cgen-asm.in (insert_normal): Handle empty fields and 64 bit hosts.
189 * cgen-dis.in (extract_normal): Likewise.
190 * m32r-asm.c,m32r-dis.c: Regenerate.
195 * dvp-opc.c (parse_dotdest): Missing dest -> xyzw.
201 * mips-opc.c (multu1): Add two operand variant for the r5900.
206 * mips-dis.c (print_mips16_insn_arg): Handle type ']' correctly
207 with a shift count of 0.
212 * mips-opc.c (mult1): Add two-operand variety of mult1 for R5900.
216 * mips-dis.c (print_insn_arg): Handle ';' opcode completer.
217 (_print_insn_mips): Likewise.
218 * vu0.h (vopmula, vopmsub): Correctly handle opcode/operand
224 * cgen-opc.c (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
225 (cgen_hw_lookup_by_num): New function.
228 * m32r-opc.c, m32r-opc.h: Regenerate, delete h-abort.
233 * m32r-asm.c: Regenerate (handle uppercase HIGH/SHIGH/LOW/SDA).
237 * sparc-dis.c (print_insn_sparc): Always fetch instructions
238 as big-endian on SPARClite.
243 * m32r-opc.c: Regenerated - SPECIAL attribute added to some
245 * m32r-opc.h: Regenerated - SPECIAL attribute added to some
252 * d30v-opc.c (pre_defined_register): Remove alias for r0.
258 * mips-opc.c (break): Added 20-bit single-operand break
259 instruction for R5900 only.
264 * po/Make-in (install-info): New target.
268 * configure.in (WIN32LIBADD): Add -lintl on cygwin32.
269 * configure: Rebuild.
273 * mips-opc.c (teq,tge,tgeu,tlt,tltu,tne): Added three-operand
274 variety of ISA2 instructions to set bottom ten bits of trap code.
278 * Makefile.am (config.status): Add explicit target so that
279 config.status depends upon bfd/configure.in.
280 * Makefile.in: Rebuild.
284 * mips-opc.c (break, sdbbp): Added two-operand variety of ISA1
285 instructions to set bottom ten bits of break code.
286 * mips-dis.c (print_insn_arg): Implement 'q' operand format used
287 for above optional argument.
289 start-sanitize-cygnus
292 * cgen.sh: s/@ARCH@/${ARCH}/ in opc.h generation.
293 * m32r-opc.h: Regenerate.
298 * makefile.vms: Run dec c with /nodebug.
302 * Makefile.in: Rebuilt.
303 * Makefile.am: Regenerated dependencies with mkdep.
305 * opintl.h (_): Define as dgettext.
307 start-sanitize-cygnus
310 * configure.in: Add support for --enable-cgen-maint.
311 * Makefile.am (M32R_DEPS): New variable.
312 (m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c): Update dependencies.
313 * aclocal.m4: Regenerate.
314 * Makefile.in: Regenerate.
315 * configure: Regenerate.
317 * Makefile.am (CGENFILES): Add minsn.scm.
322 * cgen-asm.c: Internationalised.
323 start-sanitize-cygnus
324 * cgen-asm.in: Internationalised.
325 * cgen-opc.in: Internationalised.
327 * m32r-asm.c: Internationalised.
328 * m32r-dis.c: Internationalised.
329 * m32r-opc.c: Internationalised.
331 * aclocal.m4: Regenerated.
332 * configure: Regenerated.
333 * Makefile.am (POTFILES): Remove inclusion of BFD_H.
334 * Makefile.in: Rebuild.
335 * po/POTFILES.in: Rebuilt using rule in Makefile.in.
336 * po/opcodes.pot: Rebuilt after changing POTFILES.in.
340 * configure.in: Call AC_ISC_POSIX near start. Move CY_GNU_GETTEXT
342 * aclocal.m4, configure: Rebuild with current tools.
346 * opintl.h: New file - contains internationalisation macros used
347 by source files in this directory.
348 * po/: New subdirectory - contains internationalisation files.
349 * po/Make-in: New file - Makefile constructor.
350 * po/POTFILES.in: New file - list of files in opcodes directory
351 that should be scan for internationalisation macros.
352 * po/opcodes.pot: New file - list of internationisation strings
353 found in files mentioned in po/POTFILES.in.
354 * Makefile.am: Add rule to build po/POTFILES.in. Add SUBDIRS
355 entry. Add intl directory to include paths.
356 * acconfig.h: Add ENABLE_NLS, HAVE_CATGETS, HAVE_GETEXT,
357 HAVE_STRCPY, HAVE_LC_MESSAGES
358 * configure.in: Add rule to build Makefile in po subdirectory.
359 * Makefile.in: Rebuilt.
360 * aclocal.m4: Rebuilt.
361 * config.in: Rebuilt.
362 * configure: Rebuilt.
363 * alpha-opc.c: Internationalised.
364 * arc-dis.c: Internationalised.
365 * arc-opc.c: Internationalised.
366 * arm-dis.c: Internationalised.
367 * cgen-asm.c: Internationalised.
369 * d30v-dis.c: Internationalised.
371 * dis-buf.c: Internationalised.
373 * dvp-dis.c: Internationalised.
374 * dvp-opc.c: Internationalised.
376 * h8300-dis.c: Internationalised.
377 * h8500-dis.c: Internationalised.
378 * i386-dis.c: Internationalised.
379 * m10200-dis.c: Internationalised.
380 * m10300-dis.c: Internationalised.
381 * m68k-dis.c: Internationalised.
382 * m88k-dis.c: Internationalised.
383 * mips-dis.c: Internationalised.
384 * ns32k-dis.c: Internationalised.
385 * opintl.h: Internationalised.
386 * ppc-opc.c: Internationalised.
387 * sparc-dis.c: Internationalised.
388 * v850-dis.c: Internationalised.
389 * v850-opc.c: Internationalised.
393 * cgen-asm.c (cgen_current_opcode_table): Renamed from ..._data.
394 (asm_hash_table_entries): New variable.
395 (cgen_asm_init): Free asm_hash_table_entries.
396 (hash_insn_array,hash_insn_list): New functions.
397 (build_asm_hash_table): Use them. Hash macro insns as well.
398 (cgen_asm_lookup_insn): Update.
399 * cgen_dis.c (cgen_current_opcode_table): Renamed from ..._data.
400 (dis_hash_table_entries): New variable.
401 (cgen_dis_init): Free dis_hash_table_entries.
402 (hash_insn_array,hash_insn_list): New functions.
403 (build_dis_hash_table): Use them. Hash macro insns as well.
404 (cgen_dis_lookup_insn): Update.
405 * cgen-opc.c (cgen_current_opcode_table): Renamed from ..._data.
406 (cgen_set_cpu,cgen_hw_lookup,cgen_insn_count): Update.
407 (cgen_macro_insn_count): New function.
408 * cgen-opc.in (@arch@_cgen_lookup_insn): New arg alias_p.
409 All callers updated. Sanity check result of extract fn.
410 (@arch@_cgen_get_insn_operands): Change result type to void.
411 Delete args insn_value, length. New arg fields. All callers updated.
412 (@arch@_cgen_lookup_get_insn_operands): New function.
413 * m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate.
417 * i386-dis.c (OP_DSSI): Print segment override.
422 * mips-opc.c (msub.s): Correct mask pattern for disassembly.
428 * mips-opc.c (madd.s): Correct mask pattern for disassembly.
434 * vu0.h (vlqd, vlqi): Update per revised specs.
440 * dvp-opc.c (parse_vif_unpackloc,insert_vif_unpackloc): Delete.
441 (vif_operands): Update.
442 (vif_get_unpackloc): Delete.
443 (state_vif_unpackloc{,_star_p}): Delete.
444 (dvp_opcode_init_parse): Update.
445 (vif_unpack_len_value): Avoid divide by zero.
451 * vu0.h: Specs changed for VCALLMSR bit pattern.
452 * mips-dis.c: (print_insn_arg) Matching change.
457 * arm-dis.c (print_insn_arm): Add "_all" extension to 'C'
462 * Makefile.am (libopcodes_la_LIBADD): Add @WIN32LIBADD@.
463 (libopcodes_la_LDFLAGS): Add @WIN32LDFLAGS@.
464 * configure.in: Define and substitute WIN32LDFLAGS and
466 * aclocal.m4: Rebuild with new libtool.
467 * configure, Makefile.in: Rebuild.
472 * vu0.h: Corrected bit pattern for VMAXI opcode.
477 * m32r-opc.c: Regenerate.
482 * dvp-opc.c (vif_macros): Tweak unpackloc operand.
483 (dvp_expand_macro): Implement.
484 (insert_vif_datalen): Record value with max+1 -> 0 conversion.
485 (vif_unpack_len): Perform 0 -> max+1 conversion on `wl' value.
490 * Makefile.am (stamp-lib): Check that .libs/libopcodes.a exists
491 before trying to copy it.
492 * Makefile.in: Rebuild.
496 * m32r-opc.c: Use signed immediate values for CMPUI instruction.
501 * m32r-opc.c: Fix bit patterns for SAT and SATB.
506 * ns32k-dis.c (bit_extract_simple): New function to extract bits
507 from an arbitrary valid buffer instead of fetching them on demand
509 (invalid_float): use bit_extract_simple() instead of bit_extract().
514 * m32r-opc.c: Fix SATB bit pattern. Add extra control registers.
515 * m32r-opc.h: Add extra control registers.
521 * i386-dis.c (dis386): Change 0x8c and 0x8e to movS, and change Ew
526 * Branched binutils 2.9.
531 * d30v-dis.c (print_insn_d30v): Don't use uninitialized "num" when
532 disassembling last 4 bytes of a section.
537 Fix some gcc -Wall warnings:
538 * arc-dis.c (print_insn): Add casts to avoid warnings.
539 * cgen-opc.c (cgen_keyword_lookup_name): Likewise.
540 * d10v-dis.c (dis_long, dis_2_short): Likewise.
542 * dvp-opc.c (issymchar, SKIP_BLANKS): Likewise.
543 (parse_dotdest, parse_dotdest1, u_parse_sdest): Likewise.
544 (parse_bc, parse_vfreg, parse_accdest): Likewise.
545 (parse_ffstreg, parse_vif_mode): Likewise.
547 * m10200-dis.c (disassemble): Likewise.
548 * m10300-dis.c (disassemble): Likewise.
549 * ns32k-dis.c (print_insn_ns32k): Likewise.
550 * ppc-opc.c (insert_ral, insert_ram): Likewise.
551 * cgen-dis.c (build_dis_hash_table): Remove used local variables.
552 * cgen-opc.c (cgen_keyword_search_next): Likewise.
553 * d10v-dis.c (dis_long, dis_2_short): Likewise.
555 * d30v-dis.c (print_insn_d30v, lookup_opcode): Likewise.
558 * dvp-dis.c (print_dma, print_vif, print_gif): Likewise.
559 * dvp-opc.c (parse_dest1, print_uflags): Likewise.
560 (parse_gif_nloop, dvp_opcode_init_tables): Likewise.
562 * ns32k-dis.c (bit_extract, print_insn_ns32k): Likewise.
564 * tic80-dis.c (print_one_instruction): Likewise.
566 * w65-dis.c (print_operand): Likewise.
567 * z8k-dis.c (fetch_data): Likewise.
568 * a29k-dis.c: Add return type for find_byte_func_type.
569 * arc-opc.c: Include <stdio.h>. Remove declarations of
570 insert_multshift and extract_multshift.
572 * d30v-dis.c (lookup_opcode): Parenthesize assignments in
574 (extract_value): Fully parenthesize expression.
577 * dvp-opc.c: Include <ctype.h>.
578 (print_sdest): Add default case to switch.
580 * h8500-dis.c (print_insn_h8500): Initialize local variables.
581 * h8500-opc.h (h8500_table): Fully bracket initializer.
582 * w65-opc.h (optable): Likewise.
583 * i386-dis.c (print_insn_x86): Declare aflag and flag parameters.
584 * i386-dis.c (OP_E): Initialize local variables.
585 * m10200-dis.c (print_insn_mn10200): Likewise.
586 * mips-dis.c (print_insn_mips16): Likewise.
587 * sh-dis.c (print_insn_shx): Likewise.
588 * v850-dis.c (print_insn_v850): Likewise.
589 * ns32k-dis.c (print_insn_arg): Declare.
590 (get_displacement, invalid_float): Declare.
591 (list_search, sign_extend, flip_bytes): Declare return type.
592 (get_displacement): Likewise.
593 (print_insn_arg): Likewise. Make d int. Fix sprintf format
595 (print_insn_ns32k): Make i unsigned.
596 (invalid_float): Make static. Declare type of val.
597 * tic30-dis.c (print_par_insn): Make i size_t. Don't check strlen
598 on each for iteration.
599 * tic30-dis.c (get_indirect_operand): Likewise.
600 * z8k-dis.c (print_insn_z8001): Declare return type.
601 (print_insn_z8002): Likewise.
602 (unparse_instr): Fix sprintf format strings.
606 * mips-opc.c: Add "sync.l" and "sync.p".
611 * dvp-opc.c (extract_vif_datalen): Rewrite.
612 (vif_insn_len): Perform 0->max+1 conversion for direct length.
616 * dvp-dis.c (print_insn): Print unpack address in hex.
617 * dvp-opc.c (parse_vif_mpgloc): Renamed from parse_vif_mpgloc_star.
618 Don't skip over '*', just record it.
619 (insert_vif_mpgloc): Don't update state_vif_mpgloc if '*' value.
620 (parse_vif_unpackloc): Renamed from parse_vif_unpackloc_star.
621 Don't skip over '*', just record it.
622 (insert_vif_unpackloc): Don't update state_vif_unpackloc if '*' value.
623 (vif_operands): Delete VIF_MPGLOC_STAR,VIF_UNPACKLOC_STAR entries.
624 (vif_opcodes): Likewise.
625 (state_vif_{mpg,unpack}loc_star_p): New static locals.
626 (vif_macros,vif_macro_count): New globals.
627 (vif_unpack_len_value): New arguments wl,cl. All callers updated.
628 (vif_set_{mpg,unpack}loc): Delete. All callers updated.
629 (vif_get_wl_cl): New function.
630 (dvp_opcode_init_parse): Init mpgloc,unpackloc state.
635 * m68k-dis.c (print_insn_m68k): Use info->mach to select the
636 default m68k variant to recognize.
638 * i960-dis.c (pinsn): Change type of first argument to bfd_vma.
639 (ctrl, cobr, mem, ea): Likewise.
640 (print_addr): Likewise. Remove cast.
641 (ea): Cast argument of print_addr to bfd_vma.
643 * cgen-asm.c (cgen_parse_signed_integer): Fix type of local
645 (cgen_parse_unsigned_integer): Likewise.
646 (cgen_parse_address): Likewise.
650 * i960-dis.c (ctrl): Add full braces to structure initialization.
651 (cobr, mem, reg): Likewise.
652 (ea): Correct parenthesization in expression.
654 * cgen-asm.c: Include <ctype.h>.
655 (build_asm_hash_table): Remove unused local variable i.
656 (cgen_parse_keyword): Add casts to avoid warnings.
658 * arm-dis.c (print_insn_big_arm): Only call coffsymbol for a COFF
659 symbol. Fix indentation.
660 (print_insn_little_arm): Likewise.
665 * vu0.h (cfc2, ctc2): Add variants with ".i" and ".ni"
672 * m32r-opc.c (m32r_cgen_insn_table_entries): Fix SATH bit pattern
679 * dvp-opc.c (vif_operand_datalen_special): New global.
685 * vu0.h (vcallms): Use 'O' for call target operand.
686 * mips-dis.c (print_insn_arg): Handle 'O'.
691 * configure.in: Use AM_DISABLE_SHARED.
692 * aclocal.m4, configure: Rebuild with libtool 1.2.
697 * mips-dis.c: Change '%' to '#' in r5900 support.
703 These patches are courtesy of Jonathan Walton and Tony Thompson
706 * arm-dis.c (print_insn_thumb): Ignore bottom two bits of PC
709 * arm-opc.h (thumb_opcodes): Annotate PC relative addresses with
710 both the offset and the label closest to the destination.
715 * vu0.h: New file with cop2/vu0 instructions.
716 * mips-opc.c: Include vu0.h.
717 * mips-dis.c (print_insn_arg): Handle new args 0-9, +, -, %, K, &,
719 (print_insn_mips): Do not emit a tab after an instruction if the
720 first arg is an instruction completer (&). If the next arg is an
721 escape character (%), then print the next arg verbatim.
722 * Makefile.am (mips-opc.lo): Depend on vu0.h
728 * dvp-opc.c (vif_opcodes): Add stcycl.
732 * dvp-dis.c (print_dma): Change length from 16 to 8.
737 * m32r-opc.h: Regenerate.
742 * dvp-opc.c (print_dest1): Print dest spec again.
743 (print_vfreg,print_accdest): Likewise.
744 (vif_unpack_len): Round result up to word boundary.
747 start-sanitize-vr4320
750 * mips-opc.c ("clz","dclz"): Added the 4320 versions.
754 * mips-opc.c ("macc*","mul*"): Added the 4320 versions
761 * dvp-dis.c (print_gif): Fix length calcs for gifimage.
762 (print_insn): Do mask comparison on proper opcode word.
763 Print unsigned values in hex.
764 * dvp-opc.c (u_parse_sdest): Return -1 if dest missing.
765 (parse_bc): Catch missing dest.
766 (parse_vfreg): Replace atoi call with strtol.
767 (parse_{bcftreg,ffstreg,freg,ireg,vi01,gif_prim,gif_nloop}): Likewise.
768 (parse_bcftreg,parse_ffstreg): Handle missing dest.
769 (extract_gif_eop): New function.
770 (gif_operands): Update eop entry.
771 (VGIFOP,VGIFNREGS): Fix calcs.
772 (extract_gif_prim): Set *pinvalid to 1 if prim not used.
773 (gif_regs): Add entry for unused 11 case.
774 (print_gif_regs): Print empty list instead of nothing.
775 (extract_gif_nloop): Fix value calc.
776 (print_gif_nloop): Always print value, even if 0.
777 (insert_vif_wlcl,extract_vif_wlcl): New functions.
778 (vif_operands): Use them for wl,cl fields.
779 (state_vif_wl,state_vif_cl): New static locals.
780 (parse_vif_mode): Handle numeric args.
781 (vif_unpack_len_value,vif_unpack_len): New functions.
782 (vif_insn_len): Call vif_unpack_len.
787 * m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate.
791 * cgen-asm.in: Move insertion of generated routines to top of file.
792 (insert_normal): Add prototype. Delete `shift' arg.
793 * cgen-dis.in: Move insertion of generated routines to top of file.
794 (extract_normal): Add prototype. Delete `shift' arg.
795 (print_normal): Add prototype. Call CGEN_PRINT_NORMAL if defined.
796 (print_keyword): Add prototype. Fix type of `attrs' arg.
798 start-sanitize-vr4320
801 * mips-dis.c (_print_insn_mips) : Handle bfd_mach_mips4320.
802 * mips-opc.c ("mac","dmac") : Added 4320 insns.
807 * arm-dis.c (print_insn_big_arm, print_insn_little_arm): Do not
808 assume that info->symbols is non-empty.
812 * alpha-opc.c (cvtqs) There is no such thing.
813 (cvttq): Missing most of the /*d variants.
818 * mips-opc.c (r5900/madd.s): Takes three operands, not four. Fix
820 (r5900/min.s): Incorrect opcode ....,101001 not ...110000.
821 (r5900/msub.s): Takes three operands, not four. Fix opcode.
827 * d30v-opc.c (d30v_opcode_table): Indicate which instructions are
828 delayed branches or jumps.
834 * dvp-opc.c (vif_operands): Add unpack[u] support.
835 (vif_opcodes): Ditto.
836 (*_vif_imrubits): Renamed from *_vif_imrbits.
840 * dvp-dis.c (print_insn): Handle word number.
841 Handle mips address vs vu address.
842 * dvp-opc.c (vif_operands): Use DVP_OPERAND_VU_ADDRESS.
843 (dma_operands): Use DVP_OPERAND_MIPS_ADDRESS.
844 ({insert,extract}_dma_addr): Fix word ofset.
845 ({insert,print}_gif_regs): Fix encode/decode.
850 * arm-dis.c (print_insn_{big,little}_arm): info->symbol changed
852 * mips-dis.c (print_insn_{big,little}_mips): Likewise.
853 * tic30-dis.c (print_branch): Likewise.
855 * mips-dis.c (print_insn_little_mips): Call dvp_info_mach_type.
856 * dvp-dis.c (dvp_info_mach_type): New function.
857 (print_insn_dvp): Call it.
858 (print_vif): Return length of 4 if mpg or direct insn so following
859 insns get properly disabled.
860 (print_gif): Fix word order.
861 * dvp-opc.c (vif_insn_len): New argument `pcpu'. All callers updated.
862 (gif_operands): Fix word order.
863 (gif_opcodes): Likewise.
864 ({insert,extract,print}_gif_regs): Likewise.
865 (gif_regs): Add new register number/name changes.
866 (dma_opcodes): Add dmarefe insn.
871 * arm-dis.c (print_insn_big_arm, print_insn_little_arm): Remove
872 saved_symbol code as it is no longer needed.
876 * cgen-asm.c: Include symcat.h.
877 * cgen-dis.c,cgen-opc.c,cgen-asm.in,cgen-dis.in: Ditto.
879 * m32r-asm.c,m32r-dis.c,m32r-opc.h,m32r-opc.c: Regenerate.
884 * dvp-opc.c (extra_dma_flags): Fix typos.
885 (dma_operands): Fix word numbers.
886 (dma_opcodes): Likewise.
887 ({insert,extract}_dma_flags): Likewise.
892 * mips-dis.c (print_insn_arg): Do not prefix 'P' arguments with '$'.
897 * dvp-dis.c (print_gif): Complete.
898 * dvp-opc.c (gif_operands,gif_opcodes): Complete.
899 (state_gif_{nregs,regs,nloop}): New static locals.
901 (dvp_opcode_init_{parse,print}): Init gif state locals.
902 (extract_vif_datalen,{insert,extract}_vif_imrbits): New functions.
903 (vif_insn_len): Handle `unpack'.
904 ({insert,extract}_dma_flags): Complete.
910 * mips-opc.c (mula.s): Renamed from multa.s.
915 * m32r-opc.[ch]: Regenerate.
920 * dvp-opc.c (dma_operands): Rewrite.
921 (dma_operand_{count,addr}): New globals.
922 (dma_opcodes): Rewrite. Add "dmaend" with no operands.
923 (insert_dma_addr): Insert value into insn.
924 (extract_dma_addr): Extract value from insn.
928 * dvp-dis.c (print_vu): Handle loi insns.
929 (print_insn): Likewise.
930 * dvp-opc.c (vu_lower_opcodes): Add "loi".
931 (vu_operands): Make LDEST1 a FAKE operand.
932 (parse_dest1): Allow elided argument.
933 (print_dest1): Don't print the argument.
937 * dvp-opc.c (parse_vfreg): Dest spec is optional.
938 (print_vfreg): Don't print dest spec.
939 (parse_accdest): Dest spec is optional.
940 (print_accdest): Don't print dest spec.
945 * Makefile.am (CGENFILES): Update.
946 * Makefile.in: Regenerate.
947 * cgen-asm.in (insert_normal): Result is error message now.
948 Validate value to be inserted.
949 (insert_insn_normal): Result is error message now.
950 (@arch@_cgen_assemble_insn): Update.
951 * cgen-asm.c (cgen_parse_{signed,unsigned}_integer): Delete min,max
952 arguments. Don't perform validation here.
953 * m32r-asm.c,m32r-dis.c,m32r-opc.c: Regenerate.
957 * cgen-opc.in (@arch@_cgen_get_insn_operands): Handle empty
958 operand instance list.
959 * m32r-opc.c: Regenerate.
963 * Makefile.am (AUTOMAKE_OPTIONS): Define.
964 * configure, Makefile.in, aclocal.m4: Rebuild with automake 1.2e.
968 * m10300-dis.c (print_insn_mn10300): Recognize break instruction.
972 * configure.in: Get the version number from BFD.
973 * configure: Rebuild.
976 * Makefile.am (libopcodes_la_LDFLAGS): Define.
977 * Makefile.in: Rebuild.
981 * m32r-opc.c: Regenerate.
982 * m32r-opc.h: Regenerate.
986 * cgen-opc.in (@arch@_cgen_lookup_insn): New argument alias_p.
987 Ignore ALIAS insns if asked to.
988 (@arch@_cgen_get_insn_operands): Pass 0 for alias_p, NULL for insn.
989 * m32r-opc.c: Regenerate.
992 * dvp.opc.c: Nicely format opcode tables.
993 (vu_operands): New element UFLAGS.
994 (parse_uflags,print_uflags): New functions.
995 (vu_upper_opcodes): Add UFLAGS to all insns.
1000 Fix rac to accept only a0:
1001 * d10v-opc.c (d10v_predefined_registers, d10v_operands, d10v_opcodes):
1002 Split OPERAND_ACC into OPERAND_ACC0 and OPERAND_ACC1.
1003 Introduce OPERAND_GPR.
1004 * d10v-dis.c (print_operand): Likewise.
1008 * cgen-opc.in: New file.
1010 * Makefile.am (CGENFILES): Add cgen-opc.in.
1011 * Makefile.in: Regenerate.
1013 * cgen-opc.c (cgen_set_cpu): Delete init of hw list `next' chain.
1014 (cgen_hw_lookup): Make result const.
1016 * cgen-dis.in (*): Use PTR instead of void *.
1017 (print_insn): Delete unused vars `i', `syntax'.
1019 * m32r-opc.h, m32r-opc.c, m32r-asm.c, m32r-dis.c: Regenerate.
1024 * dvp-opc.c (*): pke,gpuif renamed to vif,gif.
1025 (vif_opcodes): Update renamed insns.
1026 * dvp-dis.c (*): Likewise.
1031 * configure, aclocal.m4: Rebuild with new libtool.
1036 * d30v-opc.c (repeat{,i} instructions): Repeat/repeati
1037 instructions use a PC relative branch, not absolute.
1042 * configure.in: Set libtool_enable_shared rather than
1043 libtool_shared. Remove diversion hack.
1044 * configure, Makefile.in, aclocal.m4: Rebuild with new libtool.
1048 * cgen-opc.c (cgen_set_cpu): Initialize hardware table.
1049 * m32r-opc.h, m32r-opc.c, m32r-asm.c, m32r-dis.c: Regenerate.
1053 * tic30-dis.c: New file.
1054 * disassemble.c (disassembler): Add bfd_arch_tic30 case.
1055 * configure.in: Handle bfd_tic30_arch.
1056 * Makefile.am: Rebuild dependencies.
1057 (CFILES): Add tic30-dis.c
1058 (ALL_MACHINES): Add tic30-dis.lo.
1059 * configure, Makefile.in: Rebuild.
1061 start-sanitize-m32rx
1064 * m32r-opc.c, m32r-opc.h, m32r-asm.c m32r-dis.c: Newly generated
1065 versions after updates to m32r.cpu to remove mulwhi-a, mulwlo-a,
1066 macwhi-a and macwlo-a instructions.
1072 * dvp-opc.c, fixed encoding of a bunch of instructions to
1073 be consistent with the asmvu assembler (and inconsistent
1074 with the specification).
1078 * dvp-opc.c, fixed order of pkemscal/pkemscalf instructions
1079 in the opcode table. The pkemscalf instruction must come first.
1083 * dvp-opc.c, MAXIi should be VUOP6(0x1d) instead of 0x2d.
1088 * m32r-opc.h (HAVE_CPU_M32R): Define.
1093 * dvp-dis.c, dvp-opc.c: New files.
1094 * configure.in: Compile them if bfd_dvp_arch, as well as mips.
1095 * configure: Regenerate.
1096 * Makefile.am (ALL_MACHINES): Add dvp-{dis,opc}.lo.
1097 (dvp-dis.lo,dvp-opc.lo): Add rules for.
1098 (mips-dis.lo): Compile with @archdefs@.
1099 * Makefile.in: Regenerate.
1100 * disassemble.c: Define ARCH_mips ifdef ARCH_dvp.
1101 * mips-dis.c (print_insn_little_mips): Check for DVP insns.
1106 * v850-opc.c (insertion routines): If both alignment and size is
1107 wrong then report this.
1111 * mips-dis.c (_print_insn_mips): Set target_processor as appropriate.
1112 Only recognize instructions for the current target_processor.
1116 * d10v-dis.c (PC_MASK): Correct value.
1117 (print_operand): If there's a reloc, don't calculate the
1118 address because they could be in different sections.
1120 start-sanitize-cygnus
1123 * cgen.sh: Rewrite to be like simulator's version.
1124 * Makefile.am (cgen): Update call to cgen.sh.
1125 * Makefile.in: Regenerate
1130 * mips-opc.c (mips_builtin_opcodes): Move 4010's "addciu"
1131 instruction after the 4650's "mul" instruction; nobody's using the
1132 4010 these days. If object files someday indicate which processor
1133 variant they're intended for, we can do a better job at this.
1135 start-sanitize-r5900
1138 * mips-opc.c (c.lt.s): Add r5900 variant.
1144 * cgen-asm.c (build_asm_hash_table): Traverse compiled in table using
1145 table provided entry size. Use CGEN_INSN_MNEMONIC.
1146 (cgen_parse_keyword): Rewrite.
1147 * cgen-dis.c (build_dis_hash_table): Traverse compiled in table using
1148 table provided entry size. Use CGEN_INSN_MASK_BITSIZE.
1149 * cgen-opc.c: Clean up pass over `struct foo' usage.
1150 (cgen_keyword_lookup_value): Handle "" entry.
1151 (cgen_keyword_add): Likewise.
1152 start-sanitize-cygnus
1153 * Makefile.am: Add cgen support.
1154 * Makefile.in: Regenerate.
1155 * configure.in: Add cgen support.
1156 * configure: Regenerate.
1157 * aclocal.m4: Regenerate.
1158 * cgen.sh, cgen-asm.in, cgen-dis.in: New files.
1163 * mips-opc.c: Add FP_D to s.d instruction flags.
1167 * m68k-opc.c (halt, pulse): Enable them on the 68060.
1169 start-sanitize-tic80
1172 * tic80-opc.c (tic80_opcodes): Revert change that put the 32 bit
1173 PC relative offset forms before the 15 bit forms. An assembler command
1174 line option now chooses the default.
1177 start-sanitize-r5900
1180 * mips-opc.c: Add many missing r5900 instructions.
1186 * d30v-opc.c (d30v_opcode_table): Set new flags bits
1187 FLAG_{2WORD,MUL{16,32},ADDSUBppp}, in appropriate instructions.
1192 * configure: Only build libopcodes shared if --enable-shared's value
1193 was `yes', or was set to `*opcodes*'.
1194 * aclocal.m4: Likewise.
1195 * NOTE: this really needs to be fixed in libtool/libtool.m4, the
1196 original source of this bit of code. It's not clear what the best fix
1199 start-sanitize-r5900
1202 * mips-opc.c (mtpc, mfpc, mtps, mfps): Add r5900 variants.
1204 start-sanitize-tic80
1207 * tic80-opc.c (OFF_SL_PC, OFF_SL_BR): Minor formatting change.
1208 (tic80_opcodes): Reorder table entries to put the 32 bit PC relative
1209 offset forms before the 15 bit forms, to default to the long forms.
1214 * alpha-opc.c (cvttq/*u*): Remove, as that suffix is invalid.
1218 * arm-dis.c (print_insn_little_arm): Prevent examination of stored
1219 symbol if none is present.
1220 (print_insn_big_arm): Prevent examination of stored symbol if
1225 * d10v-opc.c (d10v_opcodes): Correct entry for RTE.
1229 * disassemble.c: Remove disasm_symaddr() function.
1231 * arm-dis.c: Use info->symbol instead of info->flags to determine
1232 if disassmbly should be in Thumb or Arm mode.
1236 * arm-dis.c: Add support for disassembling Thumb opcodes.
1237 (print_insn_thumb): New function.
1239 * disassemble.c (disasm_symaddr): New function.
1241 * arm-opc.h: Display nop pseudo ops alongside equivalent disassembly.
1242 (thumb_opcodes): Table of Thumb opcodes.
1246 * m68k-opc.c (btst): Change Dd@s to Dd;b.
1248 * m68k-dis.c (print_insn_arg): Recognize 'm', 'n', 'o', 'p', 'q',
1249 and 'v' as operand types.
1253 * m68k-opc.c: Add argument for lpstop. From Olivier Carmona
1255 * m68k-dis.c (print_insn_m68k): Handle special case of lpstop,
1256 which has a two word opcode with a one word argument.
1261 * d30v-opc.c (d30v_opcode_table, case cmpu): Immediate field is
1262 unsigned, not signed.
1263 (d30v_format_table): Add SHORT_CMPU cases for cmpu.
1268 * sh-dis.c (print_insn_shx): Recognize all sh4 additions.
1269 * sh-opc.h (fmov): Add @<REG_M>+,<DX_REG_N> variant for sh4.
1270 (ftrv): Slay the cut-and-paste monster.
1274 * d10v-dis.c (print_operand):
1275 Split OPERAND_FLAG into OPERAND_FFLAG and OPERAND_CFLAG.
1279 * d10v-opc.c (OPERAND_FLAG): Split into:
1280 (OPERAND_FFLAG, OPERAND_CFLAG) .
1286 * mips-opc.c: Move the INSN_MACRO ISA value to the membership
1287 field for all INSN_MACRO's.
1288 * mips16-opc.c: same
1292 * mips-opc.c (sync,cache): These are 3900 insns.
1296 sh-opc.h (sh_table): Remove ftst/nan.
1298 start-sanitize-vr5400
1301 * mips-opc.c (dror32, dror, rzu.ob): Fix bugs in encoding.
1302 (c.*.ob, mula.ob, mull.ob, muls.ob, mulsl.ob): Put 'k' version
1304 * mips-dis.c (print_insn_arg): Handle VR5400 operand types.
1310 * mips-opc.c (deret,dmult,dmultu,madd,maddu,pref,sdbbp):
1311 Add tx49 insns and configury.
1316 * mips-opc.c (ffc, ffs): Fix mask.
1321 * d30v-opc.c (pre_defined_registers): Add eit_vb, int_s, and int_m
1327 * mips-opc.c: Fix bug in mask for "not" pseudo-instruction.
1328 start-sanitize-vr5400
1329 Added VR5400 instructions.
1330 (N5): New cpu-id macro.
1332 (WR_HILO, RD_HILO, MOD_HILO): New macros.
1336 * mips-opc.c: Fix bug in mask for "not" pseudo-instruction.
1337 (WR_HILO, RD_HILO, MOD_HILO): New macros.
1341 * v850-dis.c (disassemble): Replace // with /* ... */
1345 * sparc-opc.c: Add wr & rd for v9a asr's.
1346 * sparc-dis.c (print_insn_sparc): Recognize '_' and '/' for v9a asr's.
1347 (v9a_asr_reg_names): New variable.
1352 * sparc-opc.c (v9notv9a): New insn type.
1353 (IMPDEP): Move to the end to not conflict with edge8 et al.
1358 * mips-opc.c (bnezl,beqzl): Mark these as also tx39.
1362 * mips-opc.c: Note that 'jalx' is (probably incorrectly) marked I1.
1366 * v850-dis.c (disassemble): Use new symbol_at_address_func() field
1367 of disassemble_info structure to determine if an overlay address
1368 has a matching symbol in low memory.
1370 * dis-buf.c (generic_symbol_at_address): New (dummy) function for
1371 new symbol_at_address_func field in disassemble_info structure.
1375 * v850-opc.c (extract_d22): Use signed arithmatic.
1379 * mips-opc.c: Three op mult is not an ISA insn.
1383 * mips-opc.c: Fix formatting.
1387 * i386-dis.c (OP_E): Explicitly sign extend 8 bit values, rather
1388 than assuming that char is signed. Explicitly sign extend 16 bit
1389 values, rather than assuming that short is 16 bits.
1390 (OP_sI, OP_J, OP_DIR): Likewise.
1392 start-sanitize-v850e
1395 * v850-dis.c (v850_sreg_names): Use symbolic names for higher
1401 * v850-opc.c: Fix typo in comment.
1403 * v850-dis.c (disassemble): Add test of processor type when
1404 determining opcodes.
1408 * configure.in: Use a diversion to set enable_shared before the
1409 arguments are parsed.
1410 * configure: Rebuild.
1414 * m68k-opc.c (TBL1): Use ! rather than `.
1415 * m68k-dis.c (print_insn_arg): Remove ` operand specifier.
1419 * m68k-opc.c: Correct bchg, bclr, bset, and btst on ColdFire.
1421 * m68k-opc.c: Accept tst{b,w,l} with immediate operands on cpu32.
1423 * m68k-opc.c: Correct movew of an immediate operand to %sr or %ccr
1426 * configure.in: Call AC_CHECK_TOOL before AM_PROG_LIBTOOL.
1427 * aclocal.m4: Rebuild with new libtool.
1428 * configure: Rebuild.
1430 start-sanitize-v850e
1433 * v850-opc.c ("cmov"): Order reg param r1, r2 not r2, r2.
1438 * sparc-opc.c (sparclet_cpreg_table): Add %ccsr2, %cccrr, %ccrstr.
1442 * v850-opc.c (v850_opcodes): Further rearrangements.
1447 * d30v-opc.c (rot2h, sra2h, srl2h insns): Revert last change.
1452 * v850-opc.c (v850_opcodes): Fields reordered to allow assembler
1457 * mips-opc.c: Added tx39 insns sdbbp, rfe, and deret.
1459 * mips16-opc.c: Added mips16 sdbbp.
1464 * v850-opc.c: Initialise processors field of v850_opcode structure.
1469 Merge changes from Martin Hunt:
1471 * d30v-opc.c: Change mvfacc to accept 6-bit unsigned values.
1473 * d30v-opc.c (pre_defined_registers): Add control registers from 0-63.
1474 (d30v_opcode_tabel): Add dbt, rtd, srah, and srlh instructions. Fix
1475 rot2h, sra2h, and srl2h to use new SHORT_A5S format.
1477 * d30v-dis.c (print_insn): Fix disassembly of SHORT_D2 opcodes.
1479 * d30v-dis.c (print_insn): First operand of d*i (delayed
1480 branch) instructions is relative.
1482 * d30v-opc.c (d30v_opcode_table): Change form for repeati.
1483 (d30v_operand_table): Add IMM6S3 type.
1484 (d30v_format_table): Change SHORT_D2. Add LONG_Db.
1486 * d30v-dis.c: Fix bug with ".s" and ".l" extensions
1487 and cmp instructions.
1489 * d30v-opc.c: Correct entries for repeat*, and sat*.
1490 Make IMM5 unsigned. Create IMM6U and IMM12S3U operand
1491 types. Correct several formats.
1493 * d30v-opc.c: (pre_defined_registers): Add dpsw and dpc.
1495 * d30v-opc.c (pre_defined_registers): Change control registers.
1497 * d30v-opc.c (d30v_format_table): Correct SHORT_C1 and
1498 SHORT_C2. Manual was incorrect.
1500 * d30v-dis.c (lookup_opcode): Return value now indicates
1501 if an opcode has a short and a long form. Used for deciding
1502 to append a ".s" or ".l".
1503 (print_insn): Append a ".s" to an instruction if it is
1504 the short form and ".l" if it is a long form. Do not append
1505 anything if the instruction has only one possible size.
1507 * d30v-opc.c: Change mulx2h to require an even register.
1508 New form: SHORT_A2; a SHORT_A form that needs an even
1509 register as the first operand.
1511 * d30v-dis.c (print_insn_d30v): Fix problem where the last
1512 instruction was not being disassembled if there were an odd
1513 number of instructions.
1515 * d30v-opc.c (SHORT_M2, LONG_M2): Two new forms.
1518 start-sanitize-v850e
1521 * v850-dis.c (disassemble): Improved display of register lists.
1526 * sparc-opc.c (sparc_opcodes): Fix assembler args to
1527 fzeros, fones, fsrc1, fsrc1s, fsrc2s, fnot1, fnot1s, fnot2s,
1528 fors, fnors, fands, fnands, fxors, fxnors, fornot1s, fornot2s,
1529 fandnot1s, fandnot2s.
1533 * sparc-opc.c (sparc_opcodes): Fix op3 field for fcmpq/fcmpeq.
1537 * cgen-asm.c (cgen_parse_address): New argument resultp.
1538 All callers updated.
1539 * m32r-asm.c (parse_h_hi16): Right shift numbers by 16.
1543 * mn10200-dis.c (disassemble): PC relative instructions are
1544 relative to the next instruction, not the current instruction.
1548 * v850-dis.c (disassemble): Only signed extend values that are not
1549 returned by extract functions.
1550 Remove use of V850_OPERAND_ADJUST_SHORT_MEMORY flag.
1554 * v850-opc.c: Update comments. Remove use of
1555 V850_OPERAND_ADJUST_SHORT_MEMORY. Fix several operand patterns.
1559 * v850-opc.c (MOVHI): Immediate parameter is unsigned.
1563 * configure: Rebuilt with latest devo autoconf for NT support.
1567 * v850-dis.c (disassemble): Use curly brace syntax for register
1570 * v850-opc.c (v850_opcodes[]): Add NOT_R0 flag to decect cases
1571 where r0 is being used as a destination register.
1573 start-sanitize-v850e
1576 * v850-opc.c (v850_opcodes[]): Move divh opcodes next to each other.
1581 * sh-opc.h (sh_arg_type): Add A_SGR and A_DBR.
1582 (sh_nibble_type, sh_arg_type): Add SH4 floating point extensions.
1583 (sh_table): Likewise. Add movca.l, ocbi, ocbp, ocbwb.
1584 Add insns to access SGR and DBR.
1585 * sh-dis.c (print_insn_shx): Add SH4 floating point extensions.
1589 * alpha-opc.c (alpha_opcodes): Fix hw_rei_stall mungage.
1591 start-sanitize-v850e
1594 * v850-opc.c (v850_opcodes[]): Remove use of flag field.
1595 * v850-opc.c (v850_opcodes[]): Add support for reversed short load
1600 * configure (cgen_files): Add support for v850e target.
1601 * configure.in (cgen_files): Add support for v850e target.
1605 * configure (cgen_files): Add support for v850ea target.
1606 * configure.in (cgen_files): Add support for v850ea target.
1611 * configure.in (bfd_arc_arch): Add.
1612 * configure: Rebuild.
1613 * Makefile.am (ALL_MACHINES): Add arc-dis.lo, arc-opc.lo.
1614 * Makefile.in: Rebuild.
1615 * arc-dis.c, arc-opc.c: New files.
1616 * disassemble.c (ARCH_all): Define ARCH_arc.
1617 (disassembler): Add ARC support.
1621 start-sanitize-v850e
1622 * v850-dis.c (disassemble): Add support for v850EA instructions.
1624 * v850-opc.c (insert_i5div, extract_i5div): New Functions.
1625 (v850_opcodes): Add v850EA instructions.
1627 * v850-dis.c (disassemble): Add support for v850E instructions.
1629 * v850-opc.c (insert_d5_4, extract_d5_4, insert_d16_16,
1630 extract_d16_16, insert_i9, extract_i9, insert_u9, extract_u9,
1631 insert_spe, extract_spe): New Functions.
1632 (v850_opcodes): Add v850E instructions.
1635 * v850-opc.c: Reorganised and re-layed out to improve readability
1640 * configure: Rebuild with autoconf 2.12.1.
1644 * aclocal.m4, configure: Rebuild with new automake patches.
1648 * configure.in: Set enable_shared before AM_PROG_LIBTOOL.
1649 * acinclude.m4: Just include acinclude.m4 from BFD.
1650 * aclocal.m4, configure: Rebuild.
1654 * Makefile.am: New file, based on old Makefile.in.
1655 * acconfig.h: New file.
1656 * acinclude.m4: New file.
1657 * stamp-h.in: New file.
1658 * configure.in: Call AM_INIT_AUTOMAKE and AM_PROG_LIBTOOL.
1659 Removed shared library handling; now handled by libtool. Replace
1660 AC_CONFIG_HEADER with AM_CONFIG_HEADER. Call AM_MAINTAINER_MODE,
1661 AM_CYGWIN32, and AM_EXEEXT. Replace AC_PROG_INSTALL with
1662 AM_PROG_INSTALL. Change all .o files to .lo. Remove stamp-h
1663 handling in AC_OUTPUT.
1664 * dep-in.sed: Change .o to .lo.
1665 * Makefile.in: Now built with automake.
1666 * aclocal.m4: Now built with aclocal.
1667 * config.in, configure: Rebuild.
1671 * mips-opc.c: Fix typo/thinko in "eret" instruction.
1673 start-sanitize-r5900
1676 * mips-opc.c: Fix coding of mtsa.
1681 * sparc-opc.c (sparc_opcodes): Fix spelling on fpaddX, fpsubX insns.
1683 * sparc-dis.c (sorted_opcodes): New static local.
1684 (struct opcode_hash): `opcode' is pointer to const element.
1685 (build_hash): First arg is now table of sorted pointers.
1686 (print_insn_sparc): Sort opcodes by sorting table of pointers.
1687 (compare_opcodes): Update.
1691 * cgen-opc.c: #include <ctype.h>.
1692 (hash_keyword_name): New arg `case_sensitive_p'. Callers updated.
1693 Handle case insensitive hashing.
1694 (hash_keyword_value): Change type of `value' to unsigned int.
1698 * mips-opc.c (mips_builtin_opcodes): If an insn uses single
1699 precision FP, mark it as such. Likewise for double precision
1700 FP. Mark ISA1 insns. Consolidate duplicate opcodes where
1702 start-sanitize-r5900
1703 (mips_builtin_opcodes): Remove non-existant r5900 instructions
1706 start-sanitize-r5900
1709 * mips-opc.c (mips_builtin_opcodes): Add "pinteh", "pexeh" and
1710 "pexew" as synonyms for "pintoh", "pexoh", "pexow".
1715 * ppc-opc.c (extract_nsi): make unsigned expression signed before
1717 (UNUSED): remove one level of parens, so MSVC doesn't choke on
1718 nesting depth when all the macros are expanded.
1722 * sparc-opc.c: The fcmp v9a instructions take an integer register
1723 as a destination, not a floating point register. From Christian
1728 * m68k-dis.c (print_insn_arg): Print case 7.2 using %pc@()
1729 syntax. From Roman Hodek
1732 * i386-dis.c (twobyte_has_modrm): Fix pand.
1736 * i386-dis.c (dis386_twobyte): Fix pand and pandn.
1740 * arm-dis.c: Add prototypes for arm_decode_shift and
1745 * mips-opc.c: Add r3900 insns.
1749 * sh-dis.c (print_insn_shx): Change relmask to bfd_vma. Don't
1750 print delay slot instructions on the same line. When using a PC
1751 relative load, add a comment with the value being loaded if it can
1756 * i386-dis.c (dis386[], dis386_twobyte[]): change pushl/popl
1757 to pushS/popS for segment regs and byte constant so that
1758 pushw/popw printed when in 16 bit data mode.
1760 * i386-dis.c (dis386[]): change cwtl, cltd to cWtS, cStd to
1761 print cbtw, cwtd in 16 bit data mode.
1762 * i386-dis.c (putop): extra case W to support above.
1764 * i386-dis.c (print_insn_x86): print addr32 prefix when given
1765 address size prefix in 16 bit address mode.
1769 * sh-dis.c: Reindent. Rename local variable fprintf to
1774 * m32r-opc.c (m32r_cgen_insn_table, cmpui): Undo patch of May 2.
1778 * mips-opc.c (mips_builtin_opcodes): Moved INSN_ISA field into new
1780 * mips16-opc.c (mip16_opcodes): same.
1784 * m68k-opc.c (moveb): Change $d to %d.
1788 * i386-dis.c: (dis386_twobyte): Add MMX instructions.
1789 (twobyte_has_modrm): Likewise.
1791 (OP_MMX, OP_EM, OP_MS): New static functions.
1793 * i386-dis.c: Revert patch of April 4. The output now matches
1798 * m32r-opc.c (m32r_cgen_insn_table, cmpui): Use $uimm16 instead
1803 * m32r-opc.h (CGEN_ARCH): Renamed from CGEN_CPU.
1807 * Makefile.in (install): Depend upon installdirs.
1808 (installdirs): New target.
1813 * configure.in: Use ${CONFIG_SHELL} when running $ac_config_sub.
1814 * configure: Rebuild.
1818 * cgen-*.c, m32r-*.c: #include sysdep.h instead of config.h.
1819 Delete string{,s}.h support.
1823 * cgen-asm.c (cgen_parse_operand_fn): New global.
1824 (cgen_parse_{{,un}signed_integer,address}): Update call to
1825 cgen_parse_operand_fn.
1826 (cgen_init_parse_operand): New function.
1827 * m32r-asm.c (parse_insn_normal): cgen_init_parse_operand renamed
1828 from cgen_asm_init_parse.
1829 (m32r_cgen_assemble_insn): New operand `errmsg'.
1830 Delete call to as_bad, return error message to caller.
1831 (m32r_cgen_asm_hash_keywords): #if 0 out.
1835 * m68k-dis.c (print_insn_arg) [case 'd']: Print as address register,
1837 [case 'J']: Fix typo in register name.
1841 * configure.in: Substitute SHLIB_LIBS.
1842 * configure: Rebuild.
1843 * Makefile.in (SHLIB_LIBS): New variable.
1844 ($(SHLIB)): Use $(SHLIB_LIBS).
1848 * cgen-dis.c (build_dis_hash_table): Fix xmalloc size computation.
1850 * cgen-opc.c (hash_keyword_name): Improve algorithm.
1852 * disassemble.c (disassembler): Handle m32r.
1856 * m32r-asm.c, m32r-dis.c, m32r-opc.c, m32r-opc.h: New files.
1857 * cgen-asm.c, cgen-dis.c, cgen-opc.c: New files.
1858 * Makefile.in (CFILES): Add them.
1859 (ALL_MACHINES): Add them.
1860 (dependencies): Regenerate.
1861 * configure.in (cgen_files): New variable.
1862 (bfd_m32r_arch): Add entry.
1863 * configure: Regenerate.
1867 * configure.in: Correct file names for bfd_mn10[23]00_arch.
1868 * configure: Rebuild.
1870 * Makefile.in: Rebuild dependencies.
1872 * d10v-dis.c: Include "ansidecl.h" before "opcode/d10v.h".
1874 * i386-dis.c (float_reg): Swap fsubrp and fsubp. Swap fdivrp and
1879 * Branched binutils 2.8.
1883 * m10200-dis.c: Rename from mn10200-dis.c.
1884 * m10200-opc.c: Rename from mn10200-opc.c.
1885 * m10300-dis.c: Rename from mn10300-dis.c
1886 * m10300-opc.c: Rename from mn10300-opc.c.
1887 * Makefile.in: Update accordingly.
1889 * mips16-opc.c: Add mul and dmul macros.
1893 * makefile.vms: Update CFLAGS, add clean target.
1897 * mips-opc.c: Add "wait". From Ralf Baechle
1900 * configure.in: Add stdlib.h to AC_CHECK_HEADERS list.
1901 * configure, config.in: Rebuild.
1902 * sysdep.h: Include <stdlib.h> if it exists.
1903 * sparc-dis.c: Include <stdio.h> and "sysdep.h". Don't include
1905 * Makefile.in: Rebuild dependencies.
1909 * ppc-opc.c: Add PPC 403 instructions and extended opcodes. From
1912 * mips-opc.c: Add cast when setting mips_opcodes.
1916 * v850-dis.c (disassemble): Fix sign extension problem.
1917 * v850-opc.c (extract_d*): Fix sign extension problems to make
1918 disassembly calculate branch offsets correctly.
1922 * sh-opc.h: Add bf/s and bt/s as synonyms for bf.s and bt.s.
1924 * mips-opc.c: Add dctr and dctw.
1929 * d30v-dis.c (print_insn): Change the way signed constants
1934 * Makefile.in (BFD_H): New variable.
1935 (HFILES): New variable.
1936 (CFILES): Add all C files.
1937 (.dep, .dep1, dep.sed, dep, dep-in): New targets.
1938 Delete old dependencies, and build new ones.
1939 * dep-in.sed: New file.
1943 * m68k-opc.c (m68k_opcode_aliases): Added blo and blo{s,b,w,l}.
1945 start-sanitize-coldfire
1948 * m68k-opc.c (m68k_opcodes): Provide coldfire division module
1951 end-sanitize-coldfire
1954 * mn10200-opc.c: Change "trap" to "syscall".
1955 * mn10300-opc.c: Add new "syscall" instruction.
1959 * m68k-opc.c (m68k_opcodes): Provide correct entries for mulsl and
1960 mulul insns on the coldfire.
1964 * arm-dis.c (print_insn_arm): Don't print instruction bytes.
1965 (print_insn_big_arm): Set bytes_per_chunk and display_endian.
1966 (print_insn_little_arm): Likewise.
1971 * i386-dis.c (fetch_data): Add prototype.
1972 * m68k-dis.c (fetch_data): Add prototype.
1973 (dummy_print_address): Add prototype. Make static.
1974 * ppc-opc.c (valid_bo): Add prototype.
1975 * sparc-dis.c (build_hash_table): Add prototype.
1976 (is_delayed_branch, compute_arch_mask): Add prototypes.
1977 (print_insn_sparc): Make several local variables const.
1978 (compare_opcodes): Change arguments to const PTR. Add prototype.
1979 * sparc-opc.c (arg): Change name field to be const.
1980 (lookup_name, lookup_value): Add prototypes. Change table and
1981 name parameters to be const.
1982 (sparc_encode_asi): Change name parameter to be const.
1983 (sparc_encode_membar, sparc_encode_prefetch): Likewise.
1984 (sparc_encode_sparclet_cpreg): Likewise.
1985 (sparc_decode_asi): Change return type to be const.
1986 (sparc_decode_membar, sparc_decode_prefetch): Likewise.
1987 (sparc_decode_sparclet_cpreg): Likewise.
1991 * Makefile.in ($(SHLINK)): Just use ln -s, not ln -sf, since
1992 Solaris doesn't like the combined options, and the -f is
1994 (stamp-tshlink, install): Likewise.
1998 * mn10300-opc.c (IMM16_PCREL, SD8N_PCREL, D16_SHIFT): Mark these
2003 * m68k-opc.c (m68k_opcodes): Fix last change for the mc68010.
2007 * m68k-opc.c (m68k_opcodes): Added entries for the tst insns on
2012 * m68k-opc.c (m68k_opcodes): Added swbegl pseudo-instruction.
2014 start-sanitize-tic80
2017 * tic80-dis.c (print_insn_tic80): Set info->bytes_per_line to 8.
2021 * tic80-opc.c (tic80_predefined_symbols): Define r25 properly.
2026 * m68k-dis.c (NEXTSINGLE, NEXTDOUBLE, NEXTEXTEND): Use
2027 floatformat_to_double to make portable.
2028 (print_insn_arg): Use NEXTEXTEND macro when extracting extended
2033 * mips-opc.c: Initialize mips_opcodes to mips_builtin_opcodes,
2034 and bfd_mips_num_opcodes to bfd_mips_num_builtin_opcodes.
2038 * d10v-dis.c, d10v-opc.c: Change pre_defined_registers to
2039 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
2041 start-sanitize-tic80
2044 * tic80-opc.c (LSI_SCALED): Renamed from this ...
2045 (OFF_SL_BR_SCALED): ... to this, and added the flag
2046 TIC80_OPERAND_BASEREL to the flags word.
2047 (tic80_opcodes): Replace all occurances of LSI_SCALED with
2053 * mips-opc.c: Add macros for cop0, cop1 cop2 and cop3.
2054 Change mips_opcodes from const array to a pointer,
2055 and change bfd_mips_num_opcodes from const int to int,
2056 so that we can increase the size of the mips opcodes table
2059 start-sanitize-tic80
2062 * tic80-opc.c (tic80_predefined_symbols): Revert change to
2063 store BITNUM values in the table in one's complement form
2064 to match behavior when assembler is given a raw numeric
2065 value for a BITNUM operand.
2066 * tic80-dis.c (print_operand_bitnum): Ditto.
2072 * d30v-opc.c: Removed references to FLAG_X.
2077 * Makefile.in: Add dependencies on ../bfd/bfd.h as required.
2082 * Makefile.in: Added d30v object files.
2083 * configure: (bfd_d30v_arch) Rebuilt.
2084 * configure.in: (bfd_d30v_arch) Added new case.
2085 * d30v-dis.c: New file.
2086 * d30v-opc.c: New file.
2087 * disassemble.c (disassembler) Add entry for d30v.
2090 start-sanitize-tic80
2093 * tic80-opc.c (tic80_predefined_symbols): Add symbolic
2094 representations for the floating point BITNUM values.
2098 * tic80-opc.c (tic80_predefined_symbols): Store BITNUM values
2099 in the table in one's complement form, as they appear in the
2101 (tic80_symbol_to_value): Use macros to access predefined
2103 (tic80_value_to_symbol): Ditto.
2104 (tic80_next_predefined_symbol): New function.
2105 * tic80-dis.c (print_operand_bitnum): Remove code that did
2106 one's complement for BITNUM values.
2109 start-sanitize-r5900
2112 * mips-opc.c: bug fix, can't mark insns INSN_5900 and INSN_ISA4
2117 * makefile.vms: Remove 8 bit characters. Update to latest
2122 * m68k-opc.c (m68k_opcodes): Add swbeg pseudo-instruction.
2126 * mn10200-opc.c (IMM16_PCREL): This is a signed operand.
2127 (IMM24_PCREL): Likewise.
2131 * mips-dis.c (print_mips16_insn_arg): Use memaddr - 2 as the base
2132 address for an extended PC relative instruction that is not a
2137 * m68k-dis.c (print_insn_m68k): Set bytes_per_chunk and
2140 start-sanitize-tic80
2143 * tic80-opc.c (tic80_operands): Fix typo '+' -> '|'.
2144 (tic80_opcodes): Sort entries so that long immediate forms
2145 come after short immediate forms, making it easier for
2146 assembler to select the right one for a given operand.
2151 * mips-dis.c (_print_insn_mips): Set bytes_per_chunk and
2153 (print_insn_mips16): Likewise.
2155 start-sanitize-r5900
2158 * mips-opc.c: add r5900.
2161 start-sanitize-tic80
2164 * tic80-opc.c (tic80_symbol_to_value): Changed to accept
2165 a symbol class that restricts translation to just that
2166 class (general register, condition code, etc).
2170 * tic80-opc.c (tic80_operands): Add REG_0_E, REG_22_E,
2171 and REG_DEST_E for register operands that have to be
2172 an even numbered register. Add REG_FPA for operands that
2173 are one of the floating point accumulator registers.
2174 Add TIC80_OPERAND_MASK to flags for ENDMASK operand.
2175 (tic80_opcodes): Change entries that need even numbered
2176 register operands to use the new operand table entries.
2177 Add "or" entries that are identical to "or.tt" entries.
2182 * mips16-opc.c: Add new cases of exit instruction for
2184 * mips-dis.c (print_mips16_insn_arg): Display floating point
2185 registers in operands of exit instruction. Print `$' before
2186 register names in operands of entry and exit instructions.
2188 start-sanitize-tic80
2191 * tic80-opc.c (tic80_predefined_symbols): Table of name/value
2192 pairs for all predefined symbols recognized by the assembler.
2193 Also used by the disassembling routines.
2194 (tic80_symbol_to_value): New function.
2195 (tic80_value_to_symbol): New function.
2196 * tic80-dis.c (print_operand_control_register,
2197 print_operand_condition_code, print_operand_bitnum):
2198 Remove private tables and use tic80_value_to_symbol function.
2203 * d10v-dis.c (print_operand): Change address printing
2204 to correctly handle PC wrapping. Fixes PR11490.
2208 * mn10200-opc.c (mn10200_operands): Make 8 and 16 bit pc-relative
2213 * mips-dis.c (print_insn_mips16): Set insn_info information.
2214 (print_mips16_insn_arg): Likewise.
2216 * mips-dis.c (print_insn_mips16): Better handling of an extend
2217 opcode followed by an instruction which can not be extended.
2221 * m68k-opc.c (m68k_opcodes): Changed operand specifier for the
2222 coldfire moveb instruction to not allow an address register as
2223 destination. Although the documentation does not indicate that
2224 this is invalid, experiments uncovered unexpected behavior.
2225 Added a comment explaining the situation. Thanks to Andreas
2226 Schwab for pointing this out to me.
2228 start-sanitize-tic80
2231 * tic80-opc.c (tic80_opcodes): Expand comment to note that the
2232 entries are presorted so that entries with the same mnemonic are
2233 adjacent to each other in the table. Sort the entries for each
2234 instruction so that this is true.
2239 * m68k-dis.c: Include <libiberty.h>.
2240 (print_insn_m68k): Sort the opcode table on the most significant
2241 nibble of the opcode.
2243 start-sanitize-tic80
2246 * tic80-dis.c (tic80_opcodes): Add "wrcr", "vmpy", "vrnd",
2247 "vsub", "vst", "xnor", and "xor" instructions.
2248 (V_a1): Renamed from V_a, msb of accumulator reg number.
2249 (V_a0): Add macro, lsb of accumulator reg number.
2253 * tic80-dis.c (print_insn_tic80): Broke excessively long
2254 function up into several smaller ones and arranged for
2255 the instruction printing function to be callable recursively
2256 to print vector instructions that have both a load and a
2257 math instruction packed into a single opcode.
2258 * tic80-opc.c (tic80_opcodes): Expand comment for vld opcode
2259 to explain why it comes after the other vector opcodes.
2264 * m68k-opc.c (m68k_opcodes): add b, w, or l specifier to coldfire
2265 move insns to handle immediate operands.
2269 * m68k-opc.c (m68k_opcodes): Delete duplicate entry for "cmpil".
2270 fix operand mask in the "moveml" entries for the coldfire.
2272 start-sanitize-tic80
2275 * tic80-opc.c (V_a, V_m, V_S, V_Z, V_p, OP_V, MASK_V):
2276 New macros for building vector instruction opcodes.
2277 (tic80_opcodes): Remove all uses of FMT_SI, FMT_REG, and
2278 FMT_LI, which were unused. The field is now a flags field.
2279 Remove some opcodes that are possible, but illegal, such
2280 as long immediate instructions with doubles for immediate
2281 values. Add "vadd" and "vld" instructions.
2285 * tic80-opc.c (tic80_operands): Reorder some table entries to make
2286 the order more logical. Move the shift alias instructions ("rotl",
2287 "shl", "ins", "rotr", "extu", "exts", "srl", and "sra" to be
2288 interspersed with the regular sr.x and sl.x instructions. Add
2289 and test new instruction opcodes for "sl", "sli", "sr", "sri", "st",
2290 "sub", "subu", "swcr", and "trap".
2294 * tic80-opc.c (OFF_SS_PC): Renamed from OFF_SS.
2295 (OFF_SL_PC): Renamed from OFF_SL.
2296 (OFF_SS_BR): New operand type for base relative operand.
2297 (OFF_SL_BR): New operand type for base relative operand.
2298 (REG_BASE): New operand type for base register operand.
2299 (tic80_opcodes): Add and test "fmpy", "frndm", "frndn", "frndp",
2300 "frndz", "fsqrt", "fsub", "illop0", "illopF", "ins", "jsr",
2301 "ld", "ld.u", "lmo", "or", "rdcr", "rmo", "rotl", and "rotr"
2303 * tic80-dis.c (print_insn_tic80): Print opcode name with fixed width
2304 10 char field, padded with spaces on rhs, rather than a string
2305 followed by a tab. Use renamed TIC80_OPERAND_PCREL flag bit rather
2306 than old TIC80_OPERAND_RELATIVE. Add support for new
2307 TIC80_OPERAND_BASEREL flag bit.
2311 * tic80-dis.c (print_insn_tic80): Print floating point operands
2313 * tic80-opc.c (SPFI): Add single precision floating point
2314 immediate operand type.
2315 (ROTATE): Add rotate operand type for shifts.
2316 (ENDMASK): Add for shifts.
2317 (n): Macro for the 'n' bit.
2318 (i): Macro for the 'i' bit.
2319 (PD): Macro for the 'PD' field.
2320 (P2): Macro for the 'P2' field.
2321 (P1): Macro for the 'P1' field.
2322 (tic80_opcodes): Add entries for "exts", "extu", "fadd",
2328 * mn10200-dis.c (disassemble): Mask off unwanted bits after
2329 adding in current address for pc-relative operands.
2331 start-sanitize-tic80
2334 * tic80-dis.c (R_SCALED): Add macro to test for ":s" modifier bit.
2335 (print_insn_tic80): If R_SCALED then print ":s" modifier for operand.
2336 * tic80-opc.c (REG0, REG22, REG27, SSOFF, LSOFF): Names
2337 changed to REG_0, REG_22, REG_DEST, OFF_SS, OFF_SL respectively.
2338 (SICR, LICR, REGM_SI, REGM_LI): Names changed to CR_SI, CR_LI,
2339 REG_BASE_M_SI, REG_BASE_M_LI respectively.
2340 (REG_SCALED, LSI_SCALED): New operand types.
2341 (E): New macro for 'E' bit at bit 27.
2342 (tic80_opcodes): Add and test dld, dld.u, dst, estop, and etrap
2343 opcodes, including the various size flavors (b,h,w,d) for
2344 the direct load and store instructions.
2348 * tic80-dis.c (M_SI, M_LI): Add macros to test for ":m" modifier bit
2350 * tic80-dis.c (print_insn_tic80): Change comma and paren handling.
2351 Use M_SI and M_LI macros to check for ":m" modifier for GPR operands.
2352 * tic80-opc.c (tic80_operands): Add REGM_SI and REGM_LI operands.
2353 (F, M_REG, M_LI, M_SI, SZ_REG, SZ_LI, SZ_SI, D, S): New bit-twiddlers.
2354 (MASK_LI_M, MASK_SI_M, MASK_REG_M): Remove and replace in opcode
2355 masks with "MASK_* & ~M_*" to get the M bit reset.
2356 (tic80_opcodes): Add bsr, bsr.a, cmnd, cmp, dcachec, and dcachef.
2360 * tic80-dis.c (print_insn_tic80): Print TIC80_OPERAND_RELATIVE
2361 correctly. Add support for printing TIC80_OPERAND_BITNUM and
2362 TIC80_OPERAND_CC, and TIC80_OPERAND_CR operands in symbolic
2364 * tic80-opc.c (tic80_operands): Add SSOFF, LSOFF, BITNUM,
2365 CC, SICR, and LICR table entries.
2366 (tic80_opcodes): Add and test "nop", "br", "bbo", "bbz",
2367 "bcnd", and "brcr" opcodes.
2372 * ppc-opc.c (powerpc_operands): Make comment match the
2373 actual fields (no shift field).
2374 * sparc-opc.c (sparc_opcodes): Document why this cannot be "const".
2375 start-sanitize-tic80
2376 * tic80-dis.c (print_insn_tic80): Replace abort stub with a
2377 partial implementation, work in progress.
2378 * tic80-opc.c (tic80_operands): Begin construction operands table.
2379 (tic80_opcodes): Continue populating opcodes table and start
2380 filling in the operand indices.
2381 (tic80_num_opcodes): Add this.
2386 * m68k-opc.c: Add #B case for moveq.
2390 * mn10300-dis.c (disassemble): Make sure all variables are initialized
2391 before they are used.
2395 * v850-opc.c (v850_opcodes): Put curly-braces around operands
2396 for "breakpoint" instruction.
2400 * Makefile.in (ALL_CFLAGS): Add -D_GNU_SOURCE.
2401 (dep): Use ALL_CFLAGS rather than CFLAGS.
2405 * v850-opc.c (D8_{6,7}): Set V850_OPERAND_ADJUST_SHORT_MEMORY
2410 * Makefile.in (m68k-opc.o, alpha-opc.o): Remove dis-asm.h dependency.
2411 start-sanitize-tic80
2412 (tic80-dis.o, tic80-opc.o): Add rules per comment in Makefile.in.
2417 * mips16-opc.c: Add "abs".
2419 start-sanitize-tic80
2422 * Makefile.in (ALL_MACHINES): Add tic80-dis.o and tic80-opc.o.
2423 * disassemble.c (ARCH_tic80): Define if ARCH_all is defined.
2424 (disassembler): Add bfd_arch_tic80 support to set disassemble
2425 to print_insn_tic80.
2426 * tic80-dis.c (print_insn_tic80): Add stub.
2430 * configure.in (arch in $selarchs): Add bfd_tic80_arch entry.
2431 * configure: Regenerate with autoconf.
2432 * tic80-dis.c: Add file.
2433 * tic80-opc.c: Add file.
2438 * d10v-opc.c (pre_defined_registers): Add cr[0-15], dpc, dpsw, link.
2442 * mn10200-opc.c (mn10200_operands): Add SIMM16N.
2443 (mn10200_opcodes): Use it for some logicals and btst insns.
2444 Add "break" and "trap" instructions.
2446 * mn10300-opc.c (mn10300_opcodes): Add "break" instruction.
2448 * mn10200-opc.c: Add pseudo-ops for "mov (an),am" and "mov an,(am)".
2452 * mips-dis.c (print_mips16_insn_arg): The base address of a PC
2453 relative load or add now depends upon whether the instruction is
2458 * mn10200-dis.c: Finish writing disassembler.
2459 * mn10200-opc.c (mn10200_opcodes): Fix mask for "mov imm8,dn".
2460 Fix mask for "jmp (an)".
2462 * mn10300-dis.c (disassemble, print_insn_mn10300): Corrently
2463 handle endianness issues for mn10300.
2465 * mn10200-opc.c (mn10200_opcodes): Fix operands for "movb dm,(an)".
2469 * mn10200-opc.c (mn10200_opcodes): "mov imm8,d0" is a format 2
2470 instruction. Fix opcode field for "movb (imm24),dn".
2472 * mn10200-opc.c (mn10200_operands): Fix insertion position
2477 * mn10200-opc.c: Create mn10200 opcode table.
2478 * mn10200-dis.c: Flesh out mn10200 disassembler. Not ready,
2479 but moving along nicely.
2483 * Makefile.in (ALL_MACHINES): Add mips16-opc.o.
2487 * m68k-opc.c (m68k_opcodes): Revert change to use < and >
2488 specifiers for fmovem* instructions.
2492 * mn10300-dis.c (disassemble): Remove '$' register prefixing.
2496 * mips16-opc.c: Change opcode for entry/exit to avoid conflicting
2501 * mn10300-opc.c: Add some comments explaining the various
2504 * mn10300-dis.c (disassemble): Fix minor gcc -Wall warnings.
2508 * m68k-dis.c (print_insn_arg): Handle new < and > operand
2511 * m68k-opc.c (m68k_opcodes): Simplify table by using < and >
2512 operand specifiers in fmovm* instructions.
2516 * ppc-opc.c (insert_li): Give an error if the offset has the two
2517 least significant bits set.
2521 * mips-dis.c (print_insn_mips16): Separate the instruction from
2522 the arguments with a tab, not a space.
2526 * mn10300-dis.c (disasemble): Finish conversion to '$' as
2529 * mn10300-opc.c (mn10300_opcodes): Fix mask field for
2534 * configure: Rebuild with autoconf 2.12.
2536 Add support for mips16 (16 bit MIPS implementation):
2537 * mips16-opc.c: New file.
2538 * mips-dis.c: Include "elf-bfd.h" and "elf/mips.h".
2539 (mips16_reg_names): New static array.
2540 (print_insn_big_mips): Use print_insn_mips16 in 16 bit mode or
2541 after seeing a 16 bit symbol.
2542 (print_insn_little_mips): Likewise.
2543 (print_insn_mips16): New static function.
2544 (print_mips16_insn_arg): New static function.
2545 * mips-opc.c: Add jalx instruction.
2546 * Makefile.in (mips16-opc.o): New target.
2547 * configure.in: Use mips16-opc.o for bfd_mips_arch.
2548 * configure: Rebuild.
2552 * m68k-opc.c (m68k_opcodes): Simplify table by using < and >
2553 operand specifiers in *save, *restore and movem* instructions.
2555 * m68k-opc.c (m68k_opcodes): Fix move and movem instructions for
2558 * m68k-opc.c (m68k_opcodes): The coldfire (mcf5200) can only use
2559 register operands for immediate arithmetic, not, neg, negx, and
2560 set according to condition instructions.
2562 * m68k-opc.c (m68k_opcodes): Consistantly Use "s" as the storage
2563 specifier of the effective-address operand in immediate forms of
2564 arithmetic instructions. The specifier for the immediate operand
2565 notes how and where the constant will be stored.
2569 * mn10300-opc.c (mn10300_opcodes): Remove redundant "lcc"
2572 * mn10300-dis.c (disassemble): Use '$' instead of '%' for
2575 * mn10300-dis.c (disassemble): Prefix registers with '%'.
2579 * mn10300-dis.c (disassemble): Handle register lists.
2581 * mn10300-opc.c: Fix handling of register list operand for
2582 "call", "ret", and "rets" instructions.
2584 * mn10300-dis.c (disassemble): Print PC-relative and memory
2585 addresses symbolically if possible.
2586 * mn10300-opc.c: Distinguish between absolute memory addresses,
2587 pc-relative offsets & random immediates.
2589 * mn10300-dis.c (print_insn_mn10300): Fix fetch of last byte
2591 (disassemble): Handle SPLIT and EXTENDED operands.
2595 * mn10300-dis.c: Rough cut at printing some operands.
2597 * mn10300-dis.c: Start working on disassembler support.
2598 * mn10300-opc.c (mn10300_opcodes): Fix masks on several insns.
2600 * mn10300-opc.c (mn10300_operands): Add "REGS" for a register
2602 (mn10300_opcodes): Use REGS for register list in "movm" instructions.
2606 * d10v-opc.c (d10v_opcodes): Add3 sets the carry.
2610 * mn10300-opc.c (mn10300_opcodes): Demand parens around
2611 register argument is calls and jmp instructions.
2615 * mn10300-opc.c (mn10300_opcodes): Use DN01 for putx and
2616 getx operand. Fix opcode for mulqu imm,dn.
2620 * mn10300-opc.c (mn10300_operands): Hijack "bits" field
2621 in MN10300_OPERAND_SPLIT operands for how many bits
2622 appear in the basic insn word. Add IMM32_HIGH24,
2623 IMM32_HIGH24_LOWSHIFT8, IMM8E_SHIFT8.
2624 (mn10300_opcodes): Use new operands as needed.
2626 * mn10300-opc.c (mn10300_operands): Add IMM32_LOWSHIFT8
2627 for bset, bclr, btst instructions.
2628 (mn10300_opcodes): Use new IMM32_LOWSHIFT8 as needed.
2630 * mn10300-opc.c (mn10300_operands): Remove many redundant
2631 operands. Update opcode table as appropriate.
2632 (IMM32): Add MN10300_OPERAND_SPLIT flag.
2633 (mn10300_opcodes): Fix single bit error in mov imm32,dn insn.
2637 * mn10300-opc.c (mn10300_operands): Add DN2, DM2, AN2, AM2
2638 operands (for indexed load/stores). Fix bitpos for DI
2639 operand. Add SN8N_SHIFT8, IMM8_SHIFT8, and D16_SHIFT for the
2640 few instructions that insert immediates/displacements in the
2641 middle of the instruction. Add IMM8E for 8 bit immediate in
2642 the extended part of an instruction.
2643 (mn10300_operands): Use new opcodes as appropriate.
2647 * d10v-opc.c (d10v_opcodes): Declare the trap instruction
2648 sequential so the assembler never parallelizes it with
2653 * mn10300-opc.c (mn10300_operands): Add DN01 and AN01 for
2654 a data/address register that appears in register field 0
2655 and register field 1.
2656 (mn10300_opcodes): Use DN01 and AN01 for mov/cmp imm8,DN/AN
2660 * alpha-dis.c (print_insn_alpha): Use new NOPAL mask for
2661 standard disassembly.
2663 * alpha-opc.c (alpha_operands): Rearrange flags slot.
2664 (alpha_opcodes): Add new BWX, CIX, and MAX instructions.
2665 Recategorize PALcode instructions.
2669 * v850-opc.c (v850_opcodes): Add relaxing "jbr".
2673 * mips-dis.c (_print_insn_mips): Don't print a trailing tab if
2674 there are no operand types.
2678 * v850-opc.c (D9_RELAX): Renamed from D9, all references
2680 (v850_operands): Make sure D22 immediately follows D9_RELAX.
2684 * i386-dis.c (print_insn_x86): Set info->bytes_per_line to 5.
2688 * v850-opc.c (insert_d8_6): Fix operand insertion for sld.w
2689 and sst.w instructions.
2691 * v850-opc.c (v850_opcodes): Add "jCC" instructions (aliases for
2696 * mips-dis.c (_print_insn_mips): Use a tab between the instruction
2701 * ppc-opc.c (PPCPWR2): Define.
2702 (powerpc_opcodes): Use PPCPWR2 for fsqrt, rather than duplicating
2707 * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode
2708 field for movhu instruction.
2710 * v850-dis.c (disassemble): For V850_OPERAND_SIGNED operands,
2711 cast value to "long" not "signed long" to keep hpux10
2716 * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode field
2719 * mn10300-opc.c (FMT*): Remove definitions.
2721 * mn10300-opc.c (mn10300_opcodes): Fix destination register
2722 for shift-by-register opcodes.
2724 * mn10300-opc.c (mn10300_operands): Break DN, DM, AN, AM
2725 into [AD][MN][01] for encoding the position of the register
2730 * mn10300-opc.c (mn10300_opcodes): Add "extended" instructions,
2731 "putx", "getx", "mulq", "mulqu", "sat16", "sat24", "bsch".
2735 * mn10300-opc.c (mn10300_operands): Remove "REGS" operand.
2736 Fix various typos. Add "PAREN" operand.
2737 (MEM, MEM2): Define.
2738 (mn10300_opcodes): Surround all memory addresses with "PAREN"
2739 operands. Fix several typos.
2741 * mn10300-opc.c (mn10300_opcodes): Fix typos in yesterday's
2746 * mn10300-opc.c (FMT_XX): Renumber starting at one.
2747 (mn10300_operands): Rough cut. Enough to parse "mov" instructions
2749 (mn10300_opcodes): Break opcode format out into its own field.
2750 Update many operand fields to deal with signed vs unsigned
2751 issues. Fix one or two typos in the "mov" instruction
2752 opcode, mask and/or operand fields.
2756 * m68k-opc.c (plusha): Prefer encoding for m68040up, in case
2757 m68851 wasn't reset.
2761 * mn10300-opc.c (mn10300_opcodes): Add opcode & masks for
2762 all opcodes. Very rough cut at operands for all opcodes.
2764 * mn10300-opc.c (mn10300_opcodes): Start fleshing out the
2769 * mn10200-opc.c, mn10300-opc.c: New files.
2770 * mn10200-dis.c, mn10300-dis.c: New files.
2771 * mn10x00-opc.c, mn10x00-dis.c: Deleted.
2772 * disassemble.c: Break mn10x00 support into 10200 and 10300
2774 * configure.in: Likewise.
2775 * configure: Rebuilt.
2779 * Makefile.in (MOSTLYCLEAN): Move config.log to distclean.
2783 * mn10x00-opc.c, mn10x00-dis.c: New files for Matsushita
2785 * disassemble (ARCH_mn10x00): Define.
2786 (disassembler): Handle bfd_arch_mn10x00.
2787 * configure.in: Recognize bfd_mn10x00_arch.
2788 * configure: Rebuilt.
2792 * i386-dis.c (op_rtn): Change to be a pointer. Adjust uses
2793 accordingly. Don't declare functions using op_rtn.
2797 * v850-dis.c (disassemble): Add memaddr argument. Re-arrange
2798 params to be more standard.
2799 * (disassemble): Print absolute addresses and symbolic names for
2800 branch and jump targets.
2801 * v850-opc.c (v850_operand): Add displacement flag to 9 and 22
2803 * (v850_opcodes): Add breakpoint insn.
2807 * m68k-opc.c: Move the fmovemx data register cases before the
2808 other cases, so that they get recognized before the data register
2809 does gets treated as a degenerate register list.
2813 * mips-opc.c: Add a case for "div" and "divu" with two registers
2814 and a destination of $0.
2818 * mips-dis.c (print_insn_arg): Add prototype.
2819 (_print_insn_mips): Ditto.
2823 * mips-dis.c (print_insn_arg): Print condition code registers as
2828 * sparc-opc.c (sparc_opcodes): Add setuw, setsw, setx.
2832 * v850-dis.c (disassemble): Make static. Provide prototype.
2836 * v850-opc.c (insert_d9, insert_d22): Fix boundary case
2841 * v850-dis.c (disassemble): Handle insertion of ',', '[' and
2842 ']' characters into the output stream.
2843 * v850-opc.c (v850_opcodes: Remove size field from all opcodes.
2844 Add "memop" field to all opcodes (for the disassembler).
2845 Reorder opcodes so that "nop" comes before "mov" and "jr"
2846 comes before "jarl".
2848 * v850-dis.c (print_insn_v850): Fix typo in last change.
2850 * v850-dis.c (print_insn_v850): Properly handle disassembling
2851 a two byte insn at the end of a memory region when the memory
2852 region's size is only two byte aligned.
2854 * v850-dis.c (v850_cc_names): Fix stupid thinkos.
2856 * v850-dis.c (v850_reg_names): Define.
2857 (v850_sreg_names, v850_cc_names): Likewise.
2858 (disassemble): Very rough cut at printing operands (unformatted).
2860 * v850-opc.c (BOP_MASK): Fix.
2861 (v850_opcodes): Fix mask for jarl and jr.
2863 * v850-dis.c: New file. Skeleton for disassembler support.
2864 * Makefile.in Remove v850 references, they're not needed here.
2865 * configure.in: Add v850-dis.o when building v850 toolchains.
2866 * configure: Rebuilt.
2867 * disassemble.c (disassembler): Call v850 disassembler.
2869 * v850-opc.c (insert_d8_7, extract_d8_7): New functions.
2870 (insert_d8_6, extract_d8_6): New functions.
2871 (v850_operands): Rename D7S to D7; operand for D7 is unsigned.
2872 Rename D8 to D8_7, use {insert,extract}_d8_7 routines.
2874 (IF4A, IF4B): Use "D7" instead of "D7S".
2875 (IF4C, IF4D): Use "D8_7" instead of "D8".
2876 (IF4E, IF4F): New. Use "D8_6".
2877 (v850_opcodes): Use IF4A/IF4B for sld.b/sst.b. Use IF4C/IF4D for
2878 sld.h/sst.h. Use IF4E/IF4F for sld.w/sst.w.
2880 * v850-opc.c (insert_d16_15, extract_d16_15): New functions.
2881 (v850_operands): Change D16 to D16_15, use special insert/extract
2882 routines. New new D16 that uses the generic insert/extract code.
2883 (IF7A, IF7B): Use D16_15.
2884 (IF7C, IF7D): New. Use D16.
2885 (v850_opcodes): Use IF7C and IF7D for ld.b and st.b.
2887 * v850-opc.c (insert_d9, insert_d22): Slightly improve error
2888 message. Issue an error if the branch offset is odd.
2890 * v850-opc.c: Add notes about needing special insert/extract
2891 for all the load/store insns, except "ld.b" and "st.b".
2893 * v850-opc.c (insert_d22, extract_d22): New functions.
2894 (v850_operands): Use insert_d22 and extract_d22 for
2896 (insert_d9): Fix range check.
2900 * v850-opc.c (v850_operands): Add V850_OPERAND_SIGNED flag
2901 and set bits field to D9 and D22 operands.
2905 * v850-opc.c (v850_operands): Define SR2 operand.
2906 (v850_opcodes): "ldsr" uses R1,SR2.
2908 * v850-opc.c (v850_opcodes): Fix opcode specs for
2909 sld.w, sst.b, sst.h, sst.w, and nop.
2913 * v850-opc.c (v850_opcodes): Add null opcode to mark the
2914 end of the opcode table.
2918 * d10v-opc.c (pre_defined_registers): Added register pairs,
2919 "r0-r1", "r2-r3", etc.
2923 * v850-opc.c (v850_operands): Make I16 be a signed operand.
2924 Create I16U for an unsigned 16bit mmediate operand.
2925 (v850_opcodes): Use I16U for "ori", "andi" and "xori".
2927 * v850-opc.c (v850_operands): Define EP operand.
2928 (IF4A, IF4B, IF4C, IF4D): Use EP.
2930 * v850-opc.c (v850_opcodes): Fix opcode numbers for "mov"
2931 with immediate operand, "movhi". Tweak "ldsr".
2933 * v850-opc.c (v850_opcodes): Get ld.[bhw] and st.[bhw]
2934 correct. Get sld.[bhw] and sst.[bhw] closer.
2936 * v850-opc.c (v850_operands): "not" is a two byte insn
2938 * v850-opc.c (v850_opcodes): Correct bit pattern for setf.
2940 * v850-opc.c (v850_operands): D16 inserts at offset 16!
2942 * v850-opc.c (two): Get order of words correct.
2944 * v850-opc.c (v850_operands): I16 inserts at offset 16!
2946 * v850-opc.c (v850_operands): Add "SR1" and "SR2" for system
2947 register source and destination operands.
2948 (v850_opcodes): Use SR1 and SR2 for "ldsr" and "stsr".
2950 * v850-opc.c (v850_opcodes): Fix thinko in "jmp" opcode. Fix
2951 same thinko in "trap" opcode.
2953 * v850-opc.c (v850_opcodes): Add initializer for size field
2956 * v850-opc.c (v850_operands): D6 -> DS7. References changed.
2957 Add D8 for 8-bit unsigned field in short load/store insns.
2958 (IF4A, IF4D): These both need two registers.
2959 (IF4C, IF4D): Define. Use 8-bit unsigned field.
2960 (v850_opcodes): For "sld.h", "sld.w", "sst.h", "sst.w", use
2961 IF4C & IF4D. For "trap" use I5U, not I5. Add IF1 operand
2962 for "ldsr" and "stsr".
2963 * v850-opc.c (v850_operands): 3-bit immediate for bit insns
2966 * v850-opc.c (v850_opcodes): Correct short store half (sst.h) and
2967 short store word (sst.w).
2971 * v850-opc.c (v850_operands): Added insert and extract fields,
2972 pointers to functions that handle unusual operand encodings.
2976 * v850-opc.c (v850_opcodes): Enable "trap".
2978 * v850-opc.c (v850_opcodes): Fix order of displacement
2979 and register for "set1", "clr1", "not1", and "tst1".
2983 * v850-opc.c (v850_operands): Add "B3" support.
2984 (v850_opcodes): Fix and enable "set1", "clr1", "not1"
2987 * v850-opc.c (v850_opcodes): "jmp" has only an R1 operand.
2989 * v850-opc.c: Close unterminated comment.
2993 * v850-opc.c (v850_operands): Add flags field.
2994 (v850_opcodes): add move opcodes.
2998 * Makefile.in (ALL_MACHINES): Add v850-opc.o.
2999 * configure: (bfd_v850v_arch) Add new case.
3000 * configure.in: (bfd_v850_arch) Add new case.
3001 * v850-opc.c: New file.
3005 * sparc-dis.c (print_insn_sparc): Handle little endian sparcs.
3009 * d10v-opc.c: Add additional information to the opcode
3010 table to help determinine which instructions can be done
3015 * mpw-make.sed: Update editing of include pathnames to be
3020 * arm-opc.h: Added "bx" instruction definition.
3024 * alpha-opc.c (EV4EXTHWINDEX): Field width should be 8 not 5.
3028 * d10v-opc.c (d10v_opcodes): Minor fixes to addi and bl.l.
3032 * d10v-opc.c (d10v_opcodes): Correct 'mv' unit entry to EITHER.
3036 * makefile.vms: Update for alpha-opc changes.
3040 * i386-dis.c (print_insn_i386): Actually return the correct value.
3041 (ONE, OP_ONE): #ifdef out; not used.
3045 * d10v-opc.c (d10v_opcodes): Added 2 accumulator sub instructions.
3046 Changed subi operand type to treat 0 as 16.
3050 * m68k-opc.c: Add cpushl for the mcf5200. From Ken Rose
3055 * arm-opc.h: (arm_opcodes): Added halfword and sign-extension
3056 memory transfer instructions. Add new format string entries %h and %s.
3057 * arm-dis.c: (print_insn_arm): Provide decoding of the new
3062 * d10v-opc.c (d10v_operands): Added UNUM4S; a 4-bit accumulator shift.
3063 (d10v_opcodes): Modified accumulator shift instructions to use UNUM4S.
3067 * alpha-dis.c (print_insn_alpha_osf): Remove.
3068 (print_insn_alpha_vms): Remove.
3069 (print_insn_alpha): Make globally visible. Chose the register
3070 names based on info->flavour.
3071 * disassemble.c: Always return print_insn_alpha for the alpha.
3075 * d10v-dis.c (dis_long): Handle unknown opcodes.
3079 * d10v-opc.c: Changes to support signed and unsigned numbers.
3080 All instructions with the same name that have long and short forms
3081 now end in ".l" or ".s". Divs added.
3082 * d10v-dis.c: Changes to support signed and unsigned numbers.
3086 * d10v-dis.c: Change all functions to use info->print_address_func.
3090 * m68k-opc.c (m68k_opcodes): Make opcode masks for the ColdFire
3091 move ccr/sr insns more strict so that the disassembler only
3092 selects them when the addressing mode is data register.
3095 * d10v-opc.c (pre_defined_registers): Declare.
3096 * d10v-dis.c (print_operand): Now uses pre_defined_registers
3097 to pick a better name for the registers.
3101 * sparc-opc.c: Fix opcode values for fpack16, and fpackfix. Fix
3102 operands for fexpand and fpmerge. From Christian Kuehnke
3107 * alpha-dis.c (print_insn_alpha): No longer the user-visible
3108 print routine. Take new regnames and cpumask arguments.
3109 Kill the environment variable nonsense.
3110 (print_insn_alpha_osf): New function. Do OSF/1 style regnames.
3111 (print_insn_alpha_vms): New function. Do VMS style regnames.
3112 * disassemble.c (disassembler): Test bfd flavour to pick
3113 between OSF and VMS routines. Default to OSF.
3117 * configure.in: Call AC_SUBST (INSTALL_SHLIB).
3118 * configure: Rebuild.
3119 * Makefile.in (install): Use @INSTALL_SHLIB@.
3123 * configure: (bfd_d10v_arch) Add new case.
3124 * configure.in: (bfd_d10v_arch) Add new case.
3125 * d10v-dis.c: New file.
3126 * d10v-opc.c: New file.
3127 * disassemble.c (disassembler) Add entry for d10v.
3131 * m68k-opc.c (m68k_opcodes): Fix bugs in coldfire insns relating
3132 to bcc, trapfl, subxl, and wddata discovered by Andreas Schwab.
3136 * i386-dis.c: Get rid of print_insn_i8086. Use info.mach to
3137 distinguish between variants of the instruction set.
3138 * sparc-dis.c: Get rid of print_insn_sparclite. Use info.mach to
3139 distinguish between variants of the instruction set.
3143 * i386-dis.c (print_insn_i8086): New routine to disassemble using
3144 the 8086 instruction set.
3145 * i386-dis.c: General cleanups. Make most things static. Add
3146 prototypes. Get rid of static variables aflags and dflags. Pass
3147 them as args (to almost everything).
3151 * h8300-dis.c (bfd_h8_disassemble): Handle macregs in ldmac insns.
3153 * h8300-dis.c (bfd_h8_disassemble): Handle "ldm.l" and "stm.l".
3155 * h8300-dis.c (bfd_h8_disassemble): "abs" is implicitly two
3156 if the next arg is marked with SRC_IN_DST. Gross.
3158 * h8300-dis.c (bfd_h8_disassemble): Print "exr" when
3159 we're looking for and find EXR.
3161 * h8300-dis.c (bfd_h8_disassemble): We don't have a match
3162 if we're looking for KBIT and we don't find it.
3164 * h8300-dis.c (bfd_h8_disassemble): Mask off unwanted bits
3167 * h8300-dis.c (bfd_h8_disassemble): Don't set plen for
3168 3bit immediate operands.
3172 * Released binutils 2.7.
3174 * alpha-opc.c: Add new case of "mov". From Klaus Kaempf
3179 * alpha-opc.c: Correct second case of "mov" to use OPRL.
3183 * sparc-dis.c (print_insn_sparclite): New routine to print
3184 sparclite instructions.
3188 * m68k-opc.c (m68k_opcodes): Add coldfire support.
3192 * sparc-opc.c (asi_table): Add #ASI_N, #ASI_N_L, #ASI_NUCLEUS,
3193 #ASI_NUCLEUS_LITTLE. Rename #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_L
3194 to #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_LITTLE.
3198 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir):
3199 Use autoconf-set values.
3200 (docdir, oldincludedir): Removed.
3201 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3205 * alpha-opc.c: New file.
3206 * alpha-opc.h: Remove.
3207 * alpha-dis.c: Complete rewrite to use new opcode table.
3208 * configure.in: For bfd_alpha_arch, use alpha-opc.o.
3209 * configure: Rebuild with autoconf 2.10.
3210 * Makefile.in (ALL_MACHINES): Add alpha-opc.o.
3211 (alpha-dis.o): Depend upon $(INCDIR)/opcode/alpha.h, not
3213 (alpha-opc.o): New target.
3217 * sparc-dis.c (print_insn_sparc): Remove unused local variable i.
3218 Set imm_added_to_rs1 even if the source and destination register
3221 * sparc-opc.c: Add some two operand forms of the wr instruction.
3225 * h8300-dis.c (bfd_h8_disassemble): Rename "hmode" argument
3228 * disassemble.c (disassembler): Handle H8/S.
3229 * h8300-dis.c (print_insn_h8300s): New function for H8/S.
3233 * sparc-opc.c: Add beq/teq as aliases for be/te.
3235 * ppc-opc.c: Fix fcmpo opcode. From Sergei Steshenko
3240 * makefile.vms: New file.
3242 * alpha-dis.c (print_insn_alpha): Print lda ra,lit(rz) as mov.
3246 * h8300-dis.c (bfd_h8_disassemble): Always print ABS8MEM with :8,
3251 * i386-dis.c (OP_OFF): Call append_prefix.
3255 * ppc-opc.c (instruction encoding macros): Add explicit casts to
3256 unsigned long to silence a warning from the Solaris PowerPC
3261 * sparc-opc.c (sparc_opcodes): Add ultrasparc vis extensions.
3265 * sparc-dis.c (X_IMM,X_SIMM): New macros.
3267 (print_insn_sparc): Merge cases i,I,j together. New cases X,Y.
3268 * sparc-opc.c (sparc_opcodes): Use X for 5 bit shift constants,
3269 Y for 6 bit shift constants. Rewrite entries for crdcxt, cwrcxt,
3270 cpush, cpusha, cpull sparclet insns.
3274 * sparc-dis.c (compute_arch_mask): Replace ANSI style def with K&R.
3278 * sparc-opc.c: Set F_FBR on floating point branch instructions.
3279 Set F_FLOAT on other floating point instructions.
3283 * ppc-opc.c (PPC860): Macro for 860/821 specific instructions and
3285 (powerpc_opcodes): Add 860/821 specific SPRs.
3289 * configure.in: Permit --enable-shared to specify a list of
3290 directories. Set and substitute BFD_PICLIST.
3291 * configure: Rebuild.
3292 * Makefile.in (BFD_PICLIST): Rename from BFD_LIST. Change all
3293 uses. Set to @BFD_PICLIST@.
3297 * h8300-dis.c (bfd_h8_disassemble): Use "bit" for L_3 immediates,
3298 not "abs", which may be needed for the absolute in something
3299 like btst #0,@10:8. Print L_3 immediates separately from other
3300 immediates. Change ABSMOV reference to ABS8MEM.
3304 * sparc-dis.c (opcodes_initialized): Move inside print_insn_sparc.
3305 (current_arch_mask): New static global.
3306 (compute_arch_mask): New static function.
3307 (print_insn_sparc): Delete sparc_v9_p. New static local
3308 current_mach. Resort opcode table if current_mach changes.
3309 Generalize "insn not supported" test.
3310 (compare_opcodes): Prefer supported opcodes to nonsupported ones.
3311 Delete test for v9/!v9.
3312 * sparc-opc.c (MASK_*): Use SPARC_OPCODE_ARCH_MASK.
3314 (brfc): Split into CBR and FBR for coprocessor/fp branches.
3315 (brfcx): Renamed to FBRX.
3316 (condfc): Renamed to CONDFC. Pass v6notlet to CBR (standard
3317 coprocessor mnemonics are not supported on the sparclet).
3318 (condf): Renamed to CONDF.
3319 (SLCBCC2): Delete F_ALIAS flag.
3323 * sparc-opc.c (sparc_opcodes): rd must be 0 for
3324 mov foo,{%y,%psr,%wim,%tbr}. Support mov foo,%asrX.
3328 * Makefile.in (config.status): Depend upon BFD VERSION file, so
3329 that the shared library version number is set correctly.
3333 * configure.in: Use AC_CHECK_TOOL to find ar and ranlib. From
3335 * configure: Rebuild.
3339 * z8kgen.c (internal, gas): Call xmalloc rather than unchecked
3344 * configure: Rebuild with autoconf 2.8.
3348 * sparc-dis.c (print_insn_sparc): Handle 'O' operand char like 'r'.
3349 * sparc-opc.c (sparc_opcodes): Use 'O' operand char for `neg reg'.
3353 * configure.in: Don't set SHLIB or SHLINK to an empty string,
3354 since they appear as targets in Makefile.in.
3355 * configure: Rebuild.
3359 * mpw-make.sed: Edit out shared library support bits.
3363 * sparc-opc.c (v8,v6notv9): Add MASK_SPARCLET.
3364 (sparc_opcode_archs): Add MASK_V8 to sparclet entry.
3365 (sparc_opcodes): Add sparclet insns.
3366 (sparclet_cpreg_table): New static local.
3367 (sparc_{encode,decode}_sparclet_cpreg): New functions.
3368 * sparc-dis.c (print_insn_sparc): Handle sparclet cpregs.
3372 * i386-dis.c (index16): New static variable.
3373 (putop): Print jecxz for 32 bit case, jcxz for 16 bit, not the
3375 (OP_indirE): Return result of OP_E.
3376 (OP_E): Check for 16 bit addressing mode, and disassemble
3377 correctly. Optimised 32 bit case a little. Don't print
3378 "(base,index,scale)" when sib specifies only an offset.
3382 * configure.in: Set and substitute SHLIB_DEP.
3383 * configure: Rebuild.
3384 * Makefile.in (SHLIB_DEP): New variable.
3385 (LIBIBERTY_LISTS, BFD_LIST): New variables.
3386 (stamp-piclist): Depend upon LIBIBERTY_LISTS and BFD_LIST. If
3387 COMMON_SHLIB, add them to piclist with appropriate modifications.
3388 ($(SHLIB)): Depend upon $(SHLIB_DEP). Don't check COMMON_SHLIB
3389 here: just use piclist.
3393 * sparc-dis.c (MASK_V9,V9_ONLY_P,V9_P): Define.
3394 (print_insn_sparc): Rewrite v9/not-v9 tests.
3395 (compare_opcodes): Likewise.
3396 * sparc-opc.c (MASK_<ARCH>): Define.
3397 (v6,v7,v8,sparclite,v9,v9a): Redefine.
3398 (sparclet,v6notv9): Define.
3399 (sparc_opcode_archs): Delete member `conflicts'. Add `supported'.
3400 (sparc_opcodes): Delete F_NOTV9, use v6notv9 instead.
3404 * configure.in: Call AC_PROG_CC before configure.host.
3405 * configure: Rebuild.
3407 * Makefile.in (SONAME): Remove leading ../bfd/ from $(SHLIB).
3411 * i386-dis.c (onebyte_has_modrm): New static array.
3412 (twobyte_has_modrm): New static array.
3413 (print_insn_i386): Only fetch the mod/reg/rm byte if it is needed.
3417 * Makefile.in ($(SHLINK)): Check ts against $(SHLIB), not
3422 * ppc-opc.c (PPC): Undef, so default defination on Windows NT
3427 * m68k-opc.c (m68k_opcodes): The bkpt instruction is supported on
3428 m68010up, not just m68020up | cpu32.
3430 * Makefile.in (SONAME): New variable.
3431 ($(SHLINK)): Make a link to the transformed name, as well.
3432 (stamp-tshlink): New target.
3433 (install): Skip stamp-tshlink during install.
3437 * configure.in: Call AC_ARG_PROGRAM.
3438 * configure: Rebuild.
3439 * Makefile.in (program_transform_name): New variable.
3440 (install): Transform library name before installing it.
3444 * i960-dis.c (mem): Add HX dcinva instruction.
3446 Support for building as a shared library, based on patches from
3448 * configure.in: Add AC_ARG_ENABLE for shared and commonbfdlib.
3449 New substitutions: ALLLIBS, PICFLAG, SHLIB, SHLIB_CC,
3450 SHLIB_CFLAGS, COMMON_SHLIB, SHLINK.
3451 * configure: Rebuild.
3452 * Makefile.in (ALLLIBS): New variable.
3453 (PICFLAG, SHLIB, SHLIB_CC, SHLIB_CFLAGS): New variables.
3454 (COMMON_SHLIB, SHLINK): New variables.
3455 (.c.o): If PICFLAG is set, compile twice, once PIC, once normal.
3456 (STAGESTUFF): Remove variable.
3457 (all): Depend upon $(ALLLIBS) rather than $(TARGETLIB).
3458 (stamp-piclist, piclist): New targets.
3459 ($(SHLIB), $(SHLINK)): New targets.
3460 ($(OFILES)): Depend upon stamp-picdir.
3461 (disassemble.o): Build twice if PICFLAG is set.
3462 (MOSTLYCLEAN): Add pic/*.o.
3463 (clean): Remove $(SHLIB), $(SHLINK), piclist, and stamp-piclist.
3464 (distclean): Remove pic and stamp-picdir.
3465 (install): Install shared libraries.
3466 (stamp-picdir): New target.
3470 * sparc-dis.c (print_insn_sparc): Delete DISASM_RAW_INSN support.
3471 Print unknown instruction as "unknown", rather than in hex.
3475 * dis-buf.c: Include "sysdep.h" before "dis-asm.h".
3479 * sparc-opc.c (sparc_opcode_archs): Mark v8/sparclite as conflicting.
3483 * i386-dis.c (print_insn_i386): Only fetch the mod/reg/rm byte
3484 when necessary. From Ulrich Drepper
3489 * sparc-dis.c (print_insn_sparc): NUMOPCODES replaced with
3490 sparc_num_opcodes. Update architecture enum values.
3491 * sparc-opc.c (sparc_opcode_archs): Replaces architecture_pname.
3492 (sparc_opcode_lookup_arch): New function.
3493 (sparc_num_opcodes): Renamed from bfd_sparc_num_opcodes.
3494 (sparc_opcodes): Add v9a shutdown insn.
3498 * sparc-dis.c (print_insn_sparc): Renamed from print_insn.
3499 If DISASM_RAW_INSN, print insn in hex. Handle v9a as opcode
3501 (print_insn_sparc64): Deleted.
3502 * disassemble.c (disassembler, case bfd_arch_sparc): Always use
3505 * sparc-opc.c (architecture_pname): Add v9a.
3509 * alpha-opc.h (alpha_insn_set): VAX floating point opcode was
3510 incorrectly defined as 0x16 when it should be 0x15.
3511 (FLOAT_FORMAT_MASK): function code is 11 bits, not just 7 bits!
3512 (alpha_insn_set): added cvtst and cvttq float ops. Also added
3513 excb (exception barrier) which is defined in the Alpha
3514 Architecture Handbook version 2.
3515 * alpha-dis.c (print_insn_alpha): Fixed special-case decoding for
3516 OPERATE_FORMAT_CODE type instructions. The bug caused mulq to be
3517 disassembled as or, for example.
3521 * mips-dis.c (print_insn_arg): Print cases 'i' and 'u' in hex.
3522 (_print_insn_mips): Change i from int to unsigned int.
3526 * ppc-opc.c (powerpc_opcodes): tlbi POWER opcode form different
3527 from tlbie PowerPC opcode. Add PPC603 tlbld and tlbli.
3531 * i386-dis.c: Added Pentium Pro instructions.
3535 * ppc-opc.c (fsqrt{,.}): Duplicate for PowerPC in addition to
3540 * sh-opc.h (sh_nibble_type): Added REG_B.
3541 (sh_arg_type): Added A_REG_B.
3542 (sh_table): Added pref and bank reg versions of ldc, ldc.l, stc
3544 * sh-dis.c (print_insn_shx): Added cases for REG_B and A_REG_B.
3548 * disassemble.c (disassembler): Use new bfd_big_endian macro.
3552 * Makefile.in (distclean): Remove stamp-h. From Ronald
3558 * alpha-dis.c (print_insn_alpha): fixed decoding of cpys
3563 * sh-opc.h (sh_arg_type): Added A_SSR and A_SPC.
3564 (sh_table): Added many SH3 opcodes.
3565 * sh-dis.c (print_insn_shx): Added cases for A_SSR and A_SPC.
3569 * ppc-opc.c (subfc., subfco): Mark this PPCCOM, not PPC.
3570 (subco,subco.): Mark this PPC, not PPCCOM.
3574 * configure: Rebuild with autoconf 2.7.
3578 * configure: Rebuild with autoconf 2.6.
3582 * configure.in: Sort list of architectures. Accept but do nothing
3583 for alliant, convex, pyramid, romp, and tahoe.
3587 * a29k-dis.c (print_special): Change num to unsigned int.
3591 * a29k-dis.c (print_insn): Cast insn24 to unsigned long when
3596 * configure.in: Call AC_CHECK_PROG to find and cache AR.
3597 * configure: Rebuilt.
3601 * configure.in: Add case for bfd_i860_arch.
3602 * configure: Rebuild.
3606 * m68k-opc.c (m68k_opcodes): Correct fmoveml operands.
3607 * m68k-dis.c (NEXTSINGLE): Change i to unsigned int.
3608 (NEXTDOUBLE): Likewise.
3609 (print_insn_m68k): Don't match fmoveml if there is more than one
3610 register in the list.
3611 (print_insn_arg): Handle a place of '8' for a type of 'L'.
3615 * m68k-opc.c: Use #W rather than #w.
3616 * m68k-dis.c (print_insn_arg): Handle new 'W' place.
3620 * m68k-opc.c (m68k_opcode_aliases): Add dbfw as an alias for dbf,
3621 and likewise for all the dbxx opcodes.
3625 * arc-dis.c: Include elf-bfd.h rather than libelf.h.
3629 * mips-opc.c: Added shorthand (V1) for INSN_4100 manifest. Added
3630 the VR4100 specific instructions to the mips_opcodes structure.
3634 * mpw-config.in, mpw-make.sed: Remove ugly workaround for
3635 ugly Metrowerks bug in CW6, is fixed in CW7.
3639 * ppc-opc.c (whole file): Add flags for common/any support.
3643 * Makefile.in (BISON): Remove macro.
3644 (FLAGS_TO_PASS): Remove BISON.
3650 * m68k-dis.c (print_insn_m68k): Recognize all two-word
3651 instructions that take no args by looking at the match mask.
3652 (print_insn_arg): Always print "%" before register names.
3653 [case 'c']: Use "nc" for the no-cache case, as recognized by gas.
3654 [case '_']: Don't print "@#" before address.
3655 [case 'J']: Use "%s" as format string, not register name.
3656 [case 'B']: Treat place == 'C' like 'l' and 'L'.
3660 * i386-dis.c: Describe cmpxchg8b operand, and spell the opcode
3667 * alpha-opc.h (MEMORY_FUNCTION_FORMAT_MASK): added.
3668 (alpha_insn_set): added definitions for VAX floating point
3669 instructions (Unix compilers don't generate these, but handcoded
3670 assembly might still use them).
3672 * alpha-dis.c (print_insn_alpha): added support for disassembling
3673 the miscellaneous instructions in the Alpha instruction set.
3677 * mpw-config.in: Add m68k-opc.c.o to BFD_MACHINES for m68k,
3678 no longer create sysdep.h, sed ppc-opc.c to work around a
3679 serious Metrowerks C bug.
3680 * mpw-make.in: Remove.
3681 * mpw-make.sed: New file, used by mpw-configure to edit
3682 Makefile.in into an MPW makefile.
3686 * Makefile.in (maintainer-clean): New synonym for realclean.
3690 * m68k-opc.c: Split pmove patterns which use 'P' into patterns
3691 which use '0', '1', and '2' instead. Specify the proper size for
3692 a pmove immediate operand. Correct the pmovefd patterns to be
3693 moves to a register, not from a register.
3694 * m68k-dis.c (print_insn_arg): Replace 'P' with '0', '1', '2'.
3698 * sparc-opc.c (sparc_opcodes): Mark all insns that reference
3699 %psr, %wim, %tbr as F_NOTV9.
3703 * Makefile.in (Makefile): Just rebuild Makefile when running
3705 (config.h, stamp-h): New targets.
3706 * configure.in: Call AC_CONFIG_HEADER and AC_CANONICAL_SYSTEM
3707 earlier. Don't bother to call AC_ARG_PROGRAM. Touch stamp-h when
3708 rebuilding config.h.
3709 * configure: Rebuild.
3711 * mips-opc.c: Change unaligned loads and stores with "t,A"
3712 operands to use "t,A(b)".
3716 * sh-dis.c (print_insn_shx): Add F_FR0 support.
3720 * sh-dis.c (print_insn_shx): Change loop over op->arg[n] to iterate
3721 until 3 instead of until 2.
3725 * Makefile.in (ALL_CFLAGS): Define.
3726 (.c.o, disassemble.o): Use $(ALL_CFLAGS).
3727 (MOSTLYCLEAN): Add config.log.
3728 (distclean): Don't remove config.log.
3729 * configure.in: Substitute HDEFINES.
3730 * configure: Rebuild.
3734 * sh-opc.h (sh_arg_type): Add F_FR0.
3735 (sh_table, case fmac): Add F_FR0 as first argument.
3739 * sh-opc.h (sh_opcode_info): Increase arg array size to 4.
3743 * sparc-dis.c: Remove all references to NO_V9.
3747 * aclocal.m4: Just include ../bfd/aclocal.m4.
3748 * configure: Rebuild.
3752 * sparc-dis.c (X_DISP19): Define.
3753 (print_insn, case 'G'): Use it.
3754 (print_insn, case 'L'): Sign extend displacement.
3758 * configure.in: Run ../bfd/configure.host before AC_PROG_CC.
3759 Subsitute CFLAGS and AR. Call AC_PROG_INSTALL. Don't substitute
3760 host_makefile_frag or frags.
3761 * aclocal.m4: New file.
3762 * configure: Rebuild.
3763 * Makefile.in (INSTALL): Set to @INSTALL@.
3764 (INSTALL_PROGRAM): Set to @INSTALL_PROGRAM@.
3765 (INSTALL_DATA): Set to @INSTALL_DATA@.
3767 (AR_FLAGS): Set to rc rather than qc.
3768 (CC): Define as @CC@.
3769 (CFLAGS): Set to @CFLAGS@.
3770 (@host_makefile_frag@): Remove.
3771 (config.status): Remove dependency upon @frags@.
3773 * configure.in: ../bfd/config.bfd now just sets shell variables.
3774 Use them rather than looking through target Makefile fragments.
3775 * configure: Rebuild.
3779 * sh-opc.h (ftrc): Change FPUL_N to FPUL_M.
3783 * sparc-opc.c (sparc_opcodes): Delete duplicate wr %y insn.
3784 Add clrx, iprefetch, signx, clruw, cas, casl, casx, casxl synthetic
3787 * sparc-opc.c (sparc_opcodes): Fix prefetcha insn.
3788 (lookup_{name,value}): New functions.
3789 (prefetch_table): New static local.
3790 (sparc_{encode,decode}_prefetch): New functions.
3791 * sparc-dis.c (print_insn): Handle '*' arg (prefetch function).
3795 * sh-opc.h: Add blank lines to improve readabililty of sh3e
3800 * sh-dis.c: Correct comment on first line of file.
3804 * disassemble.c (disassembler): Handle bfd_mach_sparc64.
3806 * sparc-opc.c (asi, membar): New static locals.
3807 (sparc_{encode,decode}_{asi,membar}): New functions.
3808 (sparc_opcodes, membar insn): Fix.
3809 * sparc-dis.c (print_insn): Call sparc_decode_asi.
3810 Support decoding of membar masks.
3815 * m68k-opc.c (m68k_opcode_aliases): Add br, brs, brb, brw, brl.
3819 * m68k-opc.c (m68k_opcode_aliases): Add bhib as an alias for bhis,
3820 and likewise for the other branches. Add bhs as an alias for bcc,
3821 and likewise for the size variants. Add dbhs as an alias for
3826 * sh-opc.h (FP sts instructions): Update to match reality.
3830 * m68k-dis.c: (fpcr_names): Add % before all register names.
3831 (reg_names): Likewise.
3832 (print_insn_arg): Don't explicitly print % before register names.
3833 Add % before register names in static array names. In case 'r',
3834 print data registers as `@(Dn)', not `Dn@'. When printing a
3835 memory address, don't print @# before it.
3836 (print_indexed): Change base_disp and outer_disp from int to
3837 bfd_vma. Print using MIT syntax, not mutant invalid Motorola
3838 syntax. Sign extend 8 byte displacement correctly.
3839 (print_base): Print using MIT syntax. Print zpc when appropriate.
3840 Change parameter disp from int to bfd_vma.
3842 * m68k-opc.c (m68k_opcode_aliases): Add jsrl and jsrs as aliases
3847 * sh-dis.c (print_insn_shx): Handle new operand types F_REG_N,
3848 F_REG_M, FPSCR_M, FPSCR_N, FPUL_M and FPUL_N.
3849 * sh-opc.h (sh_arg_type): Add new operand types.
3850 (sh_table): Add new opcodes from SH3E Floating Point ISA.
3854 * Makefile.in (distclean): Remove generated file config.h.
3858 * Makefile.in (distclean): Remove generated file config.h.
3862 * m68k-opc.c: New file, holding tables from include/opcode/m68k.h.
3864 * m68k-dis.c: Remove BREAK_UP_BIG_DECL stuff.
3866 (print_insn_m68k): Change d to be const. Use m68k_numopcodes
3867 rather than numopcodes. Use m68k_opcodes rather than removed
3868 opcode function. Don't check F_ALIAS.
3869 (print_insn_arg): Change first parameter to be const char *.
3870 * Makefile.in (ALL_MACHINES): Add m68k-opc.o.
3871 (m68k-opc.o): New target.
3872 * configure.in: Build m68k-opc.o for bfd_m68k_arch.
3873 * configure: Rebuild.
3877 * sparc-dis.c (HASH_SIZE, HASH_INSN): Define.
3878 (opcode_bits, opcode_hash_table): New variables.
3879 (opcodes_initialized): Renamed from opcodes_sorted.
3880 (build_hash_table): New function.
3881 (is_delayed_branch): Use hash table.
3882 (print_insn): Renamed from print_insn_sparc, made static.
3883 Build and use hash table. If !sparc64, ignore sparc64 insns,
3884 and vice-versa if sparc64.
3885 (print_insn_sparc, print_insn_sparc64): New functions.
3886 (compare_opcodes): Move sparc64 opcodes to end.
3887 Print commutative insns with constant second.
3888 * sparc-opc.c (all non-v9 insns): Use flag F_NOTV9 instead of F_ALIAS.
3892 * sh-dis.c (print_insn_shx): Remove unused local dslot. Use
3893 print_address_func for A_BDISP12 and A_BDISP8. Correct test which
3894 avoids printing a delay slot in a delay slot.
3895 * sh-opc.h (sh_table): Fully bracket last entry.
3899 * sparc-opc.c (sllx, srax, srlx): Fix disassembly.
3903 * configure.in: Get host_makefile_frag from ${srcdir}.
3905 * configure.in: Autoconfiscated. Check for string[s].h. Create
3906 config.h from config.in. Don't set up sysdep.h link.
3907 * sysdep.h: New file.
3908 * configure, config.in: New files, generated from configure.in.
3909 * Makefile.in: Updated to be processed autoconf-style.
3910 (distclean): Keep sysdep.h. Remove config.log and config.cache.
3911 (Makefile): Depend on config.status.
3912 (config.status): New rule.
3913 * configure.bat: Update Makefile substitutions.
3917 * mips-opc.c (L1): Define.
3918 (mips_opcodes): Add R4010 instructions: flushi, flushd, flushid,
3919 addciu, madd, maddu, ffc, ffs, msub, msubu, selsi, selsr, waiti,
3924 * mips-opc.c (mips_opcodes): For the move pseudo-op, prefer daddu
3925 if ISA 3 and addu otherwise, replacing or, since some MIPS chips
3926 have multiple add units but only a single logical unit.
3928 * ppc-opc.c (powerpc_operands): Change CR to use a bitsize of 3,
3929 shifted by 18, without any insertion or extraction function.
3930 (insert_cr, extract_cr): Remove.
3934 * m68k-dis.c (print_insn_arg, print_indexed): Print "%" before
3939 * mpw-config.in: Add sh and i386 configs, remove sparc config.
3940 * sh-opc.h: Add copyright.
3944 * Makefile.in (crunch-m68k): Delete extra target accidentally
3945 checked in a while ago.
3949 * sh-opc.h (sh_table): Add SH3 support.
3953 * sh-opc.h: Added bsrf and braf.
3957 * arm-opc.h (arm_opcodes): Add 64-bit multiply patterns. Delete
3958 bogus [ls]fm{ea,fd} patterns.
3960 * arm-opc.h (arm_opcodes): Correct typos in stm, ldm, std, and ldc.
3961 * arm-dis.c (print_insn_arm): Make GIVEN a parameter, don't try and
3962 initialize it from memory. Make function static.
3963 (print_insn_{big,little}_arm): New functions.
3964 * disassemble.c (disassembler, case bfd_arch_arm): Disassemble for
3965 the correct endianness.
3969 * sh-opc.h (sh_nibble_type, sh_arg_type): remove trailing , from
3974 * m68k-dis.c (opcode): Finish change made by Kung Hsu on April
3975 17th, so that it builds again using GCC as the compiler.
3979 * mips-dis.c (print_insn_little_mips): Cast return value from
3980 bfd_getl32 from bfd_vma to unsigned long, because _print_insn_mips
3981 expects an unsigned long, and that might be fewer words of
3982 argument storage (e.g., if bfd_vma is long long on a 32-bit
3984 (print_insn_big_mips): Likewise with bfd_getb32 value.
3985 (_print_insn_mips): Now static.
3989 * m68k-dis.c: Take out #define BREAK_UP_BIG_DECL kludge, because
3990 gcc memory hog problem with initializer is fixed.
3994 Merge in support for Mac MPW as a host.
3995 (Old change descriptions retained for informational value.)
3997 * mpw-config.in (archname): Compute from the config.
3998 (BFD_MACHINES, ARCHDEFS): Put into mk.tmp.
4000 * mpw-config.in (target_arch): Compute from canonical target.
4001 (m68k, mips, powerpc, sparc): Add architectures.
4002 * mpw-make.in (disassemble.c.o): Add.
4003 (ALL_CFLAGS): Remove special flags (-mc68020 -mc68881 -model far).
4005 * mpw-config.in (BFD_MACHINES): Set to a default value.
4006 * mpw-make.in (BFD_MACHINES): Remove wired-in value.
4008 * mpw-make.in (CSEARCH): Add extra-include to search path.
4010 * mpw-config.in (varargs.h): Don't create.
4011 (sysdep.h): Create using forward-include.
4012 * mpw-make.in (CSEARCH): Add include/mpw to search path.
4014 * mpw-config.in: New file, MPW version of configure.in.
4015 * mpw-make.in: New file, MPW version of Makefile.in.
4019 * alpha-dis.c (print_insn_alpha): Put empty statement after
4024 * hppa-dis.c (sign_extend): Delete, redundant with libhppa.h version.
4025 (low_sign_extend): Likewise.
4026 (get_field): Delete unused function.
4027 (set_field, deposit_14, deposit_21): Likewise.
4031 * i386-dis.c: Support for more pentium opcodes. From Guy Harris
4038 * alpha-opc.h (OSF_ASMCODE): define
4039 print pal-code names as defined in App C of the
4040 Alpha Architecture Reference Manual
4042 * alpha-dis.c: cleaned up output
4043 print stylized code forms as defined in App A.4.3 of the
4044 Alpha Architecture Reference Manual
4048 * mips-opc.c: Add new mips4 instructions. Don't set INSN_RFE for
4050 * mips-dis.c (print_insn_arg): Handle new argument types 'h', 'R',
4055 * m68k-dis.c (opcode): New function. Returns address of opcode
4056 table entry given index, even if the opcode table was split to
4057 work around gcc bugs.
4058 (print_insn_m68k): Call opcode instead of referencing m68k_opcodes
4060 (BREAK_UP_BIG_DECL): Make secondary array static and const.
4061 (reg_names): Now const.
4062 (print_insn_arg): Arrays cacheFieldName and names now const.
4063 (print_indexed): Array scales now const.
4067 * ppc-opc.c: Sort recently added instructions by minor opcode
4068 number within major opcode number.
4072 * hppa-dis.c: Include libhppa.h.
4076 * mips-opc.c: Change dli to use M_DLI, and add dla.
4080 * Makefile.in (ALL_MACHINES): Add w65-dis.o.
4084 * mips-opc.c: Add r4650 mul instruction.
4088 * mips-opc.c: Add uld and usd macros for unaligned double load and
4093 * ppc-opc.c (powerpc_opcodes): Add 403GA opcodes rfci, dccci,
4094 mfdcr, mtdcr, icbt, iccci.
4098 * i960-dis.c (struct tabent, struct sparse_tabent): Change the
4099 signed char fields to shorts, more portable.
4103 * i960-dis.c (struct tabent, struct sparse_tabent): Declare the
4104 char fields as signed chars, since they may have negative values.
4108 * i386-dis.c (dis386_twobyte): Add cpuid, From Charles Hannum
4114 * ppc-opc.c (extract_bdm): Correct parenthezisation.
4115 * ppc-dis.c (print_insn_powerpc): Print .long before unrecognized
4120 * ppc-opc.c: Changes based on patch from David Edelsohn
4122 (powerpc_operands): Add operands SPRBAT and SPRG. Split TBR out of
4125 (insert_tbr): New static function.
4126 (extract_tbr): New static function.
4127 (XFXFXM_MASK, XFXM): Define.
4128 (XSPRBAT_MASK, XSPRG_MASK): Define.
4129 (powerpc_opcodes): Add instructions to access special registers by
4130 name. Add mtcr and mftbu.
4134 * mips-opc.c (P3): Define.
4135 (mips_opcodes): Add mad and madu.
4137 Sun Jan 15 16:32:59 1995 Steve Chamberlain <sac@splat>
4139 * configure.in: Add W65 support.
4140 * disassemble.c: Likewise.
4141 * w65-opc.h, w65-dis.c: New files.
4145 * h8300-dis.c (bfd_h8_disassemble): Add support for 2 bit
4150 * mips-opc.c: Add dli as a synonym for li.
4154 * alpha-dis.c (print_insn_alpha): Handle call_pal instruction, and
4155 print something for reserved opcode values, even if it won't
4158 * mips-dis.c (_print_insn_mips): When initializing, shift right
4159 and mask, to avoid sign extension problems on the Alpha.
4161 * m68k-dis.c (print_insn_arg, case 'J'): Handle buscr and pcr
4166 * sh-opc.h (mov.l gbr): Get direction right.
4167 * sh-dis.c (print_insn_shx): New function.
4168 (print_insn_shl, print_insn_sh): Call print_insn_shx to
4169 print opcodes with right byte order.
4173 * ns32k-dis.c (struct ns32k_option): Renamed from struct option,
4174 to avoid conflicts with getopt.
4178 * hppa-dis.c (print_insn_hppa): Read the instruction using
4179 bfd_getb32, so that it works on a little endian or 64 bit host.
4180 Remove unused local variable op.
4184 * mips-opc.c: Use or instead of addu for pseudo-op move, since
4185 addu does not work correctly if -mips3.
4189 * a29k-dis.c (print_special): Add special register names defined
4190 on 29030, 29040 and 29050.
4191 (print_insn): Handle new operand type 'I'.
4195 * Makefile.in (INSTALL): Use top level install.sh script.
4199 * sparc-dis.c: Rewrite to use bitfields, rather than a union, so
4200 that it works on a little endian host.
4204 * configure.in: Use ${config_shell} when running config.bfd.
4208 * mips-opc.c (mips_opcodes): "dabs" is only available with -mips3.
4212 * a29k-dis.c (print_insn): Print the opcode.
4216 * mips-opc.c (mips_opcodes): Set WR_t for sc and scd.
4220 * hppa-dis.c (reg_names): Use r26-r23 for arg0-arg3.
4224 * mips-opc.c: Set INSN_STORE_MEMORY flag for all instructions
4225 which store a value into memory.
4229 * configure.in, Makefile.in, disassemble.c: Add support for the ARM.
4230 * arm-dis.c, arm-opc.h: New files.
4234 * Makefile.in (ns32k-dis.o): Add dependency.
4235 * ns32k-dis.c (print_insn_arg): Declare initialized local as
4236 string, not as array of chars.
4240 * sparc-dis.c (print_insn_sparc): Handle new operand type 'x'.
4242 * sparc-opc.c: Added sparclite extended FP operations, and
4243 versions of v9 impdep* instructions permitting specification of
4248 * i960-dis.c (reg_names): Now const.
4249 (struct sparse_tabent): New type, copied from array type in mem
4251 (ctrl): Local static array ctrl_tab now const.
4252 (cobr): Local static array cobr_tab now const.
4253 (mem): Local variables reg1, reg2, reg3 now point to const. Local
4254 static variable mem_tab no longer explicitly initialized. Changed
4255 mem_init to const array of struct sparse_tabent.
4256 (reg): Local static variable reg_tab no longer explicitly
4257 initialized. Changed reg_init to const array of struct
4259 (ea): Local static array scale_tab now const.
4261 * i960-dis.c (reg): Added i960JX instructions to reg_init table.
4266 * configure.bat: the disassember needs to be enabled for
4267 "objdump -d" to work in djgpp.
4271 * ns32k-dis.c: Deleted all code in "#ifdef GDB".
4272 (invalid_float): Enabled general version, doesn't require running
4273 on ns32k host. Changed to take char* argument, and test for
4274 explicitly specified sizes, instead of using sizeof() on host CPU
4276 (INVALID_FLOAT): Cast first argument.
4277 (opt_u, opt_U, opt_O, opt_C, opt_S, list_P532, list_M532,
4278 list_P032, list_M032): Now const.
4279 (optlist, list_search): Made appropriate arguments now point to
4281 (print_insn_arg): Changed static array of one-character-string
4282 pointers into a static const array of characters; fixed sprintf
4283 statement accordingly.
4287 * opcodes/ns32k-dis.c: Semi-new file. Had apparently been dropped
4288 from distribution. A ns32k-dis.c from a previous distribution has
4289 been brought up to date and supports the new interface.
4291 * disassemble.c: define ARCH_ns32k and add case bfd_arch_ns32k.
4293 * configure.in: add bfd_ns32k_arch target support.
4295 * Makefile.in: add ns32k-dis.o to ALL_MACHINES.
4296 Add ns32k-dis.c to CFILES. Add dependencies for ns32k-dis.o.
4300 * h8300-dis.c (bfd_h8_disassemble): Get 16bit branch
4305 * h8300-dis.c, mips-dis.c: Don't use true and false.
4309 * configure.in: Change --with-targets to --enable-targets.
4313 * mips-dis.c (_print_insn_mips): Build a static hash table mapping
4314 opcodes to the first instruction with that opcode, to speed
4320 * Makefile.in (mostlyclean): Fix typo (was mostyclean).
4324 * configure.bat: update to latest makefile.in
4328 * a29k-dis.c (print_insn): Print 'x' type operand in hex.
4329 * h8300-dis.c (bfd_h8_disassemble): Print 16bit rels correctly.
4330 * sh-dis.c (print_insn_sh): Don't recur endlessly if delay
4331 slot insn is in a delay slot.
4332 * z8k-opc.h: (resflg): Fix patterns.
4333 * h8500-opc.h Fix CR insn patterns.
4337 * ppc-opc.c (powerpc_opcodes): Put PowerPC versions of "cmp" and
4338 "cmpl" before POWER versions, so that gas -many uses them.
4342 * disassemble.c: New file.
4343 * Makefile.in (OFILES): Add disassemble.o.
4344 (disassemble.o): Provide dependencies; compile with $(ARCHDEFS).
4345 * configure.in: Define ARCHDEFS in Makefile. Code taken from
4346 binutils/configure.in.
4348 * m68k-dis.c (print_insn_m68k): If F_ALIAS flag is set, skip the
4349 opcode being examined.
4353 * ppc-opc.c (powerpc_operands): Added RAL, RAM and RAS.
4354 (insert_ral, insert_ram, insert_ras): New functions.
4355 (powerpc_opcodes): Use RAL for load with update, RAM for lmw, and
4356 RAS for store with update.
4360 * ppc-opc.c (powerpc_opcodes): Correct fcir. From David Edelsohn
4365 * mips-opc.c (mips_opcodes): Correct operands of "nor" with an
4370 * sparc-opc.c (sparc_opcodes): Fix "rd %fprs,%l0".
4374 * ppc-opc.c (powerpc_operands): The signedp field has been
4375 removed, so don't initialize it. Set the PPC_OPERAND_SIGNED flag
4376 instead. Add new operand SISIGNOPT.
4377 (powerpc_opcodes): For lis, liu, addis, and cau use SISIGNOPT.
4379 * ppc-dis.c (print_insn_powerpc): Check PPC_OPERAND_SIGNED rather
4384 * i386-dis.c (struct private): Renamed to dis_private. `private'
4385 is a reserved word for dynix cc.
4389 * configure.in: Change error message to refer to bfd/config.bfd
4390 rather than bfd/configure.in.
4394 * ppc-opc.c: Define POWER2 as short alias flag.
4395 (powerpc_opcodes): Add POWER/2 opcodes lfq*, stfq*, fcir[z], and
4400 * i960-dis.c (print_insn_i960): Don't read a second word for
4401 opcodes 0, 1, 2 and 3.
4405 * configure.in: Don't build m68881-ext.o for bfd_m68k_arch.
4409 * m68881-ext.c: Removed; no longer used.
4410 * Makefile.in: Changed accordingly.
4412 * m68k-dis.c (ext_format_68881): Don't declare.
4413 (print_insn_m68k): If an instruction uses place 'i', it uses at
4414 least four fixed bytes.
4415 (print_insn_arg): Don't bump p by 2 for case 'I', place 'i'. For
4416 extended float, convert to double using floatformat_to_double, not
4417 ieee_extended_to_double, and fetch the data before converting it.
4421 * mips-opc.c: It's sqrt.s, not sqrt.w. From
4426 * ppc-opc.c (powerpc_opcodes): The POWER uses bdn[l][a] where the
4427 PowerPC uses bdnz[l][a].
4431 * dis-buf.c, i386-dis.c: Include sysdep.h.
4435 * configure.in (bfd_powerpc_arch): Use ppc-dis.o and ppc-opc.o.
4437 * ppc-opc.c (powerpc_opcodes): Mark POWER instructions supported
4438 by Motorola PowerPC 601 with PPC_OPCODE_601.
4439 * ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc):
4440 Disassemble Motorola PowerPC 601 instructions as well as normal
4441 PowerPC instructions.
4445 * i960-dis.c (reg, mem): Just use a static array instead of
4450 * hppa-dis.c (print_insn_hppa): For '?' and '@' only adjust the
4451 condition name index if this is for a negated condition.
4453 * hppa-dis.c (print_insn_hppa): No space before 'H' operand.
4454 Floating point format for 'H' operand is backwards from normal
4455 case (0 == double, 1 == single). For '4', '6', '7', '9', and '8'
4456 operands (fmpyadd and fmpysub), handle bizarre register
4457 translation correctly for single precision format.
4459 * hppa-dis.c (print_insn_hppa): Do not emit a space after 'F'
4460 or 'I' operands if the next format specifier is 'M' (fcmp
4461 condition completer).
4465 * ppc-opc.c (powerpc_operands): New operand type MBE to handle a
4466 single number giving a bitmask for the MB and ME fields of an M
4467 form instruction. Change NB to accept 32, and turn it into 0;
4468 also turn 0 into 32 when disassembling. Seperated SH from NB.
4469 (insert_mbe, extract_mbe): New functions.
4470 (insert_nb, extract_nb): New functions.
4471 (SC_MASK): Mask out SA and LK bits.
4472 (powerpc_opcodes): Change "cal" to use RT, D, RA rather than RT,
4473 RA, SI. Change "liu" and "cau" to use UI rather than SI. Mark
4474 "bctr" and "bctrl" as accepted by POWER. Change "rlwimi",
4475 "rlimi", "rlwimi.", "rlimi.", "rlwinm", "rlinm", "rlwinm.",
4476 "rlinm.", "rlmi", "rlmi.", "rlwnm", "rlnm", "rlwnm.", "rlnm." to
4477 use MBE rather than MB. Add "mfmq" and "mtmq" POWER instructions.
4478 (powerpc_macros): Define table of macro definitions.
4479 (powerpc_num_macros): Define.
4481 * ppc-dis.c (print_insn_powerpc): Don't skip optional operands
4482 if PPC_OPERAND_NEXT is set.
4486 * i960-dis.c (print_insn_i960): Make buffer bfd_byte instead of
4487 char. Retrieve contents using bfd_getl32 instead of shifting.
4491 * ppc-opc.c: New file. Opcode table for PowerPC, including
4492 opcodes for POWER (RS/6000).
4493 * ppc-dis.c: New file. PowerPC and Power (RS/6000) disassembler.
4494 * Makefile.in (ALL_MACHINES): Add ppc-dis.o and ppc-opc.o.
4495 (CFILES): Add ppc-dis.c.
4496 (ppc-dis.o, ppc-opc.o): New targets.
4497 * configure.in: Build ppc-dis.o and ppc-opc.o for bfd_rs6000_arch.
4501 * hppa-dis.c (print_insn_hppa): Handle 'N' in assembler template.
4502 No space before 'u', 'f', or 'N'.
4506 * i386-dis.c (print_insn_i386): Add FIXME comment regarding reading
4507 farther than we should.
4509 * i386-dis.c (dis386): Use Yb and Yv for scasb and scasS.
4513 * sparc-dis.c m68k-dis.c alpha-dis.c a29k-dis.c: Fix comments.
4517 * i960-dis.c (print_insn_i960): Only read word2 if the instruction
4518 needs it, to prevent reading past the end of a section.
4522 * mips-opc.h: Use macro for j instruction, to support SVR4 PIC.
4523 Removed t,A case for la; always use t,A(b) case.
4528 * mips-dis.c (print_insn_arg): Handle 'k'.
4529 * mips-opc.c: Make cache use k, not t.
4533 * alpha-opc.h, alpha-dis.c (print_insn_alpha): Add
4534 FLOAT_MEMORY_FORMAT_CODE, FLOAT_BRANCH_FORMAT_CODE, correct
4535 FLOAT_FORMAT_CODE to put out floating point register names.
4539 * mips-opc.c: Use macros for jal variants, to support SVR4 PIC.
4543 * a29k-dis.c (print_insn): Use 0x%08x, not 0x%8x.
4547 * mips-opc.c (dsll, dsra, dsrl): Added '>' cases for shift counts
4548 larger than 32. Moved dsxx32 variants first for disassembler.
4552 * z8kgen.c, z8k-opc.h: Add full lda information.
4556 * hppa-dis.c (print_insn_hppa): Do not emit a space after
4557 movb instructions. Any necessary space will be emitted by
4558 the code to handle nullification completers.
4562 * mips-opc.c: Moved l.d down so that it disassembles as ldc1.
4566 * alpha-opc.h: Add ldl_l, fix typo for ldq_u.
4567 * alpha-dis.c (print_insn_alpha): Add code for PAL_FORMAT_CODE.
4571 * mips-opc.c: Correct lwu opcode value (book had it wrong).
4575 * z8k-dis.c (FETCH_DATA): get just the right amount of data.
4576 (unpack_instr): Cope with ARG_IMM4M1 type instructions.
4580 * m88k-dis.c (m88kdis): comment change. Remove space after
4582 (printop): handle new arg types DEC and XREG for m88110.
4586 * hppa-dis.c (print_insn_hppa): Handle 'z' operand
4587 type for absolute branch addresses. Delete special
4588 "ble" and "be" code in 'W' operand code.
4592 * mips-opc.c: Set hazard information correctly for branch
4593 likely instructions.
4597 * alpha-dis.c (print_insn_alpha), alpha-opc.h: Fix bugs, use
4598 info->fprintf_func for printing and info->print_address_func for
4603 * mips-opc.c: Set INSN_TRAP for tXX instructions.
4608 Corrected second case of "b" for disassembler.
4612 * mips-dis.c, m88k-dis.c: Don't include libbfd.h. Changed calls
4613 to BFD swapping routines to correspond to BFD name changes.
4617 * mips-opc.c: Change div machine instruction to be z,s,t rather
4618 than s,t. Change div macro to be d,v,t rather than d,s,t.
4619 Likewise for divu, ddiv, ddivu. Added z,s,t case for drem, dremu,
4620 rem and remu which generates only the corresponding div
4621 instruction. This is for compatibility with the MIPS assembler,
4622 which only generates the simple machine instruction when an
4623 explicit destination of $0 is used.
4624 * mips-dis.c (print_insn_arg): Handle 'z' (always register zero).
4629 WR_31 hazard for bal, bgezal, bltzal.
4633 * hppa-dis.c (print_insn_hppa): Use print function
4634 from within the disassemble_info, not fprintf_filtered.
4638 * hppa-dis.c (print_insn_hppa): Handle '|' like '>'. (From Jeff
4643 * mips-opc.c ("absu"): Removed.
4648 * mips-opc.c: Added r6000 and r4000 instructions and macros.
4649 Changed hazard information to distinguish between memory load
4650 delays and coprocessor load delays.
4654 * mips-opc.c: li.d uses "T,L", not "S,F". Added li.s.
4658 * configure.in: Don't pass cpu to config.bfd.
4662 * m88k-dis.c (m88kdis): Make class unsigned.
4666 * alpha-dis.c (print_insn_alpha): One branch format case was
4667 missing the instruction name.
4671 * Makefile.in (ALL_MACHINES): Renamed from DIS_LIBS.
4672 Add the arch-specific auxiliary files.
4673 (OFILES): Remove the arch-specific auxiliary files
4674 and use BFD_MACHINES instead of DIS_LIBS.
4675 * configure.in: Set BFD_MACHINES based on --with-targets option.
4679 * mips-opc.c: Added lwc1 E,A(b) to go with lwc1 T,A(b). Similarly
4684 * sparc-opc.c: Change CONST to const to deal with gcc
4685 -Dconst=__const -traditional.
4690 coprocessor instructions out of #if 0, and made them use new
4695 * sparc-dis.c: Include ansidecl.h before opcodes/sparc.h.
4699 * sparc-opc.c: Add F_JSR, F_UNBR, or F_CONDBR flags to each branch
4700 instruction, for use by the disassembler.
4702 * sparc-dis.c (SEX): Add sign extension macro. Replace many
4703 hand-coded sign extensions that depended on 32-bit host ints.
4704 FIXME, we still depend on big-endian host bitfield ordering.
4705 (sparc_print_insn): Set the insn_info_valid field, and the
4706 other fields that describe the instruction being printed.
4710 * sparc-opc.c (call): Accept all 6 addressing modes valid for
4711 `jmp' instead of just one of them.
4715 * hppa-dis.c: Move floating registers from reg_names to fp_reg_names.
4716 (fput_fp_reg_r): Renamed from fput_reg_r.
4717 (fput_fp_reg): New function.
4718 (print_insn_hppa): Use fput_fp_reg{,_r} where appropriate.
4720 * hppa-dis.c (print_insn_hppa, cases 'a', 'd'): Print space afterwards.
4722 * hppa-dis.c (print_insn_hppa, case 'd'): Use GET_COND not GET_FIELD.
4726 * hppa-dis.c (print_insn_hppa): Use extract_5r_store for 'r'.
4728 * hppa-dis.c (print_insn_hppa, case '>'): If next character is 'n',
4729 don't output a space.
4731 * hppa-dis.c (float_format_names): 10 is undefined, and 11 is quad.
4735 * mips-opc.c: New file, containing opcode table from
4736 ../include/opcode/mips.h.
4737 * Makefile.in: Add it.
4741 * m88k-dis.c: New file, moved in from gdb and changed to use the
4742 new dis-asm.h disassembler interface.
4743 * Makefile.in (DIS_LIBS): Added m88k-dis.o.
4744 (m88k-dis.o): New target.
4748 * mips-dis.c (print_insn_arg, _print_insn_mips): Made pointer to
4749 argument string const char * to correspond to opcode/mips.h.
4753 * mips-dis.c: Updated to account for name changes in new version
4755 * Makefile.in: Added header file dependencies.
4759 * h8300-dis.c (bfd_h8_disassemble): Correct fetching of instruction.
4763 * m68k-dis.c (NEXTWORD, NEXTLONG): Use ((x) ^ 0x8000) - 0x8000 to sign
4764 extend, rather than shifts.
4768 * Makefile.in: Undo 15 June change.
4772 * m68k-dis.c (print_insn_arg): Change return value to byte count
4774 * m68k-dis.c: Re-write to detect invalid operands before
4775 printing anything, so we can handle this the same way we
4776 handle invalid opcodes.
4780 * sh-dis.c, sh-opc.h: Understand some more opcodes.
4784 * hppa-dis.c: Include <ansidecl.h> and sysdep.h before other
4789 * sparc-dis.c: Don't declare qsort, since sysdep.h might.
4791 * configure.in: Do make sysdep.h link.
4792 * Makefile.in: Search ../include. Don't search ../bfd.
4797 * hppa-dis.c: Fix typo. 'a' and 'd' were reversed.
4798 Do not print a space before the completers specified by
4803 * mips-dis.c: No longer need to bomb out if HOST_64_BIT is
4804 defined, since gdb has been fixed.
4807 * hppa-dis.c (print_insn_hppa): Last argument to fput_reg,
4808 fput_reg_r, fput_creg, fput_const, and fputs_filtered should
4809 be a *disassemble_info, not a *FILE.
4810 * hppa-dis.c: Support 'd', '!', and 'a'.
4811 * hppa-dis.c: Support 's' to extract a 2 bit space register.
4812 * hppa-dis.c: Delete cases which are no longer needed.
4816 * m68k-dis.c (print_insn_{m68k,arg}): Add MMU codes.
4820 * h8300-dis.c: New file, removed from bfd/cpu-h8300.c, with
4825 * Makefile.in (CSEARCH): Add -I../bfd for sysdep.h and bfd.h.
4826 * configure.in: No longer need to configure to get sysdep.h.
4831 * hppa-dis.c: Support 'I', 'J', and 'K' in output
4832 templates for 1.1 FP computational instructions.
4836 * h8500-dis.c (print_insn_h8500): Address argument is type
4838 * z8k-dis.c (print_insn_z8k, print_insn_z8001, print_insn_z8002):
4841 * h8500-opc.h (addr_class_type): No comma at end of enumerator.
4842 * sh-opc.h (sh_nibble_type, sh_arg_type): Ditto.
4844 * sparc-dis.c (compare_opcodes): Move static declaration to
4849 * sparc-dis.c (print_insn_sparc): Implement 'n' argument for unimp
4850 instruction, remove unimp hack from 'l' argument.
4854 * z8k-dis.c (fetch_data): Use unsigned char to make ancient gcc's
4860 * mips-dis.c (print_insn_arg): Handle 'C' for general coprocessor
4865 * hppa-dis.c: Include dis-asm.h before sysdep.h. Changed some
4866 arrays of string pointers to 2-d arrays of chars, to save
4871 * a29k-dis.c, alpha-dis.c, i960-dis.c, sparc-dis.c, z8k-dis.c:
4872 Cast second arg to read_memory_func to "bfd_byte *", as necessary.
4876 * hppa-dis.c: New file from Utah, adapted to new disassembler
4878 * Makefile.in: Include it.
4882 * sh-dis.c, sh-opc.h: New files.
4886 * alpha-dis.c, alpha-opc.h: New files.
4890 * mips-dis.c: Sign extend 'j' and 'b' arguments, delta is a signed
4895 * sparc-dis.c: Make "ta" the default trap instruction, "t" the alias.
4899 * a29k-dis.c, sparc-dis.c, sparc-opc.c: Use CONST rather than
4904 * sparc-dis.c: Use fprintf_func a few places where I forgot,
4905 and double percent signs a few places.
4907 * a29k-dis.c, i960-dis.c: New, merged from gdb and binutils.
4909 * i386-dis.c, m68k-dis.c, mips-dis.c, sparc-dis.c:
4910 Use info->print_address_func not print_address.
4912 * dis-buf.c (generic_print_address): New function.
4916 * Makefile.in: Add sparc-dis.c.
4917 sparc-dis.c: New file, merges binutils and gdb versions as follows:
4919 Add `add' instruction to the set that get checked
4920 for a preceding `sethi' in order to print an absolute address.
4921 * (print_insn): Disassembly prefers real instructions.
4922 (is_delayed_branch): Speed up.
4923 * sparc-opcode.h: Add ALIAS bit to aliases. Fix up opcode tables.
4924 Still missing some float ops, and needs testing.
4925 * sparc-pinsn.c (print_insn): Eliminate 'set' test, subsumed by
4926 F_ALIAS. Use printf, not fprintf, when not passing a file
4928 (compare_opcodes): Check that identical instructions have
4929 identical opcodes, complain otherwise.
4932 * Include reg_names.
4934 Use dis-asm.h/read_memory_func interface.
4938 * h8500-dis.c, i386-dis.c, m68k-dis.c, z8k-dis.c (fetch_data):
4939 deliberately return non-zero to setjmp from longjmp. Otherwise
4940 this code fails to compile.
4944 * m68k-dis.c: Fix prototype for fetch_arg().
4948 * dis-buf.c: New file, for new read_memory_func interface.
4949 Makefile.in (OFILES): Include it.
4950 m68k-dis.c, i386-dis.c, h8500-dis.c, mips-dis.c, z8k-dis.c:
4951 Use new read_memory_func interface.
4955 * h8500-dis.c (print_insn_h8500): Get sign of fp offsets right.
4956 * h8500-opc.h: Fix couple of opcodes.
4958 Wed Mar 24 02:03:36 1993 david d `zoo' zuhn (zoo at poseidon.cygnus.com)
4960 * Makefile.in: add dvi & installcheck targets
4964 * Makefile.in: Update for h8500-dis.c.
4968 * h8500-dis.c, h8500-opc.h: New files
4972 * mips-dis.c, z8k-dis.c: Converted to use interface defined in
4973 ../include/dis-asm.h.
4974 * m68k-dis.c: New file (merge of ../binutils/m68k-pinsn.c
4975 and ../gdb/m68k-pinsn.c).
4976 * i386-dis.c: New file (merge of ../binutils/i386-pinsn.c
4977 and ../gdb/i386-pinsn.c).
4978 * m68881-ext.c: New file. Moved definition of
4979 ext_format ext_format_68881 from ../gdb/m68k-tdep.c.
4980 * Makefile.in: Adjust for new files.
4982 * m68k-dis.c: Recognize '9' placement code, so (say) pflush
4983 can be dis-assembled.
4987 * mips-dis.c (print_insn_arg): Now returns void.
4991 * mips-dis.c (ansidecl.h): Include for benefit of sysdep.h
4992 files that use the macros.
4996 * mips-dis.c: New file, from gdb/mips-pinsn.c.
4997 * Makefile.in (DIS_LIBS): Added mips-dis.o.
4998 (CFILES): Added mips-dis.c.
5002 * z8k-dis.c (print_insn_z8001, print_insn_z8002): new routines
5003 * z8kgen.c, z8k-opc.h: fix sizes of some shifts.
5007 * Makefile.in: Improve *clean rules.
5008 * configure.in: Allow a default host.
5010 Tue Nov 17 19:53:54 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com)
5012 * Makefile.in: also use -I$(srcdir)/../bfd, since some sysdep
5013 files include other sysdep files
5017 * z8k-dis.c z8k-opc.h z8kgen.c: checkpoint
5021 * configure.in: For host support, use ../bfd/configure.host
5022 so it stays in sync with the ../bfd/hosts database.
5024 Thu Oct 1 23:38:54 1992 david d `zoo' zuhn (zoo at cirdan.cygnus.com)
5026 * configure.in: use cpu-vendor-os triple instead of nested cases
5030 * z8k-dis.c (unparse_instr): fix bug where opcode returned was
5031 *always* the wrong one.
5035 * z8kgen.c: added copyright info
5039 * z8k-dis.c (unparse_instr): prettier tabs
5040 * z8kgen.c -> z8k-opc.h: bug fixes in tables
5042 Fri Sep 25 12:50:32 1992 Stu Grossman (grossman at cygnus.com)
5044 * configure.in: Add ncr* configuration.
5045 * z8k-dis.c (struct instr_data_s): Make instr_asmsrc char to make
5046 picayune ANSI compilers happy.
5050 * configure.in (i386): Make i386 and i486 synonymous for now.
5051 * configure.in (i[34]86-*-sysv4): Add my_host definition.
5055 * Makefile.in (install): Fix typo.
5059 * Makefile.in (make): Remove obsolete crud.
5060 (sparc-opc.o): Avoid Sun Make VPATH bug.
5064 * Makefile.in: since there are no SUBDIRS, remove rule and
5065 references of subdir_do.
5069 * Makefile.in (install): Get the library name right here too.
5070 Don't install bfd.h, since it's unrelated to this library. No
5071 subdirs to recurse into, either.
5072 (CFILES): The source file has a .c suffix, not .o.
5074 * sparc-opc.c: New file, moved from BFD.
5075 * Makefile.in (OFILES): Build it.
5079 * z8k-dis.c: fixed forward refferences of some declarations.
5083 * Makefile.in: get the name of the library right
5087 * z8k-dis.c: knows how to disassemble z8k stuff
5088 * z8k-opc.h: new file full of z8000 opcodes
5092 version-control: never